2 * PCIe AER software error injection support.
4 * Debuging PCIe AER code is quite difficult because it is hard to
5 * trigger various real hardware errors. Software based error
6 * injection can fake almost all kinds of errors with the help of a
7 * user space helper tool aer-inject, which can be gotten from:
8 * http://www.kernel.org/pub/linux/utils/pci/aer-inject/
10 * Copyright 2009 Intel Corporation.
11 * Huang Ying <ying.huang@intel.com>
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; version 2
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/miscdevice.h>
23 #include <linux/pci.h>
24 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/stddef.h>
30 /* Override the existing corrected and uncorrected error masks */
31 static bool aer_mask_override;
32 module_param(aer_mask_override, bool, 0);
34 struct aer_error_inj {
48 struct list_head list;
65 struct list_head list;
70 static LIST_HEAD(einjected);
72 static LIST_HEAD(pci_bus_ops_list);
74 /* Protect einjected and pci_bus_ops_list */
75 static DEFINE_SPINLOCK(inject_lock);
77 static void aer_error_init(struct aer_error *err, u32 domain,
78 unsigned int bus, unsigned int devfn,
81 INIT_LIST_HEAD(&err->list);
85 err->pos_cap_err = pos_cap_err;
88 /* inject_lock must be held before calling */
89 static struct aer_error *__find_aer_error(u32 domain, unsigned int bus,
92 struct aer_error *err;
94 list_for_each_entry(err, &einjected, list) {
95 if (domain == err->domain &&
103 /* inject_lock must be held before calling */
104 static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev)
106 int domain = pci_domain_nr(dev->bus);
109 return __find_aer_error(domain, dev->bus->number, dev->devfn);
112 /* inject_lock must be held before calling */
113 static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus)
115 struct pci_bus_ops *bus_ops;
117 list_for_each_entry(bus_ops, &pci_bus_ops_list, list) {
118 if (bus_ops->bus == bus)
124 static struct pci_bus_ops *pci_bus_ops_pop(void)
127 struct pci_bus_ops *bus_ops;
129 spin_lock_irqsave(&inject_lock, flags);
130 bus_ops = list_first_entry_or_null(&pci_bus_ops_list,
131 struct pci_bus_ops, list);
133 list_del(&bus_ops->list);
134 spin_unlock_irqrestore(&inject_lock, flags);
138 static u32 *find_pci_config_dword(struct aer_error *err, int where,
144 if (err->pos_cap_err == -1)
147 switch (where - err->pos_cap_err) {
148 case PCI_ERR_UNCOR_STATUS:
149 target = &err->uncor_status;
152 case PCI_ERR_COR_STATUS:
153 target = &err->cor_status;
156 case PCI_ERR_HEADER_LOG:
157 target = &err->header_log0;
159 case PCI_ERR_HEADER_LOG+4:
160 target = &err->header_log1;
162 case PCI_ERR_HEADER_LOG+8:
163 target = &err->header_log2;
165 case PCI_ERR_HEADER_LOG+12:
166 target = &err->header_log3;
168 case PCI_ERR_ROOT_STATUS:
169 target = &err->root_status;
172 case PCI_ERR_ROOT_ERR_SRC:
173 target = &err->source_id;
181 static int aer_inj_read_config(struct pci_bus *bus, unsigned int devfn,
182 int where, int size, u32 *val)
185 struct aer_error *err;
188 struct pci_ops *my_ops;
192 spin_lock_irqsave(&inject_lock, flags);
193 if (size != sizeof(u32))
195 domain = pci_domain_nr(bus);
198 err = __find_aer_error(domain, bus->number, devfn);
202 sim = find_pci_config_dword(err, where, NULL);
205 spin_unlock_irqrestore(&inject_lock, flags);
209 ops = __find_pci_bus_ops(bus);
211 * pci_lock must already be held, so we can directly
212 * manipulate bus->ops. Many config access functions,
213 * including pci_generic_config_read() require the original
214 * bus->ops be installed to function, so temporarily put them
219 rv = ops->read(bus, devfn, where, size, val);
221 spin_unlock_irqrestore(&inject_lock, flags);
225 static int aer_inj_write_config(struct pci_bus *bus, unsigned int devfn,
226 int where, int size, u32 val)
229 struct aer_error *err;
233 struct pci_ops *my_ops;
237 spin_lock_irqsave(&inject_lock, flags);
238 if (size != sizeof(u32))
240 domain = pci_domain_nr(bus);
243 err = __find_aer_error(domain, bus->number, devfn);
247 sim = find_pci_config_dword(err, where, &rw1cs);
253 spin_unlock_irqrestore(&inject_lock, flags);
257 ops = __find_pci_bus_ops(bus);
259 * pci_lock must already be held, so we can directly
260 * manipulate bus->ops. Many config access functions,
261 * including pci_generic_config_write() require the original
262 * bus->ops be installed to function, so temporarily put them
267 rv = ops->write(bus, devfn, where, size, val);
269 spin_unlock_irqrestore(&inject_lock, flags);
273 static struct pci_ops aer_inj_pci_ops = {
274 .read = aer_inj_read_config,
275 .write = aer_inj_write_config,
278 static void pci_bus_ops_init(struct pci_bus_ops *bus_ops,
282 INIT_LIST_HEAD(&bus_ops->list);
287 static int pci_bus_set_aer_ops(struct pci_bus *bus)
290 struct pci_bus_ops *bus_ops;
293 bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL);
296 ops = pci_bus_set_ops(bus, &aer_inj_pci_ops);
297 spin_lock_irqsave(&inject_lock, flags);
298 if (ops == &aer_inj_pci_ops)
300 pci_bus_ops_init(bus_ops, bus, ops);
301 list_add(&bus_ops->list, &pci_bus_ops_list);
304 spin_unlock_irqrestore(&inject_lock, flags);
309 static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
312 if (!pci_is_pcie(dev))
314 if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
318 dev = dev->bus->self;
323 static int find_aer_device_iter(struct device *device, void *data)
325 struct pcie_device **result = data;
326 struct pcie_device *pcie_dev;
328 if (device->bus == &pcie_port_bus_type) {
329 pcie_dev = to_pcie_device(device);
330 if (pcie_dev->service & PCIE_PORT_SERVICE_AER) {
338 static int find_aer_device(struct pci_dev *dev, struct pcie_device **result)
340 return device_for_each_child(&dev->dev, result, find_aer_device_iter);
343 static int aer_inject(struct aer_error_inj *einj)
345 struct aer_error *err, *rperr;
346 struct aer_error *err_alloc = NULL, *rperr_alloc = NULL;
347 struct pci_dev *dev, *rpdev;
348 struct pcie_device *edev;
350 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
351 int pos_cap_err, rp_pos_cap_err;
352 u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0;
355 dev = pci_get_domain_bus_and_slot(einj->domain, einj->bus, devfn);
358 rpdev = pcie_find_root_port(dev);
364 pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
369 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
370 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
371 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
374 rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
375 if (!rp_pos_cap_err) {
380 err_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
385 rperr_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
391 if (aer_mask_override) {
392 cor_mask_orig = cor_mask;
393 cor_mask &= !(einj->cor_status);
394 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
397 uncor_mask_orig = uncor_mask;
398 uncor_mask &= !(einj->uncor_status);
399 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
403 spin_lock_irqsave(&inject_lock, flags);
405 err = __find_aer_error_by_dev(dev);
409 aer_error_init(err, einj->domain, einj->bus, devfn,
411 list_add(&err->list, &einjected);
413 err->uncor_status |= einj->uncor_status;
414 err->cor_status |= einj->cor_status;
415 err->header_log0 = einj->header_log0;
416 err->header_log1 = einj->header_log1;
417 err->header_log2 = einj->header_log2;
418 err->header_log3 = einj->header_log3;
420 if (!aer_mask_override && einj->cor_status &&
421 !(einj->cor_status & ~cor_mask)) {
423 printk(KERN_WARNING "The correctable error(s) is masked by device\n");
424 spin_unlock_irqrestore(&inject_lock, flags);
427 if (!aer_mask_override && einj->uncor_status &&
428 !(einj->uncor_status & ~uncor_mask)) {
430 printk(KERN_WARNING "The uncorrectable error(s) is masked by device\n");
431 spin_unlock_irqrestore(&inject_lock, flags);
435 rperr = __find_aer_error_by_dev(rpdev);
439 aer_error_init(rperr, pci_domain_nr(rpdev->bus),
440 rpdev->bus->number, rpdev->devfn,
442 list_add(&rperr->list, &einjected);
444 if (einj->cor_status) {
445 if (rperr->root_status & PCI_ERR_ROOT_COR_RCV)
446 rperr->root_status |= PCI_ERR_ROOT_MULTI_COR_RCV;
448 rperr->root_status |= PCI_ERR_ROOT_COR_RCV;
449 rperr->source_id &= 0xffff0000;
450 rperr->source_id |= (einj->bus << 8) | devfn;
452 if (einj->uncor_status) {
453 if (rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV)
454 rperr->root_status |= PCI_ERR_ROOT_MULTI_UNCOR_RCV;
455 if (sever & einj->uncor_status) {
456 rperr->root_status |= PCI_ERR_ROOT_FATAL_RCV;
457 if (!(rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV))
458 rperr->root_status |= PCI_ERR_ROOT_FIRST_FATAL;
460 rperr->root_status |= PCI_ERR_ROOT_NONFATAL_RCV;
461 rperr->root_status |= PCI_ERR_ROOT_UNCOR_RCV;
462 rperr->source_id &= 0x0000ffff;
463 rperr->source_id |= ((einj->bus << 8) | devfn) << 16;
465 spin_unlock_irqrestore(&inject_lock, flags);
467 if (aer_mask_override) {
468 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
470 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
474 ret = pci_bus_set_aer_ops(dev->bus);
477 ret = pci_bus_set_aer_ops(rpdev->bus);
481 if (find_aer_device(rpdev, &edev)) {
482 if (!get_service_data(edev)) {
483 printk(KERN_WARNING "AER service is not initialized\n");
497 static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
498 size_t usize, loff_t *off)
500 struct aer_error_inj einj;
503 if (!capable(CAP_SYS_ADMIN))
505 if (usize < offsetof(struct aer_error_inj, domain) ||
506 usize > sizeof(einj))
509 memset(&einj, 0, sizeof(einj));
510 if (copy_from_user(&einj, ubuf, usize))
513 ret = aer_inject(&einj);
514 return ret ? ret : usize;
517 static const struct file_operations aer_inject_fops = {
518 .write = aer_inject_write,
519 .owner = THIS_MODULE,
520 .llseek = noop_llseek,
523 static struct miscdevice aer_inject_device = {
524 .minor = MISC_DYNAMIC_MINOR,
525 .name = "aer_inject",
526 .fops = &aer_inject_fops,
529 static int __init aer_inject_init(void)
531 return misc_register(&aer_inject_device);
534 static void __exit aer_inject_exit(void)
536 struct aer_error *err, *err_next;
538 struct pci_bus_ops *bus_ops;
540 misc_deregister(&aer_inject_device);
542 while ((bus_ops = pci_bus_ops_pop())) {
543 pci_bus_set_ops(bus_ops->bus, bus_ops->ops);
547 spin_lock_irqsave(&inject_lock, flags);
548 list_for_each_entry_safe(err, err_next, &einjected, list) {
549 list_del(&err->list);
552 spin_unlock_irqrestore(&inject_lock, flags);
555 module_init(aer_inject_init);
556 module_exit(aer_inject_exit);
558 MODULE_DESCRIPTION("PCIe AER software error injector");
559 MODULE_LICENSE("GPL");