2 * drivers/pcmcia/m32r_pcc.c
4 * Device driver for the PCMCIA functionality of M32R.
6 * Copyright (c) 2001, 2002, 2003, 2004
7 * Hiroyuki Kondo, Naoto Sugai, Hayato Fujiwara
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/fcntl.h>
15 #include <linux/string.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/timer.h>
19 #include <linux/ioport.h>
20 #include <linux/delay.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/platform_device.h>
24 #include <linux/bitops.h>
27 #include <asm/system.h>
28 #include <asm/addrspace.h>
30 #include <pcmcia/ss.h>
32 /* XXX: should be moved into asm/irq.h */
38 #define CHAOS_PCC_DEBUG
39 #ifdef CHAOS_PCC_DEBUG
40 static volatile u_short dummy_readbuf;
43 #define PCC_DEBUG_DBEX
46 /* Poll status interval -- 0 means default to interrupt */
47 static int poll_interval = 0;
49 typedef enum pcc_space { as_none = 0, as_comm, as_attr, as_io } pcc_as_t;
51 typedef struct pcc_socket {
53 struct pcmcia_socket socket;
57 u_long base; /* PCC register base */
59 pccard_io_map io_map[MAX_IO_WIN];
60 pccard_mem_map mem_map[MAX_WIN];
63 pcc_as_t current_space;
65 #ifdef CHAOS_PCC_DEBUG
69 struct proc_dir_entry *proc;
73 static int pcc_sockets = 0;
74 static pcc_socket_t socket[M32R_MAX_PCC] = {
78 /*====================================================================*/
80 static unsigned int pcc_get(u_short, unsigned int);
81 static void pcc_set(u_short, unsigned int , unsigned int );
83 static DEFINE_SPINLOCK(pcc_lock);
85 void pcc_iorw(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int wr, int flag)
93 pcc_socket_t *t = &socket[sock];
94 #ifdef CHAOS_PCC_DEBUG
99 spin_lock_irqsave(&pcc_lock, flags);
104 need_ex = (size > 1 && flag == 0) ? PCMOD_DBEX : 0;
105 #ifdef PCC_DEBUG_DBEX
111 * calculate access address
113 addr = t->mapaddr + port - t->ioaddr + KSEG1; /* XXX */
116 * Check current mapping
118 if (t->current_space != as_io || t->last_iodbex != need_ex) {
125 pcc_set(sock, PCCR, 0);
128 * Set mode and io address
130 cbsz = (t->flags & MAP_16BIT) ? 0 : PCMOD_CBSZ;
131 pcc_set(sock, PCMOD, PCMOD_AS_IO | cbsz | need_ex);
132 pcc_set(sock, PCADR, addr & 0x1ff00000);
137 pcc_set(sock, PCCR, 1);
139 #ifdef CHAOS_PCC_DEBUG
141 map_changed = (t->current_space == as_attr && size == 2); /* XXX */
146 t->current_space = as_io;
154 unsigned char *bp = (unsigned char *)buf;
158 dummy_readbuf = readb(addr);
174 unsigned short *bp = (unsigned short *)buf;
176 #ifdef CHAOS_PCC_DEBUG
178 dummy_readbuf = readw(addr);
184 #ifdef PCC_DEBUG_DBEX
186 unsigned char *cp = (unsigned char *)bp;
188 tmp = cp[1] << 8 | cp[0];
198 #ifdef PCC_DEBUG_DBEX
200 unsigned char *cp = (unsigned char *)bp;
204 cp[1] = (tmp >> 8) & 0xff;
214 /* addr is no longer used */
215 if ((addr = pcc_get(sock, PCIRC)) & PCIRC_BWERR) {
216 printk("m32r_pcc: BWERR detected : port 0x%04lx : iosize %dbit\n",
218 pcc_set(sock, PCIRC, addr);
224 t->last_iosize = size;
225 t->last_iodbex = need_ex;
229 spin_unlock_irqrestore(&pcc_lock,flags);
234 void pcc_ioread(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
235 pcc_iorw(sock, port, buf, size, nmemb, 0, flag);
238 void pcc_iowrite(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
239 pcc_iorw(sock, port, buf, size, nmemb, 1, flag);
242 /*====================================================================*/
244 #define IS_REGISTERED 0x2000
245 #define IS_ALIVE 0x8000
247 typedef struct pcc_t {
252 static pcc_t pcc[] = {
253 { "xnux2", 0 }, { "xnux2", 0 },
256 static irqreturn_t pcc_interrupt(int, void *);
258 /*====================================================================*/
260 static struct timer_list poll_timer;
262 static unsigned int pcc_get(u_short sock, unsigned int reg)
264 return inl(socket[sock].base + reg);
268 static void pcc_set(u_short sock, unsigned int reg, unsigned int data)
270 outl(data, socket[sock].base + reg);
273 /*======================================================================
275 See if a card is present, powered up, in IO mode, and already
276 bound to a (non PC Card) Linux driver. We leave these alone.
278 We make an exception for cards that seem to be serial devices.
280 ======================================================================*/
282 static int __init is_alive(u_short sock)
287 stat = pcc_get(sock, PCIRC);
288 f = (stat & (PCIRC_CDIN1 | PCIRC_CDIN2)) >> 16;
290 printk("m32r_pcc: No Card is detected at socket %d : stat = 0x%08x\n",stat,sock);
294 printk("m32r_pcc: Insertion fail (%.8x) at socket %d\n",stat,sock);
296 printk("m32r_pcc: Card is Inserted at socket %d(%.8x)\n",sock,stat);
300 static void add_pcc_socket(ulong base, int irq, ulong mapaddr,
303 pcc_socket_t *t = &socket[pcc_sockets];
307 t->mapaddr = mapaddr;
309 #ifdef CHAOS_PCC_DEBUG
310 t->flags = MAP_16BIT;
314 if (is_alive(pcc_sockets))
315 t->flags |= IS_ALIVE;
319 request_region(t->base, 0x20, "m32r-pcc");
322 printk(KERN_INFO " %s ", pcc[pcc_sockets].name);
323 printk("pcc at 0x%08lx\n", t->base);
325 /* Update socket interrupt information, capabilities */
326 t->socket.features |= (SS_CAP_PCCARD | SS_CAP_STATIC_MAP);
327 t->socket.map_size = M32R_PCC_MAPSIZE;
328 t->socket.io_offset = ioaddr; /* use for io access offset */
329 t->socket.irq_mask = 0;
330 t->socket.pci_irq = 2 + pcc_sockets; /* XXX */
332 request_irq(irq, pcc_interrupt, 0, "m32r-pcc", pcc_interrupt);
340 /*====================================================================*/
342 static irqreturn_t pcc_interrupt(int irq, void *dev)
345 u_int events, active;
348 pr_debug("m32r_pcc: pcc_interrupt(%d)\n", irq);
350 for (j = 0; j < 20; j++) {
352 for (i = 0; i < pcc_sockets; i++) {
353 if ((socket[i].cs_irq != irq) &&
354 (socket[i].socket.pci_irq != irq))
357 irc = pcc_get(i, PCIRC);
359 pr_debug("m32r_pcc: interrupt: socket %d pcirc 0x%02x ",
364 events = (irc) ? SS_DETECT : 0;
365 events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0;
366 pr_debug("m32r_pcc: event 0x%02x\n", events);
369 pcmcia_parse_events(&socket[i].socket, events);
377 printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n");
379 pr_debug("m32r_pcc: interrupt done\n");
381 return IRQ_RETVAL(handled);
382 } /* pcc_interrupt */
384 static void pcc_interrupt_wrapper(u_long data)
386 pcc_interrupt(0, NULL);
387 init_timer(&poll_timer);
388 poll_timer.expires = jiffies + poll_interval;
389 add_timer(&poll_timer);
392 /*====================================================================*/
394 static int _pcc_get_status(u_short sock, u_int *value)
398 status = pcc_get(sock,PCIRC);
399 *value = ((status & PCIRC_CDIN1) && (status & PCIRC_CDIN2))
402 status = pcc_get(sock,PCCR);
405 *value |= (status & PCCR_PCEN) ? SS_READY : 0;
407 *value |= SS_READY; /* XXX: always */
410 status = pcc_get(sock,PCCSIGCR);
411 *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0;
413 pr_debug("m32r_pcc: GetStatus(%d) = %#4.4x\n", sock, *value);
417 /*====================================================================*/
419 static int _pcc_set_socket(u_short sock, socket_state_t *state)
423 pr_debug("m32r_pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
424 "io_irq %d, csc_mask %#2.2x)", sock, state->flags,
425 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
431 if (state->Vcc == 50) {
438 if (state->flags & SS_RESET) {
439 pr_debug("m32r_pcc: :RESET\n");
440 reg |= PCCSIGCR_CRST;
442 if (state->flags & SS_OUTPUT_ENA){
443 pr_debug("m32r_pcc: :OUTPUT_ENA\n");
449 pcc_set(sock,PCCSIGCR,reg);
451 if(state->flags & SS_IOCARD){
452 pr_debug("m32r_pcc: :IOCARD");
454 if (state->flags & SS_PWR_AUTO) {
455 pr_debug("m32r_pcc: :PWR_AUTO");
457 if (state->csc_mask & SS_DETECT)
458 pr_debug("m32r_pcc: :csc-SS_DETECT");
459 if (state->flags & SS_IOCARD) {
460 if (state->csc_mask & SS_STSCHG)
461 pr_debug("m32r_pcc: :STSCHG");
463 if (state->csc_mask & SS_BATDEAD)
464 pr_debug("m32r_pcc: :BATDEAD");
465 if (state->csc_mask & SS_BATWARN)
466 pr_debug("m32r_pcc: :BATWARN");
467 if (state->csc_mask & SS_READY)
468 pr_debug("m32r_pcc: :READY");
470 pr_debug("m32r_pcc: \n");
474 /*====================================================================*/
476 static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
480 pr_debug("m32r_pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
481 "%#llx-%#llx)\n", sock, io->map, io->flags,
482 io->speed, (unsigned long long)io->start,
483 (unsigned long long)io->stop);
489 /*====================================================================*/
491 static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
494 u_char map = mem->map;
497 pcc_socket_t *t = &socket[sock];
498 #ifdef CHAOS_PCC_DEBUG
500 pcc_as_t last = t->current_space;
504 pr_debug("m32r_pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
505 "%#llx, %#x)\n", sock, map, mem->flags,
506 mem->speed, (unsigned long long)mem->static_start,
512 if ((map > MAX_WIN) || (mem->card_start > 0x3ffffff)){
519 if ((mem->flags & MAP_ACTIVE) == 0) {
520 t->current_space = as_none;
527 pcc_set(sock, PCCR, 0);
532 if (mem->flags & MAP_ATTRIB) {
533 mode = PCMOD_AS_ATTRIB | PCMOD_CBSZ;
534 t->current_space = as_attr;
536 mode = 0; /* common memory */
537 t->current_space = as_comm;
539 pcc_set(sock, PCMOD, mode);
544 addr = t->mapaddr + (mem->card_start & M32R_PCC_MAPMASK);
545 pcc_set(sock, PCADR, addr);
547 mem->static_start = addr + mem->card_start;
552 pcc_set(sock, PCCR, 1);
554 #ifdef CHAOS_PCC_DEBUG
556 if (last != as_attr) {
560 dummy_readbuf = *(u_char *)(addr + KSEG1);
568 #if 0 /* driver model ordering issue */
569 /*======================================================================
571 Routines for accessing socket information and register dumps via
574 ======================================================================*/
576 static ssize_t show_info(struct class_device *class_dev, char *buf)
578 pcc_socket_t *s = container_of(class_dev, struct pcc_socket,
581 return sprintf(buf, "type: %s\nbase addr: 0x%08lx\n",
582 pcc[s->type].name, s->base);
585 static ssize_t show_exca(struct class_device *class_dev, char *buf)
592 static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL);
593 static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL);
596 /*====================================================================*/
598 /* this is horribly ugly... proper locking needs to be done here at
600 #define LOCKED(x) do { \
602 unsigned long flags; \
603 spin_lock_irqsave(&pcc_lock, flags); \
605 spin_unlock_irqrestore(&pcc_lock, flags); \
610 static int pcc_get_status(struct pcmcia_socket *s, u_int *value)
612 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
614 if (socket[sock].flags & IS_ALIVE) {
618 LOCKED(_pcc_get_status(sock, value));
621 static int pcc_set_socket(struct pcmcia_socket *s, socket_state_t *state)
623 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
625 if (socket[sock].flags & IS_ALIVE)
628 LOCKED(_pcc_set_socket(sock, state));
631 static int pcc_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
633 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
635 if (socket[sock].flags & IS_ALIVE)
637 LOCKED(_pcc_set_io_map(sock, io));
640 static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
642 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
644 if (socket[sock].flags & IS_ALIVE)
646 LOCKED(_pcc_set_mem_map(sock, mem));
649 static int pcc_init(struct pcmcia_socket *s)
651 pr_debug("m32r_pcc: init call\n");
655 static struct pccard_operations pcc_operations = {
657 .get_status = pcc_get_status,
658 .set_socket = pcc_set_socket,
659 .set_io_map = pcc_set_io_map,
660 .set_mem_map = pcc_set_mem_map,
663 /*====================================================================*/
665 static struct platform_driver pcc_driver = {
668 .owner = THIS_MODULE,
672 static struct platform_device pcc_device = {
677 /*====================================================================*/
679 static int __init init_m32r_pcc(void)
683 ret = platform_driver_register(&pcc_driver);
687 ret = platform_device_register(&pcc_device);
689 platform_driver_unregister(&pcc_driver);
693 printk(KERN_INFO "m32r PCC probe:\n");
697 add_pcc_socket(M32R_PCC0_BASE, PCC0_IRQ, M32R_PCC0_MAPBASE, 0x1000);
699 #ifdef CONFIG_M32RPCC_SLOT2
700 add_pcc_socket(M32R_PCC1_BASE, PCC1_IRQ, M32R_PCC1_MAPBASE, 0x2000);
703 if (pcc_sockets == 0) {
704 printk("socket is not found.\n");
705 platform_device_unregister(&pcc_device);
706 platform_driver_unregister(&pcc_driver);
710 /* Set up interrupt handler(s) */
712 for (i = 0 ; i < pcc_sockets ; i++) {
713 socket[i].socket.dev.parent = &pcc_device.dev;
714 socket[i].socket.ops = &pcc_operations;
715 socket[i].socket.resource_ops = &pccard_static_ops;
716 socket[i].socket.owner = THIS_MODULE;
717 socket[i].number = i;
718 ret = pcmcia_register_socket(&socket[i].socket);
720 socket[i].flags |= IS_REGISTERED;
722 #if 0 /* driver model ordering issue */
723 class_device_create_file(&socket[i].socket.dev,
724 &class_device_attr_info);
725 class_device_create_file(&socket[i].socket.dev,
726 &class_device_attr_exca);
730 /* Finally, schedule a polling interrupt */
731 if (poll_interval != 0) {
732 poll_timer.function = pcc_interrupt_wrapper;
734 init_timer(&poll_timer);
735 poll_timer.expires = jiffies + poll_interval;
736 add_timer(&poll_timer);
740 } /* init_m32r_pcc */
742 static void __exit exit_m32r_pcc(void)
746 for (i = 0; i < pcc_sockets; i++)
747 if (socket[i].flags & IS_REGISTERED)
748 pcmcia_unregister_socket(&socket[i].socket);
750 platform_device_unregister(&pcc_device);
751 if (poll_interval != 0)
752 del_timer_sync(&poll_timer);
754 platform_driver_unregister(&pcc_driver);
755 } /* exit_m32r_pcc */
757 module_init(init_m32r_pcc);
758 module_exit(exit_m32r_pcc);
759 MODULE_LICENSE("Dual MPL/GPL");
760 /*====================================================================*/