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[karo-tx-linux.git] / drivers / phy / phy-rcar-gen3-usb2.c
1 /*
2  * Renesas R-Car Gen3 for USB2.0 PHY driver
3  *
4  * Copyright (C) 2015 Renesas Electronics Corporation
5  *
6  * This is based on the phy-rcar-gen2 driver:
7  * Copyright (C) 2014 Renesas Solutions Corp.
8  * Copyright (C) 2014 Cogent Embedded, Inc.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14
15 #include <linux/extcon.h>
16 #include <linux/interrupt.h>
17 #include <linux/io.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_address.h>
21 #include <linux/phy/phy.h>
22 #include <linux/platform_device.h>
23 #include <linux/regulator/consumer.h>
24
25 /******* USB2.0 Host registers (original offset is +0x200) *******/
26 #define USB2_INT_ENABLE         0x000
27 #define USB2_USBCTR             0x00c
28 #define USB2_SPD_RSM_TIMSET     0x10c
29 #define USB2_OC_TIMSET          0x110
30 #define USB2_COMMCTRL           0x600
31 #define USB2_OBINTSTA           0x604
32 #define USB2_OBINTEN            0x608
33 #define USB2_VBCTRL             0x60c
34 #define USB2_LINECTRL1          0x610
35 #define USB2_ADPCTRL            0x630
36
37 /* INT_ENABLE */
38 #define USB2_INT_ENABLE_UCOM_INTEN      BIT(3)
39 #define USB2_INT_ENABLE_USBH_INTB_EN    BIT(2)
40 #define USB2_INT_ENABLE_USBH_INTA_EN    BIT(1)
41 #define USB2_INT_ENABLE_INIT            (USB2_INT_ENABLE_UCOM_INTEN | \
42                                          USB2_INT_ENABLE_USBH_INTB_EN | \
43                                          USB2_INT_ENABLE_USBH_INTA_EN)
44
45 /* USBCTR */
46 #define USB2_USBCTR_DIRPD       BIT(2)
47 #define USB2_USBCTR_PLL_RST     BIT(1)
48
49 /* SPD_RSM_TIMSET */
50 #define USB2_SPD_RSM_TIMSET_INIT        0x014e029b
51
52 /* OC_TIMSET */
53 #define USB2_OC_TIMSET_INIT             0x000209ab
54
55 /* COMMCTRL */
56 #define USB2_COMMCTRL_OTG_PERI          BIT(31) /* 1 = Peripheral mode */
57
58 /* OBINTSTA and OBINTEN */
59 #define USB2_OBINT_SESSVLDCHG           BIT(12)
60 #define USB2_OBINT_IDDIGCHG             BIT(11)
61 #define USB2_OBINT_BITS                 (USB2_OBINT_SESSVLDCHG | \
62                                          USB2_OBINT_IDDIGCHG)
63
64 /* VBCTRL */
65 #define USB2_VBCTRL_DRVVBUSSEL          BIT(8)
66
67 /* LINECTRL1 */
68 #define USB2_LINECTRL1_DPRPD_EN         BIT(19)
69 #define USB2_LINECTRL1_DP_RPD           BIT(18)
70 #define USB2_LINECTRL1_DMRPD_EN         BIT(17)
71 #define USB2_LINECTRL1_DM_RPD           BIT(16)
72
73 /* ADPCTRL */
74 #define USB2_ADPCTRL_OTGSESSVLD         BIT(20)
75 #define USB2_ADPCTRL_IDDIG              BIT(19)
76 #define USB2_ADPCTRL_IDPULLUP           BIT(5)  /* 1 = ID sampling is enabled */
77 #define USB2_ADPCTRL_DRVVBUS            BIT(4)
78
79 struct rcar_gen3_chan {
80         void __iomem *base;
81         struct extcon_dev *extcon;
82         struct phy *phy;
83         struct regulator *vbus;
84         bool has_otg;
85 };
86
87 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
88 {
89         void __iomem *usb2_base = ch->base;
90         u32 val = readl(usb2_base + USB2_COMMCTRL);
91
92         dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
93         if (host)
94                 val &= ~USB2_COMMCTRL_OTG_PERI;
95         else
96                 val |= USB2_COMMCTRL_OTG_PERI;
97         writel(val, usb2_base + USB2_COMMCTRL);
98 }
99
100 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
101 {
102         void __iomem *usb2_base = ch->base;
103         u32 val = readl(usb2_base + USB2_LINECTRL1);
104
105         dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
106         val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
107         if (dp)
108                 val |= USB2_LINECTRL1_DP_RPD;
109         if (dm)
110                 val |= USB2_LINECTRL1_DM_RPD;
111         writel(val, usb2_base + USB2_LINECTRL1);
112 }
113
114 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
115 {
116         void __iomem *usb2_base = ch->base;
117         u32 val = readl(usb2_base + USB2_ADPCTRL);
118
119         dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
120         if (vbus)
121                 val |= USB2_ADPCTRL_DRVVBUS;
122         else
123                 val &= ~USB2_ADPCTRL_DRVVBUS;
124         writel(val, usb2_base + USB2_ADPCTRL);
125 }
126
127 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
128 {
129         rcar_gen3_set_linectrl(ch, 1, 1);
130         rcar_gen3_set_host_mode(ch, 1);
131         rcar_gen3_enable_vbus_ctrl(ch, 1);
132
133         extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, true);
134         extcon_set_cable_state_(ch->extcon, EXTCON_USB, false);
135 }
136
137 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
138 {
139         rcar_gen3_set_linectrl(ch, 0, 1);
140         rcar_gen3_set_host_mode(ch, 0);
141         rcar_gen3_enable_vbus_ctrl(ch, 0);
142
143         extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, false);
144         extcon_set_cable_state_(ch->extcon, EXTCON_USB, true);
145 }
146
147 static bool rcar_gen3_check_vbus(struct rcar_gen3_chan *ch)
148 {
149         return !!(readl(ch->base + USB2_ADPCTRL) &
150                   USB2_ADPCTRL_OTGSESSVLD);
151 }
152
153 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
154 {
155         return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
156 }
157
158 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
159 {
160         bool is_host = true;
161
162         /* B-device? */
163         if (rcar_gen3_check_id(ch) && rcar_gen3_check_vbus(ch))
164                 is_host = false;
165
166         if (is_host)
167                 rcar_gen3_init_for_host(ch);
168         else
169                 rcar_gen3_init_for_peri(ch);
170 }
171
172 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
173 {
174         void __iomem *usb2_base = ch->base;
175         u32 val;
176
177         val = readl(usb2_base + USB2_VBCTRL);
178         writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
179         writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
180         val = readl(usb2_base + USB2_OBINTEN);
181         writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
182         val = readl(usb2_base + USB2_ADPCTRL);
183         writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
184         val = readl(usb2_base + USB2_LINECTRL1);
185         rcar_gen3_set_linectrl(ch, 0, 0);
186         writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
187                usb2_base + USB2_LINECTRL1);
188
189         rcar_gen3_device_recognition(ch);
190 }
191
192 static int rcar_gen3_phy_usb2_init(struct phy *p)
193 {
194         struct rcar_gen3_chan *channel = phy_get_drvdata(p);
195         void __iomem *usb2_base = channel->base;
196
197         /* Initialize USB2 part */
198         writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
199         writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
200         writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
201
202         /* Initialize otg part */
203         if (channel->has_otg)
204                 rcar_gen3_init_otg(channel);
205
206         return 0;
207 }
208
209 static int rcar_gen3_phy_usb2_exit(struct phy *p)
210 {
211         struct rcar_gen3_chan *channel = phy_get_drvdata(p);
212
213         writel(0, channel->base + USB2_INT_ENABLE);
214
215         return 0;
216 }
217
218 static int rcar_gen3_phy_usb2_power_on(struct phy *p)
219 {
220         struct rcar_gen3_chan *channel = phy_get_drvdata(p);
221         void __iomem *usb2_base = channel->base;
222         u32 val;
223         int ret;
224
225         if (channel->vbus) {
226                 ret = regulator_enable(channel->vbus);
227                 if (ret)
228                         return ret;
229         }
230
231         val = readl(usb2_base + USB2_USBCTR);
232         val |= USB2_USBCTR_PLL_RST;
233         writel(val, usb2_base + USB2_USBCTR);
234         val &= ~USB2_USBCTR_PLL_RST;
235         writel(val, usb2_base + USB2_USBCTR);
236
237         return 0;
238 }
239
240 static int rcar_gen3_phy_usb2_power_off(struct phy *p)
241 {
242         struct rcar_gen3_chan *channel = phy_get_drvdata(p);
243         int ret = 0;
244
245         if (channel->vbus)
246                 ret = regulator_disable(channel->vbus);
247
248         return ret;
249 }
250
251 static struct phy_ops rcar_gen3_phy_usb2_ops = {
252         .init           = rcar_gen3_phy_usb2_init,
253         .exit           = rcar_gen3_phy_usb2_exit,
254         .power_on       = rcar_gen3_phy_usb2_power_on,
255         .power_off      = rcar_gen3_phy_usb2_power_off,
256         .owner          = THIS_MODULE,
257 };
258
259 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
260 {
261         struct rcar_gen3_chan *ch = _ch;
262         void __iomem *usb2_base = ch->base;
263         u32 status = readl(usb2_base + USB2_OBINTSTA);
264         irqreturn_t ret = IRQ_NONE;
265
266         if (status & USB2_OBINT_BITS) {
267                 dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
268                 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
269                 rcar_gen3_device_recognition(ch);
270                 ret = IRQ_HANDLED;
271         }
272
273         return ret;
274 }
275
276 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
277         { .compatible = "renesas,usb2-phy-r8a7795" },
278         { .compatible = "renesas,rcar-gen3-usb2-phy" },
279         { }
280 };
281 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
282
283 static const unsigned int rcar_gen3_phy_cable[] = {
284         EXTCON_USB,
285         EXTCON_USB_HOST,
286         EXTCON_NONE,
287 };
288
289 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
290 {
291         struct device *dev = &pdev->dev;
292         struct rcar_gen3_chan *channel;
293         struct phy_provider *provider;
294         struct resource *res;
295         int irq;
296
297         if (!dev->of_node) {
298                 dev_err(dev, "This driver needs device tree\n");
299                 return -EINVAL;
300         }
301
302         channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
303         if (!channel)
304                 return -ENOMEM;
305
306         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
307         channel->base = devm_ioremap_resource(dev, res);
308         if (IS_ERR(channel->base))
309                 return PTR_ERR(channel->base);
310
311         /* call request_irq for OTG */
312         irq = platform_get_irq(pdev, 0);
313         if (irq >= 0) {
314                 int ret;
315
316                 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
317                                        IRQF_SHARED, dev_name(dev), channel);
318                 if (irq < 0)
319                         dev_err(dev, "No irq handler (%d)\n", irq);
320                 channel->has_otg = true;
321                 channel->extcon = devm_extcon_dev_allocate(dev,
322                                                         rcar_gen3_phy_cable);
323                 if (IS_ERR(channel->extcon))
324                         return PTR_ERR(channel->extcon);
325
326                 ret = devm_extcon_dev_register(dev, channel->extcon);
327                 if (ret < 0) {
328                         dev_err(dev, "Failed to register extcon\n");
329                         return ret;
330                 }
331         }
332
333         /* devm_phy_create() will call pm_runtime_enable(dev); */
334         channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
335         if (IS_ERR(channel->phy)) {
336                 dev_err(dev, "Failed to create USB2 PHY\n");
337                 return PTR_ERR(channel->phy);
338         }
339
340         channel->vbus = devm_regulator_get_optional(dev, "vbus");
341         if (IS_ERR(channel->vbus)) {
342                 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER)
343                         return PTR_ERR(channel->vbus);
344                 channel->vbus = NULL;
345         }
346
347         phy_set_drvdata(channel->phy, channel);
348
349         provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
350         if (IS_ERR(provider))
351                 dev_err(dev, "Failed to register PHY provider\n");
352
353         return PTR_ERR_OR_ZERO(provider);
354 }
355
356 static struct platform_driver rcar_gen3_phy_usb2_driver = {
357         .driver = {
358                 .name           = "phy_rcar_gen3_usb2",
359                 .of_match_table = rcar_gen3_phy_usb2_match_table,
360         },
361         .probe  = rcar_gen3_phy_usb2_probe,
362 };
363 module_platform_driver(rcar_gen3_phy_usb2_driver);
364
365 MODULE_LICENSE("GPL v2");
366 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
367 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");