2 * Marvell 37xx SoC pinctrl driver
4 * Copyright (C) 2017 Marvell
6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2 or later. This program is licensed "as is"
10 * without any warranty of any kind, whether express or implied.
13 #include <linux/gpio/driver.h>
14 #include <linux/mfd/syscon.h>
16 #include <linux/of_device.h>
17 #include <linux/pinctrl/pinconf-generic.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
23 #include <linux/slab.h>
25 #include "../pinctrl-utils.h"
28 #define INPUT_VAL 0x10
29 #define OUTPUT_VAL 0x18
30 #define OUTPUT_CTL 0x20
31 #define SELECTION 0x30
34 #define GPIO_PER_REG 32
37 * struct armada_37xx_pin_group: represents group of pins of a pinmux function.
38 * The pins of a pinmux groups are composed of one or two groups of contiguous
40 * @name: Name of the pin group, used to lookup the group.
41 * @start_pins: Index of the first pin of the main range of pins belonging to
43 * @npins: Number of pins included in the first range
44 * @reg_mask: Bit mask matching the group in the selection register
45 * @extra_pins: Index of the first pin of the optional second range of pins
46 * belonging to the group
47 * @npins: Number of pins included in the second optional range
48 * @funcs: A list of pinmux functions that can be selected for this group.
49 * @pins: List of the pins included in the group
51 struct armada_37xx_pin_group {
53 unsigned int start_pin;
57 unsigned int extra_pin;
58 unsigned int extra_npins;
59 const char *funcs[NB_FUNCS];
63 struct armada_37xx_pin_data {
66 struct armada_37xx_pin_group *groups;
70 struct armada_37xx_pmx_func {
76 struct armada_37xx_pinctrl {
77 struct regmap *regmap;
78 const struct armada_37xx_pin_data *data;
80 struct gpio_chip gpio_chip;
81 struct pinctrl_desc pctl;
82 struct pinctrl_dev *pctl_dev;
83 struct armada_37xx_pin_group *groups;
85 struct armada_37xx_pmx_func *funcs;
89 #define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \
92 .start_pin = _start, \
96 .funcs = {_func1, _func2} \
99 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \
102 .start_pin = _start, \
106 .funcs = {_func1, "gpio"} \
109 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \
112 .start_pin = _start, \
115 .val = {_val1, _val2}, \
116 .funcs = {_func1, "gpio"} \
119 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \
123 .start_pin = _start, \
127 .extra_pin = _start2, \
128 .extra_npins = _nr2, \
129 .funcs = {_f1, _f2} \
132 static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
133 PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"),
134 PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"),
135 PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"),
136 PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"),
137 PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
138 PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
139 PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
140 PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
141 PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
142 PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
143 PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
144 PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
145 PIN_GRP_GPIO_2("spi_cs2", 18, 1, BIT(13) | BIT(19), 0, BIT(13), "spi"),
146 PIN_GRP_GPIO_2("spi_cs3", 19, 1, BIT(14) | BIT(19), 0, BIT(14), "spi"),
147 PIN_GRP_GPIO("onewire", 4, 1, BIT(16), "onewire"),
148 PIN_GRP_GPIO("uart1", 25, 2, BIT(17), "uart"),
149 PIN_GRP_GPIO("spi_quad", 15, 2, BIT(18), "spi"),
150 PIN_GRP_EXTRA("uart2", 9, 2, BIT(13) | BIT(14) | BIT(19),
151 BIT(13) | BIT(14), BIT(19), 18, 2, "gpio", "uart"),
152 PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"),
153 PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"),
154 PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"),
155 PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"),
159 static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
160 PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),
161 PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
162 PIN_GRP_GPIO("sdio_sb", 24, 5, BIT(2), "sdio"),
163 PIN_GRP_EXTRA("rgmii", 6, 14, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"),
164 PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
165 PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
166 PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
167 PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
168 PIN_GRP("mii_col", 23, 1, BIT(8), "mii", "mii_err"),
171 const struct armada_37xx_pin_data armada_37xx_pin_nb = {
174 .groups = armada_37xx_nb_groups,
175 .ngroups = ARRAY_SIZE(armada_37xx_nb_groups),
178 const struct armada_37xx_pin_data armada_37xx_pin_sb = {
181 .groups = armada_37xx_sb_groups,
182 .ngroups = ARRAY_SIZE(armada_37xx_sb_groups),
185 static inline void armada_37xx_update_reg(unsigned int *reg,
188 /* We never have more than 2 registers */
189 if (offset >= GPIO_PER_REG) {
190 offset -= GPIO_PER_REG;
195 static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp,
200 for (f = 0; f < NB_FUNCS; f++)
201 if (!strcmp(grp->funcs[f], func))
207 static struct armada_37xx_pin_group *armada_37xx_find_next_grp_by_pin(
208 struct armada_37xx_pinctrl *info, int pin, int *grp)
210 while (*grp < info->ngroups) {
211 struct armada_37xx_pin_group *group = &info->groups[*grp];
215 for (j = 0; j < (group->npins + group->extra_npins); j++)
216 if (group->pins[j] == pin)
222 static int armada_37xx_pin_config_group_get(struct pinctrl_dev *pctldev,
223 unsigned int selector, unsigned long *config)
228 static int armada_37xx_pin_config_group_set(struct pinctrl_dev *pctldev,
229 unsigned int selector, unsigned long *configs,
230 unsigned int num_configs)
235 static struct pinconf_ops armada_37xx_pinconf_ops = {
237 .pin_config_group_get = armada_37xx_pin_config_group_get,
238 .pin_config_group_set = armada_37xx_pin_config_group_set,
241 static int armada_37xx_get_groups_count(struct pinctrl_dev *pctldev)
243 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
245 return info->ngroups;
248 static const char *armada_37xx_get_group_name(struct pinctrl_dev *pctldev,
251 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
253 return info->groups[group].name;
256 static int armada_37xx_get_group_pins(struct pinctrl_dev *pctldev,
257 unsigned int selector,
258 const unsigned int **pins,
261 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
263 if (selector >= info->ngroups)
266 *pins = info->groups[selector].pins;
267 *npins = info->groups[selector].npins +
268 info->groups[selector].extra_npins;
273 static const struct pinctrl_ops armada_37xx_pctrl_ops = {
274 .get_groups_count = armada_37xx_get_groups_count,
275 .get_group_name = armada_37xx_get_group_name,
276 .get_group_pins = armada_37xx_get_group_pins,
277 .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
278 .dt_free_map = pinctrl_utils_free_map,
282 * Pinmux_ops handling
285 static int armada_37xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
287 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
292 static const char *armada_37xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
293 unsigned int selector)
295 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
297 return info->funcs[selector].name;
300 static int armada_37xx_pmx_get_groups(struct pinctrl_dev *pctldev,
301 unsigned int selector,
302 const char * const **groups,
303 unsigned int * const num_groups)
305 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
307 *groups = info->funcs[selector].groups;
308 *num_groups = info->funcs[selector].ngroups;
313 static int armada_37xx_pmx_set_by_name(struct pinctrl_dev *pctldev,
315 struct armada_37xx_pin_group *grp)
317 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
318 unsigned int reg = SELECTION;
319 unsigned int mask = grp->reg_mask;
322 dev_dbg(info->dev, "enable function %s group %s\n",
325 func = armada_37xx_get_func_reg(grp, name);
330 val = grp->val[func];
332 regmap_update_bits(info->regmap, reg, mask, val);
337 static int armada_37xx_pmx_set(struct pinctrl_dev *pctldev,
338 unsigned int selector,
342 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
343 struct armada_37xx_pin_group *grp = &info->groups[group];
344 const char *name = info->funcs[selector].name;
346 return armada_37xx_pmx_set_by_name(pctldev, name, grp);
349 static int armada_37xx_gpio_direction_input(struct gpio_chip *chip,
352 struct armada_37xx_pinctrl *info = gpiochip_get_data(chip);
353 unsigned int reg = OUTPUT_EN;
356 armada_37xx_update_reg(®, offset);
359 return regmap_update_bits(info->regmap, reg, mask, 0);
362 static int armada_37xx_gpio_get_direction(struct gpio_chip *chip,
365 struct armada_37xx_pinctrl *info = gpiochip_get_data(chip);
366 unsigned int reg = OUTPUT_EN;
367 unsigned int val, mask;
369 armada_37xx_update_reg(®, offset);
371 regmap_read(info->regmap, reg, &val);
373 return !(val & mask);
376 static int armada_37xx_gpio_direction_output(struct gpio_chip *chip,
377 unsigned int offset, int value)
379 struct armada_37xx_pinctrl *info = gpiochip_get_data(chip);
380 unsigned int reg = OUTPUT_EN;
383 armada_37xx_update_reg(®, offset);
386 return regmap_update_bits(info->regmap, reg, mask, mask);
389 static int armada_37xx_gpio_get(struct gpio_chip *chip, unsigned int offset)
391 struct armada_37xx_pinctrl *info = gpiochip_get_data(chip);
392 unsigned int reg = INPUT_VAL;
393 unsigned int val, mask;
395 armada_37xx_update_reg(®, offset);
398 regmap_read(info->regmap, reg, &val);
400 return (val & mask) != 0;
403 static void armada_37xx_gpio_set(struct gpio_chip *chip, unsigned int offset,
406 struct armada_37xx_pinctrl *info = gpiochip_get_data(chip);
407 unsigned int reg = OUTPUT_VAL;
408 unsigned int mask, val;
410 armada_37xx_update_reg(®, offset);
412 val = value ? mask : 0;
414 regmap_update_bits(info->regmap, reg, mask, val);
417 static int armada_37xx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
418 struct pinctrl_gpio_range *range,
419 unsigned int offset, bool input)
421 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
422 struct gpio_chip *chip = range->gc;
424 dev_dbg(info->dev, "gpio_direction for pin %u as %s-%d to %s\n",
425 offset, range->name, offset, input ? "input" : "output");
428 armada_37xx_gpio_direction_input(chip, offset);
430 armada_37xx_gpio_direction_output(chip, offset, 0);
435 static int armada_37xx_gpio_request_enable(struct pinctrl_dev *pctldev,
436 struct pinctrl_gpio_range *range,
439 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
440 struct armada_37xx_pin_group *group;
443 dev_dbg(info->dev, "requesting gpio %d\n", offset);
445 while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp)))
446 armada_37xx_pmx_set_by_name(pctldev, "gpio", group);
451 static const struct pinmux_ops armada_37xx_pmx_ops = {
452 .get_functions_count = armada_37xx_pmx_get_funcs_count,
453 .get_function_name = armada_37xx_pmx_get_func_name,
454 .get_function_groups = armada_37xx_pmx_get_groups,
455 .set_mux = armada_37xx_pmx_set,
456 .gpio_request_enable = armada_37xx_gpio_request_enable,
457 .gpio_set_direction = armada_37xx_pmx_gpio_set_direction,
460 static const struct gpio_chip armada_37xx_gpiolib_chip = {
461 .request = gpiochip_generic_request,
462 .free = gpiochip_generic_free,
463 .set = armada_37xx_gpio_set,
464 .get = armada_37xx_gpio_get,
465 .get_direction = armada_37xx_gpio_get_direction,
466 .direction_input = armada_37xx_gpio_direction_input,
467 .direction_output = armada_37xx_gpio_direction_output,
468 .owner = THIS_MODULE,
471 static int armada_37xx_gpiochip_register(struct platform_device *pdev,
472 struct armada_37xx_pinctrl *info)
474 struct device_node *np;
475 struct gpio_chip *gc;
478 for_each_child_of_node(info->dev->of_node, np) {
479 if (of_find_property(np, "gpio-controller", NULL)) {
487 info->gpio_chip = armada_37xx_gpiolib_chip;
489 gc = &info->gpio_chip;
490 gc->ngpio = info->data->nr_pins;
491 gc->parent = &pdev->dev;
494 gc->label = info->data->name;
496 ret = devm_gpiochip_add_data(&pdev->dev, gc, info);
504 * armada_37xx_add_function() - Add a new function to the list
505 * @funcs: array of function to add the new one
506 * @funcsize: size of the remaining space for the function
507 * @name: name of the function to add
509 * If it is a new function then create it by adding its name else
510 * increment the number of group associated to this function.
512 static int armada_37xx_add_function(struct armada_37xx_pmx_func *funcs,
513 int *funcsize, const char *name)
520 while (funcs->ngroups) {
521 /* function already there */
522 if (strcmp(funcs->name, name) == 0) {
531 /* append new unique function */
540 * armada_37xx_fill_group() - complete the group array
541 * @info: info driver instance
543 * Based on the data available from the armada_37xx_pin_group array
544 * completes the last member of the struct for each function: the list
545 * of the groups associated to this function.
548 static int armada_37xx_fill_group(struct armada_37xx_pinctrl *info)
550 int n, num = 0, funcsize = info->data->nr_pins;
552 for (n = 0; n < info->ngroups; n++) {
553 struct armada_37xx_pin_group *grp = &info->groups[n];
556 grp->pins = devm_kzalloc(info->dev,
557 (grp->npins + grp->extra_npins) *
558 sizeof(*grp->pins), GFP_KERNEL);
562 for (i = 0; i < grp->npins; i++)
563 grp->pins[i] = grp->start_pin + i;
565 for (j = 0; j < grp->extra_npins; j++)
566 grp->pins[i+j] = grp->extra_pin + j;
568 for (f = 0; f < NB_FUNCS; f++) {
570 /* check for unique functions and count groups */
571 ret = armada_37xx_add_function(info->funcs, &funcsize,
573 if (ret == -EOVERFLOW)
575 "More functions than pins(%d)\n",
576 info->data->nr_pins);
589 * armada_37xx_fill_funcs() - complete the funcs array
590 * @info: info driver instance
592 * Based on the data available from the armada_37xx_pin_group array
593 * completes the last two member of the struct for each group:
594 * - the list of the pins included in the group
595 * - the list of pinmux functions that can be selected for this group
598 static int armada_37xx_fill_func(struct armada_37xx_pinctrl *info)
600 struct armada_37xx_pmx_func *funcs = info->funcs;
603 for (n = 0; n < info->nfuncs; n++) {
604 const char *name = funcs[n].name;
608 funcs[n].groups = devm_kzalloc(info->dev, funcs[n].ngroups *
609 sizeof(*(funcs[n].groups)),
611 if (!funcs[n].groups)
614 groups = funcs[n].groups;
616 for (g = 0; g < info->ngroups; g++) {
617 struct armada_37xx_pin_group *gp = &info->groups[g];
620 for (f = 0; f < NB_FUNCS; f++) {
621 if (strcmp(gp->funcs[f], name) == 0) {
631 static int armada_37xx_pinctrl_register(struct platform_device *pdev,
632 struct armada_37xx_pinctrl *info)
634 const struct armada_37xx_pin_data *pin_data = info->data;
635 struct pinctrl_desc *ctrldesc = &info->pctl;
636 struct pinctrl_pin_desc *pindesc, *pdesc;
639 info->groups = pin_data->groups;
640 info->ngroups = pin_data->ngroups;
642 ctrldesc->name = "armada_37xx-pinctrl";
643 ctrldesc->owner = THIS_MODULE;
644 ctrldesc->pctlops = &armada_37xx_pctrl_ops;
645 ctrldesc->pmxops = &armada_37xx_pmx_ops;
646 ctrldesc->confops = &armada_37xx_pinconf_ops;
648 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
649 pin_data->nr_pins, GFP_KERNEL);
653 ctrldesc->pins = pindesc;
654 ctrldesc->npins = pin_data->nr_pins;
657 for (pin = 0; pin < pin_data->nr_pins; pin++) {
659 pdesc->name = kasprintf(GFP_KERNEL, "%s-%d",
660 pin_data->name, pin);
665 * we allocate functions for number of pins and hope there are
666 * fewer unique functions than pins available
668 info->funcs = devm_kzalloc(&pdev->dev, pin_data->nr_pins *
669 sizeof(struct armada_37xx_pmx_func), GFP_KERNEL);
674 ret = armada_37xx_fill_group(info);
678 ret = armada_37xx_fill_func(info);
682 info->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc, info);
683 if (IS_ERR(info->pctl_dev)) {
684 dev_err(&pdev->dev, "could not register pinctrl driver\n");
685 return PTR_ERR(info->pctl_dev);
691 static const struct of_device_id armada_37xx_pinctrl_of_match[] = {
693 .compatible = "marvell,armada3710-sb-pinctrl",
694 .data = (void *)&armada_37xx_pin_sb,
697 .compatible = "marvell,armada3710-nb-pinctrl",
698 .data = (void *)&armada_37xx_pin_nb,
703 static int __init armada_37xx_pinctrl_probe(struct platform_device *pdev)
705 struct armada_37xx_pinctrl *info;
706 struct device *dev = &pdev->dev;
707 struct device_node *np = dev->of_node;
708 struct regmap *regmap;
711 info = devm_kzalloc(dev, sizeof(struct armada_37xx_pinctrl),
718 regmap = syscon_node_to_regmap(np);
719 if (IS_ERR(regmap)) {
720 dev_err(&pdev->dev, "cannot get regmap\n");
721 return PTR_ERR(regmap);
723 info->regmap = regmap;
725 info->data = of_device_get_match_data(dev);
727 ret = armada_37xx_pinctrl_register(pdev, info);
731 ret = armada_37xx_gpiochip_register(pdev, info);
735 platform_set_drvdata(pdev, info);
740 static struct platform_driver armada_37xx_pinctrl_driver = {
742 .name = "armada-37xx-pinctrl",
743 .of_match_table = armada_37xx_pinctrl_of_match,
747 builtin_platform_driver_probe(armada_37xx_pinctrl_driver,
748 armada_37xx_pinctrl_probe);