2 * Marvell 37xx SoC pinctrl driver
4 * Copyright (C) 2017 Marvell
6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2 or later. This program is licensed "as is"
10 * without any warranty of any kind, whether express or implied.
13 #include <linux/mfd/syscon.h>
15 #include <linux/of_device.h>
16 #include <linux/pinctrl/pinconf-generic.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinctrl.h>
19 #include <linux/pinctrl/pinmux.h>
20 #include <linux/platform_device.h>
21 #include <linux/regmap.h>
22 #include <linux/slab.h>
24 #include "../pinctrl-utils.h"
27 #define OUTPUT_CTL 0x20
28 #define SELECTION 0x30
31 #define GPIO_PER_REG 32
34 * struct armada_37xx_pin_group: represents group of pins of a pinmux function.
35 * The pins of a pinmux groups are composed of one or two groups of contiguous
37 * @name: Name of the pin group, used to lookup the group.
38 * @start_pins: Index of the first pin of the main range of pins belonging to
40 * @npins: Number of pins included in the first range
41 * @reg_mask: Bit mask matching the group in the selection register
42 * @extra_pins: Index of the first pin of the optional second range of pins
43 * belonging to the group
44 * @npins: Number of pins included in the second optional range
45 * @funcs: A list of pinmux functions that can be selected for this group.
46 * @pins: List of the pins included in the group
48 struct armada_37xx_pin_group {
50 unsigned int start_pin;
54 unsigned int extra_pin;
55 unsigned int extra_npins;
56 const char *funcs[NB_FUNCS];
60 struct armada_37xx_pin_data {
63 struct armada_37xx_pin_group *groups;
67 struct armada_37xx_pmx_func {
73 struct armada_37xx_pinctrl {
74 struct regmap *regmap;
75 const struct armada_37xx_pin_data *data;
77 struct pinctrl_desc pctl;
78 struct pinctrl_dev *pctl_dev;
79 struct armada_37xx_pin_group *groups;
81 struct armada_37xx_pmx_func *funcs;
85 #define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \
88 .start_pin = _start, \
92 .funcs = {_func1, _func2} \
95 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \
98 .start_pin = _start, \
102 .funcs = {_func1, "gpio"} \
105 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \
108 .start_pin = _start, \
111 .val = {_val1, _val2}, \
112 .funcs = {_func1, "gpio"} \
115 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \
119 .start_pin = _start, \
123 .extra_pin = _start2, \
124 .extra_npins = _nr2, \
125 .funcs = {_f1, _f2} \
128 static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
129 PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"),
130 PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"),
131 PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"),
132 PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"),
133 PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
134 PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
135 PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
136 PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
137 PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
138 PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
139 PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
140 PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
141 PIN_GRP_GPIO_2("spi_cs2", 18, 1, BIT(13) | BIT(19), 0, BIT(13), "spi"),
142 PIN_GRP_GPIO_2("spi_cs3", 19, 1, BIT(14) | BIT(19), 0, BIT(14), "spi"),
143 PIN_GRP_GPIO("onewire", 4, 1, BIT(16), "onewire"),
144 PIN_GRP_GPIO("uart1", 25, 2, BIT(17), "uart"),
145 PIN_GRP_GPIO("spi_quad", 15, 2, BIT(18), "spi"),
146 PIN_GRP_EXTRA("uart2", 9, 2, BIT(13) | BIT(14) | BIT(19),
147 BIT(13) | BIT(14), BIT(19), 18, 2, "gpio", "uart"),
148 PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"),
149 PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"),
150 PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"),
151 PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"),
155 static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
156 PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),
157 PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
158 PIN_GRP_GPIO("sdio_sb", 24, 5, BIT(2), "sdio"),
159 PIN_GRP_EXTRA("rgmii", 6, 14, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"),
160 PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
161 PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
162 PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
163 PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
164 PIN_GRP("mii_col", 23, 1, BIT(8), "mii", "mii_err"),
167 const struct armada_37xx_pin_data armada_37xx_pin_nb = {
170 .groups = armada_37xx_nb_groups,
171 .ngroups = ARRAY_SIZE(armada_37xx_nb_groups),
174 const struct armada_37xx_pin_data armada_37xx_pin_sb = {
177 .groups = armada_37xx_sb_groups,
178 .ngroups = ARRAY_SIZE(armada_37xx_sb_groups),
181 static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp,
186 for (f = 0; f < NB_FUNCS; f++)
187 if (!strcmp(grp->funcs[f], func))
193 static struct armada_37xx_pin_group *armada_37xx_find_next_grp_by_pin(
194 struct armada_37xx_pinctrl *info, int pin, int *grp)
196 while (*grp < info->ngroups) {
197 struct armada_37xx_pin_group *group = &info->groups[*grp];
201 for (j = 0; j < (group->npins + group->extra_npins); j++)
202 if (group->pins[j] == pin)
208 static int armada_37xx_pin_config_group_get(struct pinctrl_dev *pctldev,
209 unsigned int selector, unsigned long *config)
214 static int armada_37xx_pin_config_group_set(struct pinctrl_dev *pctldev,
215 unsigned int selector, unsigned long *configs,
216 unsigned int num_configs)
221 static struct pinconf_ops armada_37xx_pinconf_ops = {
223 .pin_config_group_get = armada_37xx_pin_config_group_get,
224 .pin_config_group_set = armada_37xx_pin_config_group_set,
227 static int armada_37xx_get_groups_count(struct pinctrl_dev *pctldev)
229 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
231 return info->ngroups;
234 static const char *armada_37xx_get_group_name(struct pinctrl_dev *pctldev,
237 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
239 return info->groups[group].name;
242 static int armada_37xx_get_group_pins(struct pinctrl_dev *pctldev,
243 unsigned int selector,
244 const unsigned int **pins,
247 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
249 if (selector >= info->ngroups)
252 *pins = info->groups[selector].pins;
253 *npins = info->groups[selector].npins +
254 info->groups[selector].extra_npins;
259 static const struct pinctrl_ops armada_37xx_pctrl_ops = {
260 .get_groups_count = armada_37xx_get_groups_count,
261 .get_group_name = armada_37xx_get_group_name,
262 .get_group_pins = armada_37xx_get_group_pins,
263 .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
264 .dt_free_map = pinctrl_utils_free_map,
268 * Pinmux_ops handling
271 static int armada_37xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
273 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
278 static const char *armada_37xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
279 unsigned int selector)
281 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
283 return info->funcs[selector].name;
286 static int armada_37xx_pmx_get_groups(struct pinctrl_dev *pctldev,
287 unsigned int selector,
288 const char * const **groups,
289 unsigned int * const num_groups)
291 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
293 *groups = info->funcs[selector].groups;
294 *num_groups = info->funcs[selector].ngroups;
299 static int armada_37xx_pmx_set_by_name(struct pinctrl_dev *pctldev,
301 struct armada_37xx_pin_group *grp)
303 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
304 unsigned int reg = SELECTION;
305 unsigned int mask = grp->reg_mask;
308 dev_dbg(info->dev, "enable function %s group %s\n",
311 func = armada_37xx_get_func_reg(grp, name);
316 val = grp->val[func];
318 regmap_update_bits(info->regmap, reg, mask, val);
323 static int armada_37xx_pmx_set(struct pinctrl_dev *pctldev,
324 unsigned int selector,
328 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
329 struct armada_37xx_pin_group *grp = &info->groups[group];
330 const char *name = info->funcs[selector].name;
332 return armada_37xx_pmx_set_by_name(pctldev, name, grp);
335 static int armada_37xx_pmx_direction_input(struct armada_37xx_pinctrl *info,
338 unsigned int reg = OUTPUT_EN;
341 if (offset >= GPIO_PER_REG) {
342 offset -= GPIO_PER_REG;
347 return regmap_update_bits(info->regmap, reg, mask, 0);
350 static int armada_37xx_pmx_direction_output(struct armada_37xx_pinctrl *info,
351 unsigned int offset, int value)
353 unsigned int reg = OUTPUT_EN;
356 if (offset >= GPIO_PER_REG) {
357 offset -= GPIO_PER_REG;
362 return regmap_update_bits(info->regmap, reg, mask, mask);
365 static int armada_37xx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
366 struct pinctrl_gpio_range *range,
367 unsigned int offset, bool input)
369 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
371 dev_dbg(info->dev, "gpio_direction for pin %u as %s-%d to %s\n",
372 offset, range->name, offset, input ? "input" : "output");
375 armada_37xx_pmx_direction_input(info, offset);
377 armada_37xx_pmx_direction_output(info, offset, 0);
382 static int armada_37xx_gpio_request_enable(struct pinctrl_dev *pctldev,
383 struct pinctrl_gpio_range *range,
386 struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
387 struct armada_37xx_pin_group *group;
390 dev_dbg(info->dev, "requesting gpio %d\n", offset);
392 while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp)))
393 armada_37xx_pmx_set_by_name(pctldev, "gpio", group);
398 static const struct pinmux_ops armada_37xx_pmx_ops = {
399 .get_functions_count = armada_37xx_pmx_get_funcs_count,
400 .get_function_name = armada_37xx_pmx_get_func_name,
401 .get_function_groups = armada_37xx_pmx_get_groups,
402 .set_mux = armada_37xx_pmx_set,
403 .gpio_request_enable = armada_37xx_gpio_request_enable,
404 .gpio_set_direction = armada_37xx_pmx_gpio_set_direction,
408 * armada_37xx_add_function() - Add a new function to the list
409 * @funcs: array of function to add the new one
410 * @funcsize: size of the remaining space for the function
411 * @name: name of the function to add
413 * If it is a new function then create it by adding its name else
414 * increment the number of group associated to this function.
416 static int armada_37xx_add_function(struct armada_37xx_pmx_func *funcs,
417 int *funcsize, const char *name)
424 while (funcs->ngroups) {
425 /* function already there */
426 if (strcmp(funcs->name, name) == 0) {
435 /* append new unique function */
444 * armada_37xx_fill_group() - complete the group array
445 * @info: info driver instance
447 * Based on the data available from the armada_37xx_pin_group array
448 * completes the last member of the struct for each function: the list
449 * of the groups associated to this function.
452 static int armada_37xx_fill_group(struct armada_37xx_pinctrl *info)
454 int n, num = 0, funcsize = info->data->nr_pins;
456 for (n = 0; n < info->ngroups; n++) {
457 struct armada_37xx_pin_group *grp = &info->groups[n];
460 grp->pins = devm_kzalloc(info->dev,
461 (grp->npins + grp->extra_npins) *
462 sizeof(*grp->pins), GFP_KERNEL);
466 for (i = 0; i < grp->npins; i++)
467 grp->pins[i] = grp->start_pin + i;
469 for (j = 0; j < grp->extra_npins; j++)
470 grp->pins[i+j] = grp->extra_pin + j;
472 for (f = 0; f < NB_FUNCS; f++) {
474 /* check for unique functions and count groups */
475 ret = armada_37xx_add_function(info->funcs, &funcsize,
477 if (ret == -EOVERFLOW)
479 "More functions than pins(%d)\n",
480 info->data->nr_pins);
493 * armada_37xx_fill_funcs() - complete the funcs array
494 * @info: info driver instance
496 * Based on the data available from the armada_37xx_pin_group array
497 * completes the last two member of the struct for each group:
498 * - the list of the pins included in the group
499 * - the list of pinmux functions that can be selected for this group
502 static int armada_37xx_fill_func(struct armada_37xx_pinctrl *info)
504 struct armada_37xx_pmx_func *funcs = info->funcs;
507 for (n = 0; n < info->nfuncs; n++) {
508 const char *name = funcs[n].name;
512 funcs[n].groups = devm_kzalloc(info->dev, funcs[n].ngroups *
513 sizeof(*(funcs[n].groups)),
515 if (!funcs[n].groups)
518 groups = funcs[n].groups;
520 for (g = 0; g < info->ngroups; g++) {
521 struct armada_37xx_pin_group *gp = &info->groups[g];
524 for (f = 0; f < NB_FUNCS; f++) {
525 if (strcmp(gp->funcs[f], name) == 0) {
535 static int armada_37xx_pinctrl_register(struct platform_device *pdev,
536 struct armada_37xx_pinctrl *info)
538 const struct armada_37xx_pin_data *pin_data = info->data;
539 struct pinctrl_desc *ctrldesc = &info->pctl;
540 struct pinctrl_pin_desc *pindesc, *pdesc;
543 info->groups = pin_data->groups;
544 info->ngroups = pin_data->ngroups;
546 ctrldesc->name = "armada_37xx-pinctrl";
547 ctrldesc->owner = THIS_MODULE;
548 ctrldesc->pctlops = &armada_37xx_pctrl_ops;
549 ctrldesc->pmxops = &armada_37xx_pmx_ops;
550 ctrldesc->confops = &armada_37xx_pinconf_ops;
552 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
553 pin_data->nr_pins, GFP_KERNEL);
557 ctrldesc->pins = pindesc;
558 ctrldesc->npins = pin_data->nr_pins;
561 for (pin = 0; pin < pin_data->nr_pins; pin++) {
563 pdesc->name = kasprintf(GFP_KERNEL, "%s-%d",
564 pin_data->name, pin);
569 * we allocate functions for number of pins and hope there are
570 * fewer unique functions than pins available
572 info->funcs = devm_kzalloc(&pdev->dev, pin_data->nr_pins *
573 sizeof(struct armada_37xx_pmx_func), GFP_KERNEL);
578 ret = armada_37xx_fill_group(info);
582 ret = armada_37xx_fill_func(info);
586 info->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc, info);
587 if (IS_ERR(info->pctl_dev)) {
588 dev_err(&pdev->dev, "could not register pinctrl driver\n");
589 return PTR_ERR(info->pctl_dev);
595 static const struct of_device_id armada_37xx_pinctrl_of_match[] = {
597 .compatible = "marvell,armada3710-sb-pinctrl",
598 .data = (void *)&armada_37xx_pin_sb,
601 .compatible = "marvell,armada3710-nb-pinctrl",
602 .data = (void *)&armada_37xx_pin_nb,
607 static int __init armada_37xx_pinctrl_probe(struct platform_device *pdev)
609 struct armada_37xx_pinctrl *info;
610 struct device *dev = &pdev->dev;
611 struct device_node *np = dev->of_node;
612 struct regmap *regmap;
615 info = devm_kzalloc(dev, sizeof(struct armada_37xx_pinctrl),
622 regmap = syscon_node_to_regmap(np);
623 if (IS_ERR(regmap)) {
624 dev_err(&pdev->dev, "cannot get regmap\n");
625 return PTR_ERR(regmap);
627 info->regmap = regmap;
629 info->data = of_device_get_match_data(dev);
631 ret = armada_37xx_pinctrl_register(pdev, info);
635 platform_set_drvdata(pdev, info);
640 static struct platform_driver armada_37xx_pinctrl_driver = {
642 .name = "armada-37xx-pinctrl",
643 .of_match_table = armada_37xx_pinctrl_of_match,
647 builtin_platform_driver_probe(armada_37xx_pinctrl_driver,
648 armada_37xx_pinctrl_probe);