2 * Copyright (C) ST-Ericsson SA 2013
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/irqdomain.h>
23 #include <linux/interrupt.h>
24 #include <linux/bitops.h>
25 #include <linux/mfd/abx500.h>
26 #include <linux/mfd/abx500/ab8500.h>
27 #include <linux/pinctrl/pinctrl.h>
28 #include <linux/pinctrl/consumer.h>
29 #include <linux/pinctrl/pinmux.h>
30 #include <linux/pinctrl/pinconf.h>
31 #include <linux/pinctrl/pinconf-generic.h>
32 #include <linux/pinctrl/machine.h>
34 #include "pinctrl-abx500.h"
36 #include "../pinconf.h"
39 * The AB9540 and AB8540 GPIO support are extended versions
40 * of the AB8500 GPIO support.
41 * The AB9540 supports an additional (7th) register so that
42 * more GPIO may be configured and used.
43 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
44 * internal pull-up and pull-down capabilities.
48 * GPIO registers offset
51 #define AB8500_GPIO_SEL1_REG 0x00
52 #define AB8500_GPIO_SEL2_REG 0x01
53 #define AB8500_GPIO_SEL3_REG 0x02
54 #define AB8500_GPIO_SEL4_REG 0x03
55 #define AB8500_GPIO_SEL5_REG 0x04
56 #define AB8500_GPIO_SEL6_REG 0x05
57 #define AB9540_GPIO_SEL7_REG 0x06
59 #define AB8500_GPIO_DIR1_REG 0x10
60 #define AB8500_GPIO_DIR2_REG 0x11
61 #define AB8500_GPIO_DIR3_REG 0x12
62 #define AB8500_GPIO_DIR4_REG 0x13
63 #define AB8500_GPIO_DIR5_REG 0x14
64 #define AB8500_GPIO_DIR6_REG 0x15
65 #define AB9540_GPIO_DIR7_REG 0x16
67 #define AB8500_GPIO_OUT1_REG 0x20
68 #define AB8500_GPIO_OUT2_REG 0x21
69 #define AB8500_GPIO_OUT3_REG 0x22
70 #define AB8500_GPIO_OUT4_REG 0x23
71 #define AB8500_GPIO_OUT5_REG 0x24
72 #define AB8500_GPIO_OUT6_REG 0x25
73 #define AB9540_GPIO_OUT7_REG 0x26
75 #define AB8500_GPIO_PUD1_REG 0x30
76 #define AB8500_GPIO_PUD2_REG 0x31
77 #define AB8500_GPIO_PUD3_REG 0x32
78 #define AB8500_GPIO_PUD4_REG 0x33
79 #define AB8500_GPIO_PUD5_REG 0x34
80 #define AB8500_GPIO_PUD6_REG 0x35
81 #define AB9540_GPIO_PUD7_REG 0x36
83 #define AB8500_GPIO_IN1_REG 0x40
84 #define AB8500_GPIO_IN2_REG 0x41
85 #define AB8500_GPIO_IN3_REG 0x42
86 #define AB8500_GPIO_IN4_REG 0x43
87 #define AB8500_GPIO_IN5_REG 0x44
88 #define AB8500_GPIO_IN6_REG 0x45
89 #define AB9540_GPIO_IN7_REG 0x46
90 #define AB8540_GPIO_VINSEL_REG 0x47
91 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
92 #define AB8500_GPIO_ALTFUN_REG 0x50
93 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
94 #define AB8540_GPIO_VINSEL_MASK 0x03
95 #define AB8540_GPIOX_VBAT_START 51
96 #define AB8540_GPIOX_VBAT_END 54
98 #define ABX500_GPIO_INPUT 0
99 #define ABX500_GPIO_OUTPUT 1
101 struct abx500_pinctrl {
103 struct pinctrl_dev *pctldev;
104 struct abx500_pinctrl_soc_data *soc;
105 struct gpio_chip chip;
106 struct ab8500 *parent;
107 struct abx500_gpio_irq_cluster *irq_cluster;
108 int irq_cluster_size;
112 * to_abx500_pinctrl() - get the pointer to abx500_pinctrl
113 * @chip: Member of the structure abx500_pinctrl
115 static inline struct abx500_pinctrl *to_abx500_pinctrl(struct gpio_chip *chip)
117 return container_of(chip, struct abx500_pinctrl, chip);
120 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
121 unsigned offset, bool *bit)
123 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
129 ret = abx500_get_register_interruptible(pct->dev,
130 AB8500_MISC, reg, &val);
132 *bit = !!(val & BIT(pos));
136 "%s read reg =%x, offset=%x failed (%d)\n",
137 __func__, reg, offset, ret);
142 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
143 unsigned offset, int val)
145 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
150 ret = abx500_mask_and_set_register_interruptible(pct->dev,
151 AB8500_MISC, reg, BIT(pos), val << pos);
153 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
154 __func__, reg, offset, ret);
160 * abx500_gpio_get() - Get the particular GPIO value
162 * @offset: GPIO number to read
164 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
166 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
169 u8 gpio_offset = offset - 1;
172 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
173 gpio_offset, &is_out);
178 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
181 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
185 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
192 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
194 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
197 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
199 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
202 static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
203 enum abx500_gpio_pull_updown *pull_updown)
208 struct pullud *pullud;
210 if (!pct->soc->pullud) {
211 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
217 pullud = pct->soc->pullud;
219 if ((offset < pullud->first_pin)
220 || (offset > pullud->last_pin)) {
225 ret = abx500_get_register_interruptible(pct->dev,
226 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
228 pos = (offset - pullud->first_pin) << 1;
229 *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
233 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
238 static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
239 int offset, enum abx500_gpio_pull_updown val)
243 struct pullud *pullud;
245 if (!pct->soc->pullud) {
246 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
252 pullud = pct->soc->pullud;
254 if ((offset < pullud->first_pin)
255 || (offset > pullud->last_pin)) {
259 pos = (offset - pullud->first_pin) << 1;
261 ret = abx500_mask_and_set_register_interruptible(pct->dev,
262 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
263 AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
267 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
272 static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio)
274 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
275 struct pullud *pullud = pct->soc->pullud;
278 gpio >= pullud->first_pin &&
279 gpio <= pullud->last_pin);
282 static int abx500_gpio_direction_output(struct gpio_chip *chip,
286 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
290 /* set direction as output */
291 ret = abx500_gpio_set_bits(chip,
292 AB8500_GPIO_DIR1_REG,
298 /* disable pull down */
299 ret = abx500_gpio_set_bits(chip,
300 AB8500_GPIO_PUD1_REG,
302 ABX500_GPIO_PULL_NONE);
306 /* if supported, disable both pull down and pull up */
308 if (abx500_pullud_supported(chip, gpio)) {
309 ret = abx500_set_pull_updown(pct,
311 ABX500_GPIO_PULL_NONE);
315 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
319 /* set the output as 1 or 0 */
320 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
323 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
325 /* set the register as input */
326 return abx500_gpio_set_bits(chip,
327 AB8500_GPIO_DIR1_REG,
332 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
334 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
335 /* The AB8500 GPIO numbers are off by one */
336 int gpio = offset + 1;
340 for (i = 0; i < pct->irq_cluster_size; i++) {
341 struct abx500_gpio_irq_cluster *cluster =
342 &pct->irq_cluster[i];
344 if (gpio >= cluster->start && gpio <= cluster->end) {
346 * The ABx500 GPIO's associated IRQs are clustered together
347 * throughout the interrupt numbers at irregular intervals.
348 * To solve this quandry, we have placed the read-in values
349 * into the cluster information table.
351 hwirq = gpio - cluster->start + cluster->to_irq;
352 return irq_create_mapping(pct->parent->domain, hwirq);
359 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
360 unsigned gpio, int alt_setting)
362 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
363 struct alternate_functions af = pct->soc->alternate_functions[gpio];
368 const char *modes[] = {
369 [ABX500_DEFAULT] = "default",
370 [ABX500_ALT_A] = "altA",
371 [ABX500_ALT_B] = "altB",
372 [ABX500_ALT_C] = "altC",
376 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
377 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
378 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
379 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
384 /* on ABx5xx, there is no GPIO0, so adjust the offset */
387 switch (alt_setting) {
390 * for ABx5xx family, default mode is always selected by
391 * writing 0 to GPIOSELx register, except for pins which
392 * support at least ALT_B mode, default mode is selected
393 * by writing 1 to GPIOSELx register
396 if (af.alt_bit1 != UNUSED)
399 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
405 * for ABx5xx family, alt_a mode is always selected by
406 * writing 1 to GPIOSELx register, except for pins which
407 * support at least ALT_B mode, alt_a mode is selected
408 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
411 if (af.alt_bit1 != UNUSED) {
412 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
417 ret = abx500_gpio_set_bits(chip,
418 AB8500_GPIO_ALTFUN_REG,
420 !!(af.alta_val & BIT(0)));
424 if (af.alt_bit2 != UNUSED)
425 ret = abx500_gpio_set_bits(chip,
426 AB8500_GPIO_ALTFUN_REG,
428 !!(af.alta_val & BIT(1)));
430 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
435 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
440 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
441 af.alt_bit1, !!(af.altb_val & BIT(0)));
445 if (af.alt_bit2 != UNUSED)
446 ret = abx500_gpio_set_bits(chip,
447 AB8500_GPIO_ALTFUN_REG,
449 !!(af.altb_val & BIT(1)));
453 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
458 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
459 af.alt_bit2, !!(af.altc_val & BIT(0)));
463 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
464 af.alt_bit2, !!(af.altc_val & BIT(1)));
468 dev_dbg(pct->dev, "unknow alt_setting %d\n", alt_setting);
474 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
479 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
486 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
487 struct alternate_functions af = pct->soc->alternate_functions[gpio];
488 /* on ABx5xx, there is no GPIO0, so adjust the offset */
489 unsigned offset = gpio - 1;
493 * if gpiosel_bit is set to unused,
494 * it means no GPIO or special case
496 if (af.gpiosel_bit == UNUSED)
497 return ABX500_DEFAULT;
499 /* read GpioSelx register */
500 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
501 af.gpiosel_bit, &bit_mode);
508 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
509 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
511 "alt_bitX value not in correct range (-1 to 7)\n");
515 /* if alt_bit2 is used, alt_bit1 must be used too */
516 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
518 "if alt_bit2 is used, alt_bit1 can't be unused\n");
522 /* check if pin use AlternateFunction register */
523 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
526 * if pin GPIOSEL bit is set and pin supports alternate function,
527 * it means DEFAULT mode
530 return ABX500_DEFAULT;
533 * pin use the AlternatFunction register
534 * read alt_bit1 value
536 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
537 af.alt_bit1, &alt_bit1);
541 if (af.alt_bit2 != UNUSED) {
542 /* read alt_bit2 value */
543 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
551 mode = (alt_bit2 << 1) + alt_bit1;
552 if (mode == af.alta_val)
554 else if (mode == af.altb_val)
560 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
564 #ifdef CONFIG_DEBUG_FS
566 #include <linux/seq_file.h>
568 static void abx500_gpio_dbg_show_one(struct seq_file *s,
569 struct pinctrl_dev *pctldev,
570 struct gpio_chip *chip,
571 unsigned offset, unsigned gpio)
573 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
574 const char *label = gpiochip_is_requested(chip, offset - 1);
575 u8 gpio_offset = offset - 1;
579 enum abx500_gpio_pull_updown pud = 0;
582 const char *modes[] = {
583 [ABX500_DEFAULT] = "default",
584 [ABX500_ALT_A] = "altA",
585 [ABX500_ALT_B] = "altB",
586 [ABX500_ALT_C] = "altC",
589 const char *pull_up_down[] = {
590 [ABX500_GPIO_PULL_DOWN] = "pull down",
591 [ABX500_GPIO_PULL_NONE] = "pull none",
592 [ABX500_GPIO_PULL_NONE + 1] = "pull none",
593 [ABX500_GPIO_PULL_UP] = "pull up",
596 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
597 gpio_offset, &is_out);
601 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
602 gpio, label ?: "(none)",
603 is_out ? "out" : "in ");
606 if (abx500_pullud_supported(chip, offset)) {
607 ret = abx500_get_pull_updown(pct, offset, &pud);
611 seq_printf(s, " %-9s", pull_up_down[pud]);
613 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
618 seq_printf(s, " %-9s", pull_up_down[pd]);
621 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
624 mode = abx500_get_mode(pctldev, chip, offset);
626 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
630 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
633 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
636 unsigned gpio = chip->base;
637 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
638 struct pinctrl_dev *pctldev = pct->pctldev;
640 for (i = 0; i < chip->ngpio; i++, gpio++) {
641 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
642 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
648 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
649 struct pinctrl_dev *pctldev,
650 struct gpio_chip *chip,
651 unsigned offset, unsigned gpio)
654 #define abx500_gpio_dbg_show NULL
657 static int abx500_gpio_request(struct gpio_chip *chip, unsigned offset)
659 int gpio = chip->base + offset;
661 return pinctrl_request_gpio(gpio);
664 static void abx500_gpio_free(struct gpio_chip *chip, unsigned offset)
666 int gpio = chip->base + offset;
668 pinctrl_free_gpio(gpio);
671 static struct gpio_chip abx500gpio_chip = {
672 .label = "abx500-gpio",
673 .owner = THIS_MODULE,
674 .request = abx500_gpio_request,
675 .free = abx500_gpio_free,
676 .direction_input = abx500_gpio_direction_input,
677 .get = abx500_gpio_get,
678 .direction_output = abx500_gpio_direction_output,
679 .set = abx500_gpio_set,
680 .to_irq = abx500_gpio_to_irq,
681 .dbg_show = abx500_gpio_dbg_show,
684 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
686 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
688 return pct->soc->nfunctions;
691 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
694 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
696 return pct->soc->functions[function].name;
699 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
701 const char * const **groups,
702 unsigned * const num_groups)
704 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
706 *groups = pct->soc->functions[function].groups;
707 *num_groups = pct->soc->functions[function].ngroups;
712 static int abx500_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,
715 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
716 struct gpio_chip *chip = &pct->chip;
717 const struct abx500_pingroup *g;
721 g = &pct->soc->groups[group];
722 if (g->altsetting < 0)
725 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
727 for (i = 0; i < g->npins; i++) {
728 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
729 g->pins[i], g->altsetting);
731 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
735 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
740 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
741 struct pinctrl_gpio_range *range,
744 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
745 const struct abx500_pinrange *p;
750 * Different ranges have different ways to enable GPIO function on a
751 * pin, so refer back to our local range type, where we handily define
752 * what altfunc enables GPIO for a certain pin.
754 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
755 p = &pct->soc->gpio_ranges[i];
756 if ((offset >= p->offset) &&
757 (offset < (p->offset + p->npins)))
761 if (i == pct->soc->gpio_num_ranges) {
762 dev_err(pct->dev, "%s failed to locate range\n", __func__);
766 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
769 ret = abx500_set_mode(pct->pctldev, &pct->chip,
772 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
777 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
778 struct pinctrl_gpio_range *range,
783 static const struct pinmux_ops abx500_pinmux_ops = {
784 .get_functions_count = abx500_pmx_get_funcs_cnt,
785 .get_function_name = abx500_pmx_get_func_name,
786 .get_function_groups = abx500_pmx_get_func_groups,
787 .enable = abx500_pmx_enable,
788 .gpio_request_enable = abx500_gpio_request_enable,
789 .gpio_disable_free = abx500_gpio_disable_free,
792 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
794 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
796 return pct->soc->ngroups;
799 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
802 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
804 return pct->soc->groups[selector].name;
807 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
809 const unsigned **pins,
812 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
814 *pins = pct->soc->groups[selector].pins;
815 *num_pins = pct->soc->groups[selector].npins;
820 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
821 struct seq_file *s, unsigned offset)
823 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
824 struct gpio_chip *chip = &pct->chip;
826 abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
827 chip->base + offset - 1);
830 static void abx500_dt_free_map(struct pinctrl_dev *pctldev,
831 struct pinctrl_map *map, unsigned num_maps)
835 for (i = 0; i < num_maps; i++)
836 if (map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
837 kfree(map[i].data.configs.configs);
841 static int abx500_dt_reserve_map(struct pinctrl_map **map,
842 unsigned *reserved_maps,
846 unsigned old_num = *reserved_maps;
847 unsigned new_num = *num_maps + reserve;
848 struct pinctrl_map *new_map;
850 if (old_num >= new_num)
853 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
857 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
860 *reserved_maps = new_num;
865 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
866 unsigned *reserved_maps,
867 unsigned *num_maps, const char *group,
868 const char *function)
870 if (*num_maps == *reserved_maps)
873 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
874 (*map)[*num_maps].data.mux.group = group;
875 (*map)[*num_maps].data.mux.function = function;
881 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
882 unsigned *reserved_maps,
883 unsigned *num_maps, const char *group,
884 unsigned long *configs, unsigned num_configs)
886 unsigned long *dup_configs;
888 if (*num_maps == *reserved_maps)
891 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
896 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
898 (*map)[*num_maps].data.configs.group_or_pin = group;
899 (*map)[*num_maps].data.configs.configs = dup_configs;
900 (*map)[*num_maps].data.configs.num_configs = num_configs;
906 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
907 const char *pin_name)
910 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
912 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
913 for (i = 0; i < npct->soc->npins; i++)
914 if (npct->soc->pins[i].number == pin_number)
915 return npct->soc->pins[i].name;
919 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
920 struct device_node *np,
921 struct pinctrl_map **map,
922 unsigned *reserved_maps,
926 const char *function = NULL;
927 unsigned long *configs;
928 unsigned int nconfigs = 0;
930 unsigned reserve = 0;
931 struct property *prop;
932 const char *group, *gpio_name;
933 struct device_node *np_config;
935 ret = of_property_read_string(np, "ste,function", &function);
939 ret = pinconf_generic_parse_dt_config(np, &configs, &nconfigs);
943 np_config = of_parse_phandle(np, "ste,config", 0);
945 ret = pinconf_generic_parse_dt_config(np_config, &configs,
949 has_config |= nconfigs;
952 ret = of_property_count_strings(np, "ste,pins");
961 ret = abx500_dt_reserve_map(map, reserved_maps, num_maps, reserve);
965 of_property_for_each_string(np, "ste,pins", prop, group) {
967 ret = abx500_dt_add_map_mux(map, reserved_maps,
968 num_maps, group, function);
973 gpio_name = abx500_find_pin_name(pctldev, group);
975 ret = abx500_dt_add_map_configs(map, reserved_maps,
976 num_maps, gpio_name, configs, 1);
986 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
987 struct device_node *np_config,
988 struct pinctrl_map **map, unsigned *num_maps)
990 unsigned reserved_maps;
991 struct device_node *np;
998 for_each_child_of_node(np_config, np) {
999 ret = abx500_dt_subnode_to_map(pctldev, np, map,
1000 &reserved_maps, num_maps);
1002 abx500_dt_free_map(pctldev, *map, *num_maps);
1010 static const struct pinctrl_ops abx500_pinctrl_ops = {
1011 .get_groups_count = abx500_get_groups_cnt,
1012 .get_group_name = abx500_get_group_name,
1013 .get_group_pins = abx500_get_group_pins,
1014 .pin_dbg_show = abx500_pin_dbg_show,
1015 .dt_node_to_map = abx500_dt_node_to_map,
1016 .dt_free_map = abx500_dt_free_map,
1019 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
1021 unsigned long *config)
1026 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
1028 unsigned long *configs,
1029 unsigned num_configs)
1031 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
1032 struct gpio_chip *chip = &pct->chip;
1036 enum pin_config_param param;
1037 enum pin_config_param argument;
1039 for (i = 0; i < num_configs; i++) {
1040 param = pinconf_to_config_param(configs[i]);
1041 argument = pinconf_to_config_argument(configs[i]);
1043 dev_dbg(chip->dev, "pin %d [%#lx]: %s %s\n",
1045 (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
1046 (param == PIN_CONFIG_OUTPUT) ?
1047 (argument ? "high" : "low") :
1048 (argument ? "pull up" : "pull down"));
1050 /* on ABx500, there is no GPIO0, so adjust the offset */
1054 case PIN_CONFIG_BIAS_DISABLE:
1055 ret = abx500_gpio_direction_input(chip, offset);
1059 * Some chips only support pull down, while some
1060 * actually support both pull up and pull down. Such
1061 * chips have a "pullud" range specified for the pins
1062 * that support both features. If the pin is not
1063 * within that range, we fall back to the old bit set
1064 * that only support pull down.
1066 if (abx500_pullud_supported(chip, pin))
1067 ret = abx500_set_pull_updown(pct,
1069 ABX500_GPIO_PULL_NONE);
1071 /* Chip only supports pull down */
1072 ret = abx500_gpio_set_bits(chip,
1073 AB8500_GPIO_PUD1_REG, offset,
1074 ABX500_GPIO_PULL_NONE);
1077 case PIN_CONFIG_BIAS_PULL_DOWN:
1078 ret = abx500_gpio_direction_input(chip, offset);
1082 * if argument = 1 set the pull down
1083 * else clear the pull down
1084 * Some chips only support pull down, while some
1085 * actually support both pull up and pull down. Such
1086 * chips have a "pullud" range specified for the pins
1087 * that support both features. If the pin is not
1088 * within that range, we fall back to the old bit set
1089 * that only support pull down.
1091 if (abx500_pullud_supported(chip, pin))
1092 ret = abx500_set_pull_updown(pct,
1094 argument ? ABX500_GPIO_PULL_DOWN :
1095 ABX500_GPIO_PULL_NONE);
1097 /* Chip only supports pull down */
1098 ret = abx500_gpio_set_bits(chip,
1099 AB8500_GPIO_PUD1_REG,
1101 argument ? ABX500_GPIO_PULL_DOWN :
1102 ABX500_GPIO_PULL_NONE);
1105 case PIN_CONFIG_BIAS_PULL_UP:
1106 ret = abx500_gpio_direction_input(chip, offset);
1110 * if argument = 1 set the pull up
1111 * else clear the pull up
1113 ret = abx500_gpio_direction_input(chip, offset);
1115 * Some chips only support pull down, while some
1116 * actually support both pull up and pull down. Such
1117 * chips have a "pullud" range specified for the pins
1118 * that support both features. If the pin is not
1119 * within that range, do nothing
1121 if (abx500_pullud_supported(chip, pin))
1122 ret = abx500_set_pull_updown(pct,
1124 argument ? ABX500_GPIO_PULL_UP :
1125 ABX500_GPIO_PULL_NONE);
1128 case PIN_CONFIG_OUTPUT:
1129 ret = abx500_gpio_direction_output(chip, offset,
1134 dev_err(chip->dev, "illegal configuration requested\n");
1136 } /* for each config */
1139 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
1144 static const struct pinconf_ops abx500_pinconf_ops = {
1145 .pin_config_get = abx500_pin_config_get,
1146 .pin_config_set = abx500_pin_config_set,
1149 static struct pinctrl_desc abx500_pinctrl_desc = {
1150 .name = "pinctrl-abx500",
1151 .pctlops = &abx500_pinctrl_ops,
1152 .pmxops = &abx500_pinmux_ops,
1153 .confops = &abx500_pinconf_ops,
1154 .owner = THIS_MODULE,
1157 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
1159 unsigned int lowest = 0;
1160 unsigned int highest = 0;
1161 unsigned int npins = 0;
1165 * Compute number of GPIOs from the last SoC gpio range descriptors
1166 * These ranges may include "holes" but the GPIO number space shall
1167 * still be homogeneous, so we need to detect and account for any
1168 * such holes so that these are included in the number of GPIO pins.
1170 for (i = 0; i < soc->gpio_num_ranges; i++) {
1173 const struct abx500_pinrange *p;
1175 p = &soc->gpio_ranges[i];
1177 gend = p->offset + p->npins - 1;
1180 /* First iteration, set start values */
1184 if (gstart < lowest)
1190 /* this gives the absolute number of pins */
1191 npins = highest - lowest + 1;
1195 static const struct of_device_id abx500_gpio_match[] = {
1196 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
1197 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
1198 { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
1199 { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
1203 static int abx500_gpio_probe(struct platform_device *pdev)
1205 struct device_node *np = pdev->dev.of_node;
1206 const struct of_device_id *match;
1207 struct abx500_pinctrl *pct;
1208 unsigned int id = -1;
1213 dev_err(&pdev->dev, "gpio dt node missing\n");
1217 pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl),
1221 "failed to allocate memory for pct\n");
1225 pct->dev = &pdev->dev;
1226 pct->parent = dev_get_drvdata(pdev->dev.parent);
1227 pct->chip = abx500gpio_chip;
1228 pct->chip.dev = &pdev->dev;
1229 pct->chip.base = -1; /* Dynamic allocation */
1231 match = of_match_device(abx500_gpio_match, &pdev->dev);
1233 dev_err(&pdev->dev, "gpio dt not matching\n");
1236 id = (unsigned long)match->data;
1238 /* Poke in other ASIC variants here */
1240 case PINCTRL_AB8500:
1241 abx500_pinctrl_ab8500_init(&pct->soc);
1243 case PINCTRL_AB8540:
1244 abx500_pinctrl_ab8540_init(&pct->soc);
1246 case PINCTRL_AB9540:
1247 abx500_pinctrl_ab9540_init(&pct->soc);
1249 case PINCTRL_AB8505:
1250 abx500_pinctrl_ab8505_init(&pct->soc);
1253 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1258 dev_err(&pdev->dev, "Invalid SOC data\n");
1262 pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1263 pct->irq_cluster = pct->soc->gpio_irq_cluster;
1264 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1266 ret = gpiochip_add(&pct->chip);
1268 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1271 dev_info(&pdev->dev, "added gpiochip\n");
1273 abx500_pinctrl_desc.pins = pct->soc->pins;
1274 abx500_pinctrl_desc.npins = pct->soc->npins;
1275 pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct);
1276 if (!pct->pctldev) {
1278 "could not register abx500 pinctrl driver\n");
1282 dev_info(&pdev->dev, "registered pin controller\n");
1284 /* We will handle a range of GPIO pins */
1285 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1286 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1288 ret = gpiochip_add_pin_range(&pct->chip,
1289 dev_name(&pdev->dev),
1290 p->offset - 1, p->offset, p->npins);
1295 platform_set_drvdata(pdev, pct);
1296 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1301 err = gpiochip_remove(&pct->chip);
1303 dev_info(&pdev->dev, "failed to remove gpiochip\n");
1309 * abx500_gpio_remove() - remove Ab8500-gpio driver
1310 * @pdev: Platform device registered
1312 static int abx500_gpio_remove(struct platform_device *pdev)
1314 struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1317 ret = gpiochip_remove(&pct->chip);
1319 dev_err(pct->dev, "unable to remove gpiochip: %d\n",
1327 static struct platform_driver abx500_gpio_driver = {
1329 .name = "abx500-gpio",
1330 .owner = THIS_MODULE,
1331 .of_match_table = abx500_gpio_match,
1333 .probe = abx500_gpio_probe,
1334 .remove = abx500_gpio_remove,
1337 static int __init abx500_gpio_init(void)
1339 return platform_driver_register(&abx500_gpio_driver);
1341 core_initcall(abx500_gpio_init);
1343 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1344 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1345 MODULE_ALIAS("platform:abx500-gpio");
1346 MODULE_LICENSE("GPL v2");