2 * ams AS3722 pin control and GPIO driver.
4 * Copyright (c) 2013, NVIDIA Corporation.
6 * Author: Laxman Dewangan <ldewangan@nvidia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2.
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13 * whether express or implied; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23 #include <linux/delay.h>
24 #include <linux/gpio.h>
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/mfd/as3722.h>
29 #include <linux/of_device.h>
30 #include <linux/platform_device.h>
31 #include <linux/pinctrl/consumer.h>
32 #include <linux/pinctrl/machine.h>
33 #include <linux/pinctrl/pinctrl.h>
34 #include <linux/pinctrl/pinconf-generic.h>
35 #include <linux/pinctrl/pinconf.h>
36 #include <linux/pinctrl/pinmux.h>
38 #include <linux/slab.h>
42 #include "pinctrl-utils.h"
44 #define AS3722_PIN_GPIO0 0
45 #define AS3722_PIN_GPIO1 1
46 #define AS3722_PIN_GPIO2 2
47 #define AS3722_PIN_GPIO3 3
48 #define AS3722_PIN_GPIO4 4
49 #define AS3722_PIN_GPIO5 5
50 #define AS3722_PIN_GPIO6 6
51 #define AS3722_PIN_GPIO7 7
52 #define AS3722_PIN_NUM (AS3722_PIN_GPIO7 + 1)
54 #define AS3722_GPIO_MODE_PULL_UP BIT(PIN_CONFIG_BIAS_PULL_UP)
55 #define AS3722_GPIO_MODE_PULL_DOWN BIT(PIN_CONFIG_BIAS_PULL_DOWN)
56 #define AS3722_GPIO_MODE_HIGH_IMPED BIT(PIN_CONFIG_BIAS_HIGH_IMPEDANCE)
57 #define AS3722_GPIO_MODE_OPEN_DRAIN BIT(PIN_CONFIG_DRIVE_OPEN_DRAIN)
59 struct as3722_pin_function {
61 const char * const *groups;
66 struct as3722_gpio_pin_control {
67 bool enable_gpio_invert;
72 struct as3722_pingroup {
74 const unsigned pins[1];
78 struct as3722_pctrl_info {
80 struct pinctrl_dev *pctl;
81 struct as3722 *as3722;
82 struct gpio_chip gpio_chip;
83 int pins_current_opt[AS3722_PIN_NUM];
84 const struct as3722_pin_function *functions;
85 unsigned num_functions;
86 const struct as3722_pingroup *pin_groups;
88 const struct pinctrl_pin_desc *pins;
90 struct as3722_gpio_pin_control gpio_control[AS3722_PIN_NUM];
93 static const struct pinctrl_pin_desc as3722_pins_desc[] = {
94 PINCTRL_PIN(AS3722_PIN_GPIO0, "gpio0"),
95 PINCTRL_PIN(AS3722_PIN_GPIO1, "gpio1"),
96 PINCTRL_PIN(AS3722_PIN_GPIO2, "gpio2"),
97 PINCTRL_PIN(AS3722_PIN_GPIO3, "gpio3"),
98 PINCTRL_PIN(AS3722_PIN_GPIO4, "gpio4"),
99 PINCTRL_PIN(AS3722_PIN_GPIO5, "gpio5"),
100 PINCTRL_PIN(AS3722_PIN_GPIO6, "gpio6"),
101 PINCTRL_PIN(AS3722_PIN_GPIO7, "gpio7"),
104 static const char * const gpio_groups[] = {
115 enum as3722_pinmux_option {
116 AS3722_PINMUX_GPIO = 0,
117 AS3722_PINMUX_INTERRUPT_OUT = 1,
118 AS3722_PINMUX_VSUB_VBAT_UNDEB_LOW_OUT = 2,
119 AS3722_PINMUX_GPIO_INTERRUPT = 3,
120 AS3722_PINMUX_PWM_INPUT = 4,
121 AS3722_PINMUX_VOLTAGE_IN_STBY = 5,
122 AS3722_PINMUX_OC_PG_SD0 = 6,
123 AS3722_PINMUX_PG_OUT = 7,
124 AS3722_PINMUX_CLK32K_OUT = 8,
125 AS3722_PINMUX_WATCHDOG_INPUT = 9,
126 AS3722_PINMUX_SOFT_RESET_IN = 11,
127 AS3722_PINMUX_PWM_OUTPUT = 12,
128 AS3722_PINMUX_VSUB_VBAT_LOW_DEB_OUT = 13,
129 AS3722_PINMUX_OC_PG_SD6 = 14,
132 #define FUNCTION_GROUP(fname, mux) \
135 .groups = gpio_groups, \
136 .ngroups = ARRAY_SIZE(gpio_groups), \
137 .mux_option = AS3722_PINMUX_##mux, \
140 static const struct as3722_pin_function as3722_pin_function[] = {
141 FUNCTION_GROUP(gpio, GPIO),
142 FUNCTION_GROUP(interrupt-out, INTERRUPT_OUT),
143 FUNCTION_GROUP(gpio-in-interrupt, GPIO_INTERRUPT),
144 FUNCTION_GROUP(vsup-vbat-low-undebounce-out, VSUB_VBAT_UNDEB_LOW_OUT),
145 FUNCTION_GROUP(vsup-vbat-low-debounce-out, VSUB_VBAT_LOW_DEB_OUT),
146 FUNCTION_GROUP(voltage-in-standby, VOLTAGE_IN_STBY),
147 FUNCTION_GROUP(oc-pg-sd0, OC_PG_SD0),
148 FUNCTION_GROUP(oc-pg-sd6, OC_PG_SD6),
149 FUNCTION_GROUP(powergood-out, PG_OUT),
150 FUNCTION_GROUP(pwm-in, PWM_INPUT),
151 FUNCTION_GROUP(pwm-out, PWM_OUTPUT),
152 FUNCTION_GROUP(clk32k-out, CLK32K_OUT),
153 FUNCTION_GROUP(watchdog-in, WATCHDOG_INPUT),
154 FUNCTION_GROUP(soft-reset-in, SOFT_RESET_IN),
157 #define AS3722_PINGROUP(pg_name, pin_id) \
160 .pins = {AS3722_PIN_##pin_id}, \
164 static const struct as3722_pingroup as3722_pingroups[] = {
165 AS3722_PINGROUP(gpio0, GPIO0),
166 AS3722_PINGROUP(gpio1, GPIO1),
167 AS3722_PINGROUP(gpio2, GPIO2),
168 AS3722_PINGROUP(gpio3, GPIO3),
169 AS3722_PINGROUP(gpio4, GPIO4),
170 AS3722_PINGROUP(gpio5, GPIO5),
171 AS3722_PINGROUP(gpio6, GPIO6),
172 AS3722_PINGROUP(gpio7, GPIO7),
175 static int as3722_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
177 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
179 return as_pci->num_pin_groups;
182 static const char *as3722_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
185 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
187 return as_pci->pin_groups[group].name;
190 static int as3722_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
191 unsigned group, const unsigned **pins, unsigned *num_pins)
193 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
195 *pins = as_pci->pin_groups[group].pins;
196 *num_pins = as_pci->pin_groups[group].npins;
200 static const struct pinctrl_ops as3722_pinctrl_ops = {
201 .get_groups_count = as3722_pinctrl_get_groups_count,
202 .get_group_name = as3722_pinctrl_get_group_name,
203 .get_group_pins = as3722_pinctrl_get_group_pins,
204 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
205 .dt_free_map = pinctrl_utils_dt_free_map,
208 static int as3722_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
210 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
212 return as_pci->num_functions;
215 static const char *as3722_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
218 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
220 return as_pci->functions[function].name;
223 static int as3722_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
224 unsigned function, const char * const **groups,
225 unsigned * const num_groups)
227 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
229 *groups = as_pci->functions[function].groups;
230 *num_groups = as_pci->functions[function].ngroups;
234 static int as3722_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function,
237 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
238 int gpio_cntr_reg = AS3722_GPIOn_CONTROL_REG(group);
239 u8 val = AS3722_GPIO_IOSF_VAL(as_pci->functions[function].mux_option);
242 dev_dbg(as_pci->dev, "%s(): GPIO %u pin to function %u and val %u\n",
243 __func__, group, function, val);
245 ret = as3722_update_bits(as_pci->as3722, gpio_cntr_reg,
246 AS3722_GPIO_IOSF_MASK, val);
248 dev_err(as_pci->dev, "GPIO%d_CTRL_REG update failed %d\n",
252 as_pci->gpio_control[group].io_function = function;
256 static int as3722_pinctrl_gpio_get_mode(unsigned gpio_mode_prop, bool input)
258 if (gpio_mode_prop & AS3722_GPIO_MODE_HIGH_IMPED)
261 if (gpio_mode_prop & AS3722_GPIO_MODE_OPEN_DRAIN) {
262 if (gpio_mode_prop & AS3722_GPIO_MODE_PULL_UP)
263 return AS3722_GPIO_MODE_IO_OPEN_DRAIN_PULL_UP;
264 return AS3722_GPIO_MODE_IO_OPEN_DRAIN;
267 if (gpio_mode_prop & AS3722_GPIO_MODE_PULL_UP)
268 return AS3722_GPIO_MODE_INPUT_PULL_UP;
269 else if (gpio_mode_prop & AS3722_GPIO_MODE_PULL_DOWN)
270 return AS3722_GPIO_MODE_INPUT_PULL_DOWN;
271 return AS3722_GPIO_MODE_INPUT;
273 if (gpio_mode_prop & AS3722_GPIO_MODE_PULL_DOWN)
274 return AS3722_GPIO_MODE_OUTPUT_VDDL;
275 return AS3722_GPIO_MODE_OUTPUT_VDDH;
278 static int as3722_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
279 struct pinctrl_gpio_range *range, unsigned offset)
281 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
283 if (as_pci->gpio_control[offset].io_function)
288 static int as3722_pinctrl_gpio_set_direction(struct pinctrl_dev *pctldev,
289 struct pinctrl_gpio_range *range, unsigned offset, bool input)
291 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
292 struct as3722 *as3722 = as_pci->as3722;
295 mode = as3722_pinctrl_gpio_get_mode(
296 as_pci->gpio_control[offset].mode_prop, input);
298 dev_err(as_pci->dev, "%s direction for GPIO %d not supported\n",
299 (input) ? "Input" : "Output", offset);
303 if (as_pci->gpio_control[offset].enable_gpio_invert)
304 mode |= AS3722_GPIO_INV;
306 return as3722_write(as3722, AS3722_GPIOn_CONTROL_REG(offset), mode);
309 static const struct pinmux_ops as3722_pinmux_ops = {
310 .get_functions_count = as3722_pinctrl_get_funcs_count,
311 .get_function_name = as3722_pinctrl_get_func_name,
312 .get_function_groups = as3722_pinctrl_get_func_groups,
313 .enable = as3722_pinctrl_enable,
314 .gpio_request_enable = as3722_pinctrl_gpio_request_enable,
315 .gpio_set_direction = as3722_pinctrl_gpio_set_direction,
318 static int as3722_pinconf_get(struct pinctrl_dev *pctldev,
319 unsigned pin, unsigned long *config)
321 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
322 enum pin_config_param param = pinconf_to_config_param(*config);
327 case PIN_CONFIG_BIAS_DISABLE:
328 prop = AS3722_GPIO_MODE_PULL_UP |
329 AS3722_GPIO_MODE_PULL_DOWN;
330 if (!(as_pci->gpio_control[pin].mode_prop & prop))
335 case PIN_CONFIG_BIAS_PULL_UP:
336 prop = AS3722_GPIO_MODE_PULL_UP;
339 case PIN_CONFIG_BIAS_PULL_DOWN:
340 prop = AS3722_GPIO_MODE_PULL_DOWN;
343 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
344 prop = AS3722_GPIO_MODE_OPEN_DRAIN;
347 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
348 prop = AS3722_GPIO_MODE_HIGH_IMPED;
352 dev_err(as_pci->dev, "Properties not supported\n");
356 if (as_pci->gpio_control[pin].mode_prop & prop)
359 *config = pinconf_to_config_packed(param, (u16)arg);
363 static int as3722_pinconf_set(struct pinctrl_dev *pctldev,
364 unsigned pin, unsigned long *configs,
365 unsigned num_configs)
367 struct as3722_pctrl_info *as_pci = pinctrl_dev_get_drvdata(pctldev);
368 enum pin_config_param param;
372 for (i = 0; i < num_configs; i++) {
373 param = pinconf_to_config_param(configs[i]);
374 mode_prop = as_pci->gpio_control[pin].mode_prop;
377 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
380 case PIN_CONFIG_BIAS_DISABLE:
381 mode_prop &= ~(AS3722_GPIO_MODE_PULL_UP |
382 AS3722_GPIO_MODE_PULL_DOWN);
384 case PIN_CONFIG_BIAS_PULL_UP:
385 mode_prop |= AS3722_GPIO_MODE_PULL_UP;
388 case PIN_CONFIG_BIAS_PULL_DOWN:
389 mode_prop |= AS3722_GPIO_MODE_PULL_DOWN;
392 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
393 mode_prop |= AS3722_GPIO_MODE_HIGH_IMPED;
396 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
397 mode_prop |= AS3722_GPIO_MODE_OPEN_DRAIN;
401 dev_err(as_pci->dev, "Properties not supported\n");
405 as_pci->gpio_control[pin].mode_prop = mode_prop;
410 static const struct pinconf_ops as3722_pinconf_ops = {
411 .pin_config_get = as3722_pinconf_get,
412 .pin_config_set = as3722_pinconf_set,
415 static struct pinctrl_desc as3722_pinctrl_desc = {
416 .pctlops = &as3722_pinctrl_ops,
417 .pmxops = &as3722_pinmux_ops,
418 .confops = &as3722_pinconf_ops,
419 .owner = THIS_MODULE,
422 static inline struct as3722_pctrl_info *to_as_pci(struct gpio_chip *chip)
424 return container_of(chip, struct as3722_pctrl_info, gpio_chip);
427 static int as3722_gpio_get(struct gpio_chip *chip, unsigned offset)
429 struct as3722_pctrl_info *as_pci = to_as_pci(chip);
430 struct as3722 *as3722 = as_pci->as3722;
438 ret = as3722_read(as3722, AS3722_GPIOn_CONTROL_REG(offset), &control);
441 "GPIO_CONTROL%d_REG read failed: %d\n", offset, ret);
445 invert_enable = !!(control & AS3722_GPIO_INV);
446 mode = control & AS3722_GPIO_MODE_MASK;
448 case AS3722_GPIO_MODE_INPUT:
449 case AS3722_GPIO_MODE_INPUT_PULL_UP:
450 case AS3722_GPIO_MODE_INPUT_PULL_DOWN:
451 case AS3722_GPIO_MODE_IO_OPEN_DRAIN:
452 case AS3722_GPIO_MODE_IO_OPEN_DRAIN_PULL_UP:
453 reg = AS3722_GPIO_SIGNAL_IN_REG;
455 case AS3722_GPIO_MODE_OUTPUT_VDDH:
456 case AS3722_GPIO_MODE_OUTPUT_VDDL:
457 reg = AS3722_GPIO_SIGNAL_OUT_REG;
463 ret = as3722_read(as3722, reg, &val);
466 "GPIO_SIGNAL_IN_REG read failed: %d\n", ret);
470 val = !!(val & AS3722_GPIOn_SIGNAL(offset));
471 return (invert_enable) ? !val : val;
474 static void as3722_gpio_set(struct gpio_chip *chip, unsigned offset,
477 struct as3722_pctrl_info *as_pci = to_as_pci(chip);
478 struct as3722 *as3722 = as_pci->as3722;
479 int en_invert = as_pci->gpio_control[offset].enable_gpio_invert;
484 val = (en_invert) ? 0 : AS3722_GPIOn_SIGNAL(offset);
486 val = (en_invert) ? AS3722_GPIOn_SIGNAL(offset) : 0;
488 ret = as3722_update_bits(as3722, AS3722_GPIO_SIGNAL_OUT_REG,
489 AS3722_GPIOn_SIGNAL(offset), val);
492 "GPIO_SIGNAL_OUT_REG update failed: %d\n", ret);
495 static int as3722_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
497 return pinctrl_gpio_direction_input(chip->base + offset);
500 static int as3722_gpio_direction_output(struct gpio_chip *chip,
501 unsigned offset, int value)
503 as3722_gpio_set(chip, offset, value);
504 return pinctrl_gpio_direction_output(chip->base + offset);
507 static int as3722_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
509 struct as3722_pctrl_info *as_pci = to_as_pci(chip);
511 return as3722_irq_get_virq(as_pci->as3722, offset);
514 static int as3722_gpio_request(struct gpio_chip *chip, unsigned offset)
516 return pinctrl_request_gpio(chip->base + offset);
519 static void as3722_gpio_free(struct gpio_chip *chip, unsigned offset)
521 pinctrl_free_gpio(chip->base + offset);
524 static const struct gpio_chip as3722_gpio_chip = {
525 .label = "as3722-gpio",
526 .owner = THIS_MODULE,
527 .request = as3722_gpio_request,
528 .free = as3722_gpio_free,
529 .get = as3722_gpio_get,
530 .set = as3722_gpio_set,
531 .direction_input = as3722_gpio_direction_input,
532 .direction_output = as3722_gpio_direction_output,
533 .to_irq = as3722_gpio_to_irq,
535 .ngpio = AS3722_PIN_NUM,
539 static int as3722_pinctrl_probe(struct platform_device *pdev)
541 struct as3722_pctrl_info *as_pci;
545 as_pci = devm_kzalloc(&pdev->dev, sizeof(*as_pci), GFP_KERNEL);
549 as_pci->dev = &pdev->dev;
550 as_pci->dev->of_node = pdev->dev.parent->of_node;
551 as_pci->as3722 = dev_get_drvdata(pdev->dev.parent);
552 platform_set_drvdata(pdev, as_pci);
554 as_pci->pins = as3722_pins_desc;
555 as_pci->num_pins = ARRAY_SIZE(as3722_pins_desc);
556 as_pci->functions = as3722_pin_function;
557 as_pci->num_functions = ARRAY_SIZE(as3722_pin_function);
558 as_pci->pin_groups = as3722_pingroups;
559 as_pci->num_pin_groups = ARRAY_SIZE(as3722_pingroups);
560 as3722_pinctrl_desc.name = dev_name(&pdev->dev);
561 as3722_pinctrl_desc.pins = as3722_pins_desc;
562 as3722_pinctrl_desc.npins = ARRAY_SIZE(as3722_pins_desc);
563 as_pci->pctl = pinctrl_register(&as3722_pinctrl_desc,
566 dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
570 as_pci->gpio_chip = as3722_gpio_chip;
571 as_pci->gpio_chip.dev = &pdev->dev;
572 as_pci->gpio_chip.of_node = pdev->dev.parent->of_node;
573 ret = gpiochip_add(&as_pci->gpio_chip);
575 dev_err(&pdev->dev, "Couldn't register gpiochip, %d\n", ret);
579 ret = gpiochip_add_pin_range(&as_pci->gpio_chip, dev_name(&pdev->dev),
580 0, 0, AS3722_PIN_NUM);
582 dev_err(&pdev->dev, "Couldn't add pin range, %d\n", ret);
589 tret = gpiochip_remove(&as_pci->gpio_chip);
591 dev_warn(&pdev->dev, "Couldn't remove gpio chip, %d\n", tret);
594 pinctrl_unregister(as_pci->pctl);
598 static int as3722_pinctrl_remove(struct platform_device *pdev)
600 struct as3722_pctrl_info *as_pci = platform_get_drvdata(pdev);
603 ret = gpiochip_remove(&as_pci->gpio_chip);
606 pinctrl_unregister(as_pci->pctl);
610 static struct of_device_id as3722_pinctrl_of_match[] = {
611 { .compatible = "ams,as3722-pinctrl", },
614 MODULE_DEVICE_TABLE(of, as3722_pinctrl_of_match);
616 static struct platform_driver as3722_pinctrl_driver = {
618 .name = "as3722-pinctrl",
619 .owner = THIS_MODULE,
620 .of_match_table = as3722_pinctrl_of_match,
622 .probe = as3722_pinctrl_probe,
623 .remove = as3722_pinctrl_remove,
625 module_platform_driver(as3722_pinctrl_driver);
627 MODULE_ALIAS("platform:as3722-pinctrl");
628 MODULE_DESCRIPTION("AS3722 pin control and GPIO driver");
629 MODULE_AUTHOR("Laxman Dewangan<ldewangan@nvidia.com>");
630 MODULE_LICENSE("GPL v2");