2 * Allwinner A1X SoCs pinctrl driver.
4 * Copyright (C) 2012 Maxime Ripard
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #ifndef __PINCTRL_SUNXI_PINS_H
14 #define __PINCTRL_SUNXI_PINS_H
16 #include "pinctrl-sunxi.h"
18 static const struct sunxi_desc_pin sun7i_a20_pins[] = {
19 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
20 SUNXI_FUNCTION(0x0, "gpio_in"),
21 SUNXI_FUNCTION(0x1, "gpio_out"),
22 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
23 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
24 SUNXI_FUNCTION(0x4, "uart2"), /* RTS */
25 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD3 */
26 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
27 SUNXI_FUNCTION(0x0, "gpio_in"),
28 SUNXI_FUNCTION(0x1, "gpio_out"),
29 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
30 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
31 SUNXI_FUNCTION(0x4, "uart2"), /* CTS */
32 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD2 */
33 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
34 SUNXI_FUNCTION(0x0, "gpio_in"),
35 SUNXI_FUNCTION(0x1, "gpio_out"),
36 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
37 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
38 SUNXI_FUNCTION(0x4, "uart2"), /* TX */
39 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD1 */
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out"),
43 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
44 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
45 SUNXI_FUNCTION(0x4, "uart2"), /* RX */
46 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD0 */
47 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
48 SUNXI_FUNCTION(0x0, "gpio_in"),
49 SUNXI_FUNCTION(0x1, "gpio_out"),
50 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
51 SUNXI_FUNCTION(0x3, "spi1"), /* CS1 */
52 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD3 */
53 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
54 SUNXI_FUNCTION(0x0, "gpio_in"),
55 SUNXI_FUNCTION(0x1, "gpio_out"),
56 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
57 SUNXI_FUNCTION(0x3, "spi3"), /* CS0 */
58 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD2 */
59 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
60 SUNXI_FUNCTION(0x0, "gpio_in"),
61 SUNXI_FUNCTION(0x1, "gpio_out"),
62 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
63 SUNXI_FUNCTION(0x3, "spi3"), /* CLK */
64 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD1 */
65 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
66 SUNXI_FUNCTION(0x0, "gpio_in"),
67 SUNXI_FUNCTION(0x1, "gpio_out"),
68 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
69 SUNXI_FUNCTION(0x3, "spi3"), /* MOSI */
70 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD0 */
71 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
72 SUNXI_FUNCTION(0x0, "gpio_in"),
73 SUNXI_FUNCTION(0x1, "gpio_out"),
74 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
75 SUNXI_FUNCTION(0x3, "spi3"), /* MISO */
76 SUNXI_FUNCTION(0x5, "gmac")), /* GRXCK */
77 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
78 SUNXI_FUNCTION(0x0, "gpio_in"),
79 SUNXI_FUNCTION(0x1, "gpio_out"),
80 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
81 SUNXI_FUNCTION(0x3, "spi3"), /* CS1 */
82 SUNXI_FUNCTION(0x5, "gmac"), /* GNULL / ERXERR */
83 SUNXI_FUNCTION(0x6, "i2s1")), /* MCLK */
84 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
85 SUNXI_FUNCTION(0x0, "gpio_in"),
86 SUNXI_FUNCTION(0x1, "gpio_out"),
87 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
88 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
89 SUNXI_FUNCTION(0x5, "gmac")), /* GRXCTL / ERXDV */
90 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
91 SUNXI_FUNCTION(0x0, "gpio_in"),
92 SUNXI_FUNCTION(0x1, "gpio_out"),
93 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
94 SUNXI_FUNCTION(0x4, "uart1"), /* RX */
95 SUNXI_FUNCTION(0x5, "gmac")), /* EMDC */
96 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
97 SUNXI_FUNCTION(0x0, "gpio_in"),
98 SUNXI_FUNCTION(0x1, "gpio_out"),
99 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
100 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
101 SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
102 SUNXI_FUNCTION(0x5, "gmac")), /* EMDIO */
103 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
104 SUNXI_FUNCTION(0x0, "gpio_in"),
105 SUNXI_FUNCTION(0x1, "gpio_out"),
106 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
107 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
108 SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
109 SUNXI_FUNCTION(0x5, "gmac")), /* GTXCTL / ETXEN */
110 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
111 SUNXI_FUNCTION(0x0, "gpio_in"),
112 SUNXI_FUNCTION(0x1, "gpio_out"),
113 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
114 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
115 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
116 SUNXI_FUNCTION(0x5, "gmac"), /* GNULL / ETXCK */
117 SUNXI_FUNCTION(0x6, "i2s1")), /* BCLK */
118 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
119 SUNXI_FUNCTION(0x0, "gpio_in"),
120 SUNXI_FUNCTION(0x1, "gpio_out"),
121 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
122 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
123 SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
124 SUNXI_FUNCTION(0x5, "gmac"), /* GTXCK / ECRS */
125 SUNXI_FUNCTION(0x6, "i2s1")), /* LRCK */
126 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
127 SUNXI_FUNCTION(0x0, "gpio_in"),
128 SUNXI_FUNCTION(0x1, "gpio_out"),
129 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
130 SUNXI_FUNCTION(0x3, "can"), /* TX */
131 SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
132 SUNXI_FUNCTION(0x5, "gmac"), /* GCLKIN / ECOL */
133 SUNXI_FUNCTION(0x6, "i2s1")), /* DO */
134 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
135 SUNXI_FUNCTION(0x0, "gpio_in"),
136 SUNXI_FUNCTION(0x1, "gpio_out"),
137 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
138 SUNXI_FUNCTION(0x3, "can"), /* RX */
139 SUNXI_FUNCTION(0x4, "uart1"), /* RING */
140 SUNXI_FUNCTION(0x5, "gmac"), /* GNULL / ETXERR */
141 SUNXI_FUNCTION(0x6, "i2s1")), /* LRCK */
143 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
147 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
148 SUNXI_FUNCTION(0x0, "gpio_in"),
149 SUNXI_FUNCTION(0x1, "gpio_out"),
150 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
151 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
152 SUNXI_FUNCTION(0x0, "gpio_in"),
153 SUNXI_FUNCTION(0x1, "gpio_out"),
154 SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */
155 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
156 SUNXI_FUNCTION(0x0, "gpio_in"),
157 SUNXI_FUNCTION(0x1, "gpio_out"),
158 SUNXI_FUNCTION(0x2, "ir0"), /* TX */
159 SUNXI_FUNCTION(0x4, "spdif")), /* MCLK */
160 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
161 SUNXI_FUNCTION(0x0, "gpio_in"),
162 SUNXI_FUNCTION(0x1, "gpio_out"),
163 SUNXI_FUNCTION(0x2, "ir0")), /* RX */
164 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
168 SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */
169 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
170 SUNXI_FUNCTION(0x0, "gpio_in"),
171 SUNXI_FUNCTION(0x1, "gpio_out"),
172 SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
173 SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */
174 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
175 SUNXI_FUNCTION(0x0, "gpio_in"),
176 SUNXI_FUNCTION(0x1, "gpio_out"),
177 SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */
178 SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */
179 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
180 SUNXI_FUNCTION(0x0, "gpio_in"),
181 SUNXI_FUNCTION(0x1, "gpio_out"),
182 SUNXI_FUNCTION(0x2, "i2s0"), /* DO0 */
183 SUNXI_FUNCTION(0x3, "ac97")), /* DO */
184 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "i2s0")), /* DO1 */
188 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
189 SUNXI_FUNCTION(0x0, "gpio_in"),
190 SUNXI_FUNCTION(0x1, "gpio_out"),
191 SUNXI_FUNCTION(0x2, "i2s0")), /* DO2 */
192 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
193 SUNXI_FUNCTION(0x0, "gpio_in"),
194 SUNXI_FUNCTION(0x1, "gpio_out"),
195 SUNXI_FUNCTION(0x2, "i2s0")), /* DO3 */
196 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
197 SUNXI_FUNCTION(0x0, "gpio_in"),
198 SUNXI_FUNCTION(0x1, "gpio_out"),
199 SUNXI_FUNCTION(0x2, "i2s0"), /* DI */
200 SUNXI_FUNCTION(0x3, "ac97"), /* DI */
201 SUNXI_FUNCTION(0x4, "spdif")), /* DI */
202 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
203 SUNXI_FUNCTION(0x0, "gpio_in"),
204 SUNXI_FUNCTION(0x1, "gpio_out"),
205 SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */
206 SUNXI_FUNCTION(0x4, "spdif")), /* DO */
207 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
208 SUNXI_FUNCTION(0x0, "gpio_in"),
209 SUNXI_FUNCTION(0x1, "gpio_out"),
210 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
211 SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */
212 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
213 SUNXI_FUNCTION(0x0, "gpio_in"),
214 SUNXI_FUNCTION(0x1, "gpio_out"),
215 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
216 SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */
217 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
218 SUNXI_FUNCTION(0x0, "gpio_in"),
219 SUNXI_FUNCTION(0x1, "gpio_out"),
220 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
221 SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */
222 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
223 SUNXI_FUNCTION(0x0, "gpio_in"),
224 SUNXI_FUNCTION(0x1, "gpio_out"),
225 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
226 SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */
227 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
228 SUNXI_FUNCTION(0x0, "gpio_in"),
229 SUNXI_FUNCTION(0x1, "gpio_out"),
230 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
231 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
232 SUNXI_FUNCTION(0x0, "gpio_in"),
233 SUNXI_FUNCTION(0x1, "gpio_out"),
234 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
235 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out"),
238 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
239 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
240 SUNXI_FUNCTION(0x0, "gpio_in"),
241 SUNXI_FUNCTION(0x1, "gpio_out"),
242 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
243 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
244 SUNXI_FUNCTION(0x0, "gpio_in"),
245 SUNXI_FUNCTION(0x1, "gpio_out"),
246 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
247 SUNXI_FUNCTION(0x3, "ir1")), /* TX */
248 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
249 SUNXI_FUNCTION(0x0, "gpio_in"),
250 SUNXI_FUNCTION(0x1, "gpio_out"),
251 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
252 SUNXI_FUNCTION(0x3, "ir1")), /* RX */
254 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
255 SUNXI_FUNCTION(0x0, "gpio_in"),
256 SUNXI_FUNCTION(0x1, "gpio_out"),
257 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
258 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
259 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
260 SUNXI_FUNCTION(0x0, "gpio_in"),
261 SUNXI_FUNCTION(0x1, "gpio_out"),
262 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
263 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
264 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
265 SUNXI_FUNCTION(0x0, "gpio_in"),
266 SUNXI_FUNCTION(0x1, "gpio_out"),
267 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
268 SUNXI_FUNCTION(0x3, "spi0")), /* SCK */
269 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
270 SUNXI_FUNCTION(0x0, "gpio_in"),
271 SUNXI_FUNCTION(0x1, "gpio_out"),
272 SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */
273 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
274 SUNXI_FUNCTION(0x0, "gpio_in"),
275 SUNXI_FUNCTION(0x1, "gpio_out"),
276 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
277 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
278 SUNXI_FUNCTION(0x0, "gpio_in"),
279 SUNXI_FUNCTION(0x1, "gpio_out"),
280 SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */
281 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
282 SUNXI_FUNCTION(0x0, "gpio_in"),
283 SUNXI_FUNCTION(0x1, "gpio_out"),
284 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
285 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
286 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
287 SUNXI_FUNCTION(0x0, "gpio_in"),
288 SUNXI_FUNCTION(0x1, "gpio_out"),
289 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
290 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
291 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
292 SUNXI_FUNCTION(0x0, "gpio_in"),
293 SUNXI_FUNCTION(0x1, "gpio_out"),
294 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
295 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
296 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
300 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
301 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
302 SUNXI_FUNCTION(0x0, "gpio_in"),
303 SUNXI_FUNCTION(0x1, "gpio_out"),
304 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
305 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
306 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
307 SUNXI_FUNCTION(0x0, "gpio_in"),
308 SUNXI_FUNCTION(0x1, "gpio_out"),
309 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
310 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
311 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
312 SUNXI_FUNCTION(0x0, "gpio_in"),
313 SUNXI_FUNCTION(0x1, "gpio_out"),
314 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */
315 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
316 SUNXI_FUNCTION(0x0, "gpio_in"),
317 SUNXI_FUNCTION(0x1, "gpio_out"),
318 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */
319 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
320 SUNXI_FUNCTION(0x0, "gpio_in"),
321 SUNXI_FUNCTION(0x1, "gpio_out"),
322 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */
323 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
324 SUNXI_FUNCTION(0x0, "gpio_in"),
325 SUNXI_FUNCTION(0x1, "gpio_out"),
326 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */
327 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
328 SUNXI_FUNCTION(0x0, "gpio_in"),
329 SUNXI_FUNCTION(0x1, "gpio_out"),
330 SUNXI_FUNCTION(0x2, "nand0")), /* NWP */
331 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
332 SUNXI_FUNCTION(0x0, "gpio_in"),
333 SUNXI_FUNCTION(0x1, "gpio_out"),
334 SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */
335 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
336 SUNXI_FUNCTION(0x0, "gpio_in"),
337 SUNXI_FUNCTION(0x1, "gpio_out"),
338 SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */
339 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
340 SUNXI_FUNCTION(0x0, "gpio_in"),
341 SUNXI_FUNCTION(0x1, "gpio_out"),
342 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
343 SUNXI_FUNCTION(0x3, "spi2"), /* CS0 */
344 SUNXI_FUNCTION_IRQ(0x6, 12)), /* EINT12 */
345 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
346 SUNXI_FUNCTION(0x0, "gpio_in"),
347 SUNXI_FUNCTION(0x1, "gpio_out"),
348 SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */
349 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
350 SUNXI_FUNCTION_IRQ(0x6, 13)), /* EINT13 */
351 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
352 SUNXI_FUNCTION(0x0, "gpio_in"),
353 SUNXI_FUNCTION(0x1, "gpio_out"),
354 SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */
355 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
356 SUNXI_FUNCTION_IRQ(0x6, 14)), /* EINT14 */
357 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
358 SUNXI_FUNCTION(0x0, "gpio_in"),
359 SUNXI_FUNCTION(0x1, "gpio_out"),
360 SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */
361 SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
362 SUNXI_FUNCTION_IRQ(0x6, 15)), /* EINT15 */
363 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
364 SUNXI_FUNCTION(0x0, "gpio_in"),
365 SUNXI_FUNCTION(0x1, "gpio_out"),
366 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
367 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
368 SUNXI_FUNCTION(0x0, "gpio_in"),
369 SUNXI_FUNCTION(0x1, "gpio_out"),
370 SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */
372 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
373 SUNXI_FUNCTION(0x0, "gpio_in"),
374 SUNXI_FUNCTION(0x1, "gpio_out"),
375 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
376 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
377 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out"),
380 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
381 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
382 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
383 SUNXI_FUNCTION(0x0, "gpio_in"),
384 SUNXI_FUNCTION(0x1, "gpio_out"),
385 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
386 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
387 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
388 SUNXI_FUNCTION(0x0, "gpio_in"),
389 SUNXI_FUNCTION(0x1, "gpio_out"),
390 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
391 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
392 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
393 SUNXI_FUNCTION(0x0, "gpio_in"),
394 SUNXI_FUNCTION(0x1, "gpio_out"),
395 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
396 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
397 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
398 SUNXI_FUNCTION(0x0, "gpio_in"),
399 SUNXI_FUNCTION(0x1, "gpio_out"),
400 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
401 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
402 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
403 SUNXI_FUNCTION(0x0, "gpio_in"),
404 SUNXI_FUNCTION(0x1, "gpio_out"),
405 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
406 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
407 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
408 SUNXI_FUNCTION(0x0, "gpio_in"),
409 SUNXI_FUNCTION(0x1, "gpio_out"),
410 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
411 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
412 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
413 SUNXI_FUNCTION(0x0, "gpio_in"),
414 SUNXI_FUNCTION(0x1, "gpio_out"),
415 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
416 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
417 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
418 SUNXI_FUNCTION(0x0, "gpio_in"),
419 SUNXI_FUNCTION(0x1, "gpio_out"),
420 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
421 SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */
422 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
423 SUNXI_FUNCTION(0x0, "gpio_in"),
424 SUNXI_FUNCTION(0x1, "gpio_out"),
425 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
426 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
427 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
428 SUNXI_FUNCTION(0x0, "gpio_in"),
429 SUNXI_FUNCTION(0x1, "gpio_out"),
430 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
431 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
432 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
433 SUNXI_FUNCTION(0x0, "gpio_in"),
434 SUNXI_FUNCTION(0x1, "gpio_out"),
435 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
436 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
437 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
438 SUNXI_FUNCTION(0x0, "gpio_in"),
439 SUNXI_FUNCTION(0x1, "gpio_out"),
440 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
441 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
442 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
443 SUNXI_FUNCTION(0x0, "gpio_in"),
444 SUNXI_FUNCTION(0x1, "gpio_out"),
445 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
446 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
447 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
448 SUNXI_FUNCTION(0x0, "gpio_in"),
449 SUNXI_FUNCTION(0x1, "gpio_out"),
450 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
451 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
452 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
453 SUNXI_FUNCTION(0x0, "gpio_in"),
454 SUNXI_FUNCTION(0x1, "gpio_out"),
455 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
456 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
457 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
458 SUNXI_FUNCTION(0x0, "gpio_in"),
459 SUNXI_FUNCTION(0x1, "gpio_out"),
460 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
461 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
462 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
463 SUNXI_FUNCTION(0x0, "gpio_in"),
464 SUNXI_FUNCTION(0x1, "gpio_out"),
465 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
466 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
467 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
468 SUNXI_FUNCTION(0x0, "gpio_in"),
469 SUNXI_FUNCTION(0x1, "gpio_out"),
470 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
471 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
472 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
473 SUNXI_FUNCTION(0x0, "gpio_in"),
474 SUNXI_FUNCTION(0x1, "gpio_out"),
475 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
476 SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */
477 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
478 SUNXI_FUNCTION(0x0, "gpio_in"),
479 SUNXI_FUNCTION(0x1, "gpio_out"),
480 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
481 SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */
482 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
483 SUNXI_FUNCTION(0x0, "gpio_in"),
484 SUNXI_FUNCTION(0x1, "gpio_out"),
485 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
486 SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */
487 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
488 SUNXI_FUNCTION(0x0, "gpio_in"),
489 SUNXI_FUNCTION(0x1, "gpio_out"),
490 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
491 SUNXI_FUNCTION(0x3, "sim")), /* DET */
492 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
493 SUNXI_FUNCTION(0x0, "gpio_in"),
494 SUNXI_FUNCTION(0x1, "gpio_out"),
495 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
496 SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */
497 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
498 SUNXI_FUNCTION(0x0, "gpio_in"),
499 SUNXI_FUNCTION(0x1, "gpio_out"),
500 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
501 SUNXI_FUNCTION(0x3, "sim")), /* RST */
502 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
503 SUNXI_FUNCTION(0x0, "gpio_in"),
504 SUNXI_FUNCTION(0x1, "gpio_out"),
505 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
506 SUNXI_FUNCTION(0x3, "sim")), /* SCK */
507 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
508 SUNXI_FUNCTION(0x0, "gpio_in"),
509 SUNXI_FUNCTION(0x1, "gpio_out"),
510 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
511 SUNXI_FUNCTION(0x3, "sim")), /* SDA */
513 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
514 SUNXI_FUNCTION(0x0, "gpio_in"),
515 SUNXI_FUNCTION(0x1, "gpio_out"),
516 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
517 SUNXI_FUNCTION(0x3, "csi0")), /* PCK */
518 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
519 SUNXI_FUNCTION(0x0, "gpio_in"),
520 SUNXI_FUNCTION(0x1, "gpio_out"),
521 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
522 SUNXI_FUNCTION(0x3, "csi0")), /* CK */
523 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
524 SUNXI_FUNCTION(0x0, "gpio_in"),
525 SUNXI_FUNCTION(0x1, "gpio_out"),
526 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
527 SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */
528 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
529 SUNXI_FUNCTION(0x0, "gpio_in"),
530 SUNXI_FUNCTION(0x1, "gpio_out"),
531 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
532 SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */
533 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
534 SUNXI_FUNCTION(0x0, "gpio_in"),
535 SUNXI_FUNCTION(0x1, "gpio_out"),
536 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
537 SUNXI_FUNCTION(0x3, "csi0")), /* D0 */
538 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
539 SUNXI_FUNCTION(0x0, "gpio_in"),
540 SUNXI_FUNCTION(0x1, "gpio_out"),
541 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
542 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
543 SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */
544 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
545 SUNXI_FUNCTION(0x0, "gpio_in"),
546 SUNXI_FUNCTION(0x1, "gpio_out"),
547 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
548 SUNXI_FUNCTION(0x3, "csi0")), /* D2 */
549 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
550 SUNXI_FUNCTION(0x0, "gpio_in"),
551 SUNXI_FUNCTION(0x1, "gpio_out"),
552 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
553 SUNXI_FUNCTION(0x3, "csi0")), /* D3 */
554 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
555 SUNXI_FUNCTION(0x0, "gpio_in"),
556 SUNXI_FUNCTION(0x1, "gpio_out"),
557 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
558 SUNXI_FUNCTION(0x3, "csi0")), /* D4 */
559 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
560 SUNXI_FUNCTION(0x0, "gpio_in"),
561 SUNXI_FUNCTION(0x1, "gpio_out"),
562 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
563 SUNXI_FUNCTION(0x3, "csi0")), /* D5 */
564 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
565 SUNXI_FUNCTION(0x0, "gpio_in"),
566 SUNXI_FUNCTION(0x1, "gpio_out"),
567 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
568 SUNXI_FUNCTION(0x3, "csi0")), /* D6 */
569 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
570 SUNXI_FUNCTION(0x0, "gpio_in"),
571 SUNXI_FUNCTION(0x1, "gpio_out"),
572 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
573 SUNXI_FUNCTION(0x3, "csi0")), /* D7 */
575 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
576 SUNXI_FUNCTION(0x0, "gpio_in"),
577 SUNXI_FUNCTION(0x1, "gpio_out"),
578 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
579 SUNXI_FUNCTION(0x4, "jtag")), /* MSI */
580 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
581 SUNXI_FUNCTION(0x0, "gpio_in"),
582 SUNXI_FUNCTION(0x1, "gpio_out"),
583 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
584 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
585 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
586 SUNXI_FUNCTION(0x0, "gpio_in"),
587 SUNXI_FUNCTION(0x1, "gpio_out"),
588 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
589 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
590 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
591 SUNXI_FUNCTION(0x0, "gpio_in"),
592 SUNXI_FUNCTION(0x1, "gpio_out"),
593 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
594 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
595 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
596 SUNXI_FUNCTION(0x0, "gpio_in"),
597 SUNXI_FUNCTION(0x1, "gpio_out"),
598 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
599 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
600 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
601 SUNXI_FUNCTION(0x0, "gpio_in"),
602 SUNXI_FUNCTION(0x1, "gpio_out"),
603 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
604 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
606 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
607 SUNXI_FUNCTION(0x0, "gpio_in"),
608 SUNXI_FUNCTION(0x1, "gpio_out"),
609 SUNXI_FUNCTION(0x2, "ts1"), /* CLK */
610 SUNXI_FUNCTION(0x3, "csi1"), /* PCK */
611 SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */
612 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
613 SUNXI_FUNCTION(0x0, "gpio_in"),
614 SUNXI_FUNCTION(0x1, "gpio_out"),
615 SUNXI_FUNCTION(0x2, "ts1"), /* ERR */
616 SUNXI_FUNCTION(0x3, "csi1"), /* CK */
617 SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */
618 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
619 SUNXI_FUNCTION(0x0, "gpio_in"),
620 SUNXI_FUNCTION(0x1, "gpio_out"),
621 SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */
622 SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */
623 SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */
624 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
625 SUNXI_FUNCTION(0x0, "gpio_in"),
626 SUNXI_FUNCTION(0x1, "gpio_out"),
627 SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */
628 SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */
629 SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */
630 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
631 SUNXI_FUNCTION(0x0, "gpio_in"),
632 SUNXI_FUNCTION(0x1, "gpio_out"),
633 SUNXI_FUNCTION(0x2, "ts1"), /* D0 */
634 SUNXI_FUNCTION(0x3, "csi1"), /* D0 */
635 SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */
636 SUNXI_FUNCTION(0x5, "csi0")), /* D8 */
637 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
638 SUNXI_FUNCTION(0x0, "gpio_in"),
639 SUNXI_FUNCTION(0x1, "gpio_out"),
640 SUNXI_FUNCTION(0x2, "ts1"), /* D1 */
641 SUNXI_FUNCTION(0x3, "csi1"), /* D1 */
642 SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */
643 SUNXI_FUNCTION(0x5, "csi0")), /* D9 */
644 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
645 SUNXI_FUNCTION(0x0, "gpio_in"),
646 SUNXI_FUNCTION(0x1, "gpio_out"),
647 SUNXI_FUNCTION(0x2, "ts1"), /* D2 */
648 SUNXI_FUNCTION(0x3, "csi1"), /* D2 */
649 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
650 SUNXI_FUNCTION(0x5, "csi0")), /* D10 */
651 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
652 SUNXI_FUNCTION(0x0, "gpio_in"),
653 SUNXI_FUNCTION(0x1, "gpio_out"),
654 SUNXI_FUNCTION(0x2, "ts1"), /* D3 */
655 SUNXI_FUNCTION(0x3, "csi1"), /* D3 */
656 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
657 SUNXI_FUNCTION(0x5, "csi0")), /* D11 */
658 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
659 SUNXI_FUNCTION(0x0, "gpio_in"),
660 SUNXI_FUNCTION(0x1, "gpio_out"),
661 SUNXI_FUNCTION(0x2, "ts1"), /* D4 */
662 SUNXI_FUNCTION(0x3, "csi1"), /* D4 */
663 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
664 SUNXI_FUNCTION(0x5, "csi0")), /* D12 */
665 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
666 SUNXI_FUNCTION(0x0, "gpio_in"),
667 SUNXI_FUNCTION(0x1, "gpio_out"),
668 SUNXI_FUNCTION(0x2, "ts1"), /* D5 */
669 SUNXI_FUNCTION(0x3, "csi1"), /* D5 */
670 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
671 SUNXI_FUNCTION(0x5, "csi0")), /* D13 */
672 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
673 SUNXI_FUNCTION(0x0, "gpio_in"),
674 SUNXI_FUNCTION(0x1, "gpio_out"),
675 SUNXI_FUNCTION(0x2, "ts1"), /* D6 */
676 SUNXI_FUNCTION(0x3, "csi1"), /* D6 */
677 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
678 SUNXI_FUNCTION(0x5, "csi0")), /* D14 */
679 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
680 SUNXI_FUNCTION(0x0, "gpio_in"),
681 SUNXI_FUNCTION(0x1, "gpio_out"),
682 SUNXI_FUNCTION(0x2, "ts1"), /* D7 */
683 SUNXI_FUNCTION(0x3, "csi1"), /* D7 */
684 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
685 SUNXI_FUNCTION(0x5, "csi0")), /* D15 */
687 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
688 SUNXI_FUNCTION(0x0, "gpio_in"),
689 SUNXI_FUNCTION(0x1, "gpio_out"),
690 SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */
691 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
692 SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */
693 SUNXI_FUNCTION(0x7, "csi1")), /* D0 */
694 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
695 SUNXI_FUNCTION(0x0, "gpio_in"),
696 SUNXI_FUNCTION(0x1, "gpio_out"),
697 SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */
698 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
699 SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */
700 SUNXI_FUNCTION(0x7, "csi1")), /* D1 */
701 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
702 SUNXI_FUNCTION(0x0, "gpio_in"),
703 SUNXI_FUNCTION(0x1, "gpio_out"),
704 SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */
705 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
706 SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */
707 SUNXI_FUNCTION(0x7, "csi1")), /* D2 */
708 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
709 SUNXI_FUNCTION(0x0, "gpio_in"),
710 SUNXI_FUNCTION(0x1, "gpio_out"),
711 SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */
712 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
713 SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */
714 SUNXI_FUNCTION(0x7, "csi1")), /* D3 */
715 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
716 SUNXI_FUNCTION(0x0, "gpio_in"),
717 SUNXI_FUNCTION(0x1, "gpio_out"),
718 SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */
719 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
720 SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */
721 SUNXI_FUNCTION(0x7, "csi1")), /* D4 */
722 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
723 SUNXI_FUNCTION(0x0, "gpio_in"),
724 SUNXI_FUNCTION(0x1, "gpio_out"),
725 SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */
726 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
727 SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */
728 SUNXI_FUNCTION(0x7, "csi1")), /* D5 */
729 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
730 SUNXI_FUNCTION(0x0, "gpio_in"),
731 SUNXI_FUNCTION(0x1, "gpio_out"),
732 SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */
733 SUNXI_FUNCTION(0x4, "uart5"), /* TX */
734 SUNXI_FUNCTION(0x5, "ms"), /* BS */
735 SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */
736 SUNXI_FUNCTION(0x7, "csi1")), /* D6 */
737 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
738 SUNXI_FUNCTION(0x0, "gpio_in"),
739 SUNXI_FUNCTION(0x1, "gpio_out"),
740 SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */
741 SUNXI_FUNCTION(0x4, "uart5"), /* RX */
742 SUNXI_FUNCTION(0x5, "ms"), /* CLK */
743 SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */
744 SUNXI_FUNCTION(0x7, "csi1")), /* D7 */
745 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
746 SUNXI_FUNCTION(0x0, "gpio_in"),
747 SUNXI_FUNCTION(0x1, "gpio_out"),
748 SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */
749 SUNXI_FUNCTION(0x3, "emac"), /* ERXD3 */
750 SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */
751 SUNXI_FUNCTION(0x5, "ms"), /* D0 */
752 SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */
753 SUNXI_FUNCTION(0x7, "csi1")), /* D8 */
754 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
755 SUNXI_FUNCTION(0x0, "gpio_in"),
756 SUNXI_FUNCTION(0x1, "gpio_out"),
757 SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */
758 SUNXI_FUNCTION(0x3, "emac"), /* ERXD2 */
759 SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */
760 SUNXI_FUNCTION(0x5, "ms"), /* D1 */
761 SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */
762 SUNXI_FUNCTION(0x7, "csi1")), /* D9 */
763 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
764 SUNXI_FUNCTION(0x0, "gpio_in"),
765 SUNXI_FUNCTION(0x1, "gpio_out"),
766 SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */
767 SUNXI_FUNCTION(0x3, "emac"), /* ERXD1 */
768 SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */
769 SUNXI_FUNCTION(0x5, "ms"), /* D2 */
770 SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */
771 SUNXI_FUNCTION(0x7, "csi1")), /* D10 */
772 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
773 SUNXI_FUNCTION(0x0, "gpio_in"),
774 SUNXI_FUNCTION(0x1, "gpio_out"),
775 SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */
776 SUNXI_FUNCTION(0x3, "emac"), /* ERXD0 */
777 SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */
778 SUNXI_FUNCTION(0x5, "ms"), /* D3 */
779 SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */
780 SUNXI_FUNCTION(0x7, "csi1")), /* D11 */
781 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
782 SUNXI_FUNCTION(0x0, "gpio_in"),
783 SUNXI_FUNCTION(0x1, "gpio_out"),
784 SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */
785 SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */
786 SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */
787 SUNXI_FUNCTION(0x7, "csi1")), /* D12 */
788 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
789 SUNXI_FUNCTION(0x0, "gpio_in"),
790 SUNXI_FUNCTION(0x1, "gpio_out"),
791 SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */
792 SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */
793 SUNXI_FUNCTION(0x5, "sim"), /* RST */
794 SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */
795 SUNXI_FUNCTION(0x7, "csi1")), /* D13 */
796 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
797 SUNXI_FUNCTION(0x0, "gpio_in"),
798 SUNXI_FUNCTION(0x1, "gpio_out"),
799 SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */
800 SUNXI_FUNCTION(0x3, "emac"), /* ETXD3 */
801 SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */
802 SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
803 SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */
804 SUNXI_FUNCTION(0x7, "csi1")), /* D14 */
805 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
806 SUNXI_FUNCTION(0x0, "gpio_in"),
807 SUNXI_FUNCTION(0x1, "gpio_out"),
808 SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */
809 SUNXI_FUNCTION(0x3, "emac"), /* ETXD3 */
810 SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */
811 SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
812 SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */
813 SUNXI_FUNCTION(0x7, "csi1")), /* D15 */
814 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
815 SUNXI_FUNCTION(0x0, "gpio_in"),
816 SUNXI_FUNCTION(0x1, "gpio_out"),
817 SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */
818 SUNXI_FUNCTION(0x3, "emac"), /* ETXD2 */
819 SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */
820 SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */
821 SUNXI_FUNCTION(0x7, "csi1")), /* D16 */
822 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
823 SUNXI_FUNCTION(0x0, "gpio_in"),
824 SUNXI_FUNCTION(0x1, "gpio_out"),
825 SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */
826 SUNXI_FUNCTION(0x3, "emac"), /* ETXD1 */
827 SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */
828 SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
829 SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */
830 SUNXI_FUNCTION(0x7, "csi1")), /* D17 */
831 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
832 SUNXI_FUNCTION(0x0, "gpio_in"),
833 SUNXI_FUNCTION(0x1, "gpio_out"),
834 SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */
835 SUNXI_FUNCTION(0x3, "emac"), /* ETXD0 */
836 SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */
837 SUNXI_FUNCTION(0x5, "sim"), /* SCK */
838 SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */
839 SUNXI_FUNCTION(0x7, "csi1")), /* D18 */
840 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
841 SUNXI_FUNCTION(0x0, "gpio_in"),
842 SUNXI_FUNCTION(0x1, "gpio_out"),
843 SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */
844 SUNXI_FUNCTION(0x3, "emac"), /* ERXERR */
845 SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */
846 SUNXI_FUNCTION(0x5, "sim"), /* SDA */
847 SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */
848 SUNXI_FUNCTION(0x7, "csi1")), /* D19 */
849 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
850 SUNXI_FUNCTION(0x0, "gpio_in"),
851 SUNXI_FUNCTION(0x1, "gpio_out"),
852 SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */
853 SUNXI_FUNCTION(0x3, "emac"), /* ERXDV */
854 SUNXI_FUNCTION(0x4, "can"), /* TX */
855 SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */
856 SUNXI_FUNCTION(0x7, "csi1")), /* D20 */
857 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
858 SUNXI_FUNCTION(0x0, "gpio_in"),
859 SUNXI_FUNCTION(0x1, "gpio_out"),
860 SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */
861 SUNXI_FUNCTION(0x3, "emac"), /* EMDC */
862 SUNXI_FUNCTION(0x4, "can"), /* RX */
863 SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */
864 SUNXI_FUNCTION(0x7, "csi1")), /* D21 */
865 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
866 SUNXI_FUNCTION(0x0, "gpio_in"),
867 SUNXI_FUNCTION(0x1, "gpio_out"),
868 SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */
869 SUNXI_FUNCTION(0x3, "emac"), /* EMDIO */
870 SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */
871 SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */
872 SUNXI_FUNCTION(0x7, "csi1")), /* D22 */
873 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
874 SUNXI_FUNCTION(0x0, "gpio_in"),
875 SUNXI_FUNCTION(0x1, "gpio_out"),
876 SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */
877 SUNXI_FUNCTION(0x3, "emac"), /* ETXEN */
878 SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */
879 SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */
880 SUNXI_FUNCTION(0x7, "csi1")), /* D23 */
881 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
882 SUNXI_FUNCTION(0x0, "gpio_in"),
883 SUNXI_FUNCTION(0x1, "gpio_out"),
884 SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */
885 SUNXI_FUNCTION(0x3, "emac"), /* ETXCK */
886 SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */
887 SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */
888 SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */
889 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
890 SUNXI_FUNCTION(0x0, "gpio_in"),
891 SUNXI_FUNCTION(0x1, "gpio_out"),
892 SUNXI_FUNCTION(0x2, "lcd1"), /* DE */
893 SUNXI_FUNCTION(0x3, "emac"), /* ECRS */
894 SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */
895 SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */
896 SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */
897 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
898 SUNXI_FUNCTION(0x0, "gpio_in"),
899 SUNXI_FUNCTION(0x1, "gpio_out"),
900 SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */
901 SUNXI_FUNCTION(0x3, "emac"), /* ECOL */
902 SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */
903 SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */
904 SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */
905 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
906 SUNXI_FUNCTION(0x0, "gpio_in"),
907 SUNXI_FUNCTION(0x1, "gpio_out"),
908 SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */
909 SUNXI_FUNCTION(0x3, "emac"), /* ETXERR */
910 SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */
911 SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */
912 SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */
914 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
915 SUNXI_FUNCTION(0x0, "gpio_in"),
916 SUNXI_FUNCTION(0x1, "gpio_out"),
917 SUNXI_FUNCTION(0x3, "i2c3")), /* SCK */
918 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
919 SUNXI_FUNCTION(0x0, "gpio_in"),
920 SUNXI_FUNCTION(0x1, "gpio_out"),
921 SUNXI_FUNCTION(0x3, "i2c3")), /* SDA */
922 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
923 SUNXI_FUNCTION(0x0, "gpio_in"),
924 SUNXI_FUNCTION(0x1, "gpio_out"),
925 SUNXI_FUNCTION(0x3, "i2c4")), /* SCK */
926 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
927 SUNXI_FUNCTION(0x0, "gpio_in"),
928 SUNXI_FUNCTION(0x1, "gpio_out"),
929 SUNXI_FUNCTION(0x2, "pwm"), /* PWM1 */
930 SUNXI_FUNCTION(0x3, "i2c4")), /* SDA */
931 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
932 SUNXI_FUNCTION(0x0, "gpio_in"),
933 SUNXI_FUNCTION(0x1, "gpio_out"),
934 SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */
935 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
936 SUNXI_FUNCTION(0x0, "gpio_in"),
937 SUNXI_FUNCTION(0x1, "gpio_out"),
938 SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */
939 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
940 SUNXI_FUNCTION(0x0, "gpio_in"),
941 SUNXI_FUNCTION(0x1, "gpio_out"),
942 SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */
943 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
944 SUNXI_FUNCTION(0x0, "gpio_in"),
945 SUNXI_FUNCTION(0x1, "gpio_out"),
946 SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */
947 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
948 SUNXI_FUNCTION(0x0, "gpio_in"),
949 SUNXI_FUNCTION(0x1, "gpio_out"),
950 SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */
951 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
952 SUNXI_FUNCTION(0x0, "gpio_in"),
953 SUNXI_FUNCTION(0x1, "gpio_out"),
954 SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */
955 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
956 SUNXI_FUNCTION(0x0, "gpio_in"),
957 SUNXI_FUNCTION(0x1, "gpio_out"),
958 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
959 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
960 SUNXI_FUNCTION_IRQ(0x5, 22)), /* EINT22 */
961 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
962 SUNXI_FUNCTION(0x0, "gpio_in"),
963 SUNXI_FUNCTION(0x1, "gpio_out"),
964 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
965 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
966 SUNXI_FUNCTION_IRQ(0x5, 23)), /* EINT23 */
967 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
968 SUNXI_FUNCTION(0x0, "gpio_in"),
969 SUNXI_FUNCTION(0x1, "gpio_out"),
970 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
971 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
972 SUNXI_FUNCTION(0x4, "clk_out_a"), /* CLK_OUT_A */
973 SUNXI_FUNCTION_IRQ(0x5, 24)), /* EINT24 */
974 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
975 SUNXI_FUNCTION(0x0, "gpio_in"),
976 SUNXI_FUNCTION(0x1, "gpio_out"),
977 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
978 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
979 SUNXI_FUNCTION(0x4, "clk_out_b"), /* CLK_OUT_B */
980 SUNXI_FUNCTION_IRQ(0x5, 25)), /* EINT25 */
981 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
982 SUNXI_FUNCTION(0x0, "gpio_in"),
983 SUNXI_FUNCTION(0x1, "gpio_out"),
984 SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */
985 SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */
986 SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */
987 SUNXI_FUNCTION_IRQ(0x5, 26)), /* EINT26 */
988 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
989 SUNXI_FUNCTION(0x0, "gpio_in"),
990 SUNXI_FUNCTION(0x1, "gpio_out"),
991 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
992 SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */
993 SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */
994 SUNXI_FUNCTION_IRQ(0x5, 27)), /* EINT27 */
995 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
996 SUNXI_FUNCTION(0x0, "gpio_in"),
997 SUNXI_FUNCTION(0x1, "gpio_out"),
998 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
999 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
1000 SUNXI_FUNCTION_IRQ(0x5, 28)), /* EINT28 */
1001 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
1002 SUNXI_FUNCTION(0x0, "gpio_in"),
1003 SUNXI_FUNCTION(0x1, "gpio_out"),
1004 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
1005 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
1006 SUNXI_FUNCTION_IRQ(0x5, 29)), /* EINT29 */
1007 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
1008 SUNXI_FUNCTION(0x0, "gpio_in"),
1009 SUNXI_FUNCTION(0x1, "gpio_out"),
1010 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
1011 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
1012 SUNXI_FUNCTION_IRQ(0x5, 30)), /* EINT30 */
1013 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
1014 SUNXI_FUNCTION(0x0, "gpio_in"),
1015 SUNXI_FUNCTION(0x1, "gpio_out"),
1016 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
1017 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
1018 SUNXI_FUNCTION_IRQ(0x5, 31)), /* EINT31 */
1019 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
1020 SUNXI_FUNCTION(0x0, "gpio_in"),
1021 SUNXI_FUNCTION(0x1, "gpio_out"),
1022 SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */
1023 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
1024 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
1025 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1026 SUNXI_FUNCTION(0x0, "gpio_in"),
1027 SUNXI_FUNCTION(0x1, "gpio_out"),
1028 SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */
1029 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
1030 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
1033 static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_data = {
1034 .pins = sun7i_a20_pins,
1035 .npins = ARRAY_SIZE(sun7i_a20_pins),
1038 #endif /* __PINCTRL_SUNXI_PINS_H */
projects / karo-tx-linux.git / blob