drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h

   1 /*
   2  * Allwinner A1X SoCs pinctrl driver.
   3  *
   4  * Copyright (C) 2012 Maxime Ripard
   5  *
   6  * Maxime Ripard <maxime.ripard@free-electrons.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #ifndef __PINCTRL_SUNXI_PINS_H
  14 #define __PINCTRL_SUNXI_PINS_H
  15
  16 #include "pinctrl-sunxi.h"
  17
  18 static const struct sunxi_desc_pin sun5i_a13_pins[] = {
  19         /* Hole */
  20         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
  21                   SUNXI_FUNCTION(0x0, "gpio_in"),
  22                   SUNXI_FUNCTION(0x1, "gpio_out"),
  23                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SCK */
  24         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
  25                   SUNXI_FUNCTION(0x0, "gpio_in"),
  26                   SUNXI_FUNCTION(0x1, "gpio_out"),
  27                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SDA */
  28         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
  29                   SUNXI_FUNCTION(0x0, "gpio_in"),
  30                   SUNXI_FUNCTION(0x1, "gpio_out"),
  31                   SUNXI_FUNCTION(0x2, "pwm"),
  32                   SUNXI_FUNCTION_IRQ(0x6, 16)),         /* EINT16 */
  33         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
  34                   SUNXI_FUNCTION(0x0, "gpio_in"),
  35                   SUNXI_FUNCTION(0x1, "gpio_out"),
  36                   SUNXI_FUNCTION(0x2, "ir0"),           /* TX */
  37                   SUNXI_FUNCTION_IRQ(0x6, 17)),         /* EINT17 */
  38         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
  39                   SUNXI_FUNCTION(0x0, "gpio_in"),
  40                   SUNXI_FUNCTION(0x1, "gpio_out"),
  41                   SUNXI_FUNCTION(0x2, "ir0"),           /* RX */
  42                   SUNXI_FUNCTION_IRQ(0x6, 18)),         /* EINT18 */
  43         /* Hole */
  44         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
  45                   SUNXI_FUNCTION(0x0, "gpio_in"),
  46                   SUNXI_FUNCTION(0x1, "gpio_out"),
  47                   SUNXI_FUNCTION(0x2, "spi2"),          /* CS1 */
  48                   SUNXI_FUNCTION_IRQ(0x6, 24)),         /* EINT24 */
  49         /* Hole */
  50         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
  51                   SUNXI_FUNCTION(0x0, "gpio_in"),
  52                   SUNXI_FUNCTION(0x1, "gpio_out"),
  53                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SCK */
  54         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
  55                   SUNXI_FUNCTION(0x0, "gpio_in"),
  56                   SUNXI_FUNCTION(0x1, "gpio_out"),
  57                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SDA */
  58         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
  59                   SUNXI_FUNCTION(0x0, "gpio_in"),
  60                   SUNXI_FUNCTION(0x1, "gpio_out"),
  61                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SCK */
  62         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
  63                   SUNXI_FUNCTION(0x0, "gpio_in"),
  64                   SUNXI_FUNCTION(0x1, "gpio_out"),
  65                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SDA */
  66         /* Hole */
  67         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
  68                   SUNXI_FUNCTION(0x0, "gpio_in"),
  69                   SUNXI_FUNCTION(0x1, "gpio_out"),
  70                   SUNXI_FUNCTION(0x2, "nand0"),         /* NWE */
  71                   SUNXI_FUNCTION(0x3, "spi0")),         /* MOSI */
  72         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
  73                   SUNXI_FUNCTION(0x0, "gpio_in"),
  74                   SUNXI_FUNCTION(0x1, "gpio_out"),
  75                   SUNXI_FUNCTION(0x2, "nand0"),         /* NALE */
  76                   SUNXI_FUNCTION(0x3, "spi0")),         /* MISO */
  77         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
  78                   SUNXI_FUNCTION(0x0, "gpio_in"),
  79                   SUNXI_FUNCTION(0x1, "gpio_out"),
  80                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCLE */
  81                   SUNXI_FUNCTION(0x3, "spi0")),         /* CLK */
  82         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
  83                   SUNXI_FUNCTION(0x0, "gpio_in"),
  84                   SUNXI_FUNCTION(0x1, "gpio_out"),
  85                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE1 */
  86                   SUNXI_FUNCTION(0x3, "spi0")),         /* CS0 */
  87         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
  88                   SUNXI_FUNCTION(0x0, "gpio_in"),
  89                   SUNXI_FUNCTION(0x1, "gpio_out"),
  90                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE0 */
  91         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
  92                   SUNXI_FUNCTION(0x0, "gpio_in"),
  93                   SUNXI_FUNCTION(0x1, "gpio_out"),
  94                   SUNXI_FUNCTION(0x2, "nand0")),        /* NRE */
  95         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
  96                   SUNXI_FUNCTION(0x0, "gpio_in"),
  97                   SUNXI_FUNCTION(0x1, "gpio_out"),
  98                   SUNXI_FUNCTION(0x2, "nand0"),         /* NRB0 */
  99                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CMD */
 100         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
 101                   SUNXI_FUNCTION(0x0, "gpio_in"),
 102                   SUNXI_FUNCTION(0x1, "gpio_out"),
 103                   SUNXI_FUNCTION(0x2, "nand0"),         /* NRB1 */
 104                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CLK */
 105         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
 106                   SUNXI_FUNCTION(0x0, "gpio_in"),
 107                   SUNXI_FUNCTION(0x1, "gpio_out"),
 108                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ0 */
 109                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D0 */
 110         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
 111                   SUNXI_FUNCTION(0x0, "gpio_in"),
 112                   SUNXI_FUNCTION(0x1, "gpio_out"),
 113                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ1 */
 114                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D1 */
 115         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
 116                   SUNXI_FUNCTION(0x0, "gpio_in"),
 117                   SUNXI_FUNCTION(0x1, "gpio_out"),
 118                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ2 */
 119                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D2 */
 120         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
 121                   SUNXI_FUNCTION(0x0, "gpio_in"),
 122                   SUNXI_FUNCTION(0x1, "gpio_out"),
 123                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ3 */
 124                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D3 */
 125         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
 126                   SUNXI_FUNCTION(0x0, "gpio_in"),
 127                   SUNXI_FUNCTION(0x1, "gpio_out"),
 128                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ4 */
 129                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D4 */
 130         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
 131                   SUNXI_FUNCTION(0x0, "gpio_in"),
 132                   SUNXI_FUNCTION(0x1, "gpio_out"),
 133                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ5 */
 134                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D5 */
 135         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
 136                   SUNXI_FUNCTION(0x0, "gpio_in"),
 137                   SUNXI_FUNCTION(0x1, "gpio_out"),
 138                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ6 */
 139                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D6 */
 140         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
 141                   SUNXI_FUNCTION(0x0, "gpio_in"),
 142                   SUNXI_FUNCTION(0x1, "gpio_out"),
 143                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ7 */
 144                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D7 */
 145         /* Hole */
 146         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
 147                   SUNXI_FUNCTION(0x0, "gpio_in"),
 148                   SUNXI_FUNCTION(0x1, "gpio_out"),
 149                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQS */
 150                   SUNXI_FUNCTION(0x4, "uart3")),        /* RTS */
 151         /* Hole */
 152         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
 153                   SUNXI_FUNCTION(0x0, "gpio_in"),
 154                   SUNXI_FUNCTION(0x1, "gpio_out"),
 155                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D2 */
 156         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
 157                   SUNXI_FUNCTION(0x0, "gpio_in"),
 158                   SUNXI_FUNCTION(0x1, "gpio_out"),
 159                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D3 */
 160         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
 161                   SUNXI_FUNCTION(0x0, "gpio_in"),
 162                   SUNXI_FUNCTION(0x1, "gpio_out"),
 163                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D4 */
 164         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
 165                   SUNXI_FUNCTION(0x0, "gpio_in"),
 166                   SUNXI_FUNCTION(0x1, "gpio_out"),
 167                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D5 */
 168         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
 169                   SUNXI_FUNCTION(0x0, "gpio_in"),
 170                   SUNXI_FUNCTION(0x1, "gpio_out"),
 171                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D6 */
 172         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
 173                   SUNXI_FUNCTION(0x0, "gpio_in"),
 174                   SUNXI_FUNCTION(0x1, "gpio_out"),
 175                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D7 */
 176         /* Hole */
 177         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
 178                   SUNXI_FUNCTION(0x0, "gpio_in"),
 179                   SUNXI_FUNCTION(0x1, "gpio_out"),
 180                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D10 */
 181         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
 182                   SUNXI_FUNCTION(0x0, "gpio_in"),
 183                   SUNXI_FUNCTION(0x1, "gpio_out"),
 184                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D11 */
 185         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
 186                   SUNXI_FUNCTION(0x0, "gpio_in"),
 187                   SUNXI_FUNCTION(0x1, "gpio_out"),
 188                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D12 */
 189         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
 190                   SUNXI_FUNCTION(0x0, "gpio_in"),
 191                   SUNXI_FUNCTION(0x1, "gpio_out"),
 192                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D13 */
 193         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
 194                   SUNXI_FUNCTION(0x0, "gpio_in"),
 195                   SUNXI_FUNCTION(0x1, "gpio_out"),
 196                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D14 */
 197         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
 198                   SUNXI_FUNCTION(0x0, "gpio_in"),
 199                   SUNXI_FUNCTION(0x1, "gpio_out"),
 200                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D15 */
 201         /* Hole */
 202         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
 203                   SUNXI_FUNCTION(0x0, "gpio_in"),
 204                   SUNXI_FUNCTION(0x1, "gpio_out"),
 205                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D18 */
 206         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
 207                   SUNXI_FUNCTION(0x0, "gpio_in"),
 208                   SUNXI_FUNCTION(0x1, "gpio_out"),
 209                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D19 */
 210         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
 211                   SUNXI_FUNCTION(0x0, "gpio_in"),
 212                   SUNXI_FUNCTION(0x1, "gpio_out"),
 213                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D20 */
 214         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
 215                   SUNXI_FUNCTION(0x0, "gpio_in"),
 216                   SUNXI_FUNCTION(0x1, "gpio_out"),
 217                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D21 */
 218         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
 219                   SUNXI_FUNCTION(0x0, "gpio_in"),
 220                   SUNXI_FUNCTION(0x1, "gpio_out"),
 221                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D22 */
 222         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
 223                   SUNXI_FUNCTION(0x0, "gpio_in"),
 224                   SUNXI_FUNCTION(0x1, "gpio_out"),
 225                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D23 */
 226         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
 227                   SUNXI_FUNCTION(0x0, "gpio_in"),
 228                   SUNXI_FUNCTION(0x1, "gpio_out"),
 229                   SUNXI_FUNCTION(0x2, "lcd0")),         /* CLK */
 230         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
 231                   SUNXI_FUNCTION(0x0, "gpio_in"),
 232                   SUNXI_FUNCTION(0x1, "gpio_out"),
 233                   SUNXI_FUNCTION(0x2, "lcd0")),         /* DE */
 234         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
 235                   SUNXI_FUNCTION(0x0, "gpio_in"),
 236                   SUNXI_FUNCTION(0x1, "gpio_out"),
 237                   SUNXI_FUNCTION(0x2, "lcd0")),         /* HSYNC */
 238         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
 239                   SUNXI_FUNCTION(0x0, "gpio_in"),
 240                   SUNXI_FUNCTION(0x1, "gpio_out"),
 241                   SUNXI_FUNCTION(0x2, "lcd0")),         /* VSYNC */
 242         /* Hole */
 243         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
 244                   SUNXI_FUNCTION(0x0, "gpio_in"),
 245                   SUNXI_FUNCTION(0x3, "csi0"),          /* PCLK */
 246                   SUNXI_FUNCTION(0x4, "spi2"),          /* CS0 */
 247                   SUNXI_FUNCTION_IRQ(0x6, 14)),         /* EINT14 */
 248         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
 249                   SUNXI_FUNCTION(0x0, "gpio_in"),
 250                   SUNXI_FUNCTION(0x3, "csi0"),          /* MCLK */
 251                   SUNXI_FUNCTION(0x4, "spi2"),          /* CLK */
 252                   SUNXI_FUNCTION_IRQ(0x6, 15)),         /* EINT15 */
 253         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
 254                   SUNXI_FUNCTION(0x0, "gpio_in"),
 255                   SUNXI_FUNCTION(0x3, "csi0"),          /* HSYNC */
 256                   SUNXI_FUNCTION(0x4, "spi2")),         /* MOSI */
 257         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
 258                   SUNXI_FUNCTION(0x0, "gpio_in"),
 259                   SUNXI_FUNCTION(0x1, "gpio_out"),
 260                   SUNXI_FUNCTION(0x3, "csi0"),          /* VSYNC */
 261                   SUNXI_FUNCTION(0x4, "spi2")),         /* MISO */
 262         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
 263                   SUNXI_FUNCTION(0x0, "gpio_in"),
 264                   SUNXI_FUNCTION(0x1, "gpio_out"),
 265                   SUNXI_FUNCTION(0x3, "csi0"),          /* D0 */
 266                   SUNXI_FUNCTION(0x4, "mmc2")),         /* D0 */
 267         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
 268                   SUNXI_FUNCTION(0x0, "gpio_in"),
 269                   SUNXI_FUNCTION(0x1, "gpio_out"),
 270                   SUNXI_FUNCTION(0x3, "csi0"),          /* D1 */
 271                   SUNXI_FUNCTION(0x4, "mmc2")),         /* D1 */
 272         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
 273                   SUNXI_FUNCTION(0x0, "gpio_in"),
 274                   SUNXI_FUNCTION(0x1, "gpio_out"),
 275                   SUNXI_FUNCTION(0x3, "csi0"),          /* D2 */
 276                   SUNXI_FUNCTION(0x4, "mmc2")),         /* D2 */
 277         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
 278                   SUNXI_FUNCTION(0x0, "gpio_in"),
 279                   SUNXI_FUNCTION(0x1, "gpio_out"),
 280                   SUNXI_FUNCTION(0x3, "csi0"),          /* D3 */
 281                   SUNXI_FUNCTION(0x4, "mmc2")),         /* D3 */
 282         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
 283                   SUNXI_FUNCTION(0x0, "gpio_in"),
 284                   SUNXI_FUNCTION(0x1, "gpio_out"),
 285                   SUNXI_FUNCTION(0x3, "csi0"),          /* D4 */
 286                   SUNXI_FUNCTION(0x4, "mmc2")),         /* CMD */
 287         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
 288                   SUNXI_FUNCTION(0x0, "gpio_in"),
 289                   SUNXI_FUNCTION(0x1, "gpio_out"),
 290                   SUNXI_FUNCTION(0x3, "csi0"),          /* D5 */
 291                   SUNXI_FUNCTION(0x4, "mmc2")),         /* CLK */
 292         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
 293                   SUNXI_FUNCTION(0x0, "gpio_in"),
 294                   SUNXI_FUNCTION(0x1, "gpio_out"),
 295                   SUNXI_FUNCTION(0x3, "csi0"),          /* D6 */
 296                   SUNXI_FUNCTION(0x4, "uart1")),        /* TX */
 297         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
 298                   SUNXI_FUNCTION(0x0, "gpio_in"),
 299                   SUNXI_FUNCTION(0x1, "gpio_out"),
 300                   SUNXI_FUNCTION(0x3, "csi0"),          /* D7 */
 301                   SUNXI_FUNCTION(0x4, "uart1")),        /* RX */
 302         /* Hole */
 303         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
 304                   SUNXI_FUNCTION(0x0, "gpio_in"),
 305                   SUNXI_FUNCTION(0x1, "gpio_out"),
 306                   SUNXI_FUNCTION(0x2, "mmc0")),         /* D1 */
 307         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
 308                   SUNXI_FUNCTION(0x0, "gpio_in"),
 309                   SUNXI_FUNCTION(0x1, "gpio_out"),
 310                   SUNXI_FUNCTION(0x2, "mmc0")),         /* D0 */
 311         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
 312                   SUNXI_FUNCTION(0x0, "gpio_in"),
 313                   SUNXI_FUNCTION(0x1, "gpio_out"),
 314                   SUNXI_FUNCTION(0x2, "mmc0")),         /* CLK */
 315         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
 316                   SUNXI_FUNCTION(0x0, "gpio_in"),
 317                   SUNXI_FUNCTION(0x1, "gpio_out"),
 318                   SUNXI_FUNCTION(0x2, "mmc0")),         /* CMD */
 319         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
 320                   SUNXI_FUNCTION(0x0, "gpio_in"),
 321                   SUNXI_FUNCTION(0x1, "gpio_out"),
 322                   SUNXI_FUNCTION(0x2, "mmc0")),         /* D3 */
 323         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
 324                   SUNXI_FUNCTION(0x0, "gpio_in"),
 325                   SUNXI_FUNCTION(0x1, "gpio_out"),
 326                   SUNXI_FUNCTION(0x2, "mmc0")),         /* D2 */
 327         /* Hole */
 328         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
 329                   SUNXI_FUNCTION(0x0, "gpio_in"),
 330                   SUNXI_FUNCTION(0x1, "gpio_out"),
 331                   SUNXI_FUNCTION_IRQ(0x6, 0)),          /* EINT0 */
 332         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
 333                   SUNXI_FUNCTION(0x0, "gpio_in"),
 334                   SUNXI_FUNCTION(0x1, "gpio_out"),
 335                   SUNXI_FUNCTION_IRQ(0x6, 1)),          /* EINT1 */
 336         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
 337                   SUNXI_FUNCTION(0x0, "gpio_in"),
 338                   SUNXI_FUNCTION(0x1, "gpio_out"),
 339                   SUNXI_FUNCTION_IRQ(0x6, 2)),          /* EINT2 */
 340         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
 341                   SUNXI_FUNCTION(0x0, "gpio_in"),
 342                   SUNXI_FUNCTION(0x1, "gpio_out"),
 343                   SUNXI_FUNCTION(0x2, "mmc1"),          /* CMD */
 344                   SUNXI_FUNCTION(0x4, "uart1"),         /* TX */
 345                   SUNXI_FUNCTION_IRQ(0x6, 3)),          /* EINT3 */
 346         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
 347                   SUNXI_FUNCTION(0x0, "gpio_in"),
 348                   SUNXI_FUNCTION(0x1, "gpio_out"),
 349                   SUNXI_FUNCTION(0x2, "mmc1"),          /* CLK */
 350                   SUNXI_FUNCTION(0x4, "uart1"),         /* RX */
 351                   SUNXI_FUNCTION_IRQ(0x6, 4)),          /* EINT4 */
 352         /* Hole */
 353         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
 354                   SUNXI_FUNCTION(0x0, "gpio_in"),
 355                   SUNXI_FUNCTION(0x1, "gpio_out"),
 356                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS0 */
 357                   SUNXI_FUNCTION(0x3, "uart3"),         /* TX */
 358                   SUNXI_FUNCTION_IRQ(0x6, 9)),          /* EINT9 */
 359         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
 360                   SUNXI_FUNCTION(0x0, "gpio_in"),
 361                   SUNXI_FUNCTION(0x1, "gpio_out"),
 362                   SUNXI_FUNCTION(0x2, "spi1"),          /* CLK */
 363                   SUNXI_FUNCTION(0x3, "uart3"),         /* RX */
 364                   SUNXI_FUNCTION_IRQ(0x6, 10)),         /* EINT10 */
 365         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
 366                   SUNXI_FUNCTION(0x0, "gpio_in"),
 367                   SUNXI_FUNCTION(0x1, "gpio_out"),
 368                   SUNXI_FUNCTION(0x2, "spi1"),          /* MOSI */
 369                   SUNXI_FUNCTION(0x3, "uart3"),         /* CTS */
 370                   SUNXI_FUNCTION_IRQ(0x6, 11)),         /* EINT11 */
 371         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
 372                   SUNXI_FUNCTION(0x0, "gpio_in"),
 373                   SUNXI_FUNCTION(0x1, "gpio_out"),
 374                   SUNXI_FUNCTION(0x2, "spi1"),          /* MISO */
 375                   SUNXI_FUNCTION(0x3, "uart3"),         /* RTS */
 376                   SUNXI_FUNCTION_IRQ(0x6, 12)),         /* EINT12 */
 377 };
 378
 379 static const struct sunxi_desc_pin sun6i_a31_pins[] = {
 380         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
 381                   SUNXI_FUNCTION(0x0, "gpio_in"),
 382                   SUNXI_FUNCTION(0x1, "gpio_out"),
 383                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD0 */
 384                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D0 */
 385                   SUNXI_FUNCTION(0x4, "uart1")),        /* DTR */
 386         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
 387                   SUNXI_FUNCTION(0x0, "gpio_in"),
 388                   SUNXI_FUNCTION(0x1, "gpio_out"),
 389                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD1 */
 390                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D1 */
 391                   SUNXI_FUNCTION(0x4, "uart1")),        /* DSR */
 392         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
 393                   SUNXI_FUNCTION(0x0, "gpio_in"),
 394                   SUNXI_FUNCTION(0x1, "gpio_out"),
 395                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD2 */
 396                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D2 */
 397                   SUNXI_FUNCTION(0x4, "uart1")),        /* DCD */
 398         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
 399                   SUNXI_FUNCTION(0x0, "gpio_in"),
 400                   SUNXI_FUNCTION(0x1, "gpio_out"),
 401                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD3 */
 402                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D3 */
 403                   SUNXI_FUNCTION(0x4, "uart1")),        /* RING */
 404         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
 405                   SUNXI_FUNCTION(0x0, "gpio_in"),
 406                   SUNXI_FUNCTION(0x1, "gpio_out"),
 407                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD4 */
 408                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D4 */
 409                   SUNXI_FUNCTION(0x4, "uart1")),        /* TX */
 410         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
 411                   SUNXI_FUNCTION(0x0, "gpio_in"),
 412                   SUNXI_FUNCTION(0x1, "gpio_out"),
 413                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD5 */
 414                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D5 */
 415                   SUNXI_FUNCTION(0x4, "uart1")),        /* RX */
 416         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
 417                   SUNXI_FUNCTION(0x0, "gpio_in"),
 418                   SUNXI_FUNCTION(0x1, "gpio_out"),
 419                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD6 */
 420                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D6 */
 421                   SUNXI_FUNCTION(0x4, "uart1")),        /* RTS */
 422         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
 423                   SUNXI_FUNCTION(0x0, "gpio_in"),
 424                   SUNXI_FUNCTION(0x1, "gpio_out"),
 425                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXD7 */
 426                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D7 */
 427                   SUNXI_FUNCTION(0x4, "uart1")),        /* CTS */
 428         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
 429                   SUNXI_FUNCTION(0x0, "gpio_in"),
 430                   SUNXI_FUNCTION(0x1, "gpio_out"),
 431                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXCLK */
 432                   SUNXI_FUNCTION(0x3, "lcd1")),         /* D8 */
 433         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
 434                   SUNXI_FUNCTION(0x0, "gpio_in"),
 435                   SUNXI_FUNCTION(0x1, "gpio_out"),
 436                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXEN */
 437                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D9 */
 438                   SUNXI_FUNCTION(0x4, "mmc3"),          /* CMD */
 439                   SUNXI_FUNCTION(0x5, "mmc2")),         /* CMD */
 440         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
 441                   SUNXI_FUNCTION(0x0, "gpio_in"),
 442                   SUNXI_FUNCTION(0x1, "gpio_out"),
 443                   SUNXI_FUNCTION(0x2, "gmac"),          /* GTXCLK */
 444                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D10 */
 445                   SUNXI_FUNCTION(0x4, "mmc3"),          /* CLK */
 446                   SUNXI_FUNCTION(0x5, "mmc2")),         /* CLK */
 447         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
 448                   SUNXI_FUNCTION(0x0, "gpio_in"),
 449                   SUNXI_FUNCTION(0x1, "gpio_out"),
 450                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD0 */
 451                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D11 */
 452                   SUNXI_FUNCTION(0x4, "mmc3"),          /* D0 */
 453                   SUNXI_FUNCTION(0x5, "mmc2")),         /* D0 */
 454         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
 455                   SUNXI_FUNCTION(0x0, "gpio_in"),
 456                   SUNXI_FUNCTION(0x1, "gpio_out"),
 457                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD1 */
 458                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D12 */
 459                   SUNXI_FUNCTION(0x4, "mmc3"),          /* D1 */
 460                   SUNXI_FUNCTION(0x5, "mmc2")),         /* D1 */
 461         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
 462                   SUNXI_FUNCTION(0x0, "gpio_in"),
 463                   SUNXI_FUNCTION(0x1, "gpio_out"),
 464                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD2 */
 465                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D13 */
 466                   SUNXI_FUNCTION(0x4, "mmc3"),          /* D2 */
 467                   SUNXI_FUNCTION(0x5, "mmc2")),         /* D2 */
 468         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
 469                   SUNXI_FUNCTION(0x0, "gpio_in"),
 470                   SUNXI_FUNCTION(0x1, "gpio_out"),
 471                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD3 */
 472                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D14 */
 473                   SUNXI_FUNCTION(0x4, "mmc3"),          /* D3 */
 474                   SUNXI_FUNCTION(0x5, "mmc2")),         /* D3 */
 475         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
 476                   SUNXI_FUNCTION(0x0, "gpio_in"),
 477                   SUNXI_FUNCTION(0x1, "gpio_out"),
 478                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD4 */
 479                   SUNXI_FUNCTION(0x3, "lcd1")),         /* D15 */
 480         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
 481                   SUNXI_FUNCTION(0x0, "gpio_in"),
 482                   SUNXI_FUNCTION(0x1, "gpio_out"),
 483                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD5 */
 484                   SUNXI_FUNCTION(0x3, "lcd1")),         /* D16 */
 485         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
 486                   SUNXI_FUNCTION(0x0, "gpio_in"),
 487                   SUNXI_FUNCTION(0x1, "gpio_out"),
 488                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD6 */
 489                   SUNXI_FUNCTION(0x3, "lcd1")),         /* D17 */
 490         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
 491                   SUNXI_FUNCTION(0x0, "gpio_in"),
 492                   SUNXI_FUNCTION(0x1, "gpio_out"),
 493                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXD7 */
 494                   SUNXI_FUNCTION(0x3, "lcd1")),         /* D18 */
 495         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
 496                   SUNXI_FUNCTION(0x0, "gpio_in"),
 497                   SUNXI_FUNCTION(0x1, "gpio_out"),
 498                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXDV */
 499                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D19 */
 500                   SUNXI_FUNCTION(0x4, "pwm3")),         /* Positive */
 501         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
 502                   SUNXI_FUNCTION(0x0, "gpio_in"),
 503                   SUNXI_FUNCTION(0x1, "gpio_out"),
 504                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXCLK */
 505                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D20 */
 506                   SUNXI_FUNCTION(0x4, "pwm3")),         /* Negative */
 507         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
 508                   SUNXI_FUNCTION(0x0, "gpio_in"),
 509                   SUNXI_FUNCTION(0x1, "gpio_out"),
 510                   SUNXI_FUNCTION(0x2, "gmac"),          /* TXERR */
 511                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D21 */
 512                   SUNXI_FUNCTION(0x4, "spi3")),         /* CS0 */
 513         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 22),
 514                   SUNXI_FUNCTION(0x0, "gpio_in"),
 515                   SUNXI_FUNCTION(0x1, "gpio_out"),
 516                   SUNXI_FUNCTION(0x2, "gmac"),          /* RXERR */
 517                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D22 */
 518                   SUNXI_FUNCTION(0x4, "spi3")),         /* CLK */
 519         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 23),
 520                   SUNXI_FUNCTION(0x0, "gpio_in"),
 521                   SUNXI_FUNCTION(0x1, "gpio_out"),
 522                   SUNXI_FUNCTION(0x2, "gmac"),          /* COL */
 523                   SUNXI_FUNCTION(0x3, "lcd1"),          /* D23 */
 524                   SUNXI_FUNCTION(0x4, "spi3")),         /* MOSI */
 525         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 24),
 526                   SUNXI_FUNCTION(0x0, "gpio_in"),
 527                   SUNXI_FUNCTION(0x1, "gpio_out"),
 528                   SUNXI_FUNCTION(0x2, "gmac"),          /* CRS */
 529                   SUNXI_FUNCTION(0x3, "lcd1"),          /* CLK */
 530                   SUNXI_FUNCTION(0x4, "spi3")),         /* MISO */
 531         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 25),
 532                   SUNXI_FUNCTION(0x0, "gpio_in"),
 533                   SUNXI_FUNCTION(0x1, "gpio_out"),
 534                   SUNXI_FUNCTION(0x2, "gmac"),          /* CLKIN */
 535                   SUNXI_FUNCTION(0x3, "lcd1"),          /* DE */
 536                   SUNXI_FUNCTION(0x4, "spi3")),         /* CS1 */
 537         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 26),
 538                   SUNXI_FUNCTION(0x0, "gpio_in"),
 539                   SUNXI_FUNCTION(0x1, "gpio_out"),
 540                   SUNXI_FUNCTION(0x2, "gmac"),          /* MDC */
 541                   SUNXI_FUNCTION(0x3, "lcd1")),         /* HSYNC */
 542         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
 543                   SUNXI_FUNCTION(0x0, "gpio_in"),
 544                   SUNXI_FUNCTION(0x1, "gpio_out"),
 545                   SUNXI_FUNCTION(0x2, "gmac"),          /* MDIO */
 546                   SUNXI_FUNCTION(0x3, "lcd1")),         /* VSYNC */
 547         /* Hole */
 548         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
 549                   SUNXI_FUNCTION(0x0, "gpio_in"),
 550                   SUNXI_FUNCTION(0x1, "gpio_out"),
 551                   SUNXI_FUNCTION(0x2, "i2s0"),          /* MCLK */
 552                   SUNXI_FUNCTION(0x3, "uart3"),         /* CTS */
 553                   SUNXI_FUNCTION(0x4, "csi")),          /* MCLK1 */
 554         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
 555                   SUNXI_FUNCTION(0x0, "gpio_in"),
 556                   SUNXI_FUNCTION(0x1, "gpio_out"),
 557                   SUNXI_FUNCTION(0x2, "i2s0")),         /* BCLK */
 558         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
 559                   SUNXI_FUNCTION(0x0, "gpio_in"),
 560                   SUNXI_FUNCTION(0x1, "gpio_out"),
 561                   SUNXI_FUNCTION(0x2, "i2s0")),         /* LRCK */
 562         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
 563                   SUNXI_FUNCTION(0x0, "gpio_in"),
 564                   SUNXI_FUNCTION(0x1, "gpio_out"),
 565                   SUNXI_FUNCTION(0x2, "i2s0")),         /* DO0 */
 566         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
 567                   SUNXI_FUNCTION(0x0, "gpio_in"),
 568                   SUNXI_FUNCTION(0x1, "gpio_out"),
 569                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DO1 */
 570                   SUNXI_FUNCTION(0x3, "uart3")),        /* RTS */
 571         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
 572                   SUNXI_FUNCTION(0x0, "gpio_in"),
 573                   SUNXI_FUNCTION(0x1, "gpio_out"),
 574                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DO2 */
 575                   SUNXI_FUNCTION(0x3, "uart3"),         /* TX */
 576                   SUNXI_FUNCTION(0x4, "i2c3")),         /* SCK */
 577         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
 578                   SUNXI_FUNCTION(0x0, "gpio_in"),
 579                   SUNXI_FUNCTION(0x1, "gpio_out"),
 580                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DO3 */
 581                   SUNXI_FUNCTION(0x3, "uart3"),         /* RX */
 582                   SUNXI_FUNCTION(0x4, "i2c3")),         /* SDA */
 583         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
 584                   SUNXI_FUNCTION(0x0, "gpio_in"),
 585                   SUNXI_FUNCTION(0x1, "gpio_out"),
 586                   SUNXI_FUNCTION(0x3, "i2s0")),         /* DI */
 587         /* Hole */
 588         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
 589                   SUNXI_FUNCTION(0x0, "gpio_in"),
 590                   SUNXI_FUNCTION(0x1, "gpio_out"),
 591                   SUNXI_FUNCTION(0x2, "nand0"),         /* WE */
 592                   SUNXI_FUNCTION(0x3, "spi0")),         /* MOSI */
 593         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
 594                   SUNXI_FUNCTION(0x0, "gpio_in"),
 595                   SUNXI_FUNCTION(0x1, "gpio_out"),
 596                   SUNXI_FUNCTION(0x2, "nand0"),         /* ALE */
 597                   SUNXI_FUNCTION(0x3, "spi0")),         /* MISO */
 598         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
 599                   SUNXI_FUNCTION(0x0, "gpio_in"),
 600                   SUNXI_FUNCTION(0x1, "gpio_out"),
 601                   SUNXI_FUNCTION(0x2, "nand0"),         /* CLE */
 602                   SUNXI_FUNCTION(0x3, "spi0")),         /* CLK */
 603         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
 604                   SUNXI_FUNCTION(0x0, "gpio_in"),
 605                   SUNXI_FUNCTION(0x1, "gpio_out"),
 606                   SUNXI_FUNCTION(0x2, "nand0")),        /* CE1 */
 607         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
 608                   SUNXI_FUNCTION(0x0, "gpio_in"),
 609                   SUNXI_FUNCTION(0x1, "gpio_out"),
 610                   SUNXI_FUNCTION(0x2, "nand0")),        /* CE0 */
 611         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
 612                   SUNXI_FUNCTION(0x0, "gpio_in"),
 613                   SUNXI_FUNCTION(0x1, "gpio_out"),
 614                   SUNXI_FUNCTION(0x2, "nand0")),        /* RE */
 615         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
 616                   SUNXI_FUNCTION(0x0, "gpio_in"),
 617                   SUNXI_FUNCTION(0x1, "gpio_out"),
 618                   SUNXI_FUNCTION(0x2, "nand0"),         /* RB0 */
 619                   SUNXI_FUNCTION(0x3, "mmc2"),          /* CMD */
 620                   SUNXI_FUNCTION(0x4, "mmc3")),         /* CMD */
 621         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
 622                   SUNXI_FUNCTION(0x0, "gpio_in"),
 623                   SUNXI_FUNCTION(0x1, "gpio_out"),
 624                   SUNXI_FUNCTION(0x2, "nand0"),         /* RB1 */
 625                   SUNXI_FUNCTION(0x3, "mmc2"),          /* CLK */
 626                   SUNXI_FUNCTION(0x4, "mmc3")),         /* CLK */
 627         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
 628                   SUNXI_FUNCTION(0x0, "gpio_in"),
 629                   SUNXI_FUNCTION(0x1, "gpio_out"),
 630                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ0 */
 631                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D0 */
 632                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D0 */
 633         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
 634                   SUNXI_FUNCTION(0x0, "gpio_in"),
 635                   SUNXI_FUNCTION(0x1, "gpio_out"),
 636                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ1 */
 637                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D1 */
 638                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D1 */
 639         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
 640                   SUNXI_FUNCTION(0x0, "gpio_in"),
 641                   SUNXI_FUNCTION(0x1, "gpio_out"),
 642                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ2 */
 643                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D2 */
 644                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D2 */
 645         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
 646                   SUNXI_FUNCTION(0x0, "gpio_in"),
 647                   SUNXI_FUNCTION(0x1, "gpio_out"),
 648                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ3 */
 649                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D3 */
 650                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D3 */
 651         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
 652                   SUNXI_FUNCTION(0x0, "gpio_in"),
 653                   SUNXI_FUNCTION(0x1, "gpio_out"),
 654                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ4 */
 655                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D4 */
 656                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D4 */
 657         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
 658                   SUNXI_FUNCTION(0x0, "gpio_in"),
 659                   SUNXI_FUNCTION(0x1, "gpio_out"),
 660                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ5 */
 661                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D5 */
 662                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D5 */
 663         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
 664                   SUNXI_FUNCTION(0x0, "gpio_in"),
 665                   SUNXI_FUNCTION(0x1, "gpio_out"),
 666                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ6 */
 667                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D6 */
 668                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D6 */
 669         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
 670                   SUNXI_FUNCTION(0x0, "gpio_in"),
 671                   SUNXI_FUNCTION(0x1, "gpio_out"),
 672                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ7 */
 673                   SUNXI_FUNCTION(0x3, "mmc2"),          /* D7 */
 674                   SUNXI_FUNCTION(0x4, "mmc3")),         /* D7 */
 675         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
 676                   SUNXI_FUNCTION(0x0, "gpio_in"),
 677                   SUNXI_FUNCTION(0x1, "gpio_out"),
 678                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ8 */
 679                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ0 */
 680         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
 681                   SUNXI_FUNCTION(0x0, "gpio_in"),
 682                   SUNXI_FUNCTION(0x1, "gpio_out"),
 683                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ9 */
 684                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ1 */
 685         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
 686                   SUNXI_FUNCTION(0x0, "gpio_in"),
 687                   SUNXI_FUNCTION(0x1, "gpio_out"),
 688                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ10 */
 689                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ2 */
 690         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
 691                   SUNXI_FUNCTION(0x0, "gpio_in"),
 692                   SUNXI_FUNCTION(0x1, "gpio_out"),
 693                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ11 */
 694                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ3 */
 695         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
 696                   SUNXI_FUNCTION(0x0, "gpio_in"),
 697                   SUNXI_FUNCTION(0x1, "gpio_out"),
 698                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ12 */
 699                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ4 */
 700         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
 701                   SUNXI_FUNCTION(0x0, "gpio_in"),
 702                   SUNXI_FUNCTION(0x1, "gpio_out"),
 703                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ13 */
 704                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ5 */
 705         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
 706                   SUNXI_FUNCTION(0x0, "gpio_in"),
 707                   SUNXI_FUNCTION(0x1, "gpio_out"),
 708                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ14 */
 709                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ6 */
 710         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
 711                   SUNXI_FUNCTION(0x0, "gpio_in"),
 712                   SUNXI_FUNCTION(0x1, "gpio_out"),
 713                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ15 */
 714                   SUNXI_FUNCTION(0x3, "nand1")),        /* DQ7 */
 715         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
 716                   SUNXI_FUNCTION(0x0, "gpio_in"),
 717                   SUNXI_FUNCTION(0x1, "gpio_out"),
 718                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQS */
 719                   SUNXI_FUNCTION(0x3, "mmc2"),          /* RST */
 720                   SUNXI_FUNCTION(0x4, "mmc3")),         /* RST */
 721         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25),
 722                   SUNXI_FUNCTION(0x0, "gpio_in"),
 723                   SUNXI_FUNCTION(0x1, "gpio_out"),
 724                   SUNXI_FUNCTION(0x2, "nand0")),        /* CE2 */
 725         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26),
 726                   SUNXI_FUNCTION(0x0, "gpio_in"),
 727                   SUNXI_FUNCTION(0x1, "gpio_out"),
 728                   SUNXI_FUNCTION(0x2, "nand0")),        /* CE3 */
 729         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27),
 730                   SUNXI_FUNCTION(0x0, "gpio_in"),
 731                   SUNXI_FUNCTION(0x1, "gpio_out"),
 732                   SUNXI_FUNCTION(0x3, "spi0")),         /* CS0 */
 733         /* Hole */
 734         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
 735                   SUNXI_FUNCTION(0x0, "gpio_in"),
 736                   SUNXI_FUNCTION(0x1, "gpio_out"),
 737                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D0 */
 738                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP0 */
 739         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
 740                   SUNXI_FUNCTION(0x0, "gpio_in"),
 741                   SUNXI_FUNCTION(0x1, "gpio_out"),
 742                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D1 */
 743                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN0 */
 744         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
 745                   SUNXI_FUNCTION(0x0, "gpio_in"),
 746                   SUNXI_FUNCTION(0x1, "gpio_out"),
 747                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D2 */
 748                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP1 */
 749         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
 750                   SUNXI_FUNCTION(0x0, "gpio_in"),
 751                   SUNXI_FUNCTION(0x1, "gpio_out"),
 752                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D3 */
 753                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN1 */
 754         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
 755                   SUNXI_FUNCTION(0x0, "gpio_in"),
 756                   SUNXI_FUNCTION(0x1, "gpio_out"),
 757                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D4 */
 758                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP2 */
 759         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
 760                   SUNXI_FUNCTION(0x0, "gpio_in"),
 761                   SUNXI_FUNCTION(0x1, "gpio_out"),
 762                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D5 */
 763                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN2 */
 764         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
 765                   SUNXI_FUNCTION(0x0, "gpio_in"),
 766                   SUNXI_FUNCTION(0x1, "gpio_out"),
 767                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D6 */
 768                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VPC */
 769         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
 770                   SUNXI_FUNCTION(0x0, "gpio_in"),
 771                   SUNXI_FUNCTION(0x1, "gpio_out"),
 772                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D7 */
 773                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VNC */
 774         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
 775                   SUNXI_FUNCTION(0x0, "gpio_in"),
 776                   SUNXI_FUNCTION(0x1, "gpio_out"),
 777                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D8 */
 778                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP3 */
 779         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
 780                   SUNXI_FUNCTION(0x0, "gpio_in"),
 781                   SUNXI_FUNCTION(0x1, "gpio_out"),
 782                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D9 */
 783                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN3 */
 784         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
 785                   SUNXI_FUNCTION(0x0, "gpio_in"),
 786                   SUNXI_FUNCTION(0x1, "gpio_out"),
 787                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D10 */
 788                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP0 */
 789         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
 790                   SUNXI_FUNCTION(0x0, "gpio_in"),
 791                   SUNXI_FUNCTION(0x1, "gpio_out"),
 792                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D11 */
 793                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN0 */
 794         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
 795                   SUNXI_FUNCTION(0x0, "gpio_in"),
 796                   SUNXI_FUNCTION(0x1, "gpio_out"),
 797                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D12 */
 798                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP1 */
 799         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
 800                   SUNXI_FUNCTION(0x0, "gpio_in"),
 801                   SUNXI_FUNCTION(0x1, "gpio_out"),
 802                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D13 */
 803                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN1 */
 804         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
 805                   SUNXI_FUNCTION(0x0, "gpio_in"),
 806                   SUNXI_FUNCTION(0x1, "gpio_out"),
 807                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D14 */
 808                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP2 */
 809         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
 810                   SUNXI_FUNCTION(0x0, "gpio_in"),
 811                   SUNXI_FUNCTION(0x1, "gpio_out"),
 812                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D15 */
 813                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN2 */
 814         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
 815                   SUNXI_FUNCTION(0x0, "gpio_in"),
 816                   SUNXI_FUNCTION(0x1, "gpio_out"),
 817                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D16 */
 818                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VPC */
 819         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
 820                   SUNXI_FUNCTION(0x0, "gpio_in"),
 821                   SUNXI_FUNCTION(0x1, "gpio_out"),
 822                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D17 */
 823                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VNC */
 824         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
 825                   SUNXI_FUNCTION(0x0, "gpio_in"),
 826                   SUNXI_FUNCTION(0x1, "gpio_out"),
 827                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D18 */
 828                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP3 */
 829         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
 830                   SUNXI_FUNCTION(0x0, "gpio_in"),
 831                   SUNXI_FUNCTION(0x1, "gpio_out"),
 832                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D19 */
 833                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN3 */
 834         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
 835                   SUNXI_FUNCTION(0x0, "gpio_in"),
 836                   SUNXI_FUNCTION(0x1, "gpio_out"),
 837                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D20 */
 838         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
 839                   SUNXI_FUNCTION(0x0, "gpio_in"),
 840                   SUNXI_FUNCTION(0x1, "gpio_out"),
 841                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D21 */
 842         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
 843                   SUNXI_FUNCTION(0x0, "gpio_in"),
 844                   SUNXI_FUNCTION(0x1, "gpio_out"),
 845                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D22 */
 846         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
 847                   SUNXI_FUNCTION(0x0, "gpio_in"),
 848                   SUNXI_FUNCTION(0x1, "gpio_out"),
 849                   SUNXI_FUNCTION(0x2, "lcd0")),         /* D23 */
 850         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
 851                   SUNXI_FUNCTION(0x0, "gpio_in"),
 852                   SUNXI_FUNCTION(0x1, "gpio_out"),
 853                   SUNXI_FUNCTION(0x2, "lcd0")),         /* CLK */
 854         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
 855                   SUNXI_FUNCTION(0x0, "gpio_in"),
 856                   SUNXI_FUNCTION(0x1, "gpio_out"),
 857                   SUNXI_FUNCTION(0x2, "lcd0")),         /* DE */
 858         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
 859                   SUNXI_FUNCTION(0x0, "gpio_in"),
 860                   SUNXI_FUNCTION(0x1, "gpio_out"),
 861                   SUNXI_FUNCTION(0x2, "lcd0")),         /* HSYNC */
 862         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
 863                   SUNXI_FUNCTION(0x0, "gpio_in"),
 864                   SUNXI_FUNCTION(0x1, "gpio_out"),
 865                   SUNXI_FUNCTION(0x2, "lcd0")),         /* VSYNC */
 866         /* Hole */
 867         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
 868                   SUNXI_FUNCTION(0x0, "gpio_in"),
 869                   SUNXI_FUNCTION(0x1, "gpio_out"),
 870                   SUNXI_FUNCTION(0x2, "csi"),           /* PCLK */
 871                   SUNXI_FUNCTION(0x3, "ts")),           /* CLK */
 872         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
 873                   SUNXI_FUNCTION(0x0, "gpio_in"),
 874                   SUNXI_FUNCTION(0x1, "gpio_out"),
 875                   SUNXI_FUNCTION(0x2, "csi"),           /* MCLK */
 876                   SUNXI_FUNCTION(0x3, "ts")),           /* ERR */
 877         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
 878                   SUNXI_FUNCTION(0x0, "gpio_in"),
 879                   SUNXI_FUNCTION(0x1, "gpio_out"),
 880                   SUNXI_FUNCTION(0x2, "csi"),           /* HSYNC */
 881                   SUNXI_FUNCTION(0x3, "ts")),           /* SYNC */
 882         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
 883                   SUNXI_FUNCTION(0x0, "gpio_in"),
 884                   SUNXI_FUNCTION(0x1, "gpio_out"),
 885                   SUNXI_FUNCTION(0x2, "csi"),           /* VSYNC */
 886                   SUNXI_FUNCTION(0x3, "ts")),           /* DVLD */
 887         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
 888                   SUNXI_FUNCTION(0x0, "gpio_in"),
 889                   SUNXI_FUNCTION(0x1, "gpio_out"),
 890                   SUNXI_FUNCTION(0x2, "csi"),           /* D0 */
 891                   SUNXI_FUNCTION(0x3, "uart5")),        /* TX */
 892         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
 893                   SUNXI_FUNCTION(0x0, "gpio_in"),
 894                   SUNXI_FUNCTION(0x1, "gpio_out"),
 895                   SUNXI_FUNCTION(0x2, "csi"),           /* D1 */
 896                   SUNXI_FUNCTION(0x3, "uart5")),        /* RX */
 897         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
 898                   SUNXI_FUNCTION(0x0, "gpio_in"),
 899                   SUNXI_FUNCTION(0x1, "gpio_out"),
 900                   SUNXI_FUNCTION(0x2, "csi"),           /* D2 */
 901                   SUNXI_FUNCTION(0x3, "uart5")),        /* RTS */
 902         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
 903                   SUNXI_FUNCTION(0x0, "gpio_in"),
 904                   SUNXI_FUNCTION(0x1, "gpio_out"),
 905                   SUNXI_FUNCTION(0x2, "csi"),           /* D3 */
 906                   SUNXI_FUNCTION(0x3, "uart5")),        /* CTS */
 907         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
 908                   SUNXI_FUNCTION(0x0, "gpio_in"),
 909                   SUNXI_FUNCTION(0x1, "gpio_out"),
 910                   SUNXI_FUNCTION(0x2, "csi"),           /* D4 */
 911                   SUNXI_FUNCTION(0x3, "ts")),           /* D0 */
 912         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
 913                   SUNXI_FUNCTION(0x0, "gpio_in"),
 914                   SUNXI_FUNCTION(0x1, "gpio_out"),
 915                   SUNXI_FUNCTION(0x2, "csi"),           /* D5 */
 916                   SUNXI_FUNCTION(0x3, "ts")),           /* D1 */
 917         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
 918                   SUNXI_FUNCTION(0x0, "gpio_in"),
 919                   SUNXI_FUNCTION(0x1, "gpio_out"),
 920                   SUNXI_FUNCTION(0x2, "csi"),           /* D6 */
 921                   SUNXI_FUNCTION(0x3, "ts")),           /* D2 */
 922         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
 923                   SUNXI_FUNCTION(0x0, "gpio_in"),
 924                   SUNXI_FUNCTION(0x1, "gpio_out"),
 925                   SUNXI_FUNCTION(0x2, "csi"),           /* D7 */
 926                   SUNXI_FUNCTION(0x3, "ts")),           /* D3 */
 927         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
 928                   SUNXI_FUNCTION(0x0, "gpio_in"),
 929                   SUNXI_FUNCTION(0x1, "gpio_out"),
 930                   SUNXI_FUNCTION(0x2, "csi"),           /* D8 */
 931                   SUNXI_FUNCTION(0x3, "ts")),           /* D4 */
 932         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
 933                   SUNXI_FUNCTION(0x0, "gpio_in"),
 934                   SUNXI_FUNCTION(0x1, "gpio_out"),
 935                   SUNXI_FUNCTION(0x2, "csi"),           /* D9 */
 936                   SUNXI_FUNCTION(0x3, "ts")),           /* D5 */
 937         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
 938                   SUNXI_FUNCTION(0x0, "gpio_in"),
 939                   SUNXI_FUNCTION(0x1, "gpio_out"),
 940                   SUNXI_FUNCTION(0x2, "csi"),           /* D10 */
 941                   SUNXI_FUNCTION(0x3, "ts")),           /* D6 */
 942         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
 943                   SUNXI_FUNCTION(0x0, "gpio_in"),
 944                   SUNXI_FUNCTION(0x1, "gpio_out"),
 945                   SUNXI_FUNCTION(0x2, "csi"),           /* D11 */
 946                   SUNXI_FUNCTION(0x3, "ts")),           /* D7 */
 947         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
 948                   SUNXI_FUNCTION(0x0, "gpio_in"),
 949                   SUNXI_FUNCTION(0x1, "gpio_out"),
 950                   SUNXI_FUNCTION(0x2, "csi")),          /* MIPI CSI MCLK */
 951         /* Hole */
 952         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
 953                   SUNXI_FUNCTION(0x0, "gpio_in"),
 954                   SUNXI_FUNCTION(0x1, "gpio_out"),
 955                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D1 */
 956                   SUNXI_FUNCTION(0x4, "jtag")),         /* MS1 */
 957         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
 958                   SUNXI_FUNCTION(0x0, "gpio_in"),
 959                   SUNXI_FUNCTION(0x1, "gpio_out"),
 960                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D0 */
 961                   SUNXI_FUNCTION(0x4, "jtag")),         /* DI1 */
 962         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
 963                   SUNXI_FUNCTION(0x0, "gpio_in"),
 964                   SUNXI_FUNCTION(0x1, "gpio_out"),
 965                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CLK */
 966                   SUNXI_FUNCTION(0x4, "uart0")),        /* TX */
 967         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
 968                   SUNXI_FUNCTION(0x0, "gpio_in"),
 969                   SUNXI_FUNCTION(0x1, "gpio_out"),
 970                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CMD */
 971                   SUNXI_FUNCTION(0x4, "jtag")),         /* DO1 */
 972         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
 973                   SUNXI_FUNCTION(0x0, "gpio_in"),
 974                   SUNXI_FUNCTION(0x1, "gpio_out"),
 975                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D3 */
 976                   SUNXI_FUNCTION(0x4, "uart0")),        /* RX */
 977         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
 978                   SUNXI_FUNCTION(0x0, "gpio_in"),
 979                   SUNXI_FUNCTION(0x1, "gpio_out"),
 980                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D2 */
 981                   SUNXI_FUNCTION(0x4, "jtag")),         /* CK1 */
 982         /* Hole */
 983         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
 984                   SUNXI_FUNCTION(0x0, "gpio_in"),
 985                   SUNXI_FUNCTION(0x1, "gpio_out"),
 986                   SUNXI_FUNCTION(0x2, "mmc1")),         /* CLK */
 987         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
 988                   SUNXI_FUNCTION(0x0, "gpio_in"),
 989                   SUNXI_FUNCTION(0x1, "gpio_out"),
 990                   SUNXI_FUNCTION(0x2, "mmc1")),         /* CMD */
 991         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
 992                   SUNXI_FUNCTION(0x0, "gpio_in"),
 993                   SUNXI_FUNCTION(0x1, "gpio_out"),
 994                   SUNXI_FUNCTION(0x2, "mmc1")),         /* D0 */
 995         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
 996                   SUNXI_FUNCTION(0x0, "gpio_in"),
 997                   SUNXI_FUNCTION(0x1, "gpio_out"),
 998                   SUNXI_FUNCTION(0x2, "mmc1")),         /* D1 */
 999         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
1000                   SUNXI_FUNCTION(0x0, "gpio_in"),
1001                   SUNXI_FUNCTION(0x1, "gpio_out"),
1002                   SUNXI_FUNCTION(0x2, "mmc1")),         /* D2 */
1003         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
1004                   SUNXI_FUNCTION(0x0, "gpio_in"),
1005                   SUNXI_FUNCTION(0x1, "gpio_out"),
1006                   SUNXI_FUNCTION(0x2, "mmc1")),         /* D3 */
1007         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
1008                   SUNXI_FUNCTION(0x0, "gpio_in"),
1009                   SUNXI_FUNCTION(0x1, "gpio_out"),
1010                   SUNXI_FUNCTION(0x2, "uart2")),        /* TX */
1011         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
1012                   SUNXI_FUNCTION(0x0, "gpio_in"),
1013                   SUNXI_FUNCTION(0x1, "gpio_out"),
1014                   SUNXI_FUNCTION(0x2, "uart2")),        /* RX */
1015         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
1016                   SUNXI_FUNCTION(0x0, "gpio_in"),
1017                   SUNXI_FUNCTION(0x1, "gpio_out"),
1018                   SUNXI_FUNCTION(0x2, "uart2")),        /* RTS */
1019         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
1020                   SUNXI_FUNCTION(0x0, "gpio_in"),
1021                   SUNXI_FUNCTION(0x1, "gpio_out"),
1022                   SUNXI_FUNCTION(0x2, "uart2")),        /* CTS */
1023         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
1024                   SUNXI_FUNCTION(0x0, "gpio_in"),
1025                   SUNXI_FUNCTION(0x1, "gpio_out"),
1026                   SUNXI_FUNCTION(0x2, "i2c3"),          /* SCK */
1027                   SUNXI_FUNCTION(0x3, "usb")),          /* DP3 */
1028         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
1029                   SUNXI_FUNCTION(0x0, "gpio_in"),
1030                   SUNXI_FUNCTION(0x1, "gpio_out"),
1031                   SUNXI_FUNCTION(0x2, "i2c3"),          /* SDA */
1032                   SUNXI_FUNCTION(0x3, "usb")),          /* DM3 */
1033         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
1034                   SUNXI_FUNCTION(0x0, "gpio_in"),
1035                   SUNXI_FUNCTION(0x1, "gpio_out"),
1036                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS1 */
1037                   SUNXI_FUNCTION(0x3, "i2s1")),         /* MCLK */
1038         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
1039                   SUNXI_FUNCTION(0x0, "gpio_in"),
1040                   SUNXI_FUNCTION(0x1, "gpio_out"),
1041                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS0 */
1042                   SUNXI_FUNCTION(0x3, "i2s1")),         /* BCLK */
1043         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
1044                   SUNXI_FUNCTION(0x0, "gpio_in"),
1045                   SUNXI_FUNCTION(0x1, "gpio_out"),
1046                   SUNXI_FUNCTION(0x2, "spi1"),          /* CLK */
1047                   SUNXI_FUNCTION(0x3, "i2s1")),         /* LRCK */
1048         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
1049                   SUNXI_FUNCTION(0x0, "gpio_in"),
1050                   SUNXI_FUNCTION(0x1, "gpio_out"),
1051                   SUNXI_FUNCTION(0x2, "spi1"),          /* MOSI */
1052                   SUNXI_FUNCTION(0x3, "i2s1")),         /* DIN */
1053         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
1054                   SUNXI_FUNCTION(0x0, "gpio_in"),
1055                   SUNXI_FUNCTION(0x1, "gpio_out"),
1056                   SUNXI_FUNCTION(0x2, "spi1"),          /* MISO */
1057                   SUNXI_FUNCTION(0x3, "i2s1")),         /* DOUT */
1058         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
1059                   SUNXI_FUNCTION(0x0, "gpio_in"),
1060                   SUNXI_FUNCTION(0x1, "gpio_out"),
1061                   SUNXI_FUNCTION(0x2, "uart4")),        /* TX */
1062         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
1063                   SUNXI_FUNCTION(0x0, "gpio_in"),
1064                   SUNXI_FUNCTION(0x1, "gpio_out"),
1065                   SUNXI_FUNCTION(0x2, "uart4")),        /* RX */
1066         /* Hole */
1067         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
1068                   SUNXI_FUNCTION(0x0, "gpio_in"),
1069                   SUNXI_FUNCTION(0x1, "gpio_out"),
1070                   SUNXI_FUNCTION(0x2, "nand1")),        /* WE */
1071         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
1072                   SUNXI_FUNCTION(0x0, "gpio_in"),
1073                   SUNXI_FUNCTION(0x1, "gpio_out"),
1074                   SUNXI_FUNCTION(0x2, "nand1")),        /* ALE */
1075         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
1076                   SUNXI_FUNCTION(0x0, "gpio_in"),
1077                   SUNXI_FUNCTION(0x1, "gpio_out"),
1078                   SUNXI_FUNCTION(0x2, "nand1")),        /* CLE */
1079         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
1080                   SUNXI_FUNCTION(0x0, "gpio_in"),
1081                   SUNXI_FUNCTION(0x1, "gpio_out"),
1082                   SUNXI_FUNCTION(0x2, "nand1")),        /* CE1 */
1083         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
1084                   SUNXI_FUNCTION(0x0, "gpio_in"),
1085                   SUNXI_FUNCTION(0x1, "gpio_out"),
1086                   SUNXI_FUNCTION(0x2, "nand1")),        /* CE0 */
1087         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
1088                   SUNXI_FUNCTION(0x0, "gpio_in"),
1089                   SUNXI_FUNCTION(0x1, "gpio_out"),
1090                   SUNXI_FUNCTION(0x2, "nand1")),        /* RE */
1091         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
1092                   SUNXI_FUNCTION(0x0, "gpio_in"),
1093                   SUNXI_FUNCTION(0x1, "gpio_out"),
1094                   SUNXI_FUNCTION(0x2, "nand1")),        /* RB0 */
1095         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
1096                   SUNXI_FUNCTION(0x0, "gpio_in"),
1097                   SUNXI_FUNCTION(0x1, "gpio_out"),
1098                   SUNXI_FUNCTION(0x2, "nand1")),        /* RB1 */
1099         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
1100                   SUNXI_FUNCTION(0x0, "gpio_in"),
1101                   SUNXI_FUNCTION(0x1, "gpio_out"),
1102                   SUNXI_FUNCTION(0x2, "nand1")),        /* DQS */
1103         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
1104                   SUNXI_FUNCTION(0x0, "gpio_in"),
1105                   SUNXI_FUNCTION(0x1, "gpio_out"),
1106                   SUNXI_FUNCTION(0x2, "spi2"),          /* CS0 */
1107                   SUNXI_FUNCTION(0x3, "jtag"),          /* MS0 */
1108                   SUNXI_FUNCTION(0x4, "pwm1")),         /* Positive */
1109         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
1110                   SUNXI_FUNCTION(0x0, "gpio_in"),
1111                   SUNXI_FUNCTION(0x1, "gpio_out"),
1112                   SUNXI_FUNCTION(0x2, "spi2"),          /* CLK */
1113                   SUNXI_FUNCTION(0x3, "jtag"),          /* CK0 */
1114                   SUNXI_FUNCTION(0x4, "pwm1")),         /* Negative */
1115         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
1116                   SUNXI_FUNCTION(0x0, "gpio_in"),
1117                   SUNXI_FUNCTION(0x1, "gpio_out"),
1118                   SUNXI_FUNCTION(0x2, "spi2"),          /* MOSI */
1119                   SUNXI_FUNCTION(0x3, "jtag"),          /* DO0 */
1120                   SUNXI_FUNCTION(0x4, "pwm2")),         /* Positive */
1121         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
1122                   SUNXI_FUNCTION(0x0, "gpio_in"),
1123                   SUNXI_FUNCTION(0x1, "gpio_out"),
1124                   SUNXI_FUNCTION(0x2, "spi2"),          /* MISO */
1125                   SUNXI_FUNCTION(0x3, "jtag"),          /* DI0 */
1126                   SUNXI_FUNCTION(0x4, "pwm2")),         /* Negative */
1127         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
1128                   SUNXI_FUNCTION(0x0, "gpio_in"),
1129                   SUNXI_FUNCTION(0x1, "gpio_out"),
1130                   SUNXI_FUNCTION(0x2, "pwm0")),
1131         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
1132                   SUNXI_FUNCTION(0x0, "gpio_in"),
1133                   SUNXI_FUNCTION(0x1, "gpio_out"),
1134                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SCK */
1135         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
1136                   SUNXI_FUNCTION(0x0, "gpio_in"),
1137                   SUNXI_FUNCTION(0x1, "gpio_out"),
1138                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SDA */
1139         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
1140                   SUNXI_FUNCTION(0x0, "gpio_in"),
1141                   SUNXI_FUNCTION(0x1, "gpio_out"),
1142                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SCK */
1143         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
1144                   SUNXI_FUNCTION(0x0, "gpio_in"),
1145                   SUNXI_FUNCTION(0x1, "gpio_out"),
1146                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SDA */
1147         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
1148                   SUNXI_FUNCTION(0x0, "gpio_in"),
1149                   SUNXI_FUNCTION(0x1, "gpio_out"),
1150                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SCK */
1151         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
1152                   SUNXI_FUNCTION(0x0, "gpio_in"),
1153                   SUNXI_FUNCTION(0x1, "gpio_out"),
1154                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SDA */
1155         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
1156                   SUNXI_FUNCTION(0x0, "gpio_in"),
1157                   SUNXI_FUNCTION(0x1, "gpio_out"),
1158                   SUNXI_FUNCTION(0x2, "uart0")),        /* TX */
1159         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
1160                   SUNXI_FUNCTION(0x0, "gpio_in"),
1161                   SUNXI_FUNCTION(0x1, "gpio_out"),
1162                   SUNXI_FUNCTION(0x2, "uart0")),        /* RX */
1163         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
1164                   SUNXI_FUNCTION(0x0, "gpio_in"),
1165                   SUNXI_FUNCTION(0x1, "gpio_out")),
1166         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
1167                   SUNXI_FUNCTION(0x0, "gpio_in"),
1168                   SUNXI_FUNCTION(0x1, "gpio_out")),
1169         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
1170                   SUNXI_FUNCTION(0x0, "gpio_in"),
1171                   SUNXI_FUNCTION(0x1, "gpio_out")),
1172         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
1173                   SUNXI_FUNCTION(0x0, "gpio_in"),
1174                   SUNXI_FUNCTION(0x1, "gpio_out")),
1175         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
1176                   SUNXI_FUNCTION(0x0, "gpio_in"),
1177                   SUNXI_FUNCTION(0x1, "gpio_out")),
1178         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
1179                   SUNXI_FUNCTION(0x0, "gpio_in"),
1180                   SUNXI_FUNCTION(0x1, "gpio_out")),
1181         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 28),
1182                   SUNXI_FUNCTION(0x0, "gpio_in"),
1183                   SUNXI_FUNCTION(0x1, "gpio_out")),
1184         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 29),
1185                   SUNXI_FUNCTION(0x0, "gpio_in"),
1186                   SUNXI_FUNCTION(0x1, "gpio_out"),
1187                   SUNXI_FUNCTION(0x2, "nand1")),        /* CE2 */
1188         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 30),
1189                   SUNXI_FUNCTION(0x0, "gpio_in"),
1190                   SUNXI_FUNCTION(0x1, "gpio_out"),
1191                   SUNXI_FUNCTION(0x2, "nand1")),        /* CE3 */
1192 };
1193
1194 static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
1195         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
1196                   SUNXI_FUNCTION(0x0, "gpio_in"),
1197                   SUNXI_FUNCTION(0x1, "gpio_out"),
1198                   SUNXI_FUNCTION(0x2, "s_twi"),         /* SCK */
1199                   SUNXI_FUNCTION(0x3, "s_p2wi")),       /* SCK */
1200         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
1201                   SUNXI_FUNCTION(0x0, "gpio_in"),
1202                   SUNXI_FUNCTION(0x1, "gpio_out"),
1203                   SUNXI_FUNCTION(0x2, "s_twi"),         /* SDA */
1204                   SUNXI_FUNCTION(0x3, "s_p2wi")),       /* SDA */
1205         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
1206                   SUNXI_FUNCTION(0x0, "gpio_in"),
1207                   SUNXI_FUNCTION(0x1, "gpio_out"),
1208                   SUNXI_FUNCTION(0x2, "s_uart")),       /* TX */
1209         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
1210                   SUNXI_FUNCTION(0x0, "gpio_in"),
1211                   SUNXI_FUNCTION(0x1, "gpio_out"),
1212                   SUNXI_FUNCTION(0x2, "s_uart")),       /* RX */
1213         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
1214                   SUNXI_FUNCTION(0x0, "gpio_in"),
1215                   SUNXI_FUNCTION(0x1, "gpio_out"),
1216                   SUNXI_FUNCTION(0x2, "s_ir")),         /* RX */
1217         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
1218                   SUNXI_FUNCTION(0x0, "gpio_in"),
1219                   SUNXI_FUNCTION(0x1, "gpio_out"),
1220                   SUNXI_FUNCTION(0x3, "s_jtag")),       /* MS */
1221         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
1222                   SUNXI_FUNCTION(0x0, "gpio_in"),
1223                   SUNXI_FUNCTION(0x1, "gpio_out"),
1224                   SUNXI_FUNCTION(0x3, "s_jtag")),       /* CK */
1225         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
1226                   SUNXI_FUNCTION(0x0, "gpio_in"),
1227                   SUNXI_FUNCTION(0x1, "gpio_out"),
1228                   SUNXI_FUNCTION(0x3, "s_jtag")),       /* DO */
1229         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
1230                   SUNXI_FUNCTION(0x0, "gpio_in"),
1231                   SUNXI_FUNCTION(0x1, "gpio_out"),
1232                   SUNXI_FUNCTION(0x3, "s_jtag")),       /* DI */
1233         /* Hole */
1234         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
1235                   SUNXI_FUNCTION(0x0, "gpio_in"),
1236                   SUNXI_FUNCTION(0x1, "gpio_out")),
1237         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
1238                   SUNXI_FUNCTION(0x0, "gpio_in"),
1239                   SUNXI_FUNCTION(0x1, "gpio_out")),
1240         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
1241                   SUNXI_FUNCTION(0x0, "gpio_in"),
1242                   SUNXI_FUNCTION(0x1, "gpio_out"),
1243                   SUNXI_FUNCTION(0x3, "1wire")),
1244         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
1245                   SUNXI_FUNCTION(0x0, "gpio_in"),
1246                   SUNXI_FUNCTION(0x1, "gpio_out")),
1247         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
1248                   SUNXI_FUNCTION(0x0, "gpio_in"),
1249                   SUNXI_FUNCTION(0x1, "gpio_out")),
1250         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
1251                   SUNXI_FUNCTION(0x0, "gpio_in"),
1252                   SUNXI_FUNCTION(0x1, "gpio_out")),
1253         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
1254                   SUNXI_FUNCTION(0x0, "gpio_in"),
1255                   SUNXI_FUNCTION(0x1, "gpio_out")),
1256         SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
1257                   SUNXI_FUNCTION(0x0, "gpio_in"),
1258                   SUNXI_FUNCTION(0x1, "gpio_out"),
1259                   SUNXI_FUNCTION(0x3, "rtc")),          /* CLKO */
1260 };
1261
1262 static const struct sunxi_desc_pin sun7i_a20_pins[] = {
1263         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
1264                   SUNXI_FUNCTION(0x0, "gpio_in"),
1265                   SUNXI_FUNCTION(0x1, "gpio_out"),
1266                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD3 */
1267                   SUNXI_FUNCTION(0x3, "spi1"),          /* CS0 */
1268                   SUNXI_FUNCTION(0x4, "uart2"),         /* RTS */
1269                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD3 */
1270         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
1271                   SUNXI_FUNCTION(0x0, "gpio_in"),
1272                   SUNXI_FUNCTION(0x1, "gpio_out"),
1273                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD2 */
1274                   SUNXI_FUNCTION(0x3, "spi1"),          /* CLK */
1275                   SUNXI_FUNCTION(0x4, "uart2"),         /* CTS */
1276                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD2 */
1277         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
1278                   SUNXI_FUNCTION(0x0, "gpio_in"),
1279                   SUNXI_FUNCTION(0x1, "gpio_out"),
1280                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD1 */
1281                   SUNXI_FUNCTION(0x3, "spi1"),          /* MOSI */
1282                   SUNXI_FUNCTION(0x4, "uart2"),         /* TX */
1283                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD1 */
1284         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
1285                   SUNXI_FUNCTION(0x0, "gpio_in"),
1286                   SUNXI_FUNCTION(0x1, "gpio_out"),
1287                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD0 */
1288                   SUNXI_FUNCTION(0x3, "spi1"),          /* MISO */
1289                   SUNXI_FUNCTION(0x4, "uart2"),         /* RX */
1290                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD0 */
1291         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
1292                   SUNXI_FUNCTION(0x0, "gpio_in"),
1293                   SUNXI_FUNCTION(0x1, "gpio_out"),
1294                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD3 */
1295                   SUNXI_FUNCTION(0x3, "spi1"),          /* CS1 */
1296                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD3 */
1297         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
1298                   SUNXI_FUNCTION(0x0, "gpio_in"),
1299                   SUNXI_FUNCTION(0x1, "gpio_out"),
1300                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD2 */
1301                   SUNXI_FUNCTION(0x3, "spi3"),          /* CS0 */
1302                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD2 */
1303         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
1304                   SUNXI_FUNCTION(0x0, "gpio_in"),
1305                   SUNXI_FUNCTION(0x1, "gpio_out"),
1306                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD1 */
1307                   SUNXI_FUNCTION(0x3, "spi3"),          /* CLK */
1308                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD1 */
1309         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
1310                   SUNXI_FUNCTION(0x0, "gpio_in"),
1311                   SUNXI_FUNCTION(0x1, "gpio_out"),
1312                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD0 */
1313                   SUNXI_FUNCTION(0x3, "spi3"),          /* MOSI */
1314                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD0 */
1315         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
1316                   SUNXI_FUNCTION(0x0, "gpio_in"),
1317                   SUNXI_FUNCTION(0x1, "gpio_out"),
1318                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXCK */
1319                   SUNXI_FUNCTION(0x3, "spi3"),          /* MISO */
1320                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXCK */
1321         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
1322                   SUNXI_FUNCTION(0x0, "gpio_in"),
1323                   SUNXI_FUNCTION(0x1, "gpio_out"),
1324                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXERR */
1325                   SUNXI_FUNCTION(0x3, "spi3"),          /* CS1 */
1326                   SUNXI_FUNCTION(0x5, "gmac"),          /* GNULL / ERXERR */
1327                   SUNXI_FUNCTION(0x6, "i2s1")),         /* MCLK */
1328         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
1329                   SUNXI_FUNCTION(0x0, "gpio_in"),
1330                   SUNXI_FUNCTION(0x1, "gpio_out"),
1331                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXDV */
1332                   SUNXI_FUNCTION(0x4, "uart1"),         /* TX */
1333                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXCTL / ERXDV */
1334         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
1335                   SUNXI_FUNCTION(0x0, "gpio_in"),
1336                   SUNXI_FUNCTION(0x1, "gpio_out"),
1337                   SUNXI_FUNCTION(0x2, "emac"),          /* EMDC */
1338                   SUNXI_FUNCTION(0x4, "uart1"),         /* RX */
1339                   SUNXI_FUNCTION(0x5, "gmac")),         /* EMDC */
1340         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
1341                   SUNXI_FUNCTION(0x0, "gpio_in"),
1342                   SUNXI_FUNCTION(0x1, "gpio_out"),
1343                   SUNXI_FUNCTION(0x2, "emac"),          /* EMDIO */
1344                   SUNXI_FUNCTION(0x3, "uart6"),         /* TX */
1345                   SUNXI_FUNCTION(0x4, "uart1"),         /* RTS */
1346                   SUNXI_FUNCTION(0x5, "gmac")),         /* EMDIO */
1347         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
1348                   SUNXI_FUNCTION(0x0, "gpio_in"),
1349                   SUNXI_FUNCTION(0x1, "gpio_out"),
1350                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXEN */
1351                   SUNXI_FUNCTION(0x3, "uart6"),         /* RX */
1352                   SUNXI_FUNCTION(0x4, "uart1"),         /* CTS */
1353                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXCTL / ETXEN */
1354         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
1355                   SUNXI_FUNCTION(0x0, "gpio_in"),
1356                   SUNXI_FUNCTION(0x1, "gpio_out"),
1357                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXCK */
1358                   SUNXI_FUNCTION(0x3, "uart7"),         /* TX */
1359                   SUNXI_FUNCTION(0x4, "uart1"),         /* DTR */
1360                   SUNXI_FUNCTION(0x5, "gmac"),          /* GNULL / ETXCK */
1361                   SUNXI_FUNCTION(0x6, "i2s1")),         /* BCLK */
1362         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
1363                   SUNXI_FUNCTION(0x0, "gpio_in"),
1364                   SUNXI_FUNCTION(0x1, "gpio_out"),
1365                   SUNXI_FUNCTION(0x2, "emac"),          /* ECRS */
1366                   SUNXI_FUNCTION(0x3, "uart7"),         /* RX */
1367                   SUNXI_FUNCTION(0x4, "uart1"),         /* DSR */
1368                   SUNXI_FUNCTION(0x5, "gmac"),          /* GTXCK / ECRS */
1369                   SUNXI_FUNCTION(0x6, "i2s1")),         /* LRCK */
1370         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
1371                   SUNXI_FUNCTION(0x0, "gpio_in"),
1372                   SUNXI_FUNCTION(0x1, "gpio_out"),
1373                   SUNXI_FUNCTION(0x2, "emac"),          /* ECOL */
1374                   SUNXI_FUNCTION(0x3, "can"),           /* TX */
1375                   SUNXI_FUNCTION(0x4, "uart1"),         /* DCD */
1376                   SUNXI_FUNCTION(0x5, "gmac"),          /* GCLKIN / ECOL */
1377                   SUNXI_FUNCTION(0x6, "i2s1")),         /* DO */
1378         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
1379                   SUNXI_FUNCTION(0x0, "gpio_in"),
1380                   SUNXI_FUNCTION(0x1, "gpio_out"),
1381                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXERR */
1382                   SUNXI_FUNCTION(0x3, "can"),           /* RX */
1383                   SUNXI_FUNCTION(0x4, "uart1"),         /* RING */
1384                   SUNXI_FUNCTION(0x5, "gmac"),          /* GNULL / ETXERR */
1385                   SUNXI_FUNCTION(0x6, "i2s1")),         /* LRCK */
1386         /* Hole */
1387         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
1388                   SUNXI_FUNCTION(0x0, "gpio_in"),
1389                   SUNXI_FUNCTION(0x1, "gpio_out"),
1390                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SCK */
1391         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
1392                   SUNXI_FUNCTION(0x0, "gpio_in"),
1393                   SUNXI_FUNCTION(0x1, "gpio_out"),
1394                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SDA */
1395         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
1396                   SUNXI_FUNCTION(0x0, "gpio_in"),
1397                   SUNXI_FUNCTION(0x1, "gpio_out"),
1398                   SUNXI_FUNCTION(0x2, "pwm")),          /* PWM0 */
1399         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
1400                   SUNXI_FUNCTION(0x0, "gpio_in"),
1401                   SUNXI_FUNCTION(0x1, "gpio_out"),
1402                   SUNXI_FUNCTION(0x2, "ir0"),           /* TX */
1403                   SUNXI_FUNCTION(0x4, "spdif")),        /* MCLK */
1404         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
1405                   SUNXI_FUNCTION(0x0, "gpio_in"),
1406                   SUNXI_FUNCTION(0x1, "gpio_out"),
1407                   SUNXI_FUNCTION(0x2, "ir0")),          /* RX */
1408         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
1409                   SUNXI_FUNCTION(0x0, "gpio_in"),
1410                   SUNXI_FUNCTION(0x1, "gpio_out"),
1411                   SUNXI_FUNCTION(0x2, "i2s0"),          /* MCLK */
1412                   SUNXI_FUNCTION(0x3, "ac97")),         /* MCLK */
1413         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
1414                   SUNXI_FUNCTION(0x0, "gpio_in"),
1415                   SUNXI_FUNCTION(0x1, "gpio_out"),
1416                   SUNXI_FUNCTION(0x2, "i2s0"),          /* BCLK */
1417                   SUNXI_FUNCTION(0x3, "ac97")),         /* BCLK */
1418         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
1419                   SUNXI_FUNCTION(0x0, "gpio_in"),
1420                   SUNXI_FUNCTION(0x1, "gpio_out"),
1421                   SUNXI_FUNCTION(0x2, "i2s0"),          /* LRCK */
1422                   SUNXI_FUNCTION(0x3, "ac97")),         /* SYNC */
1423         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
1424                   SUNXI_FUNCTION(0x0, "gpio_in"),
1425                   SUNXI_FUNCTION(0x1, "gpio_out"),
1426                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DO0 */
1427                   SUNXI_FUNCTION(0x3, "ac97")),         /* DO */
1428         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
1429                   SUNXI_FUNCTION(0x0, "gpio_in"),
1430                   SUNXI_FUNCTION(0x1, "gpio_out"),
1431                   SUNXI_FUNCTION(0x2, "i2s0")),         /* DO1 */
1432         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
1433                   SUNXI_FUNCTION(0x0, "gpio_in"),
1434                   SUNXI_FUNCTION(0x1, "gpio_out"),
1435                   SUNXI_FUNCTION(0x2, "i2s0")),         /* DO2 */
1436         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
1437                   SUNXI_FUNCTION(0x0, "gpio_in"),
1438                   SUNXI_FUNCTION(0x1, "gpio_out"),
1439                   SUNXI_FUNCTION(0x2, "i2s0")),         /* DO3 */
1440         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
1441                   SUNXI_FUNCTION(0x0, "gpio_in"),
1442                   SUNXI_FUNCTION(0x1, "gpio_out"),
1443                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DI */
1444                   SUNXI_FUNCTION(0x3, "ac97"),          /* DI */
1445                   SUNXI_FUNCTION(0x4, "spdif")),        /* DI */
1446         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
1447                   SUNXI_FUNCTION(0x0, "gpio_in"),
1448                   SUNXI_FUNCTION(0x1, "gpio_out"),
1449                   SUNXI_FUNCTION(0x2, "spi2"),          /* CS1 */
1450                   SUNXI_FUNCTION(0x4, "spdif")),        /* DO */
1451         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
1452                   SUNXI_FUNCTION(0x0, "gpio_in"),
1453                   SUNXI_FUNCTION(0x1, "gpio_out"),
1454                   SUNXI_FUNCTION(0x2, "spi2"),          /* CS0 */
1455                   SUNXI_FUNCTION(0x3, "jtag")),         /* MS0 */
1456         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
1457                   SUNXI_FUNCTION(0x0, "gpio_in"),
1458                   SUNXI_FUNCTION(0x1, "gpio_out"),
1459                   SUNXI_FUNCTION(0x2, "spi2"),          /* CLK */
1460                   SUNXI_FUNCTION(0x3, "jtag")),         /* CK0 */
1461         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
1462                   SUNXI_FUNCTION(0x0, "gpio_in"),
1463                   SUNXI_FUNCTION(0x1, "gpio_out"),
1464                   SUNXI_FUNCTION(0x2, "spi2"),          /* MOSI */
1465                   SUNXI_FUNCTION(0x3, "jtag")),         /* DO0 */
1466         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
1467                   SUNXI_FUNCTION(0x0, "gpio_in"),
1468                   SUNXI_FUNCTION(0x1, "gpio_out"),
1469                   SUNXI_FUNCTION(0x2, "spi2"),          /* MISO */
1470                   SUNXI_FUNCTION(0x3, "jtag")),         /* DI0 */
1471         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
1472                   SUNXI_FUNCTION(0x0, "gpio_in"),
1473                   SUNXI_FUNCTION(0x1, "gpio_out"),
1474                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SCK */
1475         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
1476                   SUNXI_FUNCTION(0x0, "gpio_in"),
1477                   SUNXI_FUNCTION(0x1, "gpio_out"),
1478                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SDA */
1479         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
1480                   SUNXI_FUNCTION(0x0, "gpio_in"),
1481                   SUNXI_FUNCTION(0x1, "gpio_out"),
1482                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SCK */
1483         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
1484                   SUNXI_FUNCTION(0x0, "gpio_in"),
1485                   SUNXI_FUNCTION(0x1, "gpio_out"),
1486                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SDA */
1487         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
1488                   SUNXI_FUNCTION(0x0, "gpio_in"),
1489                   SUNXI_FUNCTION(0x1, "gpio_out"),
1490                   SUNXI_FUNCTION(0x2, "uart0"),         /* TX */
1491                   SUNXI_FUNCTION(0x3, "ir1")),          /* TX */
1492         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
1493                   SUNXI_FUNCTION(0x0, "gpio_in"),
1494                   SUNXI_FUNCTION(0x1, "gpio_out"),
1495                   SUNXI_FUNCTION(0x2, "uart0"),         /* RX */
1496                   SUNXI_FUNCTION(0x3, "ir1")),          /* RX */
1497         /* Hole */
1498         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
1499                   SUNXI_FUNCTION(0x0, "gpio_in"),
1500                   SUNXI_FUNCTION(0x1, "gpio_out"),
1501                   SUNXI_FUNCTION(0x2, "nand0"),         /* NWE */
1502                   SUNXI_FUNCTION(0x3, "spi0")),         /* MOSI */
1503         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
1504                   SUNXI_FUNCTION(0x0, "gpio_in"),
1505                   SUNXI_FUNCTION(0x1, "gpio_out"),
1506                   SUNXI_FUNCTION(0x2, "nand0"),         /* NALE */
1507                   SUNXI_FUNCTION(0x3, "spi0")),         /* MISO */
1508         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
1509                   SUNXI_FUNCTION(0x0, "gpio_in"),
1510                   SUNXI_FUNCTION(0x1, "gpio_out"),
1511                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCLE */
1512                   SUNXI_FUNCTION(0x3, "spi0")),         /* SCK */
1513         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
1514                   SUNXI_FUNCTION(0x0, "gpio_in"),
1515                   SUNXI_FUNCTION(0x1, "gpio_out"),
1516                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE1 */
1517         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
1518                   SUNXI_FUNCTION(0x0, "gpio_in"),
1519                   SUNXI_FUNCTION(0x1, "gpio_out"),
1520                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE0 */
1521         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
1522                   SUNXI_FUNCTION(0x0, "gpio_in"),
1523                   SUNXI_FUNCTION(0x1, "gpio_out"),
1524                   SUNXI_FUNCTION(0x2, "nand0")),        /* NRE# */
1525         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
1526                   SUNXI_FUNCTION(0x0, "gpio_in"),
1527                   SUNXI_FUNCTION(0x1, "gpio_out"),
1528                   SUNXI_FUNCTION(0x2, "nand0"),         /* NRB0 */
1529                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CMD */
1530         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
1531                   SUNXI_FUNCTION(0x0, "gpio_in"),
1532                   SUNXI_FUNCTION(0x1, "gpio_out"),
1533                   SUNXI_FUNCTION(0x2, "nand0"),         /* NRB1 */
1534                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CLK */
1535         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
1536                   SUNXI_FUNCTION(0x0, "gpio_in"),
1537                   SUNXI_FUNCTION(0x1, "gpio_out"),
1538                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ0 */
1539                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D0 */
1540         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
1541                   SUNXI_FUNCTION(0x0, "gpio_in"),
1542                   SUNXI_FUNCTION(0x1, "gpio_out"),
1543                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ1 */
1544                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D1 */
1545         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
1546                   SUNXI_FUNCTION(0x0, "gpio_in"),
1547                   SUNXI_FUNCTION(0x1, "gpio_out"),
1548                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ2 */
1549                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D2 */
1550         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
1551                   SUNXI_FUNCTION(0x0, "gpio_in"),
1552                   SUNXI_FUNCTION(0x1, "gpio_out"),
1553                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ3 */
1554                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D3 */
1555         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
1556                   SUNXI_FUNCTION(0x0, "gpio_in"),
1557                   SUNXI_FUNCTION(0x1, "gpio_out"),
1558                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ4 */
1559         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
1560                   SUNXI_FUNCTION(0x0, "gpio_in"),
1561                   SUNXI_FUNCTION(0x1, "gpio_out"),
1562                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ5 */
1563         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
1564                   SUNXI_FUNCTION(0x0, "gpio_in"),
1565                   SUNXI_FUNCTION(0x1, "gpio_out"),
1566                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ6 */
1567         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
1568                   SUNXI_FUNCTION(0x0, "gpio_in"),
1569                   SUNXI_FUNCTION(0x1, "gpio_out"),
1570                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ7 */
1571         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
1572                   SUNXI_FUNCTION(0x0, "gpio_in"),
1573                   SUNXI_FUNCTION(0x1, "gpio_out"),
1574                   SUNXI_FUNCTION(0x2, "nand0")),        /* NWP */
1575         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
1576                   SUNXI_FUNCTION(0x0, "gpio_in"),
1577                   SUNXI_FUNCTION(0x1, "gpio_out"),
1578                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE2 */
1579         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
1580                   SUNXI_FUNCTION(0x0, "gpio_in"),
1581                   SUNXI_FUNCTION(0x1, "gpio_out"),
1582                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE3 */
1583         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
1584                   SUNXI_FUNCTION(0x0, "gpio_in"),
1585                   SUNXI_FUNCTION(0x1, "gpio_out"),
1586                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE4 */
1587                   SUNXI_FUNCTION(0x3, "spi2"),          /* CS0 */
1588                   SUNXI_FUNCTION_IRQ(0x6, 12)),         /* EINT12 */
1589         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
1590                   SUNXI_FUNCTION(0x0, "gpio_in"),
1591                   SUNXI_FUNCTION(0x1, "gpio_out"),
1592                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE5 */
1593                   SUNXI_FUNCTION(0x3, "spi2"),          /* CLK */
1594                   SUNXI_FUNCTION_IRQ(0x6, 13)),         /* EINT13 */
1595         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
1596                   SUNXI_FUNCTION(0x0, "gpio_in"),
1597                   SUNXI_FUNCTION(0x1, "gpio_out"),
1598                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE6 */
1599                   SUNXI_FUNCTION(0x3, "spi2"),          /* MOSI */
1600                   SUNXI_FUNCTION_IRQ(0x6, 14)),         /* EINT14 */
1601         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
1602                   SUNXI_FUNCTION(0x0, "gpio_in"),
1603                   SUNXI_FUNCTION(0x1, "gpio_out"),
1604                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE7 */
1605                   SUNXI_FUNCTION(0x3, "spi2"),          /* MISO */
1606                   SUNXI_FUNCTION_IRQ(0x6, 15)),         /* EINT15 */
1607         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
1608                   SUNXI_FUNCTION(0x0, "gpio_in"),
1609                   SUNXI_FUNCTION(0x1, "gpio_out"),
1610                   SUNXI_FUNCTION(0x3, "spi0")),         /* CS0 */
1611         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
1612                   SUNXI_FUNCTION(0x0, "gpio_in"),
1613                   SUNXI_FUNCTION(0x1, "gpio_out"),
1614                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQS */
1615         /* Hole */
1616         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
1617                   SUNXI_FUNCTION(0x0, "gpio_in"),
1618                   SUNXI_FUNCTION(0x1, "gpio_out"),
1619                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D0 */
1620                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP0 */
1621         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
1622                   SUNXI_FUNCTION(0x0, "gpio_in"),
1623                   SUNXI_FUNCTION(0x1, "gpio_out"),
1624                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D1 */
1625                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN0 */
1626         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
1627                   SUNXI_FUNCTION(0x0, "gpio_in"),
1628                   SUNXI_FUNCTION(0x1, "gpio_out"),
1629                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D2 */
1630                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP1 */
1631         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
1632                   SUNXI_FUNCTION(0x0, "gpio_in"),
1633                   SUNXI_FUNCTION(0x1, "gpio_out"),
1634                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D3 */
1635                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN1 */
1636         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
1637                   SUNXI_FUNCTION(0x0, "gpio_in"),
1638                   SUNXI_FUNCTION(0x1, "gpio_out"),
1639                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D4 */
1640                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP2 */
1641         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
1642                   SUNXI_FUNCTION(0x0, "gpio_in"),
1643                   SUNXI_FUNCTION(0x1, "gpio_out"),
1644                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D5 */
1645                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN2 */
1646         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
1647                   SUNXI_FUNCTION(0x0, "gpio_in"),
1648                   SUNXI_FUNCTION(0x1, "gpio_out"),
1649                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D6 */
1650                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VPC */
1651         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
1652                   SUNXI_FUNCTION(0x0, "gpio_in"),
1653                   SUNXI_FUNCTION(0x1, "gpio_out"),
1654                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D7 */
1655                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VNC */
1656         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
1657                   SUNXI_FUNCTION(0x0, "gpio_in"),
1658                   SUNXI_FUNCTION(0x1, "gpio_out"),
1659                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D8 */
1660                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP3 */
1661         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
1662                   SUNXI_FUNCTION(0x0, "gpio_in"),
1663                   SUNXI_FUNCTION(0x1, "gpio_out"),
1664                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D9 */
1665                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VM3 */
1666         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
1667                   SUNXI_FUNCTION(0x0, "gpio_in"),
1668                   SUNXI_FUNCTION(0x1, "gpio_out"),
1669                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D10 */
1670                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP0 */
1671         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
1672                   SUNXI_FUNCTION(0x0, "gpio_in"),
1673                   SUNXI_FUNCTION(0x1, "gpio_out"),
1674                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D11 */
1675                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN0 */
1676         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
1677                   SUNXI_FUNCTION(0x0, "gpio_in"),
1678                   SUNXI_FUNCTION(0x1, "gpio_out"),
1679                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D12 */
1680                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP1 */
1681         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
1682                   SUNXI_FUNCTION(0x0, "gpio_in"),
1683                   SUNXI_FUNCTION(0x1, "gpio_out"),
1684                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D13 */
1685                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN1 */
1686         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
1687                   SUNXI_FUNCTION(0x0, "gpio_in"),
1688                   SUNXI_FUNCTION(0x1, "gpio_out"),
1689                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D14 */
1690                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP2 */
1691         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
1692                   SUNXI_FUNCTION(0x0, "gpio_in"),
1693                   SUNXI_FUNCTION(0x1, "gpio_out"),
1694                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D15 */
1695                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN2 */
1696         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
1697                   SUNXI_FUNCTION(0x0, "gpio_in"),
1698                   SUNXI_FUNCTION(0x1, "gpio_out"),
1699                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D16 */
1700                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VPC */
1701         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
1702                   SUNXI_FUNCTION(0x0, "gpio_in"),
1703                   SUNXI_FUNCTION(0x1, "gpio_out"),
1704                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D17 */
1705                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VNC */
1706         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
1707                   SUNXI_FUNCTION(0x0, "gpio_in"),
1708                   SUNXI_FUNCTION(0x1, "gpio_out"),
1709                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D18 */
1710                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP3 */
1711         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
1712                   SUNXI_FUNCTION(0x0, "gpio_in"),
1713                   SUNXI_FUNCTION(0x1, "gpio_out"),
1714                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D19 */
1715                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN3 */
1716         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
1717                   SUNXI_FUNCTION(0x0, "gpio_in"),
1718                   SUNXI_FUNCTION(0x1, "gpio_out"),
1719                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D20 */
1720                   SUNXI_FUNCTION(0x3, "csi1")),         /* MCLK */
1721         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
1722                   SUNXI_FUNCTION(0x0, "gpio_in"),
1723                   SUNXI_FUNCTION(0x1, "gpio_out"),
1724                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D21 */
1725                   SUNXI_FUNCTION(0x3, "sim")),          /* VPPEN */
1726         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
1727                   SUNXI_FUNCTION(0x0, "gpio_in"),
1728                   SUNXI_FUNCTION(0x1, "gpio_out"),
1729                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D22 */
1730                   SUNXI_FUNCTION(0x3, "sim")),          /* VPPPP */
1731         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
1732                   SUNXI_FUNCTION(0x0, "gpio_in"),
1733                   SUNXI_FUNCTION(0x1, "gpio_out"),
1734                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D23 */
1735                   SUNXI_FUNCTION(0x3, "sim")),          /* DET */
1736         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
1737                   SUNXI_FUNCTION(0x0, "gpio_in"),
1738                   SUNXI_FUNCTION(0x1, "gpio_out"),
1739                   SUNXI_FUNCTION(0x2, "lcd0"),          /* CLK */
1740                   SUNXI_FUNCTION(0x3, "sim")),          /* VCCEN */
1741         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
1742                   SUNXI_FUNCTION(0x0, "gpio_in"),
1743                   SUNXI_FUNCTION(0x1, "gpio_out"),
1744                   SUNXI_FUNCTION(0x2, "lcd0"),          /* DE */
1745                   SUNXI_FUNCTION(0x3, "sim")),          /* RST */
1746         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
1747                   SUNXI_FUNCTION(0x0, "gpio_in"),
1748                   SUNXI_FUNCTION(0x1, "gpio_out"),
1749                   SUNXI_FUNCTION(0x2, "lcd0"),          /* HSYNC */
1750                   SUNXI_FUNCTION(0x3, "sim")),          /* SCK */
1751         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
1752                   SUNXI_FUNCTION(0x0, "gpio_in"),
1753                   SUNXI_FUNCTION(0x1, "gpio_out"),
1754                   SUNXI_FUNCTION(0x2, "lcd0"),          /* VSYNC */
1755                   SUNXI_FUNCTION(0x3, "sim")),          /* SDA */
1756         /* Hole */
1757         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
1758                   SUNXI_FUNCTION(0x0, "gpio_in"),
1759                   SUNXI_FUNCTION(0x1, "gpio_out"),
1760                   SUNXI_FUNCTION(0x2, "ts0"),           /* CLK */
1761                   SUNXI_FUNCTION(0x3, "csi0")),         /* PCK */
1762         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
1763                   SUNXI_FUNCTION(0x0, "gpio_in"),
1764                   SUNXI_FUNCTION(0x1, "gpio_out"),
1765                   SUNXI_FUNCTION(0x2, "ts0"),           /* ERR */
1766                   SUNXI_FUNCTION(0x3, "csi0")),         /* CK */
1767         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
1768                   SUNXI_FUNCTION(0x0, "gpio_in"),
1769                   SUNXI_FUNCTION(0x1, "gpio_out"),
1770                   SUNXI_FUNCTION(0x2, "ts0"),           /* SYNC */
1771                   SUNXI_FUNCTION(0x3, "csi0")),         /* HSYNC */
1772         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
1773                   SUNXI_FUNCTION(0x0, "gpio_in"),
1774                   SUNXI_FUNCTION(0x1, "gpio_out"),
1775                   SUNXI_FUNCTION(0x2, "ts0"),           /* DVLD */
1776                   SUNXI_FUNCTION(0x3, "csi0")),         /* VSYNC */
1777         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
1778                   SUNXI_FUNCTION(0x0, "gpio_in"),
1779                   SUNXI_FUNCTION(0x1, "gpio_out"),
1780                   SUNXI_FUNCTION(0x2, "ts0"),           /* D0 */
1781                   SUNXI_FUNCTION(0x3, "csi0")),         /* D0 */
1782         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
1783                   SUNXI_FUNCTION(0x0, "gpio_in"),
1784                   SUNXI_FUNCTION(0x1, "gpio_out"),
1785                   SUNXI_FUNCTION(0x2, "ts0"),           /* D1 */
1786                   SUNXI_FUNCTION(0x3, "csi0"),          /* D1 */
1787                   SUNXI_FUNCTION(0x4, "sim")),          /* VPPEN */
1788         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
1789                   SUNXI_FUNCTION(0x0, "gpio_in"),
1790                   SUNXI_FUNCTION(0x1, "gpio_out"),
1791                   SUNXI_FUNCTION(0x2, "ts0"),           /* D2 */
1792                   SUNXI_FUNCTION(0x3, "csi0")),         /* D2 */
1793         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
1794                   SUNXI_FUNCTION(0x0, "gpio_in"),
1795                   SUNXI_FUNCTION(0x1, "gpio_out"),
1796                   SUNXI_FUNCTION(0x2, "ts0"),           /* D3 */
1797                   SUNXI_FUNCTION(0x3, "csi0")),         /* D3 */
1798         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
1799                   SUNXI_FUNCTION(0x0, "gpio_in"),
1800                   SUNXI_FUNCTION(0x1, "gpio_out"),
1801                   SUNXI_FUNCTION(0x2, "ts0"),           /* D4 */
1802                   SUNXI_FUNCTION(0x3, "csi0")),         /* D4 */
1803         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
1804                   SUNXI_FUNCTION(0x0, "gpio_in"),
1805                   SUNXI_FUNCTION(0x1, "gpio_out"),
1806                   SUNXI_FUNCTION(0x2, "ts0"),           /* D5 */
1807                   SUNXI_FUNCTION(0x3, "csi0")),         /* D5 */
1808         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
1809                   SUNXI_FUNCTION(0x0, "gpio_in"),
1810                   SUNXI_FUNCTION(0x1, "gpio_out"),
1811                   SUNXI_FUNCTION(0x2, "ts0"),           /* D6 */
1812                   SUNXI_FUNCTION(0x3, "csi0")),         /* D6 */
1813         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
1814                   SUNXI_FUNCTION(0x0, "gpio_in"),
1815                   SUNXI_FUNCTION(0x1, "gpio_out"),
1816                   SUNXI_FUNCTION(0x2, "ts0"),           /* D7 */
1817                   SUNXI_FUNCTION(0x3, "csi0")),         /* D7 */
1818         /* Hole */
1819         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
1820                   SUNXI_FUNCTION(0x0, "gpio_in"),
1821                   SUNXI_FUNCTION(0x1, "gpio_out"),
1822                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D1 */
1823                   SUNXI_FUNCTION(0x4, "jtag")),         /* MSI */
1824         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
1825                   SUNXI_FUNCTION(0x0, "gpio_in"),
1826                   SUNXI_FUNCTION(0x1, "gpio_out"),
1827                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D0 */
1828                   SUNXI_FUNCTION(0x4, "jtag")),         /* DI1 */
1829         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
1830                   SUNXI_FUNCTION(0x0, "gpio_in"),
1831                   SUNXI_FUNCTION(0x1, "gpio_out"),
1832                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CLK */
1833                   SUNXI_FUNCTION(0x4, "uart0")),        /* TX */
1834         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
1835                   SUNXI_FUNCTION(0x0, "gpio_in"),
1836                   SUNXI_FUNCTION(0x1, "gpio_out"),
1837                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CMD */
1838                   SUNXI_FUNCTION(0x4, "jtag")),         /* DO1 */
1839         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
1840                   SUNXI_FUNCTION(0x0, "gpio_in"),
1841                   SUNXI_FUNCTION(0x1, "gpio_out"),
1842                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D3 */
1843                   SUNXI_FUNCTION(0x4, "uart0")),        /* RX */
1844         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
1845                   SUNXI_FUNCTION(0x0, "gpio_in"),
1846                   SUNXI_FUNCTION(0x1, "gpio_out"),
1847                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D2 */
1848                   SUNXI_FUNCTION(0x4, "jtag")),         /* CK1 */
1849         /* Hole */
1850         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
1851                   SUNXI_FUNCTION(0x0, "gpio_in"),
1852                   SUNXI_FUNCTION(0x1, "gpio_out"),
1853                   SUNXI_FUNCTION(0x2, "ts1"),           /* CLK */
1854                   SUNXI_FUNCTION(0x3, "csi1"),          /* PCK */
1855                   SUNXI_FUNCTION(0x4, "mmc1")),         /* CMD */
1856         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
1857                   SUNXI_FUNCTION(0x0, "gpio_in"),
1858                   SUNXI_FUNCTION(0x1, "gpio_out"),
1859                   SUNXI_FUNCTION(0x2, "ts1"),           /* ERR */
1860                   SUNXI_FUNCTION(0x3, "csi1"),          /* CK */
1861                   SUNXI_FUNCTION(0x4, "mmc1")),         /* CLK */
1862         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
1863                   SUNXI_FUNCTION(0x0, "gpio_in"),
1864                   SUNXI_FUNCTION(0x1, "gpio_out"),
1865                   SUNXI_FUNCTION(0x2, "ts1"),           /* SYNC */
1866                   SUNXI_FUNCTION(0x3, "csi1"),          /* HSYNC */
1867                   SUNXI_FUNCTION(0x4, "mmc1")),         /* D0 */
1868         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
1869                   SUNXI_FUNCTION(0x0, "gpio_in"),
1870                   SUNXI_FUNCTION(0x1, "gpio_out"),
1871                   SUNXI_FUNCTION(0x2, "ts1"),           /* DVLD */
1872                   SUNXI_FUNCTION(0x3, "csi1"),          /* VSYNC */
1873                   SUNXI_FUNCTION(0x4, "mmc1")),         /* D1 */
1874         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
1875                   SUNXI_FUNCTION(0x0, "gpio_in"),
1876                   SUNXI_FUNCTION(0x1, "gpio_out"),
1877                   SUNXI_FUNCTION(0x2, "ts1"),           /* D0 */
1878                   SUNXI_FUNCTION(0x3, "csi1"),          /* D0 */
1879                   SUNXI_FUNCTION(0x4, "mmc1"),          /* D2 */
1880                   SUNXI_FUNCTION(0x5, "csi0")),         /* D8 */
1881         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
1882                   SUNXI_FUNCTION(0x0, "gpio_in"),
1883                   SUNXI_FUNCTION(0x1, "gpio_out"),
1884                   SUNXI_FUNCTION(0x2, "ts1"),           /* D1 */
1885                   SUNXI_FUNCTION(0x3, "csi1"),          /* D1 */
1886                   SUNXI_FUNCTION(0x4, "mmc1"),          /* D3 */
1887                   SUNXI_FUNCTION(0x5, "csi0")),         /* D9 */
1888         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
1889                   SUNXI_FUNCTION(0x0, "gpio_in"),
1890                   SUNXI_FUNCTION(0x1, "gpio_out"),
1891                   SUNXI_FUNCTION(0x2, "ts1"),           /* D2 */
1892                   SUNXI_FUNCTION(0x3, "csi1"),          /* D2 */
1893                   SUNXI_FUNCTION(0x4, "uart3"),         /* TX */
1894                   SUNXI_FUNCTION(0x5, "csi0")),         /* D10 */
1895         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
1896                   SUNXI_FUNCTION(0x0, "gpio_in"),
1897                   SUNXI_FUNCTION(0x1, "gpio_out"),
1898                   SUNXI_FUNCTION(0x2, "ts1"),           /* D3 */
1899                   SUNXI_FUNCTION(0x3, "csi1"),          /* D3 */
1900                   SUNXI_FUNCTION(0x4, "uart3"),         /* RX */
1901                   SUNXI_FUNCTION(0x5, "csi0")),         /* D11 */
1902         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
1903                   SUNXI_FUNCTION(0x0, "gpio_in"),
1904                   SUNXI_FUNCTION(0x1, "gpio_out"),
1905                   SUNXI_FUNCTION(0x2, "ts1"),           /* D4 */
1906                   SUNXI_FUNCTION(0x3, "csi1"),          /* D4 */
1907                   SUNXI_FUNCTION(0x4, "uart3"),         /* RTS */
1908                   SUNXI_FUNCTION(0x5, "csi0")),         /* D12 */
1909         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
1910                   SUNXI_FUNCTION(0x0, "gpio_in"),
1911                   SUNXI_FUNCTION(0x1, "gpio_out"),
1912                   SUNXI_FUNCTION(0x2, "ts1"),           /* D5 */
1913                   SUNXI_FUNCTION(0x3, "csi1"),          /* D5 */
1914                   SUNXI_FUNCTION(0x4, "uart3"),         /* CTS */
1915                   SUNXI_FUNCTION(0x5, "csi0")),         /* D13 */
1916         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
1917                   SUNXI_FUNCTION(0x0, "gpio_in"),
1918                   SUNXI_FUNCTION(0x1, "gpio_out"),
1919                   SUNXI_FUNCTION(0x2, "ts1"),           /* D6 */
1920                   SUNXI_FUNCTION(0x3, "csi1"),          /* D6 */
1921                   SUNXI_FUNCTION(0x4, "uart4"),         /* TX */
1922                   SUNXI_FUNCTION(0x5, "csi0")),         /* D14 */
1923         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
1924                   SUNXI_FUNCTION(0x0, "gpio_in"),
1925                   SUNXI_FUNCTION(0x1, "gpio_out"),
1926                   SUNXI_FUNCTION(0x2, "ts1"),           /* D7 */
1927                   SUNXI_FUNCTION(0x3, "csi1"),          /* D7 */
1928                   SUNXI_FUNCTION(0x4, "uart4"),         /* RX */
1929                   SUNXI_FUNCTION(0x5, "csi0")),         /* D15 */
1930         /* Hole */
1931         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
1932                   SUNXI_FUNCTION(0x0, "gpio_in"),
1933                   SUNXI_FUNCTION(0x1, "gpio_out"),
1934                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D0 */
1935                   SUNXI_FUNCTION(0x4, "uart3"),         /* TX */
1936                   SUNXI_FUNCTION_IRQ(0x6, 0),           /* EINT0 */
1937                   SUNXI_FUNCTION(0x7, "csi1")),         /* D0 */
1938         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
1939                   SUNXI_FUNCTION(0x0, "gpio_in"),
1940                   SUNXI_FUNCTION(0x1, "gpio_out"),
1941                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D1 */
1942                   SUNXI_FUNCTION(0x4, "uart3"),         /* RX */
1943                   SUNXI_FUNCTION_IRQ(0x6, 1),           /* EINT1 */
1944                   SUNXI_FUNCTION(0x7, "csi1")),         /* D1 */
1945         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
1946                   SUNXI_FUNCTION(0x0, "gpio_in"),
1947                   SUNXI_FUNCTION(0x1, "gpio_out"),
1948                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D2 */
1949                   SUNXI_FUNCTION(0x4, "uart3"),         /* RTS */
1950                   SUNXI_FUNCTION_IRQ(0x6, 2),           /* EINT2 */
1951                   SUNXI_FUNCTION(0x7, "csi1")),         /* D2 */
1952         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
1953                   SUNXI_FUNCTION(0x0, "gpio_in"),
1954                   SUNXI_FUNCTION(0x1, "gpio_out"),
1955                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D3 */
1956                   SUNXI_FUNCTION(0x4, "uart3"),         /* CTS */
1957                   SUNXI_FUNCTION_IRQ(0x6, 3),           /* EINT3 */
1958                   SUNXI_FUNCTION(0x7, "csi1")),         /* D3 */
1959         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
1960                   SUNXI_FUNCTION(0x0, "gpio_in"),
1961                   SUNXI_FUNCTION(0x1, "gpio_out"),
1962                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D4 */
1963                   SUNXI_FUNCTION(0x4, "uart4"),         /* TX */
1964                   SUNXI_FUNCTION_IRQ(0x6, 4),           /* EINT4 */
1965                   SUNXI_FUNCTION(0x7, "csi1")),         /* D4 */
1966         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
1967                   SUNXI_FUNCTION(0x0, "gpio_in"),
1968                   SUNXI_FUNCTION(0x1, "gpio_out"),
1969                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D5 */
1970                   SUNXI_FUNCTION(0x4, "uart4"),         /* RX */
1971                   SUNXI_FUNCTION_IRQ(0x6, 5),           /* EINT5 */
1972                   SUNXI_FUNCTION(0x7, "csi1")),         /* D5 */
1973         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
1974                   SUNXI_FUNCTION(0x0, "gpio_in"),
1975                   SUNXI_FUNCTION(0x1, "gpio_out"),
1976                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D6 */
1977                   SUNXI_FUNCTION(0x4, "uart5"),         /* TX */
1978                   SUNXI_FUNCTION(0x5, "ms"),            /* BS */
1979                   SUNXI_FUNCTION_IRQ(0x6, 6),           /* EINT6 */
1980                   SUNXI_FUNCTION(0x7, "csi1")),         /* D6 */
1981         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
1982                   SUNXI_FUNCTION(0x0, "gpio_in"),
1983                   SUNXI_FUNCTION(0x1, "gpio_out"),
1984                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D7 */
1985                   SUNXI_FUNCTION(0x4, "uart5"),         /* RX */
1986                   SUNXI_FUNCTION(0x5, "ms"),            /* CLK */
1987                   SUNXI_FUNCTION_IRQ(0x6, 7),           /* EINT7 */
1988                   SUNXI_FUNCTION(0x7, "csi1")),         /* D7 */
1989         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
1990                   SUNXI_FUNCTION(0x0, "gpio_in"),
1991                   SUNXI_FUNCTION(0x1, "gpio_out"),
1992                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D8 */
1993                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD3 */
1994                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN0 */
1995                   SUNXI_FUNCTION(0x5, "ms"),            /* D0 */
1996                   SUNXI_FUNCTION_IRQ(0x6, 8),           /* EINT8 */
1997                   SUNXI_FUNCTION(0x7, "csi1")),         /* D8 */
1998         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
1999                   SUNXI_FUNCTION(0x0, "gpio_in"),
2000                   SUNXI_FUNCTION(0x1, "gpio_out"),
2001                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D9 */
2002                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD2 */
2003                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN1 */
2004                   SUNXI_FUNCTION(0x5, "ms"),            /* D1 */
2005                   SUNXI_FUNCTION_IRQ(0x6, 9),           /* EINT9 */
2006                   SUNXI_FUNCTION(0x7, "csi1")),         /* D9 */
2007         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
2008                   SUNXI_FUNCTION(0x0, "gpio_in"),
2009                   SUNXI_FUNCTION(0x1, "gpio_out"),
2010                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D10 */
2011                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD1 */
2012                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN2 */
2013                   SUNXI_FUNCTION(0x5, "ms"),            /* D2 */
2014                   SUNXI_FUNCTION_IRQ(0x6, 10),          /* EINT10 */
2015                   SUNXI_FUNCTION(0x7, "csi1")),         /* D10 */
2016         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
2017                   SUNXI_FUNCTION(0x0, "gpio_in"),
2018                   SUNXI_FUNCTION(0x1, "gpio_out"),
2019                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D11 */
2020                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD0 */
2021                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN3 */
2022                   SUNXI_FUNCTION(0x5, "ms"),            /* D3 */
2023                   SUNXI_FUNCTION_IRQ(0x6, 11),          /* EINT11 */
2024                   SUNXI_FUNCTION(0x7, "csi1")),         /* D11 */
2025         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
2026                   SUNXI_FUNCTION(0x0, "gpio_in"),
2027                   SUNXI_FUNCTION(0x1, "gpio_out"),
2028                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D12 */
2029                   SUNXI_FUNCTION(0x4, "ps2"),           /* SCK1 */
2030                   SUNXI_FUNCTION_IRQ(0x6, 12),          /* EINT12 */
2031                   SUNXI_FUNCTION(0x7, "csi1")),         /* D12 */
2032         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
2033                   SUNXI_FUNCTION(0x0, "gpio_in"),
2034                   SUNXI_FUNCTION(0x1, "gpio_out"),
2035                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D13 */
2036                   SUNXI_FUNCTION(0x4, "ps2"),           /* SDA1 */
2037                   SUNXI_FUNCTION(0x5, "sim"),           /* RST */
2038                   SUNXI_FUNCTION_IRQ(0x6, 13),          /* EINT13 */
2039                   SUNXI_FUNCTION(0x7, "csi1")),         /* D13 */
2040         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
2041                   SUNXI_FUNCTION(0x0, "gpio_in"),
2042                   SUNXI_FUNCTION(0x1, "gpio_out"),
2043                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D14 */
2044                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD3 */
2045                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN4 */
2046                   SUNXI_FUNCTION(0x5, "sim"),           /* VPPEN */
2047                   SUNXI_FUNCTION_IRQ(0x6, 14),          /* EINT14 */
2048                   SUNXI_FUNCTION(0x7, "csi1")),         /* D14 */
2049         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
2050                   SUNXI_FUNCTION(0x0, "gpio_in"),
2051                   SUNXI_FUNCTION(0x1, "gpio_out"),
2052                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D15 */
2053                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD3 */
2054                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN5 */
2055                   SUNXI_FUNCTION(0x5, "sim"),           /* VPPPP */
2056                   SUNXI_FUNCTION_IRQ(0x6, 15),          /* EINT15 */
2057                   SUNXI_FUNCTION(0x7, "csi1")),         /* D15 */
2058         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
2059                   SUNXI_FUNCTION(0x0, "gpio_in"),
2060                   SUNXI_FUNCTION(0x1, "gpio_out"),
2061                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D16 */
2062                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD2 */
2063                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN6 */
2064                   SUNXI_FUNCTION_IRQ(0x6, 16),          /* EINT16 */
2065                   SUNXI_FUNCTION(0x7, "csi1")),         /* D16 */
2066         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
2067                   SUNXI_FUNCTION(0x0, "gpio_in"),
2068                   SUNXI_FUNCTION(0x1, "gpio_out"),
2069                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D17 */
2070                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD1 */
2071                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN7 */
2072                   SUNXI_FUNCTION(0x5, "sim"),           /* VCCEN */
2073                   SUNXI_FUNCTION_IRQ(0x6, 17),          /* EINT17 */
2074                   SUNXI_FUNCTION(0x7, "csi1")),         /* D17 */
2075         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
2076                   SUNXI_FUNCTION(0x0, "gpio_in"),
2077                   SUNXI_FUNCTION(0x1, "gpio_out"),
2078                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D18 */
2079                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD0 */
2080                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT0 */
2081                   SUNXI_FUNCTION(0x5, "sim"),           /* SCK */
2082                   SUNXI_FUNCTION_IRQ(0x6, 18),          /* EINT18 */
2083                   SUNXI_FUNCTION(0x7, "csi1")),         /* D18 */
2084         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
2085                   SUNXI_FUNCTION(0x0, "gpio_in"),
2086                   SUNXI_FUNCTION(0x1, "gpio_out"),
2087                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D19 */
2088                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXERR */
2089                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT1 */
2090                   SUNXI_FUNCTION(0x5, "sim"),           /* SDA */
2091                   SUNXI_FUNCTION_IRQ(0x6, 19),          /* EINT19 */
2092                   SUNXI_FUNCTION(0x7, "csi1")),         /* D19 */
2093         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
2094                   SUNXI_FUNCTION(0x0, "gpio_in"),
2095                   SUNXI_FUNCTION(0x1, "gpio_out"),
2096                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D20 */
2097                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXDV */
2098                   SUNXI_FUNCTION(0x4, "can"),           /* TX */
2099                   SUNXI_FUNCTION_IRQ(0x6, 20),          /* EINT20 */
2100                   SUNXI_FUNCTION(0x7, "csi1")),         /* D20 */
2101         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
2102                   SUNXI_FUNCTION(0x0, "gpio_in"),
2103                   SUNXI_FUNCTION(0x1, "gpio_out"),
2104                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D21 */
2105                   SUNXI_FUNCTION(0x3, "emac"),          /* EMDC */
2106                   SUNXI_FUNCTION(0x4, "can"),           /* RX */
2107                   SUNXI_FUNCTION_IRQ(0x6, 21),          /* EINT21 */
2108                   SUNXI_FUNCTION(0x7, "csi1")),         /* D21 */
2109         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
2110                   SUNXI_FUNCTION(0x0, "gpio_in"),
2111                   SUNXI_FUNCTION(0x1, "gpio_out"),
2112                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D22 */
2113                   SUNXI_FUNCTION(0x3, "emac"),          /* EMDIO */
2114                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT2 */
2115                   SUNXI_FUNCTION(0x5, "mmc1"),          /* CMD */
2116                   SUNXI_FUNCTION(0x7, "csi1")),         /* D22 */
2117         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
2118                   SUNXI_FUNCTION(0x0, "gpio_in"),
2119                   SUNXI_FUNCTION(0x1, "gpio_out"),
2120                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D23 */
2121                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXEN */
2122                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT3 */
2123                   SUNXI_FUNCTION(0x5, "mmc1"),          /* CLK */
2124                   SUNXI_FUNCTION(0x7, "csi1")),         /* D23 */
2125         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
2126                   SUNXI_FUNCTION(0x0, "gpio_in"),
2127                   SUNXI_FUNCTION(0x1, "gpio_out"),
2128                   SUNXI_FUNCTION(0x2, "lcd1"),          /* CLK */
2129                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXCK */
2130                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT4 */
2131                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D0 */
2132                   SUNXI_FUNCTION(0x7, "csi1")),         /* PCLK */
2133         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
2134                   SUNXI_FUNCTION(0x0, "gpio_in"),
2135                   SUNXI_FUNCTION(0x1, "gpio_out"),
2136                   SUNXI_FUNCTION(0x2, "lcd1"),          /* DE */
2137                   SUNXI_FUNCTION(0x3, "emac"),          /* ECRS */
2138                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT5 */
2139                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D1 */
2140                   SUNXI_FUNCTION(0x7, "csi1")),         /* FIELD */
2141         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
2142                   SUNXI_FUNCTION(0x0, "gpio_in"),
2143                   SUNXI_FUNCTION(0x1, "gpio_out"),
2144                   SUNXI_FUNCTION(0x2, "lcd1"),          /* HSYNC */
2145                   SUNXI_FUNCTION(0x3, "emac"),          /* ECOL */
2146                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT6 */
2147                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D2 */
2148                   SUNXI_FUNCTION(0x7, "csi1")),         /* HSYNC */
2149         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
2150                   SUNXI_FUNCTION(0x0, "gpio_in"),
2151                   SUNXI_FUNCTION(0x1, "gpio_out"),
2152                   SUNXI_FUNCTION(0x2, "lcd1"),          /* VSYNC */
2153                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXERR */
2154                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT7 */
2155                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D3 */
2156                   SUNXI_FUNCTION(0x7, "csi1")),         /* VSYNC */
2157         /* Hole */
2158         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
2159                   SUNXI_FUNCTION(0x0, "gpio_in"),
2160                   SUNXI_FUNCTION(0x1, "gpio_out"),
2161                   SUNXI_FUNCTION(0x3, "i2c3")),         /* SCK */
2162         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
2163                   SUNXI_FUNCTION(0x0, "gpio_in"),
2164                   SUNXI_FUNCTION(0x1, "gpio_out"),
2165                   SUNXI_FUNCTION(0x3, "i2c3")),         /* SDA */
2166         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
2167                   SUNXI_FUNCTION(0x0, "gpio_in"),
2168                   SUNXI_FUNCTION(0x1, "gpio_out"),
2169                   SUNXI_FUNCTION(0x3, "i2c4")),         /* SCK */
2170         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
2171                   SUNXI_FUNCTION(0x0, "gpio_in"),
2172                   SUNXI_FUNCTION(0x1, "gpio_out"),
2173                   SUNXI_FUNCTION(0x2, "pwm"),           /* PWM1 */
2174                   SUNXI_FUNCTION(0x3, "i2c4")),         /* SDA */
2175         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
2176                   SUNXI_FUNCTION(0x0, "gpio_in"),
2177                   SUNXI_FUNCTION(0x1, "gpio_out"),
2178                   SUNXI_FUNCTION(0x2, "mmc3")),         /* CMD */
2179         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
2180                   SUNXI_FUNCTION(0x0, "gpio_in"),
2181                   SUNXI_FUNCTION(0x1, "gpio_out"),
2182                   SUNXI_FUNCTION(0x2, "mmc3")),         /* CLK */
2183         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
2184                   SUNXI_FUNCTION(0x0, "gpio_in"),
2185                   SUNXI_FUNCTION(0x1, "gpio_out"),
2186                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D0 */
2187         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
2188                   SUNXI_FUNCTION(0x0, "gpio_in"),
2189                   SUNXI_FUNCTION(0x1, "gpio_out"),
2190                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D1 */
2191         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
2192                   SUNXI_FUNCTION(0x0, "gpio_in"),
2193                   SUNXI_FUNCTION(0x1, "gpio_out"),
2194                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D2 */
2195         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
2196                   SUNXI_FUNCTION(0x0, "gpio_in"),
2197                   SUNXI_FUNCTION(0x1, "gpio_out"),
2198                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D3 */
2199         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
2200                   SUNXI_FUNCTION(0x0, "gpio_in"),
2201                   SUNXI_FUNCTION(0x1, "gpio_out"),
2202                   SUNXI_FUNCTION(0x2, "spi0"),          /* CS0 */
2203                   SUNXI_FUNCTION(0x3, "uart5"),         /* TX */
2204                   SUNXI_FUNCTION_IRQ(0x5, 22)),         /* EINT22 */
2205         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
2206                   SUNXI_FUNCTION(0x0, "gpio_in"),
2207                   SUNXI_FUNCTION(0x1, "gpio_out"),
2208                   SUNXI_FUNCTION(0x2, "spi0"),          /* CLK */
2209                   SUNXI_FUNCTION(0x3, "uart5"),         /* RX */
2210                   SUNXI_FUNCTION_IRQ(0x5, 23)),         /* EINT23 */
2211         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
2212                   SUNXI_FUNCTION(0x0, "gpio_in"),
2213                   SUNXI_FUNCTION(0x1, "gpio_out"),
2214                   SUNXI_FUNCTION(0x2, "spi0"),          /* MOSI */
2215                   SUNXI_FUNCTION(0x3, "uart6"),         /* TX */
2216                   SUNXI_FUNCTION(0x4, "clk_out_a"),     /* CLK_OUT_A */
2217                   SUNXI_FUNCTION_IRQ(0x5, 24)),         /* EINT24 */
2218         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
2219                   SUNXI_FUNCTION(0x0, "gpio_in"),
2220                   SUNXI_FUNCTION(0x1, "gpio_out"),
2221                   SUNXI_FUNCTION(0x2, "spi0"),          /* MISO */
2222                   SUNXI_FUNCTION(0x3, "uart6"),         /* RX */
2223                   SUNXI_FUNCTION(0x4, "clk_out_b"),     /* CLK_OUT_B */
2224                   SUNXI_FUNCTION_IRQ(0x5, 25)),         /* EINT25 */
2225         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
2226                   SUNXI_FUNCTION(0x0, "gpio_in"),
2227                   SUNXI_FUNCTION(0x1, "gpio_out"),
2228                   SUNXI_FUNCTION(0x2, "spi0"),          /* CS1 */
2229                   SUNXI_FUNCTION(0x3, "ps2"),           /* SCK1 */
2230                   SUNXI_FUNCTION(0x4, "timer4"),        /* TCLKIN0 */
2231                   SUNXI_FUNCTION_IRQ(0x5, 26)),         /* EINT26 */
2232         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
2233                   SUNXI_FUNCTION(0x0, "gpio_in"),
2234                   SUNXI_FUNCTION(0x1, "gpio_out"),
2235                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS1 */
2236                   SUNXI_FUNCTION(0x3, "ps2"),           /* SDA1 */
2237                   SUNXI_FUNCTION(0x4, "timer5"),        /* TCLKIN1 */
2238                   SUNXI_FUNCTION_IRQ(0x5, 27)),         /* EINT27 */
2239         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
2240                   SUNXI_FUNCTION(0x0, "gpio_in"),
2241                   SUNXI_FUNCTION(0x1, "gpio_out"),
2242                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS0 */
2243                   SUNXI_FUNCTION(0x3, "uart2"),         /* RTS */
2244                   SUNXI_FUNCTION_IRQ(0x5, 28)),         /* EINT28 */
2245         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
2246                   SUNXI_FUNCTION(0x0, "gpio_in"),
2247                   SUNXI_FUNCTION(0x1, "gpio_out"),
2248                   SUNXI_FUNCTION(0x2, "spi1"),          /* CLK */
2249                   SUNXI_FUNCTION(0x3, "uart2"),         /* CTS */
2250                   SUNXI_FUNCTION_IRQ(0x5, 29)),         /* EINT29 */
2251         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
2252                   SUNXI_FUNCTION(0x0, "gpio_in"),
2253                   SUNXI_FUNCTION(0x1, "gpio_out"),
2254                   SUNXI_FUNCTION(0x2, "spi1"),          /* MOSI */
2255                   SUNXI_FUNCTION(0x3, "uart2"),         /* TX */
2256                   SUNXI_FUNCTION_IRQ(0x5, 30)),         /* EINT30 */
2257         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
2258                   SUNXI_FUNCTION(0x0, "gpio_in"),
2259                   SUNXI_FUNCTION(0x1, "gpio_out"),
2260                   SUNXI_FUNCTION(0x2, "spi1"),          /* MISO */
2261                   SUNXI_FUNCTION(0x3, "uart2"),         /* RX */
2262                   SUNXI_FUNCTION_IRQ(0x5, 31)),         /* EINT31 */
2263         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
2264                   SUNXI_FUNCTION(0x0, "gpio_in"),
2265                   SUNXI_FUNCTION(0x1, "gpio_out"),
2266                   SUNXI_FUNCTION(0x2, "ps2"),           /* SCK0 */
2267                   SUNXI_FUNCTION(0x3, "uart7"),         /* TX */
2268                   SUNXI_FUNCTION(0x4, "hdmi")),         /* HSCL */
2269         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
2270                   SUNXI_FUNCTION(0x0, "gpio_in"),
2271                   SUNXI_FUNCTION(0x1, "gpio_out"),
2272                   SUNXI_FUNCTION(0x2, "ps2"),           /* SDA0 */
2273                   SUNXI_FUNCTION(0x3, "uart7"),         /* RX */
2274                   SUNXI_FUNCTION(0x4, "hdmi")),         /* HSDA */
2275 };
2276
2277 static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_data = {
2278         .pins = sun5i_a13_pins,
2279         .npins = ARRAY_SIZE(sun5i_a13_pins),
2280 };
2281
2282 static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_data = {
2283         .pins = sun6i_a31_pins,
2284         .npins = ARRAY_SIZE(sun6i_a31_pins),
2285 };
2286
2287 static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
2288         .pins = sun6i_a31_r_pins,
2289         .npins = ARRAY_SIZE(sun6i_a31_r_pins),
2290         .pin_base = PL_BASE,
2291 };
2292
2293 static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_data = {
2294         .pins = sun7i_a20_pins,
2295         .npins = ARRAY_SIZE(sun7i_a20_pins),
2296 };
2297
2298 #endif /* __PINCTRL_SUNXI_PINS_H */