1 /* Moorestown PMIC GPIO (access through IPC) driver
2 * Copyright (c) 2008 - 2009, Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Moorestown platform PMIC chip
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
26 #include <linux/stddef.h>
27 #include <linux/slab.h>
28 #include <linux/ioport.h>
29 #include <linux/init.h>
31 #include <linux/gpio.h>
32 #include <asm/intel_scu_ipc.h>
33 #include <linux/device.h>
34 #include <linux/intel_pmic_gpio.h>
35 #include <linux/platform_device.h>
37 #define DRIVER_NAME "pmic_gpio"
39 /* register offset that IPC driver should use
40 * 8 GPIO + 8 GPOSW (6 controllable) + 8GPO
42 enum pmic_gpio_register {
51 /* bits definition for GPIO & GPOSW */
56 #define GPIO_INTCTL 0x30
59 #define GPOSW_DRV 0x01
60 #define GPOSW_DOU 0x08
61 #define GPOSW_RDRV 0x30
63 #define GPIO_UPDATE_TYPE 0x80000000
69 struct gpio_chip chip;
73 unsigned int update_type;
77 static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
81 "%s: only pin 0-7 support input\n", __func__);
82 return -1;/* we only have 8 GPIO can use as input */
84 return intel_scu_ipc_update_register(GPIO0 + offset,
88 static int pmic_gpio_direction_output(struct gpio_chip *chip,
89 unsigned offset, int value)
93 if (offset < 8)/* it is GPIO */
94 rc = intel_scu_ipc_update_register(GPIO0 + offset,
95 GPIO_DRV | (value ? GPIO_DOU : 0),
96 GPIO_DRV | GPIO_DOU | GPIO_DIR);
97 else if (offset < 16)/* it is GPOSW */
98 rc = intel_scu_ipc_update_register(GPOSWCTL0 + offset - 8,
99 GPOSW_DRV | (value ? GPOSW_DOU : 0),
100 GPOSW_DRV | GPOSW_DOU | GPOSW_RDRV);
101 else if (offset > 15 && offset < 24)/* it is GPO */
102 rc = intel_scu_ipc_update_register(GPO,
103 value ? 1 << (offset - 16) : 0,
107 "%s: invalid PMIC GPIO pin %d!\n", __func__, offset);
114 static int pmic_gpio_get(struct gpio_chip *chip, unsigned offset)
119 /* we only have 8 GPIO pins we can use as input */
122 ret = intel_scu_ipc_ioread8(GPIO0 + offset, &r);
128 static void pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
130 if (offset < 8)/* it is GPIO */
131 intel_scu_ipc_update_register(GPIO0 + offset,
132 GPIO_DRV | (value ? GPIO_DOU : 0),
133 GPIO_DRV | GPIO_DOU);
134 else if (offset < 16)/* it is GPOSW */
135 intel_scu_ipc_update_register(GPOSWCTL0 + offset - 8,
136 GPOSW_DRV | (value ? GPOSW_DOU : 0),
137 GPOSW_DRV | GPOSW_DOU | GPOSW_RDRV);
138 else if (offset > 15 && offset < 24) /* it is GPO */
139 intel_scu_ipc_update_register(GPO,
140 value ? 1 << (offset - 16) : 0,
145 * This is called from genirq with pg->buslock locked and
146 * irq_desc->lock held. We can not access the scu bus here, so we
147 * store the change and update in the bus_sync_unlock() function below
149 static int pmic_irq_type(struct irq_data *data, unsigned type)
151 struct pmic_gpio *pg = irq_data_get_irq_chip_data(data);
152 u32 gpio = data->irq - pg->irq_base;
154 if (gpio >= pg->chip.ngpio)
157 pg->trigger_type = type;
158 pg->update_type = gpio | GPIO_UPDATE_TYPE;
162 static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
164 struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip);
166 return pg->irq_base + offset;
169 /* the gpiointr register is read-clear, so just do nothing. */
170 static void pmic_irq_unmask(struct irq_data *data) { }
172 static void pmic_irq_mask(struct irq_data *data) { }
174 static struct irq_chip pmic_irqchip = {
176 .irq_mask = pmic_irq_mask,
177 .irq_unmask = pmic_irq_unmask,
178 .irq_set_type = pmic_irq_type,
181 static irqreturn_t pmic_irq_handler(int irq, void *data)
183 struct pmic_gpio *pg = data;
184 u8 intsts = *((u8 *)pg->gpiointr + 4);
186 irqreturn_t ret = IRQ_NONE;
188 for (gpio = 0; gpio < 8; gpio++) {
189 if (intsts & (1 << gpio)) {
190 pr_debug("pmic pin %d triggered\n", gpio);
191 generic_handle_irq(pg->irq_base + gpio);
198 static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev)
200 struct device *dev = &pdev->dev;
201 int irq = platform_get_irq(pdev, 0);
202 struct intel_pmic_gpio_platform_data *pdata = dev->platform_data;
204 struct pmic_gpio *pg;
209 dev_dbg(dev, "no IRQ line\n");
213 if (!pdata || !pdata->gpio_base || !pdata->irq_base) {
214 dev_dbg(dev, "incorrect or missing platform data\n");
218 pg = kzalloc(sizeof(*pg), GFP_KERNEL);
222 dev_set_drvdata(dev, pg);
225 /* setting up SRAM mapping for GPIOINT register */
226 pg->gpiointr = ioremap_nocache(pdata->gpiointr, 8);
228 printk(KERN_ERR "%s: Can not map GPIOINT.\n", __func__);
232 pg->irq_base = pdata->irq_base;
233 pg->chip.label = "intel_pmic";
234 pg->chip.direction_input = pmic_gpio_direction_input;
235 pg->chip.direction_output = pmic_gpio_direction_output;
236 pg->chip.get = pmic_gpio_get;
237 pg->chip.set = pmic_gpio_set;
238 pg->chip.to_irq = pmic_gpio_to_irq;
239 pg->chip.base = pdata->gpio_base;
240 pg->chip.ngpio = NUM_GPIO;
241 pg->chip.can_sleep = 1;
244 mutex_init(&pg->buslock);
247 retval = gpiochip_add(&pg->chip);
249 printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__);
253 retval = request_irq(pg->irq, pmic_irq_handler, 0, "pmic", pg);
255 printk(KERN_WARNING "pmic: Interrupt request failed\n");
259 for (i = 0; i < 8; i++) {
260 irq_set_chip_and_handler_name(i + pg->irq_base,
264 irq_set_chip_data(i + pg->irq_base, pg);
268 iounmap(pg->gpiointr);
274 /* at the same time, register a platform driver
275 * this supports the sfi 0.81 fw */
276 static struct platform_driver platform_pmic_gpio_driver = {
279 .owner = THIS_MODULE,
281 .probe = platform_pmic_gpio_probe,
284 static int __init platform_pmic_gpio_init(void)
286 return platform_driver_register(&platform_pmic_gpio_driver);
289 subsys_initcall(platform_pmic_gpio_init);
291 MODULE_AUTHOR("Alek Du <alek.du@intel.com>");
292 MODULE_DESCRIPTION("Intel Moorestown PMIC GPIO driver");
293 MODULE_LICENSE("GPL v2");