2 * simple driver for PWM (Pulse Width Modulator) controller
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/platform_device.h>
14 #include <linux/slab.h>
15 #include <linux/err.h>
16 #include <linux/clk.h>
18 #include <linux/pwm.h>
20 #include <linux/of_device.h>
22 /* i.MX1 and i.MX21 share the same PWM function block: */
24 #define MX1_PWMC 0x00 /* PWM Control Register */
25 #define MX1_PWMS 0x04 /* PWM Sample Register */
26 #define MX1_PWMP 0x08 /* PWM Period Register */
28 #define MX1_PWMC_EN (1 << 4)
30 /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
32 #define MX3_PWMCR 0x00 /* PWM Control Register */
33 #define MX3_PWMSAR 0x0C /* PWM Sample Register */
34 #define MX3_PWMPR 0x10 /* PWM Period Register */
35 #define MX3_PWMCR_PRESCALER(x) ((((x) - 1) & 0xFFF) << 4)
36 #define MX3_PWMCR_DOZEEN (1 << 24)
37 #define MX3_PWMCR_WAITEN (1 << 23)
38 #define MX3_PWMCR_DBGEN (1 << 22)
39 #define MX3_PWMCR_POUTC (1 << 18)
40 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
41 #define MX3_PWMCR_CLKSRC_IPG (1 << 16)
42 #define MX3_PWMCR_EN (1 << 0)
48 void __iomem *mmio_base;
52 int (*config)(struct pwm_chip *chip,
53 struct pwm_device *pwm, int duty_ns, int period_ns);
54 void (*set_enable)(struct pwm_chip *chip, bool enable);
57 #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
59 static int imx_pwm_config_v1(struct pwm_chip *chip,
60 struct pwm_device *pwm, int duty_ns, int period_ns)
62 struct imx_chip *imx = to_imx_chip(chip);
65 * The PWM subsystem allows for exact frequencies. However,
66 * I cannot connect a scope on my device to the PWM line and
67 * thus cannot provide the program the PWM controller
68 * exactly. Instead, I'm relying on the fact that the
69 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
70 * function group already. So I'll just modify the PWM sample
71 * register to follow the ratio of duty_ns vs. period_ns
74 * This is good enough for programming the brightness of
77 * The real implementation would divide PERCLK[0] first by
78 * both the prescaler (/1 .. /128) and then by CLKSEL
81 u32 max = readl(imx->mmio_base + MX1_PWMP);
82 u32 p = max * duty_ns / period_ns;
83 writel(max - p, imx->mmio_base + MX1_PWMS);
88 static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
90 struct imx_chip *imx = to_imx_chip(chip);
93 val = readl(imx->mmio_base + MX1_PWMC);
100 writel(val, imx->mmio_base + MX1_PWMC);
103 static int imx_pwm_config_v2(struct pwm_chip *chip,
104 struct pwm_device *pwm, int duty_ns, int period_ns)
106 struct imx_chip *imx = to_imx_chip(chip);
107 unsigned long long c;
108 unsigned long period_cycles, duty_cycles, prescale;
111 c = clk_get_rate(imx->clk_per);
113 do_div(c, 1000000000);
116 prescale = period_cycles / 0x10000 + 1;
118 period_cycles /= prescale;
119 c = (unsigned long long)period_cycles * duty_ns;
120 do_div(c, period_ns);
124 * according to imx pwm RM, the real period value should be
125 * PERIOD value in PWMPR plus 2.
127 if (period_cycles > 2)
132 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
133 writel(period_cycles, imx->mmio_base + MX3_PWMPR);
135 cr = MX3_PWMCR_PRESCALER(prescale) |
136 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
137 MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH;
139 if (test_bit(PWMF_ENABLED, &pwm->flags))
142 writel(cr, imx->mmio_base + MX3_PWMCR);
147 static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
149 struct imx_chip *imx = to_imx_chip(chip);
152 val = readl(imx->mmio_base + MX3_PWMCR);
157 val &= ~MX3_PWMCR_EN;
159 writel(val, imx->mmio_base + MX3_PWMCR);
162 static int imx_pwm_config(struct pwm_chip *chip,
163 struct pwm_device *pwm, int duty_ns, int period_ns)
165 struct imx_chip *imx = to_imx_chip(chip);
168 ret = clk_prepare_enable(imx->clk_ipg);
172 ret = imx->config(chip, pwm, duty_ns, period_ns);
174 clk_disable_unprepare(imx->clk_ipg);
179 static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
181 struct imx_chip *imx = to_imx_chip(chip);
184 ret = clk_prepare_enable(imx->clk_per);
188 imx->set_enable(chip, true);
193 static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
195 struct imx_chip *imx = to_imx_chip(chip);
197 imx->set_enable(chip, false);
199 clk_disable_unprepare(imx->clk_per);
202 static struct pwm_ops imx_pwm_ops = {
203 .enable = imx_pwm_enable,
204 .disable = imx_pwm_disable,
205 .config = imx_pwm_config,
206 .owner = THIS_MODULE,
209 struct imx_pwm_data {
210 int (*config)(struct pwm_chip *chip,
211 struct pwm_device *pwm, int duty_ns, int period_ns);
212 void (*set_enable)(struct pwm_chip *chip, bool enable);
215 static struct imx_pwm_data imx_pwm_data_v1 = {
216 .config = imx_pwm_config_v1,
217 .set_enable = imx_pwm_set_enable_v1,
220 static struct imx_pwm_data imx_pwm_data_v2 = {
221 .config = imx_pwm_config_v2,
222 .set_enable = imx_pwm_set_enable_v2,
225 static const struct of_device_id imx_pwm_dt_ids[] = {
226 { .compatible = "fsl,imx1-pwm", .data = &imx_pwm_data_v1, },
227 { .compatible = "fsl,imx27-pwm", .data = &imx_pwm_data_v2, },
230 MODULE_DEVICE_TABLE(of, imx_pwm_dt_ids);
232 static int imx_pwm_probe(struct platform_device *pdev)
234 const struct of_device_id *of_id =
235 of_match_device(imx_pwm_dt_ids, &pdev->dev);
236 const struct imx_pwm_data *data;
237 struct imx_chip *imx;
244 imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
248 imx->clk_per = devm_clk_get(&pdev->dev, "per");
249 if (IS_ERR(imx->clk_per)) {
250 dev_err(&pdev->dev, "getting per clock failed with %ld\n",
251 PTR_ERR(imx->clk_per));
252 return PTR_ERR(imx->clk_per);
255 imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
256 if (IS_ERR(imx->clk_ipg)) {
257 dev_err(&pdev->dev, "getting ipg clock failed with %ld\n",
258 PTR_ERR(imx->clk_ipg));
259 return PTR_ERR(imx->clk_ipg);
262 imx->chip.ops = &imx_pwm_ops;
263 imx->chip.dev = &pdev->dev;
267 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
268 imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
269 if (IS_ERR(imx->mmio_base))
270 return PTR_ERR(imx->mmio_base);
273 imx->config = data->config;
274 imx->set_enable = data->set_enable;
276 ret = pwmchip_add(&imx->chip);
280 platform_set_drvdata(pdev, imx);
284 static int imx_pwm_remove(struct platform_device *pdev)
286 struct imx_chip *imx;
288 imx = platform_get_drvdata(pdev);
292 return pwmchip_remove(&imx->chip);
295 static struct platform_driver imx_pwm_driver = {
298 .owner = THIS_MODULE,
299 .of_match_table = imx_pwm_dt_ids,
301 .probe = imx_pwm_probe,
302 .remove = imx_pwm_remove,
305 module_platform_driver(imx_pwm_driver);
307 MODULE_LICENSE("GPL v2");
308 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");