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pwm: lpss: Update PWM setting for Broxton
[karo-tx-linux.git] / drivers / pwm / pwm-lpss.c
1 /*
2  * Intel Low Power Subsystem PWM controller driver
3  *
4  * Copyright (C) 2014, Intel Corporation
5  * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
6  * Author: Chew Kean Ho <kean.ho.chew@intel.com>
7  * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
8  * Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
9  * Author: Alan Cox <alan@linux.intel.com>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/io.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/time.h>
21
22 #include "pwm-lpss.h"
23
24 #define PWM                             0x00000000
25 #define PWM_ENABLE                      BIT(31)
26 #define PWM_SW_UPDATE                   BIT(30)
27 #define PWM_BASE_UNIT_SHIFT             8
28 #define PWM_ON_TIME_DIV_MASK            0x000000ff
29 #define PWM_DIVISION_CORRECTION         0x2
30
31 /* Size of each PWM register space if multiple */
32 #define PWM_SIZE                        0x400
33
34 struct pwm_lpss_chip {
35         struct pwm_chip chip;
36         void __iomem *regs;
37         const struct pwm_lpss_boardinfo *info;
38 };
39
40 /* BayTrail */
41 const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
42         .clk_rate = 25000000,
43         .npwm = 1,
44         .base_unit_bits = 16,
45 };
46 EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
47
48 /* Braswell */
49 const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
50         .clk_rate = 19200000,
51         .npwm = 1,
52         .base_unit_bits = 16,
53 };
54 EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
55
56 /* Broxton */
57 const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
58         .clk_rate = 19200000,
59         .npwm = 4,
60         .base_unit_bits = 22,
61 };
62 EXPORT_SYMBOL_GPL(pwm_lpss_bxt_info);
63
64 static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
65 {
66         return container_of(chip, struct pwm_lpss_chip, chip);
67 }
68
69 static inline u32 pwm_lpss_read(const struct pwm_device *pwm)
70 {
71         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
72
73         return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
74 }
75
76 static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value)
77 {
78         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
79
80         writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
81 }
82
83 static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
84                            int duty_ns, int period_ns)
85 {
86         struct pwm_lpss_chip *lpwm = to_lpwm(chip);
87         u8 on_time_div;
88         unsigned long c, base_unit_range;
89         unsigned long long base_unit, freq = NSEC_PER_SEC;
90         u32 ctrl;
91
92         do_div(freq, period_ns);
93
94         /*
95          * The equation is:
96          * base_unit = ((freq / c) * base_unit_range) + correction
97          */
98         base_unit_range = BIT(lpwm->info->base_unit_bits);
99         base_unit = freq * base_unit_range;
100
101         c = lpwm->info->clk_rate;
102         if (!c)
103                 return -EINVAL;
104
105         do_div(base_unit, c);
106         base_unit += PWM_DIVISION_CORRECTION;
107
108         if (duty_ns <= 0)
109                 duty_ns = 1;
110         on_time_div = 255 - (255 * duty_ns / period_ns);
111
112         pm_runtime_get_sync(chip->dev);
113
114         ctrl = pwm_lpss_read(pwm);
115         ctrl &= ~PWM_ON_TIME_DIV_MASK;
116         ctrl &= ~((base_unit_range - 1) << PWM_BASE_UNIT_SHIFT);
117         base_unit &= (base_unit_range - 1);
118         ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
119         ctrl |= on_time_div;
120         /* request PWM to update on next cycle */
121         ctrl |= PWM_SW_UPDATE;
122         pwm_lpss_write(pwm, ctrl);
123
124         pm_runtime_put(chip->dev);
125
126         return 0;
127 }
128
129 static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
130 {
131         pm_runtime_get_sync(chip->dev);
132         pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE);
133         return 0;
134 }
135
136 static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
137 {
138         pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE);
139         pm_runtime_put(chip->dev);
140 }
141
142 static const struct pwm_ops pwm_lpss_ops = {
143         .config = pwm_lpss_config,
144         .enable = pwm_lpss_enable,
145         .disable = pwm_lpss_disable,
146         .owner = THIS_MODULE,
147 };
148
149 struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
150                                      const struct pwm_lpss_boardinfo *info)
151 {
152         struct pwm_lpss_chip *lpwm;
153         int ret;
154
155         lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
156         if (!lpwm)
157                 return ERR_PTR(-ENOMEM);
158
159         lpwm->regs = devm_ioremap_resource(dev, r);
160         if (IS_ERR(lpwm->regs))
161                 return ERR_CAST(lpwm->regs);
162
163         lpwm->info = info;
164         lpwm->chip.dev = dev;
165         lpwm->chip.ops = &pwm_lpss_ops;
166         lpwm->chip.base = -1;
167         lpwm->chip.npwm = info->npwm;
168
169         ret = pwmchip_add(&lpwm->chip);
170         if (ret) {
171                 dev_err(dev, "failed to add PWM chip: %d\n", ret);
172                 return ERR_PTR(ret);
173         }
174
175         return lpwm;
176 }
177 EXPORT_SYMBOL_GPL(pwm_lpss_probe);
178
179 int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
180 {
181         return pwmchip_remove(&lpwm->chip);
182 }
183 EXPORT_SYMBOL_GPL(pwm_lpss_remove);
184
185 MODULE_DESCRIPTION("PWM driver for Intel LPSS");
186 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
187 MODULE_LICENSE("GPL v2");