2 * PWM driver for Rockchip SoCs
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 * Copyright (C) 2014 ROCKCHIP, Inc.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
12 #include <linux/clk.h>
14 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/time.h>
21 #define PWM_CTRL_TIMER_EN (1 << 0)
22 #define PWM_CTRL_OUTPUT_EN (1 << 3)
24 #define PWM_ENABLE (1 << 0)
25 #define PWM_CONTINUOUS (1 << 1)
26 #define PWM_DUTY_POSITIVE (1 << 3)
27 #define PWM_DUTY_NEGATIVE (0 << 3)
28 #define PWM_INACTIVE_NEGATIVE (0 << 4)
29 #define PWM_INACTIVE_POSITIVE (1 << 4)
30 #define PWM_OUTPUT_LEFT (0 << 5)
31 #define PWM_LP_DISABLE (0 << 8)
33 struct rockchip_pwm_chip {
36 const struct rockchip_pwm_data *data;
40 struct rockchip_pwm_regs {
47 struct rockchip_pwm_data {
48 struct rockchip_pwm_regs regs;
49 unsigned int prescaler;
50 const struct pwm_ops *ops;
52 void (*set_enable)(struct pwm_chip *chip,
53 struct pwm_device *pwm, bool enable);
56 static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c)
58 return container_of(c, struct rockchip_pwm_chip, chip);
61 static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip,
62 struct pwm_device *pwm, bool enable)
64 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
65 u32 enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN;
68 val = readl_relaxed(pc->base + pc->data->regs.ctrl);
75 writel_relaxed(val, pc->base + pc->data->regs.ctrl);
78 static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,
79 struct pwm_device *pwm, bool enable)
81 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
82 u32 enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_ENABLE |
86 if (pwm_get_polarity(pwm) == PWM_POLARITY_INVERSED)
87 enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSITIVE;
89 enable_conf |= PWM_DUTY_POSITIVE | PWM_INACTIVE_NEGATIVE;
91 val = readl_relaxed(pc->base + pc->data->regs.ctrl);
98 writel_relaxed(val, pc->base + pc->data->regs.ctrl);
101 static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
102 int duty_ns, int period_ns)
104 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
105 unsigned long period, duty;
109 clk_rate = clk_get_rate(pc->clk);
112 * Since period and duty cycle registers have a width of 32
113 * bits, every possible input period can be obtained using the
114 * default prescaler value for all practical clock rate values.
116 div = clk_rate * period_ns;
117 period = DIV_ROUND_CLOSEST_ULL(div,
118 pc->data->prescaler * NSEC_PER_SEC);
120 div = clk_rate * duty_ns;
121 duty = DIV_ROUND_CLOSEST_ULL(div, pc->data->prescaler * NSEC_PER_SEC);
123 ret = clk_enable(pc->clk);
127 writel(period, pc->base + pc->data->regs.period);
128 writel(duty, pc->base + pc->data->regs.duty);
129 writel(0, pc->base + pc->data->regs.cntr);
131 clk_disable(pc->clk);
136 static int rockchip_pwm_set_polarity(struct pwm_chip *chip,
137 struct pwm_device *pwm,
138 enum pwm_polarity polarity)
141 * No action needed here because pwm->polarity will be set by the core
142 * and the core will only change polarity when the PWM is not enabled.
143 * We'll handle things in set_enable().
149 static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
151 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
154 ret = clk_enable(pc->clk);
158 pc->data->set_enable(chip, pwm, true);
163 static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
165 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
167 pc->data->set_enable(chip, pwm, false);
169 clk_disable(pc->clk);
172 static const struct pwm_ops rockchip_pwm_ops_v1 = {
173 .config = rockchip_pwm_config,
174 .enable = rockchip_pwm_enable,
175 .disable = rockchip_pwm_disable,
176 .owner = THIS_MODULE,
179 static const struct pwm_ops rockchip_pwm_ops_v2 = {
180 .config = rockchip_pwm_config,
181 .set_polarity = rockchip_pwm_set_polarity,
182 .enable = rockchip_pwm_enable,
183 .disable = rockchip_pwm_disable,
184 .owner = THIS_MODULE,
187 static const struct rockchip_pwm_data pwm_data_v1 = {
195 .ops = &rockchip_pwm_ops_v1,
196 .set_enable = rockchip_pwm_set_enable_v1,
199 static const struct rockchip_pwm_data pwm_data_v2 = {
207 .ops = &rockchip_pwm_ops_v2,
208 .set_enable = rockchip_pwm_set_enable_v2,
211 static const struct rockchip_pwm_data pwm_data_vop = {
219 .ops = &rockchip_pwm_ops_v2,
220 .set_enable = rockchip_pwm_set_enable_v2,
223 static const struct of_device_id rockchip_pwm_dt_ids[] = {
224 { .compatible = "rockchip,rk2928-pwm", .data = &pwm_data_v1},
225 { .compatible = "rockchip,rk3288-pwm", .data = &pwm_data_v2},
226 { .compatible = "rockchip,vop-pwm", .data = &pwm_data_vop},
229 MODULE_DEVICE_TABLE(of, rockchip_pwm_dt_ids);
231 static int rockchip_pwm_probe(struct platform_device *pdev)
233 const struct of_device_id *id;
234 struct rockchip_pwm_chip *pc;
238 id = of_match_device(rockchip_pwm_dt_ids, &pdev->dev);
242 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
246 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
247 pc->base = devm_ioremap_resource(&pdev->dev, r);
248 if (IS_ERR(pc->base))
249 return PTR_ERR(pc->base);
251 pc->clk = devm_clk_get(&pdev->dev, NULL);
253 return PTR_ERR(pc->clk);
255 ret = clk_prepare(pc->clk);
259 platform_set_drvdata(pdev, pc);
262 pc->chip.dev = &pdev->dev;
263 pc->chip.ops = pc->data->ops;
267 if (pc->data->ops->set_polarity) {
268 pc->chip.of_xlate = of_pwm_xlate_with_flags;
269 pc->chip.of_pwm_n_cells = 3;
272 ret = pwmchip_add(&pc->chip);
274 clk_unprepare(pc->clk);
275 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
281 static int rockchip_pwm_remove(struct platform_device *pdev)
283 struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev);
285 clk_unprepare(pc->clk);
287 return pwmchip_remove(&pc->chip);
290 static struct platform_driver rockchip_pwm_driver = {
292 .name = "rockchip-pwm",
293 .of_match_table = rockchip_pwm_dt_ids,
295 .probe = rockchip_pwm_probe,
296 .remove = rockchip_pwm_remove,
298 module_platform_driver(rockchip_pwm_driver);
300 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
301 MODULE_DESCRIPTION("Rockchip SoC PWM driver");
302 MODULE_LICENSE("GPL v2");