2 * PWM device driver for ST SoCs.
3 * Author: Ajit Pal Singh <ajitpal.singh@st.com>
5 * Copyright (C) 2013-2014 STMicroelectronics (R&D) Limited
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/clk.h>
14 #include <linux/math64.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/pwm.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
22 #include <linux/time.h>
24 #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */
25 #define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */
26 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
28 #define STI_PWM_CTRL 0x50 /* Control/Config register */
29 #define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
30 #define STI_INT_STA 0x58 /* Interrupt Status register */
31 #define PWM_INT_ACK 0x5c
32 #define PWM_PRESCALE_LOW_MASK 0x0f
33 #define PWM_PRESCALE_HIGH_MASK 0xf0
34 #define PWM_CPT_EDGE_MASK 0x03
35 #define PWM_INT_ACK_MASK 0x1ff
37 #define STI_MAX_CPT_DEVS 4
38 #define CPT_DC_MAX 0xff
57 /* Each capture input can be programmed to detect rising-edge, falling-edge,
58 * either edge or neither egde
67 struct sti_pwm_compat_data {
68 const struct reg_field *reg_fields;
69 unsigned int num_devs;
70 unsigned int max_pwm_cnt;
71 unsigned int max_prescale;
77 struct regmap *regmap;
78 struct sti_pwm_compat_data *cdata;
79 struct regmap_field *prescale_low;
80 struct regmap_field *prescale_high;
81 struct regmap_field *pwm_out_en;
82 struct regmap_field *pwm_cpt_int_en;
84 struct pwm_device *cur;
85 unsigned long configured;
86 unsigned int en_count;
87 struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
91 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
92 [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
93 [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
94 [CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
95 [PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
96 [PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
97 [PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
98 [PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
101 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
103 return container_of(chip, struct sti_pwm_chip, chip);
107 * Calculate the prescaler value corresponding to the period.
109 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
110 unsigned int *prescale)
112 struct sti_pwm_compat_data *cdata = pc->cdata;
113 unsigned long clk_rate;
117 clk_rate = clk_get_rate(pc->pwm_clk);
119 dev_err(pc->dev, "failed to get clock rate\n");
124 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_count + 1)) - 1
126 val = NSEC_PER_SEC / clk_rate;
127 val *= cdata->max_pwm_cnt + 1;
132 ps = period / val - 1;
133 if (ps > cdata->max_prescale)
142 * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles.
143 * The only way to change the period (apart from changing the PWM input clock)
144 * is to change the PWM clock prescaler.
145 * The prescaler is of 8 bits, so 256 prescaler values and hence
146 * 256 possible period values are supported (for a particular clock rate).
147 * The requested period will be applied only if it matches one of these
150 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
151 int duty_ns, int period_ns)
153 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
154 struct sti_pwm_compat_data *cdata = pc->cdata;
155 struct pwm_device *cur = pc->cur;
156 struct device *dev = pc->dev;
157 unsigned int prescale = 0, pwmvalx;
160 bool period_same = false;
162 ncfg = hweight_long(pc->configured);
164 period_same = (period_ns == pwm_get_period(cur));
166 /* Allow configuration changes if one of the
167 * following conditions satisfy.
168 * 1. No devices have been configured.
169 * 2. Only one device has been configured and the new request
170 * is for the same device.
171 * 3. Only one device has been configured and the new request is
172 * for a new device and period of the new device is same as
173 * the current configured period.
174 * 4. More than one devices are configured and period of the new
175 * requestis the same as the current period.
178 ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
179 ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
180 ((ncfg > 1) && period_same)) {
181 /* Enable clock before writing to PWM registers. */
182 ret = clk_enable(pc->pwm_clk);
187 ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
192 regmap_field_write(pc->prescale_low,
193 prescale & PWM_PRESCALE_LOW_MASK);
198 regmap_field_write(pc->prescale_high,
199 (prescale & PWM_PRESCALE_HIGH_MASK) >> 4);
205 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
206 * When PWMVal == max_pwm_count,
207 * PWM pulse = (max_pwm_count + 1) local cycles,
208 * that is continuous pulse: signal never goes low.
210 pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns;
212 ret = regmap_write(pc->regmap,
213 PWM_OUT_VAL(pwm->hwpwm), pwmvalx);
217 ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
219 set_bit(pwm->hwpwm, &pc->configured);
222 dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n",
223 prescale, period_ns, duty_ns, pwmvalx);
229 clk_disable(pc->pwm_clk);
233 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
235 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
236 struct device *dev = pc->dev;
240 * Since we have a common enable for all PWM devices,
241 * do not enable if already enabled.
243 mutex_lock(&pc->sti_pwm_lock);
245 ret = clk_enable(pc->pwm_clk);
249 ret = regmap_field_write(pc->pwm_out_en, 1);
251 dev_err(dev, "failed to enable PWM device:%d\n",
258 mutex_unlock(&pc->sti_pwm_lock);
262 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
264 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
266 mutex_lock(&pc->sti_pwm_lock);
267 if (--pc->en_count) {
268 mutex_unlock(&pc->sti_pwm_lock);
271 regmap_field_write(pc->pwm_out_en, 0);
273 clk_disable(pc->pwm_clk);
274 mutex_unlock(&pc->sti_pwm_lock);
277 static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
279 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
281 clear_bit(pwm->hwpwm, &pc->configured);
284 static const struct pwm_ops sti_pwm_ops = {
285 .config = sti_pwm_config,
286 .enable = sti_pwm_enable,
287 .disable = sti_pwm_disable,
288 .free = sti_pwm_free,
289 .owner = THIS_MODULE,
292 static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
294 struct device *dev = pc->dev;
295 const struct reg_field *reg_fields;
296 struct device_node *np = dev->of_node;
297 struct sti_pwm_compat_data *cdata = pc->cdata;
300 of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
302 cdata->num_devs = num_devs;
304 reg_fields = cdata->reg_fields;
306 pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
307 reg_fields[PWMCLK_PRESCALE_LOW]);
308 if (IS_ERR(pc->prescale_low))
309 return PTR_ERR(pc->prescale_low);
311 pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
312 reg_fields[PWMCLK_PRESCALE_HIGH]);
313 if (IS_ERR(pc->prescale_high))
314 return PTR_ERR(pc->prescale_high);
317 pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
318 reg_fields[PWM_OUT_EN]);
319 if (IS_ERR(pc->pwm_out_en))
320 return PTR_ERR(pc->pwm_out_en);
322 pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
323 reg_fields[PWM_CPT_INT_EN]);
324 if (IS_ERR(pc->pwm_cpt_int_en))
325 return PTR_ERR(pc->pwm_cpt_int_en);
330 static const struct regmap_config sti_pwm_regmap_config = {
336 static int sti_pwm_probe(struct platform_device *pdev)
338 struct device *dev = &pdev->dev;
339 struct sti_pwm_compat_data *cdata;
340 struct sti_pwm_chip *pc;
341 struct resource *res;
344 pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
348 cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
352 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
354 pc->mmio = devm_ioremap_resource(dev, res);
355 if (IS_ERR(pc->mmio))
356 return PTR_ERR(pc->mmio);
358 pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
359 &sti_pwm_regmap_config);
360 if (IS_ERR(pc->regmap))
361 return PTR_ERR(pc->regmap);
364 * Setup PWM data with default values: some values could be replaced
365 * with specific ones provided from Device Tree.
367 cdata->reg_fields = &sti_pwm_regfields[0];
368 cdata->max_prescale = 0xff;
369 cdata->max_pwm_cnt = 255;
375 mutex_init(&pc->sti_pwm_lock);
377 ret = sti_pwm_probe_dt(pc);
381 pc->pwm_clk = of_clk_get_by_name(dev->of_node, "pwm");
382 if (IS_ERR(pc->pwm_clk)) {
383 dev_err(dev, "failed to get PWM clock\n");
384 return PTR_ERR(pc->pwm_clk);
387 ret = clk_prepare(pc->pwm_clk);
389 dev_err(dev, "failed to prepare clock\n");
394 pc->chip.ops = &sti_pwm_ops;
396 pc->chip.npwm = pc->cdata->num_devs;
397 pc->chip.can_sleep = true;
399 ret = pwmchip_add(&pc->chip);
401 clk_unprepare(pc->pwm_clk);
405 platform_set_drvdata(pdev, pc);
410 static int sti_pwm_remove(struct platform_device *pdev)
412 struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
415 for (i = 0; i < pc->cdata->num_devs; i++)
416 pwm_disable(&pc->chip.pwms[i]);
418 clk_unprepare(pc->pwm_clk);
420 return pwmchip_remove(&pc->chip);
423 static const struct of_device_id sti_pwm_of_match[] = {
424 { .compatible = "st,sti-pwm", },
427 MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
429 static struct platform_driver sti_pwm_driver = {
432 .of_match_table = sti_pwm_of_match,
434 .probe = sti_pwm_probe,
435 .remove = sti_pwm_remove,
437 module_platform_driver(sti_pwm_driver);
439 MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
440 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
441 MODULE_LICENSE("GPL");