drivers/regulator/anatop-regulator.c

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include <linux/slab.h>
  22 #include <linux/device.h>
  23 #include <linux/module.h>
  24 #include <linux/mfd/syscon.h>
  25 #include <linux/err.h>
  26 #include <linux/io.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/of.h>
  29 #include <linux/of_address.h>
  30 #include <linux/regmap.h>
  31 #include <linux/regulator/driver.h>
  32 #include <linux/regulator/of_regulator.h>
  33
  34 #define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
  35 #define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */
  36
  37 #define LDO_POWER_GATE                  0x00
  38 #define LDO_FET_FULL_ON                 0x1f
  39
  40 struct anatop_regulator {
  41         const char *name;
  42         u32 control_reg;
  43         struct regmap *anatop;
  44         int vol_bit_shift;
  45         int vol_bit_width;
  46         u32 delay_reg;
  47         int delay_bit_shift;
  48         int delay_bit_width;
  49         int min_bit_val;
  50         int min_voltage;
  51         int max_voltage;
  52         struct regulator_desc rdesc;
  53         struct regulator_init_data *initdata;
  54         bool bypass;
  55         int sel;
  56 };
  57
  58 static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
  59                                         unsigned selector)
  60 {
  61         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  62
  63         if (!anatop_reg->control_reg)
  64                 return -ENOTSUPP;
  65
  66         return regulator_set_voltage_sel_regmap(reg, selector);
  67 }
  68
  69 static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
  70         unsigned int old_sel,
  71         unsigned int new_sel)
  72 {
  73         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  74         u32 val;
  75         int ret = 0;
  76
  77         /* check whether need to care about LDO ramp up speed */
  78         if (anatop_reg->delay_bit_width && new_sel > old_sel) {
  79                 /*
  80                  * the delay for LDO ramp up time is
  81                  * based on the register setting, we need
  82                  * to calculate how many steps LDO need to
  83                  * ramp up, and how much delay needed. (us)
  84                  */
  85                 regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
  86                 val = (val >> anatop_reg->delay_bit_shift) &
  87                         ((1 << anatop_reg->delay_bit_width) - 1);
  88                 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
  89                         val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
  90         }
  91
  92         return ret;
  93 }
  94
  95 static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
  96 {
  97         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  98
  99         if (!anatop_reg->control_reg)
 100                 return -ENOTSUPP;
 101
 102         return regulator_get_voltage_sel_regmap(reg);
 103 }
 104
 105 static int anatop_regmap_enable(struct regulator_dev *reg)
 106 {
 107         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 108         int sel;
 109
 110         sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel;
 111         return regulator_set_voltage_sel_regmap(reg, sel);
 112 }
 113
 114 static int anatop_regmap_disable(struct regulator_dev *reg)
 115 {
 116         return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE);
 117 }
 118
 119 static int anatop_regmap_is_enabled(struct regulator_dev *reg)
 120 {
 121         return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE;
 122 }
 123
 124 static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg,
 125                                               unsigned selector)
 126 {
 127         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 128         int ret;
 129
 130         if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) {
 131                 anatop_reg->sel = selector;
 132                 return 0;
 133         }
 134
 135         ret = regulator_set_voltage_sel_regmap(reg, selector);
 136         if (!ret)
 137                 anatop_reg->sel = selector;
 138         return ret;
 139 }
 140
 141 static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg)
 142 {
 143         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 144
 145         if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg))
 146                 return anatop_reg->sel;
 147
 148         return regulator_get_voltage_sel_regmap(reg);
 149 }
 150
 151 static int anatop_regmap_get_bypass(struct regulator_dev *reg, bool *enable)
 152 {
 153         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 154         int sel;
 155
 156         sel = regulator_get_voltage_sel_regmap(reg);
 157         if (sel == LDO_FET_FULL_ON)
 158                 WARN_ON(!anatop_reg->bypass);
 159         else if (sel != LDO_POWER_GATE)
 160                 WARN_ON(anatop_reg->bypass);
 161
 162         *enable = anatop_reg->bypass;
 163         return 0;
 164 }
 165
 166 static int anatop_regmap_set_bypass(struct regulator_dev *reg, bool enable)
 167 {
 168         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 169         int sel;
 170
 171         if (enable == anatop_reg->bypass)
 172                 return 0;
 173
 174         sel = enable ? LDO_FET_FULL_ON : anatop_reg->sel;
 175         anatop_reg->bypass = enable;
 176
 177         return regulator_set_voltage_sel_regmap(reg, sel);
 178 }
 179
 180 static struct regulator_ops anatop_rops = {
 181         .set_voltage_sel = anatop_regmap_set_voltage_sel,
 182         .get_voltage_sel = anatop_regmap_get_voltage_sel,
 183         .list_voltage = regulator_list_voltage_linear,
 184         .map_voltage = regulator_map_voltage_linear,
 185 };
 186
 187 static struct regulator_ops anatop_core_rops = {
 188         .enable = anatop_regmap_enable,
 189         .disable = anatop_regmap_disable,
 190         .is_enabled = anatop_regmap_is_enabled,
 191         .set_voltage_sel = anatop_regmap_core_set_voltage_sel,
 192         .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
 193         .get_voltage_sel = anatop_regmap_core_get_voltage_sel,
 194         .list_voltage = regulator_list_voltage_linear,
 195         .map_voltage = regulator_map_voltage_linear,
 196         .get_bypass = anatop_regmap_get_bypass,
 197         .set_bypass = anatop_regmap_set_bypass,
 198 };
 199
 200 static int anatop_regulator_probe(struct platform_device *pdev)
 201 {
 202         struct device *dev = &pdev->dev;
 203         struct device_node *np = dev->of_node;
 204         struct device_node *anatop_np;
 205         struct regulator_desc *rdesc;
 206         struct regulator_dev *rdev;
 207         struct anatop_regulator *sreg;
 208         struct regulator_init_data *initdata;
 209         struct regulator_config config = { };
 210         int ret = 0;
 211         u32 val;
 212
 213         initdata = of_get_regulator_init_data(dev, np);
 214         sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
 215         if (!sreg)
 216                 return -ENOMEM;
 217         sreg->initdata = initdata;
 218         sreg->name = of_get_property(np, "regulator-name", NULL);
 219         rdesc = &sreg->rdesc;
 220         rdesc->name = sreg->name;
 221         rdesc->type = REGULATOR_VOLTAGE;
 222         rdesc->owner = THIS_MODULE;
 223
 224         anatop_np = of_get_parent(np);
 225         if (!anatop_np)
 226                 return -ENODEV;
 227         sreg->anatop = syscon_node_to_regmap(anatop_np);
 228         of_node_put(anatop_np);
 229         if (IS_ERR(sreg->anatop))
 230                 return PTR_ERR(sreg->anatop);
 231
 232         ret = of_property_read_u32(np, "anatop-reg-offset",
 233                                    &sreg->control_reg);
 234         if (ret) {
 235                 dev_err(dev, "no anatop-reg-offset property set\n");
 236                 return ret;
 237         }
 238         ret = of_property_read_u32(np, "anatop-vol-bit-width",
 239                                    &sreg->vol_bit_width);
 240         if (ret) {
 241                 dev_err(dev, "no anatop-vol-bit-width property set\n");
 242                 return ret;
 243         }
 244         ret = of_property_read_u32(np, "anatop-vol-bit-shift",
 245                                    &sreg->vol_bit_shift);
 246         if (ret) {
 247                 dev_err(dev, "no anatop-vol-bit-shift property set\n");
 248                 return ret;
 249         }
 250         ret = of_property_read_u32(np, "anatop-min-bit-val",
 251                                    &sreg->min_bit_val);
 252         if (ret) {
 253                 dev_err(dev, "no anatop-min-bit-val property set\n");
 254                 return ret;
 255         }
 256         ret = of_property_read_u32(np, "anatop-min-voltage",
 257                                    &sreg->min_voltage);
 258         if (ret) {
 259                 dev_err(dev, "no anatop-min-voltage property set\n");
 260                 return ret;
 261         }
 262         ret = of_property_read_u32(np, "anatop-max-voltage",
 263                                    &sreg->max_voltage);
 264         if (ret) {
 265                 dev_err(dev, "no anatop-max-voltage property set\n");
 266                 return ret;
 267         }
 268
 269         /* read LDO ramp up setting, only for core reg */
 270         of_property_read_u32(np, "anatop-delay-reg-offset",
 271                              &sreg->delay_reg);
 272         of_property_read_u32(np, "anatop-delay-bit-width",
 273                              &sreg->delay_bit_width);
 274         of_property_read_u32(np, "anatop-delay-bit-shift",
 275                              &sreg->delay_bit_shift);
 276
 277         rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
 278                             + sreg->min_bit_val;
 279         rdesc->min_uV = sreg->min_voltage;
 280         rdesc->uV_step = 25000;
 281         rdesc->linear_min_sel = sreg->min_bit_val;
 282         rdesc->vsel_reg = sreg->control_reg;
 283         rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
 284                            sreg->vol_bit_shift;
 285
 286         config.dev = &pdev->dev;
 287         config.init_data = initdata;
 288         config.driver_data = sreg;
 289         config.of_node = pdev->dev.of_node;
 290         config.regmap = sreg->anatop;
 291
 292         /* Only core regulators have the ramp up delay configuration. */
 293         if (sreg->control_reg && sreg->delay_bit_width) {
 294                 rdesc->ops = &anatop_core_rops;
 295
 296                 ret = regmap_read(config.regmap, rdesc->vsel_reg, &val);
 297                 if (ret) {
 298                         dev_err(dev, "failed to read initial state\n");
 299                         return ret;
 300                 }
 301
 302                 sreg->sel = (val & rdesc->vsel_mask) >> sreg->vol_bit_shift;
 303                 if (sreg->sel == LDO_FET_FULL_ON) {
 304                         sreg->sel = 0;
 305                         sreg->bypass = true;
 306                 }
 307         } else {
 308                 rdesc->ops = &anatop_rops;
 309         }
 310
 311         /* register regulator */
 312         rdev = devm_regulator_register(dev, rdesc, &config);
 313         if (IS_ERR(rdev)) {
 314                 dev_err(dev, "failed to register %s\n",
 315                         rdesc->name);
 316                 return PTR_ERR(rdev);
 317         }
 318
 319         platform_set_drvdata(pdev, rdev);
 320
 321         return 0;
 322 }
 323
 324 static struct of_device_id of_anatop_regulator_match_tbl[] = {
 325         { .compatible = "fsl,anatop-regulator", },
 326         { /* end */ }
 327 };
 328
 329 static struct platform_driver anatop_regulator_driver = {
 330         .driver = {
 331                 .name   = "anatop_regulator",
 332                 .owner  = THIS_MODULE,
 333                 .of_match_table = of_anatop_regulator_match_tbl,
 334         },
 335         .probe  = anatop_regulator_probe,
 336 };
 337
 338 static int __init anatop_regulator_init(void)
 339 {
 340         return platform_driver_register(&anatop_regulator_driver);
 341 }
 342 postcore_initcall(anatop_regulator_init);
 343
 344 static void __exit anatop_regulator_exit(void)
 345 {
 346         platform_driver_unregister(&anatop_regulator_driver);
 347 }
 348 module_exit(anatop_regulator_exit);
 349
 350 MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
 351 MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
 352 MODULE_DESCRIPTION("ANATOP Regulator driver");
 353 MODULE_LICENSE("GPL v2");
 354 MODULE_ALIAS("platform:anatop_regulator");