drivers/regulator/anatop-regulator.c

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include <linux/slab.h>
  22 #include <linux/device.h>
  23 #include <linux/module.h>
  24 #include <linux/mfd/syscon.h>
  25 #include <linux/err.h>
  26 #include <linux/io.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/of.h>
  29 #include <linux/of_address.h>
  30 #include <linux/regmap.h>
  31 #include <linux/regulator/driver.h>
  32 #include <linux/regulator/of_regulator.h>
  33
  34 #define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
  35 #define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */
  36
  37 #define LDO_POWER_GATE                  0x00
  38
  39 struct anatop_regulator {
  40         const char *name;
  41         u32 control_reg;
  42         struct regmap *anatop;
  43         int vol_bit_shift;
  44         int vol_bit_width;
  45         u32 delay_reg;
  46         int delay_bit_shift;
  47         int delay_bit_width;
  48         int min_bit_val;
  49         int min_voltage;
  50         int max_voltage;
  51         struct regulator_desc rdesc;
  52         struct regulator_init_data *initdata;
  53         int sel;
  54 };
  55
  56 static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
  57                                         unsigned selector)
  58 {
  59         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  60
  61         if (!anatop_reg->control_reg)
  62                 return -ENOTSUPP;
  63
  64         return regulator_set_voltage_sel_regmap(reg, selector);
  65 }
  66
  67 static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
  68         unsigned int old_sel,
  69         unsigned int new_sel)
  70 {
  71         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  72         u32 val;
  73         int ret = 0;
  74
  75         /* check whether need to care about LDO ramp up speed */
  76         if (anatop_reg->delay_bit_width && new_sel > old_sel) {
  77                 /*
  78                  * the delay for LDO ramp up time is
  79                  * based on the register setting, we need
  80                  * to calculate how many steps LDO need to
  81                  * ramp up, and how much delay needed. (us)
  82                  */
  83                 regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
  84                 val = (val >> anatop_reg->delay_bit_shift) &
  85                         ((1 << anatop_reg->delay_bit_width) - 1);
  86                 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
  87                         val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
  88         }
  89
  90         return ret;
  91 }
  92
  93 static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
  94 {
  95         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  96
  97         if (!anatop_reg->control_reg)
  98                 return -ENOTSUPP;
  99
 100         return regulator_get_voltage_sel_regmap(reg);
 101 }
 102
 103 static int anatop_regmap_enable(struct regulator_dev *reg)
 104 {
 105         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 106
 107         return regulator_set_voltage_sel_regmap(reg, anatop_reg->sel);
 108 }
 109
 110 static int anatop_regmap_disable(struct regulator_dev *reg)
 111 {
 112         return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE);
 113 }
 114
 115 static int anatop_regmap_is_enabled(struct regulator_dev *reg)
 116 {
 117         return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE;
 118 }
 119
 120 static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg,
 121                                               unsigned selector)
 122 {
 123         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 124         int ret;
 125
 126         if (!anatop_regmap_is_enabled(reg)) {
 127                 anatop_reg->sel = selector;
 128                 return 0;
 129         }
 130
 131         ret = regulator_set_voltage_sel_regmap(reg, selector);
 132         if (!ret)
 133                 anatop_reg->sel = selector;
 134         return ret;
 135 }
 136
 137 static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg)
 138 {
 139         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 140
 141         if (!anatop_regmap_is_enabled(reg))
 142                 return anatop_reg->sel;
 143
 144         return regulator_get_voltage_sel_regmap(reg);
 145 }
 146
 147 static struct regulator_ops anatop_rops = {
 148         .set_voltage_sel = anatop_regmap_set_voltage_sel,
 149         .get_voltage_sel = anatop_regmap_get_voltage_sel,
 150         .list_voltage = regulator_list_voltage_linear,
 151         .map_voltage = regulator_map_voltage_linear,
 152 };
 153
 154 static struct regulator_ops anatop_core_rops = {
 155         .enable = anatop_regmap_enable,
 156         .disable = anatop_regmap_disable,
 157         .is_enabled = anatop_regmap_is_enabled,
 158         .set_voltage_sel = anatop_regmap_core_set_voltage_sel,
 159         .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
 160         .get_voltage_sel = anatop_regmap_core_get_voltage_sel,
 161         .list_voltage = regulator_list_voltage_linear,
 162         .map_voltage = regulator_map_voltage_linear,
 163 };
 164
 165 static int anatop_regulator_probe(struct platform_device *pdev)
 166 {
 167         struct device *dev = &pdev->dev;
 168         struct device_node *np = dev->of_node;
 169         struct device_node *anatop_np;
 170         struct regulator_desc *rdesc;
 171         struct regulator_dev *rdev;
 172         struct anatop_regulator *sreg;
 173         struct regulator_init_data *initdata;
 174         struct regulator_config config = { };
 175         int ret = 0;
 176         u32 val;
 177
 178         initdata = of_get_regulator_init_data(dev, np);
 179         sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
 180         if (!sreg)
 181                 return -ENOMEM;
 182         sreg->initdata = initdata;
 183         sreg->name = of_get_property(np, "regulator-name", NULL);
 184         rdesc = &sreg->rdesc;
 185         rdesc->name = sreg->name;
 186         rdesc->type = REGULATOR_VOLTAGE;
 187         rdesc->owner = THIS_MODULE;
 188
 189         anatop_np = of_get_parent(np);
 190         if (!anatop_np)
 191                 return -ENODEV;
 192         sreg->anatop = syscon_node_to_regmap(anatop_np);
 193         of_node_put(anatop_np);
 194         if (IS_ERR(sreg->anatop))
 195                 return PTR_ERR(sreg->anatop);
 196
 197         ret = of_property_read_u32(np, "anatop-reg-offset",
 198                                    &sreg->control_reg);
 199         if (ret) {
 200                 dev_err(dev, "no anatop-reg-offset property set\n");
 201                 return ret;
 202         }
 203         ret = of_property_read_u32(np, "anatop-vol-bit-width",
 204                                    &sreg->vol_bit_width);
 205         if (ret) {
 206                 dev_err(dev, "no anatop-vol-bit-width property set\n");
 207                 return ret;
 208         }
 209         ret = of_property_read_u32(np, "anatop-vol-bit-shift",
 210                                    &sreg->vol_bit_shift);
 211         if (ret) {
 212                 dev_err(dev, "no anatop-vol-bit-shift property set\n");
 213                 return ret;
 214         }
 215         ret = of_property_read_u32(np, "anatop-min-bit-val",
 216                                    &sreg->min_bit_val);
 217         if (ret) {
 218                 dev_err(dev, "no anatop-min-bit-val property set\n");
 219                 return ret;
 220         }
 221         ret = of_property_read_u32(np, "anatop-min-voltage",
 222                                    &sreg->min_voltage);
 223         if (ret) {
 224                 dev_err(dev, "no anatop-min-voltage property set\n");
 225                 return ret;
 226         }
 227         ret = of_property_read_u32(np, "anatop-max-voltage",
 228                                    &sreg->max_voltage);
 229         if (ret) {
 230                 dev_err(dev, "no anatop-max-voltage property set\n");
 231                 return ret;
 232         }
 233
 234         /* read LDO ramp up setting, only for core reg */
 235         of_property_read_u32(np, "anatop-delay-reg-offset",
 236                              &sreg->delay_reg);
 237         of_property_read_u32(np, "anatop-delay-bit-width",
 238                              &sreg->delay_bit_width);
 239         of_property_read_u32(np, "anatop-delay-bit-shift",
 240                              &sreg->delay_bit_shift);
 241
 242         rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
 243                             + sreg->min_bit_val;
 244         rdesc->min_uV = sreg->min_voltage;
 245         rdesc->uV_step = 25000;
 246         rdesc->linear_min_sel = sreg->min_bit_val;
 247         rdesc->vsel_reg = sreg->control_reg;
 248         rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
 249                            sreg->vol_bit_shift;
 250
 251         config.dev = &pdev->dev;
 252         config.init_data = initdata;
 253         config.driver_data = sreg;
 254         config.of_node = pdev->dev.of_node;
 255         config.regmap = sreg->anatop;
 256
 257         /* Only core regulators have the ramp up delay configuration. */
 258         if (sreg->control_reg && sreg->delay_bit_width) {
 259                 rdesc->ops = &anatop_core_rops;
 260
 261                 ret = regmap_read(config.regmap, rdesc->vsel_reg, &val);
 262                 if (ret) {
 263                         dev_err(dev, "failed to read initial state\n");
 264                         return ret;
 265                 }
 266
 267                 sreg->sel = (val & rdesc->vsel_mask) >> sreg->vol_bit_shift;
 268         } else {
 269                 rdesc->ops = &anatop_rops;
 270         }
 271
 272         /* register regulator */
 273         rdev = devm_regulator_register(dev, rdesc, &config);
 274         if (IS_ERR(rdev)) {
 275                 dev_err(dev, "failed to register %s\n",
 276                         rdesc->name);
 277                 return PTR_ERR(rdev);
 278         }
 279
 280         platform_set_drvdata(pdev, rdev);
 281
 282         return 0;
 283 }
 284
 285 static struct of_device_id of_anatop_regulator_match_tbl[] = {
 286         { .compatible = "fsl,anatop-regulator", },
 287         { /* end */ }
 288 };
 289
 290 static struct platform_driver anatop_regulator_driver = {
 291         .driver = {
 292                 .name   = "anatop_regulator",
 293                 .owner  = THIS_MODULE,
 294                 .of_match_table = of_anatop_regulator_match_tbl,
 295         },
 296         .probe  = anatop_regulator_probe,
 297 };
 298
 299 static int __init anatop_regulator_init(void)
 300 {
 301         return platform_driver_register(&anatop_regulator_driver);
 302 }
 303 postcore_initcall(anatop_regulator_init);
 304
 305 static void __exit anatop_regulator_exit(void)
 306 {
 307         platform_driver_unregister(&anatop_regulator_driver);
 308 }
 309 module_exit(anatop_regulator_exit);
 310
 311 MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
 312 MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
 313 MODULE_DESCRIPTION("ANATOP Regulator driver");
 314 MODULE_LICENSE("GPL v2");
 315 MODULE_ALIAS("platform:anatop_regulator");