drivers/regulator/wm8350-regulator.c

   1 /*
   2  * wm8350.c  --  Voltage and current regulation for the Wolfson WM8350 PMIC
   3  *
   4  * Copyright 2007, 2008 Wolfson Microelectronics PLC.
   5  *
   6  * Author: Liam Girdwood
   7  *         linux@wolfsonmicro.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/moduleparam.h>
  17 #include <linux/init.h>
  18 #include <linux/bitops.h>
  19 #include <linux/err.h>
  20 #include <linux/i2c.h>
  21 #include <linux/mfd/wm8350/core.h>
  22 #include <linux/mfd/wm8350/pmic.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/regulator/driver.h>
  25 #include <linux/regulator/machine.h>
  26
  27 /* Maximum value possible for VSEL */
  28 #define WM8350_DCDC_MAX_VSEL 0x66
  29
  30 /* Microamps */
  31 static const int isink_cur[] = {
  32         4,
  33         5,
  34         6,
  35         7,
  36         8,
  37         10,
  38         11,
  39         14,
  40         16,
  41         19,
  42         23,
  43         27,
  44         32,
  45         39,
  46         46,
  47         54,
  48         65,
  49         77,
  50         92,
  51         109,
  52         130,
  53         154,
  54         183,
  55         218,
  56         259,
  57         308,
  58         367,
  59         436,
  60         518,
  61         616,
  62         733,
  63         872,
  64         1037,
  65         1233,
  66         1466,
  67         1744,
  68         2073,
  69         2466,
  70         2933,
  71         3487,
  72         4147,
  73         4932,
  74         5865,
  75         6975,
  76         8294,
  77         9864,
  78         11730,
  79         13949,
  80         16589,
  81         19728,
  82         23460,
  83         27899,
  84         33178,
  85         39455,
  86         46920,
  87         55798,
  88         66355,
  89         78910,
  90         93840,
  91         111596,
  92         132710,
  93         157820,
  94         187681,
  95         223191
  96 };
  97
  98 static int get_isink_val(int min_uA, int max_uA, u16 *setting)
  99 {
 100         int i;
 101
 102         for (i = 0; i < ARRAY_SIZE(isink_cur); i++) {
 103                 if (min_uA <= isink_cur[i] && max_uA >= isink_cur[i]) {
 104                         *setting = i;
 105                         return 0;
 106                 }
 107         }
 108         return -EINVAL;
 109 }
 110
 111 static inline unsigned int wm8350_ldo_mvolts_to_val(int mV)
 112 {
 113         if (mV < 1800)
 114                 return (mV - 900) / 50;
 115         else
 116                 return ((mV - 1800) / 100) + 16;
 117 }
 118
 119 static inline int wm8350_dcdc_val_to_mvolts(unsigned int val)
 120 {
 121         return (val * 25) + 850;
 122 }
 123
 124 static inline unsigned int wm8350_dcdc_mvolts_to_val(int mV)
 125 {
 126         return (mV - 850) / 25;
 127 }
 128
 129 static int wm8350_isink_set_current(struct regulator_dev *rdev, int min_uA,
 130         int max_uA)
 131 {
 132         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 133         int isink = rdev_get_id(rdev);
 134         u16 val, setting;
 135         int ret;
 136
 137         ret = get_isink_val(min_uA, max_uA, &setting);
 138         if (ret != 0)
 139                 return ret;
 140
 141         switch (isink) {
 142         case WM8350_ISINK_A:
 143                 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
 144                     ~WM8350_CS1_ISEL_MASK;
 145                 wm8350_reg_write(wm8350, WM8350_CURRENT_SINK_DRIVER_A,
 146                                  val | setting);
 147                 break;
 148         case WM8350_ISINK_B:
 149                 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
 150                     ~WM8350_CS1_ISEL_MASK;
 151                 wm8350_reg_write(wm8350, WM8350_CURRENT_SINK_DRIVER_B,
 152                                  val | setting);
 153                 break;
 154         default:
 155                 return -EINVAL;
 156         }
 157
 158         return 0;
 159 }
 160
 161 static int wm8350_isink_get_current(struct regulator_dev *rdev)
 162 {
 163         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 164         int isink = rdev_get_id(rdev);
 165         u16 val;
 166
 167         switch (isink) {
 168         case WM8350_ISINK_A:
 169                 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
 170                     WM8350_CS1_ISEL_MASK;
 171                 break;
 172         case WM8350_ISINK_B:
 173                 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
 174                     WM8350_CS1_ISEL_MASK;
 175                 break;
 176         default:
 177                 return 0;
 178         }
 179
 180         return isink_cur[val];
 181 }
 182
 183 /* turn on ISINK followed by DCDC */
 184 static int wm8350_isink_enable(struct regulator_dev *rdev)
 185 {
 186         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 187         int isink = rdev_get_id(rdev);
 188
 189         switch (isink) {
 190         case WM8350_ISINK_A:
 191                 switch (wm8350->pmic.isink_A_dcdc) {
 192                 case WM8350_DCDC_2:
 193                 case WM8350_DCDC_5:
 194                         wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
 195                                         WM8350_CS1_ENA);
 196                         wm8350_set_bits(wm8350, WM8350_CSA_FLASH_CONTROL,
 197                                         WM8350_CS1_DRIVE);
 198                         wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
 199                                         1 << (wm8350->pmic.isink_A_dcdc -
 200                                               WM8350_DCDC_1));
 201                         break;
 202                 default:
 203                         return -EINVAL;
 204                 }
 205                 break;
 206         case WM8350_ISINK_B:
 207                 switch (wm8350->pmic.isink_B_dcdc) {
 208                 case WM8350_DCDC_2:
 209                 case WM8350_DCDC_5:
 210                         wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
 211                                         WM8350_CS2_ENA);
 212                         wm8350_set_bits(wm8350, WM8350_CSB_FLASH_CONTROL,
 213                                         WM8350_CS2_DRIVE);
 214                         wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
 215                                         1 << (wm8350->pmic.isink_B_dcdc -
 216                                               WM8350_DCDC_1));
 217                         break;
 218                 default:
 219                         return -EINVAL;
 220                 }
 221                 break;
 222         default:
 223                 return -EINVAL;
 224         }
 225         return 0;
 226 }
 227
 228 static int wm8350_isink_disable(struct regulator_dev *rdev)
 229 {
 230         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 231         int isink = rdev_get_id(rdev);
 232
 233         switch (isink) {
 234         case WM8350_ISINK_A:
 235                 switch (wm8350->pmic.isink_A_dcdc) {
 236                 case WM8350_DCDC_2:
 237                 case WM8350_DCDC_5:
 238                         wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
 239                                           1 << (wm8350->pmic.isink_A_dcdc -
 240                                                 WM8350_DCDC_1));
 241                         wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
 242                                           WM8350_CS1_ENA);
 243                         break;
 244                 default:
 245                         return -EINVAL;
 246                 }
 247                 break;
 248         case WM8350_ISINK_B:
 249                 switch (wm8350->pmic.isink_B_dcdc) {
 250                 case WM8350_DCDC_2:
 251                 case WM8350_DCDC_5:
 252                         wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
 253                                           1 << (wm8350->pmic.isink_B_dcdc -
 254                                                 WM8350_DCDC_1));
 255                         wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
 256                                           WM8350_CS2_ENA);
 257                         break;
 258                 default:
 259                         return -EINVAL;
 260                 }
 261                 break;
 262         default:
 263                 return -EINVAL;
 264         }
 265         return 0;
 266 }
 267
 268 static int wm8350_isink_is_enabled(struct regulator_dev *rdev)
 269 {
 270         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 271         int isink = rdev_get_id(rdev);
 272
 273         switch (isink) {
 274         case WM8350_ISINK_A:
 275                 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
 276                     0x8000;
 277         case WM8350_ISINK_B:
 278                 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
 279                     0x8000;
 280         }
 281         return -EINVAL;
 282 }
 283
 284 static int wm8350_isink_enable_time(struct regulator_dev *rdev)
 285 {
 286         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 287         int isink = rdev_get_id(rdev);
 288         int reg;
 289
 290         switch (isink) {
 291         case WM8350_ISINK_A:
 292                 reg = wm8350_reg_read(wm8350, WM8350_CSA_FLASH_CONTROL);
 293                 break;
 294         case WM8350_ISINK_B:
 295                 reg = wm8350_reg_read(wm8350, WM8350_CSB_FLASH_CONTROL);
 296                 break;
 297         default:
 298                 return -EINVAL;
 299         }
 300
 301         if (reg & WM8350_CS1_FLASH_MODE) {
 302                 switch (reg & WM8350_CS1_ON_RAMP_MASK) {
 303                 case 0:
 304                         return 0;
 305                 case 1:
 306                         return 1950;
 307                 case 2:
 308                         return 3910;
 309                 case 3:
 310                         return 7800;
 311                 }
 312         } else {
 313                 switch (reg & WM8350_CS1_ON_RAMP_MASK) {
 314                 case 0:
 315                         return 0;
 316                 case 1:
 317                         return 250000;
 318                 case 2:
 319                         return 500000;
 320                 case 3:
 321                         return 1000000;
 322                 }
 323         }
 324
 325         return -EINVAL;
 326 }
 327
 328
 329 int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
 330                            u16 trigger, u16 duration, u16 on_ramp, u16 off_ramp,
 331                            u16 drive)
 332 {
 333         switch (isink) {
 334         case WM8350_ISINK_A:
 335                 wm8350_reg_write(wm8350, WM8350_CSA_FLASH_CONTROL,
 336                                  (mode ? WM8350_CS1_FLASH_MODE : 0) |
 337                                  (trigger ? WM8350_CS1_TRIGSRC : 0) |
 338                                  duration | on_ramp | off_ramp | drive);
 339                 break;
 340         case WM8350_ISINK_B:
 341                 wm8350_reg_write(wm8350, WM8350_CSB_FLASH_CONTROL,
 342                                  (mode ? WM8350_CS2_FLASH_MODE : 0) |
 343                                  (trigger ? WM8350_CS2_TRIGSRC : 0) |
 344                                  duration | on_ramp | off_ramp | drive);
 345                 break;
 346         default:
 347                 return -EINVAL;
 348         }
 349         return 0;
 350 }
 351 EXPORT_SYMBOL_GPL(wm8350_isink_set_flash);
 352
 353 static int wm8350_dcdc_set_suspend_voltage(struct regulator_dev *rdev, int uV)
 354 {
 355         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 356         int volt_reg, mV = uV / 1000, dcdc = rdev_get_id(rdev);
 357         u16 val;
 358
 359         dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, dcdc, mV);
 360
 361         if (mV && (mV < 850 || mV > 4025)) {
 362                 dev_err(wm8350->dev,
 363                         "DCDC%d suspend voltage %d mV out of range\n",
 364                         dcdc, mV);
 365                 return -EINVAL;
 366         }
 367         if (mV == 0)
 368                 mV = 850;
 369
 370         switch (dcdc) {
 371         case WM8350_DCDC_1:
 372                 volt_reg = WM8350_DCDC1_LOW_POWER;
 373                 break;
 374         case WM8350_DCDC_3:
 375                 volt_reg = WM8350_DCDC3_LOW_POWER;
 376                 break;
 377         case WM8350_DCDC_4:
 378                 volt_reg = WM8350_DCDC4_LOW_POWER;
 379                 break;
 380         case WM8350_DCDC_6:
 381                 volt_reg = WM8350_DCDC6_LOW_POWER;
 382                 break;
 383         case WM8350_DCDC_2:
 384         case WM8350_DCDC_5:
 385         default:
 386                 return -EINVAL;
 387         }
 388
 389         /* all DCDCs have same mV bits */
 390         val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_DC1_VSEL_MASK;
 391         wm8350_reg_write(wm8350, volt_reg,
 392                          val | wm8350_dcdc_mvolts_to_val(mV));
 393         return 0;
 394 }
 395
 396 static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev)
 397 {
 398         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 399         int dcdc = rdev_get_id(rdev);
 400         u16 val;
 401
 402         switch (dcdc) {
 403         case WM8350_DCDC_1:
 404                 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER)
 405                         & ~WM8350_DCDC_HIB_MODE_MASK;
 406                 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
 407                         val | wm8350->pmic.dcdc1_hib_mode);
 408                 break;
 409         case WM8350_DCDC_3:
 410                 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER)
 411                         & ~WM8350_DCDC_HIB_MODE_MASK;
 412                 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
 413                         val | wm8350->pmic.dcdc3_hib_mode);
 414                 break;
 415         case WM8350_DCDC_4:
 416                 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER)
 417                         & ~WM8350_DCDC_HIB_MODE_MASK;
 418                 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
 419                         val | wm8350->pmic.dcdc4_hib_mode);
 420                 break;
 421         case WM8350_DCDC_6:
 422                 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER)
 423                         & ~WM8350_DCDC_HIB_MODE_MASK;
 424                 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
 425                         val | wm8350->pmic.dcdc6_hib_mode);
 426                 break;
 427         case WM8350_DCDC_2:
 428         case WM8350_DCDC_5:
 429         default:
 430                 return -EINVAL;
 431         }
 432
 433         return 0;
 434 }
 435
 436 static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev)
 437 {
 438         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 439         int dcdc = rdev_get_id(rdev);
 440         u16 val;
 441
 442         switch (dcdc) {
 443         case WM8350_DCDC_1:
 444                 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
 445                 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
 446                 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
 447                                  val | WM8350_DCDC_HIB_MODE_DIS);
 448                 break;
 449         case WM8350_DCDC_3:
 450                 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
 451                 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
 452                 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
 453                                  val | WM8350_DCDC_HIB_MODE_DIS);
 454                 break;
 455         case WM8350_DCDC_4:
 456                 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
 457                 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
 458                 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
 459                                  val | WM8350_DCDC_HIB_MODE_DIS);
 460                 break;
 461         case WM8350_DCDC_6:
 462                 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
 463                 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
 464                 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
 465                                  val | WM8350_DCDC_HIB_MODE_DIS);
 466                 break;
 467         case WM8350_DCDC_2:
 468         case WM8350_DCDC_5:
 469         default:
 470                 return -EINVAL;
 471         }
 472
 473         return 0;
 474 }
 475
 476 static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev)
 477 {
 478         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 479         int dcdc = rdev_get_id(rdev);
 480         u16 val;
 481
 482         switch (dcdc) {
 483         case WM8350_DCDC_2:
 484                 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
 485                     & ~WM8350_DC2_HIB_MODE_MASK;
 486                 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
 487                     (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT));
 488                 break;
 489         case WM8350_DCDC_5:
 490                 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
 491                     & ~WM8350_DC5_HIB_MODE_MASK;
 492                 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
 493                     (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT));
 494                 break;
 495         default:
 496                 return -EINVAL;
 497         }
 498         return 0;
 499 }
 500
 501 static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev)
 502 {
 503         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 504         int dcdc = rdev_get_id(rdev);
 505         u16 val;
 506
 507         switch (dcdc) {
 508         case WM8350_DCDC_2:
 509                 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
 510                     & ~WM8350_DC2_HIB_MODE_MASK;
 511                 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
 512                     (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT));
 513                 break;
 514         case WM8350_DCDC_5:
 515                 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
 516                     & ~WM8350_DC5_HIB_MODE_MASK;
 517                 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
 518                     (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT));
 519                 break;
 520         default:
 521                 return -EINVAL;
 522         }
 523         return 0;
 524 }
 525
 526 static int wm8350_dcdc_set_suspend_mode(struct regulator_dev *rdev,
 527         unsigned int mode)
 528 {
 529         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 530         int dcdc = rdev_get_id(rdev);
 531         u16 *hib_mode;
 532
 533         switch (dcdc) {
 534         case WM8350_DCDC_1:
 535                 hib_mode = &wm8350->pmic.dcdc1_hib_mode;
 536                 break;
 537         case WM8350_DCDC_3:
 538                 hib_mode = &wm8350->pmic.dcdc3_hib_mode;
 539                 break;
 540         case WM8350_DCDC_4:
 541                 hib_mode = &wm8350->pmic.dcdc4_hib_mode;
 542                 break;
 543         case WM8350_DCDC_6:
 544                 hib_mode = &wm8350->pmic.dcdc6_hib_mode;
 545                 break;
 546         case WM8350_DCDC_2:
 547         case WM8350_DCDC_5:
 548         default:
 549                 return -EINVAL;
 550         }
 551
 552         switch (mode) {
 553         case REGULATOR_MODE_NORMAL:
 554                 *hib_mode = WM8350_DCDC_HIB_MODE_IMAGE;
 555                 break;
 556         case REGULATOR_MODE_IDLE:
 557                 *hib_mode = WM8350_DCDC_HIB_MODE_STANDBY;
 558                 break;
 559         case REGULATOR_MODE_STANDBY:
 560                 *hib_mode = WM8350_DCDC_HIB_MODE_LDO_IM;
 561                 break;
 562         default:
 563                 return -EINVAL;
 564         }
 565
 566         return 0;
 567 }
 568
 569 static int wm8350_ldo_set_suspend_voltage(struct regulator_dev *rdev, int uV)
 570 {
 571         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 572         int volt_reg, mV = uV / 1000, ldo = rdev_get_id(rdev);
 573         u16 val;
 574
 575         dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, ldo, mV);
 576
 577         if (mV < 900 || mV > 3300) {
 578                 dev_err(wm8350->dev, "LDO%d voltage %d mV out of range\n",
 579                         ldo, mV);
 580                 return -EINVAL;
 581         }
 582
 583         switch (ldo) {
 584         case WM8350_LDO_1:
 585                 volt_reg = WM8350_LDO1_LOW_POWER;
 586                 break;
 587         case WM8350_LDO_2:
 588                 volt_reg = WM8350_LDO2_LOW_POWER;
 589                 break;
 590         case WM8350_LDO_3:
 591                 volt_reg = WM8350_LDO3_LOW_POWER;
 592                 break;
 593         case WM8350_LDO_4:
 594                 volt_reg = WM8350_LDO4_LOW_POWER;
 595                 break;
 596         default:
 597                 return -EINVAL;
 598         }
 599
 600         /* all LDOs have same mV bits */
 601         val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_VSEL_MASK;
 602         wm8350_reg_write(wm8350, volt_reg,
 603                          val | wm8350_ldo_mvolts_to_val(mV));
 604         return 0;
 605 }
 606
 607 static int wm8350_ldo_set_suspend_enable(struct regulator_dev *rdev)
 608 {
 609         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 610         int volt_reg, ldo = rdev_get_id(rdev);
 611         u16 val;
 612
 613         switch (ldo) {
 614         case WM8350_LDO_1:
 615                 volt_reg = WM8350_LDO1_LOW_POWER;
 616                 break;
 617         case WM8350_LDO_2:
 618                 volt_reg = WM8350_LDO2_LOW_POWER;
 619                 break;
 620         case WM8350_LDO_3:
 621                 volt_reg = WM8350_LDO3_LOW_POWER;
 622                 break;
 623         case WM8350_LDO_4:
 624                 volt_reg = WM8350_LDO4_LOW_POWER;
 625                 break;
 626         default:
 627                 return -EINVAL;
 628         }
 629
 630         /* all LDOs have same mV bits */
 631         val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
 632         wm8350_reg_write(wm8350, volt_reg, val);
 633         return 0;
 634 }
 635
 636 static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev)
 637 {
 638         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 639         int volt_reg, ldo = rdev_get_id(rdev);
 640         u16 val;
 641
 642         switch (ldo) {
 643         case WM8350_LDO_1:
 644                 volt_reg = WM8350_LDO1_LOW_POWER;
 645                 break;
 646         case WM8350_LDO_2:
 647                 volt_reg = WM8350_LDO2_LOW_POWER;
 648                 break;
 649         case WM8350_LDO_3:
 650                 volt_reg = WM8350_LDO3_LOW_POWER;
 651                 break;
 652         case WM8350_LDO_4:
 653                 volt_reg = WM8350_LDO4_LOW_POWER;
 654                 break;
 655         default:
 656                 return -EINVAL;
 657         }
 658
 659         /* all LDOs have same mV bits */
 660         val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
 661         wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS);
 662         return 0;
 663 }
 664
 665 static int wm8350_ldo_list_voltage(struct regulator_dev *rdev,
 666                                     unsigned selector)
 667 {
 668         if (selector > WM8350_LDO1_VSEL_MASK)
 669                 return -EINVAL;
 670
 671         if (selector < 16)
 672                 return (selector * 50000) + 900000;
 673         else
 674                 return ((selector - 16) * 100000) + 1800000;
 675 }
 676
 677 static int wm8350_ldo_map_voltage(struct regulator_dev *rdev, int min_uV,
 678                                   int max_uV)
 679 {
 680         int volt, sel;
 681         int min_mV = min_uV / 1000;
 682         int max_mV = max_uV / 1000;
 683
 684         if (min_mV < 900 || min_mV > 3300)
 685                 return -EINVAL;
 686         if (max_mV < 900 || max_mV > 3300)
 687                 return -EINVAL;
 688
 689         if (min_mV < 1800) /* step size is 50mV < 1800mV */
 690                 sel = DIV_ROUND_UP(min_uV - 900, 50);
 691         else /* step size is 100mV > 1800mV */
 692                 sel = DIV_ROUND_UP(min_uV - 1800, 100) + 16;
 693
 694         volt = wm8350_ldo_list_voltage(rdev, sel);
 695         if (volt < min_uV || volt > max_uV)
 696                 return -EINVAL;
 697
 698         return sel;
 699 }
 700
 701 int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
 702                          u16 stop, u16 fault)
 703 {
 704         int slot_reg;
 705         u16 val;
 706
 707         dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
 708                 __func__, dcdc, start, stop);
 709
 710         /* slot valid ? */
 711         if (start > 15 || stop > 15)
 712                 return -EINVAL;
 713
 714         switch (dcdc) {
 715         case WM8350_DCDC_1:
 716                 slot_reg = WM8350_DCDC1_TIMEOUTS;
 717                 break;
 718         case WM8350_DCDC_2:
 719                 slot_reg = WM8350_DCDC2_TIMEOUTS;
 720                 break;
 721         case WM8350_DCDC_3:
 722                 slot_reg = WM8350_DCDC3_TIMEOUTS;
 723                 break;
 724         case WM8350_DCDC_4:
 725                 slot_reg = WM8350_DCDC4_TIMEOUTS;
 726                 break;
 727         case WM8350_DCDC_5:
 728                 slot_reg = WM8350_DCDC5_TIMEOUTS;
 729                 break;
 730         case WM8350_DCDC_6:
 731                 slot_reg = WM8350_DCDC6_TIMEOUTS;
 732                 break;
 733         default:
 734                 return -EINVAL;
 735         }
 736
 737         val = wm8350_reg_read(wm8350, slot_reg) &
 738             ~(WM8350_DC1_ENSLOT_MASK | WM8350_DC1_SDSLOT_MASK |
 739               WM8350_DC1_ERRACT_MASK);
 740         wm8350_reg_write(wm8350, slot_reg,
 741                          val | (start << WM8350_DC1_ENSLOT_SHIFT) |
 742                          (stop << WM8350_DC1_SDSLOT_SHIFT) |
 743                          (fault << WM8350_DC1_ERRACT_SHIFT));
 744
 745         return 0;
 746 }
 747 EXPORT_SYMBOL_GPL(wm8350_dcdc_set_slot);
 748
 749 int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop)
 750 {
 751         int slot_reg;
 752         u16 val;
 753
 754         dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
 755                 __func__, ldo, start, stop);
 756
 757         /* slot valid ? */
 758         if (start > 15 || stop > 15)
 759                 return -EINVAL;
 760
 761         switch (ldo) {
 762         case WM8350_LDO_1:
 763                 slot_reg = WM8350_LDO1_TIMEOUTS;
 764                 break;
 765         case WM8350_LDO_2:
 766                 slot_reg = WM8350_LDO2_TIMEOUTS;
 767                 break;
 768         case WM8350_LDO_3:
 769                 slot_reg = WM8350_LDO3_TIMEOUTS;
 770                 break;
 771         case WM8350_LDO_4:
 772                 slot_reg = WM8350_LDO4_TIMEOUTS;
 773                 break;
 774         default:
 775                 return -EINVAL;
 776         }
 777
 778         val = wm8350_reg_read(wm8350, slot_reg) & ~WM8350_LDO1_SDSLOT_MASK;
 779         wm8350_reg_write(wm8350, slot_reg, val | ((start << 10) | (stop << 6)));
 780         return 0;
 781 }
 782 EXPORT_SYMBOL_GPL(wm8350_ldo_set_slot);
 783
 784 int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
 785                            u16 ilim, u16 ramp, u16 feedback)
 786 {
 787         u16 val;
 788
 789         dev_dbg(wm8350->dev, "%s %d mode: %s %s\n", __func__, dcdc,
 790                 mode ? "normal" : "boost", ilim ? "low" : "normal");
 791
 792         switch (dcdc) {
 793         case WM8350_DCDC_2:
 794                 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
 795                     & ~(WM8350_DC2_MODE_MASK | WM8350_DC2_ILIM_MASK |
 796                         WM8350_DC2_RMP_MASK | WM8350_DC2_FBSRC_MASK);
 797                 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
 798                                  (mode << WM8350_DC2_MODE_SHIFT) |
 799                                  (ilim << WM8350_DC2_ILIM_SHIFT) |
 800                                  (ramp << WM8350_DC2_RMP_SHIFT) |
 801                                  (feedback << WM8350_DC2_FBSRC_SHIFT));
 802                 break;
 803         case WM8350_DCDC_5:
 804                 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
 805                     & ~(WM8350_DC5_MODE_MASK | WM8350_DC5_ILIM_MASK |
 806                         WM8350_DC5_RMP_MASK | WM8350_DC5_FBSRC_MASK);
 807                 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
 808                                  (mode << WM8350_DC5_MODE_SHIFT) |
 809                                  (ilim << WM8350_DC5_ILIM_SHIFT) |
 810                                  (ramp << WM8350_DC5_RMP_SHIFT) |
 811                                  (feedback << WM8350_DC5_FBSRC_SHIFT));
 812                 break;
 813         default:
 814                 return -EINVAL;
 815         }
 816
 817         return 0;
 818 }
 819 EXPORT_SYMBOL_GPL(wm8350_dcdc25_set_mode);
 820
 821 static int force_continuous_enable(struct wm8350 *wm8350, int dcdc, int enable)
 822 {
 823         int reg = 0, ret;
 824
 825         switch (dcdc) {
 826         case WM8350_DCDC_1:
 827                 reg = WM8350_DCDC1_FORCE_PWM;
 828                 break;
 829         case WM8350_DCDC_3:
 830                 reg = WM8350_DCDC3_FORCE_PWM;
 831                 break;
 832         case WM8350_DCDC_4:
 833                 reg = WM8350_DCDC4_FORCE_PWM;
 834                 break;
 835         case WM8350_DCDC_6:
 836                 reg = WM8350_DCDC6_FORCE_PWM;
 837                 break;
 838         default:
 839                 return -EINVAL;
 840         }
 841
 842         if (enable)
 843                 ret = wm8350_set_bits(wm8350, reg,
 844                         WM8350_DCDC1_FORCE_PWM_ENA);
 845         else
 846                 ret = wm8350_clear_bits(wm8350, reg,
 847                         WM8350_DCDC1_FORCE_PWM_ENA);
 848         return ret;
 849 }
 850
 851 static int wm8350_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
 852 {
 853         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 854         int dcdc = rdev_get_id(rdev);
 855         u16 val;
 856
 857         if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6)
 858                 return -EINVAL;
 859
 860         if (dcdc == WM8350_DCDC_2 || dcdc == WM8350_DCDC_5)
 861                 return -EINVAL;
 862
 863         val = 1 << (dcdc - WM8350_DCDC_1);
 864
 865         switch (mode) {
 866         case REGULATOR_MODE_FAST:
 867                 /* force continuous mode */
 868                 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
 869                 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
 870                 force_continuous_enable(wm8350, dcdc, 1);
 871                 break;
 872         case REGULATOR_MODE_NORMAL:
 873                 /* active / pulse skipping */
 874                 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
 875                 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
 876                 force_continuous_enable(wm8350, dcdc, 0);
 877                 break;
 878         case REGULATOR_MODE_IDLE:
 879                 /* standby mode */
 880                 force_continuous_enable(wm8350, dcdc, 0);
 881                 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
 882                 wm8350_clear_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
 883                 break;
 884         case REGULATOR_MODE_STANDBY:
 885                 /* LDO mode */
 886                 force_continuous_enable(wm8350, dcdc, 0);
 887                 wm8350_set_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
 888                 break;
 889         }
 890
 891         return 0;
 892 }
 893
 894 static unsigned int wm8350_dcdc_get_mode(struct regulator_dev *rdev)
 895 {
 896         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
 897         int dcdc = rdev_get_id(rdev);
 898         u16 mask, sleep, active, force;
 899         int mode = REGULATOR_MODE_NORMAL;
 900         int reg;
 901
 902         switch (dcdc) {
 903         case WM8350_DCDC_1:
 904                 reg = WM8350_DCDC1_FORCE_PWM;
 905                 break;
 906         case WM8350_DCDC_3:
 907                 reg = WM8350_DCDC3_FORCE_PWM;
 908                 break;
 909         case WM8350_DCDC_4:
 910                 reg = WM8350_DCDC4_FORCE_PWM;
 911                 break;
 912         case WM8350_DCDC_6:
 913                 reg = WM8350_DCDC6_FORCE_PWM;
 914                 break;
 915         default:
 916                 return -EINVAL;
 917         }
 918
 919         mask = 1 << (dcdc - WM8350_DCDC_1);
 920         active = wm8350_reg_read(wm8350, WM8350_DCDC_ACTIVE_OPTIONS) & mask;
 921         force = wm8350_reg_read(wm8350, reg) & WM8350_DCDC1_FORCE_PWM_ENA;
 922         sleep = wm8350_reg_read(wm8350, WM8350_DCDC_SLEEP_OPTIONS) & mask;
 923
 924         dev_dbg(wm8350->dev, "mask %x active %x sleep %x force %x",
 925                 mask, active, sleep, force);
 926
 927         if (active && !sleep) {
 928                 if (force)
 929                         mode = REGULATOR_MODE_FAST;
 930                 else
 931                         mode = REGULATOR_MODE_NORMAL;
 932         } else if (!active && !sleep)
 933                 mode = REGULATOR_MODE_IDLE;
 934         else if (sleep)
 935                 mode = REGULATOR_MODE_STANDBY;
 936
 937         return mode;
 938 }
 939
 940 static unsigned int wm8350_ldo_get_mode(struct regulator_dev *rdev)
 941 {
 942         return REGULATOR_MODE_NORMAL;
 943 }
 944
 945 struct wm8350_dcdc_efficiency {
 946         int uA_load_min;
 947         int uA_load_max;
 948         unsigned int mode;
 949 };
 950
 951 static const struct wm8350_dcdc_efficiency dcdc1_6_efficiency[] = {
 952         {0, 10000, REGULATOR_MODE_STANDBY},       /* 0 - 10mA - LDO */
 953         {10000, 100000, REGULATOR_MODE_IDLE},     /* 10mA - 100mA - Standby */
 954         {100000, 1000000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */
 955         {-1, -1, REGULATOR_MODE_NORMAL},
 956 };
 957
 958 static const struct wm8350_dcdc_efficiency dcdc3_4_efficiency[] = {
 959         {0, 10000, REGULATOR_MODE_STANDBY},      /* 0 - 10mA - LDO */
 960         {10000, 100000, REGULATOR_MODE_IDLE},    /* 10mA - 100mA - Standby */
 961         {100000, 800000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */
 962         {-1, -1, REGULATOR_MODE_NORMAL},
 963 };
 964
 965 static unsigned int get_mode(int uA, const struct wm8350_dcdc_efficiency *eff)
 966 {
 967         int i = 0;
 968
 969         while (eff[i].uA_load_min != -1) {
 970                 if (uA >= eff[i].uA_load_min && uA <= eff[i].uA_load_max)
 971                         return eff[i].mode;
 972         }
 973         return REGULATOR_MODE_NORMAL;
 974 }
 975
 976 /* Query the regulator for it's most efficient mode @ uV,uA
 977  * WM8350 regulator efficiency is pretty similar over
 978  * different input and output uV.
 979  */
 980 static unsigned int wm8350_dcdc_get_optimum_mode(struct regulator_dev *rdev,
 981                                                  int input_uV, int output_uV,
 982                                                  int output_uA)
 983 {
 984         int dcdc = rdev_get_id(rdev), mode;
 985
 986         switch (dcdc) {
 987         case WM8350_DCDC_1:
 988         case WM8350_DCDC_6:
 989                 mode = get_mode(output_uA, dcdc1_6_efficiency);
 990                 break;
 991         case WM8350_DCDC_3:
 992         case WM8350_DCDC_4:
 993                 mode = get_mode(output_uA, dcdc3_4_efficiency);
 994                 break;
 995         default:
 996                 mode = REGULATOR_MODE_NORMAL;
 997                 break;
 998         }
 999         return mode;
1000 }
1001
1002 static struct regulator_ops wm8350_dcdc_ops = {
1003         .set_voltage_sel = regulator_set_voltage_sel_regmap,
1004         .get_voltage_sel = regulator_get_voltage_sel_regmap,
1005         .list_voltage = regulator_list_voltage_linear,
1006         .map_voltage = regulator_map_voltage_linear,
1007         .enable = regulator_enable_regmap,
1008         .disable = regulator_disable_regmap,
1009         .is_enabled = regulator_is_enabled_regmap,
1010         .get_mode = wm8350_dcdc_get_mode,
1011         .set_mode = wm8350_dcdc_set_mode,
1012         .get_optimum_mode = wm8350_dcdc_get_optimum_mode,
1013         .set_suspend_voltage = wm8350_dcdc_set_suspend_voltage,
1014         .set_suspend_enable = wm8350_dcdc_set_suspend_enable,
1015         .set_suspend_disable = wm8350_dcdc_set_suspend_disable,
1016         .set_suspend_mode = wm8350_dcdc_set_suspend_mode,
1017 };
1018
1019 static struct regulator_ops wm8350_dcdc2_5_ops = {
1020         .enable = regulator_enable_regmap,
1021         .disable = regulator_disable_regmap,
1022         .is_enabled = regulator_is_enabled_regmap,
1023         .set_suspend_enable = wm8350_dcdc25_set_suspend_enable,
1024         .set_suspend_disable = wm8350_dcdc25_set_suspend_disable,
1025 };
1026
1027 static struct regulator_ops wm8350_ldo_ops = {
1028         .map_voltage = wm8350_ldo_map_voltage,
1029         .set_voltage_sel = regulator_set_voltage_sel_regmap,
1030         .get_voltage_sel = regulator_get_voltage_sel_regmap,
1031         .list_voltage = wm8350_ldo_list_voltage,
1032         .enable = regulator_enable_regmap,
1033         .disable = regulator_disable_regmap,
1034         .is_enabled = regulator_is_enabled_regmap,
1035         .get_mode = wm8350_ldo_get_mode,
1036         .set_suspend_voltage = wm8350_ldo_set_suspend_voltage,
1037         .set_suspend_enable = wm8350_ldo_set_suspend_enable,
1038         .set_suspend_disable = wm8350_ldo_set_suspend_disable,
1039 };
1040
1041 static struct regulator_ops wm8350_isink_ops = {
1042         .set_current_limit = wm8350_isink_set_current,
1043         .get_current_limit = wm8350_isink_get_current,
1044         .enable = wm8350_isink_enable,
1045         .disable = wm8350_isink_disable,
1046         .is_enabled = wm8350_isink_is_enabled,
1047         .enable_time = wm8350_isink_enable_time,
1048 };
1049
1050 static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = {
1051         {
1052                 .name = "DCDC1",
1053                 .id = WM8350_DCDC_1,
1054                 .ops = &wm8350_dcdc_ops,
1055                 .irq = WM8350_IRQ_UV_DC1,
1056                 .type = REGULATOR_VOLTAGE,
1057                 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1058                 .min_uV = 850000,
1059                 .uV_step = 25000,
1060                 .vsel_reg = WM8350_DCDC1_CONTROL,
1061                 .vsel_mask = WM8350_DC1_VSEL_MASK,
1062                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1063                 .enable_mask = WM8350_DC1_ENA,
1064                 .owner = THIS_MODULE,
1065         },
1066         {
1067                 .name = "DCDC2",
1068                 .id = WM8350_DCDC_2,
1069                 .ops = &wm8350_dcdc2_5_ops,
1070                 .irq = WM8350_IRQ_UV_DC2,
1071                 .type = REGULATOR_VOLTAGE,
1072                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1073                 .enable_mask = WM8350_DC2_ENA,
1074                 .owner = THIS_MODULE,
1075         },
1076         {
1077                 .name = "DCDC3",
1078                 .id = WM8350_DCDC_3,
1079                 .ops = &wm8350_dcdc_ops,
1080                 .irq = WM8350_IRQ_UV_DC3,
1081                 .type = REGULATOR_VOLTAGE,
1082                 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1083                 .min_uV = 850000,
1084                 .uV_step = 25000,
1085                 .vsel_reg = WM8350_DCDC3_CONTROL,
1086                 .vsel_mask = WM8350_DC3_VSEL_MASK,
1087                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1088                 .enable_mask = WM8350_DC3_ENA,
1089                 .owner = THIS_MODULE,
1090         },
1091         {
1092                 .name = "DCDC4",
1093                 .id = WM8350_DCDC_4,
1094                 .ops = &wm8350_dcdc_ops,
1095                 .irq = WM8350_IRQ_UV_DC4,
1096                 .type = REGULATOR_VOLTAGE,
1097                 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1098                 .min_uV = 850000,
1099                 .uV_step = 25000,
1100                 .vsel_reg = WM8350_DCDC4_CONTROL,
1101                 .vsel_mask = WM8350_DC4_VSEL_MASK,
1102                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1103                 .enable_mask = WM8350_DC4_ENA,
1104                 .owner = THIS_MODULE,
1105         },
1106         {
1107                 .name = "DCDC5",
1108                 .id = WM8350_DCDC_5,
1109                 .ops = &wm8350_dcdc2_5_ops,
1110                 .irq = WM8350_IRQ_UV_DC5,
1111                 .type = REGULATOR_VOLTAGE,
1112                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1113                 .enable_mask = WM8350_DC5_ENA,
1114                 .owner = THIS_MODULE,
1115          },
1116         {
1117                 .name = "DCDC6",
1118                 .id = WM8350_DCDC_6,
1119                 .ops = &wm8350_dcdc_ops,
1120                 .irq = WM8350_IRQ_UV_DC6,
1121                 .type = REGULATOR_VOLTAGE,
1122                 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1123                 .min_uV = 850000,
1124                 .uV_step = 25000,
1125                 .vsel_reg = WM8350_DCDC6_CONTROL,
1126                 .vsel_mask = WM8350_DC6_VSEL_MASK,
1127                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1128                 .enable_mask = WM8350_DC6_ENA,
1129                 .owner = THIS_MODULE,
1130         },
1131         {
1132                 .name = "LDO1",
1133                 .id = WM8350_LDO_1,
1134                 .ops = &wm8350_ldo_ops,
1135                 .irq = WM8350_IRQ_UV_LDO1,
1136                 .type = REGULATOR_VOLTAGE,
1137                 .n_voltages = WM8350_LDO1_VSEL_MASK + 1,
1138                 .vsel_reg = WM8350_LDO1_CONTROL,
1139                 .vsel_mask = WM8350_LDO1_VSEL_MASK,
1140                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1141                 .enable_mask = WM8350_LDO1_ENA,
1142                 .owner = THIS_MODULE,
1143         },
1144         {
1145                 .name = "LDO2",
1146                 .id = WM8350_LDO_2,
1147                 .ops = &wm8350_ldo_ops,
1148                 .irq = WM8350_IRQ_UV_LDO2,
1149                 .type = REGULATOR_VOLTAGE,
1150                 .n_voltages = WM8350_LDO2_VSEL_MASK + 1,
1151                 .vsel_reg = WM8350_LDO2_CONTROL,
1152                 .vsel_mask = WM8350_LDO2_VSEL_MASK,
1153                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1154                 .enable_mask = WM8350_LDO2_ENA,
1155                 .owner = THIS_MODULE,
1156         },
1157         {
1158                 .name = "LDO3",
1159                 .id = WM8350_LDO_3,
1160                 .ops = &wm8350_ldo_ops,
1161                 .irq = WM8350_IRQ_UV_LDO3,
1162                 .type = REGULATOR_VOLTAGE,
1163                 .n_voltages = WM8350_LDO3_VSEL_MASK + 1,
1164                 .vsel_reg = WM8350_LDO3_CONTROL,
1165                 .vsel_mask = WM8350_LDO3_VSEL_MASK,
1166                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1167                 .enable_mask = WM8350_LDO3_ENA,
1168                 .owner = THIS_MODULE,
1169         },
1170         {
1171                 .name = "LDO4",
1172                 .id = WM8350_LDO_4,
1173                 .ops = &wm8350_ldo_ops,
1174                 .irq = WM8350_IRQ_UV_LDO4,
1175                 .type = REGULATOR_VOLTAGE,
1176                 .n_voltages = WM8350_LDO4_VSEL_MASK + 1,
1177                 .vsel_reg = WM8350_LDO4_CONTROL,
1178                 .vsel_mask = WM8350_LDO4_VSEL_MASK,
1179                 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1180                 .enable_mask = WM8350_LDO4_ENA,
1181                 .owner = THIS_MODULE,
1182         },
1183         {
1184                 .name = "ISINKA",
1185                 .id = WM8350_ISINK_A,
1186                 .ops = &wm8350_isink_ops,
1187                 .irq = WM8350_IRQ_CS1,
1188                 .type = REGULATOR_CURRENT,
1189                 .owner = THIS_MODULE,
1190          },
1191         {
1192                 .name = "ISINKB",
1193                 .id = WM8350_ISINK_B,
1194                 .ops = &wm8350_isink_ops,
1195                 .irq = WM8350_IRQ_CS2,
1196                 .type = REGULATOR_CURRENT,
1197                 .owner = THIS_MODULE,
1198          },
1199 };
1200
1201 static irqreturn_t pmic_uv_handler(int irq, void *data)
1202 {
1203         struct regulator_dev *rdev = (struct regulator_dev *)data;
1204         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1205
1206         mutex_lock(&rdev->mutex);
1207         if (irq == WM8350_IRQ_CS1 || irq == WM8350_IRQ_CS2)
1208                 regulator_notifier_call_chain(rdev,
1209                                               REGULATOR_EVENT_REGULATION_OUT,
1210                                               wm8350);
1211         else
1212                 regulator_notifier_call_chain(rdev,
1213                                               REGULATOR_EVENT_UNDER_VOLTAGE,
1214                                               wm8350);
1215         mutex_unlock(&rdev->mutex);
1216
1217         return IRQ_HANDLED;
1218 }
1219
1220 static int wm8350_regulator_probe(struct platform_device *pdev)
1221 {
1222         struct wm8350 *wm8350 = dev_get_drvdata(&pdev->dev);
1223         struct regulator_config config = { };
1224         struct regulator_dev *rdev;
1225         int ret;
1226         u16 val;
1227
1228         if (pdev->id < WM8350_DCDC_1 || pdev->id > WM8350_ISINK_B)
1229                 return -ENODEV;
1230
1231         /* do any regulatior specific init */
1232         switch (pdev->id) {
1233         case WM8350_DCDC_1:
1234                 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
1235                 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1236                 break;
1237         case WM8350_DCDC_3:
1238                 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
1239                 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1240                 break;
1241         case WM8350_DCDC_4:
1242                 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
1243                 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1244                 break;
1245         case WM8350_DCDC_6:
1246                 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
1247                 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1248                 break;
1249         }
1250
1251         config.dev = &pdev->dev;
1252         config.init_data = pdev->dev.platform_data;
1253         config.driver_data = dev_get_drvdata(&pdev->dev);
1254         config.regmap = wm8350->regmap;
1255
1256         /* register regulator */
1257         rdev = regulator_register(&wm8350_reg[pdev->id], &config);
1258         if (IS_ERR(rdev)) {
1259                 dev_err(&pdev->dev, "failed to register %s\n",
1260                         wm8350_reg[pdev->id].name);
1261                 return PTR_ERR(rdev);
1262         }
1263
1264         /* register regulator IRQ */
1265         ret = wm8350_register_irq(wm8350, wm8350_reg[pdev->id].irq,
1266                                   pmic_uv_handler, 0, "UV", rdev);
1267         if (ret < 0) {
1268                 regulator_unregister(rdev);
1269                 dev_err(&pdev->dev, "failed to register regulator %s IRQ\n",
1270                         wm8350_reg[pdev->id].name);
1271                 return ret;
1272         }
1273
1274         return 0;
1275 }
1276
1277 static int wm8350_regulator_remove(struct platform_device *pdev)
1278 {
1279         struct regulator_dev *rdev = platform_get_drvdata(pdev);
1280         struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1281
1282         wm8350_free_irq(wm8350, wm8350_reg[pdev->id].irq, rdev);
1283
1284         regulator_unregister(rdev);
1285
1286         return 0;
1287 }
1288
1289 int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
1290                               struct regulator_init_data *initdata)
1291 {
1292         struct platform_device *pdev;
1293         int ret;
1294         if (reg < 0 || reg >= NUM_WM8350_REGULATORS)
1295                 return -EINVAL;
1296
1297         if (wm8350->pmic.pdev[reg])
1298                 return -EBUSY;
1299
1300         if (reg >= WM8350_DCDC_1 && reg <= WM8350_DCDC_6 &&
1301             reg > wm8350->pmic.max_dcdc)
1302                 return -ENODEV;
1303         if (reg >= WM8350_ISINK_A && reg <= WM8350_ISINK_B &&
1304             reg > wm8350->pmic.max_isink)
1305                 return -ENODEV;
1306
1307         pdev = platform_device_alloc("wm8350-regulator", reg);
1308         if (!pdev)
1309                 return -ENOMEM;
1310
1311         wm8350->pmic.pdev[reg] = pdev;
1312
1313         initdata->driver_data = wm8350;
1314
1315         pdev->dev.platform_data = initdata;
1316         pdev->dev.parent = wm8350->dev;
1317         platform_set_drvdata(pdev, wm8350);
1318
1319         ret = platform_device_add(pdev);
1320
1321         if (ret != 0) {
1322                 dev_err(wm8350->dev, "Failed to register regulator %d: %d\n",
1323                         reg, ret);
1324                 platform_device_put(pdev);
1325                 wm8350->pmic.pdev[reg] = NULL;
1326         }
1327
1328         return ret;
1329 }
1330 EXPORT_SYMBOL_GPL(wm8350_register_regulator);
1331
1332 /**
1333  * wm8350_register_led - Register a WM8350 LED output
1334  *
1335  * @param wm8350 The WM8350 device to configure.
1336  * @param lednum LED device index to create.
1337  * @param dcdc The DCDC to use for the LED.
1338  * @param isink The ISINK to use for the LED.
1339  * @param pdata Configuration for the LED.
1340  *
1341  * The WM8350 supports the use of an ISINK together with a DCDC to
1342  * provide a power-efficient LED driver.  This function registers the
1343  * regulators and instantiates the platform device for a LED.  The
1344  * operating modes for the LED regulators must be configured using
1345  * wm8350_isink_set_flash(), wm8350_dcdc25_set_mode() and
1346  * wm8350_dcdc_set_slot() prior to calling this function.
1347  */
1348 int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
1349                         struct wm8350_led_platform_data *pdata)
1350 {
1351         struct wm8350_led *led;
1352         struct platform_device *pdev;
1353         int ret;
1354
1355         if (lednum >= ARRAY_SIZE(wm8350->pmic.led) || lednum < 0) {
1356                 dev_err(wm8350->dev, "Invalid LED index %d\n", lednum);
1357                 return -ENODEV;
1358         }
1359
1360         led = &wm8350->pmic.led[lednum];
1361
1362         if (led->pdev) {
1363                 dev_err(wm8350->dev, "LED %d already allocated\n", lednum);
1364                 return -EINVAL;
1365         }
1366
1367         pdev = platform_device_alloc("wm8350-led", lednum);
1368         if (pdev == NULL) {
1369                 dev_err(wm8350->dev, "Failed to allocate LED %d\n", lednum);
1370                 return -ENOMEM;
1371         }
1372
1373         led->isink_consumer.dev_name = dev_name(&pdev->dev);
1374         led->isink_consumer.supply = "led_isink";
1375         led->isink_init.num_consumer_supplies = 1;
1376         led->isink_init.consumer_supplies = &led->isink_consumer;
1377         led->isink_init.constraints.min_uA = 0;
1378         led->isink_init.constraints.max_uA = pdata->max_uA;
1379         led->isink_init.constraints.valid_ops_mask
1380                 = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS;
1381         led->isink_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1382         ret = wm8350_register_regulator(wm8350, isink, &led->isink_init);
1383         if (ret != 0) {
1384                 platform_device_put(pdev);
1385                 return ret;
1386         }
1387
1388         led->dcdc_consumer.dev_name = dev_name(&pdev->dev);
1389         led->dcdc_consumer.supply = "led_vcc";
1390         led->dcdc_init.num_consumer_supplies = 1;
1391         led->dcdc_init.consumer_supplies = &led->dcdc_consumer;
1392         led->dcdc_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1393         led->dcdc_init.constraints.valid_ops_mask =  REGULATOR_CHANGE_STATUS;
1394         ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init);
1395         if (ret != 0) {
1396                 platform_device_put(pdev);
1397                 return ret;
1398         }
1399
1400         switch (isink) {
1401         case WM8350_ISINK_A:
1402                 wm8350->pmic.isink_A_dcdc = dcdc;
1403                 break;
1404         case WM8350_ISINK_B:
1405                 wm8350->pmic.isink_B_dcdc = dcdc;
1406                 break;
1407         }
1408
1409         pdev->dev.platform_data = pdata;
1410         pdev->dev.parent = wm8350->dev;
1411         ret = platform_device_add(pdev);
1412         if (ret != 0) {
1413                 dev_err(wm8350->dev, "Failed to register LED %d: %d\n",
1414                         lednum, ret);
1415                 platform_device_put(pdev);
1416                 return ret;
1417         }
1418
1419         led->pdev = pdev;
1420
1421         return 0;
1422 }
1423 EXPORT_SYMBOL_GPL(wm8350_register_led);
1424
1425 static struct platform_driver wm8350_regulator_driver = {
1426         .probe = wm8350_regulator_probe,
1427         .remove = wm8350_regulator_remove,
1428         .driver         = {
1429                 .name   = "wm8350-regulator",
1430         },
1431 };
1432
1433 static int __init wm8350_regulator_init(void)
1434 {
1435         return platform_driver_register(&wm8350_regulator_driver);
1436 }
1437 subsys_initcall(wm8350_regulator_init);
1438
1439 static void __exit wm8350_regulator_exit(void)
1440 {
1441         platform_driver_unregister(&wm8350_regulator_driver);
1442 }
1443 module_exit(wm8350_regulator_exit);
1444
1445 /* Module information */
1446 MODULE_AUTHOR("Liam Girdwood");
1447 MODULE_DESCRIPTION("WM8350 voltage and current regulator driver");
1448 MODULE_LICENSE("GPL");
1449 MODULE_ALIAS("platform:wm8350-regulator");