2 * wm8350.c -- Voltage and current regulation for the Wolfson WM8350 PMIC
4 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood
7 * linux@wolfsonmicro.com
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/bitops.h>
19 #include <linux/err.h>
20 #include <linux/i2c.h>
21 #include <linux/mfd/wm8350/core.h>
22 #include <linux/mfd/wm8350/pmic.h>
23 #include <linux/platform_device.h>
24 #include <linux/regulator/driver.h>
25 #include <linux/regulator/machine.h>
27 /* Maximum value possible for VSEL */
28 #define WM8350_DCDC_MAX_VSEL 0x66
31 static const int isink_cur[] = {
98 static int get_isink_val(int min_uA, int max_uA, u16 *setting)
102 for (i = 0; i < ARRAY_SIZE(isink_cur); i++) {
103 if (min_uA <= isink_cur[i] && max_uA >= isink_cur[i]) {
111 static inline int wm8350_ldo_val_to_mvolts(unsigned int val)
114 return (val * 50) + 900;
116 return ((val - 16) * 100) + 1800;
120 static inline unsigned int wm8350_ldo_mvolts_to_val(int mV)
123 return (mV - 900) / 50;
125 return ((mV - 1800) / 100) + 16;
128 static inline int wm8350_dcdc_val_to_mvolts(unsigned int val)
130 return (val * 25) + 850;
133 static inline unsigned int wm8350_dcdc_mvolts_to_val(int mV)
135 return (mV - 850) / 25;
138 static int wm8350_isink_set_current(struct regulator_dev *rdev, int min_uA,
141 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
142 int isink = rdev_get_id(rdev);
146 ret = get_isink_val(min_uA, max_uA, &setting);
152 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
153 ~WM8350_CS1_ISEL_MASK;
154 wm8350_reg_write(wm8350, WM8350_CURRENT_SINK_DRIVER_A,
158 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
159 ~WM8350_CS1_ISEL_MASK;
160 wm8350_reg_write(wm8350, WM8350_CURRENT_SINK_DRIVER_B,
170 static int wm8350_isink_get_current(struct regulator_dev *rdev)
172 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
173 int isink = rdev_get_id(rdev);
178 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
179 WM8350_CS1_ISEL_MASK;
182 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
183 WM8350_CS1_ISEL_MASK;
189 return isink_cur[val];
192 /* turn on ISINK followed by DCDC */
193 static int wm8350_isink_enable(struct regulator_dev *rdev)
195 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
196 int isink = rdev_get_id(rdev);
200 switch (wm8350->pmic.isink_A_dcdc) {
203 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
205 wm8350_set_bits(wm8350, WM8350_CSA_FLASH_CONTROL,
207 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
208 1 << (wm8350->pmic.isink_A_dcdc -
216 switch (wm8350->pmic.isink_B_dcdc) {
219 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
221 wm8350_set_bits(wm8350, WM8350_CSB_FLASH_CONTROL,
223 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
224 1 << (wm8350->pmic.isink_B_dcdc -
237 static int wm8350_isink_disable(struct regulator_dev *rdev)
239 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
240 int isink = rdev_get_id(rdev);
244 switch (wm8350->pmic.isink_A_dcdc) {
247 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
248 1 << (wm8350->pmic.isink_A_dcdc -
250 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
258 switch (wm8350->pmic.isink_B_dcdc) {
261 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
262 1 << (wm8350->pmic.isink_B_dcdc -
264 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
277 static int wm8350_isink_is_enabled(struct regulator_dev *rdev)
279 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
280 int isink = rdev_get_id(rdev);
284 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
287 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
293 static int wm8350_isink_enable_time(struct regulator_dev *rdev)
295 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
296 int isink = rdev_get_id(rdev);
301 reg = wm8350_reg_read(wm8350, WM8350_CSA_FLASH_CONTROL);
304 reg = wm8350_reg_read(wm8350, WM8350_CSB_FLASH_CONTROL);
310 if (reg & WM8350_CS1_FLASH_MODE) {
311 switch (reg & WM8350_CS1_ON_RAMP_MASK) {
322 switch (reg & WM8350_CS1_ON_RAMP_MASK) {
338 int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
339 u16 trigger, u16 duration, u16 on_ramp, u16 off_ramp,
344 wm8350_reg_write(wm8350, WM8350_CSA_FLASH_CONTROL,
345 (mode ? WM8350_CS1_FLASH_MODE : 0) |
346 (trigger ? WM8350_CS1_TRIGSRC : 0) |
347 duration | on_ramp | off_ramp | drive);
350 wm8350_reg_write(wm8350, WM8350_CSB_FLASH_CONTROL,
351 (mode ? WM8350_CS2_FLASH_MODE : 0) |
352 (trigger ? WM8350_CS2_TRIGSRC : 0) |
353 duration | on_ramp | off_ramp | drive);
360 EXPORT_SYMBOL_GPL(wm8350_isink_set_flash);
362 static int wm8350_dcdc_set_voltage(struct regulator_dev *rdev, int min_uV,
363 int max_uV, unsigned *selector)
365 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
366 int volt_reg, dcdc = rdev_get_id(rdev), mV,
367 min_mV = min_uV / 1000, max_mV = max_uV / 1000;
370 if (min_mV < 850 || min_mV > 4025)
372 if (max_mV < 850 || max_mV > 4025)
375 /* step size is 25mV */
376 mV = (min_mV - 826) / 25;
377 if (wm8350_dcdc_val_to_mvolts(mV) > max_mV)
379 BUG_ON(wm8350_dcdc_val_to_mvolts(mV) < min_mV);
383 volt_reg = WM8350_DCDC1_CONTROL;
386 volt_reg = WM8350_DCDC3_CONTROL;
389 volt_reg = WM8350_DCDC4_CONTROL;
392 volt_reg = WM8350_DCDC6_CONTROL;
402 /* all DCDCs have same mV bits */
403 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_DC1_VSEL_MASK;
404 wm8350_reg_write(wm8350, volt_reg, val | mV);
408 static int wm8350_dcdc_list_voltage(struct regulator_dev *rdev,
411 if (selector > WM8350_DCDC_MAX_VSEL)
413 return wm8350_dcdc_val_to_mvolts(selector) * 1000;
416 static int wm8350_dcdc_set_suspend_voltage(struct regulator_dev *rdev, int uV)
418 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
419 int volt_reg, mV = uV / 1000, dcdc = rdev_get_id(rdev);
422 dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, dcdc, mV);
424 if (mV && (mV < 850 || mV > 4025)) {
426 "DCDC%d suspend voltage %d mV out of range\n",
435 volt_reg = WM8350_DCDC1_LOW_POWER;
438 volt_reg = WM8350_DCDC3_LOW_POWER;
441 volt_reg = WM8350_DCDC4_LOW_POWER;
444 volt_reg = WM8350_DCDC6_LOW_POWER;
452 /* all DCDCs have same mV bits */
453 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_DC1_VSEL_MASK;
454 wm8350_reg_write(wm8350, volt_reg,
455 val | wm8350_dcdc_mvolts_to_val(mV));
459 static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev)
461 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
462 int dcdc = rdev_get_id(rdev);
467 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER)
468 & ~WM8350_DCDC_HIB_MODE_MASK;
469 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
470 val | wm8350->pmic.dcdc1_hib_mode);
473 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER)
474 & ~WM8350_DCDC_HIB_MODE_MASK;
475 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
476 val | wm8350->pmic.dcdc3_hib_mode);
479 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER)
480 & ~WM8350_DCDC_HIB_MODE_MASK;
481 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
482 val | wm8350->pmic.dcdc4_hib_mode);
485 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER)
486 & ~WM8350_DCDC_HIB_MODE_MASK;
487 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
488 val | wm8350->pmic.dcdc6_hib_mode);
499 static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev)
501 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
502 int dcdc = rdev_get_id(rdev);
507 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
508 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
509 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
510 val | WM8350_DCDC_HIB_MODE_DIS);
513 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
514 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
515 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
516 val | WM8350_DCDC_HIB_MODE_DIS);
519 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
520 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
521 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
522 val | WM8350_DCDC_HIB_MODE_DIS);
525 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
526 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
527 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
528 val | WM8350_DCDC_HIB_MODE_DIS);
539 static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev)
541 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
542 int dcdc = rdev_get_id(rdev);
547 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
548 & ~WM8350_DC2_HIB_MODE_MASK;
549 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
550 (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT));
553 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
554 & ~WM8350_DC5_HIB_MODE_MASK;
555 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
556 (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT));
564 static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev)
566 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
567 int dcdc = rdev_get_id(rdev);
572 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
573 & ~WM8350_DC2_HIB_MODE_MASK;
574 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
575 (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT));
578 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
579 & ~WM8350_DC5_HIB_MODE_MASK;
580 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
581 (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT));
589 static int wm8350_dcdc_set_suspend_mode(struct regulator_dev *rdev,
592 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
593 int dcdc = rdev_get_id(rdev);
598 hib_mode = &wm8350->pmic.dcdc1_hib_mode;
601 hib_mode = &wm8350->pmic.dcdc3_hib_mode;
604 hib_mode = &wm8350->pmic.dcdc4_hib_mode;
607 hib_mode = &wm8350->pmic.dcdc6_hib_mode;
616 case REGULATOR_MODE_NORMAL:
617 *hib_mode = WM8350_DCDC_HIB_MODE_IMAGE;
619 case REGULATOR_MODE_IDLE:
620 *hib_mode = WM8350_DCDC_HIB_MODE_STANDBY;
622 case REGULATOR_MODE_STANDBY:
623 *hib_mode = WM8350_DCDC_HIB_MODE_LDO_IM;
632 static int wm8350_ldo_set_suspend_voltage(struct regulator_dev *rdev, int uV)
634 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
635 int volt_reg, mV = uV / 1000, ldo = rdev_get_id(rdev);
638 dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, ldo, mV);
640 if (mV < 900 || mV > 3300) {
641 dev_err(wm8350->dev, "LDO%d voltage %d mV out of range\n",
648 volt_reg = WM8350_LDO1_LOW_POWER;
651 volt_reg = WM8350_LDO2_LOW_POWER;
654 volt_reg = WM8350_LDO3_LOW_POWER;
657 volt_reg = WM8350_LDO4_LOW_POWER;
663 /* all LDOs have same mV bits */
664 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_VSEL_MASK;
665 wm8350_reg_write(wm8350, volt_reg,
666 val | wm8350_ldo_mvolts_to_val(mV));
670 static int wm8350_ldo_set_suspend_enable(struct regulator_dev *rdev)
672 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
673 int volt_reg, ldo = rdev_get_id(rdev);
678 volt_reg = WM8350_LDO1_LOW_POWER;
681 volt_reg = WM8350_LDO2_LOW_POWER;
684 volt_reg = WM8350_LDO3_LOW_POWER;
687 volt_reg = WM8350_LDO4_LOW_POWER;
693 /* all LDOs have same mV bits */
694 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
695 wm8350_reg_write(wm8350, volt_reg, val);
699 static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev)
701 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
702 int volt_reg, ldo = rdev_get_id(rdev);
707 volt_reg = WM8350_LDO1_LOW_POWER;
710 volt_reg = WM8350_LDO2_LOW_POWER;
713 volt_reg = WM8350_LDO3_LOW_POWER;
716 volt_reg = WM8350_LDO4_LOW_POWER;
722 /* all LDOs have same mV bits */
723 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
724 wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS);
728 static int wm8350_ldo_set_voltage(struct regulator_dev *rdev, int min_uV,
729 int max_uV, unsigned *selector)
731 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
732 int volt_reg, ldo = rdev_get_id(rdev), mV, min_mV = min_uV / 1000,
733 max_mV = max_uV / 1000;
736 if (min_mV < 900 || min_mV > 3300)
738 if (max_mV < 900 || max_mV > 3300)
742 /* step size is 50mV < 1800mV */
743 mV = (min_mV - 851) / 50;
744 if (wm8350_ldo_val_to_mvolts(mV) > max_mV)
746 BUG_ON(wm8350_ldo_val_to_mvolts(mV) < min_mV);
748 /* step size is 100mV > 1800mV */
749 mV = ((min_mV - 1701) / 100) + 16;
750 if (wm8350_ldo_val_to_mvolts(mV) > max_mV)
752 BUG_ON(wm8350_ldo_val_to_mvolts(mV) < min_mV);
757 volt_reg = WM8350_LDO1_CONTROL;
760 volt_reg = WM8350_LDO2_CONTROL;
763 volt_reg = WM8350_LDO3_CONTROL;
766 volt_reg = WM8350_LDO4_CONTROL;
774 /* all LDOs have same mV bits */
775 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_VSEL_MASK;
776 wm8350_reg_write(wm8350, volt_reg, val | mV);
780 static int wm8350_ldo_list_voltage(struct regulator_dev *rdev,
783 if (selector > WM8350_LDO1_VSEL_MASK)
785 return wm8350_ldo_val_to_mvolts(selector) * 1000;
788 int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
794 dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
795 __func__, dcdc, start, stop);
798 if (start > 15 || stop > 15)
803 slot_reg = WM8350_DCDC1_TIMEOUTS;
806 slot_reg = WM8350_DCDC2_TIMEOUTS;
809 slot_reg = WM8350_DCDC3_TIMEOUTS;
812 slot_reg = WM8350_DCDC4_TIMEOUTS;
815 slot_reg = WM8350_DCDC5_TIMEOUTS;
818 slot_reg = WM8350_DCDC6_TIMEOUTS;
824 val = wm8350_reg_read(wm8350, slot_reg) &
825 ~(WM8350_DC1_ENSLOT_MASK | WM8350_DC1_SDSLOT_MASK |
826 WM8350_DC1_ERRACT_MASK);
827 wm8350_reg_write(wm8350, slot_reg,
828 val | (start << WM8350_DC1_ENSLOT_SHIFT) |
829 (stop << WM8350_DC1_SDSLOT_SHIFT) |
830 (fault << WM8350_DC1_ERRACT_SHIFT));
834 EXPORT_SYMBOL_GPL(wm8350_dcdc_set_slot);
836 int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop)
841 dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
842 __func__, ldo, start, stop);
845 if (start > 15 || stop > 15)
850 slot_reg = WM8350_LDO1_TIMEOUTS;
853 slot_reg = WM8350_LDO2_TIMEOUTS;
856 slot_reg = WM8350_LDO3_TIMEOUTS;
859 slot_reg = WM8350_LDO4_TIMEOUTS;
865 val = wm8350_reg_read(wm8350, slot_reg) & ~WM8350_LDO1_SDSLOT_MASK;
866 wm8350_reg_write(wm8350, slot_reg, val | ((start << 10) | (stop << 6)));
869 EXPORT_SYMBOL_GPL(wm8350_ldo_set_slot);
871 int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
872 u16 ilim, u16 ramp, u16 feedback)
876 dev_dbg(wm8350->dev, "%s %d mode: %s %s\n", __func__, dcdc,
877 mode ? "normal" : "boost", ilim ? "low" : "normal");
881 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
882 & ~(WM8350_DC2_MODE_MASK | WM8350_DC2_ILIM_MASK |
883 WM8350_DC2_RMP_MASK | WM8350_DC2_FBSRC_MASK);
884 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
885 (mode << WM8350_DC2_MODE_SHIFT) |
886 (ilim << WM8350_DC2_ILIM_SHIFT) |
887 (ramp << WM8350_DC2_RMP_SHIFT) |
888 (feedback << WM8350_DC2_FBSRC_SHIFT));
891 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
892 & ~(WM8350_DC5_MODE_MASK | WM8350_DC5_ILIM_MASK |
893 WM8350_DC5_RMP_MASK | WM8350_DC5_FBSRC_MASK);
894 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
895 (mode << WM8350_DC5_MODE_SHIFT) |
896 (ilim << WM8350_DC5_ILIM_SHIFT) |
897 (ramp << WM8350_DC5_RMP_SHIFT) |
898 (feedback << WM8350_DC5_FBSRC_SHIFT));
906 EXPORT_SYMBOL_GPL(wm8350_dcdc25_set_mode);
908 static int wm8350_dcdc_enable(struct regulator_dev *rdev)
910 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
911 int dcdc = rdev_get_id(rdev);
914 if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6)
917 shift = dcdc - WM8350_DCDC_1;
918 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift);
922 static int wm8350_dcdc_disable(struct regulator_dev *rdev)
924 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
925 int dcdc = rdev_get_id(rdev);
928 if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6)
931 shift = dcdc - WM8350_DCDC_1;
932 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift);
937 static int wm8350_ldo_enable(struct regulator_dev *rdev)
939 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
940 int ldo = rdev_get_id(rdev);
943 if (ldo < WM8350_LDO_1 || ldo > WM8350_LDO_4)
946 shift = (ldo - WM8350_LDO_1) + 8;
947 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift);
951 static int wm8350_ldo_disable(struct regulator_dev *rdev)
953 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
954 int ldo = rdev_get_id(rdev);
957 if (ldo < WM8350_LDO_1 || ldo > WM8350_LDO_4)
960 shift = (ldo - WM8350_LDO_1) + 8;
961 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift);
965 static int force_continuous_enable(struct wm8350 *wm8350, int dcdc, int enable)
971 reg = WM8350_DCDC1_FORCE_PWM;
974 reg = WM8350_DCDC3_FORCE_PWM;
977 reg = WM8350_DCDC4_FORCE_PWM;
980 reg = WM8350_DCDC6_FORCE_PWM;
987 ret = wm8350_set_bits(wm8350, reg,
988 WM8350_DCDC1_FORCE_PWM_ENA);
990 ret = wm8350_clear_bits(wm8350, reg,
991 WM8350_DCDC1_FORCE_PWM_ENA);
995 static int wm8350_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
997 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
998 int dcdc = rdev_get_id(rdev);
1001 if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6)
1004 if (dcdc == WM8350_DCDC_2 || dcdc == WM8350_DCDC_5)
1007 val = 1 << (dcdc - WM8350_DCDC_1);
1010 case REGULATOR_MODE_FAST:
1011 /* force continuous mode */
1012 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
1013 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
1014 force_continuous_enable(wm8350, dcdc, 1);
1016 case REGULATOR_MODE_NORMAL:
1017 /* active / pulse skipping */
1018 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
1019 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
1020 force_continuous_enable(wm8350, dcdc, 0);
1022 case REGULATOR_MODE_IDLE:
1024 force_continuous_enable(wm8350, dcdc, 0);
1025 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
1026 wm8350_clear_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
1028 case REGULATOR_MODE_STANDBY:
1030 force_continuous_enable(wm8350, dcdc, 0);
1031 wm8350_set_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
1038 static unsigned int wm8350_dcdc_get_mode(struct regulator_dev *rdev)
1040 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1041 int dcdc = rdev_get_id(rdev);
1042 u16 mask, sleep, active, force;
1043 int mode = REGULATOR_MODE_NORMAL;
1048 reg = WM8350_DCDC1_FORCE_PWM;
1051 reg = WM8350_DCDC3_FORCE_PWM;
1054 reg = WM8350_DCDC4_FORCE_PWM;
1057 reg = WM8350_DCDC6_FORCE_PWM;
1063 mask = 1 << (dcdc - WM8350_DCDC_1);
1064 active = wm8350_reg_read(wm8350, WM8350_DCDC_ACTIVE_OPTIONS) & mask;
1065 force = wm8350_reg_read(wm8350, reg) & WM8350_DCDC1_FORCE_PWM_ENA;
1066 sleep = wm8350_reg_read(wm8350, WM8350_DCDC_SLEEP_OPTIONS) & mask;
1068 dev_dbg(wm8350->dev, "mask %x active %x sleep %x force %x",
1069 mask, active, sleep, force);
1071 if (active && !sleep) {
1073 mode = REGULATOR_MODE_FAST;
1075 mode = REGULATOR_MODE_NORMAL;
1076 } else if (!active && !sleep)
1077 mode = REGULATOR_MODE_IDLE;
1079 mode = REGULATOR_MODE_STANDBY;
1084 static unsigned int wm8350_ldo_get_mode(struct regulator_dev *rdev)
1086 return REGULATOR_MODE_NORMAL;
1089 struct wm8350_dcdc_efficiency {
1095 static const struct wm8350_dcdc_efficiency dcdc1_6_efficiency[] = {
1096 {0, 10000, REGULATOR_MODE_STANDBY}, /* 0 - 10mA - LDO */
1097 {10000, 100000, REGULATOR_MODE_IDLE}, /* 10mA - 100mA - Standby */
1098 {100000, 1000000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */
1099 {-1, -1, REGULATOR_MODE_NORMAL},
1102 static const struct wm8350_dcdc_efficiency dcdc3_4_efficiency[] = {
1103 {0, 10000, REGULATOR_MODE_STANDBY}, /* 0 - 10mA - LDO */
1104 {10000, 100000, REGULATOR_MODE_IDLE}, /* 10mA - 100mA - Standby */
1105 {100000, 800000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */
1106 {-1, -1, REGULATOR_MODE_NORMAL},
1109 static unsigned int get_mode(int uA, const struct wm8350_dcdc_efficiency *eff)
1113 while (eff[i].uA_load_min != -1) {
1114 if (uA >= eff[i].uA_load_min && uA <= eff[i].uA_load_max)
1117 return REGULATOR_MODE_NORMAL;
1120 /* Query the regulator for it's most efficient mode @ uV,uA
1121 * WM8350 regulator efficiency is pretty similar over
1122 * different input and output uV.
1124 static unsigned int wm8350_dcdc_get_optimum_mode(struct regulator_dev *rdev,
1125 int input_uV, int output_uV,
1128 int dcdc = rdev_get_id(rdev), mode;
1133 mode = get_mode(output_uA, dcdc1_6_efficiency);
1137 mode = get_mode(output_uA, dcdc3_4_efficiency);
1140 mode = REGULATOR_MODE_NORMAL;
1146 static int wm8350_dcdc_is_enabled(struct regulator_dev *rdev)
1148 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1149 int dcdc = rdev_get_id(rdev), shift;
1151 if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6)
1154 shift = dcdc - WM8350_DCDC_1;
1155 return wm8350_reg_read(wm8350, WM8350_DCDC_LDO_REQUESTED)
1159 static int wm8350_ldo_is_enabled(struct regulator_dev *rdev)
1161 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1162 int ldo = rdev_get_id(rdev), shift;
1164 if (ldo < WM8350_LDO_1 || ldo > WM8350_LDO_4)
1167 shift = (ldo - WM8350_LDO_1) + 8;
1168 return wm8350_reg_read(wm8350, WM8350_DCDC_LDO_REQUESTED)
1172 static struct regulator_ops wm8350_dcdc_ops = {
1173 .set_voltage = wm8350_dcdc_set_voltage,
1174 .get_voltage_sel = regulator_get_voltage_sel_regmap,
1175 .list_voltage = wm8350_dcdc_list_voltage,
1176 .enable = wm8350_dcdc_enable,
1177 .disable = wm8350_dcdc_disable,
1178 .get_mode = wm8350_dcdc_get_mode,
1179 .set_mode = wm8350_dcdc_set_mode,
1180 .get_optimum_mode = wm8350_dcdc_get_optimum_mode,
1181 .is_enabled = wm8350_dcdc_is_enabled,
1182 .set_suspend_voltage = wm8350_dcdc_set_suspend_voltage,
1183 .set_suspend_enable = wm8350_dcdc_set_suspend_enable,
1184 .set_suspend_disable = wm8350_dcdc_set_suspend_disable,
1185 .set_suspend_mode = wm8350_dcdc_set_suspend_mode,
1188 static struct regulator_ops wm8350_dcdc2_5_ops = {
1189 .enable = wm8350_dcdc_enable,
1190 .disable = wm8350_dcdc_disable,
1191 .is_enabled = wm8350_dcdc_is_enabled,
1192 .set_suspend_enable = wm8350_dcdc25_set_suspend_enable,
1193 .set_suspend_disable = wm8350_dcdc25_set_suspend_disable,
1196 static struct regulator_ops wm8350_ldo_ops = {
1197 .set_voltage = wm8350_ldo_set_voltage,
1198 .get_voltage_sel = regulator_get_voltage_sel_regmap,
1199 .list_voltage = wm8350_ldo_list_voltage,
1200 .enable = wm8350_ldo_enable,
1201 .disable = wm8350_ldo_disable,
1202 .is_enabled = wm8350_ldo_is_enabled,
1203 .get_mode = wm8350_ldo_get_mode,
1204 .set_suspend_voltage = wm8350_ldo_set_suspend_voltage,
1205 .set_suspend_enable = wm8350_ldo_set_suspend_enable,
1206 .set_suspend_disable = wm8350_ldo_set_suspend_disable,
1209 static struct regulator_ops wm8350_isink_ops = {
1210 .set_current_limit = wm8350_isink_set_current,
1211 .get_current_limit = wm8350_isink_get_current,
1212 .enable = wm8350_isink_enable,
1213 .disable = wm8350_isink_disable,
1214 .is_enabled = wm8350_isink_is_enabled,
1215 .enable_time = wm8350_isink_enable_time,
1218 static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = {
1221 .id = WM8350_DCDC_1,
1222 .ops = &wm8350_dcdc_ops,
1223 .irq = WM8350_IRQ_UV_DC1,
1224 .type = REGULATOR_VOLTAGE,
1225 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1226 .vsel_reg = WM8350_DCDC1_CONTROL,
1227 .vsel_mask = WM8350_DC1_VSEL_MASK,
1228 .owner = THIS_MODULE,
1232 .id = WM8350_DCDC_2,
1233 .ops = &wm8350_dcdc2_5_ops,
1234 .irq = WM8350_IRQ_UV_DC2,
1235 .type = REGULATOR_VOLTAGE,
1236 .owner = THIS_MODULE,
1240 .id = WM8350_DCDC_3,
1241 .ops = &wm8350_dcdc_ops,
1242 .irq = WM8350_IRQ_UV_DC3,
1243 .type = REGULATOR_VOLTAGE,
1244 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1245 .vsel_reg = WM8350_DCDC3_CONTROL,
1246 .vsel_mask = WM8350_DC3_VSEL_MASK,
1247 .owner = THIS_MODULE,
1251 .id = WM8350_DCDC_4,
1252 .ops = &wm8350_dcdc_ops,
1253 .irq = WM8350_IRQ_UV_DC4,
1254 .type = REGULATOR_VOLTAGE,
1255 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1256 .vsel_reg = WM8350_DCDC4_CONTROL,
1257 .vsel_mask = WM8350_DC4_VSEL_MASK,
1258 .owner = THIS_MODULE,
1262 .id = WM8350_DCDC_5,
1263 .ops = &wm8350_dcdc2_5_ops,
1264 .irq = WM8350_IRQ_UV_DC5,
1265 .type = REGULATOR_VOLTAGE,
1266 .owner = THIS_MODULE,
1270 .id = WM8350_DCDC_6,
1271 .ops = &wm8350_dcdc_ops,
1272 .irq = WM8350_IRQ_UV_DC6,
1273 .type = REGULATOR_VOLTAGE,
1274 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1275 .vsel_reg = WM8350_DCDC6_CONTROL,
1276 .vsel_mask = WM8350_DC6_VSEL_MASK,
1277 .owner = THIS_MODULE,
1282 .ops = &wm8350_ldo_ops,
1283 .irq = WM8350_IRQ_UV_LDO1,
1284 .type = REGULATOR_VOLTAGE,
1285 .n_voltages = WM8350_LDO1_VSEL_MASK + 1,
1286 .vsel_reg = WM8350_LDO1_CONTROL,
1287 .vsel_mask = WM8350_LDO1_VSEL_MASK,
1288 .owner = THIS_MODULE,
1293 .ops = &wm8350_ldo_ops,
1294 .irq = WM8350_IRQ_UV_LDO2,
1295 .type = REGULATOR_VOLTAGE,
1296 .n_voltages = WM8350_LDO2_VSEL_MASK + 1,
1297 .vsel_reg = WM8350_LDO2_CONTROL,
1298 .vsel_mask = WM8350_LDO2_VSEL_MASK,
1299 .owner = THIS_MODULE,
1304 .ops = &wm8350_ldo_ops,
1305 .irq = WM8350_IRQ_UV_LDO3,
1306 .type = REGULATOR_VOLTAGE,
1307 .n_voltages = WM8350_LDO3_VSEL_MASK + 1,
1308 .vsel_reg = WM8350_LDO3_CONTROL,
1309 .vsel_mask = WM8350_LDO3_VSEL_MASK,
1310 .owner = THIS_MODULE,
1315 .ops = &wm8350_ldo_ops,
1316 .irq = WM8350_IRQ_UV_LDO4,
1317 .type = REGULATOR_VOLTAGE,
1318 .n_voltages = WM8350_LDO4_VSEL_MASK + 1,
1319 .vsel_reg = WM8350_LDO4_CONTROL,
1320 .vsel_mask = WM8350_LDO4_VSEL_MASK,
1321 .owner = THIS_MODULE,
1325 .id = WM8350_ISINK_A,
1326 .ops = &wm8350_isink_ops,
1327 .irq = WM8350_IRQ_CS1,
1328 .type = REGULATOR_CURRENT,
1329 .owner = THIS_MODULE,
1333 .id = WM8350_ISINK_B,
1334 .ops = &wm8350_isink_ops,
1335 .irq = WM8350_IRQ_CS2,
1336 .type = REGULATOR_CURRENT,
1337 .owner = THIS_MODULE,
1341 static irqreturn_t pmic_uv_handler(int irq, void *data)
1343 struct regulator_dev *rdev = (struct regulator_dev *)data;
1344 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1346 mutex_lock(&rdev->mutex);
1347 if (irq == WM8350_IRQ_CS1 || irq == WM8350_IRQ_CS2)
1348 regulator_notifier_call_chain(rdev,
1349 REGULATOR_EVENT_REGULATION_OUT,
1352 regulator_notifier_call_chain(rdev,
1353 REGULATOR_EVENT_UNDER_VOLTAGE,
1355 mutex_unlock(&rdev->mutex);
1360 static int wm8350_regulator_probe(struct platform_device *pdev)
1362 struct wm8350 *wm8350 = dev_get_drvdata(&pdev->dev);
1363 struct regulator_config config = { };
1364 struct regulator_dev *rdev;
1368 if (pdev->id < WM8350_DCDC_1 || pdev->id > WM8350_ISINK_B)
1371 /* do any regulatior specific init */
1374 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
1375 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1378 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
1379 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1382 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
1383 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1386 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
1387 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1391 config.dev = &pdev->dev;
1392 config.init_data = pdev->dev.platform_data;
1393 config.driver_data = dev_get_drvdata(&pdev->dev);
1394 config.regmap = wm8350->regmap;
1396 /* register regulator */
1397 rdev = regulator_register(&wm8350_reg[pdev->id], &config);
1399 dev_err(&pdev->dev, "failed to register %s\n",
1400 wm8350_reg[pdev->id].name);
1401 return PTR_ERR(rdev);
1404 /* register regulator IRQ */
1405 ret = wm8350_register_irq(wm8350, wm8350_reg[pdev->id].irq,
1406 pmic_uv_handler, 0, "UV", rdev);
1408 regulator_unregister(rdev);
1409 dev_err(&pdev->dev, "failed to register regulator %s IRQ\n",
1410 wm8350_reg[pdev->id].name);
1417 static int wm8350_regulator_remove(struct platform_device *pdev)
1419 struct regulator_dev *rdev = platform_get_drvdata(pdev);
1420 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1422 wm8350_free_irq(wm8350, wm8350_reg[pdev->id].irq, rdev);
1424 regulator_unregister(rdev);
1429 int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
1430 struct regulator_init_data *initdata)
1432 struct platform_device *pdev;
1434 if (reg < 0 || reg >= NUM_WM8350_REGULATORS)
1437 if (wm8350->pmic.pdev[reg])
1440 if (reg >= WM8350_DCDC_1 && reg <= WM8350_DCDC_6 &&
1441 reg > wm8350->pmic.max_dcdc)
1443 if (reg >= WM8350_ISINK_A && reg <= WM8350_ISINK_B &&
1444 reg > wm8350->pmic.max_isink)
1447 pdev = platform_device_alloc("wm8350-regulator", reg);
1451 wm8350->pmic.pdev[reg] = pdev;
1453 initdata->driver_data = wm8350;
1455 pdev->dev.platform_data = initdata;
1456 pdev->dev.parent = wm8350->dev;
1457 platform_set_drvdata(pdev, wm8350);
1459 ret = platform_device_add(pdev);
1462 dev_err(wm8350->dev, "Failed to register regulator %d: %d\n",
1464 platform_device_put(pdev);
1465 wm8350->pmic.pdev[reg] = NULL;
1470 EXPORT_SYMBOL_GPL(wm8350_register_regulator);
1473 * wm8350_register_led - Register a WM8350 LED output
1475 * @param wm8350 The WM8350 device to configure.
1476 * @param lednum LED device index to create.
1477 * @param dcdc The DCDC to use for the LED.
1478 * @param isink The ISINK to use for the LED.
1479 * @param pdata Configuration for the LED.
1481 * The WM8350 supports the use of an ISINK together with a DCDC to
1482 * provide a power-efficient LED driver. This function registers the
1483 * regulators and instantiates the platform device for a LED. The
1484 * operating modes for the LED regulators must be configured using
1485 * wm8350_isink_set_flash(), wm8350_dcdc25_set_mode() and
1486 * wm8350_dcdc_set_slot() prior to calling this function.
1488 int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
1489 struct wm8350_led_platform_data *pdata)
1491 struct wm8350_led *led;
1492 struct platform_device *pdev;
1495 if (lednum >= ARRAY_SIZE(wm8350->pmic.led) || lednum < 0) {
1496 dev_err(wm8350->dev, "Invalid LED index %d\n", lednum);
1500 led = &wm8350->pmic.led[lednum];
1503 dev_err(wm8350->dev, "LED %d already allocated\n", lednum);
1507 pdev = platform_device_alloc("wm8350-led", lednum);
1509 dev_err(wm8350->dev, "Failed to allocate LED %d\n", lednum);
1513 led->isink_consumer.dev_name = dev_name(&pdev->dev);
1514 led->isink_consumer.supply = "led_isink";
1515 led->isink_init.num_consumer_supplies = 1;
1516 led->isink_init.consumer_supplies = &led->isink_consumer;
1517 led->isink_init.constraints.min_uA = 0;
1518 led->isink_init.constraints.max_uA = pdata->max_uA;
1519 led->isink_init.constraints.valid_ops_mask
1520 = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS;
1521 led->isink_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1522 ret = wm8350_register_regulator(wm8350, isink, &led->isink_init);
1524 platform_device_put(pdev);
1528 led->dcdc_consumer.dev_name = dev_name(&pdev->dev);
1529 led->dcdc_consumer.supply = "led_vcc";
1530 led->dcdc_init.num_consumer_supplies = 1;
1531 led->dcdc_init.consumer_supplies = &led->dcdc_consumer;
1532 led->dcdc_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1533 led->dcdc_init.constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
1534 ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init);
1536 platform_device_put(pdev);
1541 case WM8350_ISINK_A:
1542 wm8350->pmic.isink_A_dcdc = dcdc;
1544 case WM8350_ISINK_B:
1545 wm8350->pmic.isink_B_dcdc = dcdc;
1549 pdev->dev.platform_data = pdata;
1550 pdev->dev.parent = wm8350->dev;
1551 ret = platform_device_add(pdev);
1553 dev_err(wm8350->dev, "Failed to register LED %d: %d\n",
1555 platform_device_put(pdev);
1563 EXPORT_SYMBOL_GPL(wm8350_register_led);
1565 static struct platform_driver wm8350_regulator_driver = {
1566 .probe = wm8350_regulator_probe,
1567 .remove = wm8350_regulator_remove,
1569 .name = "wm8350-regulator",
1573 static int __init wm8350_regulator_init(void)
1575 return platform_driver_register(&wm8350_regulator_driver);
1577 subsys_initcall(wm8350_regulator_init);
1579 static void __exit wm8350_regulator_exit(void)
1581 platform_driver_unregister(&wm8350_regulator_driver);
1583 module_exit(wm8350_regulator_exit);
1585 /* Module information */
1586 MODULE_AUTHOR("Liam Girdwood");
1587 MODULE_DESCRIPTION("WM8350 voltage and current regulator driver");
1588 MODULE_LICENSE("GPL");
1589 MODULE_ALIAS("platform:wm8350-regulator");