2 * wm8350.c -- Voltage and current regulation for the Wolfson WM8350 PMIC
4 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood
7 * linux@wolfsonmicro.com
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/bitops.h>
19 #include <linux/err.h>
20 #include <linux/i2c.h>
21 #include <linux/mfd/wm8350/core.h>
22 #include <linux/mfd/wm8350/pmic.h>
23 #include <linux/platform_device.h>
24 #include <linux/regulator/driver.h>
25 #include <linux/regulator/machine.h>
27 /* Maximum value possible for VSEL */
28 #define WM8350_DCDC_MAX_VSEL 0x66
31 static const int isink_cur[] = {
98 static int get_isink_val(int min_uA, int max_uA, u16 *setting)
102 for (i = 0; i < ARRAY_SIZE(isink_cur); i++) {
103 if (min_uA <= isink_cur[i] && max_uA >= isink_cur[i]) {
111 static inline int wm8350_ldo_val_to_mvolts(unsigned int val)
114 return (val * 50) + 900;
116 return ((val - 16) * 100) + 1800;
120 static inline unsigned int wm8350_ldo_mvolts_to_val(int mV)
123 return (mV - 900) / 50;
125 return ((mV - 1800) / 100) + 16;
128 static inline int wm8350_dcdc_val_to_mvolts(unsigned int val)
130 return (val * 25) + 850;
133 static inline unsigned int wm8350_dcdc_mvolts_to_val(int mV)
135 return (mV - 850) / 25;
138 static int wm8350_isink_set_current(struct regulator_dev *rdev, int min_uA,
141 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
142 int isink = rdev_get_id(rdev);
146 ret = get_isink_val(min_uA, max_uA, &setting);
152 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
153 ~WM8350_CS1_ISEL_MASK;
154 wm8350_reg_write(wm8350, WM8350_CURRENT_SINK_DRIVER_A,
158 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
159 ~WM8350_CS1_ISEL_MASK;
160 wm8350_reg_write(wm8350, WM8350_CURRENT_SINK_DRIVER_B,
170 static int wm8350_isink_get_current(struct regulator_dev *rdev)
172 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
173 int isink = rdev_get_id(rdev);
178 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
179 WM8350_CS1_ISEL_MASK;
182 val = wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
183 WM8350_CS1_ISEL_MASK;
189 return isink_cur[val];
192 /* turn on ISINK followed by DCDC */
193 static int wm8350_isink_enable(struct regulator_dev *rdev)
195 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
196 int isink = rdev_get_id(rdev);
200 switch (wm8350->pmic.isink_A_dcdc) {
203 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
205 wm8350_set_bits(wm8350, WM8350_CSA_FLASH_CONTROL,
207 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
208 1 << (wm8350->pmic.isink_A_dcdc -
216 switch (wm8350->pmic.isink_B_dcdc) {
219 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
221 wm8350_set_bits(wm8350, WM8350_CSB_FLASH_CONTROL,
223 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
224 1 << (wm8350->pmic.isink_B_dcdc -
237 static int wm8350_isink_disable(struct regulator_dev *rdev)
239 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
240 int isink = rdev_get_id(rdev);
244 switch (wm8350->pmic.isink_A_dcdc) {
247 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
248 1 << (wm8350->pmic.isink_A_dcdc -
250 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
258 switch (wm8350->pmic.isink_B_dcdc) {
261 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
262 1 << (wm8350->pmic.isink_B_dcdc -
264 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
277 static int wm8350_isink_is_enabled(struct regulator_dev *rdev)
279 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
280 int isink = rdev_get_id(rdev);
284 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
287 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
293 static int wm8350_isink_enable_time(struct regulator_dev *rdev)
295 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
296 int isink = rdev_get_id(rdev);
301 reg = wm8350_reg_read(wm8350, WM8350_CSA_FLASH_CONTROL);
304 reg = wm8350_reg_read(wm8350, WM8350_CSB_FLASH_CONTROL);
310 if (reg & WM8350_CS1_FLASH_MODE) {
311 switch (reg & WM8350_CS1_ON_RAMP_MASK) {
322 switch (reg & WM8350_CS1_ON_RAMP_MASK) {
338 int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
339 u16 trigger, u16 duration, u16 on_ramp, u16 off_ramp,
344 wm8350_reg_write(wm8350, WM8350_CSA_FLASH_CONTROL,
345 (mode ? WM8350_CS1_FLASH_MODE : 0) |
346 (trigger ? WM8350_CS1_TRIGSRC : 0) |
347 duration | on_ramp | off_ramp | drive);
350 wm8350_reg_write(wm8350, WM8350_CSB_FLASH_CONTROL,
351 (mode ? WM8350_CS2_FLASH_MODE : 0) |
352 (trigger ? WM8350_CS2_TRIGSRC : 0) |
353 duration | on_ramp | off_ramp | drive);
360 EXPORT_SYMBOL_GPL(wm8350_isink_set_flash);
362 static int wm8350_dcdc_set_suspend_voltage(struct regulator_dev *rdev, int uV)
364 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
365 int volt_reg, mV = uV / 1000, dcdc = rdev_get_id(rdev);
368 dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, dcdc, mV);
370 if (mV && (mV < 850 || mV > 4025)) {
372 "DCDC%d suspend voltage %d mV out of range\n",
381 volt_reg = WM8350_DCDC1_LOW_POWER;
384 volt_reg = WM8350_DCDC3_LOW_POWER;
387 volt_reg = WM8350_DCDC4_LOW_POWER;
390 volt_reg = WM8350_DCDC6_LOW_POWER;
398 /* all DCDCs have same mV bits */
399 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_DC1_VSEL_MASK;
400 wm8350_reg_write(wm8350, volt_reg,
401 val | wm8350_dcdc_mvolts_to_val(mV));
405 static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev)
407 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
408 int dcdc = rdev_get_id(rdev);
413 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER)
414 & ~WM8350_DCDC_HIB_MODE_MASK;
415 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
416 val | wm8350->pmic.dcdc1_hib_mode);
419 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER)
420 & ~WM8350_DCDC_HIB_MODE_MASK;
421 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
422 val | wm8350->pmic.dcdc3_hib_mode);
425 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER)
426 & ~WM8350_DCDC_HIB_MODE_MASK;
427 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
428 val | wm8350->pmic.dcdc4_hib_mode);
431 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER)
432 & ~WM8350_DCDC_HIB_MODE_MASK;
433 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
434 val | wm8350->pmic.dcdc6_hib_mode);
445 static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev)
447 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
448 int dcdc = rdev_get_id(rdev);
453 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
454 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
455 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
456 val | WM8350_DCDC_HIB_MODE_DIS);
459 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
460 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
461 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
462 val | WM8350_DCDC_HIB_MODE_DIS);
465 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
466 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
467 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
468 val | WM8350_DCDC_HIB_MODE_DIS);
471 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
472 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
473 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
474 val | WM8350_DCDC_HIB_MODE_DIS);
485 static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev)
487 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
488 int dcdc = rdev_get_id(rdev);
493 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
494 & ~WM8350_DC2_HIB_MODE_MASK;
495 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
496 (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT));
499 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
500 & ~WM8350_DC5_HIB_MODE_MASK;
501 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
502 (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT));
510 static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev)
512 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
513 int dcdc = rdev_get_id(rdev);
518 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
519 & ~WM8350_DC2_HIB_MODE_MASK;
520 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
521 (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT));
524 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
525 & ~WM8350_DC5_HIB_MODE_MASK;
526 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
527 (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT));
535 static int wm8350_dcdc_set_suspend_mode(struct regulator_dev *rdev,
538 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
539 int dcdc = rdev_get_id(rdev);
544 hib_mode = &wm8350->pmic.dcdc1_hib_mode;
547 hib_mode = &wm8350->pmic.dcdc3_hib_mode;
550 hib_mode = &wm8350->pmic.dcdc4_hib_mode;
553 hib_mode = &wm8350->pmic.dcdc6_hib_mode;
562 case REGULATOR_MODE_NORMAL:
563 *hib_mode = WM8350_DCDC_HIB_MODE_IMAGE;
565 case REGULATOR_MODE_IDLE:
566 *hib_mode = WM8350_DCDC_HIB_MODE_STANDBY;
568 case REGULATOR_MODE_STANDBY:
569 *hib_mode = WM8350_DCDC_HIB_MODE_LDO_IM;
578 static int wm8350_ldo_set_suspend_voltage(struct regulator_dev *rdev, int uV)
580 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
581 int volt_reg, mV = uV / 1000, ldo = rdev_get_id(rdev);
584 dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, ldo, mV);
586 if (mV < 900 || mV > 3300) {
587 dev_err(wm8350->dev, "LDO%d voltage %d mV out of range\n",
594 volt_reg = WM8350_LDO1_LOW_POWER;
597 volt_reg = WM8350_LDO2_LOW_POWER;
600 volt_reg = WM8350_LDO3_LOW_POWER;
603 volt_reg = WM8350_LDO4_LOW_POWER;
609 /* all LDOs have same mV bits */
610 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_VSEL_MASK;
611 wm8350_reg_write(wm8350, volt_reg,
612 val | wm8350_ldo_mvolts_to_val(mV));
616 static int wm8350_ldo_set_suspend_enable(struct regulator_dev *rdev)
618 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
619 int volt_reg, ldo = rdev_get_id(rdev);
624 volt_reg = WM8350_LDO1_LOW_POWER;
627 volt_reg = WM8350_LDO2_LOW_POWER;
630 volt_reg = WM8350_LDO3_LOW_POWER;
633 volt_reg = WM8350_LDO4_LOW_POWER;
639 /* all LDOs have same mV bits */
640 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
641 wm8350_reg_write(wm8350, volt_reg, val);
645 static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev)
647 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
648 int volt_reg, ldo = rdev_get_id(rdev);
653 volt_reg = WM8350_LDO1_LOW_POWER;
656 volt_reg = WM8350_LDO2_LOW_POWER;
659 volt_reg = WM8350_LDO3_LOW_POWER;
662 volt_reg = WM8350_LDO4_LOW_POWER;
668 /* all LDOs have same mV bits */
669 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
670 wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS);
674 static int wm8350_ldo_set_voltage(struct regulator_dev *rdev, int min_uV,
675 int max_uV, unsigned *selector)
677 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
678 int volt_reg, ldo = rdev_get_id(rdev), mV, min_mV = min_uV / 1000,
679 max_mV = max_uV / 1000;
682 if (min_mV < 900 || min_mV > 3300)
684 if (max_mV < 900 || max_mV > 3300)
688 /* step size is 50mV < 1800mV */
689 mV = (min_mV - 851) / 50;
690 if (wm8350_ldo_val_to_mvolts(mV) > max_mV)
692 BUG_ON(wm8350_ldo_val_to_mvolts(mV) < min_mV);
694 /* step size is 100mV > 1800mV */
695 mV = ((min_mV - 1701) / 100) + 16;
696 if (wm8350_ldo_val_to_mvolts(mV) > max_mV)
698 BUG_ON(wm8350_ldo_val_to_mvolts(mV) < min_mV);
703 volt_reg = WM8350_LDO1_CONTROL;
706 volt_reg = WM8350_LDO2_CONTROL;
709 volt_reg = WM8350_LDO3_CONTROL;
712 volt_reg = WM8350_LDO4_CONTROL;
720 /* all LDOs have same mV bits */
721 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_VSEL_MASK;
722 wm8350_reg_write(wm8350, volt_reg, val | mV);
726 static int wm8350_ldo_list_voltage(struct regulator_dev *rdev,
729 if (selector > WM8350_LDO1_VSEL_MASK)
731 return wm8350_ldo_val_to_mvolts(selector) * 1000;
734 int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
740 dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
741 __func__, dcdc, start, stop);
744 if (start > 15 || stop > 15)
749 slot_reg = WM8350_DCDC1_TIMEOUTS;
752 slot_reg = WM8350_DCDC2_TIMEOUTS;
755 slot_reg = WM8350_DCDC3_TIMEOUTS;
758 slot_reg = WM8350_DCDC4_TIMEOUTS;
761 slot_reg = WM8350_DCDC5_TIMEOUTS;
764 slot_reg = WM8350_DCDC6_TIMEOUTS;
770 val = wm8350_reg_read(wm8350, slot_reg) &
771 ~(WM8350_DC1_ENSLOT_MASK | WM8350_DC1_SDSLOT_MASK |
772 WM8350_DC1_ERRACT_MASK);
773 wm8350_reg_write(wm8350, slot_reg,
774 val | (start << WM8350_DC1_ENSLOT_SHIFT) |
775 (stop << WM8350_DC1_SDSLOT_SHIFT) |
776 (fault << WM8350_DC1_ERRACT_SHIFT));
780 EXPORT_SYMBOL_GPL(wm8350_dcdc_set_slot);
782 int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop)
787 dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
788 __func__, ldo, start, stop);
791 if (start > 15 || stop > 15)
796 slot_reg = WM8350_LDO1_TIMEOUTS;
799 slot_reg = WM8350_LDO2_TIMEOUTS;
802 slot_reg = WM8350_LDO3_TIMEOUTS;
805 slot_reg = WM8350_LDO4_TIMEOUTS;
811 val = wm8350_reg_read(wm8350, slot_reg) & ~WM8350_LDO1_SDSLOT_MASK;
812 wm8350_reg_write(wm8350, slot_reg, val | ((start << 10) | (stop << 6)));
815 EXPORT_SYMBOL_GPL(wm8350_ldo_set_slot);
817 int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
818 u16 ilim, u16 ramp, u16 feedback)
822 dev_dbg(wm8350->dev, "%s %d mode: %s %s\n", __func__, dcdc,
823 mode ? "normal" : "boost", ilim ? "low" : "normal");
827 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
828 & ~(WM8350_DC2_MODE_MASK | WM8350_DC2_ILIM_MASK |
829 WM8350_DC2_RMP_MASK | WM8350_DC2_FBSRC_MASK);
830 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
831 (mode << WM8350_DC2_MODE_SHIFT) |
832 (ilim << WM8350_DC2_ILIM_SHIFT) |
833 (ramp << WM8350_DC2_RMP_SHIFT) |
834 (feedback << WM8350_DC2_FBSRC_SHIFT));
837 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
838 & ~(WM8350_DC5_MODE_MASK | WM8350_DC5_ILIM_MASK |
839 WM8350_DC5_RMP_MASK | WM8350_DC5_FBSRC_MASK);
840 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
841 (mode << WM8350_DC5_MODE_SHIFT) |
842 (ilim << WM8350_DC5_ILIM_SHIFT) |
843 (ramp << WM8350_DC5_RMP_SHIFT) |
844 (feedback << WM8350_DC5_FBSRC_SHIFT));
852 EXPORT_SYMBOL_GPL(wm8350_dcdc25_set_mode);
854 static int force_continuous_enable(struct wm8350 *wm8350, int dcdc, int enable)
860 reg = WM8350_DCDC1_FORCE_PWM;
863 reg = WM8350_DCDC3_FORCE_PWM;
866 reg = WM8350_DCDC4_FORCE_PWM;
869 reg = WM8350_DCDC6_FORCE_PWM;
876 ret = wm8350_set_bits(wm8350, reg,
877 WM8350_DCDC1_FORCE_PWM_ENA);
879 ret = wm8350_clear_bits(wm8350, reg,
880 WM8350_DCDC1_FORCE_PWM_ENA);
884 static int wm8350_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
886 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
887 int dcdc = rdev_get_id(rdev);
890 if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6)
893 if (dcdc == WM8350_DCDC_2 || dcdc == WM8350_DCDC_5)
896 val = 1 << (dcdc - WM8350_DCDC_1);
899 case REGULATOR_MODE_FAST:
900 /* force continuous mode */
901 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
902 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
903 force_continuous_enable(wm8350, dcdc, 1);
905 case REGULATOR_MODE_NORMAL:
906 /* active / pulse skipping */
907 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
908 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
909 force_continuous_enable(wm8350, dcdc, 0);
911 case REGULATOR_MODE_IDLE:
913 force_continuous_enable(wm8350, dcdc, 0);
914 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
915 wm8350_clear_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
917 case REGULATOR_MODE_STANDBY:
919 force_continuous_enable(wm8350, dcdc, 0);
920 wm8350_set_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
927 static unsigned int wm8350_dcdc_get_mode(struct regulator_dev *rdev)
929 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
930 int dcdc = rdev_get_id(rdev);
931 u16 mask, sleep, active, force;
932 int mode = REGULATOR_MODE_NORMAL;
937 reg = WM8350_DCDC1_FORCE_PWM;
940 reg = WM8350_DCDC3_FORCE_PWM;
943 reg = WM8350_DCDC4_FORCE_PWM;
946 reg = WM8350_DCDC6_FORCE_PWM;
952 mask = 1 << (dcdc - WM8350_DCDC_1);
953 active = wm8350_reg_read(wm8350, WM8350_DCDC_ACTIVE_OPTIONS) & mask;
954 force = wm8350_reg_read(wm8350, reg) & WM8350_DCDC1_FORCE_PWM_ENA;
955 sleep = wm8350_reg_read(wm8350, WM8350_DCDC_SLEEP_OPTIONS) & mask;
957 dev_dbg(wm8350->dev, "mask %x active %x sleep %x force %x",
958 mask, active, sleep, force);
960 if (active && !sleep) {
962 mode = REGULATOR_MODE_FAST;
964 mode = REGULATOR_MODE_NORMAL;
965 } else if (!active && !sleep)
966 mode = REGULATOR_MODE_IDLE;
968 mode = REGULATOR_MODE_STANDBY;
973 static unsigned int wm8350_ldo_get_mode(struct regulator_dev *rdev)
975 return REGULATOR_MODE_NORMAL;
978 struct wm8350_dcdc_efficiency {
984 static const struct wm8350_dcdc_efficiency dcdc1_6_efficiency[] = {
985 {0, 10000, REGULATOR_MODE_STANDBY}, /* 0 - 10mA - LDO */
986 {10000, 100000, REGULATOR_MODE_IDLE}, /* 10mA - 100mA - Standby */
987 {100000, 1000000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */
988 {-1, -1, REGULATOR_MODE_NORMAL},
991 static const struct wm8350_dcdc_efficiency dcdc3_4_efficiency[] = {
992 {0, 10000, REGULATOR_MODE_STANDBY}, /* 0 - 10mA - LDO */
993 {10000, 100000, REGULATOR_MODE_IDLE}, /* 10mA - 100mA - Standby */
994 {100000, 800000, REGULATOR_MODE_NORMAL}, /* > 100mA - Active */
995 {-1, -1, REGULATOR_MODE_NORMAL},
998 static unsigned int get_mode(int uA, const struct wm8350_dcdc_efficiency *eff)
1002 while (eff[i].uA_load_min != -1) {
1003 if (uA >= eff[i].uA_load_min && uA <= eff[i].uA_load_max)
1006 return REGULATOR_MODE_NORMAL;
1009 /* Query the regulator for it's most efficient mode @ uV,uA
1010 * WM8350 regulator efficiency is pretty similar over
1011 * different input and output uV.
1013 static unsigned int wm8350_dcdc_get_optimum_mode(struct regulator_dev *rdev,
1014 int input_uV, int output_uV,
1017 int dcdc = rdev_get_id(rdev), mode;
1022 mode = get_mode(output_uA, dcdc1_6_efficiency);
1026 mode = get_mode(output_uA, dcdc3_4_efficiency);
1029 mode = REGULATOR_MODE_NORMAL;
1035 static struct regulator_ops wm8350_dcdc_ops = {
1036 .set_voltage_sel = regulator_set_voltage_sel_regmap,
1037 .get_voltage_sel = regulator_get_voltage_sel_regmap,
1038 .list_voltage = regulator_list_voltage_linear,
1039 .map_voltage = regulator_map_voltage_linear,
1040 .enable = regulator_enable_regmap,
1041 .disable = regulator_disable_regmap,
1042 .is_enabled = regulator_is_enabled_regmap,
1043 .get_mode = wm8350_dcdc_get_mode,
1044 .set_mode = wm8350_dcdc_set_mode,
1045 .get_optimum_mode = wm8350_dcdc_get_optimum_mode,
1046 .set_suspend_voltage = wm8350_dcdc_set_suspend_voltage,
1047 .set_suspend_enable = wm8350_dcdc_set_suspend_enable,
1048 .set_suspend_disable = wm8350_dcdc_set_suspend_disable,
1049 .set_suspend_mode = wm8350_dcdc_set_suspend_mode,
1052 static struct regulator_ops wm8350_dcdc2_5_ops = {
1053 .enable = regulator_enable_regmap,
1054 .disable = regulator_disable_regmap,
1055 .is_enabled = regulator_is_enabled_regmap,
1056 .set_suspend_enable = wm8350_dcdc25_set_suspend_enable,
1057 .set_suspend_disable = wm8350_dcdc25_set_suspend_disable,
1060 static struct regulator_ops wm8350_ldo_ops = {
1061 .set_voltage = wm8350_ldo_set_voltage,
1062 .get_voltage_sel = regulator_get_voltage_sel_regmap,
1063 .list_voltage = wm8350_ldo_list_voltage,
1064 .enable = regulator_enable_regmap,
1065 .disable = regulator_disable_regmap,
1066 .is_enabled = regulator_is_enabled_regmap,
1067 .get_mode = wm8350_ldo_get_mode,
1068 .set_suspend_voltage = wm8350_ldo_set_suspend_voltage,
1069 .set_suspend_enable = wm8350_ldo_set_suspend_enable,
1070 .set_suspend_disable = wm8350_ldo_set_suspend_disable,
1073 static struct regulator_ops wm8350_isink_ops = {
1074 .set_current_limit = wm8350_isink_set_current,
1075 .get_current_limit = wm8350_isink_get_current,
1076 .enable = wm8350_isink_enable,
1077 .disable = wm8350_isink_disable,
1078 .is_enabled = wm8350_isink_is_enabled,
1079 .enable_time = wm8350_isink_enable_time,
1082 static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = {
1085 .id = WM8350_DCDC_1,
1086 .ops = &wm8350_dcdc_ops,
1087 .irq = WM8350_IRQ_UV_DC1,
1088 .type = REGULATOR_VOLTAGE,
1089 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1092 .vsel_reg = WM8350_DCDC1_CONTROL,
1093 .vsel_mask = WM8350_DC1_VSEL_MASK,
1094 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1095 .enable_mask = WM8350_DC1_ENA,
1096 .owner = THIS_MODULE,
1100 .id = WM8350_DCDC_2,
1101 .ops = &wm8350_dcdc2_5_ops,
1102 .irq = WM8350_IRQ_UV_DC2,
1103 .type = REGULATOR_VOLTAGE,
1104 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1105 .enable_mask = WM8350_DC2_ENA,
1106 .owner = THIS_MODULE,
1110 .id = WM8350_DCDC_3,
1111 .ops = &wm8350_dcdc_ops,
1112 .irq = WM8350_IRQ_UV_DC3,
1113 .type = REGULATOR_VOLTAGE,
1114 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1117 .vsel_reg = WM8350_DCDC3_CONTROL,
1118 .vsel_mask = WM8350_DC3_VSEL_MASK,
1119 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1120 .enable_mask = WM8350_DC3_ENA,
1121 .owner = THIS_MODULE,
1125 .id = WM8350_DCDC_4,
1126 .ops = &wm8350_dcdc_ops,
1127 .irq = WM8350_IRQ_UV_DC4,
1128 .type = REGULATOR_VOLTAGE,
1129 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1130 .vsel_reg = WM8350_DCDC4_CONTROL,
1131 .vsel_mask = WM8350_DC4_VSEL_MASK,
1132 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1133 .enable_mask = WM8350_DC4_ENA,
1134 .owner = THIS_MODULE,
1138 .id = WM8350_DCDC_5,
1139 .ops = &wm8350_dcdc2_5_ops,
1140 .irq = WM8350_IRQ_UV_DC5,
1141 .type = REGULATOR_VOLTAGE,
1142 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1143 .enable_mask = WM8350_DC5_ENA,
1144 .owner = THIS_MODULE,
1148 .id = WM8350_DCDC_6,
1149 .ops = &wm8350_dcdc_ops,
1150 .irq = WM8350_IRQ_UV_DC6,
1151 .type = REGULATOR_VOLTAGE,
1152 .n_voltages = WM8350_DCDC_MAX_VSEL + 1,
1155 .vsel_reg = WM8350_DCDC6_CONTROL,
1156 .vsel_mask = WM8350_DC6_VSEL_MASK,
1157 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1158 .enable_mask = WM8350_DC6_ENA,
1159 .owner = THIS_MODULE,
1164 .ops = &wm8350_ldo_ops,
1165 .irq = WM8350_IRQ_UV_LDO1,
1166 .type = REGULATOR_VOLTAGE,
1167 .n_voltages = WM8350_LDO1_VSEL_MASK + 1,
1168 .vsel_reg = WM8350_LDO1_CONTROL,
1169 .vsel_mask = WM8350_LDO1_VSEL_MASK,
1170 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1171 .enable_mask = WM8350_LDO1_ENA,
1172 .owner = THIS_MODULE,
1177 .ops = &wm8350_ldo_ops,
1178 .irq = WM8350_IRQ_UV_LDO2,
1179 .type = REGULATOR_VOLTAGE,
1180 .n_voltages = WM8350_LDO2_VSEL_MASK + 1,
1181 .vsel_reg = WM8350_LDO2_CONTROL,
1182 .vsel_mask = WM8350_LDO2_VSEL_MASK,
1183 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1184 .enable_mask = WM8350_LDO2_ENA,
1185 .owner = THIS_MODULE,
1190 .ops = &wm8350_ldo_ops,
1191 .irq = WM8350_IRQ_UV_LDO3,
1192 .type = REGULATOR_VOLTAGE,
1193 .n_voltages = WM8350_LDO3_VSEL_MASK + 1,
1194 .vsel_reg = WM8350_LDO3_CONTROL,
1195 .vsel_mask = WM8350_LDO3_VSEL_MASK,
1196 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1197 .enable_mask = WM8350_LDO3_ENA,
1198 .owner = THIS_MODULE,
1203 .ops = &wm8350_ldo_ops,
1204 .irq = WM8350_IRQ_UV_LDO4,
1205 .type = REGULATOR_VOLTAGE,
1206 .n_voltages = WM8350_LDO4_VSEL_MASK + 1,
1207 .vsel_reg = WM8350_LDO4_CONTROL,
1208 .vsel_mask = WM8350_LDO4_VSEL_MASK,
1209 .enable_reg = WM8350_DCDC_LDO_REQUESTED,
1210 .enable_mask = WM8350_LDO4_ENA,
1211 .owner = THIS_MODULE,
1215 .id = WM8350_ISINK_A,
1216 .ops = &wm8350_isink_ops,
1217 .irq = WM8350_IRQ_CS1,
1218 .type = REGULATOR_CURRENT,
1219 .owner = THIS_MODULE,
1223 .id = WM8350_ISINK_B,
1224 .ops = &wm8350_isink_ops,
1225 .irq = WM8350_IRQ_CS2,
1226 .type = REGULATOR_CURRENT,
1227 .owner = THIS_MODULE,
1231 static irqreturn_t pmic_uv_handler(int irq, void *data)
1233 struct regulator_dev *rdev = (struct regulator_dev *)data;
1234 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1236 mutex_lock(&rdev->mutex);
1237 if (irq == WM8350_IRQ_CS1 || irq == WM8350_IRQ_CS2)
1238 regulator_notifier_call_chain(rdev,
1239 REGULATOR_EVENT_REGULATION_OUT,
1242 regulator_notifier_call_chain(rdev,
1243 REGULATOR_EVENT_UNDER_VOLTAGE,
1245 mutex_unlock(&rdev->mutex);
1250 static int wm8350_regulator_probe(struct platform_device *pdev)
1252 struct wm8350 *wm8350 = dev_get_drvdata(&pdev->dev);
1253 struct regulator_config config = { };
1254 struct regulator_dev *rdev;
1258 if (pdev->id < WM8350_DCDC_1 || pdev->id > WM8350_ISINK_B)
1261 /* do any regulatior specific init */
1264 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
1265 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1268 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
1269 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1272 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
1273 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1276 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
1277 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1281 config.dev = &pdev->dev;
1282 config.init_data = pdev->dev.platform_data;
1283 config.driver_data = dev_get_drvdata(&pdev->dev);
1284 config.regmap = wm8350->regmap;
1286 /* register regulator */
1287 rdev = regulator_register(&wm8350_reg[pdev->id], &config);
1289 dev_err(&pdev->dev, "failed to register %s\n",
1290 wm8350_reg[pdev->id].name);
1291 return PTR_ERR(rdev);
1294 /* register regulator IRQ */
1295 ret = wm8350_register_irq(wm8350, wm8350_reg[pdev->id].irq,
1296 pmic_uv_handler, 0, "UV", rdev);
1298 regulator_unregister(rdev);
1299 dev_err(&pdev->dev, "failed to register regulator %s IRQ\n",
1300 wm8350_reg[pdev->id].name);
1307 static int wm8350_regulator_remove(struct platform_device *pdev)
1309 struct regulator_dev *rdev = platform_get_drvdata(pdev);
1310 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1312 wm8350_free_irq(wm8350, wm8350_reg[pdev->id].irq, rdev);
1314 regulator_unregister(rdev);
1319 int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
1320 struct regulator_init_data *initdata)
1322 struct platform_device *pdev;
1324 if (reg < 0 || reg >= NUM_WM8350_REGULATORS)
1327 if (wm8350->pmic.pdev[reg])
1330 if (reg >= WM8350_DCDC_1 && reg <= WM8350_DCDC_6 &&
1331 reg > wm8350->pmic.max_dcdc)
1333 if (reg >= WM8350_ISINK_A && reg <= WM8350_ISINK_B &&
1334 reg > wm8350->pmic.max_isink)
1337 pdev = platform_device_alloc("wm8350-regulator", reg);
1341 wm8350->pmic.pdev[reg] = pdev;
1343 initdata->driver_data = wm8350;
1345 pdev->dev.platform_data = initdata;
1346 pdev->dev.parent = wm8350->dev;
1347 platform_set_drvdata(pdev, wm8350);
1349 ret = platform_device_add(pdev);
1352 dev_err(wm8350->dev, "Failed to register regulator %d: %d\n",
1354 platform_device_put(pdev);
1355 wm8350->pmic.pdev[reg] = NULL;
1360 EXPORT_SYMBOL_GPL(wm8350_register_regulator);
1363 * wm8350_register_led - Register a WM8350 LED output
1365 * @param wm8350 The WM8350 device to configure.
1366 * @param lednum LED device index to create.
1367 * @param dcdc The DCDC to use for the LED.
1368 * @param isink The ISINK to use for the LED.
1369 * @param pdata Configuration for the LED.
1371 * The WM8350 supports the use of an ISINK together with a DCDC to
1372 * provide a power-efficient LED driver. This function registers the
1373 * regulators and instantiates the platform device for a LED. The
1374 * operating modes for the LED regulators must be configured using
1375 * wm8350_isink_set_flash(), wm8350_dcdc25_set_mode() and
1376 * wm8350_dcdc_set_slot() prior to calling this function.
1378 int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
1379 struct wm8350_led_platform_data *pdata)
1381 struct wm8350_led *led;
1382 struct platform_device *pdev;
1385 if (lednum >= ARRAY_SIZE(wm8350->pmic.led) || lednum < 0) {
1386 dev_err(wm8350->dev, "Invalid LED index %d\n", lednum);
1390 led = &wm8350->pmic.led[lednum];
1393 dev_err(wm8350->dev, "LED %d already allocated\n", lednum);
1397 pdev = platform_device_alloc("wm8350-led", lednum);
1399 dev_err(wm8350->dev, "Failed to allocate LED %d\n", lednum);
1403 led->isink_consumer.dev_name = dev_name(&pdev->dev);
1404 led->isink_consumer.supply = "led_isink";
1405 led->isink_init.num_consumer_supplies = 1;
1406 led->isink_init.consumer_supplies = &led->isink_consumer;
1407 led->isink_init.constraints.min_uA = 0;
1408 led->isink_init.constraints.max_uA = pdata->max_uA;
1409 led->isink_init.constraints.valid_ops_mask
1410 = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS;
1411 led->isink_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1412 ret = wm8350_register_regulator(wm8350, isink, &led->isink_init);
1414 platform_device_put(pdev);
1418 led->dcdc_consumer.dev_name = dev_name(&pdev->dev);
1419 led->dcdc_consumer.supply = "led_vcc";
1420 led->dcdc_init.num_consumer_supplies = 1;
1421 led->dcdc_init.consumer_supplies = &led->dcdc_consumer;
1422 led->dcdc_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1423 led->dcdc_init.constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
1424 ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init);
1426 platform_device_put(pdev);
1431 case WM8350_ISINK_A:
1432 wm8350->pmic.isink_A_dcdc = dcdc;
1434 case WM8350_ISINK_B:
1435 wm8350->pmic.isink_B_dcdc = dcdc;
1439 pdev->dev.platform_data = pdata;
1440 pdev->dev.parent = wm8350->dev;
1441 ret = platform_device_add(pdev);
1443 dev_err(wm8350->dev, "Failed to register LED %d: %d\n",
1445 platform_device_put(pdev);
1453 EXPORT_SYMBOL_GPL(wm8350_register_led);
1455 static struct platform_driver wm8350_regulator_driver = {
1456 .probe = wm8350_regulator_probe,
1457 .remove = wm8350_regulator_remove,
1459 .name = "wm8350-regulator",
1463 static int __init wm8350_regulator_init(void)
1465 return platform_driver_register(&wm8350_regulator_driver);
1467 subsys_initcall(wm8350_regulator_init);
1469 static void __exit wm8350_regulator_exit(void)
1471 platform_driver_unregister(&wm8350_regulator_driver);
1473 module_exit(wm8350_regulator_exit);
1475 /* Module information */
1476 MODULE_AUTHOR("Liam Girdwood");
1477 MODULE_DESCRIPTION("WM8350 voltage and current regulator driver");
1478 MODULE_LICENSE("GPL");
1479 MODULE_ALIAS("platform:wm8350-regulator");