drivers/rtc/rtc-ds1307.c

   1 /*
   2  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
   3  *
   4  *  Copyright (C) 2005 James Chapman (ds1337 core)
   5  *  Copyright (C) 2006 David Brownell
   6  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support)
   7  *  Copyright (C) 2012 Bertrand Achard (nvram access fixes)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/bcd.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/rtc/ds1307.h>
  19 #include <linux/rtc.h>
  20 #include <linux/slab.h>
  21 #include <linux/string.h>
  22 #include <linux/hwmon.h>
  23 #include <linux/hwmon-sysfs.h>
  24 #include <linux/clk-provider.h>
  25
  26 /*
  27  * We can't determine type by probing, but if we expect pre-Linux code
  28  * to have set the chip up as a clock (turning on the oscillator and
  29  * setting the date and time), Linux can ignore the non-clock features.
  30  * That's a natural job for a factory or repair bench.
  31  */
  32 enum ds_type {
  33         ds_1307,
  34         ds_1337,
  35         ds_1338,
  36         ds_1339,
  37         ds_1340,
  38         ds_1388,
  39         ds_3231,
  40         m41t00,
  41         mcp794xx,
  42         rx_8025,
  43         last_ds_type /* always last */
  44         /* rs5c372 too?  different address... */
  45 };
  46
  47
  48 /* RTC registers don't differ much, except for the century flag */
  49 #define DS1307_REG_SECS         0x00    /* 00-59 */
  50 #       define DS1307_BIT_CH            0x80
  51 #       define DS1340_BIT_nEOSC         0x80
  52 #       define MCP794XX_BIT_ST          0x80
  53 #define DS1307_REG_MIN          0x01    /* 00-59 */
  54 #define DS1307_REG_HOUR         0x02    /* 00-23, or 1-12{am,pm} */
  55 #       define DS1307_BIT_12HR          0x40    /* in REG_HOUR */
  56 #       define DS1307_BIT_PM            0x20    /* in REG_HOUR */
  57 #       define DS1340_BIT_CENTURY_EN    0x80    /* in REG_HOUR */
  58 #       define DS1340_BIT_CENTURY       0x40    /* in REG_HOUR */
  59 #define DS1307_REG_WDAY         0x03    /* 01-07 */
  60 #       define MCP794XX_BIT_VBATEN      0x08
  61 #define DS1307_REG_MDAY         0x04    /* 01-31 */
  62 #define DS1307_REG_MONTH        0x05    /* 01-12 */
  63 #       define DS1337_BIT_CENTURY       0x80    /* in REG_MONTH */
  64 #define DS1307_REG_YEAR         0x06    /* 00-99 */
  65
  66 /*
  67  * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  68  * start at 7, and they differ a LOT. Only control and status matter for
  69  * basic RTC date and time functionality; be careful using them.
  70  */
  71 #define DS1307_REG_CONTROL      0x07            /* or ds1338 */
  72 #       define DS1307_BIT_OUT           0x80
  73 #       define DS1338_BIT_OSF           0x20
  74 #       define DS1307_BIT_SQWE          0x10
  75 #       define DS1307_BIT_RS1           0x02
  76 #       define DS1307_BIT_RS0           0x01
  77 #define DS1337_REG_CONTROL      0x0e
  78 #       define DS1337_BIT_nEOSC         0x80
  79 #       define DS1339_BIT_BBSQI         0x20
  80 #       define DS3231_BIT_BBSQW         0x40 /* same as BBSQI */
  81 #       define DS1337_BIT_RS2           0x10
  82 #       define DS1337_BIT_RS1           0x08
  83 #       define DS1337_BIT_INTCN         0x04
  84 #       define DS1337_BIT_A2IE          0x02
  85 #       define DS1337_BIT_A1IE          0x01
  86 #define DS1340_REG_CONTROL      0x07
  87 #       define DS1340_BIT_OUT           0x80
  88 #       define DS1340_BIT_FT            0x40
  89 #       define DS1340_BIT_CALIB_SIGN    0x20
  90 #       define DS1340_M_CALIBRATION     0x1f
  91 #define DS1340_REG_FLAG         0x09
  92 #       define DS1340_BIT_OSF           0x80
  93 #define DS1337_REG_STATUS       0x0f
  94 #       define DS1337_BIT_OSF           0x80
  95 #       define DS3231_BIT_EN32KHZ       0x08
  96 #       define DS1337_BIT_A2I           0x02
  97 #       define DS1337_BIT_A1I           0x01
  98 #define DS1339_REG_ALARM1_SECS  0x07
  99
 100 #define DS13XX_TRICKLE_CHARGER_MAGIC    0xa0
 101
 102 #define RX8025_REG_CTRL1        0x0e
 103 #       define RX8025_BIT_2412          0x20
 104 #define RX8025_REG_CTRL2        0x0f
 105 #       define RX8025_BIT_PON           0x10
 106 #       define RX8025_BIT_VDET          0x40
 107 #       define RX8025_BIT_XST           0x20
 108
 109
 110 struct ds1307 {
 111         u8                      offset; /* register's offset */
 112         u8                      regs[11];
 113         u16                     nvram_offset;
 114         struct bin_attribute    *nvram;
 115         enum ds_type            type;
 116         unsigned long           flags;
 117 #define HAS_NVRAM       0               /* bit 0 == sysfs file active */
 118 #define HAS_ALARM       1               /* bit 1 == irq claimed */
 119         struct i2c_client       *client;
 120         struct rtc_device       *rtc;
 121         s32 (*read_block_data)(const struct i2c_client *client, u8 command,
 122                                u8 length, u8 *values);
 123         s32 (*write_block_data)(const struct i2c_client *client, u8 command,
 124                                 u8 length, const u8 *values);
 125 #ifdef CONFIG_COMMON_CLK
 126         struct clk_hw           clks[2];
 127 #endif
 128 };
 129
 130 struct chip_desc {
 131         unsigned                alarm:1;
 132         u16                     nvram_offset;
 133         u16                     nvram_size;
 134         u16                     trickle_charger_reg;
 135         u8                      trickle_charger_setup;
 136         u8                      (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
 137 };
 138
 139 static u8 do_trickle_setup_ds1339(struct i2c_client *,
 140                                   uint32_t ohms, bool diode);
 141
 142 static struct chip_desc chips[last_ds_type] = {
 143         [ds_1307] = {
 144                 .nvram_offset   = 8,
 145                 .nvram_size     = 56,
 146         },
 147         [ds_1337] = {
 148                 .alarm          = 1,
 149         },
 150         [ds_1338] = {
 151                 .nvram_offset   = 8,
 152                 .nvram_size     = 56,
 153         },
 154         [ds_1339] = {
 155                 .alarm          = 1,
 156                 .trickle_charger_reg = 0x10,
 157                 .do_trickle_setup = &do_trickle_setup_ds1339,
 158         },
 159         [ds_1340] = {
 160                 .trickle_charger_reg = 0x08,
 161         },
 162         [ds_1388] = {
 163                 .trickle_charger_reg = 0x0a,
 164         },
 165         [ds_3231] = {
 166                 .alarm          = 1,
 167         },
 168         [mcp794xx] = {
 169                 .alarm          = 1,
 170                 /* this is battery backed SRAM */
 171                 .nvram_offset   = 0x20,
 172                 .nvram_size     = 0x40,
 173         },
 174 };
 175
 176 static const struct i2c_device_id ds1307_id[] = {
 177         { "ds1307", ds_1307 },
 178         { "ds1337", ds_1337 },
 179         { "ds1338", ds_1338 },
 180         { "ds1339", ds_1339 },
 181         { "ds1388", ds_1388 },
 182         { "ds1340", ds_1340 },
 183         { "ds3231", ds_3231 },
 184         { "m41t00", m41t00 },
 185         { "mcp7940x", mcp794xx },
 186         { "mcp7941x", mcp794xx },
 187         { "pt7c4338", ds_1307 },
 188         { "rx8025", rx_8025 },
 189         { }
 190 };
 191 MODULE_DEVICE_TABLE(i2c, ds1307_id);
 192
 193 /*----------------------------------------------------------------------*/
 194
 195 #define BLOCK_DATA_MAX_TRIES 10
 196
 197 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
 198                                        u8 command, u8 length, u8 *values)
 199 {
 200         s32 i, data;
 201
 202         for (i = 0; i < length; i++) {
 203                 data = i2c_smbus_read_byte_data(client, command + i);
 204                 if (data < 0)
 205                         return data;
 206                 values[i] = data;
 207         }
 208         return i;
 209 }
 210
 211 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
 212                                   u8 length, u8 *values)
 213 {
 214         u8 oldvalues[255];
 215         s32 ret;
 216         int tries = 0;
 217
 218         dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
 219         ret = ds1307_read_block_data_once(client, command, length, values);
 220         if (ret < 0)
 221                 return ret;
 222         do {
 223                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 224                         dev_err(&client->dev,
 225                                 "ds1307_read_block_data failed\n");
 226                         return -EIO;
 227                 }
 228                 memcpy(oldvalues, values, length);
 229                 ret = ds1307_read_block_data_once(client, command, length,
 230                                                   values);
 231                 if (ret < 0)
 232                         return ret;
 233         } while (memcmp(oldvalues, values, length));
 234         return length;
 235 }
 236
 237 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
 238                                    u8 length, const u8 *values)
 239 {
 240         u8 currvalues[255];
 241         int tries = 0;
 242
 243         dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
 244         do {
 245                 s32 i, ret;
 246
 247                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 248                         dev_err(&client->dev,
 249                                 "ds1307_write_block_data failed\n");
 250                         return -EIO;
 251                 }
 252                 for (i = 0; i < length; i++) {
 253                         ret = i2c_smbus_write_byte_data(client, command + i,
 254                                                         values[i]);
 255                         if (ret < 0)
 256                                 return ret;
 257                 }
 258                 ret = ds1307_read_block_data_once(client, command, length,
 259                                                   currvalues);
 260                 if (ret < 0)
 261                         return ret;
 262         } while (memcmp(currvalues, values, length));
 263         return length;
 264 }
 265
 266 /*----------------------------------------------------------------------*/
 267
 268 /* These RTC devices are not designed to be connected to a SMbus adapter.
 269    SMbus limits block operations length to 32 bytes, whereas it's not
 270    limited on I2C buses. As a result, accesses may exceed 32 bytes;
 271    in that case, split them into smaller blocks */
 272
 273 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
 274                                 u8 command, u8 length, const u8 *values)
 275 {
 276         u8 suboffset = 0;
 277
 278         if (length <= I2C_SMBUS_BLOCK_MAX) {
 279                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 280                                         command, length, values);
 281                 if (retval < 0)
 282                         return retval;
 283                 return length;
 284         }
 285
 286         while (suboffset < length) {
 287                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 288                                 command + suboffset,
 289                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 290                                 values + suboffset);
 291                 if (retval < 0)
 292                         return retval;
 293
 294                 suboffset += I2C_SMBUS_BLOCK_MAX;
 295         }
 296         return length;
 297 }
 298
 299 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
 300                                 u8 command, u8 length, u8 *values)
 301 {
 302         u8 suboffset = 0;
 303
 304         if (length <= I2C_SMBUS_BLOCK_MAX)
 305                 return i2c_smbus_read_i2c_block_data(client,
 306                                         command, length, values);
 307
 308         while (suboffset < length) {
 309                 s32 retval = i2c_smbus_read_i2c_block_data(client,
 310                                 command + suboffset,
 311                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 312                                 values + suboffset);
 313                 if (retval < 0)
 314                         return retval;
 315
 316                 suboffset += I2C_SMBUS_BLOCK_MAX;
 317         }
 318         return length;
 319 }
 320
 321 /*----------------------------------------------------------------------*/
 322
 323 /*
 324  * The ds1337 and ds1339 both have two alarms, but we only use the first
 325  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
 326  * signal; ds1339 chips have only one alarm signal.
 327  */
 328 static irqreturn_t ds1307_irq(int irq, void *dev_id)
 329 {
 330         struct i2c_client       *client = dev_id;
 331         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 332         struct mutex            *lock = &ds1307->rtc->ops_lock;
 333         int                     stat, control;
 334
 335         mutex_lock(lock);
 336         stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
 337         if (stat < 0)
 338                 goto out;
 339
 340         if (stat & DS1337_BIT_A1I) {
 341                 stat &= ~DS1337_BIT_A1I;
 342                 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
 343
 344                 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 345                 if (control < 0)
 346                         goto out;
 347
 348                 control &= ~DS1337_BIT_A1IE;
 349                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 350
 351                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 352         }
 353
 354 out:
 355         mutex_unlock(lock);
 356
 357         return IRQ_HANDLED;
 358 }
 359
 360 /*----------------------------------------------------------------------*/
 361
 362 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 363 {
 364         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 365         int             tmp;
 366
 367         /* read the RTC date and time registers all at once */
 368         tmp = ds1307->read_block_data(ds1307->client,
 369                 ds1307->offset, 7, ds1307->regs);
 370         if (tmp != 7) {
 371                 dev_err(dev, "%s error %d\n", "read", tmp);
 372                 return -EIO;
 373         }
 374
 375         dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
 376
 377         t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
 378         t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
 379         tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
 380         t->tm_hour = bcd2bin(tmp);
 381         t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
 382         t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
 383         tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
 384         t->tm_mon = bcd2bin(tmp) - 1;
 385
 386         /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
 387         t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
 388
 389         dev_dbg(dev, "%s secs=%d, mins=%d, "
 390                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 391                 "read", t->tm_sec, t->tm_min,
 392                 t->tm_hour, t->tm_mday,
 393                 t->tm_mon, t->tm_year, t->tm_wday);
 394
 395         /* initial clock setting can be undefined */
 396         return rtc_valid_tm(t);
 397 }
 398
 399 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
 400 {
 401         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 402         int             result;
 403         int             tmp;
 404         u8              *buf = ds1307->regs;
 405
 406         dev_dbg(dev, "%s secs=%d, mins=%d, "
 407                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 408                 "write", t->tm_sec, t->tm_min,
 409                 t->tm_hour, t->tm_mday,
 410                 t->tm_mon, t->tm_year, t->tm_wday);
 411
 412         buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
 413         buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
 414         buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
 415         buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
 416         buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
 417         buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
 418
 419         /* assume 20YY not 19YY */
 420         tmp = t->tm_year - 100;
 421         buf[DS1307_REG_YEAR] = bin2bcd(tmp);
 422
 423         switch (ds1307->type) {
 424         case ds_1337:
 425         case ds_1339:
 426         case ds_3231:
 427                 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
 428                 break;
 429         case ds_1340:
 430                 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
 431                                 | DS1340_BIT_CENTURY;
 432                 break;
 433         case mcp794xx:
 434                 /*
 435                  * these bits were cleared when preparing the date/time
 436                  * values and need to be set again before writing the
 437                  * buffer out to the device.
 438                  */
 439                 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
 440                 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
 441                 break;
 442         default:
 443                 break;
 444         }
 445
 446         dev_dbg(dev, "%s: %7ph\n", "write", buf);
 447
 448         result = ds1307->write_block_data(ds1307->client,
 449                 ds1307->offset, 7, buf);
 450         if (result < 0) {
 451                 dev_err(dev, "%s error %d\n", "write", result);
 452                 return result;
 453         }
 454         return 0;
 455 }
 456
 457 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 458 {
 459         struct i2c_client       *client = to_i2c_client(dev);
 460         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 461         int                     ret;
 462
 463         if (!test_bit(HAS_ALARM, &ds1307->flags))
 464                 return -EINVAL;
 465
 466         /* read all ALARM1, ALARM2, and status registers at once */
 467         ret = ds1307->read_block_data(client,
 468                         DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
 469         if (ret != 9) {
 470                 dev_err(dev, "%s error %d\n", "alarm read", ret);
 471                 return -EIO;
 472         }
 473
 474         dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
 475                 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
 476
 477         /*
 478          * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
 479          * and that all four fields are checked matches
 480          */
 481         t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
 482         t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
 483         t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
 484         t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
 485         t->time.tm_mon = -1;
 486         t->time.tm_year = -1;
 487         t->time.tm_wday = -1;
 488         t->time.tm_yday = -1;
 489         t->time.tm_isdst = -1;
 490
 491         /* ... and status */
 492         t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
 493         t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
 494
 495         dev_dbg(dev, "%s secs=%d, mins=%d, "
 496                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 497                 "alarm read", t->time.tm_sec, t->time.tm_min,
 498                 t->time.tm_hour, t->time.tm_mday,
 499                 t->enabled, t->pending);
 500
 501         return 0;
 502 }
 503
 504 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 505 {
 506         struct i2c_client       *client = to_i2c_client(dev);
 507         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 508         unsigned char           *buf = ds1307->regs;
 509         u8                      control, status;
 510         int                     ret;
 511
 512         if (!test_bit(HAS_ALARM, &ds1307->flags))
 513                 return -EINVAL;
 514
 515         dev_dbg(dev, "%s secs=%d, mins=%d, "
 516                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 517                 "alarm set", t->time.tm_sec, t->time.tm_min,
 518                 t->time.tm_hour, t->time.tm_mday,
 519                 t->enabled, t->pending);
 520
 521         /* read current status of both alarms and the chip */
 522         ret = ds1307->read_block_data(client,
 523                         DS1339_REG_ALARM1_SECS, 9, buf);
 524         if (ret != 9) {
 525                 dev_err(dev, "%s error %d\n", "alarm write", ret);
 526                 return -EIO;
 527         }
 528         control = ds1307->regs[7];
 529         status = ds1307->regs[8];
 530
 531         dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
 532                 &ds1307->regs[0], &ds1307->regs[4], control, status);
 533
 534         /* set ALARM1, using 24 hour and day-of-month modes */
 535         buf[0] = bin2bcd(t->time.tm_sec);
 536         buf[1] = bin2bcd(t->time.tm_min);
 537         buf[2] = bin2bcd(t->time.tm_hour);
 538         buf[3] = bin2bcd(t->time.tm_mday);
 539
 540         /* set ALARM2 to non-garbage */
 541         buf[4] = 0;
 542         buf[5] = 0;
 543         buf[6] = 0;
 544
 545         /* disable alarms */
 546         buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
 547         buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
 548
 549         ret = ds1307->write_block_data(client,
 550                         DS1339_REG_ALARM1_SECS, 9, buf);
 551         if (ret < 0) {
 552                 dev_err(dev, "can't set alarm time\n");
 553                 return ret;
 554         }
 555
 556         /* optionally enable ALARM1 */
 557         if (t->enabled) {
 558                 dev_dbg(dev, "alarm IRQ armed\n");
 559                 buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
 560                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
 561         }
 562
 563         return 0;
 564 }
 565
 566 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
 567 {
 568         struct i2c_client       *client = to_i2c_client(dev);
 569         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 570         int                     ret;
 571
 572         if (!test_bit(HAS_ALARM, &ds1307->flags))
 573                 return -ENOTTY;
 574
 575         ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 576         if (ret < 0)
 577                 return ret;
 578
 579         if (enabled)
 580                 ret |= DS1337_BIT_A1IE;
 581         else
 582                 ret &= ~DS1337_BIT_A1IE;
 583
 584         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
 585         if (ret < 0)
 586                 return ret;
 587
 588         return 0;
 589 }
 590
 591 static const struct rtc_class_ops ds13xx_rtc_ops = {
 592         .read_time      = ds1307_get_time,
 593         .set_time       = ds1307_set_time,
 594         .read_alarm     = ds1337_read_alarm,
 595         .set_alarm      = ds1337_set_alarm,
 596         .alarm_irq_enable = ds1307_alarm_irq_enable,
 597 };
 598
 599 /*----------------------------------------------------------------------*/
 600
 601 /*
 602  * Alarm support for mcp794xx devices.
 603  */
 604
 605 #define MCP794XX_REG_WEEKDAY            0x3
 606 #define MCP794XX_REG_WEEKDAY_WDAY_MASK  0x7
 607 #define MCP794XX_REG_CONTROL            0x07
 608 #       define MCP794XX_BIT_ALM0_EN     0x10
 609 #       define MCP794XX_BIT_ALM1_EN     0x20
 610 #define MCP794XX_REG_ALARM0_BASE        0x0a
 611 #define MCP794XX_REG_ALARM0_CTRL        0x0d
 612 #define MCP794XX_REG_ALARM1_BASE        0x11
 613 #define MCP794XX_REG_ALARM1_CTRL        0x14
 614 #       define MCP794XX_BIT_ALMX_IF     (1 << 3)
 615 #       define MCP794XX_BIT_ALMX_C0     (1 << 4)
 616 #       define MCP794XX_BIT_ALMX_C1     (1 << 5)
 617 #       define MCP794XX_BIT_ALMX_C2     (1 << 6)
 618 #       define MCP794XX_BIT_ALMX_POL    (1 << 7)
 619 #       define MCP794XX_MSK_ALMX_MATCH  (MCP794XX_BIT_ALMX_C0 | \
 620                                          MCP794XX_BIT_ALMX_C1 | \
 621                                          MCP794XX_BIT_ALMX_C2)
 622
 623 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
 624 {
 625         struct i2c_client       *client = dev_id;
 626         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 627         struct mutex            *lock = &ds1307->rtc->ops_lock;
 628         int reg, ret;
 629
 630         mutex_lock(lock);
 631
 632         /* Check and clear alarm 0 interrupt flag. */
 633         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
 634         if (reg < 0)
 635                 goto out;
 636         if (!(reg & MCP794XX_BIT_ALMX_IF))
 637                 goto out;
 638         reg &= ~MCP794XX_BIT_ALMX_IF;
 639         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
 640         if (ret < 0)
 641                 goto out;
 642
 643         /* Disable alarm 0. */
 644         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 645         if (reg < 0)
 646                 goto out;
 647         reg &= ~MCP794XX_BIT_ALM0_EN;
 648         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 649         if (ret < 0)
 650                 goto out;
 651
 652         rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 653
 654 out:
 655         mutex_unlock(lock);
 656
 657         return IRQ_HANDLED;
 658 }
 659
 660 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 661 {
 662         struct i2c_client *client = to_i2c_client(dev);
 663         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 664         u8 *regs = ds1307->regs;
 665         int ret;
 666
 667         if (!test_bit(HAS_ALARM, &ds1307->flags))
 668                 return -EINVAL;
 669
 670         /* Read control and alarm 0 registers. */
 671         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 672         if (ret < 0)
 673                 return ret;
 674
 675         t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
 676
 677         /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
 678         t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
 679         t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
 680         t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
 681         t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
 682         t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
 683         t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
 684         t->time.tm_year = -1;
 685         t->time.tm_yday = -1;
 686         t->time.tm_isdst = -1;
 687
 688         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 689                 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
 690                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 691                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
 692                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
 693                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
 694                 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
 695
 696         return 0;
 697 }
 698
 699 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 700 {
 701         struct i2c_client *client = to_i2c_client(dev);
 702         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 703         unsigned char *regs = ds1307->regs;
 704         int ret;
 705
 706         if (!test_bit(HAS_ALARM, &ds1307->flags))
 707                 return -EINVAL;
 708
 709         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 710                 "enabled=%d pending=%d\n", __func__,
 711                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 712                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
 713                 t->enabled, t->pending);
 714
 715         /* Read control and alarm 0 registers. */
 716         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 717         if (ret < 0)
 718                 return ret;
 719
 720         /* Set alarm 0, using 24-hour and day-of-month modes. */
 721         regs[3] = bin2bcd(t->time.tm_sec);
 722         regs[4] = bin2bcd(t->time.tm_min);
 723         regs[5] = bin2bcd(t->time.tm_hour);
 724         regs[6] = bin2bcd(t->time.tm_wday + 1);
 725         regs[7] = bin2bcd(t->time.tm_mday);
 726         regs[8] = bin2bcd(t->time.tm_mon + 1);
 727
 728         /* Clear the alarm 0 interrupt flag. */
 729         regs[6] &= ~MCP794XX_BIT_ALMX_IF;
 730         /* Set alarm match: second, minute, hour, day, date, month. */
 731         regs[6] |= MCP794XX_MSK_ALMX_MATCH;
 732         /* Disable interrupt. We will not enable until completely programmed */
 733         regs[0] &= ~MCP794XX_BIT_ALM0_EN;
 734
 735         ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 736         if (ret < 0)
 737                 return ret;
 738
 739         if (!t->enabled)
 740                 return 0;
 741         regs[0] |= MCP794XX_BIT_ALM0_EN;
 742         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
 743 }
 744
 745 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
 746 {
 747         struct i2c_client *client = to_i2c_client(dev);
 748         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 749         int reg;
 750
 751         if (!test_bit(HAS_ALARM, &ds1307->flags))
 752                 return -EINVAL;
 753
 754         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 755         if (reg < 0)
 756                 return reg;
 757
 758         if (enabled)
 759                 reg |= MCP794XX_BIT_ALM0_EN;
 760         else
 761                 reg &= ~MCP794XX_BIT_ALM0_EN;
 762
 763         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 764 }
 765
 766 static const struct rtc_class_ops mcp794xx_rtc_ops = {
 767         .read_time      = ds1307_get_time,
 768         .set_time       = ds1307_set_time,
 769         .read_alarm     = mcp794xx_read_alarm,
 770         .set_alarm      = mcp794xx_set_alarm,
 771         .alarm_irq_enable = mcp794xx_alarm_irq_enable,
 772 };
 773
 774 /*----------------------------------------------------------------------*/
 775
 776 static ssize_t
 777 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
 778                 struct bin_attribute *attr,
 779                 char *buf, loff_t off, size_t count)
 780 {
 781         struct i2c_client       *client;
 782         struct ds1307           *ds1307;
 783         int                     result;
 784
 785         client = kobj_to_i2c_client(kobj);
 786         ds1307 = i2c_get_clientdata(client);
 787
 788         result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
 789                                                                 count, buf);
 790         if (result < 0)
 791                 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
 792         return result;
 793 }
 794
 795 static ssize_t
 796 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
 797                 struct bin_attribute *attr,
 798                 char *buf, loff_t off, size_t count)
 799 {
 800         struct i2c_client       *client;
 801         struct ds1307           *ds1307;
 802         int                     result;
 803
 804         client = kobj_to_i2c_client(kobj);
 805         ds1307 = i2c_get_clientdata(client);
 806
 807         result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
 808                                                                 count, buf);
 809         if (result < 0) {
 810                 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
 811                 return result;
 812         }
 813         return count;
 814 }
 815
 816
 817 /*----------------------------------------------------------------------*/
 818
 819 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
 820                                   uint32_t ohms, bool diode)
 821 {
 822         u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
 823                 DS1307_TRICKLE_CHARGER_NO_DIODE;
 824
 825         switch (ohms) {
 826         case 250:
 827                 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
 828                 break;
 829         case 2000:
 830                 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
 831                 break;
 832         case 4000:
 833                 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
 834                 break;
 835         default:
 836                 dev_warn(&client->dev,
 837                          "Unsupported ohm value %u in dt\n", ohms);
 838                 return 0;
 839         }
 840         return setup;
 841 }
 842
 843 static void ds1307_trickle_of_init(struct i2c_client *client,
 844                                    struct chip_desc *chip)
 845 {
 846         uint32_t ohms = 0;
 847         bool diode = true;
 848
 849         if (!chip->do_trickle_setup)
 850                 goto out;
 851         if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
 852                 goto out;
 853         if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
 854                 diode = false;
 855         chip->trickle_charger_setup = chip->do_trickle_setup(client,
 856                                                              ohms, diode);
 857 out:
 858         return;
 859 }
 860
 861 /*----------------------------------------------------------------------*/
 862
 863 #ifdef CONFIG_RTC_DRV_DS1307_HWMON
 864
 865 /*
 866  * Temperature sensor support for ds3231 devices.
 867  */
 868
 869 #define DS3231_REG_TEMPERATURE  0x11
 870
 871 /*
 872  * A user-initiated temperature conversion is not started by this function,
 873  * so the temperature is updated once every 64 seconds.
 874  */
 875 static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
 876 {
 877         struct ds1307 *ds1307 = dev_get_drvdata(dev);
 878         u8 temp_buf[2];
 879         s16 temp;
 880         int ret;
 881
 882         ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
 883                                         sizeof(temp_buf), temp_buf);
 884         if (ret < 0)
 885                 return ret;
 886         if (ret != sizeof(temp_buf))
 887                 return -EIO;
 888
 889         /*
 890          * Temperature is represented as a 10-bit code with a resolution of
 891          * 0.25 degree celsius and encoded in two's complement format.
 892          */
 893         temp = (temp_buf[0] << 8) | temp_buf[1];
 894         temp >>= 6;
 895         *mC = temp * 250;
 896
 897         return 0;
 898 }
 899
 900 static ssize_t ds3231_hwmon_show_temp(struct device *dev,
 901                                 struct device_attribute *attr, char *buf)
 902 {
 903         int ret;
 904         s32 temp;
 905
 906         ret = ds3231_hwmon_read_temp(dev, &temp);
 907         if (ret)
 908                 return ret;
 909
 910         return sprintf(buf, "%d\n", temp);
 911 }
 912 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
 913                         NULL, 0);
 914
 915 static struct attribute *ds3231_hwmon_attrs[] = {
 916         &sensor_dev_attr_temp1_input.dev_attr.attr,
 917         NULL,
 918 };
 919 ATTRIBUTE_GROUPS(ds3231_hwmon);
 920
 921 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 922 {
 923         struct device *dev;
 924
 925         if (ds1307->type != ds_3231)
 926                 return;
 927
 928         dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
 929                                                 ds1307->client->name,
 930                                                 ds1307, ds3231_hwmon_groups);
 931         if (IS_ERR(dev)) {
 932                 dev_warn(&ds1307->client->dev,
 933                         "unable to register hwmon device %ld\n", PTR_ERR(dev));
 934         }
 935 }
 936
 937 #else
 938
 939 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 940 {
 941 }
 942
 943 #endif /* CONFIG_RTC_DRV_DS1307_HWMON */
 944
 945 /*----------------------------------------------------------------------*/
 946
 947 /*
 948  * Square-wave output support for DS3231
 949  * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
 950  */
 951 #ifdef CONFIG_COMMON_CLK
 952
 953 enum {
 954         DS3231_CLK_SQW = 0,
 955         DS3231_CLK_32KHZ,
 956 };
 957
 958 #define clk_sqw_to_ds1307(clk)  \
 959         container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
 960 #define clk_32khz_to_ds1307(clk)        \
 961         container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
 962
 963 static int ds3231_clk_sqw_rates[] = {
 964         1,
 965         1024,
 966         4096,
 967         8192,
 968 };
 969
 970 static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
 971 {
 972         struct i2c_client *client = ds1307->client;
 973         struct mutex *lock = &ds1307->rtc->ops_lock;
 974         int control;
 975         int ret;
 976
 977         mutex_lock(lock);
 978
 979         control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 980         if (control < 0) {
 981                 ret = control;
 982                 goto out;
 983         }
 984
 985         control &= ~mask;
 986         control |= value;
 987
 988         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 989 out:
 990         mutex_unlock(lock);
 991
 992         return ret;
 993 }
 994
 995 static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
 996                                                 unsigned long parent_rate)
 997 {
 998         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
 999         int control;
1000         int rate_sel = 0;
1001
1002         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1003         if (control < 0)
1004                 return control;
1005         if (control & DS1337_BIT_RS1)
1006                 rate_sel += 1;
1007         if (control & DS1337_BIT_RS2)
1008                 rate_sel += 2;
1009
1010         return ds3231_clk_sqw_rates[rate_sel];
1011 }
1012
1013 static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1014                                         unsigned long *prate)
1015 {
1016         int i;
1017
1018         for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1019                 if (ds3231_clk_sqw_rates[i] <= rate)
1020                         return ds3231_clk_sqw_rates[i];
1021         }
1022
1023         return 0;
1024 }
1025
1026 static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1027                                         unsigned long parent_rate)
1028 {
1029         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1030         int control = 0;
1031         int rate_sel;
1032
1033         for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1034                         rate_sel++) {
1035                 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1036                         break;
1037         }
1038
1039         if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1040                 return -EINVAL;
1041
1042         if (rate_sel & 1)
1043                 control |= DS1337_BIT_RS1;
1044         if (rate_sel & 2)
1045                 control |= DS1337_BIT_RS2;
1046
1047         return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1048                                 control);
1049 }
1050
1051 static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1052 {
1053         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1054
1055         return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1056 }
1057
1058 static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1059 {
1060         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1061
1062         ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1063 }
1064
1065 static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1066 {
1067         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1068         int control;
1069
1070         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1071         if (control < 0)
1072                 return control;
1073
1074         return !(control & DS1337_BIT_INTCN);
1075 }
1076
1077 static const struct clk_ops ds3231_clk_sqw_ops = {
1078         .prepare = ds3231_clk_sqw_prepare,
1079         .unprepare = ds3231_clk_sqw_unprepare,
1080         .is_prepared = ds3231_clk_sqw_is_prepared,
1081         .recalc_rate = ds3231_clk_sqw_recalc_rate,
1082         .round_rate = ds3231_clk_sqw_round_rate,
1083         .set_rate = ds3231_clk_sqw_set_rate,
1084 };
1085
1086 static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1087                                                 unsigned long parent_rate)
1088 {
1089         return 32768;
1090 }
1091
1092 static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1093 {
1094         struct i2c_client *client = ds1307->client;
1095         struct mutex *lock = &ds1307->rtc->ops_lock;
1096         int status;
1097         int ret;
1098
1099         mutex_lock(lock);
1100
1101         status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1102         if (status < 0) {
1103                 ret = status;
1104                 goto out;
1105         }
1106
1107         if (enable)
1108                 status |= DS3231_BIT_EN32KHZ;
1109         else
1110                 status &= ~DS3231_BIT_EN32KHZ;
1111
1112         ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1113 out:
1114         mutex_unlock(lock);
1115
1116         return ret;
1117 }
1118
1119 static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1120 {
1121         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1122
1123         return ds3231_clk_32khz_control(ds1307, true);
1124 }
1125
1126 static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1127 {
1128         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1129
1130         ds3231_clk_32khz_control(ds1307, false);
1131 }
1132
1133 static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1134 {
1135         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1136         int status;
1137
1138         status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1139         if (status < 0)
1140                 return status;
1141
1142         return !!(status & DS3231_BIT_EN32KHZ);
1143 }
1144
1145 static const struct clk_ops ds3231_clk_32khz_ops = {
1146         .prepare = ds3231_clk_32khz_prepare,
1147         .unprepare = ds3231_clk_32khz_unprepare,
1148         .is_prepared = ds3231_clk_32khz_is_prepared,
1149         .recalc_rate = ds3231_clk_32khz_recalc_rate,
1150 };
1151
1152 static struct clk_init_data ds3231_clks_init[] = {
1153         [DS3231_CLK_SQW] = {
1154                 .name = "ds3231_clk_sqw",
1155                 .ops = &ds3231_clk_sqw_ops,
1156         },
1157         [DS3231_CLK_32KHZ] = {
1158                 .name = "ds3231_clk_32khz",
1159                 .ops = &ds3231_clk_32khz_ops,
1160         },
1161 };
1162
1163 static int ds3231_clks_register(struct ds1307 *ds1307)
1164 {
1165         struct i2c_client *client = ds1307->client;
1166         struct device_node *node = client->dev.of_node;
1167         struct clk_onecell_data *onecell;
1168         int i;
1169
1170         onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1171         if (!onecell)
1172                 return -ENOMEM;
1173
1174         onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1175         onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1176                                         sizeof(onecell->clks[0]), GFP_KERNEL);
1177         if (!onecell->clks)
1178                 return -ENOMEM;
1179
1180         for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1181                 struct clk_init_data init = ds3231_clks_init[i];
1182
1183                 /*
1184                  * Interrupt signal due to alarm conditions and square-wave
1185                  * output share same pin, so don't initialize both.
1186                  */
1187                 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1188                         continue;
1189
1190                 /* optional override of the clockname */
1191                 of_property_read_string_index(node, "clock-output-names", i,
1192                                                 &init.name);
1193                 ds1307->clks[i].init = &init;
1194
1195                 onecell->clks[i] = devm_clk_register(&client->dev,
1196                                                         &ds1307->clks[i]);
1197                 if (IS_ERR(onecell->clks[i]))
1198                         return PTR_ERR(onecell->clks[i]);
1199         }
1200
1201         if (!node)
1202                 return 0;
1203
1204         of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1205
1206         return 0;
1207 }
1208
1209 static void ds1307_clks_register(struct ds1307 *ds1307)
1210 {
1211         int ret;
1212
1213         if (ds1307->type != ds_3231)
1214                 return;
1215
1216         ret = ds3231_clks_register(ds1307);
1217         if (ret) {
1218                 dev_warn(&ds1307->client->dev,
1219                         "unable to register clock device %d\n", ret);
1220         }
1221 }
1222
1223 #else
1224
1225 static void ds1307_clks_register(struct ds1307 *ds1307)
1226 {
1227 }
1228
1229 #endif /* CONFIG_COMMON_CLK */
1230
1231 static int ds1307_probe(struct i2c_client *client,
1232                         const struct i2c_device_id *id)
1233 {
1234         struct ds1307           *ds1307;
1235         int                     err = -ENODEV;
1236         int                     tmp, wday;
1237         struct chip_desc        *chip = &chips[id->driver_data];
1238         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
1239         bool                    want_irq = false;
1240         bool                    ds1307_can_wakeup_device = false;
1241         unsigned char           *buf;
1242         struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
1243         struct rtc_time         tm;
1244         unsigned long           timestamp;
1245
1246         irq_handler_t   irq_handler = ds1307_irq;
1247
1248         static const int        bbsqi_bitpos[] = {
1249                 [ds_1337] = 0,
1250                 [ds_1339] = DS1339_BIT_BBSQI,
1251                 [ds_3231] = DS3231_BIT_BBSQW,
1252         };
1253         const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
1254
1255         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
1256             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
1257                 return -EIO;
1258
1259         ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
1260         if (!ds1307)
1261                 return -ENOMEM;
1262
1263         i2c_set_clientdata(client, ds1307);
1264
1265         ds1307->client  = client;
1266         ds1307->type    = id->driver_data;
1267
1268         if (!pdata && client->dev.of_node)
1269                 ds1307_trickle_of_init(client, chip);
1270         else if (pdata && pdata->trickle_charger_setup)
1271                 chip->trickle_charger_setup = pdata->trickle_charger_setup;
1272
1273         if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
1274                 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
1275                     DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
1276                     chip->trickle_charger_reg);
1277                 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
1278                     DS13XX_TRICKLE_CHARGER_MAGIC |
1279                     chip->trickle_charger_setup);
1280         }
1281
1282         buf = ds1307->regs;
1283         if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1284                 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
1285                 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
1286         } else {
1287                 ds1307->read_block_data = ds1307_read_block_data;
1288                 ds1307->write_block_data = ds1307_write_block_data;
1289         }
1290
1291 #ifdef CONFIG_OF
1292 /*
1293  * For devices with no IRQ directly connected to the SoC, the RTC chip
1294  * can be forced as a wakeup source by stating that explicitly in
1295  * the device's .dts file using the "wakeup-source" boolean property.
1296  * If the "wakeup-source" property is set, don't request an IRQ.
1297  * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1298  * if supported by the RTC.
1299  */
1300         if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1301                 ds1307_can_wakeup_device = true;
1302         }
1303 #endif
1304
1305         switch (ds1307->type) {
1306         case ds_1337:
1307         case ds_1339:
1308         case ds_3231:
1309                 /* get registers that the "rtc" read below won't read... */
1310                 tmp = ds1307->read_block_data(ds1307->client,
1311                                 DS1337_REG_CONTROL, 2, buf);
1312                 if (tmp != 2) {
1313                         dev_dbg(&client->dev, "read error %d\n", tmp);
1314                         err = -EIO;
1315                         goto exit;
1316                 }
1317
1318                 /* oscillator off?  turn it on, so clock can tick. */
1319                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
1320                         ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
1321
1322                 /*
1323                  * Using IRQ or defined as wakeup-source?
1324                  * Disable the square wave and both alarms.
1325                  * For some variants, be sure alarms can trigger when we're
1326                  * running on Vbackup (BBSQI/BBSQW)
1327                  */
1328                 if (chip->alarm && (ds1307->client->irq > 0 ||
1329                                                 ds1307_can_wakeup_device)) {
1330                         ds1307->regs[0] |= DS1337_BIT_INTCN
1331                                         | bbsqi_bitpos[ds1307->type];
1332                         ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
1333
1334                         want_irq = true;
1335                 }
1336
1337                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
1338                                                         ds1307->regs[0]);
1339
1340                 /* oscillator fault?  clear flag, and warn */
1341                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
1342                         i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
1343                                 ds1307->regs[1] & ~DS1337_BIT_OSF);
1344                         dev_warn(&client->dev, "SET TIME!\n");
1345                 }
1346                 break;
1347
1348         case rx_8025:
1349                 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1350                                 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1351                 if (tmp != 2) {
1352                         dev_dbg(&client->dev, "read error %d\n", tmp);
1353                         err = -EIO;
1354                         goto exit;
1355                 }
1356
1357                 /* oscillator off?  turn it on, so clock can tick. */
1358                 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
1359                         ds1307->regs[1] |= RX8025_BIT_XST;
1360                         i2c_smbus_write_byte_data(client,
1361                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1362                                                   ds1307->regs[1]);
1363                         dev_warn(&client->dev,
1364                                  "oscillator stop detected - SET TIME!\n");
1365                 }
1366
1367                 if (ds1307->regs[1] & RX8025_BIT_PON) {
1368                         ds1307->regs[1] &= ~RX8025_BIT_PON;
1369                         i2c_smbus_write_byte_data(client,
1370                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1371                                                   ds1307->regs[1]);
1372                         dev_warn(&client->dev, "power-on detected\n");
1373                 }
1374
1375                 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1376                         ds1307->regs[1] &= ~RX8025_BIT_VDET;
1377                         i2c_smbus_write_byte_data(client,
1378                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1379                                                   ds1307->regs[1]);
1380                         dev_warn(&client->dev, "voltage drop detected\n");
1381                 }
1382
1383                 /* make sure we are running in 24hour mode */
1384                 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1385                         u8 hour;
1386
1387                         /* switch to 24 hour mode */
1388                         i2c_smbus_write_byte_data(client,
1389                                                   RX8025_REG_CTRL1 << 4 | 0x08,
1390                                                   ds1307->regs[0] |
1391                                                   RX8025_BIT_2412);
1392
1393                         tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1394                                         RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1395                         if (tmp != 2) {
1396                                 dev_dbg(&client->dev, "read error %d\n", tmp);
1397                                 err = -EIO;
1398                                 goto exit;
1399                         }
1400
1401                         /* correct hour */
1402                         hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1403                         if (hour == 12)
1404                                 hour = 0;
1405                         if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1406                                 hour += 12;
1407
1408                         i2c_smbus_write_byte_data(client,
1409                                                   DS1307_REG_HOUR << 4 | 0x08,
1410                                                   hour);
1411                 }
1412                 break;
1413         case ds_1388:
1414                 ds1307->offset = 1; /* Seconds starts at 1 */
1415                 break;
1416         case mcp794xx:
1417                 rtc_ops = &mcp794xx_rtc_ops;
1418                 if (ds1307->client->irq > 0 && chip->alarm) {
1419                         irq_handler = mcp794xx_irq;
1420                         want_irq = true;
1421                 }
1422                 break;
1423         default:
1424                 break;
1425         }
1426
1427 read_rtc:
1428         /* read RTC registers */
1429         tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1430         if (tmp != 8) {
1431                 dev_dbg(&client->dev, "read error %d\n", tmp);
1432                 err = -EIO;
1433                 goto exit;
1434         }
1435
1436         /*
1437          * minimal sanity checking; some chips (like DS1340) don't
1438          * specify the extra bits as must-be-zero, but there are
1439          * still a few values that are clearly out-of-range.
1440          */
1441         tmp = ds1307->regs[DS1307_REG_SECS];
1442         switch (ds1307->type) {
1443         case ds_1307:
1444         case m41t00:
1445                 /* clock halted?  turn it on, so clock can tick. */
1446                 if (tmp & DS1307_BIT_CH) {
1447                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1448                         dev_warn(&client->dev, "SET TIME!\n");
1449                         goto read_rtc;
1450                 }
1451                 break;
1452         case ds_1338:
1453                 /* clock halted?  turn it on, so clock can tick. */
1454                 if (tmp & DS1307_BIT_CH)
1455                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1456
1457                 /* oscillator fault?  clear flag, and warn */
1458                 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1459                         i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1460                                         ds1307->regs[DS1307_REG_CONTROL]
1461                                         & ~DS1338_BIT_OSF);
1462                         dev_warn(&client->dev, "SET TIME!\n");
1463                         goto read_rtc;
1464                 }
1465                 break;
1466         case ds_1340:
1467                 /* clock halted?  turn it on, so clock can tick. */
1468                 if (tmp & DS1340_BIT_nEOSC)
1469                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1470
1471                 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1472                 if (tmp < 0) {
1473                         dev_dbg(&client->dev, "read error %d\n", tmp);
1474                         err = -EIO;
1475                         goto exit;
1476                 }
1477
1478                 /* oscillator fault?  clear flag, and warn */
1479                 if (tmp & DS1340_BIT_OSF) {
1480                         i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1481                         dev_warn(&client->dev, "SET TIME!\n");
1482                 }
1483                 break;
1484         case mcp794xx:
1485                 /* make sure that the backup battery is enabled */
1486                 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1487                         i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1488                                         ds1307->regs[DS1307_REG_WDAY]
1489                                         | MCP794XX_BIT_VBATEN);
1490                 }
1491
1492                 /* clock halted?  turn it on, so clock can tick. */
1493                 if (!(tmp & MCP794XX_BIT_ST)) {
1494                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1495                                         MCP794XX_BIT_ST);
1496                         dev_warn(&client->dev, "SET TIME!\n");
1497                         goto read_rtc;
1498                 }
1499
1500                 break;
1501         default:
1502                 break;
1503         }
1504
1505         tmp = ds1307->regs[DS1307_REG_HOUR];
1506         switch (ds1307->type) {
1507         case ds_1340:
1508         case m41t00:
1509                 /*
1510                  * NOTE: ignores century bits; fix before deploying
1511                  * systems that will run through year 2100.
1512                  */
1513                 break;
1514         case rx_8025:
1515                 break;
1516         default:
1517                 if (!(tmp & DS1307_BIT_12HR))
1518                         break;
1519
1520                 /*
1521                  * Be sure we're in 24 hour mode.  Multi-master systems
1522                  * take note...
1523                  */
1524                 tmp = bcd2bin(tmp & 0x1f);
1525                 if (tmp == 12)
1526                         tmp = 0;
1527                 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1528                         tmp += 12;
1529                 i2c_smbus_write_byte_data(client,
1530                                 ds1307->offset + DS1307_REG_HOUR,
1531                                 bin2bcd(tmp));
1532         }
1533
1534         /*
1535          * Some IPs have weekday reset value = 0x1 which might not correct
1536          * hence compute the wday using the current date/month/year values
1537          */
1538         ds1307_get_time(&client->dev, &tm);
1539         wday = tm.tm_wday;
1540         timestamp = rtc_tm_to_time64(&tm);
1541         rtc_time64_to_tm(timestamp, &tm);
1542
1543         /*
1544          * Check if reset wday is different from the computed wday
1545          * If different then set the wday which we computed using
1546          * timestamp
1547          */
1548         if (wday != tm.tm_wday) {
1549                 wday = i2c_smbus_read_byte_data(client, MCP794XX_REG_WEEKDAY);
1550                 wday = wday & ~MCP794XX_REG_WEEKDAY_WDAY_MASK;
1551                 wday = wday | (tm.tm_wday + 1);
1552                 i2c_smbus_write_byte_data(client, MCP794XX_REG_WEEKDAY, wday);
1553         }
1554
1555         if (want_irq) {
1556                 device_set_wakeup_capable(&client->dev, true);
1557                 set_bit(HAS_ALARM, &ds1307->flags);
1558         }
1559         ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1560                                 rtc_ops, THIS_MODULE);
1561         if (IS_ERR(ds1307->rtc)) {
1562                 return PTR_ERR(ds1307->rtc);
1563         }
1564
1565         if (ds1307_can_wakeup_device && ds1307->client->irq <= 0) {
1566                 /* Disable request for an IRQ */
1567                 want_irq = false;
1568                 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1569                 /* We cannot support UIE mode if we do not have an IRQ line */
1570                 ds1307->rtc->uie_unsupported = 1;
1571         }
1572
1573         if (want_irq) {
1574                 err = devm_request_threaded_irq(&client->dev,
1575                                                 client->irq, NULL, irq_handler,
1576                                                 IRQF_SHARED | IRQF_ONESHOT,
1577                                                 ds1307->rtc->name, client);
1578                 if (err) {
1579                         client->irq = 0;
1580                         device_set_wakeup_capable(&client->dev, false);
1581                         clear_bit(HAS_ALARM, &ds1307->flags);
1582                         dev_err(&client->dev, "unable to request IRQ!\n");
1583                 } else
1584                         dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1585         }
1586
1587         if (chip->nvram_size) {
1588
1589                 ds1307->nvram = devm_kzalloc(&client->dev,
1590                                         sizeof(struct bin_attribute),
1591                                         GFP_KERNEL);
1592                 if (!ds1307->nvram) {
1593                         dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1594                 } else {
1595
1596                         ds1307->nvram->attr.name = "nvram";
1597                         ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1598
1599                         sysfs_bin_attr_init(ds1307->nvram);
1600
1601                         ds1307->nvram->read = ds1307_nvram_read;
1602                         ds1307->nvram->write = ds1307_nvram_write;
1603                         ds1307->nvram->size = chip->nvram_size;
1604                         ds1307->nvram_offset = chip->nvram_offset;
1605
1606                         err = sysfs_create_bin_file(&client->dev.kobj,
1607                                                     ds1307->nvram);
1608                         if (err) {
1609                                 dev_err(&client->dev,
1610                                         "unable to create sysfs file: %s\n",
1611                                         ds1307->nvram->attr.name);
1612                         } else {
1613                                 set_bit(HAS_NVRAM, &ds1307->flags);
1614                                 dev_info(&client->dev, "%zu bytes nvram\n",
1615                                          ds1307->nvram->size);
1616                         }
1617                 }
1618         }
1619
1620         ds1307_hwmon_register(ds1307);
1621         ds1307_clks_register(ds1307);
1622
1623         return 0;
1624
1625 exit:
1626         return err;
1627 }
1628
1629 static int ds1307_remove(struct i2c_client *client)
1630 {
1631         struct ds1307 *ds1307 = i2c_get_clientdata(client);
1632
1633         if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1634                 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1635
1636         return 0;
1637 }
1638
1639 static struct i2c_driver ds1307_driver = {
1640         .driver = {
1641                 .name   = "rtc-ds1307",
1642         },
1643         .probe          = ds1307_probe,
1644         .remove         = ds1307_remove,
1645         .id_table       = ds1307_id,
1646 };
1647
1648 module_i2c_driver(ds1307_driver);
1649
1650 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1651 MODULE_LICENSE("GPL");