2 * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/rtc.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/interrupt.h>
17 #include <linux/platform_device.h>
18 #include <linux/clk.h>
20 #include <mach/hardware.h>
22 #define RTC_INPUT_CLK_32768HZ (0x00 << 5)
23 #define RTC_INPUT_CLK_32000HZ (0x01 << 5)
24 #define RTC_INPUT_CLK_38400HZ (0x02 << 5)
26 #define RTC_SW_BIT (1 << 0)
27 #define RTC_ALM_BIT (1 << 2)
28 #define RTC_1HZ_BIT (1 << 4)
29 #define RTC_2HZ_BIT (1 << 7)
30 #define RTC_SAM0_BIT (1 << 8)
31 #define RTC_SAM1_BIT (1 << 9)
32 #define RTC_SAM2_BIT (1 << 10)
33 #define RTC_SAM3_BIT (1 << 11)
34 #define RTC_SAM4_BIT (1 << 12)
35 #define RTC_SAM5_BIT (1 << 13)
36 #define RTC_SAM6_BIT (1 << 14)
37 #define RTC_SAM7_BIT (1 << 15)
38 #define PIT_ALL_ON (RTC_2HZ_BIT | RTC_SAM0_BIT | RTC_SAM1_BIT | \
39 RTC_SAM2_BIT | RTC_SAM3_BIT | RTC_SAM4_BIT | \
40 RTC_SAM5_BIT | RTC_SAM6_BIT | RTC_SAM7_BIT)
42 #define RTC_ENABLE_BIT (1 << 7)
45 #define MAX_PIE_FREQ 512
46 static const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = {
53 { 128, RTC_SAM5_BIT },
54 { 256, RTC_SAM6_BIT },
55 { MAX_PIE_FREQ, RTC_SAM7_BIT },
58 #define MXC_RTC_TIME 0
59 #define MXC_RTC_ALARM 1
61 #define RTC_HOURMIN 0x00 /* 32bit rtc hour/min counter reg */
62 #define RTC_SECOND 0x04 /* 32bit rtc seconds counter reg */
63 #define RTC_ALRM_HM 0x08 /* 32bit rtc alarm hour/min reg */
64 #define RTC_ALRM_SEC 0x0C /* 32bit rtc alarm seconds reg */
65 #define RTC_RTCCTL 0x10 /* 32bit rtc control reg */
66 #define RTC_RTCISR 0x14 /* 32bit rtc interrupt status reg */
67 #define RTC_RTCIENR 0x18 /* 32bit rtc interrupt enable reg */
68 #define RTC_STPWCH 0x1C /* 32bit rtc stopwatch min reg */
69 #define RTC_DAYR 0x20 /* 32bit rtc days counter reg */
70 #define RTC_DAYALARM 0x24 /* 32bit rtc day alarm reg */
71 #define RTC_TEST1 0x28 /* 32bit rtc test reg 1 */
72 #define RTC_TEST2 0x2C /* 32bit rtc test reg 2 */
73 #define RTC_TEST3 0x30 /* 32bit rtc test reg 3 */
75 struct rtc_plat_data {
76 struct rtc_device *rtc;
80 struct rtc_time g_rtc_alarm;
84 * This function is used to obtain the RTC time or the alarm value in
87 static u32 get_alarm_or_time(struct device *dev, int time_alarm)
89 struct platform_device *pdev = to_platform_device(dev);
90 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
91 void __iomem *ioaddr = pdata->ioaddr;
92 u32 day = 0, hr = 0, min = 0, sec = 0, hr_min = 0;
96 day = readw(ioaddr + RTC_DAYR);
97 hr_min = readw(ioaddr + RTC_HOURMIN);
98 sec = readw(ioaddr + RTC_SECOND);
101 day = readw(ioaddr + RTC_DAYALARM);
102 hr_min = readw(ioaddr + RTC_ALRM_HM) & 0xffff;
103 sec = readw(ioaddr + RTC_ALRM_SEC);
110 return (((day * 24 + hr) * 60) + min) * 60 + sec;
114 * This function sets the RTC alarm value or the time value.
116 static void set_alarm_or_time(struct device *dev, int time_alarm, u32 time)
118 u32 day, hr, min, sec, temp;
119 struct platform_device *pdev = to_platform_device(dev);
120 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
121 void __iomem *ioaddr = pdata->ioaddr;
126 /* time is within a day now */
130 /* time is within an hour now */
132 sec = time - min * 60;
134 temp = (hr << 8) + min;
136 switch (time_alarm) {
138 writew(day, ioaddr + RTC_DAYR);
139 writew(sec, ioaddr + RTC_SECOND);
140 writew(temp, ioaddr + RTC_HOURMIN);
143 writew(day, ioaddr + RTC_DAYALARM);
144 writew(sec, ioaddr + RTC_ALRM_SEC);
145 writew(temp, ioaddr + RTC_ALRM_HM);
151 * This function updates the RTC alarm registers and then clears all the
152 * interrupt status bits.
154 static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
156 struct rtc_time alarm_tm, now_tm;
157 unsigned long now, time;
159 struct platform_device *pdev = to_platform_device(dev);
160 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
161 void __iomem *ioaddr = pdata->ioaddr;
163 now = get_alarm_or_time(dev, MXC_RTC_TIME);
164 rtc_time_to_tm(now, &now_tm);
165 alarm_tm.tm_year = now_tm.tm_year;
166 alarm_tm.tm_mon = now_tm.tm_mon;
167 alarm_tm.tm_mday = now_tm.tm_mday;
168 alarm_tm.tm_hour = alrm->tm_hour;
169 alarm_tm.tm_min = alrm->tm_min;
170 alarm_tm.tm_sec = alrm->tm_sec;
171 rtc_tm_to_time(&now_tm, &now);
172 rtc_tm_to_time(&alarm_tm, &time);
175 time += 60 * 60 * 24;
176 rtc_time_to_tm(time, &alarm_tm);
179 ret = rtc_tm_to_time(&alarm_tm, &time);
181 /* clear all the interrupt status bits */
182 writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR);
183 set_alarm_or_time(dev, MXC_RTC_ALARM, time);
188 /* This function is the RTC interrupt service routine. */
189 static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id)
191 struct platform_device *pdev = dev_id;
192 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
193 void __iomem *ioaddr = pdata->ioaddr;
197 spin_lock_irq(&pdata->rtc->irq_lock);
198 status = readw(ioaddr + RTC_RTCISR) & readw(ioaddr + RTC_RTCIENR);
199 /* clear interrupt sources */
200 writew(status, ioaddr + RTC_RTCISR);
202 /* clear alarm interrupt if it has occurred */
203 if (status & RTC_ALM_BIT)
204 status &= ~RTC_ALM_BIT;
206 /* update irq data & counter */
207 if (status & RTC_ALM_BIT)
208 events |= (RTC_AF | RTC_IRQF);
210 if (status & RTC_1HZ_BIT)
211 events |= (RTC_UF | RTC_IRQF);
213 if (status & PIT_ALL_ON)
214 events |= (RTC_PF | RTC_IRQF);
216 if ((status & RTC_ALM_BIT) && rtc_valid_tm(&pdata->g_rtc_alarm))
217 rtc_update_alarm(&pdev->dev, &pdata->g_rtc_alarm);
219 rtc_update_irq(pdata->rtc, 1, events);
220 spin_unlock_irq(&pdata->rtc->irq_lock);
226 * Clear all interrupts and release the IRQ
228 static void mxc_rtc_release(struct device *dev)
230 struct platform_device *pdev = to_platform_device(dev);
231 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
232 void __iomem *ioaddr = pdata->ioaddr;
234 spin_lock_irq(&pdata->rtc->irq_lock);
236 /* Disable all rtc interrupts */
237 writew(0, ioaddr + RTC_RTCIENR);
239 /* Clear all interrupt status */
240 writew(0xffffffff, ioaddr + RTC_RTCISR);
242 spin_unlock_irq(&pdata->rtc->irq_lock);
245 static void mxc_rtc_irq_enable(struct device *dev, unsigned int bit,
246 unsigned int enabled)
248 struct platform_device *pdev = to_platform_device(dev);
249 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
250 void __iomem *ioaddr = pdata->ioaddr;
253 spin_lock_irq(&pdata->rtc->irq_lock);
254 reg = readw(ioaddr + RTC_RTCIENR);
261 writew(reg, ioaddr + RTC_RTCIENR);
262 spin_unlock_irq(&pdata->rtc->irq_lock);
265 static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
267 mxc_rtc_irq_enable(dev, RTC_ALM_BIT, enabled);
272 * This function reads the current RTC time into tm in Gregorian date.
274 static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm)
278 /* Avoid roll-over from reading the different registers */
280 val = get_alarm_or_time(dev, MXC_RTC_TIME);
281 } while (val != get_alarm_or_time(dev, MXC_RTC_TIME));
283 rtc_time_to_tm(val, tm);
289 * This function sets the internal RTC time based on tm in Gregorian date.
291 static int mxc_rtc_set_mmss(struct device *dev, unsigned long time)
293 /* Avoid roll-over from reading the different registers */
295 set_alarm_or_time(dev, MXC_RTC_TIME, time);
296 } while (time != get_alarm_or_time(dev, MXC_RTC_TIME));
302 * This function reads the current alarm value into the passed in 'alrm'
303 * argument. It updates the alrm's pending field value based on the whether
304 * an alarm interrupt occurs or not.
306 static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
308 struct platform_device *pdev = to_platform_device(dev);
309 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
310 void __iomem *ioaddr = pdata->ioaddr;
312 rtc_time_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time);
313 alrm->pending = ((readw(ioaddr + RTC_RTCISR) & RTC_ALM_BIT)) ? 1 : 0;
319 * This function sets the RTC alarm based on passed in alrm.
321 static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
323 struct platform_device *pdev = to_platform_device(dev);
324 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
327 if (rtc_valid_tm(&alrm->time)) {
328 if (alrm->time.tm_sec > 59 ||
329 alrm->time.tm_hour > 23 ||
330 alrm->time.tm_min > 59)
333 ret = rtc_update_alarm(dev, &alrm->time);
335 ret = rtc_valid_tm(&alrm->time);
339 ret = rtc_update_alarm(dev, &alrm->time);
345 memcpy(&pdata->g_rtc_alarm, &alrm->time, sizeof(struct rtc_time));
346 mxc_rtc_irq_enable(dev, RTC_ALM_BIT, alrm->enabled);
352 static struct rtc_class_ops mxc_rtc_ops = {
353 .release = mxc_rtc_release,
354 .read_time = mxc_rtc_read_time,
355 .set_mmss = mxc_rtc_set_mmss,
356 .read_alarm = mxc_rtc_read_alarm,
357 .set_alarm = mxc_rtc_set_alarm,
358 .alarm_irq_enable = mxc_rtc_alarm_irq_enable,
361 static int __init mxc_rtc_probe(struct platform_device *pdev)
363 struct resource *res;
364 struct rtc_device *rtc;
365 struct rtc_plat_data *pdata = NULL;
370 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
374 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
378 if (!devm_request_mem_region(&pdev->dev, res->start,
379 resource_size(res), pdev->name))
382 pdata->ioaddr = devm_ioremap(&pdev->dev, res->start,
385 pdata->clk = clk_get(&pdev->dev, "rtc");
386 if (IS_ERR(pdata->clk)) {
387 dev_err(&pdev->dev, "unable to get clock!\n");
388 ret = PTR_ERR(pdata->clk);
389 goto exit_free_pdata;
392 clk_enable(pdata->clk);
393 rate = clk_get_rate(pdata->clk);
396 reg = RTC_INPUT_CLK_32768HZ;
397 else if (rate == 32000)
398 reg = RTC_INPUT_CLK_32000HZ;
399 else if (rate == 38400)
400 reg = RTC_INPUT_CLK_38400HZ;
402 dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate);
407 reg |= RTC_ENABLE_BIT;
408 writew(reg, (pdata->ioaddr + RTC_RTCCTL));
409 if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) {
410 dev_err(&pdev->dev, "hardware module can't be enabled!\n");
415 platform_set_drvdata(pdev, pdata);
417 /* Configure and enable the RTC */
418 pdata->irq = platform_get_irq(pdev, 0);
420 if (pdata->irq >= 0 &&
421 devm_request_irq(&pdev->dev, pdata->irq, mxc_rtc_interrupt,
422 IRQF_SHARED, pdev->name, pdev) < 0) {
423 dev_warn(&pdev->dev, "interrupt not available.\n");
427 rtc = rtc_device_register(pdev->name, &pdev->dev, &mxc_rtc_ops,
431 goto exit_clr_drvdata;
439 platform_set_drvdata(pdev, NULL);
441 clk_disable(pdata->clk);
449 static int __exit mxc_rtc_remove(struct platform_device *pdev)
451 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
453 rtc_device_unregister(pdata->rtc);
455 clk_disable(pdata->clk);
457 platform_set_drvdata(pdev, NULL);
462 static struct platform_driver mxc_rtc_driver = {
465 .owner = THIS_MODULE,
467 .remove = __exit_p(mxc_rtc_remove),
470 static int __init mxc_rtc_init(void)
472 return platform_driver_probe(&mxc_rtc_driver, mxc_rtc_probe);
475 static void __exit mxc_rtc_exit(void)
477 platform_driver_unregister(&mxc_rtc_driver);
480 module_init(mxc_rtc_init);
481 module_exit(mxc_rtc_exit);
483 MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
484 MODULE_DESCRIPTION("RTC driver for Freescale MXC");
485 MODULE_LICENSE("GPL");