1 /* drivers/rtc/rtc-s3c.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
17 #include <linux/module.h>
19 #include <linux/string.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/rtc.h>
24 #include <linux/bcd.h>
25 #include <linux/clk.h>
26 #include <linux/log2.h>
27 #include <linux/slab.h>
29 #include <linux/uaccess.h>
42 struct s3c_rtc_drv_data {
46 /* I have yet to find an S3C implementation with more than one
47 * of these rtc blocks in */
49 static struct clk *rtc_clk;
50 static void __iomem *s3c_rtc_base;
51 static int s3c_rtc_alarmno = NO_IRQ;
52 static int s3c_rtc_tickno = NO_IRQ;
53 static enum s3c_cpu_type s3c_rtc_cpu_type;
55 static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
57 static void s3c_rtc_alarm_clk_enable(bool enable)
59 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
60 static bool alarm_clk_enabled;
61 unsigned long irq_flags;
63 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
65 if (!alarm_clk_enabled) {
67 alarm_clk_enabled = true;
70 if (alarm_clk_enabled) {
72 alarm_clk_enabled = false;
75 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
80 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
82 struct rtc_device *rdev = id;
85 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
87 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
88 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
92 s3c_rtc_alarm_clk_enable(false);
97 static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
99 struct rtc_device *rdev = id;
102 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
104 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
105 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
107 clk_disable(rtc_clk);
111 /* Update control registers */
112 static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
116 dev_dbg(dev, "%s: aie=%d\n", __func__, enabled);
119 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
122 tmp |= S3C2410_RTCALM_ALMEN;
124 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
125 clk_disable(rtc_clk);
127 s3c_rtc_alarm_clk_enable(enabled);
132 static int s3c_rtc_setfreq(struct device *dev, int freq)
134 struct platform_device *pdev = to_platform_device(dev);
135 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
136 unsigned int tmp = 0;
139 if (!is_power_of_2(freq))
143 spin_lock_irq(&s3c_rtc_pie_lock);
145 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
146 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
147 tmp &= S3C2410_TICNT_ENABLE;
150 val = (rtc_dev->max_user_freq / freq) - 1;
152 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
153 tmp |= S3C2443_TICNT_PART(val);
154 writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
156 if (s3c_rtc_cpu_type == TYPE_S3C2416)
157 writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
162 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
163 spin_unlock_irq(&s3c_rtc_pie_lock);
164 clk_disable(rtc_clk);
169 /* Time read/write */
171 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
173 unsigned int have_retried = 0;
174 void __iomem *base = s3c_rtc_base;
178 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
179 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
180 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
181 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
182 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
183 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
185 /* the only way to work out whether the system was mid-update
186 * when we read it is to check the second counter, and if it
187 * is zero, then we re-try the entire read
190 if (rtc_tm->tm_sec == 0 && !have_retried) {
195 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
196 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
197 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
198 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
199 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
200 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
202 rtc_tm->tm_year += 100;
204 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
205 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
206 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
210 clk_disable(rtc_clk);
211 return rtc_valid_tm(rtc_tm);
214 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
216 void __iomem *base = s3c_rtc_base;
217 int year = tm->tm_year - 100;
219 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
220 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
221 tm->tm_hour, tm->tm_min, tm->tm_sec);
223 /* we get around y2k by simply not supporting it */
225 if (year < 0 || year >= 100) {
226 dev_err(dev, "rtc only supports 100 years\n");
231 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
232 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
233 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
234 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
235 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
236 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
237 clk_disable(rtc_clk);
242 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
244 struct rtc_time *alm_tm = &alrm->time;
245 void __iomem *base = s3c_rtc_base;
249 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
250 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
251 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
252 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
253 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
254 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
256 alm_en = readb(base + S3C2410_RTCALM);
258 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
260 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
262 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
263 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
266 /* decode the alarm enable field */
268 if (alm_en & S3C2410_RTCALM_SECEN)
269 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
273 if (alm_en & S3C2410_RTCALM_MINEN)
274 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
278 if (alm_en & S3C2410_RTCALM_HOUREN)
279 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
281 alm_tm->tm_hour = -1;
283 if (alm_en & S3C2410_RTCALM_DAYEN)
284 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
286 alm_tm->tm_mday = -1;
288 if (alm_en & S3C2410_RTCALM_MONEN) {
289 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
295 if (alm_en & S3C2410_RTCALM_YEAREN)
296 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
298 alm_tm->tm_year = -1;
300 clk_disable(rtc_clk);
304 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
306 struct rtc_time *tm = &alrm->time;
307 void __iomem *base = s3c_rtc_base;
308 unsigned int alrm_en;
311 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
313 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
314 tm->tm_hour, tm->tm_min, tm->tm_sec);
316 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
317 writeb(0x00, base + S3C2410_RTCALM);
319 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
320 alrm_en |= S3C2410_RTCALM_SECEN;
321 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
324 if (tm->tm_min < 60 && tm->tm_min >= 0) {
325 alrm_en |= S3C2410_RTCALM_MINEN;
326 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
329 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
330 alrm_en |= S3C2410_RTCALM_HOUREN;
331 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
334 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
336 writeb(alrm_en, base + S3C2410_RTCALM);
338 s3c_rtc_setaie(dev, alrm->enabled);
340 clk_disable(rtc_clk);
344 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
349 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
350 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
351 ticnt &= S3C64XX_RTCCON_TICEN;
353 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
354 ticnt &= S3C2410_TICNT_ENABLE;
357 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
358 clk_disable(rtc_clk);
362 static const struct rtc_class_ops s3c_rtcops = {
363 .read_time = s3c_rtc_gettime,
364 .set_time = s3c_rtc_settime,
365 .read_alarm = s3c_rtc_getalarm,
366 .set_alarm = s3c_rtc_setalarm,
367 .proc = s3c_rtc_proc,
368 .alarm_irq_enable = s3c_rtc_setaie,
371 static void s3c_rtc_enable(struct platform_device *pdev, int en)
373 void __iomem *base = s3c_rtc_base;
376 if (s3c_rtc_base == NULL)
381 tmp = readw(base + S3C2410_RTCCON);
382 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
383 tmp &= ~S3C64XX_RTCCON_TICEN;
384 tmp &= ~S3C2410_RTCCON_RTCEN;
385 writew(tmp, base + S3C2410_RTCCON);
387 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
388 tmp = readb(base + S3C2410_TICNT);
389 tmp &= ~S3C2410_TICNT_ENABLE;
390 writeb(tmp, base + S3C2410_TICNT);
393 /* re-enable the device, and check it is ok */
395 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
396 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
398 tmp = readw(base + S3C2410_RTCCON);
399 writew(tmp | S3C2410_RTCCON_RTCEN,
400 base + S3C2410_RTCCON);
403 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
404 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
406 tmp = readw(base + S3C2410_RTCCON);
407 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
408 base + S3C2410_RTCCON);
411 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
412 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
414 tmp = readw(base + S3C2410_RTCCON);
415 writew(tmp & ~S3C2410_RTCCON_CLKRST,
416 base + S3C2410_RTCCON);
419 clk_disable(rtc_clk);
422 static int s3c_rtc_remove(struct platform_device *dev)
424 platform_set_drvdata(dev, NULL);
426 s3c_rtc_setaie(&dev->dev, 0);
428 clk_unprepare(rtc_clk);
434 static const struct of_device_id s3c_rtc_dt_match[];
436 static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
439 struct s3c_rtc_drv_data *data;
440 if (pdev->dev.of_node) {
441 const struct of_device_id *match;
442 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
443 data = (struct s3c_rtc_drv_data *) match->data;
444 return data->cpu_type;
447 return platform_get_device_id(pdev)->driver_data;
450 static int s3c_rtc_probe(struct platform_device *pdev)
452 struct rtc_device *rtc;
453 struct rtc_time rtc_tm;
454 struct resource *res;
458 dev_dbg(&pdev->dev, "%s: probe=%p\n", __func__, pdev);
462 s3c_rtc_tickno = platform_get_irq(pdev, 1);
463 if (s3c_rtc_tickno < 0) {
464 dev_err(&pdev->dev, "no irq for rtc tick\n");
465 return s3c_rtc_tickno;
468 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
469 if (s3c_rtc_alarmno < 0) {
470 dev_err(&pdev->dev, "no irq for alarm\n");
471 return s3c_rtc_alarmno;
474 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
475 s3c_rtc_tickno, s3c_rtc_alarmno);
477 /* get the memory region */
479 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
481 dev_err(&pdev->dev, "failed to get memory region resource\n");
485 s3c_rtc_base = devm_ioremap_resource(&pdev->dev, res);
486 if (IS_ERR(s3c_rtc_base))
487 return PTR_ERR(s3c_rtc_base);
489 rtc_clk = devm_clk_get(&pdev->dev, "rtc");
490 if (IS_ERR(rtc_clk)) {
491 dev_err(&pdev->dev, "failed to find rtc clock source\n");
492 ret = PTR_ERR(rtc_clk);
497 clk_prepare_enable(rtc_clk);
499 /* check to see if everything is setup correctly */
501 s3c_rtc_enable(pdev, 1);
503 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
504 readw(s3c_rtc_base + S3C2410_RTCCON));
506 device_init_wakeup(&pdev->dev, 1);
508 /* register RTC and exit */
510 rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
514 dev_err(&pdev->dev, "cannot attach rtc\n");
519 s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
523 s3c_rtc_gettime(NULL, &rtc_tm);
525 if (rtc_valid_tm(&rtc_tm)) {
526 rtc_tm.tm_year = 100;
533 s3c_rtc_settime(NULL, &rtc_tm);
535 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
538 if (s3c_rtc_cpu_type != TYPE_S3C2410)
539 rtc->max_user_freq = 32768;
541 rtc->max_user_freq = 128;
543 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
544 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
545 tmp |= S3C2443_RTCCON_TICSEL;
546 writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
549 platform_set_drvdata(pdev, rtc);
551 s3c_rtc_setfreq(&pdev->dev, 1);
553 ret = devm_request_irq(&pdev->dev, s3c_rtc_alarmno, s3c_rtc_alarmirq,
554 0, "s3c2410-rtc alarm", rtc);
556 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
560 ret = devm_request_irq(&pdev->dev, s3c_rtc_tickno, s3c_rtc_tickirq,
561 0, "s3c2410-rtc tick", rtc);
563 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
567 clk_disable(rtc_clk);
572 platform_set_drvdata(pdev, NULL);
575 s3c_rtc_enable(pdev, 0);
576 clk_disable_unprepare(rtc_clk);
581 #ifdef CONFIG_PM_SLEEP
582 /* RTC Power management control */
584 static int ticnt_save, ticnt_en_save;
587 static int s3c_rtc_suspend(struct device *dev)
589 struct platform_device *pdev = to_platform_device(dev);
592 /* save TICNT for anyone using periodic interrupts */
593 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
594 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
595 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
596 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
598 s3c_rtc_enable(pdev, 0);
600 if (device_may_wakeup(dev) && !wake_en) {
601 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
604 dev_err(dev, "enable_irq_wake failed\n");
606 clk_disable(rtc_clk);
611 static int s3c_rtc_resume(struct device *dev)
613 struct platform_device *pdev = to_platform_device(dev);
617 s3c_rtc_enable(pdev, 1);
618 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
619 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
620 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
621 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
624 if (device_may_wakeup(dev) && wake_en) {
625 disable_irq_wake(s3c_rtc_alarmno);
628 clk_disable(rtc_clk);
634 static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
637 static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
638 [TYPE_S3C2410] = { TYPE_S3C2410 },
639 [TYPE_S3C2416] = { TYPE_S3C2416 },
640 [TYPE_S3C2443] = { TYPE_S3C2443 },
641 [TYPE_S3C64XX] = { TYPE_S3C64XX },
644 static const struct of_device_id s3c_rtc_dt_match[] = {
646 .compatible = "samsung,s3c2410-rtc",
647 .data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
649 .compatible = "samsung,s3c2416-rtc",
650 .data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
652 .compatible = "samsung,s3c2443-rtc",
653 .data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
655 .compatible = "samsung,s3c6410-rtc",
656 .data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
660 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
663 static struct platform_device_id s3c_rtc_driver_ids[] = {
665 .name = "s3c2410-rtc",
666 .driver_data = TYPE_S3C2410,
668 .name = "s3c2416-rtc",
669 .driver_data = TYPE_S3C2416,
671 .name = "s3c2443-rtc",
672 .driver_data = TYPE_S3C2443,
674 .name = "s3c64xx-rtc",
675 .driver_data = TYPE_S3C64XX,
680 MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
682 static struct platform_driver s3c_rtc_driver = {
683 .probe = s3c_rtc_probe,
684 .remove = s3c_rtc_remove,
685 .id_table = s3c_rtc_driver_ids,
688 .owner = THIS_MODULE,
689 .pm = &s3c_rtc_pm_ops,
690 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
694 module_platform_driver(s3c_rtc_driver);
696 MODULE_DESCRIPTION("Samsung S3C RTC Driver");
697 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
698 MODULE_LICENSE("GPL");
699 MODULE_ALIAS("platform:s3c2410-rtc");