2 * rtc-twl.c -- TWL Real Time Clock interface
4 * Copyright (C) 2007 MontaVista Software, Inc
5 * Author: Alexandre Rusev <source@mvista.com>
7 * Based on original TI driver twl4030-rtc.c
8 * Copyright (C) 2006 Texas Instruments, Inc.
11 * Copyright (C) 2003 MontaVista Software, Inc.
12 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
13 * Copyright (C) 2006 David Brownell
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
21 #include <linux/kernel.h>
22 #include <linux/errno.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/rtc.h>
27 #include <linux/bcd.h>
28 #include <linux/platform_device.h>
29 #include <linux/interrupt.h>
31 #include <linux/i2c/twl.h>
35 * RTC block register offsets (use TWL_MODULE_RTC)
46 REG_ALARM_SECONDS_REG,
47 REG_ALARM_MINUTES_REG,
55 REG_RTC_INTERRUPTS_REG,
60 static const u8 twl4030_rtc_reg_map[] = {
61 [REG_SECONDS_REG] = 0x00,
62 [REG_MINUTES_REG] = 0x01,
63 [REG_HOURS_REG] = 0x02,
64 [REG_DAYS_REG] = 0x03,
65 [REG_MONTHS_REG] = 0x04,
66 [REG_YEARS_REG] = 0x05,
67 [REG_WEEKS_REG] = 0x06,
69 [REG_ALARM_SECONDS_REG] = 0x07,
70 [REG_ALARM_MINUTES_REG] = 0x08,
71 [REG_ALARM_HOURS_REG] = 0x09,
72 [REG_ALARM_DAYS_REG] = 0x0A,
73 [REG_ALARM_MONTHS_REG] = 0x0B,
74 [REG_ALARM_YEARS_REG] = 0x0C,
76 [REG_RTC_CTRL_REG] = 0x0D,
77 [REG_RTC_STATUS_REG] = 0x0E,
78 [REG_RTC_INTERRUPTS_REG] = 0x0F,
80 [REG_RTC_COMP_LSB_REG] = 0x10,
81 [REG_RTC_COMP_MSB_REG] = 0x11,
83 static const u8 twl6030_rtc_reg_map[] = {
84 [REG_SECONDS_REG] = 0x00,
85 [REG_MINUTES_REG] = 0x01,
86 [REG_HOURS_REG] = 0x02,
87 [REG_DAYS_REG] = 0x03,
88 [REG_MONTHS_REG] = 0x04,
89 [REG_YEARS_REG] = 0x05,
90 [REG_WEEKS_REG] = 0x06,
92 [REG_ALARM_SECONDS_REG] = 0x08,
93 [REG_ALARM_MINUTES_REG] = 0x09,
94 [REG_ALARM_HOURS_REG] = 0x0A,
95 [REG_ALARM_DAYS_REG] = 0x0B,
96 [REG_ALARM_MONTHS_REG] = 0x0C,
97 [REG_ALARM_YEARS_REG] = 0x0D,
99 [REG_RTC_CTRL_REG] = 0x10,
100 [REG_RTC_STATUS_REG] = 0x11,
101 [REG_RTC_INTERRUPTS_REG] = 0x12,
103 [REG_RTC_COMP_LSB_REG] = 0x13,
104 [REG_RTC_COMP_MSB_REG] = 0x14,
107 /* RTC_CTRL_REG bitfields */
108 #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
109 #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
110 #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
111 #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
112 #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
113 #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
114 #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
116 /* RTC_STATUS_REG bitfields */
117 #define BIT_RTC_STATUS_REG_RUN_M 0x02
118 #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
119 #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
120 #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
121 #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
122 #define BIT_RTC_STATUS_REG_ALARM_M 0x40
123 #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
125 /* RTC_INTERRUPTS_REG bitfields */
126 #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
127 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
128 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
131 /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
132 #define ALL_TIME_REGS 6
134 /*----------------------------------------------------------------------*/
135 static u8 *rtc_reg_map;
138 * Supports 1 byte read from TWL RTC register.
140 static int twl_rtc_read_u8(u8 *data, u8 reg)
144 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
146 pr_err("twl_rtc: Could not read TWL"
147 "register %X - error %d\n", reg, ret);
152 * Supports 1 byte write to TWL RTC registers.
154 static int twl_rtc_write_u8(u8 data, u8 reg)
158 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
160 pr_err("twl_rtc: Could not write TWL"
161 "register %X - error %d\n", reg, ret);
166 * Cache the value for timer/alarm interrupts register; this is
167 * only changed by callers holding rtc ops lock (or resume).
169 static unsigned char rtc_irq_bits;
172 * Enable 1/second update and/or alarm interrupts.
174 static int set_rtc_irq_bit(unsigned char bit)
179 /* if the bit is set, return from here */
180 if (rtc_irq_bits & bit)
183 val = rtc_irq_bits | bit;
184 val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
185 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
193 * Disable update and/or alarm interrupts.
195 static int mask_rtc_irq_bit(unsigned char bit)
200 /* if the bit is clear, return from here */
201 if (!(rtc_irq_bits & bit))
204 val = rtc_irq_bits & ~bit;
205 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
212 static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
217 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
219 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
225 * Gets current TWL RTC time and date parameters.
227 * The RTC's time/alarm representation is not what gmtime(3) requires
230 * - Months are 1..12 vs Linux 0-11
231 * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
233 static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
235 unsigned char rtc_data[ALL_TIME_REGS + 1];
239 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
243 save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
245 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
249 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
250 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
253 dev_err(dev, "rtc_read_time error %d\n", ret);
257 tm->tm_sec = bcd2bin(rtc_data[0]);
258 tm->tm_min = bcd2bin(rtc_data[1]);
259 tm->tm_hour = bcd2bin(rtc_data[2]);
260 tm->tm_mday = bcd2bin(rtc_data[3]);
261 tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
262 tm->tm_year = bcd2bin(rtc_data[5]) + 100;
267 static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
269 unsigned char save_control;
270 unsigned char rtc_data[ALL_TIME_REGS + 1];
273 rtc_data[1] = bin2bcd(tm->tm_sec);
274 rtc_data[2] = bin2bcd(tm->tm_min);
275 rtc_data[3] = bin2bcd(tm->tm_hour);
276 rtc_data[4] = bin2bcd(tm->tm_mday);
277 rtc_data[5] = bin2bcd(tm->tm_mon + 1);
278 rtc_data[6] = bin2bcd(tm->tm_year - 100);
280 /* Stop RTC while updating the TC registers */
281 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
285 save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
286 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
290 /* update all the time registers in one shot */
291 ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
292 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
294 dev_err(dev, "rtc_set_time error %d\n", ret);
299 save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
300 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
307 * Gets current TWL RTC alarm time.
309 static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
311 unsigned char rtc_data[ALL_TIME_REGS + 1];
314 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
315 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
317 dev_err(dev, "rtc_read_alarm error %d\n", ret);
321 /* some of these fields may be wildcard/"match all" */
322 alm->time.tm_sec = bcd2bin(rtc_data[0]);
323 alm->time.tm_min = bcd2bin(rtc_data[1]);
324 alm->time.tm_hour = bcd2bin(rtc_data[2]);
325 alm->time.tm_mday = bcd2bin(rtc_data[3]);
326 alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
327 alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
329 /* report cached alarm enable state */
330 if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
336 static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
338 unsigned char alarm_data[ALL_TIME_REGS + 1];
341 ret = twl_rtc_alarm_irq_enable(dev, 0);
345 alarm_data[1] = bin2bcd(alm->time.tm_sec);
346 alarm_data[2] = bin2bcd(alm->time.tm_min);
347 alarm_data[3] = bin2bcd(alm->time.tm_hour);
348 alarm_data[4] = bin2bcd(alm->time.tm_mday);
349 alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
350 alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
352 /* update all the alarm registers in one shot */
353 ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
354 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
356 dev_err(dev, "rtc_set_alarm error %d\n", ret);
361 ret = twl_rtc_alarm_irq_enable(dev, 1);
366 static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
368 unsigned long events;
373 res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
377 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
378 * only one (ALARM or RTC) interrupt source may be enabled
379 * at time, we also could check our results
380 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
382 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
383 events = RTC_IRQF | RTC_AF;
385 events = RTC_IRQF | RTC_PF;
387 res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M,
392 if (twl_class_is_4030()) {
393 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
394 * needs 2 reads to clear the interrupt. One read is done in
395 * do_twl_pwrirq(). Doing the second read, to clear
398 * FIXME the reason PWR_ISR1 needs an extra read is that
399 * RTC_IF retriggered until we cleared REG_ALARM_M above.
400 * But re-reading like this is a bad hack; by doing so we
401 * risk wrongly clearing status for some other IRQ (losing
402 * the interrupt). Be smarter about handling RTC_UF ...
404 res = twl_i2c_read_u8(TWL4030_MODULE_INT,
405 &rd_reg, TWL4030_INT_PWR_ISR1);
410 /* Notify RTC core on event */
411 rtc_update_irq(rtc, 1, events);
418 static struct rtc_class_ops twl_rtc_ops = {
419 .read_time = twl_rtc_read_time,
420 .set_time = twl_rtc_set_time,
421 .read_alarm = twl_rtc_read_alarm,
422 .set_alarm = twl_rtc_set_alarm,
423 .alarm_irq_enable = twl_rtc_alarm_irq_enable,
426 /*----------------------------------------------------------------------*/
428 static int __devinit twl_rtc_probe(struct platform_device *pdev)
430 struct rtc_device *rtc;
432 int irq = platform_get_irq(pdev, 0);
438 ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
442 if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
443 dev_warn(&pdev->dev, "Power up reset detected.\n");
445 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
446 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
448 /* Clear RTC Power up reset and pending alarm interrupts */
449 ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
453 if (twl_class_is_6030()) {
454 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
456 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
460 dev_info(&pdev->dev, "Enabling TWL-RTC\n");
461 ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG);
465 /* init cached IRQ enable bits */
466 ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
470 rtc = rtc_device_register(pdev->name,
471 &pdev->dev, &twl_rtc_ops, THIS_MODULE);
474 dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
479 ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt,
481 dev_name(&rtc->dev), rtc);
483 dev_err(&pdev->dev, "IRQ is not free.\n");
487 platform_set_drvdata(pdev, rtc);
491 rtc_device_unregister(rtc);
497 * Disable all TWL RTC module interrupts.
498 * Sets status flag to free.
500 static int __devexit twl_rtc_remove(struct platform_device *pdev)
502 /* leave rtc running, but disable irqs */
503 struct rtc_device *rtc = platform_get_drvdata(pdev);
504 int irq = platform_get_irq(pdev, 0);
506 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
507 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
508 if (twl_class_is_6030()) {
509 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
511 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
518 rtc_device_unregister(rtc);
519 platform_set_drvdata(pdev, NULL);
523 static void twl_rtc_shutdown(struct platform_device *pdev)
525 /* mask timer interrupts, but leave alarm interrupts on to enable
526 power-on when alarm is triggered */
527 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
532 static unsigned char irqstat;
534 static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state)
536 irqstat = rtc_irq_bits;
538 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
542 static int twl_rtc_resume(struct platform_device *pdev)
544 set_rtc_irq_bit(irqstat);
549 #define twl_rtc_suspend NULL
550 #define twl_rtc_resume NULL
553 static const struct of_device_id twl_rtc_of_match[] = {
554 {.compatible = "ti,twl4030-rtc", },
557 MODULE_DEVICE_TABLE(of, twl_rtc_of_match);
558 MODULE_ALIAS("platform:twl_rtc");
560 static struct platform_driver twl4030rtc_driver = {
561 .probe = twl_rtc_probe,
562 .remove = __devexit_p(twl_rtc_remove),
563 .shutdown = twl_rtc_shutdown,
564 .suspend = twl_rtc_suspend,
565 .resume = twl_rtc_resume,
567 .owner = THIS_MODULE,
569 .of_match_table = twl_rtc_of_match,
573 static int __init twl_rtc_init(void)
575 if (twl_class_is_4030())
576 rtc_reg_map = (u8 *) twl4030_rtc_reg_map;
578 rtc_reg_map = (u8 *) twl6030_rtc_reg_map;
580 return platform_driver_register(&twl4030rtc_driver);
582 module_init(twl_rtc_init);
584 static void __exit twl_rtc_exit(void)
586 platform_driver_unregister(&twl4030rtc_driver);
588 module_exit(twl_rtc_exit);
590 MODULE_AUTHOR("Texas Instruments, MontaVista Software");
591 MODULE_LICENSE("GPL");