2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
24 #include <asm/ebcdic.h>
27 #include "qeth_core.h"
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
47 EXPORT_SYMBOL_GPL(qeth_dbf);
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
51 struct kmem_cache *qeth_core_header_cache;
52 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
54 static struct device *qeth_core_root_dev;
55 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
56 static struct lock_class_key qdio_out_skb_queue_key;
58 static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
60 static int qeth_issue_next_read(struct qeth_card *);
61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63 static void qeth_free_buffer_pool(struct qeth_card *);
64 static int qeth_qdio_establish(struct qeth_card *);
67 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
68 struct qdio_buffer *buffer, int is_tso,
69 int *next_element_to_fill)
71 struct skb_frag_struct *frag;
74 int element, cnt, dlen;
76 fragno = skb_shinfo(skb)->nr_frags;
77 element = *next_element_to_fill;
81 buffer->element[element].flags =
82 SBAL_FLAGS_MIDDLE_FRAG;
84 buffer->element[element].flags =
85 SBAL_FLAGS_FIRST_FRAG;
86 dlen = skb->len - skb->data_len;
88 buffer->element[element].addr = skb->data;
89 buffer->element[element].length = dlen;
92 for (cnt = 0; cnt < fragno; cnt++) {
93 frag = &skb_shinfo(skb)->frags[cnt];
94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
96 buffer->element[element].addr = (char *)addr;
97 buffer->element[element].length = frag->size;
98 if (cnt < (fragno - 1))
99 buffer->element[element].flags =
100 SBAL_FLAGS_MIDDLE_FRAG;
102 buffer->element[element].flags =
103 SBAL_FLAGS_LAST_FRAG;
106 *next_element_to_fill = element;
109 static inline const char *qeth_get_cardname(struct qeth_card *card)
111 if (card->info.guestlan) {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSAE:
114 return " Guest LAN QDIO";
115 case QETH_CARD_TYPE_IQD:
116 return " Guest LAN Hiper";
121 switch (card->info.type) {
122 case QETH_CARD_TYPE_OSAE:
123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
135 /* max length to be returned: 14 */
136 const char *qeth_get_cardname_short(struct qeth_card *card)
138 if (card->info.guestlan) {
139 switch (card->info.type) {
140 case QETH_CARD_TYPE_OSAE:
141 return "GuestLAN QDIO";
142 case QETH_CARD_TYPE_IQD:
143 return "GuestLAN Hiper";
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSAE:
150 switch (card->info.link_type) {
151 case QETH_LINK_TYPE_FAST_ETH:
153 case QETH_LINK_TYPE_HSTR:
155 case QETH_LINK_TYPE_GBIT_ETH:
157 case QETH_LINK_TYPE_10GBIT_ETH:
159 case QETH_LINK_TYPE_LANE_ETH100:
160 return "OSD_FE_LANE";
161 case QETH_LINK_TYPE_LANE_TR:
162 return "OSD_TR_LANE";
163 case QETH_LINK_TYPE_LANE_ETH1000:
164 return "OSD_GbE_LANE";
165 case QETH_LINK_TYPE_LANE:
166 return "OSD_ATM_LANE";
168 return "OSD_Express";
170 case QETH_CARD_TYPE_IQD:
171 return "HiperSockets";
172 case QETH_CARD_TYPE_OSN:
181 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
182 int clear_start_mask)
186 spin_lock_irqsave(&card->thread_mask_lock, flags);
187 card->thread_allowed_mask = threads;
188 if (clear_start_mask)
189 card->thread_start_mask &= threads;
190 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
191 wake_up(&card->wait_q);
193 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
195 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 rc = (card->thread_running_mask & threads);
202 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
205 EXPORT_SYMBOL_GPL(qeth_threads_running);
207 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
209 return wait_event_interruptible(card->wait_q,
210 qeth_threads_running(card, threads) == 0);
212 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
214 void qeth_clear_working_pool_list(struct qeth_card *card)
216 struct qeth_buffer_pool_entry *pool_entry, *tmp;
218 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
219 list_for_each_entry_safe(pool_entry, tmp,
220 &card->qdio.in_buf_pool.entry_list, list){
221 list_del(&pool_entry->list);
224 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
226 static int qeth_alloc_buffer_pool(struct qeth_card *card)
228 struct qeth_buffer_pool_entry *pool_entry;
232 QETH_DBF_TEXT(TRACE, 5, "alocpool");
233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
236 qeth_free_buffer_pool(card);
239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
240 ptr = (void *) __get_free_page(GFP_KERNEL);
243 free_page((unsigned long)
244 pool_entry->elements[--j]);
246 qeth_free_buffer_pool(card);
249 pool_entry->elements[j] = ptr;
251 list_add(&pool_entry->init_list,
252 &card->qdio.init_pool.entry_list);
257 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
259 QETH_DBF_TEXT(TRACE, 2, "realcbp");
261 if ((card->state != CARD_STATE_DOWN) &&
262 (card->state != CARD_STATE_RECOVER))
265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
266 qeth_clear_working_pool_list(card);
267 qeth_free_buffer_pool(card);
268 card->qdio.in_buf_pool.buf_count = bufcnt;
269 card->qdio.init_pool.buf_count = bufcnt;
270 return qeth_alloc_buffer_pool(card);
273 static int qeth_issue_next_read(struct qeth_card *card)
276 struct qeth_cmd_buffer *iob;
278 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
279 if (card->read.state != CH_STATE_UP)
281 iob = qeth_get_buffer(&card->read);
283 dev_warn(&card->gdev->dev, "The qeth device driver "
284 "failed to recover an error on the device\n");
285 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
286 "available\n", dev_name(&card->gdev->dev));
289 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
290 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
291 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
294 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
295 "rc=%i\n", dev_name(&card->gdev->dev), rc);
296 atomic_set(&card->read.irq_pending, 0);
297 qeth_schedule_recovery(card);
298 wake_up(&card->wait_q);
303 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
305 struct qeth_reply *reply;
307 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
309 atomic_set(&reply->refcnt, 1);
310 atomic_set(&reply->received, 0);
316 static void qeth_get_reply(struct qeth_reply *reply)
318 WARN_ON(atomic_read(&reply->refcnt) <= 0);
319 atomic_inc(&reply->refcnt);
322 static void qeth_put_reply(struct qeth_reply *reply)
324 WARN_ON(atomic_read(&reply->refcnt) <= 0);
325 if (atomic_dec_and_test(&reply->refcnt))
329 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
330 struct qeth_card *card)
333 int com = cmd->hdr.command;
334 ipa_name = qeth_get_ipa_cmd_name(com);
336 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
337 ipa_name, com, QETH_CARD_IFNAME(card),
338 rc, qeth_get_ipa_msg(rc));
340 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
341 ipa_name, com, QETH_CARD_IFNAME(card));
344 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
345 struct qeth_cmd_buffer *iob)
347 struct qeth_ipa_cmd *cmd = NULL;
349 QETH_DBF_TEXT(TRACE, 5, "chkipad");
350 if (IS_IPA(iob->data)) {
351 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
352 if (IS_IPA_REPLY(cmd)) {
353 if (cmd->hdr.command < IPA_CMD_SETCCID ||
354 cmd->hdr.command > IPA_CMD_MODCCID)
355 qeth_issue_ipa_msg(cmd,
356 cmd->hdr.return_code, card);
359 switch (cmd->hdr.command) {
360 case IPA_CMD_STOPLAN:
361 dev_warn(&card->gdev->dev,
362 "The link for interface %s on CHPID"
364 QETH_CARD_IFNAME(card),
366 card->lan_online = 0;
367 if (card->dev && netif_carrier_ok(card->dev))
368 netif_carrier_off(card->dev);
370 case IPA_CMD_STARTLAN:
371 dev_info(&card->gdev->dev,
372 "The link for %s on CHPID 0x%X has"
374 QETH_CARD_IFNAME(card),
376 netif_carrier_on(card->dev);
377 card->lan_online = 1;
378 qeth_schedule_recovery(card);
380 case IPA_CMD_MODCCID:
382 case IPA_CMD_REGISTER_LOCAL_ADDR:
383 QETH_DBF_TEXT(TRACE, 3, "irla");
385 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
386 QETH_DBF_TEXT(TRACE, 3, "urla");
389 QETH_DBF_MESSAGE(2, "Received data is IPA "
390 "but not a reply!\n");
398 void qeth_clear_ipacmd_list(struct qeth_card *card)
400 struct qeth_reply *reply, *r;
403 QETH_DBF_TEXT(TRACE, 4, "clipalst");
405 spin_lock_irqsave(&card->lock, flags);
406 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
407 qeth_get_reply(reply);
409 atomic_inc(&reply->received);
410 list_del_init(&reply->list);
411 wake_up(&reply->wait_q);
412 qeth_put_reply(reply);
414 spin_unlock_irqrestore(&card->lock, flags);
416 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
418 static int qeth_check_idx_response(unsigned char *buffer)
423 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
424 if ((buffer[2] & 0xc0) == 0xc0) {
425 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
426 "with cause code 0x%02x%s\n",
428 ((buffer[4] == 0x22) ?
429 " -- try another portname" : ""));
430 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
431 QETH_DBF_TEXT(TRACE, 2, " idxterm");
432 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
438 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
441 struct qeth_card *card;
443 QETH_DBF_TEXT(TRACE, 4, "setupccw");
444 card = CARD_FROM_CDEV(channel->ccwdev);
445 if (channel == &card->read)
446 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
448 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
449 channel->ccw.count = len;
450 channel->ccw.cda = (__u32) __pa(iob);
453 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
457 QETH_DBF_TEXT(TRACE, 6, "getbuff");
458 index = channel->io_buf_no;
460 if (channel->iob[index].state == BUF_STATE_FREE) {
461 channel->iob[index].state = BUF_STATE_LOCKED;
462 channel->io_buf_no = (channel->io_buf_no + 1) %
464 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
465 return channel->iob + index;
467 index = (index + 1) % QETH_CMD_BUFFER_NO;
468 } while (index != channel->io_buf_no);
473 void qeth_release_buffer(struct qeth_channel *channel,
474 struct qeth_cmd_buffer *iob)
478 QETH_DBF_TEXT(TRACE, 6, "relbuff");
479 spin_lock_irqsave(&channel->iob_lock, flags);
480 memset(iob->data, 0, QETH_BUFSIZE);
481 iob->state = BUF_STATE_FREE;
482 iob->callback = qeth_send_control_data_cb;
484 spin_unlock_irqrestore(&channel->iob_lock, flags);
486 EXPORT_SYMBOL_GPL(qeth_release_buffer);
488 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
490 struct qeth_cmd_buffer *buffer = NULL;
493 spin_lock_irqsave(&channel->iob_lock, flags);
494 buffer = __qeth_get_buffer(channel);
495 spin_unlock_irqrestore(&channel->iob_lock, flags);
499 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
501 struct qeth_cmd_buffer *buffer;
502 wait_event(channel->wait_q,
503 ((buffer = qeth_get_buffer(channel)) != NULL));
506 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
508 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
512 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
513 qeth_release_buffer(channel, &channel->iob[cnt]);
515 channel->io_buf_no = 0;
517 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
519 static void qeth_send_control_data_cb(struct qeth_channel *channel,
520 struct qeth_cmd_buffer *iob)
522 struct qeth_card *card;
523 struct qeth_reply *reply, *r;
524 struct qeth_ipa_cmd *cmd;
528 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
530 card = CARD_FROM_CDEV(channel->ccwdev);
531 if (qeth_check_idx_response(iob->data)) {
532 qeth_clear_ipacmd_list(card);
533 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
534 dev_err(&card->gdev->dev,
535 "The qeth device is not configured "
536 "for the OSI layer required by z/VM\n");
537 qeth_schedule_recovery(card);
541 cmd = qeth_check_ipa_data(card, iob);
542 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
544 /*in case of OSN : check if cmd is set */
545 if (card->info.type == QETH_CARD_TYPE_OSN &&
547 cmd->hdr.command != IPA_CMD_STARTLAN &&
548 card->osn_info.assist_cb != NULL) {
549 card->osn_info.assist_cb(card->dev, cmd);
553 spin_lock_irqsave(&card->lock, flags);
554 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
555 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
556 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
557 qeth_get_reply(reply);
558 list_del_init(&reply->list);
559 spin_unlock_irqrestore(&card->lock, flags);
561 if (reply->callback != NULL) {
563 reply->offset = (__u16)((char *)cmd -
565 keep_reply = reply->callback(card,
569 keep_reply = reply->callback(card,
574 reply->rc = (u16) cmd->hdr.return_code;
578 spin_lock_irqsave(&card->lock, flags);
579 list_add_tail(&reply->list,
580 &card->cmd_waiter_list);
581 spin_unlock_irqrestore(&card->lock, flags);
583 atomic_inc(&reply->received);
584 wake_up(&reply->wait_q);
586 qeth_put_reply(reply);
590 spin_unlock_irqrestore(&card->lock, flags);
592 memcpy(&card->seqno.pdu_hdr_ack,
593 QETH_PDU_HEADER_SEQ_NO(iob->data),
595 qeth_release_buffer(channel, iob);
598 static int qeth_setup_channel(struct qeth_channel *channel)
602 QETH_DBF_TEXT(SETUP, 2, "setupch");
603 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
604 channel->iob[cnt].data = (char *)
605 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
606 if (channel->iob[cnt].data == NULL)
608 channel->iob[cnt].state = BUF_STATE_FREE;
609 channel->iob[cnt].channel = channel;
610 channel->iob[cnt].callback = qeth_send_control_data_cb;
611 channel->iob[cnt].rc = 0;
613 if (cnt < QETH_CMD_BUFFER_NO) {
615 kfree(channel->iob[cnt].data);
619 channel->io_buf_no = 0;
620 atomic_set(&channel->irq_pending, 0);
621 spin_lock_init(&channel->iob_lock);
623 init_waitqueue_head(&channel->wait_q);
627 static int qeth_set_thread_start_bit(struct qeth_card *card,
628 unsigned long thread)
632 spin_lock_irqsave(&card->thread_mask_lock, flags);
633 if (!(card->thread_allowed_mask & thread) ||
634 (card->thread_start_mask & thread)) {
635 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
638 card->thread_start_mask |= thread;
639 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
643 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
647 spin_lock_irqsave(&card->thread_mask_lock, flags);
648 card->thread_start_mask &= ~thread;
649 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
650 wake_up(&card->wait_q);
652 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
654 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
658 spin_lock_irqsave(&card->thread_mask_lock, flags);
659 card->thread_running_mask &= ~thread;
660 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
661 wake_up(&card->wait_q);
663 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
665 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
670 spin_lock_irqsave(&card->thread_mask_lock, flags);
671 if (card->thread_start_mask & thread) {
672 if ((card->thread_allowed_mask & thread) &&
673 !(card->thread_running_mask & thread)) {
675 card->thread_start_mask &= ~thread;
676 card->thread_running_mask |= thread;
680 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
684 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
688 wait_event(card->wait_q,
689 (rc = __qeth_do_run_thread(card, thread)) >= 0);
692 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
694 void qeth_schedule_recovery(struct qeth_card *card)
696 QETH_DBF_TEXT(TRACE, 2, "startrec");
697 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
698 schedule_work(&card->kernel_thread_starter);
700 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
702 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
707 sense = (char *) irb->ecw;
708 cstat = irb->scsw.cmd.cstat;
709 dstat = irb->scsw.cmd.dstat;
711 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
712 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
713 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
714 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
715 dev_warn(&cdev->dev, "The qeth device driver "
716 "failed to recover an error on the device\n");
717 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
718 dev_name(&cdev->dev), dstat, cstat);
719 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
724 if (dstat & DEV_STAT_UNIT_CHECK) {
725 if (sense[SENSE_RESETTING_EVENT_BYTE] &
726 SENSE_RESETTING_EVENT_FLAG) {
727 QETH_DBF_TEXT(TRACE, 2, "REVIND");
730 if (sense[SENSE_COMMAND_REJECT_BYTE] &
731 SENSE_COMMAND_REJECT_FLAG) {
732 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
735 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
736 QETH_DBF_TEXT(TRACE, 2, "AFFE");
739 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
740 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
743 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
749 static long __qeth_check_irb_error(struct ccw_device *cdev,
750 unsigned long intparm, struct irb *irb)
755 switch (PTR_ERR(irb)) {
757 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
758 dev_name(&cdev->dev));
759 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
760 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
763 dev_warn(&cdev->dev, "A hardware operation timed out"
765 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
766 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
767 if (intparm == QETH_RCD_PARM) {
768 struct qeth_card *card = CARD_FROM_CDEV(cdev);
770 if (card && (card->data.ccwdev == cdev)) {
771 card->data.state = CH_STATE_DOWN;
772 wake_up(&card->wait_q);
777 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
778 dev_name(&cdev->dev), PTR_ERR(irb));
779 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
780 QETH_DBF_TEXT(TRACE, 2, " rc???");
785 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
790 struct qeth_cmd_buffer *buffer;
791 struct qeth_channel *channel;
792 struct qeth_card *card;
793 struct qeth_cmd_buffer *iob;
796 QETH_DBF_TEXT(TRACE, 5, "irq");
798 if (__qeth_check_irb_error(cdev, intparm, irb))
800 cstat = irb->scsw.cmd.cstat;
801 dstat = irb->scsw.cmd.dstat;
803 card = CARD_FROM_CDEV(cdev);
807 if (card->read.ccwdev == cdev) {
808 channel = &card->read;
809 QETH_DBF_TEXT(TRACE, 5, "read");
810 } else if (card->write.ccwdev == cdev) {
811 channel = &card->write;
812 QETH_DBF_TEXT(TRACE, 5, "write");
814 channel = &card->data;
815 QETH_DBF_TEXT(TRACE, 5, "data");
817 atomic_set(&channel->irq_pending, 0);
819 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
820 channel->state = CH_STATE_STOPPED;
822 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
823 channel->state = CH_STATE_HALTED;
825 /*let's wake up immediately on data channel*/
826 if ((channel == &card->data) && (intparm != 0) &&
827 (intparm != QETH_RCD_PARM))
830 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
831 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
832 /* we don't have to handle this further */
835 if (intparm == QETH_HALT_CHANNEL_PARM) {
836 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
837 /* we don't have to handle this further */
840 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
841 (dstat & DEV_STAT_UNIT_CHECK) ||
843 if (irb->esw.esw0.erw.cons) {
844 dev_warn(&channel->ccwdev->dev,
845 "The qeth device driver failed to recover "
846 "an error on the device\n");
847 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
849 dev_name(&channel->ccwdev->dev), cstat, dstat);
850 print_hex_dump(KERN_WARNING, "qeth: irb ",
851 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
852 print_hex_dump(KERN_WARNING, "qeth: sense data ",
853 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
855 if (intparm == QETH_RCD_PARM) {
856 channel->state = CH_STATE_DOWN;
859 rc = qeth_get_problem(cdev, irb);
861 qeth_clear_ipacmd_list(card);
862 qeth_schedule_recovery(card);
867 if (intparm == QETH_RCD_PARM) {
868 channel->state = CH_STATE_RCD_DONE;
872 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
873 buffer->state = BUF_STATE_PROCESSED;
875 if (channel == &card->data)
877 if (channel == &card->read &&
878 channel->state == CH_STATE_UP)
879 qeth_issue_next_read(card);
882 index = channel->buf_no;
883 while (iob[index].state == BUF_STATE_PROCESSED) {
884 if (iob[index].callback != NULL)
885 iob[index].callback(channel, iob + index);
887 index = (index + 1) % QETH_CMD_BUFFER_NO;
889 channel->buf_no = index;
891 wake_up(&card->wait_q);
895 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
896 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
901 /* is PCI flag set on buffer? */
902 if (buf->buffer->element[0].flags & 0x40)
903 atomic_dec(&queue->set_pci_flags_count);
905 if (!qeth_skip_skb) {
906 skb = skb_dequeue(&buf->skb_list);
908 atomic_dec(&skb->users);
909 dev_kfree_skb_any(skb);
910 skb = skb_dequeue(&buf->skb_list);
913 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
914 if (buf->buffer->element[i].addr && buf->is_header[i])
915 kmem_cache_free(qeth_core_header_cache,
916 buf->buffer->element[i].addr);
917 buf->is_header[i] = 0;
918 buf->buffer->element[i].length = 0;
919 buf->buffer->element[i].addr = NULL;
920 buf->buffer->element[i].flags = 0;
922 buf->buffer->element[15].flags = 0;
923 buf->next_element_to_fill = 0;
924 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
927 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
928 struct qeth_qdio_out_buffer *buf)
930 __qeth_clear_output_buffer(queue, buf, 0);
933 void qeth_clear_qdio_buffers(struct qeth_card *card)
937 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
938 /* clear outbound buffers to free skbs */
939 for (i = 0; i < card->qdio.no_out_queues; ++i)
940 if (card->qdio.out_qs[i]) {
941 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
942 qeth_clear_output_buffer(card->qdio.out_qs[i],
943 &card->qdio.out_qs[i]->bufs[j]);
946 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
948 static void qeth_free_buffer_pool(struct qeth_card *card)
950 struct qeth_buffer_pool_entry *pool_entry, *tmp;
952 QETH_DBF_TEXT(TRACE, 5, "freepool");
953 list_for_each_entry_safe(pool_entry, tmp,
954 &card->qdio.init_pool.entry_list, init_list){
955 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
956 free_page((unsigned long)pool_entry->elements[i]);
957 list_del(&pool_entry->init_list);
962 static void qeth_free_qdio_buffers(struct qeth_card *card)
966 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
967 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
968 QETH_QDIO_UNINITIALIZED)
970 kfree(card->qdio.in_q);
971 card->qdio.in_q = NULL;
972 /* inbound buffer pool */
973 qeth_free_buffer_pool(card);
974 /* free outbound qdio_qs */
975 if (card->qdio.out_qs) {
976 for (i = 0; i < card->qdio.no_out_queues; ++i) {
977 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
978 qeth_clear_output_buffer(card->qdio.out_qs[i],
979 &card->qdio.out_qs[i]->bufs[j]);
980 kfree(card->qdio.out_qs[i]);
982 kfree(card->qdio.out_qs);
983 card->qdio.out_qs = NULL;
987 static void qeth_clean_channel(struct qeth_channel *channel)
991 QETH_DBF_TEXT(SETUP, 2, "freech");
992 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
993 kfree(channel->iob[cnt].data);
996 static int qeth_is_1920_device(struct qeth_card *card)
998 int single_queue = 0;
999 struct ccw_device *ccwdev;
1000 struct channelPath_dsc {
1011 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1013 ccwdev = card->data.ccwdev;
1014 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1015 if (chp_dsc != NULL) {
1016 /* CHPP field bit 6 == 1 -> single queue */
1017 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1020 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1021 return single_queue;
1024 static void qeth_init_qdio_info(struct qeth_card *card)
1026 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1027 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1029 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1030 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1031 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1032 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1033 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1036 static void qeth_set_intial_options(struct qeth_card *card)
1038 card->options.route4.type = NO_ROUTER;
1039 card->options.route6.type = NO_ROUTER;
1040 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1041 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1042 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1043 card->options.fake_broadcast = 0;
1044 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1045 card->options.performance_stats = 0;
1046 card->options.rx_sg_cb = QETH_RX_SG_CB;
1047 card->options.isolation = ISOLATION_MODE_NONE;
1050 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1052 unsigned long flags;
1055 spin_lock_irqsave(&card->thread_mask_lock, flags);
1056 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1057 (u8) card->thread_start_mask,
1058 (u8) card->thread_allowed_mask,
1059 (u8) card->thread_running_mask);
1060 rc = (card->thread_start_mask & thread);
1061 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1065 static void qeth_start_kernel_thread(struct work_struct *work)
1067 struct qeth_card *card = container_of(work, struct qeth_card,
1068 kernel_thread_starter);
1069 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1071 if (card->read.state != CH_STATE_UP &&
1072 card->write.state != CH_STATE_UP)
1074 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1075 kthread_run(card->discipline.recover, (void *) card,
1079 static int qeth_setup_card(struct qeth_card *card)
1082 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1083 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1085 card->read.state = CH_STATE_DOWN;
1086 card->write.state = CH_STATE_DOWN;
1087 card->data.state = CH_STATE_DOWN;
1088 card->state = CARD_STATE_DOWN;
1089 card->lan_online = 0;
1090 card->use_hard_stop = 0;
1092 spin_lock_init(&card->vlanlock);
1093 spin_lock_init(&card->mclock);
1094 card->vlangrp = NULL;
1095 spin_lock_init(&card->lock);
1096 spin_lock_init(&card->ip_lock);
1097 spin_lock_init(&card->thread_mask_lock);
1098 card->thread_start_mask = 0;
1099 card->thread_allowed_mask = 0;
1100 card->thread_running_mask = 0;
1101 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1102 INIT_LIST_HEAD(&card->ip_list);
1103 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1104 if (!card->ip_tbd_list) {
1105 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1108 INIT_LIST_HEAD(card->ip_tbd_list);
1109 INIT_LIST_HEAD(&card->cmd_waiter_list);
1110 init_waitqueue_head(&card->wait_q);
1111 /* intial options */
1112 qeth_set_intial_options(card);
1113 /* IP address takeover */
1114 INIT_LIST_HEAD(&card->ipato.entries);
1115 card->ipato.enabled = 0;
1116 card->ipato.invert4 = 0;
1117 card->ipato.invert6 = 0;
1118 if (card->info.type == QETH_CARD_TYPE_IQD)
1119 card->options.checksum_type = NO_CHECKSUMMING;
1120 /* init QDIO stuff */
1121 qeth_init_qdio_info(card);
1125 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1127 struct qeth_card *card = container_of(slr, struct qeth_card,
1128 qeth_service_level);
1129 if (card->info.mcl_level[0])
1130 seq_printf(m, "qeth: %s firmware level %s\n",
1131 CARD_BUS_ID(card), card->info.mcl_level);
1134 static struct qeth_card *qeth_alloc_card(void)
1136 struct qeth_card *card;
1138 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1139 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1142 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1143 if (qeth_setup_channel(&card->read)) {
1147 if (qeth_setup_channel(&card->write)) {
1148 qeth_clean_channel(&card->read);
1152 card->options.layer2 = -1;
1153 card->qeth_service_level.seq_print = qeth_core_sl_print;
1154 register_service_level(&card->qeth_service_level);
1158 static int qeth_determine_card_type(struct qeth_card *card)
1162 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1164 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1165 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1166 while (known_devices[i][4]) {
1167 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1168 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1169 card->info.type = known_devices[i][4];
1170 card->qdio.no_out_queues = known_devices[i][8];
1171 card->info.is_multicast_different = known_devices[i][9];
1172 if (qeth_is_1920_device(card)) {
1173 dev_info(&card->gdev->dev,
1174 "Priority Queueing not supported\n");
1175 card->qdio.no_out_queues = 1;
1176 card->qdio.default_out_queue = 0;
1182 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1183 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1188 static int qeth_clear_channel(struct qeth_channel *channel)
1190 unsigned long flags;
1191 struct qeth_card *card;
1194 QETH_DBF_TEXT(TRACE, 3, "clearch");
1195 card = CARD_FROM_CDEV(channel->ccwdev);
1196 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1197 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1198 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1202 rc = wait_event_interruptible_timeout(card->wait_q,
1203 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1204 if (rc == -ERESTARTSYS)
1206 if (channel->state != CH_STATE_STOPPED)
1208 channel->state = CH_STATE_DOWN;
1212 static int qeth_halt_channel(struct qeth_channel *channel)
1214 unsigned long flags;
1215 struct qeth_card *card;
1218 QETH_DBF_TEXT(TRACE, 3, "haltch");
1219 card = CARD_FROM_CDEV(channel->ccwdev);
1220 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1221 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1222 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1226 rc = wait_event_interruptible_timeout(card->wait_q,
1227 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1228 if (rc == -ERESTARTSYS)
1230 if (channel->state != CH_STATE_HALTED)
1235 static int qeth_halt_channels(struct qeth_card *card)
1237 int rc1 = 0, rc2 = 0, rc3 = 0;
1239 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1240 rc1 = qeth_halt_channel(&card->read);
1241 rc2 = qeth_halt_channel(&card->write);
1242 rc3 = qeth_halt_channel(&card->data);
1250 static int qeth_clear_channels(struct qeth_card *card)
1252 int rc1 = 0, rc2 = 0, rc3 = 0;
1254 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1255 rc1 = qeth_clear_channel(&card->read);
1256 rc2 = qeth_clear_channel(&card->write);
1257 rc3 = qeth_clear_channel(&card->data);
1265 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1269 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1270 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1273 rc = qeth_halt_channels(card);
1276 return qeth_clear_channels(card);
1279 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1283 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1284 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1285 QETH_QDIO_CLEANING)) {
1286 case QETH_QDIO_ESTABLISHED:
1287 if (card->info.type == QETH_CARD_TYPE_IQD)
1288 rc = qdio_cleanup(CARD_DDEV(card),
1289 QDIO_FLAG_CLEANUP_USING_HALT);
1291 rc = qdio_cleanup(CARD_DDEV(card),
1292 QDIO_FLAG_CLEANUP_USING_CLEAR);
1294 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1295 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1297 case QETH_QDIO_CLEANING:
1302 rc = qeth_clear_halt_card(card, use_halt);
1304 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1305 card->state = CARD_STATE_DOWN;
1308 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1310 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1316 struct qeth_channel *channel = &card->data;
1317 unsigned long flags;
1320 * scan for RCD command in extended SenseID data
1322 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1323 if (!ciw || ciw->cmd == 0)
1325 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1329 channel->ccw.cmd_code = ciw->cmd;
1330 channel->ccw.cda = (__u32) __pa(rcd_buf);
1331 channel->ccw.count = ciw->count;
1332 channel->ccw.flags = CCW_FLAG_SLI;
1333 channel->state = CH_STATE_RCD;
1334 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1335 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1336 QETH_RCD_PARM, LPM_ANYPATH, 0,
1338 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1340 wait_event(card->wait_q,
1341 (channel->state == CH_STATE_RCD_DONE ||
1342 channel->state == CH_STATE_DOWN));
1343 if (channel->state == CH_STATE_DOWN)
1346 channel->state = CH_STATE_DOWN;
1352 *length = ciw->count;
1358 static int qeth_get_unitaddr(struct qeth_card *card)
1364 QETH_DBF_TEXT(SETUP, 2, "getunit");
1365 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1367 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
1368 dev_name(&card->gdev->dev), rc);
1371 card->info.chpid = prcd[30];
1372 card->info.unit_addr2 = prcd[31];
1373 card->info.cula = prcd[63];
1374 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1375 (prcd[0x11] == _ascebc['M']));
1380 static void qeth_init_tokens(struct qeth_card *card)
1382 card->token.issuer_rm_w = 0x00010103UL;
1383 card->token.cm_filter_w = 0x00010108UL;
1384 card->token.cm_connection_w = 0x0001010aUL;
1385 card->token.ulp_filter_w = 0x0001010bUL;
1386 card->token.ulp_connection_w = 0x0001010dUL;
1389 static void qeth_init_func_level(struct qeth_card *card)
1391 if (card->ipato.enabled) {
1392 if (card->info.type == QETH_CARD_TYPE_IQD)
1393 card->info.func_level =
1394 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1396 card->info.func_level =
1397 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1399 if (card->info.type == QETH_CARD_TYPE_IQD)
1400 /*FIXME:why do we have same values for dis and ena for
1402 card->info.func_level =
1403 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1405 card->info.func_level =
1406 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1410 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1411 void (*idx_reply_cb)(struct qeth_channel *,
1412 struct qeth_cmd_buffer *))
1414 struct qeth_cmd_buffer *iob;
1415 unsigned long flags;
1417 struct qeth_card *card;
1419 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1420 card = CARD_FROM_CDEV(channel->ccwdev);
1421 iob = qeth_get_buffer(channel);
1422 iob->callback = idx_reply_cb;
1423 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1424 channel->ccw.count = QETH_BUFSIZE;
1425 channel->ccw.cda = (__u32) __pa(iob->data);
1427 wait_event(card->wait_q,
1428 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1429 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1430 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1431 rc = ccw_device_start(channel->ccwdev,
1432 &channel->ccw, (addr_t) iob, 0, 0);
1433 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1436 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1437 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1438 atomic_set(&channel->irq_pending, 0);
1439 wake_up(&card->wait_q);
1442 rc = wait_event_interruptible_timeout(card->wait_q,
1443 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1444 if (rc == -ERESTARTSYS)
1446 if (channel->state != CH_STATE_UP) {
1448 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1449 qeth_clear_cmd_buffers(channel);
1455 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1456 void (*idx_reply_cb)(struct qeth_channel *,
1457 struct qeth_cmd_buffer *))
1459 struct qeth_card *card;
1460 struct qeth_cmd_buffer *iob;
1461 unsigned long flags;
1465 struct ccw_dev_id temp_devid;
1467 card = CARD_FROM_CDEV(channel->ccwdev);
1469 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1471 iob = qeth_get_buffer(channel);
1472 iob->callback = idx_reply_cb;
1473 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1474 channel->ccw.count = IDX_ACTIVATE_SIZE;
1475 channel->ccw.cda = (__u32) __pa(iob->data);
1476 if (channel == &card->write) {
1477 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1478 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1479 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1480 card->seqno.trans_hdr++;
1482 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1483 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1484 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1486 tmp = ((__u8)card->info.portno) | 0x80;
1487 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1488 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1489 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1490 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1491 &card->info.func_level, sizeof(__u16));
1492 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1493 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1494 temp = (card->info.cula << 8) + card->info.unit_addr2;
1495 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1497 wait_event(card->wait_q,
1498 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1499 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1500 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1501 rc = ccw_device_start(channel->ccwdev,
1502 &channel->ccw, (addr_t) iob, 0, 0);
1503 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1506 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1508 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1509 atomic_set(&channel->irq_pending, 0);
1510 wake_up(&card->wait_q);
1513 rc = wait_event_interruptible_timeout(card->wait_q,
1514 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1515 if (rc == -ERESTARTSYS)
1517 if (channel->state != CH_STATE_ACTIVATING) {
1518 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1519 " failed to recover an error on the device\n");
1520 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1521 dev_name(&channel->ccwdev->dev));
1522 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1523 qeth_clear_cmd_buffers(channel);
1526 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1529 static int qeth_peer_func_level(int level)
1531 if ((level & 0xff) == 8)
1532 return (level & 0xff) + 0x400;
1533 if (((level >> 8) & 3) == 1)
1534 return (level & 0xff) + 0x200;
1538 static void qeth_idx_write_cb(struct qeth_channel *channel,
1539 struct qeth_cmd_buffer *iob)
1541 struct qeth_card *card;
1544 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1546 if (channel->state == CH_STATE_DOWN) {
1547 channel->state = CH_STATE_ACTIVATING;
1550 card = CARD_FROM_CDEV(channel->ccwdev);
1552 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1553 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1554 dev_err(&card->write.ccwdev->dev,
1555 "The adapter is used exclusively by another "
1558 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1559 " negative reply\n",
1560 dev_name(&card->write.ccwdev->dev));
1563 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1564 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1565 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1566 "function level mismatch (sent: 0x%x, received: "
1567 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1568 card->info.func_level, temp);
1571 channel->state = CH_STATE_UP;
1573 qeth_release_buffer(channel, iob);
1576 static void qeth_idx_read_cb(struct qeth_channel *channel,
1577 struct qeth_cmd_buffer *iob)
1579 struct qeth_card *card;
1582 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1583 if (channel->state == CH_STATE_DOWN) {
1584 channel->state = CH_STATE_ACTIVATING;
1588 card = CARD_FROM_CDEV(channel->ccwdev);
1589 if (qeth_check_idx_response(iob->data))
1592 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1593 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1594 dev_err(&card->write.ccwdev->dev,
1595 "The adapter is used exclusively by another "
1598 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1599 " negative reply\n",
1600 dev_name(&card->read.ccwdev->dev));
1605 * temporary fix for microcode bug
1606 * to revert it,replace OR by AND
1608 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1609 (card->info.type == QETH_CARD_TYPE_OSAE))
1610 card->info.portname_required = 1;
1612 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1613 if (temp != qeth_peer_func_level(card->info.func_level)) {
1614 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1615 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1616 dev_name(&card->read.ccwdev->dev),
1617 card->info.func_level, temp);
1620 memcpy(&card->token.issuer_rm_r,
1621 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1622 QETH_MPC_TOKEN_LENGTH);
1623 memcpy(&card->info.mcl_level[0],
1624 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1625 channel->state = CH_STATE_UP;
1627 qeth_release_buffer(channel, iob);
1630 void qeth_prepare_control_data(struct qeth_card *card, int len,
1631 struct qeth_cmd_buffer *iob)
1633 qeth_setup_ccw(&card->write, iob->data, len);
1634 iob->callback = qeth_release_buffer;
1636 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1637 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1638 card->seqno.trans_hdr++;
1639 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1640 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1641 card->seqno.pdu_hdr++;
1642 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1643 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1644 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1646 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1648 int qeth_send_control_data(struct qeth_card *card, int len,
1649 struct qeth_cmd_buffer *iob,
1650 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1655 unsigned long flags;
1656 struct qeth_reply *reply = NULL;
1657 unsigned long timeout, event_timeout;
1658 struct qeth_ipa_cmd *cmd;
1660 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1662 reply = qeth_alloc_reply(card);
1666 reply->callback = reply_cb;
1667 reply->param = reply_param;
1668 if (card->state == CARD_STATE_DOWN)
1669 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1671 reply->seqno = card->seqno.ipa++;
1672 init_waitqueue_head(&reply->wait_q);
1673 spin_lock_irqsave(&card->lock, flags);
1674 list_add_tail(&reply->list, &card->cmd_waiter_list);
1675 spin_unlock_irqrestore(&card->lock, flags);
1676 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1678 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1679 qeth_prepare_control_data(card, len, iob);
1681 if (IS_IPA(iob->data))
1682 event_timeout = QETH_IPA_TIMEOUT;
1684 event_timeout = QETH_TIMEOUT;
1685 timeout = jiffies + event_timeout;
1687 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1688 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1689 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1690 (addr_t) iob, 0, 0);
1691 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1693 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1694 "ccw_device_start rc = %i\n",
1695 dev_name(&card->write.ccwdev->dev), rc);
1696 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1697 spin_lock_irqsave(&card->lock, flags);
1698 list_del_init(&reply->list);
1699 qeth_put_reply(reply);
1700 spin_unlock_irqrestore(&card->lock, flags);
1701 qeth_release_buffer(iob->channel, iob);
1702 atomic_set(&card->write.irq_pending, 0);
1703 wake_up(&card->wait_q);
1707 /* we have only one long running ipassist, since we can ensure
1708 process context of this command we can sleep */
1709 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1710 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1711 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1712 if (!wait_event_timeout(reply->wait_q,
1713 atomic_read(&reply->received), event_timeout))
1716 while (!atomic_read(&reply->received)) {
1717 if (time_after(jiffies, timeout))
1724 qeth_put_reply(reply);
1728 spin_lock_irqsave(&reply->card->lock, flags);
1729 list_del_init(&reply->list);
1730 spin_unlock_irqrestore(&reply->card->lock, flags);
1732 atomic_inc(&reply->received);
1733 wake_up(&reply->wait_q);
1735 qeth_put_reply(reply);
1738 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1740 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1743 struct qeth_cmd_buffer *iob;
1745 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1747 iob = (struct qeth_cmd_buffer *) data;
1748 memcpy(&card->token.cm_filter_r,
1749 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1750 QETH_MPC_TOKEN_LENGTH);
1751 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1755 static int qeth_cm_enable(struct qeth_card *card)
1758 struct qeth_cmd_buffer *iob;
1760 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1762 iob = qeth_wait_for_buffer(&card->write);
1763 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1764 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1765 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1766 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1767 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1769 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1770 qeth_cm_enable_cb, NULL);
1774 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1778 struct qeth_cmd_buffer *iob;
1780 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1782 iob = (struct qeth_cmd_buffer *) data;
1783 memcpy(&card->token.cm_connection_r,
1784 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1785 QETH_MPC_TOKEN_LENGTH);
1786 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1790 static int qeth_cm_setup(struct qeth_card *card)
1793 struct qeth_cmd_buffer *iob;
1795 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1797 iob = qeth_wait_for_buffer(&card->write);
1798 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1799 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1800 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1801 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1802 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1803 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1804 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1805 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1806 qeth_cm_setup_cb, NULL);
1811 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1813 switch (card->info.type) {
1814 case QETH_CARD_TYPE_UNKNOWN:
1816 case QETH_CARD_TYPE_IQD:
1817 return card->info.max_mtu;
1818 case QETH_CARD_TYPE_OSAE:
1819 switch (card->info.link_type) {
1820 case QETH_LINK_TYPE_HSTR:
1821 case QETH_LINK_TYPE_LANE_TR:
1831 static inline int qeth_get_max_mtu_for_card(int cardtype)
1835 case QETH_CARD_TYPE_UNKNOWN:
1836 case QETH_CARD_TYPE_OSAE:
1837 case QETH_CARD_TYPE_OSN:
1839 case QETH_CARD_TYPE_IQD:
1846 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1849 case QETH_CARD_TYPE_IQD:
1856 static inline int qeth_get_mtu_outof_framesize(int framesize)
1858 switch (framesize) {
1872 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1874 switch (card->info.type) {
1875 case QETH_CARD_TYPE_OSAE:
1876 return ((mtu >= 576) && (mtu <= 61440));
1877 case QETH_CARD_TYPE_IQD:
1878 return ((mtu >= 576) &&
1879 (mtu <= card->info.max_mtu + 4096 - 32));
1880 case QETH_CARD_TYPE_OSN:
1881 case QETH_CARD_TYPE_UNKNOWN:
1887 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1891 __u16 mtu, framesize;
1894 struct qeth_cmd_buffer *iob;
1896 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1898 iob = (struct qeth_cmd_buffer *) data;
1899 memcpy(&card->token.ulp_filter_r,
1900 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1901 QETH_MPC_TOKEN_LENGTH);
1902 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1903 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1904 mtu = qeth_get_mtu_outof_framesize(framesize);
1907 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1910 card->info.max_mtu = mtu;
1911 card->info.initial_mtu = mtu;
1912 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1914 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1915 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1916 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1919 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1920 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1922 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1923 card->info.link_type = link_type;
1925 card->info.link_type = 0;
1926 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1930 static int qeth_ulp_enable(struct qeth_card *card)
1934 struct qeth_cmd_buffer *iob;
1936 /*FIXME: trace view callbacks*/
1937 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1939 iob = qeth_wait_for_buffer(&card->write);
1940 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1942 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1943 (__u8) card->info.portno;
1944 if (card->options.layer2)
1945 if (card->info.type == QETH_CARD_TYPE_OSN)
1946 prot_type = QETH_PROT_OSN2;
1948 prot_type = QETH_PROT_LAYER2;
1950 prot_type = QETH_PROT_TCPIP;
1952 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1953 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1954 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1955 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1956 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1957 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1958 card->info.portname, 9);
1959 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1960 qeth_ulp_enable_cb, NULL);
1965 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1968 struct qeth_cmd_buffer *iob;
1970 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1972 iob = (struct qeth_cmd_buffer *) data;
1973 memcpy(&card->token.ulp_connection_r,
1974 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1975 QETH_MPC_TOKEN_LENGTH);
1976 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1980 static int qeth_ulp_setup(struct qeth_card *card)
1984 struct qeth_cmd_buffer *iob;
1985 struct ccw_dev_id dev_id;
1987 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1989 iob = qeth_wait_for_buffer(&card->write);
1990 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1992 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1993 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1994 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1995 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1996 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1997 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1999 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2000 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2001 temp = (card->info.cula << 8) + card->info.unit_addr2;
2002 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2003 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2004 qeth_ulp_setup_cb, NULL);
2008 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2012 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2014 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2015 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2018 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2020 if (!card->qdio.in_q)
2022 QETH_DBF_TEXT(SETUP, 2, "inq");
2023 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2024 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2025 /* give inbound qeth_qdio_buffers their qdio_buffers */
2026 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2027 card->qdio.in_q->bufs[i].buffer =
2028 &card->qdio.in_q->qdio_bufs[i];
2029 /* inbound buffer pool */
2030 if (qeth_alloc_buffer_pool(card))
2034 kmalloc(card->qdio.no_out_queues *
2035 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2036 if (!card->qdio.out_qs)
2038 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2039 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2041 if (!card->qdio.out_qs[i])
2043 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2044 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2045 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2046 card->qdio.out_qs[i]->queue_no = i;
2047 /* give outbound qeth_qdio_buffers their qdio_buffers */
2048 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2049 card->qdio.out_qs[i]->bufs[j].buffer =
2050 &card->qdio.out_qs[i]->qdio_bufs[j];
2051 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2054 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2055 &qdio_out_skb_queue_key);
2056 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2063 kfree(card->qdio.out_qs[--i]);
2064 kfree(card->qdio.out_qs);
2065 card->qdio.out_qs = NULL;
2067 qeth_free_buffer_pool(card);
2069 kfree(card->qdio.in_q);
2070 card->qdio.in_q = NULL;
2072 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2076 static void qeth_create_qib_param_field(struct qeth_card *card,
2080 param_field[0] = _ascebc['P'];
2081 param_field[1] = _ascebc['C'];
2082 param_field[2] = _ascebc['I'];
2083 param_field[3] = _ascebc['T'];
2084 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2085 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2086 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2089 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2092 param_field[16] = _ascebc['B'];
2093 param_field[17] = _ascebc['L'];
2094 param_field[18] = _ascebc['K'];
2095 param_field[19] = _ascebc['T'];
2096 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2097 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2098 *((unsigned int *) (¶m_field[28])) =
2099 card->info.blkt.inter_packet_jumbo;
2102 static int qeth_qdio_activate(struct qeth_card *card)
2104 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2105 return qdio_activate(CARD_DDEV(card));
2108 static int qeth_dm_act(struct qeth_card *card)
2111 struct qeth_cmd_buffer *iob;
2113 QETH_DBF_TEXT(SETUP, 2, "dmact");
2115 iob = qeth_wait_for_buffer(&card->write);
2116 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2118 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2119 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2120 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2121 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2122 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2126 static int qeth_mpc_initialize(struct qeth_card *card)
2130 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2132 rc = qeth_issue_next_read(card);
2134 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2137 rc = qeth_cm_enable(card);
2139 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2142 rc = qeth_cm_setup(card);
2144 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2147 rc = qeth_ulp_enable(card);
2149 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2152 rc = qeth_ulp_setup(card);
2154 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2157 rc = qeth_alloc_qdio_buffers(card);
2159 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2162 rc = qeth_qdio_establish(card);
2164 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2165 qeth_free_qdio_buffers(card);
2168 rc = qeth_qdio_activate(card);
2170 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2173 rc = qeth_dm_act(card);
2175 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2181 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2185 static void qeth_print_status_with_portname(struct qeth_card *card)
2190 sprintf(dbf_text, "%s", card->info.portname + 1);
2191 for (i = 0; i < 8; i++)
2193 (char) _ebcasc[(__u8) dbf_text[i]];
2195 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2196 "with link type %s (portname: %s)\n",
2197 qeth_get_cardname(card),
2198 (card->info.mcl_level[0]) ? " (level: " : "",
2199 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2200 (card->info.mcl_level[0]) ? ")" : "",
2201 qeth_get_cardname_short(card),
2206 static void qeth_print_status_no_portname(struct qeth_card *card)
2208 if (card->info.portname[0])
2209 dev_info(&card->gdev->dev, "Device is a%s "
2210 "card%s%s%s\nwith link type %s "
2211 "(no portname needed by interface).\n",
2212 qeth_get_cardname(card),
2213 (card->info.mcl_level[0]) ? " (level: " : "",
2214 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2215 (card->info.mcl_level[0]) ? ")" : "",
2216 qeth_get_cardname_short(card));
2218 dev_info(&card->gdev->dev, "Device is a%s "
2219 "card%s%s%s\nwith link type %s.\n",
2220 qeth_get_cardname(card),
2221 (card->info.mcl_level[0]) ? " (level: " : "",
2222 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2223 (card->info.mcl_level[0]) ? ")" : "",
2224 qeth_get_cardname_short(card));
2227 void qeth_print_status_message(struct qeth_card *card)
2229 switch (card->info.type) {
2230 case QETH_CARD_TYPE_OSAE:
2231 /* VM will use a non-zero first character
2232 * to indicate a HiperSockets like reporting
2233 * of the level OSA sets the first character to zero
2235 if (!card->info.mcl_level[0]) {
2236 sprintf(card->info.mcl_level, "%02x%02x",
2237 card->info.mcl_level[2],
2238 card->info.mcl_level[3]);
2240 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2244 case QETH_CARD_TYPE_IQD:
2245 if ((card->info.guestlan) ||
2246 (card->info.mcl_level[0] & 0x80)) {
2247 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2248 card->info.mcl_level[0]];
2249 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2250 card->info.mcl_level[1]];
2251 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2252 card->info.mcl_level[2]];
2253 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2254 card->info.mcl_level[3]];
2255 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2259 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2261 if (card->info.portname_required)
2262 qeth_print_status_with_portname(card);
2264 qeth_print_status_no_portname(card);
2266 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2268 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2270 struct qeth_buffer_pool_entry *entry;
2272 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2274 list_for_each_entry(entry,
2275 &card->qdio.init_pool.entry_list, init_list) {
2276 qeth_put_buffer_pool_entry(card, entry);
2280 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2281 struct qeth_card *card)
2283 struct list_head *plh;
2284 struct qeth_buffer_pool_entry *entry;
2288 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2291 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2292 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2294 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2295 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2301 list_del_init(&entry->list);
2306 /* no free buffer in pool so take first one and swap pages */
2307 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2308 struct qeth_buffer_pool_entry, list);
2309 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2310 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2311 page = alloc_page(GFP_ATOMIC);
2315 free_page((unsigned long)entry->elements[i]);
2316 entry->elements[i] = page_address(page);
2317 if (card->options.performance_stats)
2318 card->perf_stats.sg_alloc_page_rx++;
2322 list_del_init(&entry->list);
2326 static int qeth_init_input_buffer(struct qeth_card *card,
2327 struct qeth_qdio_buffer *buf)
2329 struct qeth_buffer_pool_entry *pool_entry;
2332 pool_entry = qeth_find_free_buffer_pool_entry(card);
2337 * since the buffer is accessed only from the input_tasklet
2338 * there shouldn't be a need to synchronize; also, since we use
2339 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2343 buf->pool_entry = pool_entry;
2344 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2345 buf->buffer->element[i].length = PAGE_SIZE;
2346 buf->buffer->element[i].addr = pool_entry->elements[i];
2347 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2348 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2350 buf->buffer->element[i].flags = 0;
2355 int qeth_init_qdio_queues(struct qeth_card *card)
2360 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2363 memset(card->qdio.in_q->qdio_bufs, 0,
2364 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2365 qeth_initialize_working_pool_list(card);
2366 /*give only as many buffers to hardware as we have buffer pool entries*/
2367 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2368 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2369 card->qdio.in_q->next_buf_to_init =
2370 card->qdio.in_buf_pool.buf_count - 1;
2371 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2372 card->qdio.in_buf_pool.buf_count - 1);
2374 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2377 /* outbound queue */
2378 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2379 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2380 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2381 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2382 qeth_clear_output_buffer(card->qdio.out_qs[i],
2383 &card->qdio.out_qs[i]->bufs[j]);
2385 card->qdio.out_qs[i]->card = card;
2386 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2387 card->qdio.out_qs[i]->do_pack = 0;
2388 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2389 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2390 atomic_set(&card->qdio.out_qs[i]->state,
2391 QETH_OUT_Q_UNLOCKED);
2395 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2397 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2399 switch (link_type) {
2400 case QETH_LINK_TYPE_HSTR:
2407 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2408 struct qeth_ipa_cmd *cmd, __u8 command,
2409 enum qeth_prot_versions prot)
2411 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2412 cmd->hdr.command = command;
2413 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2414 cmd->hdr.seqno = card->seqno.ipa;
2415 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2416 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2417 if (card->options.layer2)
2418 cmd->hdr.prim_version_no = 2;
2420 cmd->hdr.prim_version_no = 1;
2421 cmd->hdr.param_count = 1;
2422 cmd->hdr.prot_version = prot;
2423 cmd->hdr.ipa_supported = 0;
2424 cmd->hdr.ipa_enabled = 0;
2427 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2428 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2430 struct qeth_cmd_buffer *iob;
2431 struct qeth_ipa_cmd *cmd;
2433 iob = qeth_wait_for_buffer(&card->write);
2434 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2435 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2439 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2441 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2444 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2445 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2446 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2447 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2449 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2451 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2452 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2459 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2461 if (card->options.layer2)
2462 if (card->info.type == QETH_CARD_TYPE_OSN)
2463 prot_type = QETH_PROT_OSN2;
2465 prot_type = QETH_PROT_LAYER2;
2467 prot_type = QETH_PROT_TCPIP;
2468 qeth_prepare_ipa_cmd(card, iob, prot_type);
2469 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2470 iob, reply_cb, reply_param);
2473 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2475 static int qeth_send_startstoplan(struct qeth_card *card,
2476 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2479 struct qeth_cmd_buffer *iob;
2481 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2482 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2487 int qeth_send_startlan(struct qeth_card *card)
2491 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2493 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2496 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2498 int qeth_send_stoplan(struct qeth_card *card)
2503 * TODO: according to the IPA format document page 14,
2504 * TCP/IP (we!) never issue a STOPLAN
2507 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2509 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2512 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2514 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2515 struct qeth_reply *reply, unsigned long data)
2517 struct qeth_ipa_cmd *cmd;
2519 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2521 cmd = (struct qeth_ipa_cmd *) data;
2522 if (cmd->hdr.return_code == 0)
2523 cmd->hdr.return_code =
2524 cmd->data.setadapterparms.hdr.return_code;
2527 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2529 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2530 struct qeth_reply *reply, unsigned long data)
2532 struct qeth_ipa_cmd *cmd;
2534 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2536 cmd = (struct qeth_ipa_cmd *) data;
2537 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2538 card->info.link_type =
2539 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2540 card->options.adp.supported_funcs =
2541 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2542 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2545 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2546 __u32 command, __u32 cmdlen)
2548 struct qeth_cmd_buffer *iob;
2549 struct qeth_ipa_cmd *cmd;
2551 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2553 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2554 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2555 cmd->data.setadapterparms.hdr.command_code = command;
2556 cmd->data.setadapterparms.hdr.used_total = 1;
2557 cmd->data.setadapterparms.hdr.seq_no = 1;
2561 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2563 int qeth_query_setadapterparms(struct qeth_card *card)
2566 struct qeth_cmd_buffer *iob;
2568 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2569 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2570 sizeof(struct qeth_ipacmd_setadpparms));
2571 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2574 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2576 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2577 const char *dbftext)
2580 QETH_DBF_TEXT(TRACE, 2, dbftext);
2581 QETH_DBF_TEXT(QERR, 2, dbftext);
2582 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2583 buf->element[15].flags & 0xff);
2584 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2585 buf->element[14].flags & 0xff);
2586 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2591 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2593 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2595 struct qeth_qdio_q *queue = card->qdio.in_q;
2601 count = (index < queue->next_buf_to_init)?
2602 card->qdio.in_buf_pool.buf_count -
2603 (queue->next_buf_to_init - index) :
2604 card->qdio.in_buf_pool.buf_count -
2605 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2606 /* only requeue at a certain threshold to avoid SIGAs */
2607 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2608 for (i = queue->next_buf_to_init;
2609 i < queue->next_buf_to_init + count; ++i) {
2610 if (qeth_init_input_buffer(card,
2611 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2618 if (newcount < count) {
2619 /* we are in memory shortage so we switch back to
2620 traditional skb allocation and drop packages */
2621 atomic_set(&card->force_alloc_skb, 3);
2624 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2628 * according to old code it should be avoided to requeue all
2629 * 128 buffers in order to benefit from PCI avoidance.
2630 * this function keeps at least one buffer (the buffer at
2631 * 'index') un-requeued -> this buffer is the first buffer that
2632 * will be requeued the next time
2634 if (card->options.performance_stats) {
2635 card->perf_stats.inbound_do_qdio_cnt++;
2636 card->perf_stats.inbound_do_qdio_start_time =
2639 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2640 queue->next_buf_to_init, count);
2641 if (card->options.performance_stats)
2642 card->perf_stats.inbound_do_qdio_time +=
2644 card->perf_stats.inbound_do_qdio_start_time;
2646 dev_warn(&card->gdev->dev,
2647 "QDIO reported an error, rc=%i\n", rc);
2648 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2649 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2651 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2652 QDIO_MAX_BUFFERS_PER_Q;
2655 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2657 static int qeth_handle_send_error(struct qeth_card *card,
2658 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2660 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2662 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2663 if (card->info.type == QETH_CARD_TYPE_IQD) {
2670 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
2673 return QETH_SEND_ERROR_NONE;
2675 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2676 return QETH_SEND_ERROR_RETRY;
2678 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2679 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2680 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2681 (u16)qdio_err, (u8)sbalf15);
2682 return QETH_SEND_ERROR_LINK_FAILURE;
2686 * Switched to packing state if the number of used buffers on a queue
2687 * reaches a certain limit.
2689 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2691 if (!queue->do_pack) {
2692 if (atomic_read(&queue->used_buffers)
2693 >= QETH_HIGH_WATERMARK_PACK){
2694 /* switch non-PACKING -> PACKING */
2695 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2696 if (queue->card->options.performance_stats)
2697 queue->card->perf_stats.sc_dp_p++;
2704 * Switches from packing to non-packing mode. If there is a packing
2705 * buffer on the queue this buffer will be prepared to be flushed.
2706 * In that case 1 is returned to inform the caller. If no buffer
2707 * has to be flushed, zero is returned.
2709 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2711 struct qeth_qdio_out_buffer *buffer;
2712 int flush_count = 0;
2714 if (queue->do_pack) {
2715 if (atomic_read(&queue->used_buffers)
2716 <= QETH_LOW_WATERMARK_PACK) {
2717 /* switch PACKING -> non-PACKING */
2718 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2719 if (queue->card->options.performance_stats)
2720 queue->card->perf_stats.sc_p_dp++;
2722 /* flush packing buffers */
2723 buffer = &queue->bufs[queue->next_buf_to_fill];
2724 if ((atomic_read(&buffer->state) ==
2725 QETH_QDIO_BUF_EMPTY) &&
2726 (buffer->next_element_to_fill > 0)) {
2727 atomic_set(&buffer->state,
2728 QETH_QDIO_BUF_PRIMED);
2730 queue->next_buf_to_fill =
2731 (queue->next_buf_to_fill + 1) %
2732 QDIO_MAX_BUFFERS_PER_Q;
2740 * Called to flush a packing buffer if no more pci flags are on the queue.
2741 * Checks if there is a packing buffer and prepares it to be flushed.
2742 * In that case returns 1, otherwise zero.
2744 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2746 struct qeth_qdio_out_buffer *buffer;
2748 buffer = &queue->bufs[queue->next_buf_to_fill];
2749 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2750 (buffer->next_element_to_fill > 0)) {
2751 /* it's a packing buffer */
2752 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2753 queue->next_buf_to_fill =
2754 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2760 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2763 struct qeth_qdio_out_buffer *buf;
2766 unsigned int qdio_flags;
2768 for (i = index; i < index + count; ++i) {
2769 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2770 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2771 SBAL_FLAGS_LAST_ENTRY;
2773 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2776 if (!queue->do_pack) {
2777 if ((atomic_read(&queue->used_buffers) >=
2778 (QETH_HIGH_WATERMARK_PACK -
2779 QETH_WATERMARK_PACK_FUZZ)) &&
2780 !atomic_read(&queue->set_pci_flags_count)) {
2781 /* it's likely that we'll go to packing
2783 atomic_inc(&queue->set_pci_flags_count);
2784 buf->buffer->element[0].flags |= 0x40;
2787 if (!atomic_read(&queue->set_pci_flags_count)) {
2789 * there's no outstanding PCI any more, so we
2790 * have to request a PCI to be sure the the PCI
2791 * will wake at some time in the future then we
2792 * can flush packed buffers that might still be
2793 * hanging around, which can happen if no
2794 * further send was requested by the stack
2796 atomic_inc(&queue->set_pci_flags_count);
2797 buf->buffer->element[0].flags |= 0x40;
2802 queue->sync_iqdio_error = 0;
2803 queue->card->dev->trans_start = jiffies;
2804 if (queue->card->options.performance_stats) {
2805 queue->card->perf_stats.outbound_do_qdio_cnt++;
2806 queue->card->perf_stats.outbound_do_qdio_start_time =
2809 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2810 if (atomic_read(&queue->set_pci_flags_count))
2811 qdio_flags |= QDIO_FLAG_PCI_OUT;
2812 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2813 queue->queue_no, index, count);
2814 if (queue->card->options.performance_stats)
2815 queue->card->perf_stats.outbound_do_qdio_time +=
2817 queue->card->perf_stats.outbound_do_qdio_start_time;
2819 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2820 queue->sync_iqdio_error = rc & 3;
2823 queue->card->stats.tx_errors += count;
2824 /* ignore temporary SIGA errors without busy condition */
2825 if (rc == QDIO_ERROR_SIGA_TARGET)
2827 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2828 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2829 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2831 /* this must not happen under normal circumstances. if it
2832 * happens something is really wrong -> recover */
2833 qeth_schedule_recovery(queue->card);
2836 atomic_add(count, &queue->used_buffers);
2837 if (queue->card->options.performance_stats)
2838 queue->card->perf_stats.bufs_sent += count;
2841 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2845 int q_was_packing = 0;
2848 * check if weed have to switch to non-packing mode or if
2849 * we have to get a pci flag out on the queue
2851 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2852 !atomic_read(&queue->set_pci_flags_count)) {
2853 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2854 QETH_OUT_Q_UNLOCKED) {
2856 * If we get in here, there was no action in
2857 * do_send_packet. So, we check if there is a
2858 * packing buffer to be flushed here.
2860 netif_stop_queue(queue->card->dev);
2861 index = queue->next_buf_to_fill;
2862 q_was_packing = queue->do_pack;
2863 /* queue->do_pack may change */
2865 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2867 !atomic_read(&queue->set_pci_flags_count))
2869 qeth_flush_buffers_on_no_pci(queue);
2870 if (queue->card->options.performance_stats &&
2872 queue->card->perf_stats.bufs_sent_pack +=
2875 qeth_flush_buffers(queue, index, flush_cnt);
2876 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2881 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2882 unsigned int qdio_error, int __queue, int first_element,
2883 int count, unsigned long card_ptr)
2885 struct qeth_card *card = (struct qeth_card *) card_ptr;
2886 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2887 struct qeth_qdio_out_buffer *buffer;
2889 unsigned qeth_send_err;
2891 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2892 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2893 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2894 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2895 netif_stop_queue(card->dev);
2896 qeth_schedule_recovery(card);
2899 if (card->options.performance_stats) {
2900 card->perf_stats.outbound_handler_cnt++;
2901 card->perf_stats.outbound_handler_start_time =
2904 for (i = first_element; i < (first_element + count); ++i) {
2905 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2906 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2907 __qeth_clear_output_buffer(queue, buffer,
2908 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2910 atomic_sub(count, &queue->used_buffers);
2911 /* check if we need to do something on this outbound queue */
2912 if (card->info.type != QETH_CARD_TYPE_IQD)
2913 qeth_check_outbound_queue(queue);
2915 netif_wake_queue(queue->card->dev);
2916 if (card->options.performance_stats)
2917 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2918 card->perf_stats.outbound_handler_start_time;
2920 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2922 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2923 int ipv, int cast_type)
2925 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2926 return card->qdio.default_out_queue;
2927 switch (card->qdio.no_out_queues) {
2929 if (cast_type && card->info.is_multicast_different)
2930 return card->info.is_multicast_different &
2931 (card->qdio.no_out_queues - 1);
2932 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2933 const u8 tos = ip_hdr(skb)->tos;
2935 if (card->qdio.do_prio_queueing ==
2936 QETH_PRIO_Q_ING_TOS) {
2937 if (tos & IP_TOS_NOTIMPORTANT)
2939 if (tos & IP_TOS_HIGHRELIABILITY)
2941 if (tos & IP_TOS_HIGHTHROUGHPUT)
2943 if (tos & IP_TOS_LOWDELAY)
2946 if (card->qdio.do_prio_queueing ==
2947 QETH_PRIO_Q_ING_PREC)
2948 return 3 - (tos >> 6);
2949 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2952 return card->qdio.default_out_queue;
2953 case 1: /* fallthrough for single-out-queue 1920-device */
2955 return card->qdio.default_out_queue;
2958 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2960 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2961 struct sk_buff *skb, int elems)
2963 int elements_needed = 0;
2965 if (skb_shinfo(skb)->nr_frags > 0)
2966 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
2967 if (elements_needed == 0)
2968 elements_needed = 1 + (((((unsigned long) skb->data) %
2969 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
2970 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
2971 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
2972 "(Number=%d / Length=%d). Discarded.\n",
2973 (elements_needed+elems), skb->len);
2976 return elements_needed;
2978 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
2980 static inline void __qeth_fill_buffer(struct sk_buff *skb,
2981 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
2984 int length = skb->len;
2990 element = *next_element_to_fill;
2992 first_lap = (is_tso == 0 ? 1 : 0);
2995 data = skb->data + offset;
3000 while (length > 0) {
3001 /* length_here is the remaining amount of data in this page */
3002 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3003 if (length < length_here)
3004 length_here = length;
3006 buffer->element[element].addr = data;
3007 buffer->element[element].length = length_here;
3008 length -= length_here;
3011 buffer->element[element].flags = 0;
3013 buffer->element[element].flags =
3014 SBAL_FLAGS_LAST_FRAG;
3017 buffer->element[element].flags =
3018 SBAL_FLAGS_FIRST_FRAG;
3020 buffer->element[element].flags =
3021 SBAL_FLAGS_MIDDLE_FRAG;
3023 data += length_here;
3027 *next_element_to_fill = element;
3030 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3031 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3032 struct qeth_hdr *hdr, int offset, int hd_len)
3034 struct qdio_buffer *buffer;
3035 int flush_cnt = 0, hdr_len, large_send = 0;
3037 buffer = buf->buffer;
3038 atomic_inc(&skb->users);
3039 skb_queue_tail(&buf->skb_list, skb);
3041 /*check first on TSO ....*/
3042 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3043 int element = buf->next_element_to_fill;
3045 hdr_len = sizeof(struct qeth_hdr_tso) +
3046 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3047 /*fill first buffer entry only with header information */
3048 buffer->element[element].addr = skb->data;
3049 buffer->element[element].length = hdr_len;
3050 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3051 buf->next_element_to_fill++;
3052 skb->data += hdr_len;
3053 skb->len -= hdr_len;
3058 int element = buf->next_element_to_fill;
3059 buffer->element[element].addr = hdr;
3060 buffer->element[element].length = sizeof(struct qeth_hdr) +
3062 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3063 buf->is_header[element] = 1;
3064 buf->next_element_to_fill++;
3067 if (skb_shinfo(skb)->nr_frags == 0)
3068 __qeth_fill_buffer(skb, buffer, large_send,
3069 (int *)&buf->next_element_to_fill, offset);
3071 __qeth_fill_buffer_frag(skb, buffer, large_send,
3072 (int *)&buf->next_element_to_fill);
3074 if (!queue->do_pack) {
3075 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3076 /* set state to PRIMED -> will be flushed */
3077 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3080 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3081 if (queue->card->options.performance_stats)
3082 queue->card->perf_stats.skbs_sent_pack++;
3083 if (buf->next_element_to_fill >=
3084 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3086 * packed buffer if full -> set state PRIMED
3087 * -> will be flushed
3089 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3096 int qeth_do_send_packet_fast(struct qeth_card *card,
3097 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3098 struct qeth_hdr *hdr, int elements_needed,
3099 int offset, int hd_len)
3101 struct qeth_qdio_out_buffer *buffer;
3102 struct sk_buff *skb1;
3103 struct qeth_skb_data *retry_ctrl;
3107 /* spin until we get the queue ... */
3108 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3109 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3110 /* ... now we've got the queue */
3111 index = queue->next_buf_to_fill;
3112 buffer = &queue->bufs[queue->next_buf_to_fill];
3114 * check if buffer is empty to make sure that we do not 'overtake'
3115 * ourselves and try to fill a buffer that is already primed
3117 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3119 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3120 QDIO_MAX_BUFFERS_PER_Q;
3121 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3122 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3123 qeth_flush_buffers(queue, index, 1);
3124 if (queue->sync_iqdio_error == 2) {
3125 skb1 = skb_dequeue(&buffer->skb_list);
3127 atomic_dec(&skb1->users);
3128 skb1 = skb_dequeue(&buffer->skb_list);
3130 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3131 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3132 retry_ctrl->magic = QETH_SKB_MAGIC;
3133 retry_ctrl->count = 0;
3135 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3136 retry_ctrl->count++;
3137 rc = dev_queue_xmit(skb);
3139 dev_kfree_skb_any(skb);
3140 QETH_DBF_TEXT(QERR, 2, "qrdrop");
3145 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3148 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3150 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3151 struct sk_buff *skb, struct qeth_hdr *hdr,
3152 int elements_needed)
3154 struct qeth_qdio_out_buffer *buffer;
3156 int flush_count = 0;
3161 /* spin until we get the queue ... */
3162 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3163 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3164 start_index = queue->next_buf_to_fill;
3165 buffer = &queue->bufs[queue->next_buf_to_fill];
3167 * check if buffer is empty to make sure that we do not 'overtake'
3168 * ourselves and try to fill a buffer that is already primed
3170 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3171 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3174 /* check if we need to switch packing state of this queue */
3175 qeth_switch_to_packing_if_needed(queue);
3176 if (queue->do_pack) {
3178 /* does packet fit in current buffer? */
3179 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3180 buffer->next_element_to_fill) < elements_needed) {
3181 /* ... no -> set state PRIMED */
3182 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3184 queue->next_buf_to_fill =
3185 (queue->next_buf_to_fill + 1) %
3186 QDIO_MAX_BUFFERS_PER_Q;
3187 buffer = &queue->bufs[queue->next_buf_to_fill];
3188 /* we did a step forward, so check buffer state
3190 if (atomic_read(&buffer->state) !=
3191 QETH_QDIO_BUF_EMPTY) {
3192 qeth_flush_buffers(queue, start_index,
3194 atomic_set(&queue->state,
3195 QETH_OUT_Q_UNLOCKED);
3200 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3201 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3202 QDIO_MAX_BUFFERS_PER_Q;
3205 qeth_flush_buffers(queue, start_index, flush_count);
3206 else if (!atomic_read(&queue->set_pci_flags_count))
3207 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3209 * queue->state will go from LOCKED -> UNLOCKED or from
3210 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3211 * (switch packing state or flush buffer to get another pci flag out).
3212 * In that case we will enter this loop
3214 while (atomic_dec_return(&queue->state)) {
3216 start_index = queue->next_buf_to_fill;
3217 /* check if we can go back to non-packing state */
3218 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3220 * check if we need to flush a packing buffer to get a pci
3221 * flag out on the queue
3223 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3224 flush_count += qeth_flush_buffers_on_no_pci(queue);
3226 qeth_flush_buffers(queue, start_index, flush_count);
3228 /* at this point the queue is UNLOCKED again */
3229 if (queue->card->options.performance_stats && do_pack)
3230 queue->card->perf_stats.bufs_sent_pack += flush_count;
3234 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3236 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3237 struct qeth_reply *reply, unsigned long data)
3239 struct qeth_ipa_cmd *cmd;
3240 struct qeth_ipacmd_setadpparms *setparms;
3242 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3244 cmd = (struct qeth_ipa_cmd *) data;
3245 setparms = &(cmd->data.setadapterparms);
3247 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3248 if (cmd->hdr.return_code) {
3249 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3250 setparms->data.mode = SET_PROMISC_MODE_OFF;
3252 card->info.promisc_mode = setparms->data.mode;
3256 void qeth_setadp_promisc_mode(struct qeth_card *card)
3258 enum qeth_ipa_promisc_modes mode;
3259 struct net_device *dev = card->dev;
3260 struct qeth_cmd_buffer *iob;
3261 struct qeth_ipa_cmd *cmd;
3263 QETH_DBF_TEXT(TRACE, 4, "setprom");
3265 if (((dev->flags & IFF_PROMISC) &&
3266 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3267 (!(dev->flags & IFF_PROMISC) &&
3268 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3270 mode = SET_PROMISC_MODE_OFF;
3271 if (dev->flags & IFF_PROMISC)
3272 mode = SET_PROMISC_MODE_ON;
3273 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3275 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3276 sizeof(struct qeth_ipacmd_setadpparms));
3277 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3278 cmd->data.setadapterparms.data.mode = mode;
3279 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3281 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3283 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3285 struct qeth_card *card;
3288 card = dev->ml_priv;
3290 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3291 sprintf(dbf_text, "%8x", new_mtu);
3292 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3296 if (new_mtu > 65535)
3298 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3299 (!qeth_mtu_is_valid(card, new_mtu)))
3304 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3306 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3308 struct qeth_card *card;
3310 card = dev->ml_priv;
3312 QETH_DBF_TEXT(TRACE, 5, "getstat");
3314 return &card->stats;
3316 EXPORT_SYMBOL_GPL(qeth_get_stats);
3318 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3319 struct qeth_reply *reply, unsigned long data)
3321 struct qeth_ipa_cmd *cmd;
3323 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3325 cmd = (struct qeth_ipa_cmd *) data;
3326 if (!card->options.layer2 ||
3327 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3328 memcpy(card->dev->dev_addr,
3329 &cmd->data.setadapterparms.data.change_addr.addr,
3331 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3333 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3337 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3340 struct qeth_cmd_buffer *iob;
3341 struct qeth_ipa_cmd *cmd;
3343 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3345 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3346 sizeof(struct qeth_ipacmd_setadpparms));
3347 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3348 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3349 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3350 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3351 card->dev->dev_addr, OSA_ADDR_LEN);
3352 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3356 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3358 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3359 struct qeth_reply *reply, unsigned long data)
3361 struct qeth_ipa_cmd *cmd;
3362 struct qeth_set_access_ctrl *access_ctrl_req;
3365 QETH_DBF_TEXT(TRACE, 4, "setaccb");
3367 cmd = (struct qeth_ipa_cmd *) data;
3368 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3369 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3370 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3371 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3372 cmd->data.setadapterparms.hdr.return_code);
3373 switch (cmd->data.setadapterparms.hdr.return_code) {
3374 case SET_ACCESS_CTRL_RC_SUCCESS:
3375 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3376 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3378 card->options.isolation = access_ctrl_req->subcmd_code;
3379 if (card->options.isolation == ISOLATION_MODE_NONE) {
3380 dev_info(&card->gdev->dev,
3381 "QDIO data connection isolation is deactivated\n");
3383 dev_info(&card->gdev->dev,
3384 "QDIO data connection isolation is activated\n");
3386 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3387 card->gdev->dev.kobj.name,
3388 access_ctrl_req->subcmd_code,
3389 cmd->data.setadapterparms.hdr.return_code);
3393 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3395 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3396 card->gdev->dev.kobj.name,
3397 access_ctrl_req->subcmd_code,
3398 cmd->data.setadapterparms.hdr.return_code);
3399 dev_err(&card->gdev->dev, "Adapter does not "
3400 "support QDIO data connection isolation\n");
3402 /* ensure isolation mode is "none" */
3403 card->options.isolation = ISOLATION_MODE_NONE;
3407 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3409 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3410 card->gdev->dev.kobj.name,
3411 access_ctrl_req->subcmd_code,
3412 cmd->data.setadapterparms.hdr.return_code);
3413 dev_err(&card->gdev->dev,
3414 "Adapter is dedicated. "
3415 "QDIO data connection isolation not supported\n");
3417 /* ensure isolation mode is "none" */
3418 card->options.isolation = ISOLATION_MODE_NONE;
3422 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3424 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3425 card->gdev->dev.kobj.name,
3426 access_ctrl_req->subcmd_code,
3427 cmd->data.setadapterparms.hdr.return_code);
3428 dev_err(&card->gdev->dev,
3429 "TSO does not permit QDIO data connection isolation\n");
3431 /* ensure isolation mode is "none" */
3432 card->options.isolation = ISOLATION_MODE_NONE;
3438 /* this should never happen */
3439 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3441 card->gdev->dev.kobj.name,
3442 access_ctrl_req->subcmd_code,
3443 cmd->data.setadapterparms.hdr.return_code);
3445 /* ensure isolation mode is "none" */
3446 card->options.isolation = ISOLATION_MODE_NONE;
3451 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3455 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3456 enum qeth_ipa_isolation_modes isolation)
3459 struct qeth_cmd_buffer *iob;
3460 struct qeth_ipa_cmd *cmd;
3461 struct qeth_set_access_ctrl *access_ctrl_req;
3463 QETH_DBF_TEXT(TRACE, 4, "setacctl");
3465 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3466 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3468 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3469 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3470 sizeof(struct qeth_set_access_ctrl));
3471 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3472 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3473 access_ctrl_req->subcmd_code = isolation;
3475 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3477 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3481 int qeth_set_access_ctrl_online(struct qeth_card *card)
3485 QETH_DBF_TEXT(TRACE, 4, "setactlo");
3487 if (card->info.type == QETH_CARD_TYPE_OSAE &&
3488 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3489 rc = qeth_setadpparms_set_access_ctrl(card,
3490 card->options.isolation);
3493 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed",
3494 card->gdev->dev.kobj.name,
3497 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3498 card->options.isolation = ISOLATION_MODE_NONE;
3500 dev_err(&card->gdev->dev, "Adapter does not "
3501 "support QDIO data connection isolation\n");
3506 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3508 void qeth_tx_timeout(struct net_device *dev)
3510 struct qeth_card *card;
3512 card = dev->ml_priv;
3513 card->stats.tx_errors++;
3514 qeth_schedule_recovery(card);
3516 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3518 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3520 struct qeth_card *card = dev->ml_priv;
3524 case MII_BMCR: /* Basic mode control register */
3526 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3527 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3528 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3529 rc |= BMCR_SPEED100;
3531 case MII_BMSR: /* Basic mode status register */
3532 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3533 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3536 case MII_PHYSID1: /* PHYS ID 1 */
3537 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3539 rc = (rc >> 5) & 0xFFFF;
3541 case MII_PHYSID2: /* PHYS ID 2 */
3542 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3544 case MII_ADVERTISE: /* Advertisement control reg */
3547 case MII_LPA: /* Link partner ability reg */
3548 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3549 LPA_100BASE4 | LPA_LPACK;
3551 case MII_EXPANSION: /* Expansion register */
3553 case MII_DCOUNTER: /* disconnect counter */
3555 case MII_FCSCOUNTER: /* false carrier counter */
3557 case MII_NWAYTEST: /* N-way auto-neg test register */
3559 case MII_RERRCOUNTER: /* rx error counter */
3560 rc = card->stats.rx_errors;
3562 case MII_SREVISION: /* silicon revision */
3564 case MII_RESV1: /* reserved 1 */
3566 case MII_LBRERROR: /* loopback, rx, bypass error */
3568 case MII_PHYADDR: /* physical address */
3570 case MII_RESV2: /* reserved 2 */
3572 case MII_TPISTATUS: /* TPI status for 10mbps */
3574 case MII_NCONFIG: /* network interface config */
3581 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3583 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3584 struct qeth_cmd_buffer *iob, int len,
3585 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3591 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3593 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3594 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3595 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3596 /* adjust PDU length fields in IPA_PDU_HEADER */
3597 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3599 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3600 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3601 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3602 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3603 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3604 reply_cb, reply_param);
3607 static int qeth_snmp_command_cb(struct qeth_card *card,
3608 struct qeth_reply *reply, unsigned long sdata)
3610 struct qeth_ipa_cmd *cmd;
3611 struct qeth_arp_query_info *qinfo;
3612 struct qeth_snmp_cmd *snmp;
3613 unsigned char *data;
3616 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3618 cmd = (struct qeth_ipa_cmd *) sdata;
3619 data = (unsigned char *)((char *)cmd - reply->offset);
3620 qinfo = (struct qeth_arp_query_info *) reply->param;
3621 snmp = &cmd->data.setadapterparms.data.snmp;
3623 if (cmd->hdr.return_code) {
3624 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3627 if (cmd->data.setadapterparms.hdr.return_code) {
3628 cmd->hdr.return_code =
3629 cmd->data.setadapterparms.hdr.return_code;
3630 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3633 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3634 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3635 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3637 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3639 /* check if there is enough room in userspace */
3640 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3641 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3642 cmd->hdr.return_code = -ENOMEM;
3645 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3646 cmd->data.setadapterparms.hdr.used_total);
3647 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3648 cmd->data.setadapterparms.hdr.seq_no);
3649 /*copy entries to user buffer*/
3650 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3651 memcpy(qinfo->udata + qinfo->udata_offset,
3653 data_len + offsetof(struct qeth_snmp_cmd, data));
3654 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3656 memcpy(qinfo->udata + qinfo->udata_offset,
3657 (char *)&snmp->request, data_len);
3659 qinfo->udata_offset += data_len;
3660 /* check if all replies received ... */
3661 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3662 cmd->data.setadapterparms.hdr.used_total);
3663 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3664 cmd->data.setadapterparms.hdr.seq_no);
3665 if (cmd->data.setadapterparms.hdr.seq_no <
3666 cmd->data.setadapterparms.hdr.used_total)
3671 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3673 struct qeth_cmd_buffer *iob;
3674 struct qeth_ipa_cmd *cmd;
3675 struct qeth_snmp_ureq *ureq;
3677 struct qeth_arp_query_info qinfo = {0, };
3680 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3682 if (card->info.guestlan)
3685 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3686 (!card->options.layer2)) {
3689 /* skip 4 bytes (data_len struct member) to get req_len */
3690 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3692 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3694 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3697 if (copy_from_user(ureq, udata,
3698 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3702 qinfo.udata_len = ureq->hdr.data_len;
3703 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3708 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3710 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3711 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3712 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3713 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3714 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3715 qeth_snmp_command_cb, (void *)&qinfo);
3717 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3718 QETH_CARD_IFNAME(card), rc);
3720 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3728 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3730 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3732 switch (card->info.type) {
3733 case QETH_CARD_TYPE_IQD:
3740 static int qeth_qdio_establish(struct qeth_card *card)
3742 struct qdio_initialize init_data;
3743 char *qib_param_field;
3744 struct qdio_buffer **in_sbal_ptrs;
3745 struct qdio_buffer **out_sbal_ptrs;
3749 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3751 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3753 if (!qib_param_field)
3756 qeth_create_qib_param_field(card, qib_param_field);
3757 qeth_create_qib_param_field_blkt(card, qib_param_field);
3759 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3761 if (!in_sbal_ptrs) {
3762 kfree(qib_param_field);
3765 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3766 in_sbal_ptrs[i] = (struct qdio_buffer *)
3767 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3770 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3771 sizeof(void *), GFP_KERNEL);
3772 if (!out_sbal_ptrs) {
3773 kfree(in_sbal_ptrs);
3774 kfree(qib_param_field);
3777 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3778 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3779 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3780 card->qdio.out_qs[i]->bufs[j].buffer);
3783 memset(&init_data, 0, sizeof(struct qdio_initialize));
3784 init_data.cdev = CARD_DDEV(card);
3785 init_data.q_format = qeth_get_qdio_q_format(card);
3786 init_data.qib_param_field_format = 0;
3787 init_data.qib_param_field = qib_param_field;
3788 init_data.no_input_qs = 1;
3789 init_data.no_output_qs = card->qdio.no_out_queues;
3790 init_data.input_handler = card->discipline.input_handler;
3791 init_data.output_handler = card->discipline.output_handler;
3792 init_data.int_parm = (unsigned long) card;
3793 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3794 QDIO_OUTBOUND_0COPY_SBALS |
3795 QDIO_USE_OUTBOUND_PCIS;
3796 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3797 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3799 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3800 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3801 rc = qdio_initialize(&init_data);
3803 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3805 kfree(out_sbal_ptrs);
3806 kfree(in_sbal_ptrs);
3807 kfree(qib_param_field);
3811 static void qeth_core_free_card(struct qeth_card *card)
3814 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3815 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3816 qeth_clean_channel(&card->read);
3817 qeth_clean_channel(&card->write);
3819 free_netdev(card->dev);
3820 kfree(card->ip_tbd_list);
3821 qeth_free_qdio_buffers(card);
3822 unregister_service_level(&card->qeth_service_level);
3826 static struct ccw_device_id qeth_ids[] = {
3827 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3828 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3829 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3832 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3834 static struct ccw_driver qeth_ccw_driver = {
3837 .probe = ccwgroup_probe_ccwdev,
3838 .remove = ccwgroup_remove_ccwdev,
3841 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3842 unsigned long driver_id)
3844 return ccwgroup_create_from_string(root_dev, driver_id,
3845 &qeth_ccw_driver, 3, buf);
3848 int qeth_core_hardsetup_card(struct qeth_card *card)
3850 struct qdio_ssqd_desc *ssqd;
3855 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3856 atomic_set(&card->force_alloc_skb, 0);
3859 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3860 dev_name(&card->gdev->dev));
3861 ccw_device_set_offline(CARD_DDEV(card));
3862 ccw_device_set_offline(CARD_WDEV(card));
3863 ccw_device_set_offline(CARD_RDEV(card));
3864 rc = ccw_device_set_online(CARD_RDEV(card));
3867 rc = ccw_device_set_online(CARD_WDEV(card));
3870 rc = ccw_device_set_online(CARD_DDEV(card));
3873 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3875 if (rc == -ERESTARTSYS) {
3876 QETH_DBF_TEXT(SETUP, 2, "break1");
3879 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3886 rc = qeth_get_unitaddr(card);
3888 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3892 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3897 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3903 mpno = min(mpno - 1, QETH_MAX_PORTNO);
3904 if (card->info.portno > mpno) {
3905 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3906 "\n.", CARD_BUS_ID(card), card->info.portno);
3910 qeth_init_tokens(card);
3911 qeth_init_func_level(card);
3912 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3913 if (rc == -ERESTARTSYS) {
3914 QETH_DBF_TEXT(SETUP, 2, "break2");
3917 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3923 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3924 if (rc == -ERESTARTSYS) {
3925 QETH_DBF_TEXT(SETUP, 2, "break3");
3928 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3934 rc = qeth_mpc_initialize(card);
3936 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3941 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3942 "an error on the device\n");
3943 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3944 dev_name(&card->gdev->dev), rc);
3947 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3949 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3950 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3952 struct page *page = virt_to_page(element->addr);
3953 if (*pskb == NULL) {
3954 /* the upper protocol layers assume that there is data in the
3955 * skb itself. Copy a small amount (64 bytes) to make them
3957 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3960 skb_reserve(*pskb, ETH_HLEN);
3961 if (data_len <= 64) {
3962 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3966 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3967 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3969 (*pskb)->data_len += data_len - 64;
3970 (*pskb)->len += data_len - 64;
3971 (*pskb)->truesize += data_len - 64;
3976 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3977 (*pskb)->data_len += data_len;
3978 (*pskb)->len += data_len;
3979 (*pskb)->truesize += data_len;
3985 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3986 struct qdio_buffer *buffer,
3987 struct qdio_buffer_element **__element, int *__offset,
3988 struct qeth_hdr **hdr)
3990 struct qdio_buffer_element *element = *__element;
3991 int offset = *__offset;
3992 struct sk_buff *skb = NULL;
4000 /* qeth_hdr must not cross element boundaries */
4001 if (element->length < offset + sizeof(struct qeth_hdr)) {
4002 if (qeth_is_last_sbale(element))
4006 if (element->length < sizeof(struct qeth_hdr))
4009 *hdr = element->addr + offset;
4011 offset += sizeof(struct qeth_hdr);
4012 if (card->options.layer2) {
4013 if (card->info.type == QETH_CARD_TYPE_OSN) {
4014 skb_len = (*hdr)->hdr.osn.pdu_length;
4015 headroom = sizeof(struct qeth_hdr);
4017 skb_len = (*hdr)->hdr.l2.pkt_length;
4020 skb_len = (*hdr)->hdr.l3.length;
4021 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4022 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4025 headroom = ETH_HLEN;
4031 if ((skb_len >= card->options.rx_sg_cb) &&
4032 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4033 (!atomic_read(&card->force_alloc_skb))) {
4036 skb = dev_alloc_skb(skb_len + headroom);
4040 skb_reserve(skb, headroom);
4043 data_ptr = element->addr + offset;
4045 data_len = min(skb_len, (int)(element->length - offset));
4048 if (qeth_create_skb_frag(element, &skb, offset,
4052 memcpy(skb_put(skb, data_len), data_ptr,
4056 skb_len -= data_len;
4058 if (qeth_is_last_sbale(element)) {
4059 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4060 QETH_DBF_TEXT_(TRACE, 4, "%s",
4062 QETH_DBF_TEXT(QERR, 2, "unexeob");
4063 QETH_DBF_TEXT_(QERR, 2, "%s",
4065 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4066 dev_kfree_skb_any(skb);
4067 card->stats.rx_errors++;
4072 data_ptr = element->addr;
4077 *__element = element;
4079 if (use_rx_sg && card->options.performance_stats) {
4080 card->perf_stats.sg_skbs_rx++;
4081 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4085 if (net_ratelimit()) {
4086 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4087 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4089 card->stats.rx_dropped++;
4092 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4094 static void qeth_unregister_dbf_views(void)
4097 for (x = 0; x < QETH_DBF_INFOS; x++) {
4098 debug_unregister(qeth_dbf[x].id);
4099 qeth_dbf[x].id = NULL;
4103 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4105 char dbf_txt_buf[32];
4108 if (level > (qeth_dbf[dbf_nix].id)->level)
4110 va_start(args, fmt);
4111 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4113 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4115 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4117 static int qeth_register_dbf_views(void)
4122 for (x = 0; x < QETH_DBF_INFOS; x++) {
4123 /* register the areas */
4124 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4128 if (qeth_dbf[x].id == NULL) {
4129 qeth_unregister_dbf_views();
4133 /* register a view */
4134 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4136 qeth_unregister_dbf_views();
4140 /* set a passing level */
4141 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4147 int qeth_core_load_discipline(struct qeth_card *card,
4148 enum qeth_discipline_id discipline)
4151 switch (discipline) {
4152 case QETH_DISCIPLINE_LAYER3:
4153 card->discipline.ccwgdriver = try_then_request_module(
4154 symbol_get(qeth_l3_ccwgroup_driver),
4157 case QETH_DISCIPLINE_LAYER2:
4158 card->discipline.ccwgdriver = try_then_request_module(
4159 symbol_get(qeth_l2_ccwgroup_driver),
4163 if (!card->discipline.ccwgdriver) {
4164 dev_err(&card->gdev->dev, "There is no kernel module to "
4165 "support discipline %d\n", discipline);
4171 void qeth_core_free_discipline(struct qeth_card *card)
4173 if (card->options.layer2)
4174 symbol_put(qeth_l2_ccwgroup_driver);
4176 symbol_put(qeth_l3_ccwgroup_driver);
4177 card->discipline.ccwgdriver = NULL;
4180 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4182 struct qeth_card *card;
4185 unsigned long flags;
4187 QETH_DBF_TEXT(SETUP, 2, "probedev");
4190 if (!get_device(dev))
4193 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4195 card = qeth_alloc_card();
4197 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4201 card->read.ccwdev = gdev->cdev[0];
4202 card->write.ccwdev = gdev->cdev[1];
4203 card->data.ccwdev = gdev->cdev[2];
4204 dev_set_drvdata(&gdev->dev, card);
4206 gdev->cdev[0]->handler = qeth_irq;
4207 gdev->cdev[1]->handler = qeth_irq;
4208 gdev->cdev[2]->handler = qeth_irq;
4210 rc = qeth_determine_card_type(card);
4212 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4215 rc = qeth_setup_card(card);
4217 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4221 if (card->info.type == QETH_CARD_TYPE_OSN) {
4222 rc = qeth_core_create_osn_attributes(dev);
4225 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4227 qeth_core_remove_osn_attributes(dev);
4230 rc = card->discipline.ccwgdriver->probe(card->gdev);
4232 qeth_core_free_discipline(card);
4233 qeth_core_remove_osn_attributes(dev);
4237 rc = qeth_core_create_device_attributes(dev);
4242 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4243 list_add_tail(&card->list, &qeth_core_card_list.list);
4244 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4248 qeth_core_free_card(card);
4254 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4256 unsigned long flags;
4257 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4259 QETH_DBF_TEXT(SETUP, 2, "removedv");
4260 if (card->discipline.ccwgdriver) {
4261 card->discipline.ccwgdriver->remove(gdev);
4262 qeth_core_free_discipline(card);
4265 if (card->info.type == QETH_CARD_TYPE_OSN) {
4266 qeth_core_remove_osn_attributes(&gdev->dev);
4268 qeth_core_remove_device_attributes(&gdev->dev);
4270 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4271 list_del(&card->list);
4272 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4273 qeth_core_free_card(card);
4274 dev_set_drvdata(&gdev->dev, NULL);
4275 put_device(&gdev->dev);
4279 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4281 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4285 if (!card->discipline.ccwgdriver) {
4286 if (card->info.type == QETH_CARD_TYPE_IQD)
4287 def_discipline = QETH_DISCIPLINE_LAYER3;
4289 def_discipline = QETH_DISCIPLINE_LAYER2;
4290 rc = qeth_core_load_discipline(card, def_discipline);
4293 rc = card->discipline.ccwgdriver->probe(card->gdev);
4297 rc = card->discipline.ccwgdriver->set_online(gdev);
4302 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4304 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4305 return card->discipline.ccwgdriver->set_offline(gdev);
4308 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4310 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4311 if (card->discipline.ccwgdriver &&
4312 card->discipline.ccwgdriver->shutdown)
4313 card->discipline.ccwgdriver->shutdown(gdev);
4316 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4318 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4319 if (card->discipline.ccwgdriver &&
4320 card->discipline.ccwgdriver->prepare)
4321 return card->discipline.ccwgdriver->prepare(gdev);
4325 static void qeth_core_complete(struct ccwgroup_device *gdev)
4327 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4328 if (card->discipline.ccwgdriver &&
4329 card->discipline.ccwgdriver->complete)
4330 card->discipline.ccwgdriver->complete(gdev);
4333 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4335 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4336 if (card->discipline.ccwgdriver &&
4337 card->discipline.ccwgdriver->freeze)
4338 return card->discipline.ccwgdriver->freeze(gdev);
4342 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4344 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4345 if (card->discipline.ccwgdriver &&
4346 card->discipline.ccwgdriver->thaw)
4347 return card->discipline.ccwgdriver->thaw(gdev);
4351 static int qeth_core_restore(struct ccwgroup_device *gdev)
4353 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4354 if (card->discipline.ccwgdriver &&
4355 card->discipline.ccwgdriver->restore)
4356 return card->discipline.ccwgdriver->restore(gdev);
4360 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4361 .owner = THIS_MODULE,
4363 .driver_id = 0xD8C5E3C8,
4364 .probe = qeth_core_probe_device,
4365 .remove = qeth_core_remove_device,
4366 .set_online = qeth_core_set_online,
4367 .set_offline = qeth_core_set_offline,
4368 .shutdown = qeth_core_shutdown,
4369 .prepare = qeth_core_prepare,
4370 .complete = qeth_core_complete,
4371 .freeze = qeth_core_freeze,
4372 .thaw = qeth_core_thaw,
4373 .restore = qeth_core_restore,
4377 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4381 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4382 qeth_core_ccwgroup_driver.driver_id);
4389 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4392 const char str[ETH_GSTRING_LEN];
4393 } qeth_ethtool_stats_keys[] = {
4398 {"tx skbs no packing"},
4399 {"tx buffers no packing"},
4400 {"tx skbs packing"},
4401 {"tx buffers packing"},
4404 /* 10 */{"rx sg skbs"},
4406 {"rx sg page allocs"},
4407 {"tx large kbytes"},
4409 {"tx pk state ch n->p"},
4410 {"tx pk state ch p->n"},
4411 {"tx pk watermark low"},
4412 {"tx pk watermark high"},
4413 {"queue 0 buffer usage"},
4414 /* 20 */{"queue 1 buffer usage"},
4415 {"queue 2 buffer usage"},
4416 {"queue 3 buffer usage"},
4417 {"rx handler time"},
4418 {"rx handler count"},
4419 {"rx do_QDIO time"},
4420 {"rx do_QDIO count"},
4421 {"tx handler time"},
4422 {"tx handler count"},
4424 /* 30 */{"tx count"},
4425 {"tx do_QDIO time"},
4426 {"tx do_QDIO count"},
4431 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4433 switch (stringset) {
4435 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4440 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4442 void qeth_core_get_ethtool_stats(struct net_device *dev,
4443 struct ethtool_stats *stats, u64 *data)
4445 struct qeth_card *card = dev->ml_priv;
4446 data[0] = card->stats.rx_packets -
4447 card->perf_stats.initial_rx_packets;
4448 data[1] = card->perf_stats.bufs_rec;
4449 data[2] = card->stats.tx_packets -
4450 card->perf_stats.initial_tx_packets;
4451 data[3] = card->perf_stats.bufs_sent;
4452 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4453 - card->perf_stats.skbs_sent_pack;
4454 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4455 data[6] = card->perf_stats.skbs_sent_pack;
4456 data[7] = card->perf_stats.bufs_sent_pack;
4457 data[8] = card->perf_stats.sg_skbs_sent;
4458 data[9] = card->perf_stats.sg_frags_sent;
4459 data[10] = card->perf_stats.sg_skbs_rx;
4460 data[11] = card->perf_stats.sg_frags_rx;
4461 data[12] = card->perf_stats.sg_alloc_page_rx;
4462 data[13] = (card->perf_stats.large_send_bytes >> 10);
4463 data[14] = card->perf_stats.large_send_cnt;
4464 data[15] = card->perf_stats.sc_dp_p;
4465 data[16] = card->perf_stats.sc_p_dp;
4466 data[17] = QETH_LOW_WATERMARK_PACK;
4467 data[18] = QETH_HIGH_WATERMARK_PACK;
4468 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4469 data[20] = (card->qdio.no_out_queues > 1) ?
4470 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4471 data[21] = (card->qdio.no_out_queues > 2) ?
4472 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4473 data[22] = (card->qdio.no_out_queues > 3) ?
4474 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4475 data[23] = card->perf_stats.inbound_time;
4476 data[24] = card->perf_stats.inbound_cnt;
4477 data[25] = card->perf_stats.inbound_do_qdio_time;
4478 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4479 data[27] = card->perf_stats.outbound_handler_time;
4480 data[28] = card->perf_stats.outbound_handler_cnt;
4481 data[29] = card->perf_stats.outbound_time;
4482 data[30] = card->perf_stats.outbound_cnt;
4483 data[31] = card->perf_stats.outbound_do_qdio_time;
4484 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4485 data[33] = card->perf_stats.tx_csum;
4486 data[34] = card->perf_stats.tx_lin;
4488 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4490 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4492 switch (stringset) {
4494 memcpy(data, &qeth_ethtool_stats_keys,
4495 sizeof(qeth_ethtool_stats_keys));
4502 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4504 void qeth_core_get_drvinfo(struct net_device *dev,
4505 struct ethtool_drvinfo *info)
4507 struct qeth_card *card = dev->ml_priv;
4508 if (card->options.layer2)
4509 strcpy(info->driver, "qeth_l2");
4511 strcpy(info->driver, "qeth_l3");
4513 strcpy(info->version, "1.0");
4514 strcpy(info->fw_version, card->info.mcl_level);
4515 sprintf(info->bus_info, "%s/%s/%s",
4518 CARD_DDEV_ID(card));
4520 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4522 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4523 struct ethtool_cmd *ecmd)
4525 struct qeth_card *card = netdev->ml_priv;
4526 enum qeth_link_types link_type;
4528 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4529 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4531 link_type = card->info.link_type;
4533 ecmd->transceiver = XCVR_INTERNAL;
4534 ecmd->supported = SUPPORTED_Autoneg;
4535 ecmd->advertising = ADVERTISED_Autoneg;
4536 ecmd->duplex = DUPLEX_FULL;
4537 ecmd->autoneg = AUTONEG_ENABLE;
4539 switch (link_type) {
4540 case QETH_LINK_TYPE_FAST_ETH:
4541 case QETH_LINK_TYPE_LANE_ETH100:
4542 ecmd->supported |= SUPPORTED_10baseT_Half |
4543 SUPPORTED_10baseT_Full |
4544 SUPPORTED_100baseT_Half |
4545 SUPPORTED_100baseT_Full |
4547 ecmd->advertising |= ADVERTISED_10baseT_Half |
4548 ADVERTISED_10baseT_Full |
4549 ADVERTISED_100baseT_Half |
4550 ADVERTISED_100baseT_Full |
4552 ecmd->speed = SPEED_100;
4553 ecmd->port = PORT_TP;
4556 case QETH_LINK_TYPE_GBIT_ETH:
4557 case QETH_LINK_TYPE_LANE_ETH1000:
4558 ecmd->supported |= SUPPORTED_10baseT_Half |
4559 SUPPORTED_10baseT_Full |
4560 SUPPORTED_100baseT_Half |
4561 SUPPORTED_100baseT_Full |
4562 SUPPORTED_1000baseT_Half |
4563 SUPPORTED_1000baseT_Full |
4565 ecmd->advertising |= ADVERTISED_10baseT_Half |
4566 ADVERTISED_10baseT_Full |
4567 ADVERTISED_100baseT_Half |
4568 ADVERTISED_100baseT_Full |
4569 ADVERTISED_1000baseT_Half |
4570 ADVERTISED_1000baseT_Full |
4572 ecmd->speed = SPEED_1000;
4573 ecmd->port = PORT_FIBRE;
4576 case QETH_LINK_TYPE_10GBIT_ETH:
4577 ecmd->supported |= SUPPORTED_10baseT_Half |
4578 SUPPORTED_10baseT_Full |
4579 SUPPORTED_100baseT_Half |
4580 SUPPORTED_100baseT_Full |
4581 SUPPORTED_1000baseT_Half |
4582 SUPPORTED_1000baseT_Full |
4583 SUPPORTED_10000baseT_Full |
4585 ecmd->advertising |= ADVERTISED_10baseT_Half |
4586 ADVERTISED_10baseT_Full |
4587 ADVERTISED_100baseT_Half |
4588 ADVERTISED_100baseT_Full |
4589 ADVERTISED_1000baseT_Half |
4590 ADVERTISED_1000baseT_Full |
4591 ADVERTISED_10000baseT_Full |
4593 ecmd->speed = SPEED_10000;
4594 ecmd->port = PORT_FIBRE;
4598 ecmd->supported |= SUPPORTED_10baseT_Half |
4599 SUPPORTED_10baseT_Full |
4601 ecmd->advertising |= ADVERTISED_10baseT_Half |
4602 ADVERTISED_10baseT_Full |
4604 ecmd->speed = SPEED_10;
4605 ecmd->port = PORT_TP;
4610 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4612 static int __init qeth_core_init(void)
4616 pr_info("loading core functions\n");
4617 INIT_LIST_HEAD(&qeth_core_card_list.list);
4618 rwlock_init(&qeth_core_card_list.rwlock);
4620 rc = qeth_register_dbf_views();
4623 rc = ccw_driver_register(&qeth_ccw_driver);
4626 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4629 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4630 &driver_attr_group);
4633 qeth_core_root_dev = root_device_register("qeth");
4634 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4638 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4639 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4640 if (!qeth_core_header_cache) {
4647 root_device_unregister(qeth_core_root_dev);
4649 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4650 &driver_attr_group);
4652 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4654 ccw_driver_unregister(&qeth_ccw_driver);
4656 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4657 qeth_unregister_dbf_views();
4659 pr_err("Initializing the qeth device driver failed\n");
4663 static void __exit qeth_core_exit(void)
4665 root_device_unregister(qeth_core_root_dev);
4666 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4667 &driver_attr_group);
4668 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4669 ccw_driver_unregister(&qeth_ccw_driver);
4670 kmem_cache_destroy(qeth_core_header_cache);
4671 qeth_unregister_dbf_views();
4672 pr_info("core functions removed\n");
4675 module_init(qeth_core_init);
4676 module_exit(qeth_core_exit);
4677 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4678 MODULE_DESCRIPTION("qeth core functions");
4679 MODULE_LICENSE("GPL");