2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
24 #include <asm/ebcdic.h>
27 #include "qeth_core.h"
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
47 EXPORT_SYMBOL_GPL(qeth_dbf);
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
51 struct kmem_cache *qeth_core_header_cache;
52 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
54 static struct device *qeth_core_root_dev;
55 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
56 static struct lock_class_key qdio_out_skb_queue_key;
58 static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
60 static int qeth_issue_next_read(struct qeth_card *);
61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63 static void qeth_free_buffer_pool(struct qeth_card *);
64 static int qeth_qdio_establish(struct qeth_card *);
67 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
68 struct qdio_buffer *buffer, int is_tso,
69 int *next_element_to_fill)
71 struct skb_frag_struct *frag;
74 int element, cnt, dlen;
76 fragno = skb_shinfo(skb)->nr_frags;
77 element = *next_element_to_fill;
81 buffer->element[element].flags =
82 SBAL_FLAGS_MIDDLE_FRAG;
84 buffer->element[element].flags =
85 SBAL_FLAGS_FIRST_FRAG;
86 dlen = skb->len - skb->data_len;
88 buffer->element[element].addr = skb->data;
89 buffer->element[element].length = dlen;
92 for (cnt = 0; cnt < fragno; cnt++) {
93 frag = &skb_shinfo(skb)->frags[cnt];
94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
96 buffer->element[element].addr = (char *)addr;
97 buffer->element[element].length = frag->size;
98 if (cnt < (fragno - 1))
99 buffer->element[element].flags =
100 SBAL_FLAGS_MIDDLE_FRAG;
102 buffer->element[element].flags =
103 SBAL_FLAGS_LAST_FRAG;
106 *next_element_to_fill = element;
109 static inline const char *qeth_get_cardname(struct qeth_card *card)
111 if (card->info.guestlan) {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSAE:
114 return " Guest LAN QDIO";
115 case QETH_CARD_TYPE_IQD:
116 return " Guest LAN Hiper";
121 switch (card->info.type) {
122 case QETH_CARD_TYPE_OSAE:
123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
135 /* max length to be returned: 14 */
136 const char *qeth_get_cardname_short(struct qeth_card *card)
138 if (card->info.guestlan) {
139 switch (card->info.type) {
140 case QETH_CARD_TYPE_OSAE:
141 return "GuestLAN QDIO";
142 case QETH_CARD_TYPE_IQD:
143 return "GuestLAN Hiper";
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSAE:
150 switch (card->info.link_type) {
151 case QETH_LINK_TYPE_FAST_ETH:
153 case QETH_LINK_TYPE_HSTR:
155 case QETH_LINK_TYPE_GBIT_ETH:
157 case QETH_LINK_TYPE_10GBIT_ETH:
159 case QETH_LINK_TYPE_LANE_ETH100:
160 return "OSD_FE_LANE";
161 case QETH_LINK_TYPE_LANE_TR:
162 return "OSD_TR_LANE";
163 case QETH_LINK_TYPE_LANE_ETH1000:
164 return "OSD_GbE_LANE";
165 case QETH_LINK_TYPE_LANE:
166 return "OSD_ATM_LANE";
168 return "OSD_Express";
170 case QETH_CARD_TYPE_IQD:
171 return "HiperSockets";
172 case QETH_CARD_TYPE_OSN:
181 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
182 int clear_start_mask)
186 spin_lock_irqsave(&card->thread_mask_lock, flags);
187 card->thread_allowed_mask = threads;
188 if (clear_start_mask)
189 card->thread_start_mask &= threads;
190 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
191 wake_up(&card->wait_q);
193 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
195 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 rc = (card->thread_running_mask & threads);
202 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
205 EXPORT_SYMBOL_GPL(qeth_threads_running);
207 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
209 return wait_event_interruptible(card->wait_q,
210 qeth_threads_running(card, threads) == 0);
212 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
214 void qeth_clear_working_pool_list(struct qeth_card *card)
216 struct qeth_buffer_pool_entry *pool_entry, *tmp;
218 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
219 list_for_each_entry_safe(pool_entry, tmp,
220 &card->qdio.in_buf_pool.entry_list, list){
221 list_del(&pool_entry->list);
224 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
226 static int qeth_alloc_buffer_pool(struct qeth_card *card)
228 struct qeth_buffer_pool_entry *pool_entry;
232 QETH_DBF_TEXT(TRACE, 5, "alocpool");
233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
236 qeth_free_buffer_pool(card);
239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
240 ptr = (void *) __get_free_page(GFP_KERNEL);
243 free_page((unsigned long)
244 pool_entry->elements[--j]);
246 qeth_free_buffer_pool(card);
249 pool_entry->elements[j] = ptr;
251 list_add(&pool_entry->init_list,
252 &card->qdio.init_pool.entry_list);
257 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
259 QETH_DBF_TEXT(TRACE, 2, "realcbp");
261 if ((card->state != CARD_STATE_DOWN) &&
262 (card->state != CARD_STATE_RECOVER))
265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
266 qeth_clear_working_pool_list(card);
267 qeth_free_buffer_pool(card);
268 card->qdio.in_buf_pool.buf_count = bufcnt;
269 card->qdio.init_pool.buf_count = bufcnt;
270 return qeth_alloc_buffer_pool(card);
272 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
274 static int qeth_issue_next_read(struct qeth_card *card)
277 struct qeth_cmd_buffer *iob;
279 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
280 if (card->read.state != CH_STATE_UP)
282 iob = qeth_get_buffer(&card->read);
284 dev_warn(&card->gdev->dev, "The qeth device driver "
285 "failed to recover an error on the device\n");
286 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
287 "available\n", dev_name(&card->gdev->dev));
290 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
291 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
292 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
295 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
296 "rc=%i\n", dev_name(&card->gdev->dev), rc);
297 atomic_set(&card->read.irq_pending, 0);
298 qeth_schedule_recovery(card);
299 wake_up(&card->wait_q);
304 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
306 struct qeth_reply *reply;
308 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
310 atomic_set(&reply->refcnt, 1);
311 atomic_set(&reply->received, 0);
317 static void qeth_get_reply(struct qeth_reply *reply)
319 WARN_ON(atomic_read(&reply->refcnt) <= 0);
320 atomic_inc(&reply->refcnt);
323 static void qeth_put_reply(struct qeth_reply *reply)
325 WARN_ON(atomic_read(&reply->refcnt) <= 0);
326 if (atomic_dec_and_test(&reply->refcnt))
330 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
331 struct qeth_card *card)
334 int com = cmd->hdr.command;
335 ipa_name = qeth_get_ipa_cmd_name(com);
337 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
338 ipa_name, com, QETH_CARD_IFNAME(card),
339 rc, qeth_get_ipa_msg(rc));
341 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
342 ipa_name, com, QETH_CARD_IFNAME(card));
345 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
346 struct qeth_cmd_buffer *iob)
348 struct qeth_ipa_cmd *cmd = NULL;
350 QETH_DBF_TEXT(TRACE, 5, "chkipad");
351 if (IS_IPA(iob->data)) {
352 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
353 if (IS_IPA_REPLY(cmd)) {
354 if (cmd->hdr.command != IPA_CMD_SETCCID &&
355 cmd->hdr.command != IPA_CMD_DELCCID &&
356 cmd->hdr.command != IPA_CMD_MODCCID &&
357 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
358 qeth_issue_ipa_msg(cmd,
359 cmd->hdr.return_code, card);
362 switch (cmd->hdr.command) {
363 case IPA_CMD_STOPLAN:
364 dev_warn(&card->gdev->dev,
365 "The link for interface %s on CHPID"
367 QETH_CARD_IFNAME(card),
369 card->lan_online = 0;
370 if (card->dev && netif_carrier_ok(card->dev))
371 netif_carrier_off(card->dev);
373 case IPA_CMD_STARTLAN:
374 dev_info(&card->gdev->dev,
375 "The link for %s on CHPID 0x%X has"
377 QETH_CARD_IFNAME(card),
379 netif_carrier_on(card->dev);
380 card->lan_online = 1;
381 qeth_schedule_recovery(card);
383 case IPA_CMD_MODCCID:
385 case IPA_CMD_REGISTER_LOCAL_ADDR:
386 QETH_DBF_TEXT(TRACE, 3, "irla");
388 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
389 QETH_DBF_TEXT(TRACE, 3, "urla");
392 QETH_DBF_MESSAGE(2, "Received data is IPA "
393 "but not a reply!\n");
401 void qeth_clear_ipacmd_list(struct qeth_card *card)
403 struct qeth_reply *reply, *r;
406 QETH_DBF_TEXT(TRACE, 4, "clipalst");
408 spin_lock_irqsave(&card->lock, flags);
409 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
410 qeth_get_reply(reply);
412 atomic_inc(&reply->received);
413 list_del_init(&reply->list);
414 wake_up(&reply->wait_q);
415 qeth_put_reply(reply);
417 spin_unlock_irqrestore(&card->lock, flags);
419 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
421 static int qeth_check_idx_response(unsigned char *buffer)
426 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
427 if ((buffer[2] & 0xc0) == 0xc0) {
428 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
429 "with cause code 0x%02x%s\n",
431 ((buffer[4] == 0x22) ?
432 " -- try another portname" : ""));
433 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
434 QETH_DBF_TEXT(TRACE, 2, " idxterm");
435 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
441 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
444 struct qeth_card *card;
446 QETH_DBF_TEXT(TRACE, 4, "setupccw");
447 card = CARD_FROM_CDEV(channel->ccwdev);
448 if (channel == &card->read)
449 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
451 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
452 channel->ccw.count = len;
453 channel->ccw.cda = (__u32) __pa(iob);
456 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
460 QETH_DBF_TEXT(TRACE, 6, "getbuff");
461 index = channel->io_buf_no;
463 if (channel->iob[index].state == BUF_STATE_FREE) {
464 channel->iob[index].state = BUF_STATE_LOCKED;
465 channel->io_buf_no = (channel->io_buf_no + 1) %
467 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
468 return channel->iob + index;
470 index = (index + 1) % QETH_CMD_BUFFER_NO;
471 } while (index != channel->io_buf_no);
476 void qeth_release_buffer(struct qeth_channel *channel,
477 struct qeth_cmd_buffer *iob)
481 QETH_DBF_TEXT(TRACE, 6, "relbuff");
482 spin_lock_irqsave(&channel->iob_lock, flags);
483 memset(iob->data, 0, QETH_BUFSIZE);
484 iob->state = BUF_STATE_FREE;
485 iob->callback = qeth_send_control_data_cb;
487 spin_unlock_irqrestore(&channel->iob_lock, flags);
489 EXPORT_SYMBOL_GPL(qeth_release_buffer);
491 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
493 struct qeth_cmd_buffer *buffer = NULL;
496 spin_lock_irqsave(&channel->iob_lock, flags);
497 buffer = __qeth_get_buffer(channel);
498 spin_unlock_irqrestore(&channel->iob_lock, flags);
502 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
504 struct qeth_cmd_buffer *buffer;
505 wait_event(channel->wait_q,
506 ((buffer = qeth_get_buffer(channel)) != NULL));
509 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
511 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
515 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
516 qeth_release_buffer(channel, &channel->iob[cnt]);
518 channel->io_buf_no = 0;
520 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
522 static void qeth_send_control_data_cb(struct qeth_channel *channel,
523 struct qeth_cmd_buffer *iob)
525 struct qeth_card *card;
526 struct qeth_reply *reply, *r;
527 struct qeth_ipa_cmd *cmd;
531 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
533 card = CARD_FROM_CDEV(channel->ccwdev);
534 if (qeth_check_idx_response(iob->data)) {
535 qeth_clear_ipacmd_list(card);
536 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
537 dev_err(&card->gdev->dev,
538 "The qeth device is not configured "
539 "for the OSI layer required by z/VM\n");
540 qeth_schedule_recovery(card);
544 cmd = qeth_check_ipa_data(card, iob);
545 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
547 /*in case of OSN : check if cmd is set */
548 if (card->info.type == QETH_CARD_TYPE_OSN &&
550 cmd->hdr.command != IPA_CMD_STARTLAN &&
551 card->osn_info.assist_cb != NULL) {
552 card->osn_info.assist_cb(card->dev, cmd);
556 spin_lock_irqsave(&card->lock, flags);
557 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
558 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
559 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
560 qeth_get_reply(reply);
561 list_del_init(&reply->list);
562 spin_unlock_irqrestore(&card->lock, flags);
564 if (reply->callback != NULL) {
566 reply->offset = (__u16)((char *)cmd -
568 keep_reply = reply->callback(card,
572 keep_reply = reply->callback(card,
577 reply->rc = (u16) cmd->hdr.return_code;
581 spin_lock_irqsave(&card->lock, flags);
582 list_add_tail(&reply->list,
583 &card->cmd_waiter_list);
584 spin_unlock_irqrestore(&card->lock, flags);
586 atomic_inc(&reply->received);
587 wake_up(&reply->wait_q);
589 qeth_put_reply(reply);
593 spin_unlock_irqrestore(&card->lock, flags);
595 memcpy(&card->seqno.pdu_hdr_ack,
596 QETH_PDU_HEADER_SEQ_NO(iob->data),
598 qeth_release_buffer(channel, iob);
601 static int qeth_setup_channel(struct qeth_channel *channel)
605 QETH_DBF_TEXT(SETUP, 2, "setupch");
606 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
607 channel->iob[cnt].data = (char *)
608 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
609 if (channel->iob[cnt].data == NULL)
611 channel->iob[cnt].state = BUF_STATE_FREE;
612 channel->iob[cnt].channel = channel;
613 channel->iob[cnt].callback = qeth_send_control_data_cb;
614 channel->iob[cnt].rc = 0;
616 if (cnt < QETH_CMD_BUFFER_NO) {
618 kfree(channel->iob[cnt].data);
622 channel->io_buf_no = 0;
623 atomic_set(&channel->irq_pending, 0);
624 spin_lock_init(&channel->iob_lock);
626 init_waitqueue_head(&channel->wait_q);
630 static int qeth_set_thread_start_bit(struct qeth_card *card,
631 unsigned long thread)
635 spin_lock_irqsave(&card->thread_mask_lock, flags);
636 if (!(card->thread_allowed_mask & thread) ||
637 (card->thread_start_mask & thread)) {
638 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
641 card->thread_start_mask |= thread;
642 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
646 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
650 spin_lock_irqsave(&card->thread_mask_lock, flags);
651 card->thread_start_mask &= ~thread;
652 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
653 wake_up(&card->wait_q);
655 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
657 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
661 spin_lock_irqsave(&card->thread_mask_lock, flags);
662 card->thread_running_mask &= ~thread;
663 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
664 wake_up(&card->wait_q);
666 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
668 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
673 spin_lock_irqsave(&card->thread_mask_lock, flags);
674 if (card->thread_start_mask & thread) {
675 if ((card->thread_allowed_mask & thread) &&
676 !(card->thread_running_mask & thread)) {
678 card->thread_start_mask &= ~thread;
679 card->thread_running_mask |= thread;
683 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
687 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
691 wait_event(card->wait_q,
692 (rc = __qeth_do_run_thread(card, thread)) >= 0);
695 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
697 void qeth_schedule_recovery(struct qeth_card *card)
699 QETH_DBF_TEXT(TRACE, 2, "startrec");
700 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
701 schedule_work(&card->kernel_thread_starter);
703 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
705 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
710 sense = (char *) irb->ecw;
711 cstat = irb->scsw.cmd.cstat;
712 dstat = irb->scsw.cmd.dstat;
714 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
715 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
716 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
717 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
718 dev_warn(&cdev->dev, "The qeth device driver "
719 "failed to recover an error on the device\n");
720 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
721 dev_name(&cdev->dev), dstat, cstat);
722 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
727 if (dstat & DEV_STAT_UNIT_CHECK) {
728 if (sense[SENSE_RESETTING_EVENT_BYTE] &
729 SENSE_RESETTING_EVENT_FLAG) {
730 QETH_DBF_TEXT(TRACE, 2, "REVIND");
733 if (sense[SENSE_COMMAND_REJECT_BYTE] &
734 SENSE_COMMAND_REJECT_FLAG) {
735 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
738 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
739 QETH_DBF_TEXT(TRACE, 2, "AFFE");
742 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
743 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
746 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
752 static long __qeth_check_irb_error(struct ccw_device *cdev,
753 unsigned long intparm, struct irb *irb)
758 switch (PTR_ERR(irb)) {
760 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
761 dev_name(&cdev->dev));
762 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
763 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
766 dev_warn(&cdev->dev, "A hardware operation timed out"
768 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
769 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
770 if (intparm == QETH_RCD_PARM) {
771 struct qeth_card *card = CARD_FROM_CDEV(cdev);
773 if (card && (card->data.ccwdev == cdev)) {
774 card->data.state = CH_STATE_DOWN;
775 wake_up(&card->wait_q);
780 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
781 dev_name(&cdev->dev), PTR_ERR(irb));
782 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
783 QETH_DBF_TEXT(TRACE, 2, " rc???");
788 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
793 struct qeth_cmd_buffer *buffer;
794 struct qeth_channel *channel;
795 struct qeth_card *card;
796 struct qeth_cmd_buffer *iob;
799 QETH_DBF_TEXT(TRACE, 5, "irq");
801 if (__qeth_check_irb_error(cdev, intparm, irb))
803 cstat = irb->scsw.cmd.cstat;
804 dstat = irb->scsw.cmd.dstat;
806 card = CARD_FROM_CDEV(cdev);
810 if (card->read.ccwdev == cdev) {
811 channel = &card->read;
812 QETH_DBF_TEXT(TRACE, 5, "read");
813 } else if (card->write.ccwdev == cdev) {
814 channel = &card->write;
815 QETH_DBF_TEXT(TRACE, 5, "write");
817 channel = &card->data;
818 QETH_DBF_TEXT(TRACE, 5, "data");
820 atomic_set(&channel->irq_pending, 0);
822 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
823 channel->state = CH_STATE_STOPPED;
825 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
826 channel->state = CH_STATE_HALTED;
828 /*let's wake up immediately on data channel*/
829 if ((channel == &card->data) && (intparm != 0) &&
830 (intparm != QETH_RCD_PARM))
833 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
834 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
835 /* we don't have to handle this further */
838 if (intparm == QETH_HALT_CHANNEL_PARM) {
839 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
840 /* we don't have to handle this further */
843 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
844 (dstat & DEV_STAT_UNIT_CHECK) ||
846 if (irb->esw.esw0.erw.cons) {
847 dev_warn(&channel->ccwdev->dev,
848 "The qeth device driver failed to recover "
849 "an error on the device\n");
850 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
852 dev_name(&channel->ccwdev->dev), cstat, dstat);
853 print_hex_dump(KERN_WARNING, "qeth: irb ",
854 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
855 print_hex_dump(KERN_WARNING, "qeth: sense data ",
856 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
858 if (intparm == QETH_RCD_PARM) {
859 channel->state = CH_STATE_DOWN;
862 rc = qeth_get_problem(cdev, irb);
864 qeth_clear_ipacmd_list(card);
865 qeth_schedule_recovery(card);
870 if (intparm == QETH_RCD_PARM) {
871 channel->state = CH_STATE_RCD_DONE;
875 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
876 buffer->state = BUF_STATE_PROCESSED;
878 if (channel == &card->data)
880 if (channel == &card->read &&
881 channel->state == CH_STATE_UP)
882 qeth_issue_next_read(card);
885 index = channel->buf_no;
886 while (iob[index].state == BUF_STATE_PROCESSED) {
887 if (iob[index].callback != NULL)
888 iob[index].callback(channel, iob + index);
890 index = (index + 1) % QETH_CMD_BUFFER_NO;
892 channel->buf_no = index;
894 wake_up(&card->wait_q);
898 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
899 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
904 /* is PCI flag set on buffer? */
905 if (buf->buffer->element[0].flags & 0x40)
906 atomic_dec(&queue->set_pci_flags_count);
908 if (!qeth_skip_skb) {
909 skb = skb_dequeue(&buf->skb_list);
911 atomic_dec(&skb->users);
912 dev_kfree_skb_any(skb);
913 skb = skb_dequeue(&buf->skb_list);
916 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
917 if (buf->buffer->element[i].addr && buf->is_header[i])
918 kmem_cache_free(qeth_core_header_cache,
919 buf->buffer->element[i].addr);
920 buf->is_header[i] = 0;
921 buf->buffer->element[i].length = 0;
922 buf->buffer->element[i].addr = NULL;
923 buf->buffer->element[i].flags = 0;
925 buf->buffer->element[15].flags = 0;
926 buf->next_element_to_fill = 0;
927 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
930 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
931 struct qeth_qdio_out_buffer *buf)
933 __qeth_clear_output_buffer(queue, buf, 0);
936 void qeth_clear_qdio_buffers(struct qeth_card *card)
940 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
941 /* clear outbound buffers to free skbs */
942 for (i = 0; i < card->qdio.no_out_queues; ++i)
943 if (card->qdio.out_qs[i]) {
944 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
945 qeth_clear_output_buffer(card->qdio.out_qs[i],
946 &card->qdio.out_qs[i]->bufs[j]);
949 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
951 static void qeth_free_buffer_pool(struct qeth_card *card)
953 struct qeth_buffer_pool_entry *pool_entry, *tmp;
955 QETH_DBF_TEXT(TRACE, 5, "freepool");
956 list_for_each_entry_safe(pool_entry, tmp,
957 &card->qdio.init_pool.entry_list, init_list){
958 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
959 free_page((unsigned long)pool_entry->elements[i]);
960 list_del(&pool_entry->init_list);
965 static void qeth_free_qdio_buffers(struct qeth_card *card)
969 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
970 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
971 QETH_QDIO_UNINITIALIZED)
973 kfree(card->qdio.in_q);
974 card->qdio.in_q = NULL;
975 /* inbound buffer pool */
976 qeth_free_buffer_pool(card);
977 /* free outbound qdio_qs */
978 if (card->qdio.out_qs) {
979 for (i = 0; i < card->qdio.no_out_queues; ++i) {
980 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
981 qeth_clear_output_buffer(card->qdio.out_qs[i],
982 &card->qdio.out_qs[i]->bufs[j]);
983 kfree(card->qdio.out_qs[i]);
985 kfree(card->qdio.out_qs);
986 card->qdio.out_qs = NULL;
990 static void qeth_clean_channel(struct qeth_channel *channel)
994 QETH_DBF_TEXT(SETUP, 2, "freech");
995 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
996 kfree(channel->iob[cnt].data);
999 static int qeth_is_1920_device(struct qeth_card *card)
1001 int single_queue = 0;
1002 struct ccw_device *ccwdev;
1003 struct channelPath_dsc {
1014 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1016 ccwdev = card->data.ccwdev;
1017 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1018 if (chp_dsc != NULL) {
1019 /* CHPP field bit 6 == 1 -> single queue */
1020 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1023 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1024 return single_queue;
1027 static void qeth_init_qdio_info(struct qeth_card *card)
1029 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1030 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1032 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1033 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1034 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1035 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1036 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1039 static void qeth_set_intial_options(struct qeth_card *card)
1041 card->options.route4.type = NO_ROUTER;
1042 card->options.route6.type = NO_ROUTER;
1043 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1044 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1045 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1046 card->options.fake_broadcast = 0;
1047 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1048 card->options.performance_stats = 0;
1049 card->options.rx_sg_cb = QETH_RX_SG_CB;
1050 card->options.isolation = ISOLATION_MODE_NONE;
1053 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1055 unsigned long flags;
1058 spin_lock_irqsave(&card->thread_mask_lock, flags);
1059 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1060 (u8) card->thread_start_mask,
1061 (u8) card->thread_allowed_mask,
1062 (u8) card->thread_running_mask);
1063 rc = (card->thread_start_mask & thread);
1064 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1068 static void qeth_start_kernel_thread(struct work_struct *work)
1070 struct qeth_card *card = container_of(work, struct qeth_card,
1071 kernel_thread_starter);
1072 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1074 if (card->read.state != CH_STATE_UP &&
1075 card->write.state != CH_STATE_UP)
1077 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1078 kthread_run(card->discipline.recover, (void *) card,
1082 static int qeth_setup_card(struct qeth_card *card)
1085 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1086 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1088 card->read.state = CH_STATE_DOWN;
1089 card->write.state = CH_STATE_DOWN;
1090 card->data.state = CH_STATE_DOWN;
1091 card->state = CARD_STATE_DOWN;
1092 card->lan_online = 0;
1093 card->use_hard_stop = 0;
1095 spin_lock_init(&card->vlanlock);
1096 spin_lock_init(&card->mclock);
1097 card->vlangrp = NULL;
1098 spin_lock_init(&card->lock);
1099 spin_lock_init(&card->ip_lock);
1100 spin_lock_init(&card->thread_mask_lock);
1101 card->thread_start_mask = 0;
1102 card->thread_allowed_mask = 0;
1103 card->thread_running_mask = 0;
1104 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1105 INIT_LIST_HEAD(&card->ip_list);
1106 INIT_LIST_HEAD(card->ip_tbd_list);
1107 INIT_LIST_HEAD(&card->cmd_waiter_list);
1108 init_waitqueue_head(&card->wait_q);
1109 /* intial options */
1110 qeth_set_intial_options(card);
1111 /* IP address takeover */
1112 INIT_LIST_HEAD(&card->ipato.entries);
1113 card->ipato.enabled = 0;
1114 card->ipato.invert4 = 0;
1115 card->ipato.invert6 = 0;
1116 if (card->info.type == QETH_CARD_TYPE_IQD)
1117 card->options.checksum_type = NO_CHECKSUMMING;
1118 /* init QDIO stuff */
1119 qeth_init_qdio_info(card);
1123 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1125 struct qeth_card *card = container_of(slr, struct qeth_card,
1126 qeth_service_level);
1127 if (card->info.mcl_level[0])
1128 seq_printf(m, "qeth: %s firmware level %s\n",
1129 CARD_BUS_ID(card), card->info.mcl_level);
1132 static struct qeth_card *qeth_alloc_card(void)
1134 struct qeth_card *card;
1136 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1137 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1140 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1141 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1142 if (!card->ip_tbd_list) {
1143 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1146 if (qeth_setup_channel(&card->read))
1148 if (qeth_setup_channel(&card->write))
1150 card->options.layer2 = -1;
1151 card->qeth_service_level.seq_print = qeth_core_sl_print;
1152 register_service_level(&card->qeth_service_level);
1156 qeth_clean_channel(&card->read);
1158 kfree(card->ip_tbd_list);
1165 static int qeth_determine_card_type(struct qeth_card *card)
1169 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1171 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1172 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1173 while (known_devices[i][4]) {
1174 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1175 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1176 card->info.type = known_devices[i][4];
1177 card->qdio.no_out_queues = known_devices[i][8];
1178 card->info.is_multicast_different = known_devices[i][9];
1179 if (qeth_is_1920_device(card)) {
1180 dev_info(&card->gdev->dev,
1181 "Priority Queueing not supported\n");
1182 card->qdio.no_out_queues = 1;
1183 card->qdio.default_out_queue = 0;
1189 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1190 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1195 static int qeth_clear_channel(struct qeth_channel *channel)
1197 unsigned long flags;
1198 struct qeth_card *card;
1201 QETH_DBF_TEXT(TRACE, 3, "clearch");
1202 card = CARD_FROM_CDEV(channel->ccwdev);
1203 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1204 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1205 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1209 rc = wait_event_interruptible_timeout(card->wait_q,
1210 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1211 if (rc == -ERESTARTSYS)
1213 if (channel->state != CH_STATE_STOPPED)
1215 channel->state = CH_STATE_DOWN;
1219 static int qeth_halt_channel(struct qeth_channel *channel)
1221 unsigned long flags;
1222 struct qeth_card *card;
1225 QETH_DBF_TEXT(TRACE, 3, "haltch");
1226 card = CARD_FROM_CDEV(channel->ccwdev);
1227 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1228 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1229 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1233 rc = wait_event_interruptible_timeout(card->wait_q,
1234 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1235 if (rc == -ERESTARTSYS)
1237 if (channel->state != CH_STATE_HALTED)
1242 static int qeth_halt_channels(struct qeth_card *card)
1244 int rc1 = 0, rc2 = 0, rc3 = 0;
1246 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1247 rc1 = qeth_halt_channel(&card->read);
1248 rc2 = qeth_halt_channel(&card->write);
1249 rc3 = qeth_halt_channel(&card->data);
1257 static int qeth_clear_channels(struct qeth_card *card)
1259 int rc1 = 0, rc2 = 0, rc3 = 0;
1261 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1262 rc1 = qeth_clear_channel(&card->read);
1263 rc2 = qeth_clear_channel(&card->write);
1264 rc3 = qeth_clear_channel(&card->data);
1272 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1276 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1277 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1280 rc = qeth_halt_channels(card);
1283 return qeth_clear_channels(card);
1286 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1290 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1291 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1292 QETH_QDIO_CLEANING)) {
1293 case QETH_QDIO_ESTABLISHED:
1294 if (card->info.type == QETH_CARD_TYPE_IQD)
1295 rc = qdio_cleanup(CARD_DDEV(card),
1296 QDIO_FLAG_CLEANUP_USING_HALT);
1298 rc = qdio_cleanup(CARD_DDEV(card),
1299 QDIO_FLAG_CLEANUP_USING_CLEAR);
1301 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1302 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1304 case QETH_QDIO_CLEANING:
1309 rc = qeth_clear_halt_card(card, use_halt);
1311 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1312 card->state = CARD_STATE_DOWN;
1315 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1317 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1323 struct qeth_channel *channel = &card->data;
1324 unsigned long flags;
1327 * scan for RCD command in extended SenseID data
1329 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1330 if (!ciw || ciw->cmd == 0)
1332 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1336 channel->ccw.cmd_code = ciw->cmd;
1337 channel->ccw.cda = (__u32) __pa(rcd_buf);
1338 channel->ccw.count = ciw->count;
1339 channel->ccw.flags = CCW_FLAG_SLI;
1340 channel->state = CH_STATE_RCD;
1341 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1342 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1343 QETH_RCD_PARM, LPM_ANYPATH, 0,
1345 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1347 wait_event(card->wait_q,
1348 (channel->state == CH_STATE_RCD_DONE ||
1349 channel->state == CH_STATE_DOWN));
1350 if (channel->state == CH_STATE_DOWN)
1353 channel->state = CH_STATE_DOWN;
1359 *length = ciw->count;
1365 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1367 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1368 card->info.chpid = prcd[30];
1369 card->info.unit_addr2 = prcd[31];
1370 card->info.cula = prcd[63];
1371 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1372 (prcd[0x11] == _ascebc['M']));
1375 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1377 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1379 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1380 card->info.blkt.time_total = 250;
1381 card->info.blkt.inter_packet = 5;
1382 card->info.blkt.inter_packet_jumbo = 15;
1384 card->info.blkt.time_total = 0;
1385 card->info.blkt.inter_packet = 0;
1386 card->info.blkt.inter_packet_jumbo = 0;
1390 static void qeth_init_tokens(struct qeth_card *card)
1392 card->token.issuer_rm_w = 0x00010103UL;
1393 card->token.cm_filter_w = 0x00010108UL;
1394 card->token.cm_connection_w = 0x0001010aUL;
1395 card->token.ulp_filter_w = 0x0001010bUL;
1396 card->token.ulp_connection_w = 0x0001010dUL;
1399 static void qeth_init_func_level(struct qeth_card *card)
1401 if (card->ipato.enabled) {
1402 if (card->info.type == QETH_CARD_TYPE_IQD)
1403 card->info.func_level =
1404 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1406 card->info.func_level =
1407 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1409 if (card->info.type == QETH_CARD_TYPE_IQD)
1410 /*FIXME:why do we have same values for dis and ena for
1412 card->info.func_level =
1413 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1415 card->info.func_level =
1416 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1420 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1421 void (*idx_reply_cb)(struct qeth_channel *,
1422 struct qeth_cmd_buffer *))
1424 struct qeth_cmd_buffer *iob;
1425 unsigned long flags;
1427 struct qeth_card *card;
1429 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1430 card = CARD_FROM_CDEV(channel->ccwdev);
1431 iob = qeth_get_buffer(channel);
1432 iob->callback = idx_reply_cb;
1433 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1434 channel->ccw.count = QETH_BUFSIZE;
1435 channel->ccw.cda = (__u32) __pa(iob->data);
1437 wait_event(card->wait_q,
1438 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1439 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1440 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1441 rc = ccw_device_start(channel->ccwdev,
1442 &channel->ccw, (addr_t) iob, 0, 0);
1443 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1446 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1447 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1448 atomic_set(&channel->irq_pending, 0);
1449 wake_up(&card->wait_q);
1452 rc = wait_event_interruptible_timeout(card->wait_q,
1453 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1454 if (rc == -ERESTARTSYS)
1456 if (channel->state != CH_STATE_UP) {
1458 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1459 qeth_clear_cmd_buffers(channel);
1465 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1466 void (*idx_reply_cb)(struct qeth_channel *,
1467 struct qeth_cmd_buffer *))
1469 struct qeth_card *card;
1470 struct qeth_cmd_buffer *iob;
1471 unsigned long flags;
1475 struct ccw_dev_id temp_devid;
1477 card = CARD_FROM_CDEV(channel->ccwdev);
1479 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1481 iob = qeth_get_buffer(channel);
1482 iob->callback = idx_reply_cb;
1483 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1484 channel->ccw.count = IDX_ACTIVATE_SIZE;
1485 channel->ccw.cda = (__u32) __pa(iob->data);
1486 if (channel == &card->write) {
1487 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1488 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1489 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1490 card->seqno.trans_hdr++;
1492 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1493 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1494 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1496 tmp = ((__u8)card->info.portno) | 0x80;
1497 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1498 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1499 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1500 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1501 &card->info.func_level, sizeof(__u16));
1502 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1503 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1504 temp = (card->info.cula << 8) + card->info.unit_addr2;
1505 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1507 wait_event(card->wait_q,
1508 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1509 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1510 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1511 rc = ccw_device_start(channel->ccwdev,
1512 &channel->ccw, (addr_t) iob, 0, 0);
1513 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1516 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1518 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1519 atomic_set(&channel->irq_pending, 0);
1520 wake_up(&card->wait_q);
1523 rc = wait_event_interruptible_timeout(card->wait_q,
1524 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1525 if (rc == -ERESTARTSYS)
1527 if (channel->state != CH_STATE_ACTIVATING) {
1528 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1529 " failed to recover an error on the device\n");
1530 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1531 dev_name(&channel->ccwdev->dev));
1532 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1533 qeth_clear_cmd_buffers(channel);
1536 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1539 static int qeth_peer_func_level(int level)
1541 if ((level & 0xff) == 8)
1542 return (level & 0xff) + 0x400;
1543 if (((level >> 8) & 3) == 1)
1544 return (level & 0xff) + 0x200;
1548 static void qeth_idx_write_cb(struct qeth_channel *channel,
1549 struct qeth_cmd_buffer *iob)
1551 struct qeth_card *card;
1554 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1556 if (channel->state == CH_STATE_DOWN) {
1557 channel->state = CH_STATE_ACTIVATING;
1560 card = CARD_FROM_CDEV(channel->ccwdev);
1562 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1563 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1564 dev_err(&card->write.ccwdev->dev,
1565 "The adapter is used exclusively by another "
1568 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1569 " negative reply\n",
1570 dev_name(&card->write.ccwdev->dev));
1573 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1574 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1575 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1576 "function level mismatch (sent: 0x%x, received: "
1577 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1578 card->info.func_level, temp);
1581 channel->state = CH_STATE_UP;
1583 qeth_release_buffer(channel, iob);
1586 static void qeth_idx_read_cb(struct qeth_channel *channel,
1587 struct qeth_cmd_buffer *iob)
1589 struct qeth_card *card;
1592 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1593 if (channel->state == CH_STATE_DOWN) {
1594 channel->state = CH_STATE_ACTIVATING;
1598 card = CARD_FROM_CDEV(channel->ccwdev);
1599 if (qeth_check_idx_response(iob->data))
1602 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1603 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1604 dev_err(&card->write.ccwdev->dev,
1605 "The adapter is used exclusively by another "
1608 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1609 " negative reply\n",
1610 dev_name(&card->read.ccwdev->dev));
1615 * temporary fix for microcode bug
1616 * to revert it,replace OR by AND
1618 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1619 (card->info.type == QETH_CARD_TYPE_OSAE))
1620 card->info.portname_required = 1;
1622 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1623 if (temp != qeth_peer_func_level(card->info.func_level)) {
1624 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1625 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1626 dev_name(&card->read.ccwdev->dev),
1627 card->info.func_level, temp);
1630 memcpy(&card->token.issuer_rm_r,
1631 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1632 QETH_MPC_TOKEN_LENGTH);
1633 memcpy(&card->info.mcl_level[0],
1634 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1635 channel->state = CH_STATE_UP;
1637 qeth_release_buffer(channel, iob);
1640 void qeth_prepare_control_data(struct qeth_card *card, int len,
1641 struct qeth_cmd_buffer *iob)
1643 qeth_setup_ccw(&card->write, iob->data, len);
1644 iob->callback = qeth_release_buffer;
1646 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1647 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1648 card->seqno.trans_hdr++;
1649 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1650 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1651 card->seqno.pdu_hdr++;
1652 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1653 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1654 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1656 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1658 int qeth_send_control_data(struct qeth_card *card, int len,
1659 struct qeth_cmd_buffer *iob,
1660 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1665 unsigned long flags;
1666 struct qeth_reply *reply = NULL;
1667 unsigned long timeout, event_timeout;
1668 struct qeth_ipa_cmd *cmd;
1670 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1672 reply = qeth_alloc_reply(card);
1676 reply->callback = reply_cb;
1677 reply->param = reply_param;
1678 if (card->state == CARD_STATE_DOWN)
1679 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1681 reply->seqno = card->seqno.ipa++;
1682 init_waitqueue_head(&reply->wait_q);
1683 spin_lock_irqsave(&card->lock, flags);
1684 list_add_tail(&reply->list, &card->cmd_waiter_list);
1685 spin_unlock_irqrestore(&card->lock, flags);
1686 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1688 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1689 qeth_prepare_control_data(card, len, iob);
1691 if (IS_IPA(iob->data))
1692 event_timeout = QETH_IPA_TIMEOUT;
1694 event_timeout = QETH_TIMEOUT;
1695 timeout = jiffies + event_timeout;
1697 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1698 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1699 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1700 (addr_t) iob, 0, 0);
1701 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1703 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1704 "ccw_device_start rc = %i\n",
1705 dev_name(&card->write.ccwdev->dev), rc);
1706 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1707 spin_lock_irqsave(&card->lock, flags);
1708 list_del_init(&reply->list);
1709 qeth_put_reply(reply);
1710 spin_unlock_irqrestore(&card->lock, flags);
1711 qeth_release_buffer(iob->channel, iob);
1712 atomic_set(&card->write.irq_pending, 0);
1713 wake_up(&card->wait_q);
1717 /* we have only one long running ipassist, since we can ensure
1718 process context of this command we can sleep */
1719 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1720 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1721 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1722 if (!wait_event_timeout(reply->wait_q,
1723 atomic_read(&reply->received), event_timeout))
1726 while (!atomic_read(&reply->received)) {
1727 if (time_after(jiffies, timeout))
1734 qeth_put_reply(reply);
1738 spin_lock_irqsave(&reply->card->lock, flags);
1739 list_del_init(&reply->list);
1740 spin_unlock_irqrestore(&reply->card->lock, flags);
1742 atomic_inc(&reply->received);
1743 wake_up(&reply->wait_q);
1745 qeth_put_reply(reply);
1748 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1750 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1753 struct qeth_cmd_buffer *iob;
1755 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1757 iob = (struct qeth_cmd_buffer *) data;
1758 memcpy(&card->token.cm_filter_r,
1759 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1760 QETH_MPC_TOKEN_LENGTH);
1761 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1765 static int qeth_cm_enable(struct qeth_card *card)
1768 struct qeth_cmd_buffer *iob;
1770 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1772 iob = qeth_wait_for_buffer(&card->write);
1773 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1774 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1775 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1776 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1777 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1779 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1780 qeth_cm_enable_cb, NULL);
1784 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1788 struct qeth_cmd_buffer *iob;
1790 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1792 iob = (struct qeth_cmd_buffer *) data;
1793 memcpy(&card->token.cm_connection_r,
1794 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1795 QETH_MPC_TOKEN_LENGTH);
1796 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1800 static int qeth_cm_setup(struct qeth_card *card)
1803 struct qeth_cmd_buffer *iob;
1805 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1807 iob = qeth_wait_for_buffer(&card->write);
1808 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1809 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1810 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1811 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1812 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1813 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1814 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1815 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1816 qeth_cm_setup_cb, NULL);
1821 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1823 switch (card->info.type) {
1824 case QETH_CARD_TYPE_UNKNOWN:
1826 case QETH_CARD_TYPE_IQD:
1827 return card->info.max_mtu;
1828 case QETH_CARD_TYPE_OSAE:
1829 switch (card->info.link_type) {
1830 case QETH_LINK_TYPE_HSTR:
1831 case QETH_LINK_TYPE_LANE_TR:
1841 static inline int qeth_get_max_mtu_for_card(int cardtype)
1845 case QETH_CARD_TYPE_UNKNOWN:
1846 case QETH_CARD_TYPE_OSAE:
1847 case QETH_CARD_TYPE_OSN:
1849 case QETH_CARD_TYPE_IQD:
1856 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1859 case QETH_CARD_TYPE_IQD:
1866 static inline int qeth_get_mtu_outof_framesize(int framesize)
1868 switch (framesize) {
1882 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1884 switch (card->info.type) {
1885 case QETH_CARD_TYPE_OSAE:
1886 return ((mtu >= 576) && (mtu <= 61440));
1887 case QETH_CARD_TYPE_IQD:
1888 return ((mtu >= 576) &&
1889 (mtu <= card->info.max_mtu + 4096 - 32));
1890 case QETH_CARD_TYPE_OSN:
1891 case QETH_CARD_TYPE_UNKNOWN:
1897 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1901 __u16 mtu, framesize;
1904 struct qeth_cmd_buffer *iob;
1906 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1908 iob = (struct qeth_cmd_buffer *) data;
1909 memcpy(&card->token.ulp_filter_r,
1910 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1911 QETH_MPC_TOKEN_LENGTH);
1912 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1913 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1914 mtu = qeth_get_mtu_outof_framesize(framesize);
1917 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1920 card->info.max_mtu = mtu;
1921 card->info.initial_mtu = mtu;
1922 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1924 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1925 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1926 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1929 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1930 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1932 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1933 card->info.link_type = link_type;
1935 card->info.link_type = 0;
1936 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1940 static int qeth_ulp_enable(struct qeth_card *card)
1944 struct qeth_cmd_buffer *iob;
1946 /*FIXME: trace view callbacks*/
1947 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1949 iob = qeth_wait_for_buffer(&card->write);
1950 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1952 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1953 (__u8) card->info.portno;
1954 if (card->options.layer2)
1955 if (card->info.type == QETH_CARD_TYPE_OSN)
1956 prot_type = QETH_PROT_OSN2;
1958 prot_type = QETH_PROT_LAYER2;
1960 prot_type = QETH_PROT_TCPIP;
1962 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1963 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1964 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1965 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1966 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1967 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1968 card->info.portname, 9);
1969 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1970 qeth_ulp_enable_cb, NULL);
1975 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1978 struct qeth_cmd_buffer *iob;
1980 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1982 iob = (struct qeth_cmd_buffer *) data;
1983 memcpy(&card->token.ulp_connection_r,
1984 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1985 QETH_MPC_TOKEN_LENGTH);
1986 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1990 static int qeth_ulp_setup(struct qeth_card *card)
1994 struct qeth_cmd_buffer *iob;
1995 struct ccw_dev_id dev_id;
1997 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1999 iob = qeth_wait_for_buffer(&card->write);
2000 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2002 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2003 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2004 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2005 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2006 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2007 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2009 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2010 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2011 temp = (card->info.cula << 8) + card->info.unit_addr2;
2012 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2013 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2014 qeth_ulp_setup_cb, NULL);
2018 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2022 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2024 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2025 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2028 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2030 if (!card->qdio.in_q)
2032 QETH_DBF_TEXT(SETUP, 2, "inq");
2033 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2034 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2035 /* give inbound qeth_qdio_buffers their qdio_buffers */
2036 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2037 card->qdio.in_q->bufs[i].buffer =
2038 &card->qdio.in_q->qdio_bufs[i];
2039 /* inbound buffer pool */
2040 if (qeth_alloc_buffer_pool(card))
2044 kmalloc(card->qdio.no_out_queues *
2045 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2046 if (!card->qdio.out_qs)
2048 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2049 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2051 if (!card->qdio.out_qs[i])
2053 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2054 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2055 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2056 card->qdio.out_qs[i]->queue_no = i;
2057 /* give outbound qeth_qdio_buffers their qdio_buffers */
2058 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2059 card->qdio.out_qs[i]->bufs[j].buffer =
2060 &card->qdio.out_qs[i]->qdio_bufs[j];
2061 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2064 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2065 &qdio_out_skb_queue_key);
2066 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2073 kfree(card->qdio.out_qs[--i]);
2074 kfree(card->qdio.out_qs);
2075 card->qdio.out_qs = NULL;
2077 qeth_free_buffer_pool(card);
2079 kfree(card->qdio.in_q);
2080 card->qdio.in_q = NULL;
2082 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2086 static void qeth_create_qib_param_field(struct qeth_card *card,
2090 param_field[0] = _ascebc['P'];
2091 param_field[1] = _ascebc['C'];
2092 param_field[2] = _ascebc['I'];
2093 param_field[3] = _ascebc['T'];
2094 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2095 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2096 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2099 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2102 param_field[16] = _ascebc['B'];
2103 param_field[17] = _ascebc['L'];
2104 param_field[18] = _ascebc['K'];
2105 param_field[19] = _ascebc['T'];
2106 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2107 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2108 *((unsigned int *) (¶m_field[28])) =
2109 card->info.blkt.inter_packet_jumbo;
2112 static int qeth_qdio_activate(struct qeth_card *card)
2114 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2115 return qdio_activate(CARD_DDEV(card));
2118 static int qeth_dm_act(struct qeth_card *card)
2121 struct qeth_cmd_buffer *iob;
2123 QETH_DBF_TEXT(SETUP, 2, "dmact");
2125 iob = qeth_wait_for_buffer(&card->write);
2126 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2128 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2129 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2130 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2131 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2132 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2136 static int qeth_mpc_initialize(struct qeth_card *card)
2140 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2142 rc = qeth_issue_next_read(card);
2144 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2147 rc = qeth_cm_enable(card);
2149 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2152 rc = qeth_cm_setup(card);
2154 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2157 rc = qeth_ulp_enable(card);
2159 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2162 rc = qeth_ulp_setup(card);
2164 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2167 rc = qeth_alloc_qdio_buffers(card);
2169 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2172 rc = qeth_qdio_establish(card);
2174 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2175 qeth_free_qdio_buffers(card);
2178 rc = qeth_qdio_activate(card);
2180 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2183 rc = qeth_dm_act(card);
2185 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2191 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2195 static void qeth_print_status_with_portname(struct qeth_card *card)
2200 sprintf(dbf_text, "%s", card->info.portname + 1);
2201 for (i = 0; i < 8; i++)
2203 (char) _ebcasc[(__u8) dbf_text[i]];
2205 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2206 "with link type %s (portname: %s)\n",
2207 qeth_get_cardname(card),
2208 (card->info.mcl_level[0]) ? " (level: " : "",
2209 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2210 (card->info.mcl_level[0]) ? ")" : "",
2211 qeth_get_cardname_short(card),
2216 static void qeth_print_status_no_portname(struct qeth_card *card)
2218 if (card->info.portname[0])
2219 dev_info(&card->gdev->dev, "Device is a%s "
2220 "card%s%s%s\nwith link type %s "
2221 "(no portname needed by interface).\n",
2222 qeth_get_cardname(card),
2223 (card->info.mcl_level[0]) ? " (level: " : "",
2224 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2225 (card->info.mcl_level[0]) ? ")" : "",
2226 qeth_get_cardname_short(card));
2228 dev_info(&card->gdev->dev, "Device is a%s "
2229 "card%s%s%s\nwith link type %s.\n",
2230 qeth_get_cardname(card),
2231 (card->info.mcl_level[0]) ? " (level: " : "",
2232 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2233 (card->info.mcl_level[0]) ? ")" : "",
2234 qeth_get_cardname_short(card));
2237 void qeth_print_status_message(struct qeth_card *card)
2239 switch (card->info.type) {
2240 case QETH_CARD_TYPE_OSAE:
2241 /* VM will use a non-zero first character
2242 * to indicate a HiperSockets like reporting
2243 * of the level OSA sets the first character to zero
2245 if (!card->info.mcl_level[0]) {
2246 sprintf(card->info.mcl_level, "%02x%02x",
2247 card->info.mcl_level[2],
2248 card->info.mcl_level[3]);
2250 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2254 case QETH_CARD_TYPE_IQD:
2255 if ((card->info.guestlan) ||
2256 (card->info.mcl_level[0] & 0x80)) {
2257 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2258 card->info.mcl_level[0]];
2259 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2260 card->info.mcl_level[1]];
2261 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2262 card->info.mcl_level[2]];
2263 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2264 card->info.mcl_level[3]];
2265 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2269 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2271 if (card->info.portname_required)
2272 qeth_print_status_with_portname(card);
2274 qeth_print_status_no_portname(card);
2276 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2278 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2280 struct qeth_buffer_pool_entry *entry;
2282 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2284 list_for_each_entry(entry,
2285 &card->qdio.init_pool.entry_list, init_list) {
2286 qeth_put_buffer_pool_entry(card, entry);
2290 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2291 struct qeth_card *card)
2293 struct list_head *plh;
2294 struct qeth_buffer_pool_entry *entry;
2298 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2301 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2302 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2304 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2305 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2311 list_del_init(&entry->list);
2316 /* no free buffer in pool so take first one and swap pages */
2317 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2318 struct qeth_buffer_pool_entry, list);
2319 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2320 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2321 page = alloc_page(GFP_ATOMIC);
2325 free_page((unsigned long)entry->elements[i]);
2326 entry->elements[i] = page_address(page);
2327 if (card->options.performance_stats)
2328 card->perf_stats.sg_alloc_page_rx++;
2332 list_del_init(&entry->list);
2336 static int qeth_init_input_buffer(struct qeth_card *card,
2337 struct qeth_qdio_buffer *buf)
2339 struct qeth_buffer_pool_entry *pool_entry;
2342 pool_entry = qeth_find_free_buffer_pool_entry(card);
2347 * since the buffer is accessed only from the input_tasklet
2348 * there shouldn't be a need to synchronize; also, since we use
2349 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2353 buf->pool_entry = pool_entry;
2354 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2355 buf->buffer->element[i].length = PAGE_SIZE;
2356 buf->buffer->element[i].addr = pool_entry->elements[i];
2357 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2358 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2360 buf->buffer->element[i].flags = 0;
2365 int qeth_init_qdio_queues(struct qeth_card *card)
2370 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2373 memset(card->qdio.in_q->qdio_bufs, 0,
2374 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2375 qeth_initialize_working_pool_list(card);
2376 /*give only as many buffers to hardware as we have buffer pool entries*/
2377 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2378 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2379 card->qdio.in_q->next_buf_to_init =
2380 card->qdio.in_buf_pool.buf_count - 1;
2381 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2382 card->qdio.in_buf_pool.buf_count - 1);
2384 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2387 /* outbound queue */
2388 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2389 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2390 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2391 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2392 qeth_clear_output_buffer(card->qdio.out_qs[i],
2393 &card->qdio.out_qs[i]->bufs[j]);
2395 card->qdio.out_qs[i]->card = card;
2396 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2397 card->qdio.out_qs[i]->do_pack = 0;
2398 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2399 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2400 atomic_set(&card->qdio.out_qs[i]->state,
2401 QETH_OUT_Q_UNLOCKED);
2405 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2407 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2409 switch (link_type) {
2410 case QETH_LINK_TYPE_HSTR:
2417 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2418 struct qeth_ipa_cmd *cmd, __u8 command,
2419 enum qeth_prot_versions prot)
2421 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2422 cmd->hdr.command = command;
2423 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2424 cmd->hdr.seqno = card->seqno.ipa;
2425 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2426 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2427 if (card->options.layer2)
2428 cmd->hdr.prim_version_no = 2;
2430 cmd->hdr.prim_version_no = 1;
2431 cmd->hdr.param_count = 1;
2432 cmd->hdr.prot_version = prot;
2433 cmd->hdr.ipa_supported = 0;
2434 cmd->hdr.ipa_enabled = 0;
2437 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2438 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2440 struct qeth_cmd_buffer *iob;
2441 struct qeth_ipa_cmd *cmd;
2443 iob = qeth_wait_for_buffer(&card->write);
2444 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2445 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2449 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2451 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2454 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2455 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2456 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2457 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2459 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2461 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2462 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2469 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2471 if (card->options.layer2)
2472 if (card->info.type == QETH_CARD_TYPE_OSN)
2473 prot_type = QETH_PROT_OSN2;
2475 prot_type = QETH_PROT_LAYER2;
2477 prot_type = QETH_PROT_TCPIP;
2478 qeth_prepare_ipa_cmd(card, iob, prot_type);
2479 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2480 iob, reply_cb, reply_param);
2483 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2485 static int qeth_send_startstoplan(struct qeth_card *card,
2486 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2489 struct qeth_cmd_buffer *iob;
2491 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2492 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2497 int qeth_send_startlan(struct qeth_card *card)
2501 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2503 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2506 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2508 int qeth_send_stoplan(struct qeth_card *card)
2513 * TODO: according to the IPA format document page 14,
2514 * TCP/IP (we!) never issue a STOPLAN
2517 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2519 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2522 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2524 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2525 struct qeth_reply *reply, unsigned long data)
2527 struct qeth_ipa_cmd *cmd;
2529 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2531 cmd = (struct qeth_ipa_cmd *) data;
2532 if (cmd->hdr.return_code == 0)
2533 cmd->hdr.return_code =
2534 cmd->data.setadapterparms.hdr.return_code;
2537 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2539 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2540 struct qeth_reply *reply, unsigned long data)
2542 struct qeth_ipa_cmd *cmd;
2544 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2546 cmd = (struct qeth_ipa_cmd *) data;
2547 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2548 card->info.link_type =
2549 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2550 card->options.adp.supported_funcs =
2551 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2552 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2555 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2556 __u32 command, __u32 cmdlen)
2558 struct qeth_cmd_buffer *iob;
2559 struct qeth_ipa_cmd *cmd;
2561 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2563 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2564 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2565 cmd->data.setadapterparms.hdr.command_code = command;
2566 cmd->data.setadapterparms.hdr.used_total = 1;
2567 cmd->data.setadapterparms.hdr.seq_no = 1;
2571 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2573 int qeth_query_setadapterparms(struct qeth_card *card)
2576 struct qeth_cmd_buffer *iob;
2578 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2579 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2580 sizeof(struct qeth_ipacmd_setadpparms));
2581 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2584 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2586 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2587 unsigned int qdio_error, const char *dbftext)
2590 QETH_DBF_TEXT(TRACE, 2, dbftext);
2591 QETH_DBF_TEXT(QERR, 2, dbftext);
2592 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2593 buf->element[15].flags & 0xff);
2594 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2595 buf->element[14].flags & 0xff);
2596 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2597 if ((buf->element[15].flags & 0xff) == 0x12) {
2598 card->stats.rx_dropped++;
2605 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2607 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2609 struct qeth_qdio_q *queue = card->qdio.in_q;
2615 count = (index < queue->next_buf_to_init)?
2616 card->qdio.in_buf_pool.buf_count -
2617 (queue->next_buf_to_init - index) :
2618 card->qdio.in_buf_pool.buf_count -
2619 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2620 /* only requeue at a certain threshold to avoid SIGAs */
2621 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2622 for (i = queue->next_buf_to_init;
2623 i < queue->next_buf_to_init + count; ++i) {
2624 if (qeth_init_input_buffer(card,
2625 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2632 if (newcount < count) {
2633 /* we are in memory shortage so we switch back to
2634 traditional skb allocation and drop packages */
2635 atomic_set(&card->force_alloc_skb, 3);
2638 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2642 * according to old code it should be avoided to requeue all
2643 * 128 buffers in order to benefit from PCI avoidance.
2644 * this function keeps at least one buffer (the buffer at
2645 * 'index') un-requeued -> this buffer is the first buffer that
2646 * will be requeued the next time
2648 if (card->options.performance_stats) {
2649 card->perf_stats.inbound_do_qdio_cnt++;
2650 card->perf_stats.inbound_do_qdio_start_time =
2653 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2654 queue->next_buf_to_init, count);
2655 if (card->options.performance_stats)
2656 card->perf_stats.inbound_do_qdio_time +=
2658 card->perf_stats.inbound_do_qdio_start_time;
2660 dev_warn(&card->gdev->dev,
2661 "QDIO reported an error, rc=%i\n", rc);
2662 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2663 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2665 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2666 QDIO_MAX_BUFFERS_PER_Q;
2669 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2671 static int qeth_handle_send_error(struct qeth_card *card,
2672 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2674 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2676 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2677 if (card->info.type == QETH_CARD_TYPE_IQD) {
2684 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2687 return QETH_SEND_ERROR_NONE;
2689 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2690 return QETH_SEND_ERROR_RETRY;
2692 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2693 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2694 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2695 (u16)qdio_err, (u8)sbalf15);
2696 return QETH_SEND_ERROR_LINK_FAILURE;
2700 * Switched to packing state if the number of used buffers on a queue
2701 * reaches a certain limit.
2703 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2705 if (!queue->do_pack) {
2706 if (atomic_read(&queue->used_buffers)
2707 >= QETH_HIGH_WATERMARK_PACK){
2708 /* switch non-PACKING -> PACKING */
2709 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2710 if (queue->card->options.performance_stats)
2711 queue->card->perf_stats.sc_dp_p++;
2718 * Switches from packing to non-packing mode. If there is a packing
2719 * buffer on the queue this buffer will be prepared to be flushed.
2720 * In that case 1 is returned to inform the caller. If no buffer
2721 * has to be flushed, zero is returned.
2723 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2725 struct qeth_qdio_out_buffer *buffer;
2726 int flush_count = 0;
2728 if (queue->do_pack) {
2729 if (atomic_read(&queue->used_buffers)
2730 <= QETH_LOW_WATERMARK_PACK) {
2731 /* switch PACKING -> non-PACKING */
2732 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2733 if (queue->card->options.performance_stats)
2734 queue->card->perf_stats.sc_p_dp++;
2736 /* flush packing buffers */
2737 buffer = &queue->bufs[queue->next_buf_to_fill];
2738 if ((atomic_read(&buffer->state) ==
2739 QETH_QDIO_BUF_EMPTY) &&
2740 (buffer->next_element_to_fill > 0)) {
2741 atomic_set(&buffer->state,
2742 QETH_QDIO_BUF_PRIMED);
2744 queue->next_buf_to_fill =
2745 (queue->next_buf_to_fill + 1) %
2746 QDIO_MAX_BUFFERS_PER_Q;
2754 * Called to flush a packing buffer if no more pci flags are on the queue.
2755 * Checks if there is a packing buffer and prepares it to be flushed.
2756 * In that case returns 1, otherwise zero.
2758 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2760 struct qeth_qdio_out_buffer *buffer;
2762 buffer = &queue->bufs[queue->next_buf_to_fill];
2763 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2764 (buffer->next_element_to_fill > 0)) {
2765 /* it's a packing buffer */
2766 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2767 queue->next_buf_to_fill =
2768 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2774 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2777 struct qeth_qdio_out_buffer *buf;
2780 unsigned int qdio_flags;
2782 for (i = index; i < index + count; ++i) {
2783 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2784 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2785 SBAL_FLAGS_LAST_ENTRY;
2787 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2790 if (!queue->do_pack) {
2791 if ((atomic_read(&queue->used_buffers) >=
2792 (QETH_HIGH_WATERMARK_PACK -
2793 QETH_WATERMARK_PACK_FUZZ)) &&
2794 !atomic_read(&queue->set_pci_flags_count)) {
2795 /* it's likely that we'll go to packing
2797 atomic_inc(&queue->set_pci_flags_count);
2798 buf->buffer->element[0].flags |= 0x40;
2801 if (!atomic_read(&queue->set_pci_flags_count)) {
2803 * there's no outstanding PCI any more, so we
2804 * have to request a PCI to be sure the the PCI
2805 * will wake at some time in the future then we
2806 * can flush packed buffers that might still be
2807 * hanging around, which can happen if no
2808 * further send was requested by the stack
2810 atomic_inc(&queue->set_pci_flags_count);
2811 buf->buffer->element[0].flags |= 0x40;
2816 queue->sync_iqdio_error = 0;
2817 queue->card->dev->trans_start = jiffies;
2818 if (queue->card->options.performance_stats) {
2819 queue->card->perf_stats.outbound_do_qdio_cnt++;
2820 queue->card->perf_stats.outbound_do_qdio_start_time =
2823 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2824 if (atomic_read(&queue->set_pci_flags_count))
2825 qdio_flags |= QDIO_FLAG_PCI_OUT;
2826 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2827 queue->queue_no, index, count);
2828 if (queue->card->options.performance_stats)
2829 queue->card->perf_stats.outbound_do_qdio_time +=
2831 queue->card->perf_stats.outbound_do_qdio_start_time;
2833 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2834 queue->sync_iqdio_error = rc & 3;
2837 queue->card->stats.tx_errors += count;
2838 /* ignore temporary SIGA errors without busy condition */
2839 if (rc == QDIO_ERROR_SIGA_TARGET)
2841 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2842 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2843 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2845 /* this must not happen under normal circumstances. if it
2846 * happens something is really wrong -> recover */
2847 qeth_schedule_recovery(queue->card);
2850 atomic_add(count, &queue->used_buffers);
2851 if (queue->card->options.performance_stats)
2852 queue->card->perf_stats.bufs_sent += count;
2855 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2859 int q_was_packing = 0;
2862 * check if weed have to switch to non-packing mode or if
2863 * we have to get a pci flag out on the queue
2865 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2866 !atomic_read(&queue->set_pci_flags_count)) {
2867 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2868 QETH_OUT_Q_UNLOCKED) {
2870 * If we get in here, there was no action in
2871 * do_send_packet. So, we check if there is a
2872 * packing buffer to be flushed here.
2874 netif_stop_queue(queue->card->dev);
2875 index = queue->next_buf_to_fill;
2876 q_was_packing = queue->do_pack;
2877 /* queue->do_pack may change */
2879 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2881 !atomic_read(&queue->set_pci_flags_count))
2883 qeth_flush_buffers_on_no_pci(queue);
2884 if (queue->card->options.performance_stats &&
2886 queue->card->perf_stats.bufs_sent_pack +=
2889 qeth_flush_buffers(queue, index, flush_cnt);
2890 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2895 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2896 unsigned int qdio_error, int __queue, int first_element,
2897 int count, unsigned long card_ptr)
2899 struct qeth_card *card = (struct qeth_card *) card_ptr;
2900 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2901 struct qeth_qdio_out_buffer *buffer;
2903 unsigned qeth_send_err;
2905 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2906 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2907 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2908 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2909 netif_stop_queue(card->dev);
2910 qeth_schedule_recovery(card);
2913 if (card->options.performance_stats) {
2914 card->perf_stats.outbound_handler_cnt++;
2915 card->perf_stats.outbound_handler_start_time =
2918 for (i = first_element; i < (first_element + count); ++i) {
2919 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2920 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2921 __qeth_clear_output_buffer(queue, buffer,
2922 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2924 atomic_sub(count, &queue->used_buffers);
2925 /* check if we need to do something on this outbound queue */
2926 if (card->info.type != QETH_CARD_TYPE_IQD)
2927 qeth_check_outbound_queue(queue);
2929 netif_wake_queue(queue->card->dev);
2930 if (card->options.performance_stats)
2931 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2932 card->perf_stats.outbound_handler_start_time;
2934 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2936 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2937 int ipv, int cast_type)
2939 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2940 return card->qdio.default_out_queue;
2941 switch (card->qdio.no_out_queues) {
2943 if (cast_type && card->info.is_multicast_different)
2944 return card->info.is_multicast_different &
2945 (card->qdio.no_out_queues - 1);
2946 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2947 const u8 tos = ip_hdr(skb)->tos;
2949 if (card->qdio.do_prio_queueing ==
2950 QETH_PRIO_Q_ING_TOS) {
2951 if (tos & IP_TOS_NOTIMPORTANT)
2953 if (tos & IP_TOS_HIGHRELIABILITY)
2955 if (tos & IP_TOS_HIGHTHROUGHPUT)
2957 if (tos & IP_TOS_LOWDELAY)
2960 if (card->qdio.do_prio_queueing ==
2961 QETH_PRIO_Q_ING_PREC)
2962 return 3 - (tos >> 6);
2963 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2966 return card->qdio.default_out_queue;
2967 case 1: /* fallthrough for single-out-queue 1920-device */
2969 return card->qdio.default_out_queue;
2972 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2974 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2975 struct sk_buff *skb, int elems)
2977 int elements_needed = 0;
2979 if (skb_shinfo(skb)->nr_frags > 0)
2980 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
2981 if (elements_needed == 0)
2982 elements_needed = 1 + (((((unsigned long) skb->data) %
2983 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
2984 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
2985 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
2986 "(Number=%d / Length=%d). Discarded.\n",
2987 (elements_needed+elems), skb->len);
2990 return elements_needed;
2992 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
2994 static inline void __qeth_fill_buffer(struct sk_buff *skb,
2995 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
2998 int length = skb->len;
3004 element = *next_element_to_fill;
3006 first_lap = (is_tso == 0 ? 1 : 0);
3009 data = skb->data + offset;
3014 while (length > 0) {
3015 /* length_here is the remaining amount of data in this page */
3016 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3017 if (length < length_here)
3018 length_here = length;
3020 buffer->element[element].addr = data;
3021 buffer->element[element].length = length_here;
3022 length -= length_here;
3025 buffer->element[element].flags = 0;
3027 buffer->element[element].flags =
3028 SBAL_FLAGS_LAST_FRAG;
3031 buffer->element[element].flags =
3032 SBAL_FLAGS_FIRST_FRAG;
3034 buffer->element[element].flags =
3035 SBAL_FLAGS_MIDDLE_FRAG;
3037 data += length_here;
3041 *next_element_to_fill = element;
3044 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3045 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3046 struct qeth_hdr *hdr, int offset, int hd_len)
3048 struct qdio_buffer *buffer;
3049 int flush_cnt = 0, hdr_len, large_send = 0;
3051 buffer = buf->buffer;
3052 atomic_inc(&skb->users);
3053 skb_queue_tail(&buf->skb_list, skb);
3055 /*check first on TSO ....*/
3056 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3057 int element = buf->next_element_to_fill;
3059 hdr_len = sizeof(struct qeth_hdr_tso) +
3060 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3061 /*fill first buffer entry only with header information */
3062 buffer->element[element].addr = skb->data;
3063 buffer->element[element].length = hdr_len;
3064 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3065 buf->next_element_to_fill++;
3066 skb->data += hdr_len;
3067 skb->len -= hdr_len;
3072 int element = buf->next_element_to_fill;
3073 buffer->element[element].addr = hdr;
3074 buffer->element[element].length = sizeof(struct qeth_hdr) +
3076 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3077 buf->is_header[element] = 1;
3078 buf->next_element_to_fill++;
3081 if (skb_shinfo(skb)->nr_frags == 0)
3082 __qeth_fill_buffer(skb, buffer, large_send,
3083 (int *)&buf->next_element_to_fill, offset);
3085 __qeth_fill_buffer_frag(skb, buffer, large_send,
3086 (int *)&buf->next_element_to_fill);
3088 if (!queue->do_pack) {
3089 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3090 /* set state to PRIMED -> will be flushed */
3091 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3094 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3095 if (queue->card->options.performance_stats)
3096 queue->card->perf_stats.skbs_sent_pack++;
3097 if (buf->next_element_to_fill >=
3098 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3100 * packed buffer if full -> set state PRIMED
3101 * -> will be flushed
3103 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3110 int qeth_do_send_packet_fast(struct qeth_card *card,
3111 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3112 struct qeth_hdr *hdr, int elements_needed,
3113 int offset, int hd_len)
3115 struct qeth_qdio_out_buffer *buffer;
3116 struct sk_buff *skb1;
3117 struct qeth_skb_data *retry_ctrl;
3121 /* spin until we get the queue ... */
3122 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3123 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3124 /* ... now we've got the queue */
3125 index = queue->next_buf_to_fill;
3126 buffer = &queue->bufs[queue->next_buf_to_fill];
3128 * check if buffer is empty to make sure that we do not 'overtake'
3129 * ourselves and try to fill a buffer that is already primed
3131 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3133 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3134 QDIO_MAX_BUFFERS_PER_Q;
3135 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3136 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3137 qeth_flush_buffers(queue, index, 1);
3138 if (queue->sync_iqdio_error == 2) {
3139 skb1 = skb_dequeue(&buffer->skb_list);
3141 atomic_dec(&skb1->users);
3142 skb1 = skb_dequeue(&buffer->skb_list);
3144 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3145 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3146 retry_ctrl->magic = QETH_SKB_MAGIC;
3147 retry_ctrl->count = 0;
3149 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3150 retry_ctrl->count++;
3151 rc = dev_queue_xmit(skb);
3153 dev_kfree_skb_any(skb);
3154 QETH_DBF_TEXT(QERR, 2, "qrdrop");
3159 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3162 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3164 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3165 struct sk_buff *skb, struct qeth_hdr *hdr,
3166 int elements_needed)
3168 struct qeth_qdio_out_buffer *buffer;
3170 int flush_count = 0;
3175 /* spin until we get the queue ... */
3176 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3177 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3178 start_index = queue->next_buf_to_fill;
3179 buffer = &queue->bufs[queue->next_buf_to_fill];
3181 * check if buffer is empty to make sure that we do not 'overtake'
3182 * ourselves and try to fill a buffer that is already primed
3184 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3185 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3188 /* check if we need to switch packing state of this queue */
3189 qeth_switch_to_packing_if_needed(queue);
3190 if (queue->do_pack) {
3192 /* does packet fit in current buffer? */
3193 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3194 buffer->next_element_to_fill) < elements_needed) {
3195 /* ... no -> set state PRIMED */
3196 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3198 queue->next_buf_to_fill =
3199 (queue->next_buf_to_fill + 1) %
3200 QDIO_MAX_BUFFERS_PER_Q;
3201 buffer = &queue->bufs[queue->next_buf_to_fill];
3202 /* we did a step forward, so check buffer state
3204 if (atomic_read(&buffer->state) !=
3205 QETH_QDIO_BUF_EMPTY) {
3206 qeth_flush_buffers(queue, start_index,
3208 atomic_set(&queue->state,
3209 QETH_OUT_Q_UNLOCKED);
3214 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3215 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3216 QDIO_MAX_BUFFERS_PER_Q;
3219 qeth_flush_buffers(queue, start_index, flush_count);
3220 else if (!atomic_read(&queue->set_pci_flags_count))
3221 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3223 * queue->state will go from LOCKED -> UNLOCKED or from
3224 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3225 * (switch packing state or flush buffer to get another pci flag out).
3226 * In that case we will enter this loop
3228 while (atomic_dec_return(&queue->state)) {
3230 start_index = queue->next_buf_to_fill;
3231 /* check if we can go back to non-packing state */
3232 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3234 * check if we need to flush a packing buffer to get a pci
3235 * flag out on the queue
3237 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3238 flush_count += qeth_flush_buffers_on_no_pci(queue);
3240 qeth_flush_buffers(queue, start_index, flush_count);
3242 /* at this point the queue is UNLOCKED again */
3243 if (queue->card->options.performance_stats && do_pack)
3244 queue->card->perf_stats.bufs_sent_pack += flush_count;
3248 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3250 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3251 struct qeth_reply *reply, unsigned long data)
3253 struct qeth_ipa_cmd *cmd;
3254 struct qeth_ipacmd_setadpparms *setparms;
3256 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3258 cmd = (struct qeth_ipa_cmd *) data;
3259 setparms = &(cmd->data.setadapterparms);
3261 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3262 if (cmd->hdr.return_code) {
3263 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3264 setparms->data.mode = SET_PROMISC_MODE_OFF;
3266 card->info.promisc_mode = setparms->data.mode;
3270 void qeth_setadp_promisc_mode(struct qeth_card *card)
3272 enum qeth_ipa_promisc_modes mode;
3273 struct net_device *dev = card->dev;
3274 struct qeth_cmd_buffer *iob;
3275 struct qeth_ipa_cmd *cmd;
3277 QETH_DBF_TEXT(TRACE, 4, "setprom");
3279 if (((dev->flags & IFF_PROMISC) &&
3280 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3281 (!(dev->flags & IFF_PROMISC) &&
3282 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3284 mode = SET_PROMISC_MODE_OFF;
3285 if (dev->flags & IFF_PROMISC)
3286 mode = SET_PROMISC_MODE_ON;
3287 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3289 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3290 sizeof(struct qeth_ipacmd_setadpparms));
3291 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3292 cmd->data.setadapterparms.data.mode = mode;
3293 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3295 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3297 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3299 struct qeth_card *card;
3302 card = dev->ml_priv;
3304 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3305 sprintf(dbf_text, "%8x", new_mtu);
3306 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3310 if (new_mtu > 65535)
3312 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3313 (!qeth_mtu_is_valid(card, new_mtu)))
3318 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3320 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3322 struct qeth_card *card;
3324 card = dev->ml_priv;
3326 QETH_DBF_TEXT(TRACE, 5, "getstat");
3328 return &card->stats;
3330 EXPORT_SYMBOL_GPL(qeth_get_stats);
3332 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3333 struct qeth_reply *reply, unsigned long data)
3335 struct qeth_ipa_cmd *cmd;
3337 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3339 cmd = (struct qeth_ipa_cmd *) data;
3340 if (!card->options.layer2 ||
3341 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3342 memcpy(card->dev->dev_addr,
3343 &cmd->data.setadapterparms.data.change_addr.addr,
3345 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3347 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3351 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3354 struct qeth_cmd_buffer *iob;
3355 struct qeth_ipa_cmd *cmd;
3357 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3359 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3360 sizeof(struct qeth_ipacmd_setadpparms));
3361 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3362 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3363 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3364 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3365 card->dev->dev_addr, OSA_ADDR_LEN);
3366 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3370 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3372 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3373 struct qeth_reply *reply, unsigned long data)
3375 struct qeth_ipa_cmd *cmd;
3376 struct qeth_set_access_ctrl *access_ctrl_req;
3379 QETH_DBF_TEXT(TRACE, 4, "setaccb");
3381 cmd = (struct qeth_ipa_cmd *) data;
3382 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3383 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3384 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3385 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3386 cmd->data.setadapterparms.hdr.return_code);
3387 switch (cmd->data.setadapterparms.hdr.return_code) {
3388 case SET_ACCESS_CTRL_RC_SUCCESS:
3389 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3390 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3392 card->options.isolation = access_ctrl_req->subcmd_code;
3393 if (card->options.isolation == ISOLATION_MODE_NONE) {
3394 dev_info(&card->gdev->dev,
3395 "QDIO data connection isolation is deactivated\n");
3397 dev_info(&card->gdev->dev,
3398 "QDIO data connection isolation is activated\n");
3400 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3401 card->gdev->dev.kobj.name,
3402 access_ctrl_req->subcmd_code,
3403 cmd->data.setadapterparms.hdr.return_code);
3407 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3409 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3410 card->gdev->dev.kobj.name,
3411 access_ctrl_req->subcmd_code,
3412 cmd->data.setadapterparms.hdr.return_code);
3413 dev_err(&card->gdev->dev, "Adapter does not "
3414 "support QDIO data connection isolation\n");
3416 /* ensure isolation mode is "none" */
3417 card->options.isolation = ISOLATION_MODE_NONE;
3421 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3423 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3424 card->gdev->dev.kobj.name,
3425 access_ctrl_req->subcmd_code,
3426 cmd->data.setadapterparms.hdr.return_code);
3427 dev_err(&card->gdev->dev,
3428 "Adapter is dedicated. "
3429 "QDIO data connection isolation not supported\n");
3431 /* ensure isolation mode is "none" */
3432 card->options.isolation = ISOLATION_MODE_NONE;
3436 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3438 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3439 card->gdev->dev.kobj.name,
3440 access_ctrl_req->subcmd_code,
3441 cmd->data.setadapterparms.hdr.return_code);
3442 dev_err(&card->gdev->dev,
3443 "TSO does not permit QDIO data connection isolation\n");
3445 /* ensure isolation mode is "none" */
3446 card->options.isolation = ISOLATION_MODE_NONE;
3452 /* this should never happen */
3453 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3455 card->gdev->dev.kobj.name,
3456 access_ctrl_req->subcmd_code,
3457 cmd->data.setadapterparms.hdr.return_code);
3459 /* ensure isolation mode is "none" */
3460 card->options.isolation = ISOLATION_MODE_NONE;
3465 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3469 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3470 enum qeth_ipa_isolation_modes isolation)
3473 struct qeth_cmd_buffer *iob;
3474 struct qeth_ipa_cmd *cmd;
3475 struct qeth_set_access_ctrl *access_ctrl_req;
3477 QETH_DBF_TEXT(TRACE, 4, "setacctl");
3479 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3480 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3482 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3483 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3484 sizeof(struct qeth_set_access_ctrl));
3485 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3486 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3487 access_ctrl_req->subcmd_code = isolation;
3489 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3491 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3495 int qeth_set_access_ctrl_online(struct qeth_card *card)
3499 QETH_DBF_TEXT(TRACE, 4, "setactlo");
3501 if (card->info.type == QETH_CARD_TYPE_OSAE &&
3502 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3503 rc = qeth_setadpparms_set_access_ctrl(card,
3504 card->options.isolation);
3507 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed",
3508 card->gdev->dev.kobj.name,
3511 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3512 card->options.isolation = ISOLATION_MODE_NONE;
3514 dev_err(&card->gdev->dev, "Adapter does not "
3515 "support QDIO data connection isolation\n");
3520 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3522 void qeth_tx_timeout(struct net_device *dev)
3524 struct qeth_card *card;
3526 QETH_DBF_TEXT(TRACE, 4, "txtimeo");
3527 card = dev->ml_priv;
3528 card->stats.tx_errors++;
3529 qeth_schedule_recovery(card);
3531 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3533 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3535 struct qeth_card *card = dev->ml_priv;
3539 case MII_BMCR: /* Basic mode control register */
3541 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3542 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3543 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3544 rc |= BMCR_SPEED100;
3546 case MII_BMSR: /* Basic mode status register */
3547 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3548 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3551 case MII_PHYSID1: /* PHYS ID 1 */
3552 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3554 rc = (rc >> 5) & 0xFFFF;
3556 case MII_PHYSID2: /* PHYS ID 2 */
3557 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3559 case MII_ADVERTISE: /* Advertisement control reg */
3562 case MII_LPA: /* Link partner ability reg */
3563 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3564 LPA_100BASE4 | LPA_LPACK;
3566 case MII_EXPANSION: /* Expansion register */
3568 case MII_DCOUNTER: /* disconnect counter */
3570 case MII_FCSCOUNTER: /* false carrier counter */
3572 case MII_NWAYTEST: /* N-way auto-neg test register */
3574 case MII_RERRCOUNTER: /* rx error counter */
3575 rc = card->stats.rx_errors;
3577 case MII_SREVISION: /* silicon revision */
3579 case MII_RESV1: /* reserved 1 */
3581 case MII_LBRERROR: /* loopback, rx, bypass error */
3583 case MII_PHYADDR: /* physical address */
3585 case MII_RESV2: /* reserved 2 */
3587 case MII_TPISTATUS: /* TPI status for 10mbps */
3589 case MII_NCONFIG: /* network interface config */
3596 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3598 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3599 struct qeth_cmd_buffer *iob, int len,
3600 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3606 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3608 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3609 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3610 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3611 /* adjust PDU length fields in IPA_PDU_HEADER */
3612 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3614 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3615 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3616 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3617 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3618 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3619 reply_cb, reply_param);
3622 static int qeth_snmp_command_cb(struct qeth_card *card,
3623 struct qeth_reply *reply, unsigned long sdata)
3625 struct qeth_ipa_cmd *cmd;
3626 struct qeth_arp_query_info *qinfo;
3627 struct qeth_snmp_cmd *snmp;
3628 unsigned char *data;
3631 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3633 cmd = (struct qeth_ipa_cmd *) sdata;
3634 data = (unsigned char *)((char *)cmd - reply->offset);
3635 qinfo = (struct qeth_arp_query_info *) reply->param;
3636 snmp = &cmd->data.setadapterparms.data.snmp;
3638 if (cmd->hdr.return_code) {
3639 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3642 if (cmd->data.setadapterparms.hdr.return_code) {
3643 cmd->hdr.return_code =
3644 cmd->data.setadapterparms.hdr.return_code;
3645 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3648 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3649 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3650 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3652 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3654 /* check if there is enough room in userspace */
3655 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3656 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3657 cmd->hdr.return_code = -ENOMEM;
3660 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3661 cmd->data.setadapterparms.hdr.used_total);
3662 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3663 cmd->data.setadapterparms.hdr.seq_no);
3664 /*copy entries to user buffer*/
3665 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3666 memcpy(qinfo->udata + qinfo->udata_offset,
3668 data_len + offsetof(struct qeth_snmp_cmd, data));
3669 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3671 memcpy(qinfo->udata + qinfo->udata_offset,
3672 (char *)&snmp->request, data_len);
3674 qinfo->udata_offset += data_len;
3675 /* check if all replies received ... */
3676 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3677 cmd->data.setadapterparms.hdr.used_total);
3678 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3679 cmd->data.setadapterparms.hdr.seq_no);
3680 if (cmd->data.setadapterparms.hdr.seq_no <
3681 cmd->data.setadapterparms.hdr.used_total)
3686 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3688 struct qeth_cmd_buffer *iob;
3689 struct qeth_ipa_cmd *cmd;
3690 struct qeth_snmp_ureq *ureq;
3692 struct qeth_arp_query_info qinfo = {0, };
3695 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3697 if (card->info.guestlan)
3700 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3701 (!card->options.layer2)) {
3704 /* skip 4 bytes (data_len struct member) to get req_len */
3705 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3707 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3709 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3712 if (copy_from_user(ureq, udata,
3713 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3717 qinfo.udata_len = ureq->hdr.data_len;
3718 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3723 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3725 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3726 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3727 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3728 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3729 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3730 qeth_snmp_command_cb, (void *)&qinfo);
3732 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3733 QETH_CARD_IFNAME(card), rc);
3735 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3743 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3745 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3747 switch (card->info.type) {
3748 case QETH_CARD_TYPE_IQD:
3755 static int qeth_qdio_establish(struct qeth_card *card)
3757 struct qdio_initialize init_data;
3758 char *qib_param_field;
3759 struct qdio_buffer **in_sbal_ptrs;
3760 struct qdio_buffer **out_sbal_ptrs;
3764 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3766 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3768 if (!qib_param_field)
3771 qeth_create_qib_param_field(card, qib_param_field);
3772 qeth_create_qib_param_field_blkt(card, qib_param_field);
3774 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3776 if (!in_sbal_ptrs) {
3777 kfree(qib_param_field);
3780 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3781 in_sbal_ptrs[i] = (struct qdio_buffer *)
3782 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3785 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3786 sizeof(void *), GFP_KERNEL);
3787 if (!out_sbal_ptrs) {
3788 kfree(in_sbal_ptrs);
3789 kfree(qib_param_field);
3792 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3793 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3794 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3795 card->qdio.out_qs[i]->bufs[j].buffer);
3798 memset(&init_data, 0, sizeof(struct qdio_initialize));
3799 init_data.cdev = CARD_DDEV(card);
3800 init_data.q_format = qeth_get_qdio_q_format(card);
3801 init_data.qib_param_field_format = 0;
3802 init_data.qib_param_field = qib_param_field;
3803 init_data.no_input_qs = 1;
3804 init_data.no_output_qs = card->qdio.no_out_queues;
3805 init_data.input_handler = card->discipline.input_handler;
3806 init_data.output_handler = card->discipline.output_handler;
3807 init_data.int_parm = (unsigned long) card;
3808 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3809 QDIO_OUTBOUND_0COPY_SBALS |
3810 QDIO_USE_OUTBOUND_PCIS;
3811 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3812 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3814 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3815 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3816 rc = qdio_initialize(&init_data);
3818 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3820 kfree(out_sbal_ptrs);
3821 kfree(in_sbal_ptrs);
3822 kfree(qib_param_field);
3826 static void qeth_core_free_card(struct qeth_card *card)
3829 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3830 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3831 qeth_clean_channel(&card->read);
3832 qeth_clean_channel(&card->write);
3834 free_netdev(card->dev);
3835 kfree(card->ip_tbd_list);
3836 qeth_free_qdio_buffers(card);
3837 unregister_service_level(&card->qeth_service_level);
3841 static struct ccw_device_id qeth_ids[] = {
3842 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3843 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3844 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3847 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3849 static struct ccw_driver qeth_ccw_driver = {
3852 .probe = ccwgroup_probe_ccwdev,
3853 .remove = ccwgroup_remove_ccwdev,
3856 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3857 unsigned long driver_id)
3859 return ccwgroup_create_from_string(root_dev, driver_id,
3860 &qeth_ccw_driver, 3, buf);
3863 int qeth_core_hardsetup_card(struct qeth_card *card)
3868 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3869 atomic_set(&card->force_alloc_skb, 0);
3872 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3873 dev_name(&card->gdev->dev));
3874 ccw_device_set_offline(CARD_DDEV(card));
3875 ccw_device_set_offline(CARD_WDEV(card));
3876 ccw_device_set_offline(CARD_RDEV(card));
3877 rc = ccw_device_set_online(CARD_RDEV(card));
3880 rc = ccw_device_set_online(CARD_WDEV(card));
3883 rc = ccw_device_set_online(CARD_DDEV(card));
3886 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3888 if (rc == -ERESTARTSYS) {
3889 QETH_DBF_TEXT(SETUP, 2, "break1");
3892 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3898 qeth_init_tokens(card);
3899 qeth_init_func_level(card);
3900 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3901 if (rc == -ERESTARTSYS) {
3902 QETH_DBF_TEXT(SETUP, 2, "break2");
3905 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3911 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3912 if (rc == -ERESTARTSYS) {
3913 QETH_DBF_TEXT(SETUP, 2, "break3");
3916 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3922 rc = qeth_mpc_initialize(card);
3924 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3929 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3930 "an error on the device\n");
3931 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3932 dev_name(&card->gdev->dev), rc);
3935 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3937 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3938 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3940 struct page *page = virt_to_page(element->addr);
3941 if (*pskb == NULL) {
3942 /* the upper protocol layers assume that there is data in the
3943 * skb itself. Copy a small amount (64 bytes) to make them
3945 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3948 skb_reserve(*pskb, ETH_HLEN);
3949 if (data_len <= 64) {
3950 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3954 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3955 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3957 (*pskb)->data_len += data_len - 64;
3958 (*pskb)->len += data_len - 64;
3959 (*pskb)->truesize += data_len - 64;
3964 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3965 (*pskb)->data_len += data_len;
3966 (*pskb)->len += data_len;
3967 (*pskb)->truesize += data_len;
3973 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3974 struct qdio_buffer *buffer,
3975 struct qdio_buffer_element **__element, int *__offset,
3976 struct qeth_hdr **hdr)
3978 struct qdio_buffer_element *element = *__element;
3979 int offset = *__offset;
3980 struct sk_buff *skb = NULL;
3988 /* qeth_hdr must not cross element boundaries */
3989 if (element->length < offset + sizeof(struct qeth_hdr)) {
3990 if (qeth_is_last_sbale(element))
3994 if (element->length < sizeof(struct qeth_hdr))
3997 *hdr = element->addr + offset;
3999 offset += sizeof(struct qeth_hdr);
4000 switch ((*hdr)->hdr.l2.id) {
4001 case QETH_HEADER_TYPE_LAYER2:
4002 skb_len = (*hdr)->hdr.l2.pkt_length;
4004 case QETH_HEADER_TYPE_LAYER3:
4005 skb_len = (*hdr)->hdr.l3.length;
4006 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4007 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4010 headroom = ETH_HLEN;
4012 case QETH_HEADER_TYPE_OSN:
4013 skb_len = (*hdr)->hdr.osn.pdu_length;
4014 headroom = sizeof(struct qeth_hdr);
4023 if ((skb_len >= card->options.rx_sg_cb) &&
4024 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4025 (!atomic_read(&card->force_alloc_skb))) {
4028 skb = dev_alloc_skb(skb_len + headroom);
4032 skb_reserve(skb, headroom);
4035 data_ptr = element->addr + offset;
4037 data_len = min(skb_len, (int)(element->length - offset));
4040 if (qeth_create_skb_frag(element, &skb, offset,
4044 memcpy(skb_put(skb, data_len), data_ptr,
4048 skb_len -= data_len;
4050 if (qeth_is_last_sbale(element)) {
4051 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4052 QETH_DBF_TEXT_(TRACE, 4, "%s",
4054 QETH_DBF_TEXT(QERR, 2, "unexeob");
4055 QETH_DBF_TEXT_(QERR, 2, "%s",
4057 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4058 dev_kfree_skb_any(skb);
4059 card->stats.rx_errors++;
4064 data_ptr = element->addr;
4069 *__element = element;
4071 if (use_rx_sg && card->options.performance_stats) {
4072 card->perf_stats.sg_skbs_rx++;
4073 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4077 if (net_ratelimit()) {
4078 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4079 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4081 card->stats.rx_dropped++;
4084 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4086 static void qeth_unregister_dbf_views(void)
4089 for (x = 0; x < QETH_DBF_INFOS; x++) {
4090 debug_unregister(qeth_dbf[x].id);
4091 qeth_dbf[x].id = NULL;
4095 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4097 char dbf_txt_buf[32];
4100 if (level > (qeth_dbf[dbf_nix].id)->level)
4102 va_start(args, fmt);
4103 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4105 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4107 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4109 static int qeth_register_dbf_views(void)
4114 for (x = 0; x < QETH_DBF_INFOS; x++) {
4115 /* register the areas */
4116 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4120 if (qeth_dbf[x].id == NULL) {
4121 qeth_unregister_dbf_views();
4125 /* register a view */
4126 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4128 qeth_unregister_dbf_views();
4132 /* set a passing level */
4133 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4139 int qeth_core_load_discipline(struct qeth_card *card,
4140 enum qeth_discipline_id discipline)
4143 switch (discipline) {
4144 case QETH_DISCIPLINE_LAYER3:
4145 card->discipline.ccwgdriver = try_then_request_module(
4146 symbol_get(qeth_l3_ccwgroup_driver),
4149 case QETH_DISCIPLINE_LAYER2:
4150 card->discipline.ccwgdriver = try_then_request_module(
4151 symbol_get(qeth_l2_ccwgroup_driver),
4155 if (!card->discipline.ccwgdriver) {
4156 dev_err(&card->gdev->dev, "There is no kernel module to "
4157 "support discipline %d\n", discipline);
4163 void qeth_core_free_discipline(struct qeth_card *card)
4165 if (card->options.layer2)
4166 symbol_put(qeth_l2_ccwgroup_driver);
4168 symbol_put(qeth_l3_ccwgroup_driver);
4169 card->discipline.ccwgdriver = NULL;
4172 static void qeth_determine_capabilities(struct qeth_card *card)
4178 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4179 rc = ccw_device_set_online(CARD_DDEV(card));
4181 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4186 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4188 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4189 dev_name(&card->gdev->dev), rc);
4190 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4193 qeth_configure_unitaddr(card, prcd);
4194 qeth_configure_blkt_default(card, prcd);
4197 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4199 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4202 ccw_device_set_offline(CARD_DDEV(card));
4207 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4209 struct qeth_card *card;
4212 unsigned long flags;
4214 QETH_DBF_TEXT(SETUP, 2, "probedev");
4217 if (!get_device(dev))
4220 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4222 card = qeth_alloc_card();
4224 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4228 card->read.ccwdev = gdev->cdev[0];
4229 card->write.ccwdev = gdev->cdev[1];
4230 card->data.ccwdev = gdev->cdev[2];
4231 dev_set_drvdata(&gdev->dev, card);
4233 gdev->cdev[0]->handler = qeth_irq;
4234 gdev->cdev[1]->handler = qeth_irq;
4235 gdev->cdev[2]->handler = qeth_irq;
4237 rc = qeth_determine_card_type(card);
4239 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4242 rc = qeth_setup_card(card);
4244 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4248 if (card->info.type == QETH_CARD_TYPE_OSN) {
4249 rc = qeth_core_create_osn_attributes(dev);
4252 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4254 qeth_core_remove_osn_attributes(dev);
4257 rc = card->discipline.ccwgdriver->probe(card->gdev);
4259 qeth_core_free_discipline(card);
4260 qeth_core_remove_osn_attributes(dev);
4264 rc = qeth_core_create_device_attributes(dev);
4269 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4270 list_add_tail(&card->list, &qeth_core_card_list.list);
4271 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4273 qeth_determine_capabilities(card);
4277 qeth_core_free_card(card);
4283 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4285 unsigned long flags;
4286 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4288 QETH_DBF_TEXT(SETUP, 2, "removedv");
4289 if (card->discipline.ccwgdriver) {
4290 card->discipline.ccwgdriver->remove(gdev);
4291 qeth_core_free_discipline(card);
4294 if (card->info.type == QETH_CARD_TYPE_OSN) {
4295 qeth_core_remove_osn_attributes(&gdev->dev);
4297 qeth_core_remove_device_attributes(&gdev->dev);
4299 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4300 list_del(&card->list);
4301 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4302 qeth_core_free_card(card);
4303 dev_set_drvdata(&gdev->dev, NULL);
4304 put_device(&gdev->dev);
4308 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4310 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4314 if (!card->discipline.ccwgdriver) {
4315 if (card->info.type == QETH_CARD_TYPE_IQD)
4316 def_discipline = QETH_DISCIPLINE_LAYER3;
4318 def_discipline = QETH_DISCIPLINE_LAYER2;
4319 rc = qeth_core_load_discipline(card, def_discipline);
4322 rc = card->discipline.ccwgdriver->probe(card->gdev);
4326 rc = card->discipline.ccwgdriver->set_online(gdev);
4331 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4333 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4334 return card->discipline.ccwgdriver->set_offline(gdev);
4337 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4339 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4340 if (card->discipline.ccwgdriver &&
4341 card->discipline.ccwgdriver->shutdown)
4342 card->discipline.ccwgdriver->shutdown(gdev);
4345 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4347 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4348 if (card->discipline.ccwgdriver &&
4349 card->discipline.ccwgdriver->prepare)
4350 return card->discipline.ccwgdriver->prepare(gdev);
4354 static void qeth_core_complete(struct ccwgroup_device *gdev)
4356 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4357 if (card->discipline.ccwgdriver &&
4358 card->discipline.ccwgdriver->complete)
4359 card->discipline.ccwgdriver->complete(gdev);
4362 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4364 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4365 if (card->discipline.ccwgdriver &&
4366 card->discipline.ccwgdriver->freeze)
4367 return card->discipline.ccwgdriver->freeze(gdev);
4371 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4373 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4374 if (card->discipline.ccwgdriver &&
4375 card->discipline.ccwgdriver->thaw)
4376 return card->discipline.ccwgdriver->thaw(gdev);
4380 static int qeth_core_restore(struct ccwgroup_device *gdev)
4382 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4383 if (card->discipline.ccwgdriver &&
4384 card->discipline.ccwgdriver->restore)
4385 return card->discipline.ccwgdriver->restore(gdev);
4389 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4390 .owner = THIS_MODULE,
4392 .driver_id = 0xD8C5E3C8,
4393 .probe = qeth_core_probe_device,
4394 .remove = qeth_core_remove_device,
4395 .set_online = qeth_core_set_online,
4396 .set_offline = qeth_core_set_offline,
4397 .shutdown = qeth_core_shutdown,
4398 .prepare = qeth_core_prepare,
4399 .complete = qeth_core_complete,
4400 .freeze = qeth_core_freeze,
4401 .thaw = qeth_core_thaw,
4402 .restore = qeth_core_restore,
4406 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4410 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4411 qeth_core_ccwgroup_driver.driver_id);
4418 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4421 const char str[ETH_GSTRING_LEN];
4422 } qeth_ethtool_stats_keys[] = {
4427 {"tx skbs no packing"},
4428 {"tx buffers no packing"},
4429 {"tx skbs packing"},
4430 {"tx buffers packing"},
4433 /* 10 */{"rx sg skbs"},
4435 {"rx sg page allocs"},
4436 {"tx large kbytes"},
4438 {"tx pk state ch n->p"},
4439 {"tx pk state ch p->n"},
4440 {"tx pk watermark low"},
4441 {"tx pk watermark high"},
4442 {"queue 0 buffer usage"},
4443 /* 20 */{"queue 1 buffer usage"},
4444 {"queue 2 buffer usage"},
4445 {"queue 3 buffer usage"},
4446 {"rx handler time"},
4447 {"rx handler count"},
4448 {"rx do_QDIO time"},
4449 {"rx do_QDIO count"},
4450 {"tx handler time"},
4451 {"tx handler count"},
4453 /* 30 */{"tx count"},
4454 {"tx do_QDIO time"},
4455 {"tx do_QDIO count"},
4460 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4462 switch (stringset) {
4464 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4469 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4471 void qeth_core_get_ethtool_stats(struct net_device *dev,
4472 struct ethtool_stats *stats, u64 *data)
4474 struct qeth_card *card = dev->ml_priv;
4475 data[0] = card->stats.rx_packets -
4476 card->perf_stats.initial_rx_packets;
4477 data[1] = card->perf_stats.bufs_rec;
4478 data[2] = card->stats.tx_packets -
4479 card->perf_stats.initial_tx_packets;
4480 data[3] = card->perf_stats.bufs_sent;
4481 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4482 - card->perf_stats.skbs_sent_pack;
4483 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4484 data[6] = card->perf_stats.skbs_sent_pack;
4485 data[7] = card->perf_stats.bufs_sent_pack;
4486 data[8] = card->perf_stats.sg_skbs_sent;
4487 data[9] = card->perf_stats.sg_frags_sent;
4488 data[10] = card->perf_stats.sg_skbs_rx;
4489 data[11] = card->perf_stats.sg_frags_rx;
4490 data[12] = card->perf_stats.sg_alloc_page_rx;
4491 data[13] = (card->perf_stats.large_send_bytes >> 10);
4492 data[14] = card->perf_stats.large_send_cnt;
4493 data[15] = card->perf_stats.sc_dp_p;
4494 data[16] = card->perf_stats.sc_p_dp;
4495 data[17] = QETH_LOW_WATERMARK_PACK;
4496 data[18] = QETH_HIGH_WATERMARK_PACK;
4497 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4498 data[20] = (card->qdio.no_out_queues > 1) ?
4499 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4500 data[21] = (card->qdio.no_out_queues > 2) ?
4501 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4502 data[22] = (card->qdio.no_out_queues > 3) ?
4503 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4504 data[23] = card->perf_stats.inbound_time;
4505 data[24] = card->perf_stats.inbound_cnt;
4506 data[25] = card->perf_stats.inbound_do_qdio_time;
4507 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4508 data[27] = card->perf_stats.outbound_handler_time;
4509 data[28] = card->perf_stats.outbound_handler_cnt;
4510 data[29] = card->perf_stats.outbound_time;
4511 data[30] = card->perf_stats.outbound_cnt;
4512 data[31] = card->perf_stats.outbound_do_qdio_time;
4513 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4514 data[33] = card->perf_stats.tx_csum;
4515 data[34] = card->perf_stats.tx_lin;
4517 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4519 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4521 switch (stringset) {
4523 memcpy(data, &qeth_ethtool_stats_keys,
4524 sizeof(qeth_ethtool_stats_keys));
4531 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4533 void qeth_core_get_drvinfo(struct net_device *dev,
4534 struct ethtool_drvinfo *info)
4536 struct qeth_card *card = dev->ml_priv;
4537 if (card->options.layer2)
4538 strcpy(info->driver, "qeth_l2");
4540 strcpy(info->driver, "qeth_l3");
4542 strcpy(info->version, "1.0");
4543 strcpy(info->fw_version, card->info.mcl_level);
4544 sprintf(info->bus_info, "%s/%s/%s",
4547 CARD_DDEV_ID(card));
4549 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4551 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4552 struct ethtool_cmd *ecmd)
4554 struct qeth_card *card = netdev->ml_priv;
4555 enum qeth_link_types link_type;
4557 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4558 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4560 link_type = card->info.link_type;
4562 ecmd->transceiver = XCVR_INTERNAL;
4563 ecmd->supported = SUPPORTED_Autoneg;
4564 ecmd->advertising = ADVERTISED_Autoneg;
4565 ecmd->duplex = DUPLEX_FULL;
4566 ecmd->autoneg = AUTONEG_ENABLE;
4568 switch (link_type) {
4569 case QETH_LINK_TYPE_FAST_ETH:
4570 case QETH_LINK_TYPE_LANE_ETH100:
4571 ecmd->supported |= SUPPORTED_10baseT_Half |
4572 SUPPORTED_10baseT_Full |
4573 SUPPORTED_100baseT_Half |
4574 SUPPORTED_100baseT_Full |
4576 ecmd->advertising |= ADVERTISED_10baseT_Half |
4577 ADVERTISED_10baseT_Full |
4578 ADVERTISED_100baseT_Half |
4579 ADVERTISED_100baseT_Full |
4581 ecmd->speed = SPEED_100;
4582 ecmd->port = PORT_TP;
4585 case QETH_LINK_TYPE_GBIT_ETH:
4586 case QETH_LINK_TYPE_LANE_ETH1000:
4587 ecmd->supported |= SUPPORTED_10baseT_Half |
4588 SUPPORTED_10baseT_Full |
4589 SUPPORTED_100baseT_Half |
4590 SUPPORTED_100baseT_Full |
4591 SUPPORTED_1000baseT_Half |
4592 SUPPORTED_1000baseT_Full |
4594 ecmd->advertising |= ADVERTISED_10baseT_Half |
4595 ADVERTISED_10baseT_Full |
4596 ADVERTISED_100baseT_Half |
4597 ADVERTISED_100baseT_Full |
4598 ADVERTISED_1000baseT_Half |
4599 ADVERTISED_1000baseT_Full |
4601 ecmd->speed = SPEED_1000;
4602 ecmd->port = PORT_FIBRE;
4605 case QETH_LINK_TYPE_10GBIT_ETH:
4606 ecmd->supported |= SUPPORTED_10baseT_Half |
4607 SUPPORTED_10baseT_Full |
4608 SUPPORTED_100baseT_Half |
4609 SUPPORTED_100baseT_Full |
4610 SUPPORTED_1000baseT_Half |
4611 SUPPORTED_1000baseT_Full |
4612 SUPPORTED_10000baseT_Full |
4614 ecmd->advertising |= ADVERTISED_10baseT_Half |
4615 ADVERTISED_10baseT_Full |
4616 ADVERTISED_100baseT_Half |
4617 ADVERTISED_100baseT_Full |
4618 ADVERTISED_1000baseT_Half |
4619 ADVERTISED_1000baseT_Full |
4620 ADVERTISED_10000baseT_Full |
4622 ecmd->speed = SPEED_10000;
4623 ecmd->port = PORT_FIBRE;
4627 ecmd->supported |= SUPPORTED_10baseT_Half |
4628 SUPPORTED_10baseT_Full |
4630 ecmd->advertising |= ADVERTISED_10baseT_Half |
4631 ADVERTISED_10baseT_Full |
4633 ecmd->speed = SPEED_10;
4634 ecmd->port = PORT_TP;
4639 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4641 static int __init qeth_core_init(void)
4645 pr_info("loading core functions\n");
4646 INIT_LIST_HEAD(&qeth_core_card_list.list);
4647 rwlock_init(&qeth_core_card_list.rwlock);
4649 rc = qeth_register_dbf_views();
4652 rc = ccw_driver_register(&qeth_ccw_driver);
4655 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4658 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4659 &driver_attr_group);
4662 qeth_core_root_dev = root_device_register("qeth");
4663 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4667 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4668 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4669 if (!qeth_core_header_cache) {
4676 root_device_unregister(qeth_core_root_dev);
4678 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4679 &driver_attr_group);
4681 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4683 ccw_driver_unregister(&qeth_ccw_driver);
4685 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4686 qeth_unregister_dbf_views();
4688 pr_err("Initializing the qeth device driver failed\n");
4692 static void __exit qeth_core_exit(void)
4694 root_device_unregister(qeth_core_root_dev);
4695 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4696 &driver_attr_group);
4697 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4698 ccw_driver_unregister(&qeth_ccw_driver);
4699 kmem_cache_destroy(qeth_core_header_cache);
4700 qeth_unregister_dbf_views();
4701 pr_info("core functions removed\n");
4704 module_init(qeth_core_init);
4705 module_exit(qeth_core_exit);
4706 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4707 MODULE_DESCRIPTION("qeth core functions");
4708 MODULE_LICENSE("GPL");