2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
29 * Abstract: Hardware Device Interface for PMC SRC based controllers
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/types.h>
36 #include <linux/pci.h>
37 #include <linux/spinlock.h>
38 #include <linux/slab.h>
39 #include <linux/blkdev.h>
40 #include <linux/delay.h>
41 #include <linux/completion.h>
42 #include <linux/time.h>
43 #include <linux/interrupt.h>
44 #include <scsi/scsi_host.h>
48 static int aac_src_get_sync_status(struct aac_dev *dev);
50 static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
52 struct aac_msix_ctx *ctx;
54 unsigned long bellbits, bellbits_shifted;
56 int isFastResponse, mode;
59 ctx = (struct aac_msix_ctx *)dev_id;
61 vector_no = ctx->vector_no;
63 if (dev->msi_enabled) {
64 mode = AAC_INT_MODE_MSI;
66 bellbits = src_readl(dev, MUnit.ODR_MSI);
67 if (bellbits & 0x40000)
68 mode |= AAC_INT_MODE_AIF;
69 if (bellbits & 0x1000)
70 mode |= AAC_INT_MODE_SYNC;
73 mode = AAC_INT_MODE_INTX;
74 bellbits = src_readl(dev, MUnit.ODR_R);
75 if (bellbits & PmDoorBellResponseSent) {
76 bellbits = PmDoorBellResponseSent;
77 src_writel(dev, MUnit.ODR_C, bellbits);
78 src_readl(dev, MUnit.ODR_C);
80 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
81 src_writel(dev, MUnit.ODR_C, bellbits);
82 src_readl(dev, MUnit.ODR_C);
84 if (bellbits_shifted & DoorBellAifPending)
85 mode |= AAC_INT_MODE_AIF;
86 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
87 mode |= AAC_INT_MODE_SYNC;
91 if (mode & AAC_INT_MODE_SYNC) {
93 struct list_head *entry;
95 extern int aac_sync_mode;
97 if (!aac_sync_mode && !dev->msi_enabled) {
98 src_writel(dev, MUnit.ODR_C, bellbits);
99 src_readl(dev, MUnit.ODR_C);
103 if (dev->sync_fib->callback)
104 dev->sync_fib->callback(dev->sync_fib->callback_data,
106 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
107 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
108 dev->management_fib_count--;
109 up(&dev->sync_fib->event_wait);
111 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
113 spin_lock_irqsave(&dev->sync_lock, sflags);
114 if (!list_empty(&dev->sync_fib_list)) {
115 entry = dev->sync_fib_list.next;
116 dev->sync_fib = list_entry(entry,
122 dev->sync_fib = NULL;
124 spin_unlock_irqrestore(&dev->sync_lock, sflags);
126 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
127 (u32)dev->sync_fib->hw_fib_pa,
129 NULL, NULL, NULL, NULL, NULL);
132 if (!dev->msi_enabled)
137 if (mode & AAC_INT_MODE_AIF) {
139 if (dev->sa_firmware) {
140 u32 events = src_readl(dev, MUnit.SCR0);
142 aac_intr_normal(dev, events, 1, 0, NULL);
143 writel(events, &dev->IndexRegs->Mailbox[0]);
144 src_writel(dev, MUnit.IDR, 1 << 23);
146 if (dev->aif_thread && dev->fsa_dev)
147 aac_intr_normal(dev, 0, 2, 0, NULL);
149 if (dev->msi_enabled)
150 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
155 index = dev->host_rrq_idx[vector_no];
159 /* remove toggle bit (31) */
160 handle = le32_to_cpu((dev->host_rrq[index])
162 /* check fast response bits (30, 1) */
163 if (handle & 0x40000000)
165 handle &= 0x0000ffff;
169 if (dev->msi_enabled && dev->max_msix > 1)
170 atomic_dec(&dev->rrq_outstanding[vector_no]);
171 aac_intr_normal(dev, handle, 0, isFastResponse, NULL);
172 dev->host_rrq[index++] = 0;
173 if (index == (vector_no + 1) * dev->vector_cap)
174 index = vector_no * dev->vector_cap;
175 dev->host_rrq_idx[vector_no] = index;
184 * aac_src_disable_interrupt - Disable interrupts
188 static void aac_src_disable_interrupt(struct aac_dev *dev)
190 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
194 * aac_src_enable_interrupt_message - Enable interrupts
198 static void aac_src_enable_interrupt_message(struct aac_dev *dev)
200 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
204 * src_sync_cmd - send a command and wait
206 * @command: Command to execute
207 * @p1: first parameter
208 * @ret: adapter status
210 * This routine will send a synchronous command to the adapter and wait
211 * for its completion.
214 static int src_sync_cmd(struct aac_dev *dev, u32 command,
215 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
216 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
223 * Write the command into Mailbox 0
225 writel(command, &dev->IndexRegs->Mailbox[0]);
227 * Write the parameters into Mailboxes 1 - 6
229 writel(p1, &dev->IndexRegs->Mailbox[1]);
230 writel(p2, &dev->IndexRegs->Mailbox[2]);
231 writel(p3, &dev->IndexRegs->Mailbox[3]);
232 writel(p4, &dev->IndexRegs->Mailbox[4]);
235 * Clear the synch command doorbell to start on a clean slate.
237 if (!dev->msi_enabled)
240 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
243 * Disable doorbell interrupts
245 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
248 * Force the completion of the mask register write before issuing
251 src_readl(dev, MUnit.OIMR);
254 * Signal that there is a new synch command
256 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
258 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
262 if (command == IOP_RESET_ALWAYS) {
263 /* Wait up to 10 sec */
266 /* Wait up to 5 minutes */
269 while (time_before(jiffies, start+delay)) {
270 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
272 * Mon960 will set doorbell0 bit when it has completed the command.
274 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
276 * Clear the doorbell.
278 if (dev->msi_enabled)
279 aac_src_access_devreg(dev,
284 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
289 * Yield the processor in case we are slow
293 if (unlikely(ok != 1)) {
295 * Restore interrupt mask even though we timed out
297 aac_adapter_enable_int(dev);
301 * Pull the synch status from Mailbox 0.
304 *status = readl(&dev->IndexRegs->Mailbox[0]);
306 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
308 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
310 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
312 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
313 if (command == GET_COMM_PREFERRED_SETTINGS)
315 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
317 * Clear the synch command doorbell.
319 if (!dev->msi_enabled)
322 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
326 * Restore interrupt mask
328 aac_adapter_enable_int(dev);
333 * aac_src_interrupt_adapter - interrupt adapter
336 * Send an interrupt to the i960 and breakpoint it.
339 static void aac_src_interrupt_adapter(struct aac_dev *dev)
341 src_sync_cmd(dev, BREAKPOINT_REQUEST,
343 NULL, NULL, NULL, NULL, NULL);
347 * aac_src_notify_adapter - send an event to the adapter
349 * @event: Event to send
351 * Notify the i960 that something it probably cares about has
355 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
360 src_writel(dev, MUnit.ODR_C,
361 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
363 case HostNormRespNotFull:
364 src_writel(dev, MUnit.ODR_C,
365 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
367 case AdapNormRespQue:
368 src_writel(dev, MUnit.ODR_C,
369 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
371 case HostNormCmdNotFull:
372 src_writel(dev, MUnit.ODR_C,
373 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
376 src_writel(dev, MUnit.ODR_C,
377 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
380 src_writel(dev, MUnit.ODR_C,
381 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
390 * aac_src_start_adapter - activate adapter
393 * Start up processing on an i960 based AAC adapter
396 static void aac_src_start_adapter(struct aac_dev *dev)
398 union aac_init *init;
401 /* reset host_rrq_idx first */
402 for (i = 0; i < dev->max_msix; i++) {
403 dev->host_rrq_idx[i] = i * dev->vector_cap;
404 atomic_set(&dev->rrq_outstanding[i], 0);
406 atomic_set(&dev->msix_counter, 0);
407 dev->fibs_pushed_no = 0;
410 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
411 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds());
412 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
413 lower_32_bits(dev->init_pa),
414 upper_32_bits(dev->init_pa),
416 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq),
417 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
419 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds());
420 // We can only use a 32 bit address here
421 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
422 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0,
423 NULL, NULL, NULL, NULL, NULL);
429 * aac_src_check_health
430 * @dev: device to check if healthy
432 * Will attempt to determine if the specified adapter is alive and
433 * capable of handling requests, returning 0 if alive.
435 static int aac_src_check_health(struct aac_dev *dev)
437 u32 status = src_readl(dev, MUnit.OMR);
440 * Check to see if the board panic'd.
442 if (unlikely(status & KERNEL_PANIC))
446 * Check to see if the board failed any self tests.
448 if (unlikely(status & SELF_TEST_FAILED))
452 * Check to see if the board failed any self tests.
454 if (unlikely(status & MONITOR_PANIC))
458 * Wait for the adapter to be up and running.
460 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
471 return (status > 16) & 0xFF;
474 static inline u32 aac_get_vector(struct aac_dev *dev)
476 return atomic_inc_return(&dev->msix_counter)%dev->max_msix;
480 * aac_src_deliver_message
483 * Will send a fib, returning 0 if successful.
485 static int aac_src_deliver_message(struct fib *fib)
487 struct aac_dev *dev = fib->dev;
488 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
491 struct aac_fib_xporthdr *pFibX;
499 atomic_inc(&q->numpending);
501 native_hba = (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) ? 1 : 0;
504 if (dev->msi_enabled && dev->max_msix > 1 &&
505 (native_hba || fib->hw_fib_va->header.Command != AifRequest)) {
507 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)
509 vector_no = aac_get_vector(dev);
511 vector_no = fib->vector_no;
514 if (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA_TMF) {
515 struct aac_hba_tm_req *tm_req;
517 tm_req = (struct aac_hba_tm_req *)
519 if (tm_req->iu_type ==
520 HBA_IU_TYPE_SCSI_TM_REQ) {
521 ((struct aac_hba_tm_req *)
522 fib->hw_fib_va)->reply_qid
524 ((struct aac_hba_tm_req *)
525 fib->hw_fib_va)->request_id
526 += (vector_no << 16);
528 ((struct aac_hba_reset_req *)
529 fib->hw_fib_va)->reply_qid
531 ((struct aac_hba_reset_req *)
532 fib->hw_fib_va)->request_id
533 += (vector_no << 16);
536 ((struct aac_hba_cmd_req *)
537 fib->hw_fib_va)->reply_qid
539 ((struct aac_hba_cmd_req *)
540 fib->hw_fib_va)->request_id
541 += (vector_no << 16);
544 fib->hw_fib_va->header.Handle += (vector_no << 16);
550 atomic_inc(&dev->rrq_outstanding[vector_no]);
553 address = fib->hw_fib_pa;
554 fibsize = (fib->hbacmd_size + 127) / 128 - 1;
559 src_writeq(dev, MUnit.IQN_L, (u64)address);
561 spin_lock_irqsave(&fib->dev->iq_lock, flags);
562 src_writel(dev, MUnit.IQN_H,
563 upper_32_bits(address) & 0xffffffff);
564 src_writel(dev, MUnit.IQN_L, address & 0xffffffff);
565 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
568 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 ||
569 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
570 /* Calculate the amount to the fibsize bits */
571 fibsize = (le16_to_cpu(fib->hw_fib_va->header.Size)
573 /* New FIB header, 32-bit */
574 address = fib->hw_fib_pa;
575 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
576 fib->hw_fib_va->header.SenderFibAddress =
577 cpu_to_le32((u32)address);
578 fib->hw_fib_va->header.u.TimeStamp = 0;
579 WARN_ON(upper_32_bits(address) != 0L);
581 /* Calculate the amount to the fibsize bits */
582 fibsize = (sizeof(struct aac_fib_xporthdr) +
583 le16_to_cpu(fib->hw_fib_va->header.Size)
585 /* Fill XPORT header */
586 pFibX = (struct aac_fib_xporthdr *)
587 ((unsigned char *)fib->hw_fib_va -
588 sizeof(struct aac_fib_xporthdr));
589 pFibX->Handle = fib->hw_fib_va->header.Handle;
591 cpu_to_le64((u64)fib->hw_fib_pa);
592 pFibX->Size = cpu_to_le32(
593 le16_to_cpu(fib->hw_fib_va->header.Size));
594 address = fib->hw_fib_pa -
595 (u64)sizeof(struct aac_fib_xporthdr);
602 src_writeq(dev, MUnit.IQ_L, (u64)address);
604 spin_lock_irqsave(&fib->dev->iq_lock, flags);
605 src_writel(dev, MUnit.IQ_H,
606 upper_32_bits(address) & 0xffffffff);
607 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
608 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
616 * @size: mapping resize request
619 static int aac_src_ioremap(struct aac_dev *dev, u32 size)
622 iounmap(dev->regs.src.bar1);
623 dev->regs.src.bar1 = NULL;
624 iounmap(dev->regs.src.bar0);
625 dev->base = dev->regs.src.bar0 = NULL;
628 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
629 AAC_MIN_SRC_BAR1_SIZE);
631 if (dev->regs.src.bar1 == NULL)
633 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
634 if (dev->base == NULL) {
635 iounmap(dev->regs.src.bar1);
636 dev->regs.src.bar1 = NULL;
639 dev->IndexRegs = &((struct src_registers __iomem *)
640 dev->base)->u.tupelo.IndexRegs;
646 * @size: mapping resize request
649 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
652 iounmap(dev->regs.src.bar0);
653 dev->base = dev->regs.src.bar0 = NULL;
658 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE);
660 if (dev->regs.src.bar1 == NULL)
662 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
663 if (dev->base == NULL) {
664 iounmap(dev->regs.src.bar1);
665 dev->regs.src.bar1 = NULL;
668 dev->IndexRegs = &((struct src_registers __iomem *)
669 dev->base)->u.denali.IndexRegs;
673 void aac_set_intx_mode(struct aac_dev *dev)
675 if (dev->msi_enabled) {
676 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
677 dev->msi_enabled = 0;
678 msleep(5000); /* Delay 5 seconds */
682 static void aac_dump_fw_fib_iop_reset(struct aac_dev *dev)
684 __le32 supported_options3;
689 supported_options3 = dev->supplement_adapter_info.supported_options3;
690 if (!(supported_options3 & AAC_OPTION_SUPPORTED3_IOP_RESET_FIB_DUMP))
693 aac_adapter_sync_cmd(dev, IOP_RESET_FW_FIB_DUMP,
694 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
697 static void aac_send_iop_reset(struct aac_dev *dev, int bled)
701 aac_dump_fw_fib_iop_reset(dev);
703 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
704 0, 0, 0, 0, 0, 0, &var,
705 &reset_mask, NULL, NULL, NULL);
707 if ((bled || var != 0x00000001) && !dev->doorbell_mask)
709 else if (dev->doorbell_mask) {
710 reset_mask = dev->doorbell_mask;
715 aac_set_intx_mode(dev);
717 if (!bled && (dev->supplement_adapter_info.supported_options2 &
718 AAC_OPTION_DOORBELL_RESET)) {
719 src_writel(dev, MUnit.IDR, reset_mask);
721 src_writel(dev, MUnit.IDR, 0x100);
726 static void aac_send_hardware_soft_reset(struct aac_dev *dev)
730 val = readl(((char *)(dev->base) + IBW_SWR_OFFSET));
732 writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET));
733 msleep_interruptible(20000);
736 static int aac_src_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type)
738 unsigned long status, start;
744 pr_err("%s%d: adapter kernel panic'd %x.\n",
745 dev->name, dev->id, bled);
748 * When there is a BlinkLED, IOP_RESET has not effect
750 if (bled >= 2 && dev->sa_firmware && reset_type & HW_IOP_RESET)
751 reset_type &= ~HW_IOP_RESET;
753 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
755 switch (reset_type) {
756 case IOP_HWSOFT_RESET:
757 aac_send_iop_reset(dev, bled);
759 * Check to see if KERNEL_UP_AND_RUNNING
760 * Wait for the adapter to be up and running.
761 * If !KERNEL_UP_AND_RUNNING issue HW Soft Reset
763 status = src_readl(dev, MUnit.OMR);
765 && !(status & KERNEL_UP_AND_RUNNING)) {
768 status = src_readl(dev, MUnit.OMR);
769 if (time_after(jiffies,
770 start+HZ*SOFT_RESET_TIME)) {
771 aac_send_hardware_soft_reset(dev);
774 } while (!(status & KERNEL_UP_AND_RUNNING));
778 if (dev->sa_firmware) {
779 aac_send_hardware_soft_reset(dev);
780 aac_set_intx_mode(dev);
784 aac_send_iop_reset(dev, bled);
790 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
793 if (startup_timeout < 300)
794 startup_timeout = 300;
800 * aac_src_select_comm - Select communications method
802 * @comm: communications method
804 static int aac_src_select_comm(struct aac_dev *dev, int comm)
807 case AAC_COMM_MESSAGE:
808 dev->a_ops.adapter_intr = aac_src_intr_message;
809 dev->a_ops.adapter_deliver = aac_src_deliver_message;
818 * aac_src_init - initialize an Cardinal Frey Bar card
819 * @dev: device to configure
823 int aac_src_init(struct aac_dev *dev)
826 unsigned long status;
828 int instance = dev->id;
829 const char *name = dev->name;
831 dev->a_ops.adapter_ioremap = aac_src_ioremap;
832 dev->a_ops.adapter_comm = aac_src_select_comm;
834 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
835 if (aac_adapter_ioremap(dev, dev->base_size)) {
836 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
840 /* Failure to reset here is an option ... */
841 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
842 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
843 if ((aac_reset_devices || reset_devices) &&
844 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
847 * Check to see if the board panic'd while booting.
849 status = src_readl(dev, MUnit.OMR);
850 if (status & KERNEL_PANIC) {
851 if (aac_src_restart_adapter(dev,
852 aac_src_check_health(dev), IOP_HWSOFT_RESET))
857 * Check to see if the board failed any self tests.
859 status = src_readl(dev, MUnit.OMR);
860 if (status & SELF_TEST_FAILED) {
861 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
862 dev->name, instance);
866 * Check to see if the monitor panic'd while booting.
868 if (status & MONITOR_PANIC) {
869 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
870 dev->name, instance);
875 * Wait for the adapter to be up and running. Wait up to 3 minutes
877 while (!((status = src_readl(dev, MUnit.OMR)) &
878 KERNEL_UP_AND_RUNNING)) {
880 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
881 time_after(jiffies, start+HZ*startup_timeout)) {
882 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
883 dev->name, instance, status);
887 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
888 time_after(jiffies, start + HZ *
889 ((startup_timeout > 60)
890 ? (startup_timeout - 60)
891 : (startup_timeout / 2))))) {
892 if (likely(!aac_src_restart_adapter(dev,
893 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
899 if (restart && aac_commit)
902 * Fill in the common function dispatch table.
904 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
905 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
906 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
907 dev->a_ops.adapter_notify = aac_src_notify_adapter;
908 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
909 dev->a_ops.adapter_check_health = aac_src_check_health;
910 dev->a_ops.adapter_restart = aac_src_restart_adapter;
911 dev->a_ops.adapter_start = aac_src_start_adapter;
914 * First clear out all interrupts. Then enable the one's that we
917 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
918 aac_adapter_disable_int(dev);
919 src_writel(dev, MUnit.ODR_C, 0xffffffff);
920 aac_adapter_enable_int(dev);
922 if (aac_init_adapter(dev) == NULL)
924 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
927 dev->msi = !pci_enable_msi(dev->pdev);
929 dev->aac_msix[0].vector_no = 0;
930 dev->aac_msix[0].dev = dev;
932 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
933 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
936 pci_disable_msi(dev->pdev);
938 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
942 dev->dbg_base = pci_resource_start(dev->pdev, 2);
943 dev->dbg_base_mapped = dev->regs.src.bar1;
944 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
945 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
947 aac_adapter_enable_int(dev);
949 if (!dev->sync_mode) {
951 * Tell the adapter that all is configured, and it can
952 * start accepting requests
954 aac_src_start_adapter(dev);
964 * aac_srcv_init - initialize an SRCv card
965 * @dev: device to configure
969 int aac_srcv_init(struct aac_dev *dev)
972 unsigned long status;
974 int instance = dev->id;
975 const char *name = dev->name;
977 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
978 dev->a_ops.adapter_comm = aac_src_select_comm;
980 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
981 if (aac_adapter_ioremap(dev, dev->base_size)) {
982 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
986 /* Failure to reset here is an option ... */
987 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
988 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
989 if ((aac_reset_devices || reset_devices) &&
990 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
993 * Check to see if flash update is running.
994 * Wait for the adapter to be up and running. Wait up to 5 minutes
996 status = src_readl(dev, MUnit.OMR);
997 if (status & FLASH_UPD_PENDING) {
1000 status = src_readl(dev, MUnit.OMR);
1001 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
1002 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
1003 dev->name, instance);
1006 } while (!(status & FLASH_UPD_SUCCESS) &&
1007 !(status & FLASH_UPD_FAILED));
1008 /* Delay 10 seconds.
1009 * Because right now FW is doing a soft reset,
1010 * do not read scratch pad register at this time
1015 * Check to see if the board panic'd while booting.
1017 status = src_readl(dev, MUnit.OMR);
1018 if (status & KERNEL_PANIC) {
1019 if (aac_src_restart_adapter(dev,
1020 aac_src_check_health(dev), IOP_HWSOFT_RESET))
1025 * Check to see if the board failed any self tests.
1027 status = src_readl(dev, MUnit.OMR);
1028 if (status & SELF_TEST_FAILED) {
1029 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
1033 * Check to see if the monitor panic'd while booting.
1035 if (status & MONITOR_PANIC) {
1036 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
1041 * Wait for the adapter to be up and running. Wait up to 3 minutes
1043 while (!((status = src_readl(dev, MUnit.OMR)) &
1044 KERNEL_UP_AND_RUNNING) ||
1045 status == 0xffffffff) {
1047 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
1048 time_after(jiffies, start+HZ*startup_timeout)) {
1049 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
1050 dev->name, instance, status);
1054 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
1055 time_after(jiffies, start + HZ *
1056 ((startup_timeout > 60)
1057 ? (startup_timeout - 60)
1058 : (startup_timeout / 2))))) {
1059 if (likely(!aac_src_restart_adapter(dev,
1060 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
1066 if (restart && aac_commit)
1069 * Fill in the common function dispatch table.
1071 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
1072 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
1073 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
1074 dev->a_ops.adapter_notify = aac_src_notify_adapter;
1075 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
1076 dev->a_ops.adapter_check_health = aac_src_check_health;
1077 dev->a_ops.adapter_restart = aac_src_restart_adapter;
1078 dev->a_ops.adapter_start = aac_src_start_adapter;
1081 * First clear out all interrupts. Then enable the one's that we
1084 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
1085 aac_adapter_disable_int(dev);
1086 src_writel(dev, MUnit.ODR_C, 0xffffffff);
1087 aac_adapter_enable_int(dev);
1089 if (aac_init_adapter(dev) == NULL)
1091 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) &&
1092 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3))
1094 if (dev->msi_enabled)
1095 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
1097 if (aac_acquire_irq(dev))
1100 dev->dbg_base = pci_resource_start(dev->pdev, 2);
1101 dev->dbg_base_mapped = dev->regs.src.bar1;
1102 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE;
1103 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
1105 aac_adapter_enable_int(dev);
1107 if (!dev->sync_mode) {
1109 * Tell the adapter that all is configured, and it can
1110 * start accepting requests
1112 aac_src_start_adapter(dev);
1121 void aac_src_access_devreg(struct aac_dev *dev, int mode)
1126 case AAC_ENABLE_INTERRUPT:
1129 dev->OIMR = (dev->msi_enabled ?
1130 AAC_INT_ENABLE_TYPE1_MSIX :
1131 AAC_INT_ENABLE_TYPE1_INTX));
1134 case AAC_DISABLE_INTERRUPT:
1137 dev->OIMR = AAC_INT_DISABLE_ALL);
1140 case AAC_ENABLE_MSIX:
1142 val = src_readl(dev, MUnit.IDR);
1144 src_writel(dev, MUnit.IDR, val);
1145 src_readl(dev, MUnit.IDR);
1147 val = PMC_ALL_INTERRUPT_BITS;
1148 src_writel(dev, MUnit.IOAR, val);
1149 val = src_readl(dev, MUnit.OIMR);
1152 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
1155 case AAC_DISABLE_MSIX:
1157 val = src_readl(dev, MUnit.IDR);
1159 src_writel(dev, MUnit.IDR, val);
1160 src_readl(dev, MUnit.IDR);
1163 case AAC_CLEAR_AIF_BIT:
1165 val = src_readl(dev, MUnit.IDR);
1167 src_writel(dev, MUnit.IDR, val);
1168 src_readl(dev, MUnit.IDR);
1171 case AAC_CLEAR_SYNC_BIT:
1173 val = src_readl(dev, MUnit.IDR);
1175 src_writel(dev, MUnit.IDR, val);
1176 src_readl(dev, MUnit.IDR);
1179 case AAC_ENABLE_INTX:
1181 val = src_readl(dev, MUnit.IDR);
1183 src_writel(dev, MUnit.IDR, val);
1184 src_readl(dev, MUnit.IDR);
1186 val = PMC_ALL_INTERRUPT_BITS;
1187 src_writel(dev, MUnit.IOAR, val);
1188 src_readl(dev, MUnit.IOAR);
1189 val = src_readl(dev, MUnit.OIMR);
1190 src_writel(dev, MUnit.OIMR,
1191 val & (~(PMC_GLOBAL_INT_BIT2)));
1199 static int aac_src_get_sync_status(struct aac_dev *dev)
1204 if (dev->msi_enabled)
1205 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1207 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;