2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
29 * Abstract: Hardware Device Interface for PMC SRC based controllers
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/types.h>
36 #include <linux/pci.h>
37 #include <linux/spinlock.h>
38 #include <linux/slab.h>
39 #include <linux/blkdev.h>
40 #include <linux/delay.h>
41 #include <linux/completion.h>
42 #include <linux/time.h>
43 #include <linux/interrupt.h>
44 #include <scsi/scsi_host.h>
48 static int aac_src_get_sync_status(struct aac_dev *dev);
50 static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
52 struct aac_msix_ctx *ctx;
54 unsigned long bellbits, bellbits_shifted;
56 int isFastResponse, mode;
59 ctx = (struct aac_msix_ctx *)dev_id;
61 vector_no = ctx->vector_no;
63 if (dev->msi_enabled) {
64 mode = AAC_INT_MODE_MSI;
66 bellbits = src_readl(dev, MUnit.ODR_MSI);
67 if (bellbits & 0x40000)
68 mode |= AAC_INT_MODE_AIF;
69 if (bellbits & 0x1000)
70 mode |= AAC_INT_MODE_SYNC;
73 mode = AAC_INT_MODE_INTX;
74 bellbits = src_readl(dev, MUnit.ODR_R);
75 if (bellbits & PmDoorBellResponseSent) {
76 bellbits = PmDoorBellResponseSent;
77 src_writel(dev, MUnit.ODR_C, bellbits);
78 src_readl(dev, MUnit.ODR_C);
80 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
81 src_writel(dev, MUnit.ODR_C, bellbits);
82 src_readl(dev, MUnit.ODR_C);
84 if (bellbits_shifted & DoorBellAifPending)
85 mode |= AAC_INT_MODE_AIF;
86 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
87 mode |= AAC_INT_MODE_SYNC;
91 if (mode & AAC_INT_MODE_SYNC) {
93 struct list_head *entry;
95 extern int aac_sync_mode;
97 if (!aac_sync_mode && !dev->msi_enabled) {
98 src_writel(dev, MUnit.ODR_C, bellbits);
99 src_readl(dev, MUnit.ODR_C);
103 if (dev->sync_fib->callback)
104 dev->sync_fib->callback(dev->sync_fib->callback_data,
106 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
107 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
108 dev->management_fib_count--;
109 up(&dev->sync_fib->event_wait);
111 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
113 spin_lock_irqsave(&dev->sync_lock, sflags);
114 if (!list_empty(&dev->sync_fib_list)) {
115 entry = dev->sync_fib_list.next;
116 dev->sync_fib = list_entry(entry,
122 dev->sync_fib = NULL;
124 spin_unlock_irqrestore(&dev->sync_lock, sflags);
126 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
127 (u32)dev->sync_fib->hw_fib_pa,
129 NULL, NULL, NULL, NULL, NULL);
132 if (!dev->msi_enabled)
137 if (mode & AAC_INT_MODE_AIF) {
139 if (dev->sa_firmware) {
140 u32 events = src_readl(dev, MUnit.SCR0);
142 aac_intr_normal(dev, events, 1, 0, NULL);
143 writel(events, &dev->IndexRegs->Mailbox[0]);
144 src_writel(dev, MUnit.IDR, 1 << 23);
146 if (dev->aif_thread && dev->fsa_dev)
147 aac_intr_normal(dev, 0, 2, 0, NULL);
149 if (dev->msi_enabled)
150 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
155 index = dev->host_rrq_idx[vector_no];
159 /* remove toggle bit (31) */
160 handle = le32_to_cpu((dev->host_rrq[index])
162 /* check fast response bits (30, 1) */
163 if (handle & 0x40000000)
165 handle &= 0x0000ffff;
169 if (dev->msi_enabled && dev->max_msix > 1)
170 atomic_dec(&dev->rrq_outstanding[vector_no]);
171 aac_intr_normal(dev, handle, 0, isFastResponse, NULL);
172 dev->host_rrq[index++] = 0;
173 if (index == (vector_no + 1) * dev->vector_cap)
174 index = vector_no * dev->vector_cap;
175 dev->host_rrq_idx[vector_no] = index;
184 * aac_src_disable_interrupt - Disable interrupts
188 static void aac_src_disable_interrupt(struct aac_dev *dev)
190 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
194 * aac_src_enable_interrupt_message - Enable interrupts
198 static void aac_src_enable_interrupt_message(struct aac_dev *dev)
200 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
204 * src_sync_cmd - send a command and wait
206 * @command: Command to execute
207 * @p1: first parameter
208 * @ret: adapter status
210 * This routine will send a synchronous command to the adapter and wait
211 * for its completion.
214 static int src_sync_cmd(struct aac_dev *dev, u32 command,
215 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
216 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
223 * Write the command into Mailbox 0
225 writel(command, &dev->IndexRegs->Mailbox[0]);
227 * Write the parameters into Mailboxes 1 - 6
229 writel(p1, &dev->IndexRegs->Mailbox[1]);
230 writel(p2, &dev->IndexRegs->Mailbox[2]);
231 writel(p3, &dev->IndexRegs->Mailbox[3]);
232 writel(p4, &dev->IndexRegs->Mailbox[4]);
235 * Clear the synch command doorbell to start on a clean slate.
237 if (!dev->msi_enabled)
240 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
243 * Disable doorbell interrupts
245 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
248 * Force the completion of the mask register write before issuing
251 src_readl(dev, MUnit.OIMR);
254 * Signal that there is a new synch command
256 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
258 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
262 if (command == IOP_RESET_ALWAYS) {
263 /* Wait up to 10 sec */
266 /* Wait up to 5 minutes */
269 while (time_before(jiffies, start+delay)) {
270 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
272 * Mon960 will set doorbell0 bit when it has completed the command.
274 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
276 * Clear the doorbell.
278 if (dev->msi_enabled)
279 aac_src_access_devreg(dev,
284 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
289 * Yield the processor in case we are slow
293 if (unlikely(ok != 1)) {
295 * Restore interrupt mask even though we timed out
297 aac_adapter_enable_int(dev);
301 * Pull the synch status from Mailbox 0.
304 *status = readl(&dev->IndexRegs->Mailbox[0]);
306 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
308 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
310 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
312 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
313 if (command == GET_COMM_PREFERRED_SETTINGS)
315 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
317 * Clear the synch command doorbell.
319 if (!dev->msi_enabled)
322 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
326 * Restore interrupt mask
328 aac_adapter_enable_int(dev);
333 * aac_src_interrupt_adapter - interrupt adapter
336 * Send an interrupt to the i960 and breakpoint it.
339 static void aac_src_interrupt_adapter(struct aac_dev *dev)
341 src_sync_cmd(dev, BREAKPOINT_REQUEST,
343 NULL, NULL, NULL, NULL, NULL);
347 * aac_src_notify_adapter - send an event to the adapter
349 * @event: Event to send
351 * Notify the i960 that something it probably cares about has
355 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
360 src_writel(dev, MUnit.ODR_C,
361 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
363 case HostNormRespNotFull:
364 src_writel(dev, MUnit.ODR_C,
365 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
367 case AdapNormRespQue:
368 src_writel(dev, MUnit.ODR_C,
369 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
371 case HostNormCmdNotFull:
372 src_writel(dev, MUnit.ODR_C,
373 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
376 src_writel(dev, MUnit.ODR_C,
377 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
380 src_writel(dev, MUnit.ODR_C,
381 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
390 * aac_src_start_adapter - activate adapter
393 * Start up processing on an i960 based AAC adapter
396 static void aac_src_start_adapter(struct aac_dev *dev)
398 union aac_init *init;
401 /* reset host_rrq_idx first */
402 for (i = 0; i < dev->max_msix; i++) {
403 dev->host_rrq_idx[i] = i * dev->vector_cap;
404 atomic_set(&dev->rrq_outstanding[i], 0);
406 atomic_set(&dev->msix_counter, 0);
407 dev->fibs_pushed_no = 0;
410 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
411 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds());
412 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
413 lower_32_bits(dev->init_pa),
414 upper_32_bits(dev->init_pa),
416 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq),
417 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
419 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds());
420 // We can only use a 32 bit address here
421 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
422 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0,
423 NULL, NULL, NULL, NULL, NULL);
429 * aac_src_check_health
430 * @dev: device to check if healthy
432 * Will attempt to determine if the specified adapter is alive and
433 * capable of handling requests, returning 0 if alive.
435 static int aac_src_check_health(struct aac_dev *dev)
437 u32 status = src_readl(dev, MUnit.OMR);
440 * Check to see if the board failed any self tests.
442 if (unlikely(status & SELF_TEST_FAILED))
446 * Check to see if the board panic'd.
448 if (unlikely(status & KERNEL_PANIC))
449 return (status >> 16) & 0xFF;
451 * Wait for the adapter to be up and running.
453 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
461 static inline u32 aac_get_vector(struct aac_dev *dev)
463 return atomic_inc_return(&dev->msix_counter)%dev->max_msix;
467 * aac_src_deliver_message
470 * Will send a fib, returning 0 if successful.
472 static int aac_src_deliver_message(struct fib *fib)
474 struct aac_dev *dev = fib->dev;
475 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
478 struct aac_fib_xporthdr *pFibX;
486 atomic_inc(&q->numpending);
488 native_hba = (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) ? 1 : 0;
491 if (dev->msi_enabled && dev->max_msix > 1 &&
492 (native_hba || fib->hw_fib_va->header.Command != AifRequest)) {
494 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)
496 vector_no = aac_get_vector(dev);
498 vector_no = fib->vector_no;
501 if (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA_TMF) {
502 struct aac_hba_tm_req *tm_req;
504 tm_req = (struct aac_hba_tm_req *)
506 if (tm_req->iu_type ==
507 HBA_IU_TYPE_SCSI_TM_REQ) {
508 ((struct aac_hba_tm_req *)
509 fib->hw_fib_va)->reply_qid
511 ((struct aac_hba_tm_req *)
512 fib->hw_fib_va)->request_id
513 += (vector_no << 16);
515 ((struct aac_hba_reset_req *)
516 fib->hw_fib_va)->reply_qid
518 ((struct aac_hba_reset_req *)
519 fib->hw_fib_va)->request_id
520 += (vector_no << 16);
523 ((struct aac_hba_cmd_req *)
524 fib->hw_fib_va)->reply_qid
526 ((struct aac_hba_cmd_req *)
527 fib->hw_fib_va)->request_id
528 += (vector_no << 16);
531 fib->hw_fib_va->header.Handle += (vector_no << 16);
537 atomic_inc(&dev->rrq_outstanding[vector_no]);
540 address = fib->hw_fib_pa;
541 fibsize = (fib->hbacmd_size + 127) / 128 - 1;
546 src_writeq(dev, MUnit.IQN_L, (u64)address);
548 spin_lock_irqsave(&fib->dev->iq_lock, flags);
549 src_writel(dev, MUnit.IQN_H,
550 upper_32_bits(address) & 0xffffffff);
551 src_writel(dev, MUnit.IQN_L, address & 0xffffffff);
552 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
555 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 ||
556 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
557 /* Calculate the amount to the fibsize bits */
558 fibsize = (le16_to_cpu(fib->hw_fib_va->header.Size)
560 /* New FIB header, 32-bit */
561 address = fib->hw_fib_pa;
562 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
563 fib->hw_fib_va->header.SenderFibAddress =
564 cpu_to_le32((u32)address);
565 fib->hw_fib_va->header.u.TimeStamp = 0;
566 WARN_ON(upper_32_bits(address) != 0L);
568 /* Calculate the amount to the fibsize bits */
569 fibsize = (sizeof(struct aac_fib_xporthdr) +
570 le16_to_cpu(fib->hw_fib_va->header.Size)
572 /* Fill XPORT header */
573 pFibX = (struct aac_fib_xporthdr *)
574 ((unsigned char *)fib->hw_fib_va -
575 sizeof(struct aac_fib_xporthdr));
576 pFibX->Handle = fib->hw_fib_va->header.Handle;
578 cpu_to_le64((u64)fib->hw_fib_pa);
579 pFibX->Size = cpu_to_le32(
580 le16_to_cpu(fib->hw_fib_va->header.Size));
581 address = fib->hw_fib_pa -
582 (u64)sizeof(struct aac_fib_xporthdr);
589 src_writeq(dev, MUnit.IQ_L, (u64)address);
591 spin_lock_irqsave(&fib->dev->iq_lock, flags);
592 src_writel(dev, MUnit.IQ_H,
593 upper_32_bits(address) & 0xffffffff);
594 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
595 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
603 * @size: mapping resize request
606 static int aac_src_ioremap(struct aac_dev *dev, u32 size)
609 iounmap(dev->regs.src.bar1);
610 dev->regs.src.bar1 = NULL;
611 iounmap(dev->regs.src.bar0);
612 dev->base = dev->regs.src.bar0 = NULL;
615 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
616 AAC_MIN_SRC_BAR1_SIZE);
618 if (dev->regs.src.bar1 == NULL)
620 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
621 if (dev->base == NULL) {
622 iounmap(dev->regs.src.bar1);
623 dev->regs.src.bar1 = NULL;
626 dev->IndexRegs = &((struct src_registers __iomem *)
627 dev->base)->u.tupelo.IndexRegs;
633 * @size: mapping resize request
636 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
639 iounmap(dev->regs.src.bar0);
640 dev->base = dev->regs.src.bar0 = NULL;
645 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE);
647 if (dev->regs.src.bar1 == NULL)
649 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
650 if (dev->base == NULL) {
651 iounmap(dev->regs.src.bar1);
652 dev->regs.src.bar1 = NULL;
655 dev->IndexRegs = &((struct src_registers __iomem *)
656 dev->base)->u.denali.IndexRegs;
660 static void aac_set_intx_mode(struct aac_dev *dev)
662 if (dev->msi_enabled) {
663 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
664 dev->msi_enabled = 0;
665 msleep(5000); /* Delay 5 seconds */
669 static void aac_send_iop_reset(struct aac_dev *dev, int bled)
673 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
674 0, 0, 0, 0, 0, 0, &var,
675 &reset_mask, NULL, NULL, NULL);
677 if ((bled || var != 0x00000001) && !dev->doorbell_mask)
679 else if (dev->doorbell_mask) {
680 reset_mask = dev->doorbell_mask;
685 aac_set_intx_mode(dev);
687 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 &
688 AAC_OPTION_DOORBELL_RESET)) {
689 src_writel(dev, MUnit.IDR, reset_mask);
691 src_writel(dev, MUnit.IDR, 0x100);
696 static void aac_send_hardware_soft_reset(struct aac_dev *dev)
700 val = readl(((char *)(dev->base) + IBW_SWR_OFFSET));
702 writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET));
703 msleep_interruptible(20000);
706 static int aac_src_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type)
708 unsigned long status, start;
714 pr_err("%s%d: adapter kernel panic'd %x.\n",
715 dev->name, dev->id, bled);
717 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
719 switch (reset_type) {
720 case IOP_HWSOFT_RESET:
721 aac_send_iop_reset(dev, bled);
723 * Check to see if KERNEL_UP_AND_RUNNING
724 * Wait for the adapter to be up and running.
725 * If !KERNEL_UP_AND_RUNNING issue HW Soft Reset
727 status = src_readl(dev, MUnit.OMR);
729 && !(status & KERNEL_UP_AND_RUNNING)) {
732 status = src_readl(dev, MUnit.OMR);
733 if (time_after(jiffies,
734 start+HZ*SOFT_RESET_TIME)) {
735 aac_send_hardware_soft_reset(dev);
738 } while (!(status & KERNEL_UP_AND_RUNNING));
742 if (dev->sa_firmware) {
743 aac_send_hardware_soft_reset(dev);
744 aac_set_intx_mode(dev);
748 aac_send_iop_reset(dev, bled);
754 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
757 if (startup_timeout < 300)
758 startup_timeout = 300;
764 * aac_src_select_comm - Select communications method
766 * @comm: communications method
768 static int aac_src_select_comm(struct aac_dev *dev, int comm)
771 case AAC_COMM_MESSAGE:
772 dev->a_ops.adapter_intr = aac_src_intr_message;
773 dev->a_ops.adapter_deliver = aac_src_deliver_message;
782 * aac_src_init - initialize an Cardinal Frey Bar card
783 * @dev: device to configure
787 int aac_src_init(struct aac_dev *dev)
790 unsigned long status;
792 int instance = dev->id;
793 const char *name = dev->name;
795 dev->a_ops.adapter_ioremap = aac_src_ioremap;
796 dev->a_ops.adapter_comm = aac_src_select_comm;
798 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
799 if (aac_adapter_ioremap(dev, dev->base_size)) {
800 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
804 /* Failure to reset here is an option ... */
805 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
806 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
807 if ((aac_reset_devices || reset_devices) &&
808 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
811 * Check to see if the board panic'd while booting.
813 status = src_readl(dev, MUnit.OMR);
814 if (status & KERNEL_PANIC) {
815 if (aac_src_restart_adapter(dev,
816 aac_src_check_health(dev), IOP_HWSOFT_RESET))
821 * Check to see if the board failed any self tests.
823 status = src_readl(dev, MUnit.OMR);
824 if (status & SELF_TEST_FAILED) {
825 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
826 dev->name, instance);
830 * Check to see if the monitor panic'd while booting.
832 if (status & MONITOR_PANIC) {
833 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
834 dev->name, instance);
839 * Wait for the adapter to be up and running. Wait up to 3 minutes
841 while (!((status = src_readl(dev, MUnit.OMR)) &
842 KERNEL_UP_AND_RUNNING)) {
844 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
845 time_after(jiffies, start+HZ*startup_timeout)) {
846 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
847 dev->name, instance, status);
851 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
852 time_after(jiffies, start + HZ *
853 ((startup_timeout > 60)
854 ? (startup_timeout - 60)
855 : (startup_timeout / 2))))) {
856 if (likely(!aac_src_restart_adapter(dev,
857 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
863 if (restart && aac_commit)
866 * Fill in the common function dispatch table.
868 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
869 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
870 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
871 dev->a_ops.adapter_notify = aac_src_notify_adapter;
872 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
873 dev->a_ops.adapter_check_health = aac_src_check_health;
874 dev->a_ops.adapter_restart = aac_src_restart_adapter;
875 dev->a_ops.adapter_start = aac_src_start_adapter;
878 * First clear out all interrupts. Then enable the one's that we
881 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
882 aac_adapter_disable_int(dev);
883 src_writel(dev, MUnit.ODR_C, 0xffffffff);
884 aac_adapter_enable_int(dev);
886 if (aac_init_adapter(dev) == NULL)
888 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
891 dev->msi = !pci_enable_msi(dev->pdev);
893 dev->aac_msix[0].vector_no = 0;
894 dev->aac_msix[0].dev = dev;
896 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
897 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
900 pci_disable_msi(dev->pdev);
902 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
906 dev->dbg_base = pci_resource_start(dev->pdev, 2);
907 dev->dbg_base_mapped = dev->regs.src.bar1;
908 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
909 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
911 aac_adapter_enable_int(dev);
913 if (!dev->sync_mode) {
915 * Tell the adapter that all is configured, and it can
916 * start accepting requests
918 aac_src_start_adapter(dev);
928 * aac_srcv_init - initialize an SRCv card
929 * @dev: device to configure
933 int aac_srcv_init(struct aac_dev *dev)
936 unsigned long status;
938 int instance = dev->id;
939 const char *name = dev->name;
941 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
942 dev->a_ops.adapter_comm = aac_src_select_comm;
944 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
945 if (aac_adapter_ioremap(dev, dev->base_size)) {
946 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
950 /* Failure to reset here is an option ... */
951 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
952 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
953 if ((aac_reset_devices || reset_devices) &&
954 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
957 * Check to see if flash update is running.
958 * Wait for the adapter to be up and running. Wait up to 5 minutes
960 status = src_readl(dev, MUnit.OMR);
961 if (status & FLASH_UPD_PENDING) {
964 status = src_readl(dev, MUnit.OMR);
965 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
966 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
967 dev->name, instance);
970 } while (!(status & FLASH_UPD_SUCCESS) &&
971 !(status & FLASH_UPD_FAILED));
973 * Because right now FW is doing a soft reset,
974 * do not read scratch pad register at this time
979 * Check to see if the board panic'd while booting.
981 status = src_readl(dev, MUnit.OMR);
982 if (status & KERNEL_PANIC) {
983 if (aac_src_restart_adapter(dev,
984 aac_src_check_health(dev), IOP_HWSOFT_RESET))
989 * Check to see if the board failed any self tests.
991 status = src_readl(dev, MUnit.OMR);
992 if (status & SELF_TEST_FAILED) {
993 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
997 * Check to see if the monitor panic'd while booting.
999 if (status & MONITOR_PANIC) {
1000 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
1005 * Wait for the adapter to be up and running. Wait up to 3 minutes
1007 while (!((status = src_readl(dev, MUnit.OMR)) &
1008 KERNEL_UP_AND_RUNNING) ||
1009 status == 0xffffffff) {
1011 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
1012 time_after(jiffies, start+HZ*startup_timeout)) {
1013 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
1014 dev->name, instance, status);
1018 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
1019 time_after(jiffies, start + HZ *
1020 ((startup_timeout > 60)
1021 ? (startup_timeout - 60)
1022 : (startup_timeout / 2))))) {
1023 if (likely(!aac_src_restart_adapter(dev,
1024 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
1030 if (restart && aac_commit)
1033 * Fill in the common function dispatch table.
1035 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
1036 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
1037 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
1038 dev->a_ops.adapter_notify = aac_src_notify_adapter;
1039 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
1040 dev->a_ops.adapter_check_health = aac_src_check_health;
1041 dev->a_ops.adapter_restart = aac_src_restart_adapter;
1042 dev->a_ops.adapter_start = aac_src_start_adapter;
1045 * First clear out all interrupts. Then enable the one's that we
1048 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
1049 aac_adapter_disable_int(dev);
1050 src_writel(dev, MUnit.ODR_C, 0xffffffff);
1051 aac_adapter_enable_int(dev);
1053 if (aac_init_adapter(dev) == NULL)
1055 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) &&
1056 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3))
1058 if (dev->msi_enabled)
1059 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
1061 if (aac_acquire_irq(dev))
1064 dev->dbg_base = pci_resource_start(dev->pdev, 2);
1065 dev->dbg_base_mapped = dev->regs.src.bar1;
1066 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE;
1067 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
1069 aac_adapter_enable_int(dev);
1071 if (!dev->sync_mode) {
1073 * Tell the adapter that all is configured, and it can
1074 * start accepting requests
1076 aac_src_start_adapter(dev);
1085 void aac_src_access_devreg(struct aac_dev *dev, int mode)
1090 case AAC_ENABLE_INTERRUPT:
1093 dev->OIMR = (dev->msi_enabled ?
1094 AAC_INT_ENABLE_TYPE1_MSIX :
1095 AAC_INT_ENABLE_TYPE1_INTX));
1098 case AAC_DISABLE_INTERRUPT:
1101 dev->OIMR = AAC_INT_DISABLE_ALL);
1104 case AAC_ENABLE_MSIX:
1106 val = src_readl(dev, MUnit.IDR);
1108 src_writel(dev, MUnit.IDR, val);
1109 src_readl(dev, MUnit.IDR);
1111 val = PMC_ALL_INTERRUPT_BITS;
1112 src_writel(dev, MUnit.IOAR, val);
1113 val = src_readl(dev, MUnit.OIMR);
1116 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
1119 case AAC_DISABLE_MSIX:
1121 val = src_readl(dev, MUnit.IDR);
1123 src_writel(dev, MUnit.IDR, val);
1124 src_readl(dev, MUnit.IDR);
1127 case AAC_CLEAR_AIF_BIT:
1129 val = src_readl(dev, MUnit.IDR);
1131 src_writel(dev, MUnit.IDR, val);
1132 src_readl(dev, MUnit.IDR);
1135 case AAC_CLEAR_SYNC_BIT:
1137 val = src_readl(dev, MUnit.IDR);
1139 src_writel(dev, MUnit.IDR, val);
1140 src_readl(dev, MUnit.IDR);
1143 case AAC_ENABLE_INTX:
1145 val = src_readl(dev, MUnit.IDR);
1147 src_writel(dev, MUnit.IDR, val);
1148 src_readl(dev, MUnit.IDR);
1150 val = PMC_ALL_INTERRUPT_BITS;
1151 src_writel(dev, MUnit.IOAR, val);
1152 src_readl(dev, MUnit.IOAR);
1153 val = src_readl(dev, MUnit.OIMR);
1154 src_writel(dev, MUnit.OIMR,
1155 val & (~(PMC_GLOBAL_INT_BIT2)));
1163 static int aac_src_get_sync_status(struct aac_dev *dev)
1168 if (dev->msi_enabled)
1169 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1171 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;