2 * Copyright (C) 2005 - 2009 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
18 #ifndef BEISCSI_CMDS_H
19 #define BEISCSI_CMDS_H
22 * The driver sends configuration and managements command requests to the
23 * firmware in the BE. These requests are communicated to the processor
24 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
25 * WRB inside a MAILBOX.
26 * The commands are serviced by the ARM processor in the BladeEngine's MPU.
34 #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
35 #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
37 u32 embedded; /* dword 0 */
38 u32 payload_length; /* dword 1 */
39 u32 tag0; /* dword 2 */
40 u32 tag1; /* dword 3 */
41 u32 rsvd; /* dword 4 */
43 u8 embedded_payload[236]; /* used by embedded cmds */
44 struct be_sge sgl[19]; /* used by non-embedded cmds */
48 #define CQE_FLAGS_VALID_MASK (1 << 31)
49 #define CQE_FLAGS_ASYNC_MASK (1 << 30)
50 #define CQE_FLAGS_COMPLETED_MASK (1 << 28)
51 #define CQE_FLAGS_CONSUMED_MASK (1 << 27)
53 /* Completion Status */
54 #define MCC_STATUS_SUCCESS 0x0
56 #define CQE_STATUS_COMPL_MASK 0xFFFF
57 #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
58 #define CQE_STATUS_EXTD_MASK 0xFFFF
59 #define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */
62 u32 status; /* dword 0 */
63 u32 tag0; /* dword 1 */
64 u32 tag1; /* dword 2 */
65 u32 flags; /* dword 3 */
68 /********* Mailbox door bell *************/
70 * Used for driver communication with the FW.
71 * The software must write this register twice to post any command. First,
72 * it writes the register with hi=1 and the upper bits of the physical address
73 * for the MAILBOX structure. Software must poll the ready bit until this
74 * is acknowledged. Then, sotware writes the register with hi=0 with the lower
75 * bits in the address. It must poll the ready bit until the command is
76 * complete. Upon completion, the MAILBOX will contain a valid completion
79 #define MPU_MAILBOX_DB_OFFSET 0x160
80 #define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
81 #define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
83 /********** MPU semphore ******************/
84 #define MPU_EP_SEMAPHORE_OFFSET 0xac
85 #define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
86 #define EP_SEMAPHORE_POST_ERR_MASK 0x1
87 #define EP_SEMAPHORE_POST_ERR_SHIFT 31
89 /********** MCC door bell ************/
90 #define DB_MCCQ_OFFSET 0x140
91 #define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */
92 /* Number of entries posted */
93 #define DB_MCCQ_NUM_POSTED_SHIFT 16 /* bits 16 - 29 */
95 /* MPU semphore POST stage values */
96 #define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
99 * When the async bit of mcc_compl is set, the last 4 bytes of
100 * mcc_compl is interpreted as follows:
102 #define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
103 #define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF
104 #define ASYNC_EVENT_CODE_LINK_STATE 0x1
105 struct be_async_event_trailer {
110 ASYNC_EVENT_LINK_DOWN = 0x0,
111 ASYNC_EVENT_LINK_UP = 0x1
115 * When the event code of an async trailer is link-state, the mcc_compl
116 * must be interpreted as follows
118 struct be_async_event_link_state {
125 struct be_async_event_trailer trailer;
128 struct be_mcc_mailbox {
129 struct be_mcc_wrb wrb;
130 struct be_mcc_compl compl;
133 /* Type of subsystems supported by FW */
134 #define CMD_SUBSYSTEM_COMMON 0x1
135 #define CMD_SUBSYSTEM_ISCSI 0x2
136 #define CMD_SUBSYSTEM_ETH 0x3
137 #define CMD_SUBSYSTEM_ISCSI_INI 0x6
138 #define CMD_COMMON_TCP_UPLOAD 0x1
141 * List of common opcodes subsystem CMD_SUBSYSTEM_COMMON
142 * These opcodes are unique for each subsystem defined above
144 #define OPCODE_COMMON_CQ_CREATE 12
145 #define OPCODE_COMMON_EQ_CREATE 13
146 #define OPCODE_COMMON_MCC_CREATE 21
147 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32
148 #define OPCODE_COMMON_GET_FW_VERSION 35
149 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
150 #define OPCODE_COMMON_FIRMWARE_CONFIG 42
151 #define OPCODE_COMMON_MCC_DESTROY 53
152 #define OPCODE_COMMON_CQ_DESTROY 54
153 #define OPCODE_COMMON_EQ_DESTROY 55
154 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
155 #define OPCODE_COMMON_FUNCTION_RESET 61
158 * LIST of opcodes that are common between Initiator and Target
159 * used by CMD_SUBSYSTEM_ISCSI
160 * These opcodes are unique for each subsystem defined above
162 #define OPCODE_COMMON_ISCSI_CFG_POST_SGL_PAGES 2
163 #define OPCODE_COMMON_ISCSI_CFG_REMOVE_SGL_PAGES 3
164 #define OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG 7
165 #define OPCODE_COMMON_ISCSI_SET_FRAGNUM_BITS_FOR_SGL_CRA 61
166 #define OPCODE_COMMON_ISCSI_DEFQ_CREATE 64
167 #define OPCODE_COMMON_ISCSI_DEFQ_DESTROY 65
168 #define OPCODE_COMMON_ISCSI_WRBQ_CREATE 66
169 #define OPCODE_COMMON_ISCSI_WRBQ_DESTROY 67
171 struct be_cmd_req_hdr {
172 u8 opcode; /* dword 0 */
173 u8 subsystem; /* dword 0 */
174 u8 port_number; /* dword 0 */
175 u8 domain; /* dword 0 */
176 u32 timeout; /* dword 1 */
177 u32 request_length; /* dword 2 */
178 u32 rsvd0; /* dword 3 */
181 struct be_cmd_resp_hdr {
182 u32 info; /* dword 0 */
183 u32 status; /* dword 1 */
184 u32 response_length; /* dword 2 */
185 u32 actual_resp_len; /* dword 3 */
193 /**************************
194 * BE Command definitions *
195 **************************/
198 * Pseudo amap definition in which each bit of the actual structure is defined
199 * as a byte - used to calculate offset/shift/mask of each field
201 struct amap_eq_context {
202 u8 cidx[13]; /* dword 0 */
203 u8 rsvd0[3]; /* dword 0 */
204 u8 epidx[13]; /* dword 0 */
205 u8 valid; /* dword 0 */
206 u8 rsvd1; /* dword 0 */
207 u8 size; /* dword 0 */
208 u8 pidx[13]; /* dword 1 */
209 u8 rsvd2[3]; /* dword 1 */
210 u8 pd[10]; /* dword 1 */
211 u8 count[3]; /* dword 1 */
212 u8 solevent; /* dword 1 */
213 u8 stalled; /* dword 1 */
214 u8 armed; /* dword 1 */
215 u8 rsvd3[4]; /* dword 2 */
216 u8 func[8]; /* dword 2 */
217 u8 rsvd4; /* dword 2 */
218 u8 delaymult[10]; /* dword 2 */
219 u8 rsvd5[2]; /* dword 2 */
220 u8 phase[2]; /* dword 2 */
221 u8 nodelay; /* dword 2 */
222 u8 rsvd6[4]; /* dword 2 */
223 u8 rsvd7[32]; /* dword 3 */
226 struct be_cmd_req_eq_create {
227 struct be_cmd_req_hdr hdr; /* dw[4] */
228 u16 num_pages; /* sword */
229 u16 rsvd0; /* sword */
230 u8 context[sizeof(struct amap_eq_context) / 8]; /* dw[4] */
231 struct phys_addr pages[8];
234 struct be_cmd_resp_eq_create {
235 struct be_cmd_resp_hdr resp_hdr;
236 u16 eq_id; /* sword */
237 u16 rsvd0; /* sword */
245 struct be_cmd_req_mac_query {
246 struct be_cmd_req_hdr hdr;
252 struct be_cmd_resp_mac_query {
253 struct be_cmd_resp_hdr hdr;
257 /******************** Create CQ ***************************/
259 * Pseudo amap definition in which each bit of the actual structure is defined
260 * as a byte - used to calculate offset/shift/mask of each field
262 struct amap_cq_context {
263 u8 cidx[11]; /* dword 0 */
264 u8 rsvd0; /* dword 0 */
265 u8 coalescwm[2]; /* dword 0 */
266 u8 nodelay; /* dword 0 */
267 u8 epidx[11]; /* dword 0 */
268 u8 rsvd1; /* dword 0 */
269 u8 count[2]; /* dword 0 */
270 u8 valid; /* dword 0 */
271 u8 solevent; /* dword 0 */
272 u8 eventable; /* dword 0 */
273 u8 pidx[11]; /* dword 1 */
274 u8 rsvd2; /* dword 1 */
275 u8 pd[10]; /* dword 1 */
276 u8 eqid[8]; /* dword 1 */
277 u8 stalled; /* dword 1 */
278 u8 armed; /* dword 1 */
279 u8 rsvd3[4]; /* dword 2 */
280 u8 func[8]; /* dword 2 */
281 u8 rsvd4[20]; /* dword 2 */
282 u8 rsvd5[32]; /* dword 3 */
285 struct be_cmd_req_cq_create {
286 struct be_cmd_req_hdr hdr;
289 u8 context[sizeof(struct amap_cq_context) / 8];
290 struct phys_addr pages[4];
293 struct be_cmd_resp_cq_create {
294 struct be_cmd_resp_hdr hdr;
299 /******************** Create MCCQ ***************************/
301 * Pseudo amap definition in which each bit of the actual structure is defined
302 * as a byte - used to calculate offset/shift/mask of each field
304 struct amap_mcc_context {
319 struct be_cmd_req_mcc_create {
320 struct be_cmd_req_hdr hdr;
323 u8 context[sizeof(struct amap_mcc_context) / 8];
324 struct phys_addr pages[8];
327 struct be_cmd_resp_mcc_create {
328 struct be_cmd_resp_hdr hdr;
333 /******************** Q Destroy ***************************/
334 /* Type of Queue to be destroyed */
344 struct be_cmd_req_q_destroy {
345 struct be_cmd_req_hdr hdr;
347 u16 bypass_flush; /* valid only for rx q destroy */
354 struct be_cmd_req_mcast_mac_config {
355 struct be_cmd_req_hdr hdr;
359 struct macaddr mac[32];
362 static inline void *embedded_payload(struct be_mcc_wrb *wrb)
364 return wrb->payload.embedded_payload;
367 static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
369 return &wrb->payload.sgl[0];
372 /******************** Modify EQ Delay *******************/
373 struct be_cmd_req_modify_eq_delay {
374 struct be_cmd_req_hdr hdr;
379 u32 delay_multiplier;
383 /******************** Get MAC ADDR *******************/
387 struct be_cmd_req_get_mac_addr {
388 struct be_cmd_req_hdr hdr;
394 u16 size_of_structure;
395 u8 mac_address[ETH_ALEN];
399 struct be_cmd_resp_get_mac_addr {
400 struct be_cmd_resp_hdr hdr;
406 u16 size_of_structure;
411 int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl,
412 struct be_queue_info *eq, int eq_delay);
414 int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
415 struct be_queue_info *cq, struct be_queue_info *eq,
416 bool sol_evts, bool no_delay,
417 int num_cqe_dma_coalesce);
419 int beiscsi_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
421 int beiscsi_cmd_mccq_create(struct beiscsi_hba *phba,
422 struct be_queue_info *mccq,
423 struct be_queue_info *cq);
425 int be_poll_mcc(struct be_ctrl_info *ctrl);
426 unsigned char mgmt_check_supported_fw(struct be_ctrl_info *ctrl,
427 struct beiscsi_hba *phba);
428 int be_cmd_get_mac_addr(struct beiscsi_hba *phba, u8 *mac_addr);
430 /*ISCSI Functuions */
431 int be_cmd_fw_initialize(struct be_ctrl_info *ctrl);
433 struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem);
434 struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba);
435 int be_mcc_notify_wait(struct beiscsi_hba *phba);
437 int be_mbox_notify(struct be_ctrl_info *ctrl);
439 int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
440 struct be_queue_info *cq,
441 struct be_queue_info *dq, int length,
444 int be_cmd_iscsi_post_sgl_pages(struct be_ctrl_info *ctrl,
445 struct be_dma_mem *q_mem, u32 page_offset,
448 int be_cmd_wrbq_create(struct be_ctrl_info *ctrl, struct be_dma_mem *q_mem,
449 struct be_queue_info *wrbq);
451 struct be_default_pdu_context {
455 struct amap_be_default_pdu_context {
456 u8 dbuf_cindex[13]; /* dword 0 */
457 u8 rsvd0[3]; /* dword 0 */
458 u8 ring_size[4]; /* dword 0 */
459 u8 ring_state[4]; /* dword 0 */
460 u8 rsvd1[8]; /* dword 0 */
461 u8 dbuf_pindex[13]; /* dword 1 */
462 u8 rsvd2; /* dword 1 */
463 u8 pci_func_id[8]; /* dword 1 */
464 u8 rx_pdid[9]; /* dword 1 */
465 u8 rx_pdid_valid; /* dword 1 */
466 u8 default_buffer_size[16]; /* dword 2 */
467 u8 cq_id_recv[10]; /* dword 2 */
468 u8 rx_pdid_not_valid; /* dword 2 */
469 u8 rsvd3[5]; /* dword 2 */
470 u8 rsvd4[32]; /* dword 3 */
473 struct be_defq_create_req {
474 struct be_cmd_req_hdr hdr;
478 struct be_default_pdu_context context;
479 struct phys_addr pages[8];
482 struct be_defq_create_resp {
483 struct be_cmd_req_hdr hdr;
488 struct be_post_sgl_pages_req {
489 struct be_cmd_req_hdr hdr;
493 struct phys_addr pages[26];
497 struct be_wrbq_create_req {
498 struct be_cmd_req_hdr hdr;
502 struct phys_addr pages[8];
505 struct be_wrbq_create_resp {
506 struct be_cmd_resp_hdr resp_hdr;
511 #define SOL_CID_MASK 0x0000FFC0
512 #define SOL_CODE_MASK 0x0000003F
513 #define SOL_WRB_INDEX_MASK 0x00FF0000
514 #define SOL_CMD_WND_MASK 0xFF000000
515 #define SOL_RES_CNT_MASK 0x7FFFFFFF
516 #define SOL_EXP_CMD_SN_MASK 0xFFFFFFFF
517 #define SOL_HW_STS_MASK 0x000000FF
518 #define SOL_STS_MASK 0x0000FF00
519 #define SOL_RESP_MASK 0x00FF0000
520 #define SOL_FLAGS_MASK 0x7F000000
521 #define SOL_S_MASK 0x80000000
527 struct amap_sol_cqe {
528 u8 hw_sts[8]; /* dword 0 */
529 u8 i_sts[8]; /* dword 0 */
530 u8 i_resp[8]; /* dword 0 */
531 u8 i_flags[7]; /* dword 0 */
533 u8 i_exp_cmd_sn[32]; /* dword 1 */
534 u8 code[6]; /* dword 2 */
535 u8 cid[10]; /* dword 2 */
536 u8 wrb_index[8]; /* dword 2 */
537 u8 i_cmd_wnd[8]; /* dword 2 */
538 u8 i_res_cnt[31]; /* dword 3 */
539 u8 valid; /* dword 3 */
542 #define SOL_ICD_INDEX_MASK 0x0003FFC0
543 struct amap_sol_cqe_ring {
544 u8 hw_sts[8]; /* dword 0 */
545 u8 i_sts[8]; /* dword 0 */
546 u8 i_resp[8]; /* dword 0 */
547 u8 i_flags[7]; /* dword 0 */
549 u8 i_exp_cmd_sn[32]; /* dword 1 */
550 u8 code[6]; /* dword 2 */
551 u8 icd_index[12]; /* dword 2 */
552 u8 rsvd[6]; /* dword 2 */
553 u8 i_cmd_wnd[8]; /* dword 2 */
554 u8 i_res_cnt[31]; /* dword 3 */
555 u8 valid; /* dword 3 */
561 * Post WRB Queue Doorbell Register used by the host Storage
562 * stack to notify the
563 * controller of a posted Work Request Block
565 #define DB_WRB_POST_CID_MASK 0x3FF /* bits 0 - 9 */
566 #define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */
568 #define DB_DEF_PDU_WRB_INDEX_SHIFT 16
569 #define DB_DEF_PDU_NUM_POSTED_SHIFT 24
571 struct fragnum_bits_for_sgl_cra_in {
572 struct be_cmd_req_hdr hdr;
576 struct iscsi_cleanup_req {
577 struct be_cmd_req_hdr hdr;
587 u32 delay_multiplier;
590 struct be_eq_delay_params_in {
591 struct be_cmd_req_hdr hdr;
593 struct eq_delay delay[8];
596 struct ip_address_format {
597 u16 size_of_structure;
604 struct tcp_connect_and_offload_in {
605 struct be_cmd_req_hdr hdr;
606 struct ip_address_format ip_address;
611 struct phys_addr dataout_template_pa;
618 struct tcp_connect_and_offload_out {
619 struct be_cmd_resp_hdr hdr;
620 u32 connection_handle;
626 struct be_mcc_wrb_context {
628 int *users_final_status;
631 #define DB_DEF_PDU_RING_ID_MASK 0x3FF /* bits 0 - 9 */
632 #define DB_DEF_PDU_CQPROC_MASK 0x3FFF /* bits 0 - 9 */
633 #define DB_DEF_PDU_REARM_SHIFT 14
634 #define DB_DEF_PDU_EVENT_SHIFT 15
635 #define DB_DEF_PDU_CQPROC_SHIFT 16
641 struct tcp_upload_params_in {
642 struct be_cmd_req_hdr hdr;
648 struct tcp_upload_params_out {
652 union tcp_upload_params {
653 struct tcp_upload_params_in request;
654 struct tcp_upload_params_out response;
657 struct be_ulp_fw_cfg {
674 struct be_cmd_req_hdr hdr;
675 u32 be_config_number;
679 struct be_ulp_fw_cfg ulp[2];
683 #define CMD_ISCSI_COMMAND_INVALIDATE 1
684 #define ISCSI_OPCODE_SCSI_DATA_OUT 5
685 #define OPCODE_COMMON_ISCSI_TCP_CONNECT_AND_OFFLOAD 70
686 #define OPCODE_ISCSI_INI_DRIVER_OFFLOAD_SESSION 41
687 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
688 #define OPCODE_COMMON_ISCSI_CLEANUP 59
689 #define OPCODE_COMMON_TCP_UPLOAD 56
690 #define OPCODE_COMMON_ISCSI_ERROR_RECOVERY_INVALIDATE_COMMANDS 1
691 /* --- CMD_ISCSI_INVALIDATE_CONNECTION_TYPE --- */
692 #define CMD_ISCSI_CONNECTION_INVALIDATE 0x8001
693 #define CMD_ISCSI_CONNECTION_ISSUE_TCP_RST 0x8002
694 #define OPCODE_ISCSI_INI_DRIVER_INVALIDATE_CONNECTION 42
696 #define INI_WR_CMD 1 /* Initiator write command */
697 #define INI_TMF_CMD 2 /* Initiator TMF command */
698 #define INI_NOPOUT_CMD 3 /* Initiator; Send a NOP-OUT */
699 #define INI_RD_CMD 5 /* Initiator requesting to send
702 #define TGT_CTX_UPDT_CMD 7 /* Target context update */
703 #define TGT_STS_CMD 8 /* Target R2T and other BHS
704 * where only the status number
707 #define TGT_DATAIN_CMD 9 /* Target Data-Ins in response
710 #define TGT_SOS_PDU 10 /* Target:standalone status
713 #define TGT_DM_CMD 11 /* Indicates that the bhs
715 * driver should not be touched
717 /* --- CMD_CHUTE_TYPE --- */
718 #define CMD_CONNECTION_CHUTE_0 1
719 #define CMD_CONNECTION_CHUTE_1 2
720 #define CMD_CONNECTION_CHUTE_2 3
722 #define EQ_MAJOR_CODE_COMPLETION 0
724 #define CMD_ISCSI_SESSION_DEL_CFG_FROM_FLASH 0
725 #define CMD_ISCSI_SESSION_SAVE_CFG_ON_FLASH 1
727 /* --- CONNECTION_UPLOAD_PARAMS --- */
728 /* These parameters are used to define the type of upload desired. */
729 #define CONNECTION_UPLOAD_GRACEFUL 1 /* Graceful upload */
730 #define CONNECTION_UPLOAD_ABORT_RESET 2 /* Abortive upload with
733 #define CONNECTION_UPLOAD_ABORT 3 /* Abortive upload without
736 #define CONNECTION_UPLOAD_ABORT_WITH_SEQ 4 /* Abortive upload with reset,
737 * sequence number by driver */
739 /* Returns byte size of given field with a structure. */
741 /* Returns the number of items in the field array. */
742 #define BE_NUMBER_OF_FIELD(_type_, _field_) \
743 (FIELD_SIZEOF(_type_, _field_)/sizeof((((_type_ *)0)->_field_[0])))\
746 * Different types of iSCSI completions to host driver for both initiator
750 #define SOL_CMD_COMPLETE 1 /* Solicited command completed
753 #define SOL_CMD_KILLED_DATA_DIGEST_ERR 2 /* Solicited command got
754 * invalidated internally due
755 * to Data Digest error
757 #define CXN_KILLED_PDU_SIZE_EXCEEDS_DSL 3 /* Connection got invalidated
759 * due to a recieved PDU
762 #define CXN_KILLED_BURST_LEN_MISMATCH 4 /* Connection got invalidated
763 * internally due ti received
764 * PDU sequence size >
767 #define CXN_KILLED_AHS_RCVD 5 /* Connection got invalidated
768 * internally due to a recieved
771 #define CXN_KILLED_HDR_DIGEST_ERR 6 /* Connection got invalidated
772 * internally due to Hdr Digest
775 #define CXN_KILLED_UNKNOWN_HDR 7 /* Connection got invalidated
777 * due to a bad opcode in the
780 #define CXN_KILLED_STALE_ITT_TTT_RCVD 8 /* Connection got invalidated
781 * internally due to a recieved
782 * ITT/TTT that does not belong
785 #define CXN_KILLED_INVALID_ITT_TTT_RCVD 9 /* Connection got invalidated
786 * internally due to recieved
787 * ITT/TTT value > Max
788 * Supported ITTs/TTTs
790 #define CXN_KILLED_RST_RCVD 10 /* Connection got invalidated
791 * internally due to an
794 #define CXN_KILLED_TIMED_OUT 11 /* Connection got invalidated
795 * internally due to timeout on
796 * tcp segment 12 retransmit
799 #define CXN_KILLED_RST_SENT 12 /* Connection got invalidated
800 * internally due to TCP RST
801 * sent by the Tx side
803 #define CXN_KILLED_FIN_RCVD 13 /* Connection got invalidated
804 * internally due to an
807 #define CXN_KILLED_BAD_UNSOL_PDU_RCVD 14 /* Connection got invalidated
808 * internally due to bad
809 * unsolicited PDU Unsolicited
813 #define CXN_KILLED_BAD_WRB_INDEX_ERROR 15 /* Connection got invalidated
814 * internally due to bad WRB
817 #define CXN_KILLED_OVER_RUN_RESIDUAL 16 /* Command got invalidated
818 * internally due to recived
819 * command has residual
822 #define CXN_KILLED_UNDER_RUN_RESIDUAL 17 /* Command got invalidated
823 * internally due to recived
824 * command has residual under
827 #define CMD_KILLED_INVALID_STATSN_RCVD 18 /* Command got invalidated
828 * internally due to a recieved
829 * PDU has an invalid StatusSN
831 #define CMD_KILLED_INVALID_R2T_RCVD 19 /* Command got invalidated
832 * internally due to a recieved
833 * an R2T with some invalid
836 #define CMD_CXN_KILLED_LUN_INVALID 20 /* Command got invalidated
837 * internally due to received
838 * PDU has an invalid LUN.
840 #define CMD_CXN_KILLED_ICD_INVALID 21 /* Command got invalidated
841 * internally due to the
842 * corresponding ICD not in a
845 #define CMD_CXN_KILLED_ITT_INVALID 22 /* Command got invalidated due
846 * to received PDU has an
849 #define CMD_CXN_KILLED_SEQ_OUTOFORDER 23 /* Command got invalidated due
850 * to received sequence buffer
851 * offset is out of order.
853 #define CMD_CXN_KILLED_INVALID_DATASN_RCVD 24 /* Command got invalidated
854 * internally due to a
855 * recieved PDU has an invalid
858 #define CXN_INVALIDATE_NOTIFY 25 /* Connection invalidation
861 #define CXN_INVALIDATE_INDEX_NOTIFY 26 /* Connection invalidation
863 * with data PDU index.
865 #define CMD_INVALIDATED_NOTIFY 27 /* Command invalidation
866 * completionnotifify.
868 #define UNSOL_HDR_NOTIFY 28 /* Unsolicited header notify.*/
869 #define UNSOL_DATA_NOTIFY 29 /* Unsolicited data notify.*/
870 #define UNSOL_DATA_DIGEST_ERROR_NOTIFY 30 /* Unsolicited data digest
873 #define DRIVERMSG_NOTIFY 31 /* TCP acknowledge based
876 #define CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN 32 /* Connection got invalidated
877 * internally due to command
878 * and data are not on same
881 #define SOL_CMD_KILLED_DIF_ERR 33 /* Solicited command got
882 * invalidated internally due
885 #define CXN_KILLED_SYN_RCVD 34 /* Connection got invalidated
886 * internally due to incoming
889 #define CXN_KILLED_IMM_DATA_RCVD 35 /* Connection got invalidated
890 * internally due to an
891 * incoming Unsolicited PDU
892 * that has immediate data on
896 void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
897 bool embedded, u8 sge_cnt);
899 void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
900 u8 subsystem, u8 opcode, int cmd_len);
902 #endif /* !BEISCSI_CMDS_H */