2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
23 #include "bfa_defs_svc.h"
26 BFA_TRC_FILE(CNA, IOC);
29 * IOC local definitions
31 #define BFA_IOC_TOV 3000 /* msecs */
32 #define BFA_IOC_HWSEM_TOV 500 /* msecs */
33 #define BFA_IOC_HB_TOV 500 /* msecs */
34 #define BFA_IOC_TOV_RECOVER BFA_IOC_HB_TOV
35 #define BFA_IOC_POLL_TOV BFA_TIMER_FREQ
37 #define bfa_ioc_timer_start(__ioc) \
38 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \
39 bfa_ioc_timeout, (__ioc), BFA_IOC_TOV)
40 #define bfa_ioc_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->ioc_timer)
42 #define bfa_hb_timer_start(__ioc) \
43 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->hb_timer, \
44 bfa_ioc_hb_check, (__ioc), BFA_IOC_HB_TOV)
45 #define bfa_hb_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->hb_timer)
47 #define BFA_DBG_FWTRC_OFF(_fn) (BFI_IOC_TRC_OFF + BFA_DBG_FWTRC_LEN * (_fn))
49 #define bfa_ioc_state_disabled(__sm) \
50 (((__sm) == BFI_IOC_UNINIT) || \
51 ((__sm) == BFI_IOC_INITING) || \
52 ((__sm) == BFI_IOC_HWINIT) || \
53 ((__sm) == BFI_IOC_DISABLED) || \
54 ((__sm) == BFI_IOC_FAIL) || \
55 ((__sm) == BFI_IOC_CFG_DISABLED))
58 * Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details.
61 #define bfa_ioc_firmware_lock(__ioc) \
62 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
63 #define bfa_ioc_firmware_unlock(__ioc) \
64 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
65 #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
66 #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
67 #define bfa_ioc_notify_fail(__ioc) \
68 ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
69 #define bfa_ioc_sync_start(__ioc) \
70 ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
71 #define bfa_ioc_sync_join(__ioc) \
72 ((__ioc)->ioc_hwif->ioc_sync_join(__ioc))
73 #define bfa_ioc_sync_leave(__ioc) \
74 ((__ioc)->ioc_hwif->ioc_sync_leave(__ioc))
75 #define bfa_ioc_sync_ack(__ioc) \
76 ((__ioc)->ioc_hwif->ioc_sync_ack(__ioc))
77 #define bfa_ioc_sync_complete(__ioc) \
78 ((__ioc)->ioc_hwif->ioc_sync_complete(__ioc))
79 #define bfa_ioc_set_cur_ioc_fwstate(__ioc, __fwstate) \
80 ((__ioc)->ioc_hwif->ioc_set_fwstate(__ioc, __fwstate))
81 #define bfa_ioc_get_cur_ioc_fwstate(__ioc) \
82 ((__ioc)->ioc_hwif->ioc_get_fwstate(__ioc))
83 #define bfa_ioc_set_alt_ioc_fwstate(__ioc, __fwstate) \
84 ((__ioc)->ioc_hwif->ioc_set_alt_fwstate(__ioc, __fwstate))
85 #define bfa_ioc_get_alt_ioc_fwstate(__ioc) \
86 ((__ioc)->ioc_hwif->ioc_get_alt_fwstate(__ioc))
88 #define bfa_ioc_mbox_cmd_pending(__ioc) \
89 (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \
90 readl((__ioc)->ioc_regs.hfn_mbox_cmd))
92 bfa_boolean_t bfa_auto_recover = BFA_TRUE;
95 * forward declarations
97 static void bfa_ioc_hw_sem_get(struct bfa_ioc_s *ioc);
98 static void bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force);
99 static void bfa_ioc_timeout(void *ioc);
100 static void bfa_ioc_poll_fwinit(struct bfa_ioc_s *ioc);
101 static void bfa_ioc_send_enable(struct bfa_ioc_s *ioc);
102 static void bfa_ioc_send_disable(struct bfa_ioc_s *ioc);
103 static void bfa_ioc_send_getattr(struct bfa_ioc_s *ioc);
104 static void bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc);
105 static void bfa_ioc_mbox_poll(struct bfa_ioc_s *ioc);
106 static void bfa_ioc_mbox_flush(struct bfa_ioc_s *ioc);
107 static void bfa_ioc_recover(struct bfa_ioc_s *ioc);
108 static void bfa_ioc_event_notify(struct bfa_ioc_s *ioc ,
109 enum bfa_ioc_event_e event);
110 static void bfa_ioc_disable_comp(struct bfa_ioc_s *ioc);
111 static void bfa_ioc_lpu_stop(struct bfa_ioc_s *ioc);
112 static void bfa_ioc_fail_notify(struct bfa_ioc_s *ioc);
113 static void bfa_ioc_pf_fwmismatch(struct bfa_ioc_s *ioc);
114 static enum bfi_ioc_img_ver_cmp_e bfa_ioc_fw_ver_patch_cmp(
115 struct bfi_ioc_image_hdr_s *base_fwhdr,
116 struct bfi_ioc_image_hdr_s *fwhdr_to_cmp);
117 static enum bfi_ioc_img_ver_cmp_e bfa_ioc_flash_fwver_cmp(
118 struct bfa_ioc_s *ioc,
119 struct bfi_ioc_image_hdr_s *base_fwhdr);
122 * IOC state machine definitions/declarations
125 IOC_E_RESET = 1, /* IOC reset request */
126 IOC_E_ENABLE = 2, /* IOC enable request */
127 IOC_E_DISABLE = 3, /* IOC disable request */
128 IOC_E_DETACH = 4, /* driver detach cleanup */
129 IOC_E_ENABLED = 5, /* f/w enabled */
130 IOC_E_FWRSP_GETATTR = 6, /* IOC get attribute response */
131 IOC_E_DISABLED = 7, /* f/w disabled */
132 IOC_E_PFFAILED = 8, /* failure notice by iocpf sm */
133 IOC_E_HBFAIL = 9, /* heartbeat failure */
134 IOC_E_HWERROR = 10, /* hardware error interrupt */
135 IOC_E_TIMEOUT = 11, /* timeout */
136 IOC_E_HWFAILED = 12, /* PCI mapping failure notice */
139 bfa_fsm_state_decl(bfa_ioc, uninit, struct bfa_ioc_s, enum ioc_event);
140 bfa_fsm_state_decl(bfa_ioc, reset, struct bfa_ioc_s, enum ioc_event);
141 bfa_fsm_state_decl(bfa_ioc, enabling, struct bfa_ioc_s, enum ioc_event);
142 bfa_fsm_state_decl(bfa_ioc, getattr, struct bfa_ioc_s, enum ioc_event);
143 bfa_fsm_state_decl(bfa_ioc, op, struct bfa_ioc_s, enum ioc_event);
144 bfa_fsm_state_decl(bfa_ioc, fail_retry, struct bfa_ioc_s, enum ioc_event);
145 bfa_fsm_state_decl(bfa_ioc, fail, struct bfa_ioc_s, enum ioc_event);
146 bfa_fsm_state_decl(bfa_ioc, disabling, struct bfa_ioc_s, enum ioc_event);
147 bfa_fsm_state_decl(bfa_ioc, disabled, struct bfa_ioc_s, enum ioc_event);
148 bfa_fsm_state_decl(bfa_ioc, hwfail, struct bfa_ioc_s, enum ioc_event);
150 static struct bfa_sm_table_s ioc_sm_table[] = {
151 {BFA_SM(bfa_ioc_sm_uninit), BFA_IOC_UNINIT},
152 {BFA_SM(bfa_ioc_sm_reset), BFA_IOC_RESET},
153 {BFA_SM(bfa_ioc_sm_enabling), BFA_IOC_ENABLING},
154 {BFA_SM(bfa_ioc_sm_getattr), BFA_IOC_GETATTR},
155 {BFA_SM(bfa_ioc_sm_op), BFA_IOC_OPERATIONAL},
156 {BFA_SM(bfa_ioc_sm_fail_retry), BFA_IOC_INITFAIL},
157 {BFA_SM(bfa_ioc_sm_fail), BFA_IOC_FAIL},
158 {BFA_SM(bfa_ioc_sm_disabling), BFA_IOC_DISABLING},
159 {BFA_SM(bfa_ioc_sm_disabled), BFA_IOC_DISABLED},
160 {BFA_SM(bfa_ioc_sm_hwfail), BFA_IOC_HWFAIL},
164 * IOCPF state machine definitions/declarations
167 #define bfa_iocpf_timer_start(__ioc) \
168 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \
169 bfa_iocpf_timeout, (__ioc), BFA_IOC_TOV)
170 #define bfa_iocpf_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->ioc_timer)
172 #define bfa_iocpf_poll_timer_start(__ioc) \
173 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \
174 bfa_iocpf_poll_timeout, (__ioc), BFA_IOC_POLL_TOV)
176 #define bfa_sem_timer_start(__ioc) \
177 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->sem_timer, \
178 bfa_iocpf_sem_timeout, (__ioc), BFA_IOC_HWSEM_TOV)
179 #define bfa_sem_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->sem_timer)
182 * Forward declareations for iocpf state machine
184 static void bfa_iocpf_timeout(void *ioc_arg);
185 static void bfa_iocpf_sem_timeout(void *ioc_arg);
186 static void bfa_iocpf_poll_timeout(void *ioc_arg);
189 * IOCPF state machine events
192 IOCPF_E_ENABLE = 1, /* IOCPF enable request */
193 IOCPF_E_DISABLE = 2, /* IOCPF disable request */
194 IOCPF_E_STOP = 3, /* stop on driver detach */
195 IOCPF_E_FWREADY = 4, /* f/w initialization done */
196 IOCPF_E_FWRSP_ENABLE = 5, /* enable f/w response */
197 IOCPF_E_FWRSP_DISABLE = 6, /* disable f/w response */
198 IOCPF_E_FAIL = 7, /* failure notice by ioc sm */
199 IOCPF_E_INITFAIL = 8, /* init fail notice by ioc sm */
200 IOCPF_E_GETATTRFAIL = 9, /* init fail notice by ioc sm */
201 IOCPF_E_SEMLOCKED = 10, /* h/w semaphore is locked */
202 IOCPF_E_TIMEOUT = 11, /* f/w response timeout */
203 IOCPF_E_SEM_ERROR = 12, /* h/w sem mapping error */
209 enum bfa_iocpf_state {
210 BFA_IOCPF_RESET = 1, /* IOC is in reset state */
211 BFA_IOCPF_SEMWAIT = 2, /* Waiting for IOC h/w semaphore */
212 BFA_IOCPF_HWINIT = 3, /* IOC h/w is being initialized */
213 BFA_IOCPF_READY = 4, /* IOCPF is initialized */
214 BFA_IOCPF_INITFAIL = 5, /* IOCPF failed */
215 BFA_IOCPF_FAIL = 6, /* IOCPF failed */
216 BFA_IOCPF_DISABLING = 7, /* IOCPF is being disabled */
217 BFA_IOCPF_DISABLED = 8, /* IOCPF is disabled */
218 BFA_IOCPF_FWMISMATCH = 9, /* IOC f/w different from drivers */
221 bfa_fsm_state_decl(bfa_iocpf, reset, struct bfa_iocpf_s, enum iocpf_event);
222 bfa_fsm_state_decl(bfa_iocpf, fwcheck, struct bfa_iocpf_s, enum iocpf_event);
223 bfa_fsm_state_decl(bfa_iocpf, mismatch, struct bfa_iocpf_s, enum iocpf_event);
224 bfa_fsm_state_decl(bfa_iocpf, semwait, struct bfa_iocpf_s, enum iocpf_event);
225 bfa_fsm_state_decl(bfa_iocpf, hwinit, struct bfa_iocpf_s, enum iocpf_event);
226 bfa_fsm_state_decl(bfa_iocpf, enabling, struct bfa_iocpf_s, enum iocpf_event);
227 bfa_fsm_state_decl(bfa_iocpf, ready, struct bfa_iocpf_s, enum iocpf_event);
228 bfa_fsm_state_decl(bfa_iocpf, initfail_sync, struct bfa_iocpf_s,
230 bfa_fsm_state_decl(bfa_iocpf, initfail, struct bfa_iocpf_s, enum iocpf_event);
231 bfa_fsm_state_decl(bfa_iocpf, fail_sync, struct bfa_iocpf_s, enum iocpf_event);
232 bfa_fsm_state_decl(bfa_iocpf, fail, struct bfa_iocpf_s, enum iocpf_event);
233 bfa_fsm_state_decl(bfa_iocpf, disabling, struct bfa_iocpf_s, enum iocpf_event);
234 bfa_fsm_state_decl(bfa_iocpf, disabling_sync, struct bfa_iocpf_s,
236 bfa_fsm_state_decl(bfa_iocpf, disabled, struct bfa_iocpf_s, enum iocpf_event);
238 static struct bfa_sm_table_s iocpf_sm_table[] = {
239 {BFA_SM(bfa_iocpf_sm_reset), BFA_IOCPF_RESET},
240 {BFA_SM(bfa_iocpf_sm_fwcheck), BFA_IOCPF_FWMISMATCH},
241 {BFA_SM(bfa_iocpf_sm_mismatch), BFA_IOCPF_FWMISMATCH},
242 {BFA_SM(bfa_iocpf_sm_semwait), BFA_IOCPF_SEMWAIT},
243 {BFA_SM(bfa_iocpf_sm_hwinit), BFA_IOCPF_HWINIT},
244 {BFA_SM(bfa_iocpf_sm_enabling), BFA_IOCPF_HWINIT},
245 {BFA_SM(bfa_iocpf_sm_ready), BFA_IOCPF_READY},
246 {BFA_SM(bfa_iocpf_sm_initfail_sync), BFA_IOCPF_INITFAIL},
247 {BFA_SM(bfa_iocpf_sm_initfail), BFA_IOCPF_INITFAIL},
248 {BFA_SM(bfa_iocpf_sm_fail_sync), BFA_IOCPF_FAIL},
249 {BFA_SM(bfa_iocpf_sm_fail), BFA_IOCPF_FAIL},
250 {BFA_SM(bfa_iocpf_sm_disabling), BFA_IOCPF_DISABLING},
251 {BFA_SM(bfa_iocpf_sm_disabling_sync), BFA_IOCPF_DISABLING},
252 {BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED},
260 * Beginning state. IOC uninit state.
264 bfa_ioc_sm_uninit_entry(struct bfa_ioc_s *ioc)
269 * IOC is in uninit state.
272 bfa_ioc_sm_uninit(struct bfa_ioc_s *ioc, enum ioc_event event)
278 bfa_fsm_set_state(ioc, bfa_ioc_sm_reset);
282 bfa_sm_fault(ioc, event);
286 * Reset entry actions -- initialize state machine
289 bfa_ioc_sm_reset_entry(struct bfa_ioc_s *ioc)
291 bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset);
295 * IOC is in reset state.
298 bfa_ioc_sm_reset(struct bfa_ioc_s *ioc, enum ioc_event event)
304 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
308 bfa_ioc_disable_comp(ioc);
312 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
316 bfa_sm_fault(ioc, event);
322 bfa_ioc_sm_enabling_entry(struct bfa_ioc_s *ioc)
324 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_ENABLE);
328 * Host IOC function is being enabled, awaiting response from firmware.
329 * Semaphore is acquired.
332 bfa_ioc_sm_enabling(struct bfa_ioc_s *ioc, enum ioc_event event)
338 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
342 /* !!! fall through !!! */
344 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
345 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
346 if (event != IOC_E_PFFAILED)
347 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
351 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
352 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
356 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
360 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
361 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
368 bfa_sm_fault(ioc, event);
374 bfa_ioc_sm_getattr_entry(struct bfa_ioc_s *ioc)
376 bfa_ioc_timer_start(ioc);
377 bfa_ioc_send_getattr(ioc);
381 * IOC configuration in progress. Timer is active.
384 bfa_ioc_sm_getattr(struct bfa_ioc_s *ioc, enum ioc_event event)
389 case IOC_E_FWRSP_GETATTR:
390 bfa_ioc_timer_stop(ioc);
391 bfa_fsm_set_state(ioc, bfa_ioc_sm_op);
396 bfa_ioc_timer_stop(ioc);
397 /* !!! fall through !!! */
399 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
400 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
401 if (event != IOC_E_PFFAILED)
402 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_GETATTRFAIL);
406 bfa_ioc_timer_stop(ioc);
407 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
414 bfa_sm_fault(ioc, event);
419 bfa_ioc_sm_op_entry(struct bfa_ioc_s *ioc)
421 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
423 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK);
424 bfa_ioc_event_notify(ioc, BFA_IOC_E_ENABLED);
425 bfa_ioc_hb_monitor(ioc);
426 BFA_LOG(KERN_INFO, bfad, bfa_log_level, "IOC enabled\n");
427 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_ENABLE);
431 bfa_ioc_sm_op(struct bfa_ioc_s *ioc, enum ioc_event event)
440 bfa_hb_timer_stop(ioc);
441 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
446 bfa_hb_timer_stop(ioc);
447 /* !!! fall through !!! */
449 if (ioc->iocpf.auto_recover)
450 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
452 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
454 bfa_ioc_fail_notify(ioc);
456 if (event != IOC_E_PFFAILED)
457 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
461 bfa_sm_fault(ioc, event);
467 bfa_ioc_sm_disabling_entry(struct bfa_ioc_s *ioc)
469 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
470 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_DISABLE);
471 BFA_LOG(KERN_INFO, bfad, bfa_log_level, "IOC disabled\n");
472 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_DISABLE);
476 * IOC is being disabled
479 bfa_ioc_sm_disabling(struct bfa_ioc_s *ioc, enum ioc_event event)
485 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabled);
490 * No state change. Will move to disabled state
491 * after iocpf sm completes failure processing and
492 * moves to disabled state.
494 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
498 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
499 bfa_ioc_disable_comp(ioc);
503 bfa_sm_fault(ioc, event);
508 * IOC disable completion entry.
511 bfa_ioc_sm_disabled_entry(struct bfa_ioc_s *ioc)
513 bfa_ioc_disable_comp(ioc);
517 bfa_ioc_sm_disabled(struct bfa_ioc_s *ioc, enum ioc_event event)
523 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
527 ioc->cbfn->disable_cbfn(ioc->bfa);
531 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
532 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
536 bfa_sm_fault(ioc, event);
542 bfa_ioc_sm_fail_retry_entry(struct bfa_ioc_s *ioc)
548 * Hardware initialization retry.
551 bfa_ioc_sm_fail_retry(struct bfa_ioc_s *ioc, enum ioc_event event)
557 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
563 * Initialization retry failed.
565 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
566 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
567 if (event != IOC_E_PFFAILED)
568 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
572 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
573 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
580 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
584 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
585 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
589 bfa_sm_fault(ioc, event);
595 bfa_ioc_sm_fail_entry(struct bfa_ioc_s *ioc)
604 bfa_ioc_sm_fail(struct bfa_ioc_s *ioc, enum ioc_event event)
611 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
615 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
619 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
620 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
626 * HB failure / HW error notification, ignore.
630 bfa_sm_fault(ioc, event);
635 bfa_ioc_sm_hwfail_entry(struct bfa_ioc_s *ioc)
641 bfa_ioc_sm_hwfail(struct bfa_ioc_s *ioc, enum ioc_event event)
647 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
651 ioc->cbfn->disable_cbfn(ioc->bfa);
655 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
659 /* Ignore - already in hwfail state */
663 bfa_sm_fault(ioc, event);
668 * IOCPF State Machine
672 * Reset entry actions -- initialize state machine
675 bfa_iocpf_sm_reset_entry(struct bfa_iocpf_s *iocpf)
677 iocpf->fw_mismatch_notified = BFA_FALSE;
678 iocpf->auto_recover = bfa_auto_recover;
682 * Beginning state. IOC is in reset state.
685 bfa_iocpf_sm_reset(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
687 struct bfa_ioc_s *ioc = iocpf->ioc;
693 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
700 bfa_sm_fault(ioc, event);
705 * Semaphore should be acquired for version check.
708 bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf_s *iocpf)
710 struct bfi_ioc_image_hdr_s fwhdr;
711 u32 r32, fwstate, pgnum, pgoff, loff = 0;
715 * Spin on init semaphore to serialize.
717 r32 = readl(iocpf->ioc->ioc_regs.ioc_init_sem_reg);
720 r32 = readl(iocpf->ioc->ioc_regs.ioc_init_sem_reg);
724 fwstate = bfa_ioc_get_cur_ioc_fwstate(iocpf->ioc);
725 if (fwstate == BFI_IOC_UNINIT) {
726 writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
730 bfa_ioc_fwver_get(iocpf->ioc, &fwhdr);
732 if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) {
733 writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
740 pgnum = PSS_SMEM_PGNUM(iocpf->ioc->ioc_regs.smem_pg0, loff);
741 pgoff = PSS_SMEM_PGOFF(loff);
742 writel(pgnum, iocpf->ioc->ioc_regs.host_page_num_fn);
744 for (i = 0; i < sizeof(struct bfi_ioc_image_hdr_s) / sizeof(u32); i++) {
745 bfa_mem_write(iocpf->ioc->ioc_regs.smem_page_start, loff, 0);
749 bfa_trc(iocpf->ioc, fwstate);
750 bfa_trc(iocpf->ioc, swab32(fwhdr.exec));
751 bfa_ioc_set_cur_ioc_fwstate(iocpf->ioc, BFI_IOC_UNINIT);
752 bfa_ioc_set_alt_ioc_fwstate(iocpf->ioc, BFI_IOC_UNINIT);
755 * Unlock the hw semaphore. Should be here only once per boot.
757 bfa_ioc_ownership_reset(iocpf->ioc);
760 * unlock init semaphore.
762 writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
765 bfa_ioc_hw_sem_get(iocpf->ioc);
769 * Awaiting h/w semaphore to continue with version check.
772 bfa_iocpf_sm_fwcheck(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
774 struct bfa_ioc_s *ioc = iocpf->ioc;
779 case IOCPF_E_SEMLOCKED:
780 if (bfa_ioc_firmware_lock(ioc)) {
781 if (bfa_ioc_sync_start(ioc)) {
782 bfa_ioc_sync_join(ioc);
783 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
785 bfa_ioc_firmware_unlock(ioc);
786 writel(1, ioc->ioc_regs.ioc_sem_reg);
787 bfa_sem_timer_start(ioc);
790 writel(1, ioc->ioc_regs.ioc_sem_reg);
791 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_mismatch);
795 case IOCPF_E_SEM_ERROR:
796 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
797 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
800 case IOCPF_E_DISABLE:
801 bfa_sem_timer_stop(ioc);
802 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
803 bfa_fsm_send_event(ioc, IOC_E_DISABLED);
807 bfa_sem_timer_stop(ioc);
808 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
812 bfa_sm_fault(ioc, event);
817 * Notify enable completion callback.
820 bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf_s *iocpf)
823 * Call only the first time sm enters fwmismatch state.
825 if (iocpf->fw_mismatch_notified == BFA_FALSE)
826 bfa_ioc_pf_fwmismatch(iocpf->ioc);
828 iocpf->fw_mismatch_notified = BFA_TRUE;
829 bfa_iocpf_timer_start(iocpf->ioc);
833 * Awaiting firmware version match.
836 bfa_iocpf_sm_mismatch(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
838 struct bfa_ioc_s *ioc = iocpf->ioc;
843 case IOCPF_E_TIMEOUT:
844 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
847 case IOCPF_E_DISABLE:
848 bfa_iocpf_timer_stop(ioc);
849 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
850 bfa_fsm_send_event(ioc, IOC_E_DISABLED);
854 bfa_iocpf_timer_stop(ioc);
855 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
859 bfa_sm_fault(ioc, event);
864 * Request for semaphore.
867 bfa_iocpf_sm_semwait_entry(struct bfa_iocpf_s *iocpf)
869 bfa_ioc_hw_sem_get(iocpf->ioc);
873 * Awaiting semaphore for h/w initialzation.
876 bfa_iocpf_sm_semwait(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
878 struct bfa_ioc_s *ioc = iocpf->ioc;
883 case IOCPF_E_SEMLOCKED:
884 if (bfa_ioc_sync_complete(ioc)) {
885 bfa_ioc_sync_join(ioc);
886 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
888 writel(1, ioc->ioc_regs.ioc_sem_reg);
889 bfa_sem_timer_start(ioc);
893 case IOCPF_E_SEM_ERROR:
894 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
895 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
898 case IOCPF_E_DISABLE:
899 bfa_sem_timer_stop(ioc);
900 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
904 bfa_sm_fault(ioc, event);
909 bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf_s *iocpf)
911 iocpf->poll_time = 0;
912 bfa_ioc_hwinit(iocpf->ioc, BFA_FALSE);
916 * Hardware is being initialized. Interrupts are enabled.
917 * Holding hardware semaphore lock.
920 bfa_iocpf_sm_hwinit(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
922 struct bfa_ioc_s *ioc = iocpf->ioc;
927 case IOCPF_E_FWREADY:
928 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_enabling);
931 case IOCPF_E_TIMEOUT:
932 writel(1, ioc->ioc_regs.ioc_sem_reg);
933 bfa_fsm_send_event(ioc, IOC_E_PFFAILED);
934 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
937 case IOCPF_E_DISABLE:
938 bfa_iocpf_timer_stop(ioc);
939 bfa_ioc_sync_leave(ioc);
940 writel(1, ioc->ioc_regs.ioc_sem_reg);
941 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
945 bfa_sm_fault(ioc, event);
950 bfa_iocpf_sm_enabling_entry(struct bfa_iocpf_s *iocpf)
952 bfa_iocpf_timer_start(iocpf->ioc);
954 * Enable Interrupts before sending fw IOC ENABLE cmd.
956 iocpf->ioc->cbfn->reset_cbfn(iocpf->ioc->bfa);
957 bfa_ioc_send_enable(iocpf->ioc);
961 * Host IOC function is being enabled, awaiting response from firmware.
962 * Semaphore is acquired.
965 bfa_iocpf_sm_enabling(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
967 struct bfa_ioc_s *ioc = iocpf->ioc;
972 case IOCPF_E_FWRSP_ENABLE:
973 bfa_iocpf_timer_stop(ioc);
974 writel(1, ioc->ioc_regs.ioc_sem_reg);
975 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_ready);
978 case IOCPF_E_INITFAIL:
979 bfa_iocpf_timer_stop(ioc);
981 * !!! fall through !!!
984 case IOCPF_E_TIMEOUT:
985 writel(1, ioc->ioc_regs.ioc_sem_reg);
986 if (event == IOCPF_E_TIMEOUT)
987 bfa_fsm_send_event(ioc, IOC_E_PFFAILED);
988 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
991 case IOCPF_E_DISABLE:
992 bfa_iocpf_timer_stop(ioc);
993 writel(1, ioc->ioc_regs.ioc_sem_reg);
994 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
998 bfa_sm_fault(ioc, event);
1003 bfa_iocpf_sm_ready_entry(struct bfa_iocpf_s *iocpf)
1005 bfa_fsm_send_event(iocpf->ioc, IOC_E_ENABLED);
1009 bfa_iocpf_sm_ready(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1011 struct bfa_ioc_s *ioc = iocpf->ioc;
1013 bfa_trc(ioc, event);
1016 case IOCPF_E_DISABLE:
1017 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
1020 case IOCPF_E_GETATTRFAIL:
1021 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
1025 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
1029 bfa_sm_fault(ioc, event);
1034 bfa_iocpf_sm_disabling_entry(struct bfa_iocpf_s *iocpf)
1036 bfa_iocpf_timer_start(iocpf->ioc);
1037 bfa_ioc_send_disable(iocpf->ioc);
1041 * IOC is being disabled
1044 bfa_iocpf_sm_disabling(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1046 struct bfa_ioc_s *ioc = iocpf->ioc;
1048 bfa_trc(ioc, event);
1051 case IOCPF_E_FWRSP_DISABLE:
1052 bfa_iocpf_timer_stop(ioc);
1053 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1057 bfa_iocpf_timer_stop(ioc);
1059 * !!! fall through !!!
1062 case IOCPF_E_TIMEOUT:
1063 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
1064 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1067 case IOCPF_E_FWRSP_ENABLE:
1071 bfa_sm_fault(ioc, event);
1076 bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf_s *iocpf)
1078 bfa_ioc_hw_sem_get(iocpf->ioc);
1082 * IOC hb ack request is being removed.
1085 bfa_iocpf_sm_disabling_sync(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1087 struct bfa_ioc_s *ioc = iocpf->ioc;
1089 bfa_trc(ioc, event);
1092 case IOCPF_E_SEMLOCKED:
1093 bfa_ioc_sync_leave(ioc);
1094 writel(1, ioc->ioc_regs.ioc_sem_reg);
1095 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1098 case IOCPF_E_SEM_ERROR:
1099 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1100 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
1107 bfa_sm_fault(ioc, event);
1112 * IOC disable completion entry.
1115 bfa_iocpf_sm_disabled_entry(struct bfa_iocpf_s *iocpf)
1117 bfa_ioc_mbox_flush(iocpf->ioc);
1118 bfa_fsm_send_event(iocpf->ioc, IOC_E_DISABLED);
1122 bfa_iocpf_sm_disabled(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1124 struct bfa_ioc_s *ioc = iocpf->ioc;
1126 bfa_trc(ioc, event);
1129 case IOCPF_E_ENABLE:
1130 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
1134 bfa_ioc_firmware_unlock(ioc);
1135 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1139 bfa_sm_fault(ioc, event);
1144 bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf_s *iocpf)
1146 bfa_ioc_debug_save_ftrc(iocpf->ioc);
1147 bfa_ioc_hw_sem_get(iocpf->ioc);
1151 * Hardware initialization failed.
1154 bfa_iocpf_sm_initfail_sync(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1156 struct bfa_ioc_s *ioc = iocpf->ioc;
1158 bfa_trc(ioc, event);
1161 case IOCPF_E_SEMLOCKED:
1162 bfa_ioc_notify_fail(ioc);
1163 bfa_ioc_sync_leave(ioc);
1164 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
1165 writel(1, ioc->ioc_regs.ioc_sem_reg);
1166 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail);
1169 case IOCPF_E_SEM_ERROR:
1170 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1171 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
1174 case IOCPF_E_DISABLE:
1175 bfa_sem_timer_stop(ioc);
1176 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1180 bfa_sem_timer_stop(ioc);
1181 bfa_ioc_firmware_unlock(ioc);
1182 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1189 bfa_sm_fault(ioc, event);
1194 bfa_iocpf_sm_initfail_entry(struct bfa_iocpf_s *iocpf)
1196 bfa_trc(iocpf->ioc, 0);
1200 * Hardware initialization failed.
1203 bfa_iocpf_sm_initfail(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1205 struct bfa_ioc_s *ioc = iocpf->ioc;
1207 bfa_trc(ioc, event);
1210 case IOCPF_E_DISABLE:
1211 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1215 bfa_ioc_firmware_unlock(ioc);
1216 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1220 bfa_sm_fault(ioc, event);
1225 bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf_s *iocpf)
1228 * Mark IOC as failed in hardware and stop firmware.
1230 bfa_ioc_lpu_stop(iocpf->ioc);
1233 * Flush any queued up mailbox requests.
1235 bfa_ioc_mbox_flush(iocpf->ioc);
1237 bfa_ioc_hw_sem_get(iocpf->ioc);
1241 bfa_iocpf_sm_fail_sync(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1243 struct bfa_ioc_s *ioc = iocpf->ioc;
1245 bfa_trc(ioc, event);
1248 case IOCPF_E_SEMLOCKED:
1249 bfa_ioc_sync_ack(ioc);
1250 bfa_ioc_notify_fail(ioc);
1251 if (!iocpf->auto_recover) {
1252 bfa_ioc_sync_leave(ioc);
1253 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
1254 writel(1, ioc->ioc_regs.ioc_sem_reg);
1255 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1257 if (bfa_ioc_sync_complete(ioc))
1258 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
1260 writel(1, ioc->ioc_regs.ioc_sem_reg);
1261 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
1266 case IOCPF_E_SEM_ERROR:
1267 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1268 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
1271 case IOCPF_E_DISABLE:
1272 bfa_sem_timer_stop(ioc);
1273 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1280 bfa_sm_fault(ioc, event);
1285 bfa_iocpf_sm_fail_entry(struct bfa_iocpf_s *iocpf)
1287 bfa_trc(iocpf->ioc, 0);
1291 * IOC is in failed state.
1294 bfa_iocpf_sm_fail(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
1296 struct bfa_ioc_s *ioc = iocpf->ioc;
1298 bfa_trc(ioc, event);
1301 case IOCPF_E_DISABLE:
1302 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1306 bfa_sm_fault(ioc, event);
1311 * BFA IOC private functions
1315 * Notify common modules registered for notification.
1318 bfa_ioc_event_notify(struct bfa_ioc_s *ioc, enum bfa_ioc_event_e event)
1320 struct bfa_ioc_notify_s *notify;
1321 struct list_head *qe;
1323 list_for_each(qe, &ioc->notify_q) {
1324 notify = (struct bfa_ioc_notify_s *)qe;
1325 notify->cbfn(notify->cbarg, event);
1330 bfa_ioc_disable_comp(struct bfa_ioc_s *ioc)
1332 ioc->cbfn->disable_cbfn(ioc->bfa);
1333 bfa_ioc_event_notify(ioc, BFA_IOC_E_DISABLED);
1337 bfa_ioc_sem_get(void __iomem *sem_reg)
1341 #define BFA_SEM_SPINCNT 3000
1343 r32 = readl(sem_reg);
1345 while ((r32 & 1) && (cnt < BFA_SEM_SPINCNT)) {
1348 r32 = readl(sem_reg);
1358 bfa_ioc_hw_sem_get(struct bfa_ioc_s *ioc)
1363 * First read to the semaphore register will return 0, subsequent reads
1364 * will return 1. Semaphore is released by writing 1 to the register
1366 r32 = readl(ioc->ioc_regs.ioc_sem_reg);
1369 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEM_ERROR);
1373 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED);
1377 bfa_sem_timer_start(ioc);
1381 * Initialize LPU local memory (aka secondary memory / SRAM)
1384 bfa_ioc_lmem_init(struct bfa_ioc_s *ioc)
1388 #define PSS_LMEM_INIT_TIME 10000
1390 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1391 pss_ctl &= ~__PSS_LMEM_RESET;
1392 pss_ctl |= __PSS_LMEM_INIT_EN;
1395 * i2c workaround 12.5khz clock
1397 pss_ctl |= __PSS_I2C_CLK_DIV(3UL);
1398 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1401 * wait for memory initialization to be complete
1405 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1407 } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME));
1410 * If memory initialization is not successful, IOC timeout will catch
1413 WARN_ON(!(pss_ctl & __PSS_LMEM_INIT_DONE));
1414 bfa_trc(ioc, pss_ctl);
1416 pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN);
1417 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1421 bfa_ioc_lpu_start(struct bfa_ioc_s *ioc)
1426 * Take processor out of reset.
1428 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1429 pss_ctl &= ~__PSS_LPU0_RESET;
1431 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1435 bfa_ioc_lpu_stop(struct bfa_ioc_s *ioc)
1440 * Put processors in reset.
1442 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1443 pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET);
1445 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1449 * Get driver and firmware versions.
1452 bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, struct bfi_ioc_image_hdr_s *fwhdr)
1457 u32 *fwsig = (u32 *) fwhdr;
1459 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1460 pgoff = PSS_SMEM_PGOFF(loff);
1461 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1463 for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr_s) / sizeof(u32));
1466 bfa_mem_read(ioc->ioc_regs.smem_page_start, loff);
1467 loff += sizeof(u32);
1472 * Returns TRUE if driver is willing to work with current smem f/w version.
1475 bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc,
1476 struct bfi_ioc_image_hdr_s *smem_fwhdr)
1478 struct bfi_ioc_image_hdr_s *drv_fwhdr;
1479 enum bfi_ioc_img_ver_cmp_e smem_flash_cmp, drv_smem_cmp;
1481 drv_fwhdr = (struct bfi_ioc_image_hdr_s *)
1482 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0);
1485 * If smem is incompatible or old, driver should not work with it.
1487 drv_smem_cmp = bfa_ioc_fw_ver_patch_cmp(drv_fwhdr, smem_fwhdr);
1488 if (drv_smem_cmp == BFI_IOC_IMG_VER_INCOMP ||
1489 drv_smem_cmp == BFI_IOC_IMG_VER_OLD) {
1494 * IF Flash has a better F/W than smem do not work with smem.
1495 * If smem f/w == flash f/w, as smem f/w not old | incmp, work with it.
1496 * If Flash is old or incomp work with smem iff smem f/w == drv f/w.
1498 smem_flash_cmp = bfa_ioc_flash_fwver_cmp(ioc, smem_fwhdr);
1500 if (smem_flash_cmp == BFI_IOC_IMG_VER_BETTER) {
1502 } else if (smem_flash_cmp == BFI_IOC_IMG_VER_SAME) {
1505 return (drv_smem_cmp == BFI_IOC_IMG_VER_SAME) ?
1506 BFA_TRUE : BFA_FALSE;
1511 * Return true if current running version is valid. Firmware signature and
1512 * execution context (driver/bios) must match.
1514 static bfa_boolean_t
1515 bfa_ioc_fwver_valid(struct bfa_ioc_s *ioc, u32 boot_env)
1517 struct bfi_ioc_image_hdr_s fwhdr;
1519 bfa_ioc_fwver_get(ioc, &fwhdr);
1521 if (swab32(fwhdr.bootenv) != boot_env) {
1522 bfa_trc(ioc, fwhdr.bootenv);
1523 bfa_trc(ioc, boot_env);
1527 return bfa_ioc_fwver_cmp(ioc, &fwhdr);
1530 static bfa_boolean_t
1531 bfa_ioc_fwver_md5_check(struct bfi_ioc_image_hdr_s *fwhdr_1,
1532 struct bfi_ioc_image_hdr_s *fwhdr_2)
1536 for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++)
1537 if (fwhdr_1->md5sum[i] != fwhdr_2->md5sum[i])
1544 * Returns TRUE if major minor and maintainence are same.
1545 * If patch versions are same, check for MD5 Checksum to be same.
1547 static bfa_boolean_t
1548 bfa_ioc_fw_ver_compatible(struct bfi_ioc_image_hdr_s *drv_fwhdr,
1549 struct bfi_ioc_image_hdr_s *fwhdr_to_cmp)
1551 if (drv_fwhdr->signature != fwhdr_to_cmp->signature)
1554 if (drv_fwhdr->fwver.major != fwhdr_to_cmp->fwver.major)
1557 if (drv_fwhdr->fwver.minor != fwhdr_to_cmp->fwver.minor)
1560 if (drv_fwhdr->fwver.maint != fwhdr_to_cmp->fwver.maint)
1563 if (drv_fwhdr->fwver.patch == fwhdr_to_cmp->fwver.patch &&
1564 drv_fwhdr->fwver.phase == fwhdr_to_cmp->fwver.phase &&
1565 drv_fwhdr->fwver.build == fwhdr_to_cmp->fwver.build) {
1566 return bfa_ioc_fwver_md5_check(drv_fwhdr, fwhdr_to_cmp);
1572 static bfa_boolean_t
1573 bfa_ioc_flash_fwver_valid(struct bfi_ioc_image_hdr_s *flash_fwhdr)
1575 if (flash_fwhdr->fwver.major == 0 || flash_fwhdr->fwver.major == 0xFF)
1581 static bfa_boolean_t fwhdr_is_ga(struct bfi_ioc_image_hdr_s *fwhdr)
1583 if (fwhdr->fwver.phase == 0 &&
1584 fwhdr->fwver.build == 0)
1591 * Returns TRUE if both are compatible and patch of fwhdr_to_cmp is better.
1593 static enum bfi_ioc_img_ver_cmp_e
1594 bfa_ioc_fw_ver_patch_cmp(struct bfi_ioc_image_hdr_s *base_fwhdr,
1595 struct bfi_ioc_image_hdr_s *fwhdr_to_cmp)
1597 if (bfa_ioc_fw_ver_compatible(base_fwhdr, fwhdr_to_cmp) == BFA_FALSE)
1598 return BFI_IOC_IMG_VER_INCOMP;
1600 if (fwhdr_to_cmp->fwver.patch > base_fwhdr->fwver.patch)
1601 return BFI_IOC_IMG_VER_BETTER;
1603 else if (fwhdr_to_cmp->fwver.patch < base_fwhdr->fwver.patch)
1604 return BFI_IOC_IMG_VER_OLD;
1607 * GA takes priority over internal builds of the same patch stream.
1608 * At this point major minor maint and patch numbers are same.
1611 if (fwhdr_is_ga(base_fwhdr) == BFA_TRUE) {
1612 if (fwhdr_is_ga(fwhdr_to_cmp))
1613 return BFI_IOC_IMG_VER_SAME;
1615 return BFI_IOC_IMG_VER_OLD;
1617 if (fwhdr_is_ga(fwhdr_to_cmp))
1618 return BFI_IOC_IMG_VER_BETTER;
1621 if (fwhdr_to_cmp->fwver.phase > base_fwhdr->fwver.phase)
1622 return BFI_IOC_IMG_VER_BETTER;
1623 else if (fwhdr_to_cmp->fwver.phase < base_fwhdr->fwver.phase)
1624 return BFI_IOC_IMG_VER_OLD;
1626 if (fwhdr_to_cmp->fwver.build > base_fwhdr->fwver.build)
1627 return BFI_IOC_IMG_VER_BETTER;
1628 else if (fwhdr_to_cmp->fwver.build < base_fwhdr->fwver.build)
1629 return BFI_IOC_IMG_VER_OLD;
1632 * All Version Numbers are equal.
1633 * Md5 check to be done as a part of compatibility check.
1635 return BFI_IOC_IMG_VER_SAME;
1638 #define BFA_FLASH_PART_FWIMG_ADDR 0x100000 /* fw image address */
1641 bfa_ioc_flash_img_get_chnk(struct bfa_ioc_s *ioc, u32 off,
1644 return bfa_flash_raw_read(ioc->pcidev.pci_bar_kva,
1645 BFA_FLASH_PART_FWIMG_ADDR + (off * sizeof(u32)),
1646 (char *)fwimg, BFI_FLASH_CHUNK_SZ);
1649 static enum bfi_ioc_img_ver_cmp_e
1650 bfa_ioc_flash_fwver_cmp(struct bfa_ioc_s *ioc,
1651 struct bfi_ioc_image_hdr_s *base_fwhdr)
1653 struct bfi_ioc_image_hdr_s *flash_fwhdr;
1654 bfa_status_t status;
1655 u32 fwimg[BFI_FLASH_CHUNK_SZ_WORDS];
1657 status = bfa_ioc_flash_img_get_chnk(ioc, 0, fwimg);
1658 if (status != BFA_STATUS_OK)
1659 return BFI_IOC_IMG_VER_INCOMP;
1661 flash_fwhdr = (struct bfi_ioc_image_hdr_s *) fwimg;
1662 if (bfa_ioc_flash_fwver_valid(flash_fwhdr) == BFA_TRUE)
1663 return bfa_ioc_fw_ver_patch_cmp(base_fwhdr, flash_fwhdr);
1665 return BFI_IOC_IMG_VER_INCOMP;
1670 * Invalidate fwver signature
1673 bfa_ioc_fwsig_invalidate(struct bfa_ioc_s *ioc)
1678 enum bfi_ioc_state ioc_fwstate;
1680 ioc_fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
1681 if (!bfa_ioc_state_disabled(ioc_fwstate))
1682 return BFA_STATUS_ADAPTER_ENABLED;
1684 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1685 pgoff = PSS_SMEM_PGOFF(loff);
1686 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1687 bfa_mem_write(ioc->ioc_regs.smem_page_start, loff, BFA_IOC_FW_INV_SIGN);
1689 return BFA_STATUS_OK;
1693 * Conditionally flush any pending message from firmware at start.
1696 bfa_ioc_msgflush(struct bfa_ioc_s *ioc)
1700 r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
1702 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
1706 bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force)
1708 enum bfi_ioc_state ioc_fwstate;
1709 bfa_boolean_t fwvalid;
1713 ioc_fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
1716 ioc_fwstate = BFI_IOC_UNINIT;
1718 bfa_trc(ioc, ioc_fwstate);
1720 boot_type = BFI_FWBOOT_TYPE_NORMAL;
1721 boot_env = BFI_FWBOOT_ENV_OS;
1724 * check if firmware is valid
1726 fwvalid = (ioc_fwstate == BFI_IOC_UNINIT) ?
1727 BFA_FALSE : bfa_ioc_fwver_valid(ioc, boot_env);
1730 if (bfa_ioc_boot(ioc, boot_type, boot_env) == BFA_STATUS_OK)
1731 bfa_ioc_poll_fwinit(ioc);
1736 * If hardware initialization is in progress (initialized by other IOC),
1737 * just wait for an initialization completion interrupt.
1739 if (ioc_fwstate == BFI_IOC_INITING) {
1740 bfa_ioc_poll_fwinit(ioc);
1745 * If IOC function is disabled and firmware version is same,
1746 * just re-enable IOC.
1748 * If option rom, IOC must not be in operational state. With
1749 * convergence, IOC will be in operational state when 2nd driver
1752 if (ioc_fwstate == BFI_IOC_DISABLED || ioc_fwstate == BFI_IOC_OP) {
1755 * When using MSI-X any pending firmware ready event should
1756 * be flushed. Otherwise MSI-X interrupts are not delivered.
1758 bfa_ioc_msgflush(ioc);
1759 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
1764 * Initialize the h/w for any other states.
1766 if (bfa_ioc_boot(ioc, boot_type, boot_env) == BFA_STATUS_OK)
1767 bfa_ioc_poll_fwinit(ioc);
1771 bfa_ioc_timeout(void *ioc_arg)
1773 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
1776 bfa_fsm_send_event(ioc, IOC_E_TIMEOUT);
1780 bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len)
1782 u32 *msgp = (u32 *) ioc_msg;
1785 bfa_trc(ioc, msgp[0]);
1788 WARN_ON(len > BFI_IOC_MSGLEN_MAX);
1791 * first write msg to mailbox registers
1793 for (i = 0; i < len / sizeof(u32); i++)
1794 writel(cpu_to_le32(msgp[i]),
1795 ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1797 for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++)
1798 writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1801 * write 1 to mailbox CMD to trigger LPU event
1803 writel(1, ioc->ioc_regs.hfn_mbox_cmd);
1804 (void) readl(ioc->ioc_regs.hfn_mbox_cmd);
1808 bfa_ioc_send_enable(struct bfa_ioc_s *ioc)
1810 struct bfi_ioc_ctrl_req_s enable_req;
1813 bfi_h2i_set(enable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_ENABLE_REQ,
1814 bfa_ioc_portid(ioc));
1815 enable_req.clscode = cpu_to_be16(ioc->clscode);
1816 do_gettimeofday(&tv);
1817 enable_req.tv_sec = be32_to_cpu(tv.tv_sec);
1818 bfa_ioc_mbox_send(ioc, &enable_req, sizeof(struct bfi_ioc_ctrl_req_s));
1822 bfa_ioc_send_disable(struct bfa_ioc_s *ioc)
1824 struct bfi_ioc_ctrl_req_s disable_req;
1826 bfi_h2i_set(disable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_DISABLE_REQ,
1827 bfa_ioc_portid(ioc));
1828 bfa_ioc_mbox_send(ioc, &disable_req, sizeof(struct bfi_ioc_ctrl_req_s));
1832 bfa_ioc_send_getattr(struct bfa_ioc_s *ioc)
1834 struct bfi_ioc_getattr_req_s attr_req;
1836 bfi_h2i_set(attr_req.mh, BFI_MC_IOC, BFI_IOC_H2I_GETATTR_REQ,
1837 bfa_ioc_portid(ioc));
1838 bfa_dma_be_addr_set(attr_req.attr_addr, ioc->attr_dma.pa);
1839 bfa_ioc_mbox_send(ioc, &attr_req, sizeof(attr_req));
1843 bfa_ioc_hb_check(void *cbarg)
1845 struct bfa_ioc_s *ioc = cbarg;
1848 hb_count = readl(ioc->ioc_regs.heartbeat);
1849 if (ioc->hb_count == hb_count) {
1850 bfa_ioc_recover(ioc);
1853 ioc->hb_count = hb_count;
1856 bfa_ioc_mbox_poll(ioc);
1857 bfa_hb_timer_start(ioc);
1861 bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc)
1863 ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
1864 bfa_hb_timer_start(ioc);
1868 * Initiate a full firmware download.
1871 bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type,
1881 u32 fwimg_buf[BFI_FLASH_CHUNK_SZ_WORDS];
1882 bfa_status_t status;
1884 if (boot_env == BFI_FWBOOT_ENV_OS &&
1885 boot_type == BFI_FWBOOT_TYPE_FLASH) {
1886 fwimg_size = BFI_FLASH_IMAGE_SZ/sizeof(u32);
1888 status = bfa_ioc_flash_img_get_chnk(ioc,
1889 BFA_IOC_FLASH_CHUNK_ADDR(chunkno), fwimg_buf);
1890 if (status != BFA_STATUS_OK)
1895 fwimg_size = bfa_cb_image_get_size(bfa_ioc_asic_gen(ioc));
1896 fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc),
1897 BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
1900 bfa_trc(ioc, fwimg_size);
1903 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1904 pgoff = PSS_SMEM_PGOFF(loff);
1906 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1908 for (i = 0; i < fwimg_size; i++) {
1910 if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) {
1911 chunkno = BFA_IOC_FLASH_CHUNK_NO(i);
1913 if (boot_env == BFI_FWBOOT_ENV_OS &&
1914 boot_type == BFI_FWBOOT_TYPE_FLASH) {
1915 status = bfa_ioc_flash_img_get_chnk(ioc,
1916 BFA_IOC_FLASH_CHUNK_ADDR(chunkno),
1918 if (status != BFA_STATUS_OK)
1923 fwimg = bfa_cb_image_get_chunk(
1924 bfa_ioc_asic_gen(ioc),
1925 BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
1932 bfa_mem_write(ioc->ioc_regs.smem_page_start, loff,
1933 fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)]);
1935 loff += sizeof(u32);
1938 * handle page offset wrap around
1940 loff = PSS_SMEM_PGOFF(loff);
1943 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1947 writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
1948 ioc->ioc_regs.host_page_num_fn);
1951 * Set boot type, env and device mode at the end.
1953 if (boot_env == BFI_FWBOOT_ENV_OS &&
1954 boot_type == BFI_FWBOOT_TYPE_FLASH) {
1955 boot_type = BFI_FWBOOT_TYPE_NORMAL;
1957 asicmode = BFI_FWBOOT_DEVMODE(ioc->asic_gen, ioc->asic_mode,
1958 ioc->port0_mode, ioc->port1_mode);
1959 bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_DEVMODE_OFF,
1961 bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_TYPE_OFF,
1963 bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_ENV_OFF,
1965 return BFA_STATUS_OK;
1970 * Update BFA configuration from firmware configuration.
1973 bfa_ioc_getattr_reply(struct bfa_ioc_s *ioc)
1975 struct bfi_ioc_attr_s *attr = ioc->attr;
1977 attr->adapter_prop = be32_to_cpu(attr->adapter_prop);
1978 attr->card_type = be32_to_cpu(attr->card_type);
1979 attr->maxfrsize = be16_to_cpu(attr->maxfrsize);
1980 ioc->fcmode = (attr->port_mode == BFI_PORT_MODE_FC);
1981 attr->mfg_year = be16_to_cpu(attr->mfg_year);
1983 bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR);
1987 * Attach time initialization of mbox logic.
1990 bfa_ioc_mbox_attach(struct bfa_ioc_s *ioc)
1992 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
1995 INIT_LIST_HEAD(&mod->cmd_q);
1996 for (mc = 0; mc < BFI_MC_MAX; mc++) {
1997 mod->mbhdlr[mc].cbfn = NULL;
1998 mod->mbhdlr[mc].cbarg = ioc->bfa;
2003 * Mbox poll timer -- restarts any pending mailbox requests.
2006 bfa_ioc_mbox_poll(struct bfa_ioc_s *ioc)
2008 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2009 struct bfa_mbox_cmd_s *cmd;
2013 * If no command pending, do nothing
2015 if (list_empty(&mod->cmd_q))
2019 * If previous command is not yet fetched by firmware, do nothing
2021 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
2026 * Enqueue command to firmware.
2028 bfa_q_deq(&mod->cmd_q, &cmd);
2029 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
2033 * Cleanup any pending requests.
2036 bfa_ioc_mbox_flush(struct bfa_ioc_s *ioc)
2038 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2039 struct bfa_mbox_cmd_s *cmd;
2041 while (!list_empty(&mod->cmd_q))
2042 bfa_q_deq(&mod->cmd_q, &cmd);
2046 * Read data from SMEM to host through PCI memmap
2048 * @param[in] ioc memory for IOC
2049 * @param[in] tbuf app memory to store data from smem
2050 * @param[in] soff smem offset
2051 * @param[in] sz size of smem in bytes
2054 bfa_ioc_smem_read(struct bfa_ioc_s *ioc, void *tbuf, u32 soff, u32 sz)
2061 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff);
2062 loff = PSS_SMEM_PGOFF(soff);
2063 bfa_trc(ioc, pgnum);
2068 * Hold semaphore to serialize pll init and fwtrc.
2070 if (BFA_FALSE == bfa_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg)) {
2072 return BFA_STATUS_FAILED;
2075 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2077 len = sz/sizeof(u32);
2079 for (i = 0; i < len; i++) {
2080 r32 = bfa_mem_read(ioc->ioc_regs.smem_page_start, loff);
2081 buf[i] = swab32(r32);
2082 loff += sizeof(u32);
2085 * handle page offset wrap around
2087 loff = PSS_SMEM_PGOFF(loff);
2090 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2093 writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
2094 ioc->ioc_regs.host_page_num_fn);
2096 * release semaphore.
2098 readl(ioc->ioc_regs.ioc_init_sem_reg);
2099 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
2101 bfa_trc(ioc, pgnum);
2102 return BFA_STATUS_OK;
2106 * Clear SMEM data from host through PCI memmap
2108 * @param[in] ioc memory for IOC
2109 * @param[in] soff smem offset
2110 * @param[in] sz size of smem in bytes
2113 bfa_ioc_smem_clr(struct bfa_ioc_s *ioc, u32 soff, u32 sz)
2118 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff);
2119 loff = PSS_SMEM_PGOFF(soff);
2120 bfa_trc(ioc, pgnum);
2125 * Hold semaphore to serialize pll init and fwtrc.
2127 if (BFA_FALSE == bfa_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg)) {
2129 return BFA_STATUS_FAILED;
2132 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2134 len = sz/sizeof(u32); /* len in words */
2136 for (i = 0; i < len; i++) {
2137 bfa_mem_write(ioc->ioc_regs.smem_page_start, loff, 0);
2138 loff += sizeof(u32);
2141 * handle page offset wrap around
2143 loff = PSS_SMEM_PGOFF(loff);
2146 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2149 writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
2150 ioc->ioc_regs.host_page_num_fn);
2153 * release semaphore.
2155 readl(ioc->ioc_regs.ioc_init_sem_reg);
2156 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
2157 bfa_trc(ioc, pgnum);
2158 return BFA_STATUS_OK;
2162 bfa_ioc_fail_notify(struct bfa_ioc_s *ioc)
2164 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
2167 * Notify driver and common modules registered for notification.
2169 ioc->cbfn->hbfail_cbfn(ioc->bfa);
2170 bfa_ioc_event_notify(ioc, BFA_IOC_E_FAILED);
2172 bfa_ioc_debug_save_ftrc(ioc);
2174 BFA_LOG(KERN_CRIT, bfad, bfa_log_level,
2175 "Heart Beat of IOC has failed\n");
2176 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_HBFAIL);
2181 bfa_ioc_pf_fwmismatch(struct bfa_ioc_s *ioc)
2183 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
2185 * Provide enable completion callback.
2187 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
2188 BFA_LOG(KERN_WARNING, bfad, bfa_log_level,
2189 "Running firmware version is incompatible "
2190 "with the driver version\n");
2191 bfa_ioc_aen_post(ioc, BFA_IOC_AEN_FWMISMATCH);
2195 bfa_ioc_pll_init(struct bfa_ioc_s *ioc)
2199 * Hold semaphore so that nobody can access the chip during init.
2201 bfa_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg);
2203 bfa_ioc_pll_init_asic(ioc);
2205 ioc->pllinit = BFA_TRUE;
2210 bfa_ioc_lmem_init(ioc);
2213 * release semaphore.
2215 readl(ioc->ioc_regs.ioc_init_sem_reg);
2216 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
2218 return BFA_STATUS_OK;
2222 * Interface used by diag module to do firmware boot with memory test
2223 * as the entry vector.
2226 bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env)
2228 struct bfi_ioc_image_hdr_s *drv_fwhdr;
2229 bfa_status_t status;
2230 bfa_ioc_stats(ioc, ioc_boots);
2232 if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK)
2233 return BFA_STATUS_FAILED;
2235 if (boot_env == BFI_FWBOOT_ENV_OS &&
2236 boot_type == BFI_FWBOOT_TYPE_NORMAL) {
2238 drv_fwhdr = (struct bfi_ioc_image_hdr_s *)
2239 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0);
2242 * Work with Flash iff flash f/w is better than driver f/w.
2243 * Otherwise push drivers firmware.
2245 if (bfa_ioc_flash_fwver_cmp(ioc, drv_fwhdr) ==
2246 BFI_IOC_IMG_VER_BETTER)
2247 boot_type = BFI_FWBOOT_TYPE_FLASH;
2251 * Initialize IOC state of all functions on a chip reset.
2253 if (boot_type == BFI_FWBOOT_TYPE_MEMTEST) {
2254 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_MEMTEST);
2255 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_MEMTEST);
2257 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_INITING);
2258 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_INITING);
2261 bfa_ioc_msgflush(ioc);
2262 status = bfa_ioc_download_fw(ioc, boot_type, boot_env);
2263 if (status == BFA_STATUS_OK)
2264 bfa_ioc_lpu_start(ioc);
2266 WARN_ON(boot_type == BFI_FWBOOT_TYPE_MEMTEST);
2267 bfa_iocpf_timeout(ioc);
2273 * Enable/disable IOC failure auto recovery.
2276 bfa_ioc_auto_recover(bfa_boolean_t auto_recover)
2278 bfa_auto_recover = auto_recover;
2284 bfa_ioc_is_operational(struct bfa_ioc_s *ioc)
2286 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op);
2290 bfa_ioc_is_initialized(struct bfa_ioc_s *ioc)
2292 u32 r32 = bfa_ioc_get_cur_ioc_fwstate(ioc);
2294 return ((r32 != BFI_IOC_UNINIT) &&
2295 (r32 != BFI_IOC_INITING) &&
2296 (r32 != BFI_IOC_MEMTEST));
2300 bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg)
2302 __be32 *msgp = mbmsg;
2306 r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
2313 for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32));
2315 r32 = readl(ioc->ioc_regs.lpu_mbox +
2317 msgp[i] = cpu_to_be32(r32);
2321 * turn off mailbox interrupt by clearing mailbox status
2323 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
2324 readl(ioc->ioc_regs.lpu_mbox_cmd);
2330 bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *m)
2332 union bfi_ioc_i2h_msg_u *msg;
2333 struct bfa_iocpf_s *iocpf = &ioc->iocpf;
2335 msg = (union bfi_ioc_i2h_msg_u *) m;
2337 bfa_ioc_stats(ioc, ioc_isrs);
2339 switch (msg->mh.msg_id) {
2340 case BFI_IOC_I2H_HBEAT:
2343 case BFI_IOC_I2H_ENABLE_REPLY:
2344 ioc->port_mode = ioc->port_mode_cfg =
2345 (enum bfa_mode_s)msg->fw_event.port_mode;
2346 ioc->ad_cap_bm = msg->fw_event.cap_bm;
2347 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE);
2350 case BFI_IOC_I2H_DISABLE_REPLY:
2351 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_DISABLE);
2354 case BFI_IOC_I2H_GETATTR_REPLY:
2355 bfa_ioc_getattr_reply(ioc);
2359 bfa_trc(ioc, msg->mh.msg_id);
2365 * IOC attach time initialization and setup.
2367 * @param[in] ioc memory for IOC
2368 * @param[in] bfa driver instance structure
2371 bfa_ioc_attach(struct bfa_ioc_s *ioc, void *bfa, struct bfa_ioc_cbfn_s *cbfn,
2372 struct bfa_timer_mod_s *timer_mod)
2376 ioc->timer_mod = timer_mod;
2377 ioc->fcmode = BFA_FALSE;
2378 ioc->pllinit = BFA_FALSE;
2379 ioc->dbg_fwsave_once = BFA_TRUE;
2380 ioc->iocpf.ioc = ioc;
2382 bfa_ioc_mbox_attach(ioc);
2383 INIT_LIST_HEAD(&ioc->notify_q);
2385 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
2386 bfa_fsm_send_event(ioc, IOC_E_RESET);
2390 * Driver detach time IOC cleanup.
2393 bfa_ioc_detach(struct bfa_ioc_s *ioc)
2395 bfa_fsm_send_event(ioc, IOC_E_DETACH);
2396 INIT_LIST_HEAD(&ioc->notify_q);
2400 * Setup IOC PCI properties.
2402 * @param[in] pcidev PCI device information for this IOC
2405 bfa_ioc_pci_init(struct bfa_ioc_s *ioc, struct bfa_pcidev_s *pcidev,
2406 enum bfi_pcifn_class clscode)
2408 ioc->clscode = clscode;
2409 ioc->pcidev = *pcidev;
2412 * Initialize IOC and device personality
2414 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_FC;
2415 ioc->asic_mode = BFI_ASIC_MODE_FC;
2417 switch (pcidev->device_id) {
2418 case BFA_PCI_DEVICE_ID_FC_8G1P:
2419 case BFA_PCI_DEVICE_ID_FC_8G2P:
2420 ioc->asic_gen = BFI_ASIC_GEN_CB;
2421 ioc->fcmode = BFA_TRUE;
2422 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_HBA;
2423 ioc->ad_cap_bm = BFA_CM_HBA;
2426 case BFA_PCI_DEVICE_ID_CT:
2427 ioc->asic_gen = BFI_ASIC_GEN_CT;
2428 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_ETH;
2429 ioc->asic_mode = BFI_ASIC_MODE_ETH;
2430 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_CNA;
2431 ioc->ad_cap_bm = BFA_CM_CNA;
2434 case BFA_PCI_DEVICE_ID_CT_FC:
2435 ioc->asic_gen = BFI_ASIC_GEN_CT;
2436 ioc->fcmode = BFA_TRUE;
2437 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_HBA;
2438 ioc->ad_cap_bm = BFA_CM_HBA;
2441 case BFA_PCI_DEVICE_ID_CT2:
2442 case BFA_PCI_DEVICE_ID_CT2_QUAD:
2443 ioc->asic_gen = BFI_ASIC_GEN_CT2;
2444 if (clscode == BFI_PCIFN_CLASS_FC &&
2445 pcidev->ssid == BFA_PCI_CT2_SSID_FC) {
2446 ioc->asic_mode = BFI_ASIC_MODE_FC16;
2447 ioc->fcmode = BFA_TRUE;
2448 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_HBA;
2449 ioc->ad_cap_bm = BFA_CM_HBA;
2451 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_ETH;
2452 ioc->asic_mode = BFI_ASIC_MODE_ETH;
2453 if (pcidev->ssid == BFA_PCI_CT2_SSID_FCoE) {
2455 ioc->port_mode_cfg = BFA_MODE_CNA;
2456 ioc->ad_cap_bm = BFA_CM_CNA;
2459 ioc->port_mode_cfg = BFA_MODE_NIC;
2460 ioc->ad_cap_bm = BFA_CM_NIC;
2470 * Set asic specific interfaces. See bfa_ioc_cb.c and bfa_ioc_ct.c
2472 if (ioc->asic_gen == BFI_ASIC_GEN_CB)
2473 bfa_ioc_set_cb_hwif(ioc);
2474 else if (ioc->asic_gen == BFI_ASIC_GEN_CT)
2475 bfa_ioc_set_ct_hwif(ioc);
2477 WARN_ON(ioc->asic_gen != BFI_ASIC_GEN_CT2);
2478 bfa_ioc_set_ct2_hwif(ioc);
2479 bfa_ioc_ct2_poweron(ioc);
2482 bfa_ioc_map_port(ioc);
2483 bfa_ioc_reg_init(ioc);
2487 * Initialize IOC dma memory
2489 * @param[in] dm_kva kernel virtual address of IOC dma memory
2490 * @param[in] dm_pa physical address of IOC dma memory
2493 bfa_ioc_mem_claim(struct bfa_ioc_s *ioc, u8 *dm_kva, u64 dm_pa)
2496 * dma memory for firmware attribute
2498 ioc->attr_dma.kva = dm_kva;
2499 ioc->attr_dma.pa = dm_pa;
2500 ioc->attr = (struct bfi_ioc_attr_s *) dm_kva;
2504 bfa_ioc_enable(struct bfa_ioc_s *ioc)
2506 bfa_ioc_stats(ioc, ioc_enables);
2507 ioc->dbg_fwsave_once = BFA_TRUE;
2509 bfa_fsm_send_event(ioc, IOC_E_ENABLE);
2513 bfa_ioc_disable(struct bfa_ioc_s *ioc)
2515 bfa_ioc_stats(ioc, ioc_disables);
2516 bfa_fsm_send_event(ioc, IOC_E_DISABLE);
2520 bfa_ioc_suspend(struct bfa_ioc_s *ioc)
2522 ioc->dbg_fwsave_once = BFA_TRUE;
2523 bfa_fsm_send_event(ioc, IOC_E_HWERROR);
2527 * Initialize memory for saving firmware trace. Driver must initialize
2528 * trace memory before call bfa_ioc_enable().
2531 bfa_ioc_debug_memclaim(struct bfa_ioc_s *ioc, void *dbg_fwsave)
2533 ioc->dbg_fwsave = dbg_fwsave;
2534 ioc->dbg_fwsave_len = BFA_DBG_FWTRC_LEN;
2538 * Register mailbox message handler functions
2540 * @param[in] ioc IOC instance
2541 * @param[in] mcfuncs message class handler functions
2544 bfa_ioc_mbox_register(struct bfa_ioc_s *ioc, bfa_ioc_mbox_mcfunc_t *mcfuncs)
2546 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2549 for (mc = 0; mc < BFI_MC_MAX; mc++)
2550 mod->mbhdlr[mc].cbfn = mcfuncs[mc];
2554 * Register mailbox message handler function, to be called by common modules
2557 bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
2558 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg)
2560 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2562 mod->mbhdlr[mc].cbfn = cbfn;
2563 mod->mbhdlr[mc].cbarg = cbarg;
2567 * Queue a mailbox command request to firmware. Waits if mailbox is busy.
2568 * Responsibility of caller to serialize
2570 * @param[in] ioc IOC instance
2571 * @param[i] cmd Mailbox command
2574 bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd)
2576 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2580 * If a previous command is pending, queue new command
2582 if (!list_empty(&mod->cmd_q)) {
2583 list_add_tail(&cmd->qe, &mod->cmd_q);
2588 * If mailbox is busy, queue command for poll timer
2590 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
2592 list_add_tail(&cmd->qe, &mod->cmd_q);
2597 * mailbox is free -- queue command to firmware
2599 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
2603 * Handle mailbox interrupts
2606 bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc)
2608 struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
2609 struct bfi_mbmsg_s m;
2612 if (bfa_ioc_msgget(ioc, &m)) {
2614 * Treat IOC message class as special.
2616 mc = m.mh.msg_class;
2617 if (mc == BFI_MC_IOC) {
2618 bfa_ioc_isr(ioc, &m);
2622 if ((mc >= BFI_MC_MAX) || (mod->mbhdlr[mc].cbfn == NULL))
2625 mod->mbhdlr[mc].cbfn(mod->mbhdlr[mc].cbarg, &m);
2628 bfa_ioc_lpu_read_stat(ioc);
2631 * Try to send pending mailbox commands
2633 bfa_ioc_mbox_poll(ioc);
2637 bfa_ioc_error_isr(struct bfa_ioc_s *ioc)
2639 bfa_ioc_stats(ioc, ioc_hbfails);
2640 ioc->stats.hb_count = ioc->hb_count;
2641 bfa_fsm_send_event(ioc, IOC_E_HWERROR);
2645 * return true if IOC is disabled
2648 bfa_ioc_is_disabled(struct bfa_ioc_s *ioc)
2650 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabling) ||
2651 bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled);
2655 * return true if IOC firmware is different.
2658 bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc)
2660 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_reset) ||
2661 bfa_fsm_cmp_state(&ioc->iocpf, bfa_iocpf_sm_fwcheck) ||
2662 bfa_fsm_cmp_state(&ioc->iocpf, bfa_iocpf_sm_mismatch);
2666 * Check if adapter is disabled -- both IOCs should be in a disabled
2670 bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc)
2674 if (!bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled))
2677 ioc_state = bfa_ioc_get_cur_ioc_fwstate(ioc);
2678 if (!bfa_ioc_state_disabled(ioc_state))
2681 if (ioc->pcidev.device_id != BFA_PCI_DEVICE_ID_FC_8G1P) {
2682 ioc_state = bfa_ioc_get_cur_ioc_fwstate(ioc);
2683 if (!bfa_ioc_state_disabled(ioc_state))
2691 * Reset IOC fwstate registers.
2694 bfa_ioc_reset_fwstate(struct bfa_ioc_s *ioc)
2696 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_UNINIT);
2697 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_UNINIT);
2700 #define BFA_MFG_NAME "Brocade"
2702 bfa_ioc_get_adapter_attr(struct bfa_ioc_s *ioc,
2703 struct bfa_adapter_attr_s *ad_attr)
2705 struct bfi_ioc_attr_s *ioc_attr;
2707 ioc_attr = ioc->attr;
2709 bfa_ioc_get_adapter_serial_num(ioc, ad_attr->serial_num);
2710 bfa_ioc_get_adapter_fw_ver(ioc, ad_attr->fw_ver);
2711 bfa_ioc_get_adapter_optrom_ver(ioc, ad_attr->optrom_ver);
2712 bfa_ioc_get_adapter_manufacturer(ioc, ad_attr->manufacturer);
2713 memcpy(&ad_attr->vpd, &ioc_attr->vpd,
2714 sizeof(struct bfa_mfg_vpd_s));
2716 ad_attr->nports = bfa_ioc_get_nports(ioc);
2717 ad_attr->max_speed = bfa_ioc_speed_sup(ioc);
2719 bfa_ioc_get_adapter_model(ioc, ad_attr->model);
2720 /* For now, model descr uses same model string */
2721 bfa_ioc_get_adapter_model(ioc, ad_attr->model_descr);
2723 ad_attr->card_type = ioc_attr->card_type;
2724 ad_attr->is_mezz = bfa_mfg_is_mezz(ioc_attr->card_type);
2726 if (BFI_ADAPTER_IS_SPECIAL(ioc_attr->adapter_prop))
2727 ad_attr->prototype = 1;
2729 ad_attr->prototype = 0;
2731 ad_attr->pwwn = ioc->attr->pwwn;
2732 ad_attr->mac = bfa_ioc_get_mac(ioc);
2734 ad_attr->pcie_gen = ioc_attr->pcie_gen;
2735 ad_attr->pcie_lanes = ioc_attr->pcie_lanes;
2736 ad_attr->pcie_lanes_orig = ioc_attr->pcie_lanes_orig;
2737 ad_attr->asic_rev = ioc_attr->asic_rev;
2739 bfa_ioc_get_pci_chip_rev(ioc, ad_attr->hw_ver);
2741 ad_attr->cna_capable = bfa_ioc_is_cna(ioc);
2742 ad_attr->trunk_capable = (ad_attr->nports > 1) &&
2743 !bfa_ioc_is_cna(ioc) && !ad_attr->is_mezz;
2744 ad_attr->mfg_day = ioc_attr->mfg_day;
2745 ad_attr->mfg_month = ioc_attr->mfg_month;
2746 ad_attr->mfg_year = ioc_attr->mfg_year;
2747 memcpy(ad_attr->uuid, ioc_attr->uuid, BFA_ADAPTER_UUID_LEN);
2751 bfa_ioc_get_type(struct bfa_ioc_s *ioc)
2753 if (ioc->clscode == BFI_PCIFN_CLASS_ETH)
2754 return BFA_IOC_TYPE_LL;
2756 WARN_ON(ioc->clscode != BFI_PCIFN_CLASS_FC);
2758 return (ioc->attr->port_mode == BFI_PORT_MODE_FC)
2759 ? BFA_IOC_TYPE_FC : BFA_IOC_TYPE_FCoE;
2763 bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s *ioc, char *serial_num)
2765 memset((void *)serial_num, 0, BFA_ADAPTER_SERIAL_NUM_LEN);
2766 memcpy((void *)serial_num,
2767 (void *)ioc->attr->brcd_serialnum,
2768 BFA_ADAPTER_SERIAL_NUM_LEN);
2772 bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s *ioc, char *fw_ver)
2774 memset((void *)fw_ver, 0, BFA_VERSION_LEN);
2775 memcpy(fw_ver, ioc->attr->fw_version, BFA_VERSION_LEN);
2779 bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s *ioc, char *chip_rev)
2783 memset((void *)chip_rev, 0, BFA_IOC_CHIP_REV_LEN);
2789 chip_rev[4] = ioc->attr->asic_rev;
2794 bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s *ioc, char *optrom_ver)
2796 memset((void *)optrom_ver, 0, BFA_VERSION_LEN);
2797 memcpy(optrom_ver, ioc->attr->optrom_version,
2802 bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s *ioc, char *manufacturer)
2804 memset((void *)manufacturer, 0, BFA_ADAPTER_MFG_NAME_LEN);
2805 memcpy(manufacturer, BFA_MFG_NAME, BFA_ADAPTER_MFG_NAME_LEN);
2809 bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model)
2811 struct bfi_ioc_attr_s *ioc_attr;
2812 u8 nports = bfa_ioc_get_nports(ioc);
2815 memset((void *)model, 0, BFA_ADAPTER_MODEL_NAME_LEN);
2817 ioc_attr = ioc->attr;
2819 if (bfa_asic_id_ct2(ioc->pcidev.device_id) &&
2820 (!bfa_mfg_is_mezz(ioc_attr->card_type)))
2821 snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u-%u%s",
2822 BFA_MFG_NAME, ioc_attr->card_type, nports, "p");
2824 snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u",
2825 BFA_MFG_NAME, ioc_attr->card_type);
2829 bfa_ioc_get_state(struct bfa_ioc_s *ioc)
2831 enum bfa_iocpf_state iocpf_st;
2832 enum bfa_ioc_state ioc_st = bfa_sm_to_state(ioc_sm_table, ioc->fsm);
2834 if (ioc_st == BFA_IOC_ENABLING ||
2835 ioc_st == BFA_IOC_FAIL || ioc_st == BFA_IOC_INITFAIL) {
2837 iocpf_st = bfa_sm_to_state(iocpf_sm_table, ioc->iocpf.fsm);
2840 case BFA_IOCPF_SEMWAIT:
2841 ioc_st = BFA_IOC_SEMWAIT;
2844 case BFA_IOCPF_HWINIT:
2845 ioc_st = BFA_IOC_HWINIT;
2848 case BFA_IOCPF_FWMISMATCH:
2849 ioc_st = BFA_IOC_FWMISMATCH;
2852 case BFA_IOCPF_FAIL:
2853 ioc_st = BFA_IOC_FAIL;
2856 case BFA_IOCPF_INITFAIL:
2857 ioc_st = BFA_IOC_INITFAIL;
2869 bfa_ioc_get_attr(struct bfa_ioc_s *ioc, struct bfa_ioc_attr_s *ioc_attr)
2871 memset((void *)ioc_attr, 0, sizeof(struct bfa_ioc_attr_s));
2873 ioc_attr->state = bfa_ioc_get_state(ioc);
2874 ioc_attr->port_id = bfa_ioc_portid(ioc);
2875 ioc_attr->port_mode = ioc->port_mode;
2876 ioc_attr->port_mode_cfg = ioc->port_mode_cfg;
2877 ioc_attr->cap_bm = ioc->ad_cap_bm;
2879 ioc_attr->ioc_type = bfa_ioc_get_type(ioc);
2881 bfa_ioc_get_adapter_attr(ioc, &ioc_attr->adapter_attr);
2883 ioc_attr->pci_attr.device_id = bfa_ioc_devid(ioc);
2884 ioc_attr->pci_attr.pcifn = bfa_ioc_pcifn(ioc);
2885 ioc_attr->def_fn = (bfa_ioc_pcifn(ioc) == bfa_ioc_portid(ioc));
2886 bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev);
2890 bfa_ioc_get_mac(struct bfa_ioc_s *ioc)
2893 * Check the IOC type and return the appropriate MAC
2895 if (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_FCoE)
2896 return ioc->attr->fcoe_mac;
2898 return ioc->attr->mac;
2902 bfa_ioc_get_mfg_mac(struct bfa_ioc_s *ioc)
2906 m = ioc->attr->mfg_mac;
2907 if (bfa_mfg_is_old_wwn_mac_model(ioc->attr->card_type))
2908 m.mac[MAC_ADDRLEN - 1] += bfa_ioc_pcifn(ioc);
2910 bfa_mfg_increment_wwn_mac(&(m.mac[MAC_ADDRLEN-3]),
2911 bfa_ioc_pcifn(ioc));
2917 * Send AEN notification
2920 bfa_ioc_aen_post(struct bfa_ioc_s *ioc, enum bfa_ioc_aen_event event)
2922 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
2923 struct bfa_aen_entry_s *aen_entry;
2924 enum bfa_ioc_type_e ioc_type;
2926 bfad_get_aen_entry(bfad, aen_entry);
2930 ioc_type = bfa_ioc_get_type(ioc);
2932 case BFA_IOC_TYPE_FC:
2933 aen_entry->aen_data.ioc.pwwn = ioc->attr->pwwn;
2935 case BFA_IOC_TYPE_FCoE:
2936 aen_entry->aen_data.ioc.pwwn = ioc->attr->pwwn;
2937 aen_entry->aen_data.ioc.mac = bfa_ioc_get_mac(ioc);
2939 case BFA_IOC_TYPE_LL:
2940 aen_entry->aen_data.ioc.mac = bfa_ioc_get_mac(ioc);
2943 WARN_ON(ioc_type != BFA_IOC_TYPE_FC);
2947 /* Send the AEN notification */
2948 aen_entry->aen_data.ioc.ioc_type = ioc_type;
2949 bfad_im_post_vendor_event(aen_entry, bfad, ++ioc->ioc_aen_seq,
2950 BFA_AEN_CAT_IOC, event);
2954 * Retrieve saved firmware trace from a prior IOC failure.
2957 bfa_ioc_debug_fwsave(struct bfa_ioc_s *ioc, void *trcdata, int *trclen)
2961 if (ioc->dbg_fwsave_len == 0)
2962 return BFA_STATUS_ENOFSAVE;
2965 if (tlen > ioc->dbg_fwsave_len)
2966 tlen = ioc->dbg_fwsave_len;
2968 memcpy(trcdata, ioc->dbg_fwsave, tlen);
2970 return BFA_STATUS_OK;
2975 * Retrieve saved firmware trace from a prior IOC failure.
2978 bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata, int *trclen)
2980 u32 loff = BFA_DBG_FWTRC_OFF(bfa_ioc_portid(ioc));
2982 bfa_status_t status;
2984 bfa_trc(ioc, *trclen);
2987 if (tlen > BFA_DBG_FWTRC_LEN)
2988 tlen = BFA_DBG_FWTRC_LEN;
2990 status = bfa_ioc_smem_read(ioc, trcdata, loff, tlen);
2996 bfa_ioc_send_fwsync(struct bfa_ioc_s *ioc)
2998 struct bfa_mbox_cmd_s cmd;
2999 struct bfi_ioc_ctrl_req_s *req = (struct bfi_ioc_ctrl_req_s *) cmd.msg;
3001 bfi_h2i_set(req->mh, BFI_MC_IOC, BFI_IOC_H2I_DBG_SYNC,
3002 bfa_ioc_portid(ioc));
3003 req->clscode = cpu_to_be16(ioc->clscode);
3004 bfa_ioc_mbox_queue(ioc, &cmd);
3008 bfa_ioc_fwsync(struct bfa_ioc_s *ioc)
3010 u32 fwsync_iter = 1000;
3012 bfa_ioc_send_fwsync(ioc);
3015 * After sending a fw sync mbox command wait for it to
3016 * take effect. We will not wait for a response because
3017 * 1. fw_sync mbox cmd doesn't have a response.
3018 * 2. Even if we implement that, interrupts might not
3019 * be enabled when we call this function.
3020 * So, just keep checking if any mbox cmd is pending, and
3021 * after waiting for a reasonable amount of time, go ahead.
3022 * It is possible that fw has crashed and the mbox command
3023 * is never acknowledged.
3025 while (bfa_ioc_mbox_cmd_pending(ioc) && fwsync_iter > 0)
3030 * Dump firmware smem
3033 bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf,
3034 u32 *offset, int *buflen)
3038 bfa_status_t status;
3039 u32 smem_len = BFA_IOC_FW_SMEM_SIZE(ioc);
3041 if (*offset >= smem_len) {
3042 *offset = *buflen = 0;
3043 return BFA_STATUS_EINVAL;
3050 * First smem read, sync smem before proceeding
3051 * No need to sync before reading every chunk.
3054 bfa_ioc_fwsync(ioc);
3056 if ((loff + dlen) >= smem_len)
3057 dlen = smem_len - loff;
3059 status = bfa_ioc_smem_read(ioc, buf, loff, dlen);
3061 if (status != BFA_STATUS_OK) {
3062 *offset = *buflen = 0;
3068 if (*offset >= smem_len)
3077 * Firmware statistics
3080 bfa_ioc_fw_stats_get(struct bfa_ioc_s *ioc, void *stats)
3082 u32 loff = BFI_IOC_FWSTATS_OFF + \
3083 BFI_IOC_FWSTATS_SZ * (bfa_ioc_portid(ioc));
3085 bfa_status_t status;
3087 if (ioc->stats_busy) {
3088 bfa_trc(ioc, ioc->stats_busy);
3089 return BFA_STATUS_DEVBUSY;
3091 ioc->stats_busy = BFA_TRUE;
3093 tlen = sizeof(struct bfa_fw_stats_s);
3094 status = bfa_ioc_smem_read(ioc, stats, loff, tlen);
3096 ioc->stats_busy = BFA_FALSE;
3101 bfa_ioc_fw_stats_clear(struct bfa_ioc_s *ioc)
3103 u32 loff = BFI_IOC_FWSTATS_OFF + \
3104 BFI_IOC_FWSTATS_SZ * (bfa_ioc_portid(ioc));
3106 bfa_status_t status;
3108 if (ioc->stats_busy) {
3109 bfa_trc(ioc, ioc->stats_busy);
3110 return BFA_STATUS_DEVBUSY;
3112 ioc->stats_busy = BFA_TRUE;
3114 tlen = sizeof(struct bfa_fw_stats_s);
3115 status = bfa_ioc_smem_clr(ioc, loff, tlen);
3117 ioc->stats_busy = BFA_FALSE;
3122 * Save firmware trace if configured.
3125 bfa_ioc_debug_save_ftrc(struct bfa_ioc_s *ioc)
3129 if (ioc->dbg_fwsave_once) {
3130 ioc->dbg_fwsave_once = BFA_FALSE;
3131 if (ioc->dbg_fwsave_len) {
3132 tlen = ioc->dbg_fwsave_len;
3133 bfa_ioc_debug_fwtrc(ioc, ioc->dbg_fwsave, &tlen);
3139 * Firmware failure detected. Start recovery actions.
3142 bfa_ioc_recover(struct bfa_ioc_s *ioc)
3144 bfa_ioc_stats(ioc, ioc_hbfails);
3145 ioc->stats.hb_count = ioc->hb_count;
3146 bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
3150 * BFA IOC PF private functions
3153 bfa_iocpf_timeout(void *ioc_arg)
3155 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
3158 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
3162 bfa_iocpf_sem_timeout(void *ioc_arg)
3164 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
3166 bfa_ioc_hw_sem_get(ioc);
3170 bfa_ioc_poll_fwinit(struct bfa_ioc_s *ioc)
3172 u32 fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
3174 bfa_trc(ioc, fwstate);
3176 if (fwstate == BFI_IOC_DISABLED) {
3177 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
3181 if (ioc->iocpf.poll_time >= (3 * BFA_IOC_TOV))
3182 bfa_iocpf_timeout(ioc);
3184 ioc->iocpf.poll_time += BFA_IOC_POLL_TOV;
3185 bfa_iocpf_poll_timer_start(ioc);
3190 bfa_iocpf_poll_timeout(void *ioc_arg)
3192 struct bfa_ioc_s *ioc = (struct bfa_ioc_s *) ioc_arg;
3194 bfa_ioc_poll_fwinit(ioc);
3198 * bfa timer function
3201 bfa_timer_beat(struct bfa_timer_mod_s *mod)
3203 struct list_head *qh = &mod->timer_q;
3204 struct list_head *qe, *qe_next;
3205 struct bfa_timer_s *elem;
3206 struct list_head timedout_q;
3208 INIT_LIST_HEAD(&timedout_q);
3210 qe = bfa_q_next(qh);
3213 qe_next = bfa_q_next(qe);
3215 elem = (struct bfa_timer_s *) qe;
3216 if (elem->timeout <= BFA_TIMER_FREQ) {
3218 list_del(&elem->qe);
3219 list_add_tail(&elem->qe, &timedout_q);
3221 elem->timeout -= BFA_TIMER_FREQ;
3224 qe = qe_next; /* go to next elem */
3228 * Pop all the timeout entries
3230 while (!list_empty(&timedout_q)) {
3231 bfa_q_deq(&timedout_q, &elem);
3232 elem->timercb(elem->arg);
3237 * Should be called with lock protection
3240 bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
3241 void (*timercb) (void *), void *arg, unsigned int timeout)
3244 WARN_ON(timercb == NULL);
3245 WARN_ON(bfa_q_is_on_q(&mod->timer_q, timer));
3247 timer->timeout = timeout;
3248 timer->timercb = timercb;
3251 list_add_tail(&timer->qe, &mod->timer_q);
3255 * Should be called with lock protection
3258 bfa_timer_stop(struct bfa_timer_s *timer)
3260 WARN_ON(list_empty(&timer->qe));
3262 list_del(&timer->qe);
3266 * ASIC block related
3269 bfa_ablk_config_swap(struct bfa_ablk_cfg_s *cfg)
3271 struct bfa_ablk_cfg_inst_s *cfg_inst;
3275 for (i = 0; i < BFA_ABLK_MAX; i++) {
3276 cfg_inst = &cfg->inst[i];
3277 for (j = 0; j < BFA_ABLK_MAX_PFS; j++) {
3278 be16 = cfg_inst->pf_cfg[j].pers;
3279 cfg_inst->pf_cfg[j].pers = be16_to_cpu(be16);
3280 be16 = cfg_inst->pf_cfg[j].num_qpairs;
3281 cfg_inst->pf_cfg[j].num_qpairs = be16_to_cpu(be16);
3282 be16 = cfg_inst->pf_cfg[j].num_vectors;
3283 cfg_inst->pf_cfg[j].num_vectors = be16_to_cpu(be16);
3284 be16 = cfg_inst->pf_cfg[j].bw_min;
3285 cfg_inst->pf_cfg[j].bw_min = be16_to_cpu(be16);
3286 be16 = cfg_inst->pf_cfg[j].bw_max;
3287 cfg_inst->pf_cfg[j].bw_max = be16_to_cpu(be16);
3293 bfa_ablk_isr(void *cbarg, struct bfi_mbmsg_s *msg)
3295 struct bfa_ablk_s *ablk = (struct bfa_ablk_s *)cbarg;
3296 struct bfi_ablk_i2h_rsp_s *rsp = (struct bfi_ablk_i2h_rsp_s *)msg;
3297 bfa_ablk_cbfn_t cbfn;
3299 WARN_ON(msg->mh.msg_class != BFI_MC_ABLK);
3300 bfa_trc(ablk->ioc, msg->mh.msg_id);
3302 switch (msg->mh.msg_id) {
3303 case BFI_ABLK_I2H_QUERY:
3304 if (rsp->status == BFA_STATUS_OK) {
3305 memcpy(ablk->cfg, ablk->dma_addr.kva,
3306 sizeof(struct bfa_ablk_cfg_s));
3307 bfa_ablk_config_swap(ablk->cfg);
3312 case BFI_ABLK_I2H_ADPT_CONFIG:
3313 case BFI_ABLK_I2H_PORT_CONFIG:
3314 /* update config port mode */
3315 ablk->ioc->port_mode_cfg = rsp->port_mode;
3317 case BFI_ABLK_I2H_PF_DELETE:
3318 case BFI_ABLK_I2H_PF_UPDATE:
3319 case BFI_ABLK_I2H_OPTROM_ENABLE:
3320 case BFI_ABLK_I2H_OPTROM_DISABLE:
3324 case BFI_ABLK_I2H_PF_CREATE:
3325 *(ablk->pcifn) = rsp->pcifn;
3333 ablk->busy = BFA_FALSE;
3337 cbfn(ablk->cbarg, rsp->status);
3342 bfa_ablk_notify(void *cbarg, enum bfa_ioc_event_e event)
3344 struct bfa_ablk_s *ablk = (struct bfa_ablk_s *)cbarg;
3346 bfa_trc(ablk->ioc, event);
3349 case BFA_IOC_E_ENABLED:
3350 WARN_ON(ablk->busy != BFA_FALSE);
3353 case BFA_IOC_E_DISABLED:
3354 case BFA_IOC_E_FAILED:
3355 /* Fail any pending requests */
3359 ablk->cbfn(ablk->cbarg, BFA_STATUS_FAILED);
3361 ablk->busy = BFA_FALSE;
3372 bfa_ablk_meminfo(void)
3374 return BFA_ROUNDUP(sizeof(struct bfa_ablk_cfg_s), BFA_DMA_ALIGN_SZ);
3378 bfa_ablk_memclaim(struct bfa_ablk_s *ablk, u8 *dma_kva, u64 dma_pa)
3380 ablk->dma_addr.kva = dma_kva;
3381 ablk->dma_addr.pa = dma_pa;
3385 bfa_ablk_attach(struct bfa_ablk_s *ablk, struct bfa_ioc_s *ioc)
3389 bfa_ioc_mbox_regisr(ablk->ioc, BFI_MC_ABLK, bfa_ablk_isr, ablk);
3390 bfa_q_qe_init(&ablk->ioc_notify);
3391 bfa_ioc_notify_init(&ablk->ioc_notify, bfa_ablk_notify, ablk);
3392 list_add_tail(&ablk->ioc_notify.qe, &ablk->ioc->notify_q);
3396 bfa_ablk_query(struct bfa_ablk_s *ablk, struct bfa_ablk_cfg_s *ablk_cfg,
3397 bfa_ablk_cbfn_t cbfn, void *cbarg)
3399 struct bfi_ablk_h2i_query_s *m;
3403 if (!bfa_ioc_is_operational(ablk->ioc)) {
3404 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3405 return BFA_STATUS_IOC_FAILURE;
3409 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3410 return BFA_STATUS_DEVBUSY;
3413 ablk->cfg = ablk_cfg;
3415 ablk->cbarg = cbarg;
3416 ablk->busy = BFA_TRUE;
3418 m = (struct bfi_ablk_h2i_query_s *)ablk->mb.msg;
3419 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_QUERY,
3420 bfa_ioc_portid(ablk->ioc));
3421 bfa_dma_be_addr_set(m->addr, ablk->dma_addr.pa);
3422 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3424 return BFA_STATUS_OK;
3428 bfa_ablk_pf_create(struct bfa_ablk_s *ablk, u16 *pcifn,
3429 u8 port, enum bfi_pcifn_class personality,
3430 u16 bw_min, u16 bw_max,
3431 bfa_ablk_cbfn_t cbfn, void *cbarg)
3433 struct bfi_ablk_h2i_pf_req_s *m;
3435 if (!bfa_ioc_is_operational(ablk->ioc)) {
3436 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3437 return BFA_STATUS_IOC_FAILURE;
3441 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3442 return BFA_STATUS_DEVBUSY;
3445 ablk->pcifn = pcifn;
3447 ablk->cbarg = cbarg;
3448 ablk->busy = BFA_TRUE;
3450 m = (struct bfi_ablk_h2i_pf_req_s *)ablk->mb.msg;
3451 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PF_CREATE,
3452 bfa_ioc_portid(ablk->ioc));
3453 m->pers = cpu_to_be16((u16)personality);
3454 m->bw_min = cpu_to_be16(bw_min);
3455 m->bw_max = cpu_to_be16(bw_max);
3457 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3459 return BFA_STATUS_OK;
3463 bfa_ablk_pf_delete(struct bfa_ablk_s *ablk, int pcifn,
3464 bfa_ablk_cbfn_t cbfn, void *cbarg)
3466 struct bfi_ablk_h2i_pf_req_s *m;
3468 if (!bfa_ioc_is_operational(ablk->ioc)) {
3469 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3470 return BFA_STATUS_IOC_FAILURE;
3474 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3475 return BFA_STATUS_DEVBUSY;
3479 ablk->cbarg = cbarg;
3480 ablk->busy = BFA_TRUE;
3482 m = (struct bfi_ablk_h2i_pf_req_s *)ablk->mb.msg;
3483 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PF_DELETE,
3484 bfa_ioc_portid(ablk->ioc));
3485 m->pcifn = (u8)pcifn;
3486 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3488 return BFA_STATUS_OK;
3492 bfa_ablk_adapter_config(struct bfa_ablk_s *ablk, enum bfa_mode_s mode,
3493 int max_pf, int max_vf, bfa_ablk_cbfn_t cbfn, void *cbarg)
3495 struct bfi_ablk_h2i_cfg_req_s *m;
3497 if (!bfa_ioc_is_operational(ablk->ioc)) {
3498 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3499 return BFA_STATUS_IOC_FAILURE;
3503 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3504 return BFA_STATUS_DEVBUSY;
3508 ablk->cbarg = cbarg;
3509 ablk->busy = BFA_TRUE;
3511 m = (struct bfi_ablk_h2i_cfg_req_s *)ablk->mb.msg;
3512 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_ADPT_CONFIG,
3513 bfa_ioc_portid(ablk->ioc));
3515 m->max_pf = (u8)max_pf;
3516 m->max_vf = (u8)max_vf;
3517 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3519 return BFA_STATUS_OK;
3523 bfa_ablk_port_config(struct bfa_ablk_s *ablk, int port, enum bfa_mode_s mode,
3524 int max_pf, int max_vf, bfa_ablk_cbfn_t cbfn, void *cbarg)
3526 struct bfi_ablk_h2i_cfg_req_s *m;
3528 if (!bfa_ioc_is_operational(ablk->ioc)) {
3529 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3530 return BFA_STATUS_IOC_FAILURE;
3534 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3535 return BFA_STATUS_DEVBUSY;
3539 ablk->cbarg = cbarg;
3540 ablk->busy = BFA_TRUE;
3542 m = (struct bfi_ablk_h2i_cfg_req_s *)ablk->mb.msg;
3543 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PORT_CONFIG,
3544 bfa_ioc_portid(ablk->ioc));
3547 m->max_pf = (u8)max_pf;
3548 m->max_vf = (u8)max_vf;
3549 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3551 return BFA_STATUS_OK;
3555 bfa_ablk_pf_update(struct bfa_ablk_s *ablk, int pcifn, u16 bw_min,
3556 u16 bw_max, bfa_ablk_cbfn_t cbfn, void *cbarg)
3558 struct bfi_ablk_h2i_pf_req_s *m;
3560 if (!bfa_ioc_is_operational(ablk->ioc)) {
3561 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3562 return BFA_STATUS_IOC_FAILURE;
3566 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3567 return BFA_STATUS_DEVBUSY;
3571 ablk->cbarg = cbarg;
3572 ablk->busy = BFA_TRUE;
3574 m = (struct bfi_ablk_h2i_pf_req_s *)ablk->mb.msg;
3575 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_PF_UPDATE,
3576 bfa_ioc_portid(ablk->ioc));
3577 m->pcifn = (u8)pcifn;
3578 m->bw_min = cpu_to_be16(bw_min);
3579 m->bw_max = cpu_to_be16(bw_max);
3580 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3582 return BFA_STATUS_OK;
3586 bfa_ablk_optrom_en(struct bfa_ablk_s *ablk, bfa_ablk_cbfn_t cbfn, void *cbarg)
3588 struct bfi_ablk_h2i_optrom_s *m;
3590 if (!bfa_ioc_is_operational(ablk->ioc)) {
3591 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3592 return BFA_STATUS_IOC_FAILURE;
3596 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3597 return BFA_STATUS_DEVBUSY;
3601 ablk->cbarg = cbarg;
3602 ablk->busy = BFA_TRUE;
3604 m = (struct bfi_ablk_h2i_optrom_s *)ablk->mb.msg;
3605 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_OPTROM_ENABLE,
3606 bfa_ioc_portid(ablk->ioc));
3607 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3609 return BFA_STATUS_OK;
3613 bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk, bfa_ablk_cbfn_t cbfn, void *cbarg)
3615 struct bfi_ablk_h2i_optrom_s *m;
3617 if (!bfa_ioc_is_operational(ablk->ioc)) {
3618 bfa_trc(ablk->ioc, BFA_STATUS_IOC_FAILURE);
3619 return BFA_STATUS_IOC_FAILURE;
3623 bfa_trc(ablk->ioc, BFA_STATUS_DEVBUSY);
3624 return BFA_STATUS_DEVBUSY;
3628 ablk->cbarg = cbarg;
3629 ablk->busy = BFA_TRUE;
3631 m = (struct bfi_ablk_h2i_optrom_s *)ablk->mb.msg;
3632 bfi_h2i_set(m->mh, BFI_MC_ABLK, BFI_ABLK_H2I_OPTROM_DISABLE,
3633 bfa_ioc_portid(ablk->ioc));
3634 bfa_ioc_mbox_queue(ablk->ioc, &ablk->mb);
3636 return BFA_STATUS_OK;
3640 * SFP module specific
3643 /* forward declarations */
3644 static void bfa_sfp_getdata_send(struct bfa_sfp_s *sfp);
3645 static void bfa_sfp_media_get(struct bfa_sfp_s *sfp);
3646 static bfa_status_t bfa_sfp_speed_valid(struct bfa_sfp_s *sfp,
3647 enum bfa_port_speed portspeed);
3650 bfa_cb_sfp_show(struct bfa_sfp_s *sfp)
3652 bfa_trc(sfp, sfp->lock);
3654 sfp->cbfn(sfp->cbarg, sfp->status);
3660 bfa_cb_sfp_state_query(struct bfa_sfp_s *sfp)
3662 bfa_trc(sfp, sfp->portspeed);
3664 bfa_sfp_media_get(sfp);
3665 if (sfp->state_query_cbfn)
3666 sfp->state_query_cbfn(sfp->state_query_cbarg,
3671 if (sfp->portspeed) {
3672 sfp->status = bfa_sfp_speed_valid(sfp, sfp->portspeed);
3673 if (sfp->state_query_cbfn)
3674 sfp->state_query_cbfn(sfp->state_query_cbarg,
3676 sfp->portspeed = BFA_PORT_SPEED_UNKNOWN;
3679 sfp->state_query_lock = 0;
3680 sfp->state_query_cbfn = NULL;
3684 * IOC event handler.
3687 bfa_sfp_notify(void *sfp_arg, enum bfa_ioc_event_e event)
3689 struct bfa_sfp_s *sfp = sfp_arg;
3691 bfa_trc(sfp, event);
3692 bfa_trc(sfp, sfp->lock);
3693 bfa_trc(sfp, sfp->state_query_lock);
3696 case BFA_IOC_E_DISABLED:
3697 case BFA_IOC_E_FAILED:
3699 sfp->status = BFA_STATUS_IOC_FAILURE;
3700 bfa_cb_sfp_show(sfp);
3703 if (sfp->state_query_lock) {
3704 sfp->status = BFA_STATUS_IOC_FAILURE;
3705 bfa_cb_sfp_state_query(sfp);
3715 * SFP's State Change Notification post to AEN
3718 bfa_sfp_scn_aen_post(struct bfa_sfp_s *sfp, struct bfi_sfp_scn_s *rsp)
3720 struct bfad_s *bfad = (struct bfad_s *)sfp->ioc->bfa->bfad;
3721 struct bfa_aen_entry_s *aen_entry;
3722 enum bfa_port_aen_event aen_evt = 0;
3724 bfa_trc(sfp, (((u64)rsp->pomlvl) << 16) | (((u64)rsp->sfpid) << 8) |
3727 bfad_get_aen_entry(bfad, aen_entry);
3731 aen_entry->aen_data.port.ioc_type = bfa_ioc_get_type(sfp->ioc);
3732 aen_entry->aen_data.port.pwwn = sfp->ioc->attr->pwwn;
3733 aen_entry->aen_data.port.mac = bfa_ioc_get_mac(sfp->ioc);
3735 switch (rsp->event) {
3736 case BFA_SFP_SCN_INSERTED:
3737 aen_evt = BFA_PORT_AEN_SFP_INSERT;
3739 case BFA_SFP_SCN_REMOVED:
3740 aen_evt = BFA_PORT_AEN_SFP_REMOVE;
3742 case BFA_SFP_SCN_FAILED:
3743 aen_evt = BFA_PORT_AEN_SFP_ACCESS_ERROR;
3745 case BFA_SFP_SCN_UNSUPPORT:
3746 aen_evt = BFA_PORT_AEN_SFP_UNSUPPORT;
3748 case BFA_SFP_SCN_POM:
3749 aen_evt = BFA_PORT_AEN_SFP_POM;
3750 aen_entry->aen_data.port.level = rsp->pomlvl;
3753 bfa_trc(sfp, rsp->event);
3757 /* Send the AEN notification */
3758 bfad_im_post_vendor_event(aen_entry, bfad, ++sfp->ioc->ioc_aen_seq,
3759 BFA_AEN_CAT_PORT, aen_evt);
3766 bfa_sfp_getdata_send(struct bfa_sfp_s *sfp)
3768 struct bfi_sfp_req_s *req = (struct bfi_sfp_req_s *)sfp->mbcmd.msg;
3770 bfa_trc(sfp, req->memtype);
3772 /* build host command */
3773 bfi_h2i_set(req->mh, BFI_MC_SFP, BFI_SFP_H2I_SHOW,
3774 bfa_ioc_portid(sfp->ioc));
3777 bfa_ioc_mbox_queue(sfp->ioc, &sfp->mbcmd);
3781 * SFP is valid, read sfp data
3784 bfa_sfp_getdata(struct bfa_sfp_s *sfp, enum bfi_sfp_mem_e memtype)
3786 struct bfi_sfp_req_s *req = (struct bfi_sfp_req_s *)sfp->mbcmd.msg;
3788 WARN_ON(sfp->lock != 0);
3789 bfa_trc(sfp, sfp->state);
3792 sfp->memtype = memtype;
3793 req->memtype = memtype;
3796 bfa_alen_set(&req->alen, sizeof(struct sfp_mem_s), sfp->dbuf_pa);
3798 bfa_sfp_getdata_send(sfp);
3805 bfa_sfp_scn(struct bfa_sfp_s *sfp, struct bfi_mbmsg_s *msg)
3807 struct bfi_sfp_scn_s *rsp = (struct bfi_sfp_scn_s *) msg;
3809 switch (rsp->event) {
3810 case BFA_SFP_SCN_INSERTED:
3811 sfp->state = BFA_SFP_STATE_INSERTED;
3812 sfp->data_valid = 0;
3813 bfa_sfp_scn_aen_post(sfp, rsp);
3815 case BFA_SFP_SCN_REMOVED:
3816 sfp->state = BFA_SFP_STATE_REMOVED;
3817 sfp->data_valid = 0;
3818 bfa_sfp_scn_aen_post(sfp, rsp);
3820 case BFA_SFP_SCN_FAILED:
3821 sfp->state = BFA_SFP_STATE_FAILED;
3822 sfp->data_valid = 0;
3823 bfa_sfp_scn_aen_post(sfp, rsp);
3825 case BFA_SFP_SCN_UNSUPPORT:
3826 sfp->state = BFA_SFP_STATE_UNSUPPORT;
3827 bfa_sfp_scn_aen_post(sfp, rsp);
3829 bfa_sfp_getdata(sfp, BFI_SFP_MEM_ALL);
3831 case BFA_SFP_SCN_POM:
3832 bfa_sfp_scn_aen_post(sfp, rsp);
3834 case BFA_SFP_SCN_VALID:
3835 sfp->state = BFA_SFP_STATE_VALID;
3837 bfa_sfp_getdata(sfp, BFI_SFP_MEM_ALL);
3840 bfa_trc(sfp, rsp->event);
3849 bfa_sfp_show_comp(struct bfa_sfp_s *sfp, struct bfi_mbmsg_s *msg)
3851 struct bfi_sfp_rsp_s *rsp = (struct bfi_sfp_rsp_s *) msg;
3855 * receiving response after ioc failure
3857 bfa_trc(sfp, sfp->lock);
3861 bfa_trc(sfp, rsp->status);
3862 if (rsp->status == BFA_STATUS_OK) {
3863 sfp->data_valid = 1;
3864 if (sfp->state == BFA_SFP_STATE_VALID)
3865 sfp->status = BFA_STATUS_OK;
3866 else if (sfp->state == BFA_SFP_STATE_UNSUPPORT)
3867 sfp->status = BFA_STATUS_SFP_UNSUPP;
3869 bfa_trc(sfp, sfp->state);
3871 sfp->data_valid = 0;
3872 sfp->status = rsp->status;
3873 /* sfpshow shouldn't change sfp state */
3876 bfa_trc(sfp, sfp->memtype);
3877 if (sfp->memtype == BFI_SFP_MEM_DIAGEXT) {
3878 bfa_trc(sfp, sfp->data_valid);
3879 if (sfp->data_valid) {
3880 u32 size = sizeof(struct sfp_mem_s);
3881 u8 *des = (u8 *) &(sfp->sfpmem);
3882 memcpy(des, sfp->dbuf_kva, size);
3885 * Queue completion callback.
3887 bfa_cb_sfp_show(sfp);
3891 bfa_trc(sfp, sfp->state_query_lock);
3892 if (sfp->state_query_lock) {
3893 sfp->state = rsp->state;
3894 /* Complete callback */
3895 bfa_cb_sfp_state_query(sfp);
3900 * SFP query fw sfp state
3903 bfa_sfp_state_query(struct bfa_sfp_s *sfp)
3905 struct bfi_sfp_req_s *req = (struct bfi_sfp_req_s *)sfp->mbcmd.msg;
3907 /* Should not be doing query if not in _INIT state */
3908 WARN_ON(sfp->state != BFA_SFP_STATE_INIT);
3909 WARN_ON(sfp->state_query_lock != 0);
3910 bfa_trc(sfp, sfp->state);
3912 sfp->state_query_lock = 1;
3916 bfa_sfp_getdata(sfp, BFI_SFP_MEM_ALL);
3920 bfa_sfp_media_get(struct bfa_sfp_s *sfp)
3922 enum bfa_defs_sfp_media_e *media = sfp->media;
3924 *media = BFA_SFP_MEDIA_UNKNOWN;
3926 if (sfp->state == BFA_SFP_STATE_UNSUPPORT)
3927 *media = BFA_SFP_MEDIA_UNSUPPORT;
3928 else if (sfp->state == BFA_SFP_STATE_VALID) {
3929 union sfp_xcvr_e10g_code_u e10g;
3930 struct sfp_mem_s *sfpmem = (struct sfp_mem_s *)sfp->dbuf_kva;
3931 u16 xmtr_tech = (sfpmem->srlid_base.xcvr[4] & 0x3) << 7 |
3932 (sfpmem->srlid_base.xcvr[5] >> 1);
3934 e10g.b = sfpmem->srlid_base.xcvr[0];
3935 bfa_trc(sfp, e10g.b);
3936 bfa_trc(sfp, xmtr_tech);
3937 /* check fc transmitter tech */
3938 if ((xmtr_tech & SFP_XMTR_TECH_CU) ||
3939 (xmtr_tech & SFP_XMTR_TECH_CP) ||
3940 (xmtr_tech & SFP_XMTR_TECH_CA))
3941 *media = BFA_SFP_MEDIA_CU;
3942 else if ((xmtr_tech & SFP_XMTR_TECH_EL_INTRA) ||
3943 (xmtr_tech & SFP_XMTR_TECH_EL_INTER))
3944 *media = BFA_SFP_MEDIA_EL;
3945 else if ((xmtr_tech & SFP_XMTR_TECH_LL) ||
3946 (xmtr_tech & SFP_XMTR_TECH_LC))
3947 *media = BFA_SFP_MEDIA_LW;
3948 else if ((xmtr_tech & SFP_XMTR_TECH_SL) ||
3949 (xmtr_tech & SFP_XMTR_TECH_SN) ||
3950 (xmtr_tech & SFP_XMTR_TECH_SA))
3951 *media = BFA_SFP_MEDIA_SW;
3952 /* Check 10G Ethernet Compilance code */
3953 else if (e10g.r.e10g_sr)
3954 *media = BFA_SFP_MEDIA_SW;
3955 else if (e10g.r.e10g_lrm && e10g.r.e10g_lr)
3956 *media = BFA_SFP_MEDIA_LW;
3957 else if (e10g.r.e10g_unall)
3958 *media = BFA_SFP_MEDIA_UNKNOWN;
3962 bfa_trc(sfp, sfp->state);
3966 bfa_sfp_speed_valid(struct bfa_sfp_s *sfp, enum bfa_port_speed portspeed)
3968 struct sfp_mem_s *sfpmem = (struct sfp_mem_s *)sfp->dbuf_kva;
3969 struct sfp_xcvr_s *xcvr = (struct sfp_xcvr_s *) sfpmem->srlid_base.xcvr;
3970 union sfp_xcvr_fc3_code_u fc3 = xcvr->fc3;
3971 union sfp_xcvr_e10g_code_u e10g = xcvr->e10g;
3973 if (portspeed == BFA_PORT_SPEED_10GBPS) {
3974 if (e10g.r.e10g_sr || e10g.r.e10g_lr)
3975 return BFA_STATUS_OK;
3977 bfa_trc(sfp, e10g.b);
3978 return BFA_STATUS_UNSUPP_SPEED;
3981 if (((portspeed & BFA_PORT_SPEED_16GBPS) && fc3.r.mb1600) ||
3982 ((portspeed & BFA_PORT_SPEED_8GBPS) && fc3.r.mb800) ||
3983 ((portspeed & BFA_PORT_SPEED_4GBPS) && fc3.r.mb400) ||
3984 ((portspeed & BFA_PORT_SPEED_2GBPS) && fc3.r.mb200) ||
3985 ((portspeed & BFA_PORT_SPEED_1GBPS) && fc3.r.mb100))
3986 return BFA_STATUS_OK;
3988 bfa_trc(sfp, portspeed);
3989 bfa_trc(sfp, fc3.b);
3990 bfa_trc(sfp, e10g.b);
3991 return BFA_STATUS_UNSUPP_SPEED;
3999 bfa_sfp_intr(void *sfparg, struct bfi_mbmsg_s *msg)
4001 struct bfa_sfp_s *sfp = sfparg;
4003 switch (msg->mh.msg_id) {
4004 case BFI_SFP_I2H_SHOW:
4005 bfa_sfp_show_comp(sfp, msg);
4008 case BFI_SFP_I2H_SCN:
4009 bfa_sfp_scn(sfp, msg);
4013 bfa_trc(sfp, msg->mh.msg_id);
4019 * Return DMA memory needed by sfp module.
4022 bfa_sfp_meminfo(void)
4024 return BFA_ROUNDUP(sizeof(struct sfp_mem_s), BFA_DMA_ALIGN_SZ);
4028 * Attach virtual and physical memory for SFP.
4031 bfa_sfp_attach(struct bfa_sfp_s *sfp, struct bfa_ioc_s *ioc, void *dev,
4032 struct bfa_trc_mod_s *trcmod)
4036 sfp->trcmod = trcmod;
4042 sfp->data_valid = 0;
4043 sfp->state = BFA_SFP_STATE_INIT;
4044 sfp->state_query_lock = 0;
4045 sfp->state_query_cbfn = NULL;
4046 sfp->state_query_cbarg = NULL;
4048 sfp->portspeed = BFA_PORT_SPEED_UNKNOWN;
4049 sfp->is_elb = BFA_FALSE;
4051 bfa_ioc_mbox_regisr(sfp->ioc, BFI_MC_SFP, bfa_sfp_intr, sfp);
4052 bfa_q_qe_init(&sfp->ioc_notify);
4053 bfa_ioc_notify_init(&sfp->ioc_notify, bfa_sfp_notify, sfp);
4054 list_add_tail(&sfp->ioc_notify.qe, &sfp->ioc->notify_q);
4058 * Claim Memory for SFP
4061 bfa_sfp_memclaim(struct bfa_sfp_s *sfp, u8 *dm_kva, u64 dm_pa)
4063 sfp->dbuf_kva = dm_kva;
4064 sfp->dbuf_pa = dm_pa;
4065 memset(sfp->dbuf_kva, 0, sizeof(struct sfp_mem_s));
4067 dm_kva += BFA_ROUNDUP(sizeof(struct sfp_mem_s), BFA_DMA_ALIGN_SZ);
4068 dm_pa += BFA_ROUNDUP(sizeof(struct sfp_mem_s), BFA_DMA_ALIGN_SZ);
4072 * Show SFP eeprom content
4074 * @param[in] sfp - bfa sfp module
4076 * @param[out] sfpmem - sfp eeprom data
4080 bfa_sfp_show(struct bfa_sfp_s *sfp, struct sfp_mem_s *sfpmem,
4081 bfa_cb_sfp_t cbfn, void *cbarg)
4084 if (!bfa_ioc_is_operational(sfp->ioc)) {
4086 return BFA_STATUS_IOC_NON_OP;
4091 return BFA_STATUS_DEVBUSY;
4096 sfp->sfpmem = sfpmem;
4098 bfa_sfp_getdata(sfp, BFI_SFP_MEM_DIAGEXT);
4099 return BFA_STATUS_OK;
4103 * Return SFP Media type
4105 * @param[in] sfp - bfa sfp module
4107 * @param[out] media - port speed from user
4111 bfa_sfp_media(struct bfa_sfp_s *sfp, enum bfa_defs_sfp_media_e *media,
4112 bfa_cb_sfp_t cbfn, void *cbarg)
4114 if (!bfa_ioc_is_operational(sfp->ioc)) {
4116 return BFA_STATUS_IOC_NON_OP;
4120 if (sfp->state == BFA_SFP_STATE_INIT) {
4121 if (sfp->state_query_lock) {
4123 return BFA_STATUS_DEVBUSY;
4125 sfp->state_query_cbfn = cbfn;
4126 sfp->state_query_cbarg = cbarg;
4127 bfa_sfp_state_query(sfp);
4128 return BFA_STATUS_SFP_NOT_READY;
4132 bfa_sfp_media_get(sfp);
4133 return BFA_STATUS_OK;
4137 * Check if user set port speed is allowed by the SFP
4139 * @param[in] sfp - bfa sfp module
4140 * @param[in] portspeed - port speed from user
4144 bfa_sfp_speed(struct bfa_sfp_s *sfp, enum bfa_port_speed portspeed,
4145 bfa_cb_sfp_t cbfn, void *cbarg)
4147 WARN_ON(portspeed == BFA_PORT_SPEED_UNKNOWN);
4149 if (!bfa_ioc_is_operational(sfp->ioc))
4150 return BFA_STATUS_IOC_NON_OP;
4152 /* For Mezz card, all speed is allowed */
4153 if (bfa_mfg_is_mezz(sfp->ioc->attr->card_type))
4154 return BFA_STATUS_OK;
4156 /* Check SFP state */
4157 sfp->portspeed = portspeed;
4158 if (sfp->state == BFA_SFP_STATE_INIT) {
4159 if (sfp->state_query_lock) {
4161 return BFA_STATUS_DEVBUSY;
4163 sfp->state_query_cbfn = cbfn;
4164 sfp->state_query_cbarg = cbarg;
4165 bfa_sfp_state_query(sfp);
4166 return BFA_STATUS_SFP_NOT_READY;
4170 if (sfp->state == BFA_SFP_STATE_REMOVED ||
4171 sfp->state == BFA_SFP_STATE_FAILED) {
4172 bfa_trc(sfp, sfp->state);
4173 return BFA_STATUS_NO_SFP_DEV;
4176 if (sfp->state == BFA_SFP_STATE_INSERTED) {
4177 bfa_trc(sfp, sfp->state);
4178 return BFA_STATUS_DEVBUSY; /* sfp is reading data */
4181 /* For eloopback, all speed is allowed */
4183 return BFA_STATUS_OK;
4185 return bfa_sfp_speed_valid(sfp, portspeed);
4189 * Flash module specific
4193 * FLASH DMA buffer should be big enough to hold both MFG block and
4194 * asic block(64k) at the same time and also should be 2k aligned to
4195 * avoid write segement to cross sector boundary.
4197 #define BFA_FLASH_SEG_SZ 2048
4198 #define BFA_FLASH_DMA_BUF_SZ \
4199 BFA_ROUNDUP(0x010000 + sizeof(struct bfa_mfg_block_s), BFA_FLASH_SEG_SZ)
4202 bfa_flash_aen_audit_post(struct bfa_ioc_s *ioc, enum bfa_audit_aen_event event,
4205 struct bfad_s *bfad = (struct bfad_s *)ioc->bfa->bfad;
4206 struct bfa_aen_entry_s *aen_entry;
4208 bfad_get_aen_entry(bfad, aen_entry);
4212 aen_entry->aen_data.audit.pwwn = ioc->attr->pwwn;
4213 aen_entry->aen_data.audit.partition_inst = inst;
4214 aen_entry->aen_data.audit.partition_type = type;
4216 /* Send the AEN notification */
4217 bfad_im_post_vendor_event(aen_entry, bfad, ++ioc->ioc_aen_seq,
4218 BFA_AEN_CAT_AUDIT, event);
4222 bfa_flash_cb(struct bfa_flash_s *flash)
4226 flash->cbfn(flash->cbarg, flash->status);
4230 bfa_flash_notify(void *cbarg, enum bfa_ioc_event_e event)
4232 struct bfa_flash_s *flash = cbarg;
4234 bfa_trc(flash, event);
4236 case BFA_IOC_E_DISABLED:
4237 case BFA_IOC_E_FAILED:
4238 if (flash->op_busy) {
4239 flash->status = BFA_STATUS_IOC_FAILURE;
4240 flash->cbfn(flash->cbarg, flash->status);
4251 * Send flash attribute query request.
4253 * @param[in] cbarg - callback argument
4256 bfa_flash_query_send(void *cbarg)
4258 struct bfa_flash_s *flash = cbarg;
4259 struct bfi_flash_query_req_s *msg =
4260 (struct bfi_flash_query_req_s *) flash->mb.msg;
4262 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_QUERY_REQ,
4263 bfa_ioc_portid(flash->ioc));
4264 bfa_alen_set(&msg->alen, sizeof(struct bfa_flash_attr_s),
4266 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4270 * Send flash write request.
4272 * @param[in] cbarg - callback argument
4275 bfa_flash_write_send(struct bfa_flash_s *flash)
4277 struct bfi_flash_write_req_s *msg =
4278 (struct bfi_flash_write_req_s *) flash->mb.msg;
4281 msg->type = be32_to_cpu(flash->type);
4282 msg->instance = flash->instance;
4283 msg->offset = be32_to_cpu(flash->addr_off + flash->offset);
4284 len = (flash->residue < BFA_FLASH_DMA_BUF_SZ) ?
4285 flash->residue : BFA_FLASH_DMA_BUF_SZ;
4286 msg->length = be32_to_cpu(len);
4288 /* indicate if it's the last msg of the whole write operation */
4289 msg->last = (len == flash->residue) ? 1 : 0;
4291 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_WRITE_REQ,
4292 bfa_ioc_portid(flash->ioc));
4293 bfa_alen_set(&msg->alen, len, flash->dbuf_pa);
4294 memcpy(flash->dbuf_kva, flash->ubuf + flash->offset, len);
4295 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4297 flash->residue -= len;
4298 flash->offset += len;
4302 * Send flash read request.
4304 * @param[in] cbarg - callback argument
4307 bfa_flash_read_send(void *cbarg)
4309 struct bfa_flash_s *flash = cbarg;
4310 struct bfi_flash_read_req_s *msg =
4311 (struct bfi_flash_read_req_s *) flash->mb.msg;
4314 msg->type = be32_to_cpu(flash->type);
4315 msg->instance = flash->instance;
4316 msg->offset = be32_to_cpu(flash->addr_off + flash->offset);
4317 len = (flash->residue < BFA_FLASH_DMA_BUF_SZ) ?
4318 flash->residue : BFA_FLASH_DMA_BUF_SZ;
4319 msg->length = be32_to_cpu(len);
4320 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_READ_REQ,
4321 bfa_ioc_portid(flash->ioc));
4322 bfa_alen_set(&msg->alen, len, flash->dbuf_pa);
4323 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4327 * Send flash erase request.
4329 * @param[in] cbarg - callback argument
4332 bfa_flash_erase_send(void *cbarg)
4334 struct bfa_flash_s *flash = cbarg;
4335 struct bfi_flash_erase_req_s *msg =
4336 (struct bfi_flash_erase_req_s *) flash->mb.msg;
4338 msg->type = be32_to_cpu(flash->type);
4339 msg->instance = flash->instance;
4340 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_ERASE_REQ,
4341 bfa_ioc_portid(flash->ioc));
4342 bfa_ioc_mbox_queue(flash->ioc, &flash->mb);
4346 * Process flash response messages upon receiving interrupts.
4348 * @param[in] flasharg - flash structure
4349 * @param[in] msg - message structure
4352 bfa_flash_intr(void *flasharg, struct bfi_mbmsg_s *msg)
4354 struct bfa_flash_s *flash = flasharg;
4358 struct bfi_flash_query_rsp_s *query;
4359 struct bfi_flash_erase_rsp_s *erase;
4360 struct bfi_flash_write_rsp_s *write;
4361 struct bfi_flash_read_rsp_s *read;
4362 struct bfi_flash_event_s *event;
4363 struct bfi_mbmsg_s *msg;
4367 bfa_trc(flash, msg->mh.msg_id);
4369 if (!flash->op_busy && msg->mh.msg_id != BFI_FLASH_I2H_EVENT) {
4370 /* receiving response after ioc failure */
4371 bfa_trc(flash, 0x9999);
4375 switch (msg->mh.msg_id) {
4376 case BFI_FLASH_I2H_QUERY_RSP:
4377 status = be32_to_cpu(m.query->status);
4378 bfa_trc(flash, status);
4379 if (status == BFA_STATUS_OK) {
4381 struct bfa_flash_attr_s *attr, *f;
4383 attr = (struct bfa_flash_attr_s *) flash->ubuf;
4384 f = (struct bfa_flash_attr_s *) flash->dbuf_kva;
4385 attr->status = be32_to_cpu(f->status);
4386 attr->npart = be32_to_cpu(f->npart);
4387 bfa_trc(flash, attr->status);
4388 bfa_trc(flash, attr->npart);
4389 for (i = 0; i < attr->npart; i++) {
4390 attr->part[i].part_type =
4391 be32_to_cpu(f->part[i].part_type);
4392 attr->part[i].part_instance =
4393 be32_to_cpu(f->part[i].part_instance);
4394 attr->part[i].part_off =
4395 be32_to_cpu(f->part[i].part_off);
4396 attr->part[i].part_size =
4397 be32_to_cpu(f->part[i].part_size);
4398 attr->part[i].part_len =
4399 be32_to_cpu(f->part[i].part_len);
4400 attr->part[i].part_status =
4401 be32_to_cpu(f->part[i].part_status);
4404 flash->status = status;
4405 bfa_flash_cb(flash);
4407 case BFI_FLASH_I2H_ERASE_RSP:
4408 status = be32_to_cpu(m.erase->status);
4409 bfa_trc(flash, status);
4410 flash->status = status;
4411 bfa_flash_cb(flash);
4413 case BFI_FLASH_I2H_WRITE_RSP:
4414 status = be32_to_cpu(m.write->status);
4415 bfa_trc(flash, status);
4416 if (status != BFA_STATUS_OK || flash->residue == 0) {
4417 flash->status = status;
4418 bfa_flash_cb(flash);
4420 bfa_trc(flash, flash->offset);
4421 bfa_flash_write_send(flash);
4424 case BFI_FLASH_I2H_READ_RSP:
4425 status = be32_to_cpu(m.read->status);
4426 bfa_trc(flash, status);
4427 if (status != BFA_STATUS_OK) {
4428 flash->status = status;
4429 bfa_flash_cb(flash);
4431 u32 len = be32_to_cpu(m.read->length);
4432 bfa_trc(flash, flash->offset);
4433 bfa_trc(flash, len);
4434 memcpy(flash->ubuf + flash->offset,
4435 flash->dbuf_kva, len);
4436 flash->residue -= len;
4437 flash->offset += len;
4438 if (flash->residue == 0) {
4439 flash->status = status;
4440 bfa_flash_cb(flash);
4442 bfa_flash_read_send(flash);
4445 case BFI_FLASH_I2H_BOOT_VER_RSP:
4447 case BFI_FLASH_I2H_EVENT:
4448 status = be32_to_cpu(m.event->status);
4449 bfa_trc(flash, status);
4450 if (status == BFA_STATUS_BAD_FWCFG)
4451 bfa_ioc_aen_post(flash->ioc, BFA_IOC_AEN_FWCFG_ERROR);
4452 else if (status == BFA_STATUS_INVALID_VENDOR) {
4454 param = be32_to_cpu(m.event->param);
4455 bfa_trc(flash, param);
4456 bfa_ioc_aen_post(flash->ioc,
4457 BFA_IOC_AEN_INVALID_VENDOR);
4467 * Flash memory info API.
4469 * @param[in] mincfg - minimal cfg variable
4472 bfa_flash_meminfo(bfa_boolean_t mincfg)
4474 /* min driver doesn't need flash */
4477 return BFA_ROUNDUP(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
4483 * @param[in] flash - flash structure
4484 * @param[in] ioc - ioc structure
4485 * @param[in] dev - device structure
4486 * @param[in] trcmod - trace module
4487 * @param[in] logmod - log module
4490 bfa_flash_attach(struct bfa_flash_s *flash, struct bfa_ioc_s *ioc, void *dev,
4491 struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg)
4494 flash->trcmod = trcmod;
4496 flash->cbarg = NULL;
4499 bfa_ioc_mbox_regisr(flash->ioc, BFI_MC_FLASH, bfa_flash_intr, flash);
4500 bfa_q_qe_init(&flash->ioc_notify);
4501 bfa_ioc_notify_init(&flash->ioc_notify, bfa_flash_notify, flash);
4502 list_add_tail(&flash->ioc_notify.qe, &flash->ioc->notify_q);
4504 /* min driver doesn't need flash */
4506 flash->dbuf_kva = NULL;
4512 * Claim memory for flash
4514 * @param[in] flash - flash structure
4515 * @param[in] dm_kva - pointer to virtual memory address
4516 * @param[in] dm_pa - physical memory address
4517 * @param[in] mincfg - minimal cfg variable
4520 bfa_flash_memclaim(struct bfa_flash_s *flash, u8 *dm_kva, u64 dm_pa,
4521 bfa_boolean_t mincfg)
4526 flash->dbuf_kva = dm_kva;
4527 flash->dbuf_pa = dm_pa;
4528 memset(flash->dbuf_kva, 0, BFA_FLASH_DMA_BUF_SZ);
4529 dm_kva += BFA_ROUNDUP(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
4530 dm_pa += BFA_ROUNDUP(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
4534 * Get flash attribute.
4536 * @param[in] flash - flash structure
4537 * @param[in] attr - flash attribute structure
4538 * @param[in] cbfn - callback function
4539 * @param[in] cbarg - callback argument
4544 bfa_flash_get_attr(struct bfa_flash_s *flash, struct bfa_flash_attr_s *attr,
4545 bfa_cb_flash_t cbfn, void *cbarg)
4547 bfa_trc(flash, BFI_FLASH_H2I_QUERY_REQ);
4549 if (!bfa_ioc_is_operational(flash->ioc))
4550 return BFA_STATUS_IOC_NON_OP;
4552 if (flash->op_busy) {
4553 bfa_trc(flash, flash->op_busy);
4554 return BFA_STATUS_DEVBUSY;
4559 flash->cbarg = cbarg;
4560 flash->ubuf = (u8 *) attr;
4561 bfa_flash_query_send(flash);
4563 return BFA_STATUS_OK;
4567 * Erase flash partition.
4569 * @param[in] flash - flash structure
4570 * @param[in] type - flash partition type
4571 * @param[in] instance - flash partition instance
4572 * @param[in] cbfn - callback function
4573 * @param[in] cbarg - callback argument
4578 bfa_flash_erase_part(struct bfa_flash_s *flash, enum bfa_flash_part_type type,
4579 u8 instance, bfa_cb_flash_t cbfn, void *cbarg)
4581 bfa_trc(flash, BFI_FLASH_H2I_ERASE_REQ);
4582 bfa_trc(flash, type);
4583 bfa_trc(flash, instance);
4585 if (!bfa_ioc_is_operational(flash->ioc))
4586 return BFA_STATUS_IOC_NON_OP;
4588 if (flash->op_busy) {
4589 bfa_trc(flash, flash->op_busy);
4590 return BFA_STATUS_DEVBUSY;
4595 flash->cbarg = cbarg;
4597 flash->instance = instance;
4599 bfa_flash_erase_send(flash);
4600 bfa_flash_aen_audit_post(flash->ioc, BFA_AUDIT_AEN_FLASH_ERASE,
4602 return BFA_STATUS_OK;
4606 * Update flash partition.
4608 * @param[in] flash - flash structure
4609 * @param[in] type - flash partition type
4610 * @param[in] instance - flash partition instance
4611 * @param[in] buf - update data buffer
4612 * @param[in] len - data buffer length
4613 * @param[in] offset - offset relative to the partition starting address
4614 * @param[in] cbfn - callback function
4615 * @param[in] cbarg - callback argument
4620 bfa_flash_update_part(struct bfa_flash_s *flash, enum bfa_flash_part_type type,
4621 u8 instance, void *buf, u32 len, u32 offset,
4622 bfa_cb_flash_t cbfn, void *cbarg)
4624 bfa_trc(flash, BFI_FLASH_H2I_WRITE_REQ);
4625 bfa_trc(flash, type);
4626 bfa_trc(flash, instance);
4627 bfa_trc(flash, len);
4628 bfa_trc(flash, offset);
4630 if (!bfa_ioc_is_operational(flash->ioc))
4631 return BFA_STATUS_IOC_NON_OP;
4634 * 'len' must be in word (4-byte) boundary
4635 * 'offset' must be in sector (16kb) boundary
4637 if (!len || (len & 0x03) || (offset & 0x00003FFF))
4638 return BFA_STATUS_FLASH_BAD_LEN;
4640 if (type == BFA_FLASH_PART_MFG)
4641 return BFA_STATUS_EINVAL;
4643 if (flash->op_busy) {
4644 bfa_trc(flash, flash->op_busy);
4645 return BFA_STATUS_DEVBUSY;
4650 flash->cbarg = cbarg;
4652 flash->instance = instance;
4653 flash->residue = len;
4655 flash->addr_off = offset;
4658 bfa_flash_write_send(flash);
4659 return BFA_STATUS_OK;
4663 * Read flash partition.
4665 * @param[in] flash - flash structure
4666 * @param[in] type - flash partition type
4667 * @param[in] instance - flash partition instance
4668 * @param[in] buf - read data buffer
4669 * @param[in] len - data buffer length
4670 * @param[in] offset - offset relative to the partition starting address
4671 * @param[in] cbfn - callback function
4672 * @param[in] cbarg - callback argument
4677 bfa_flash_read_part(struct bfa_flash_s *flash, enum bfa_flash_part_type type,
4678 u8 instance, void *buf, u32 len, u32 offset,
4679 bfa_cb_flash_t cbfn, void *cbarg)
4681 bfa_trc(flash, BFI_FLASH_H2I_READ_REQ);
4682 bfa_trc(flash, type);
4683 bfa_trc(flash, instance);
4684 bfa_trc(flash, len);
4685 bfa_trc(flash, offset);
4687 if (!bfa_ioc_is_operational(flash->ioc))
4688 return BFA_STATUS_IOC_NON_OP;
4691 * 'len' must be in word (4-byte) boundary
4692 * 'offset' must be in sector (16kb) boundary
4694 if (!len || (len & 0x03) || (offset & 0x00003FFF))
4695 return BFA_STATUS_FLASH_BAD_LEN;
4697 if (flash->op_busy) {
4698 bfa_trc(flash, flash->op_busy);
4699 return BFA_STATUS_DEVBUSY;
4704 flash->cbarg = cbarg;
4706 flash->instance = instance;
4707 flash->residue = len;
4709 flash->addr_off = offset;
4711 bfa_flash_read_send(flash);
4713 return BFA_STATUS_OK;
4717 * DIAG module specific
4720 #define BFA_DIAG_MEMTEST_TOV 50000 /* memtest timeout in msec */
4721 #define CT2_BFA_DIAG_MEMTEST_TOV (9*30*1000) /* 4.5 min */
4723 /* IOC event handler */
4725 bfa_diag_notify(void *diag_arg, enum bfa_ioc_event_e event)
4727 struct bfa_diag_s *diag = diag_arg;
4729 bfa_trc(diag, event);
4730 bfa_trc(diag, diag->block);
4731 bfa_trc(diag, diag->fwping.lock);
4732 bfa_trc(diag, diag->tsensor.lock);
4735 case BFA_IOC_E_DISABLED:
4736 case BFA_IOC_E_FAILED:
4737 if (diag->fwping.lock) {
4738 diag->fwping.status = BFA_STATUS_IOC_FAILURE;
4739 diag->fwping.cbfn(diag->fwping.cbarg,
4740 diag->fwping.status);
4741 diag->fwping.lock = 0;
4744 if (diag->tsensor.lock) {
4745 diag->tsensor.status = BFA_STATUS_IOC_FAILURE;
4746 diag->tsensor.cbfn(diag->tsensor.cbarg,
4747 diag->tsensor.status);
4748 diag->tsensor.lock = 0;
4752 if (diag->timer_active) {
4753 bfa_timer_stop(&diag->timer);
4754 diag->timer_active = 0;
4757 diag->status = BFA_STATUS_IOC_FAILURE;
4758 diag->cbfn(diag->cbarg, diag->status);
4769 bfa_diag_memtest_done(void *cbarg)
4771 struct bfa_diag_s *diag = cbarg;
4772 struct bfa_ioc_s *ioc = diag->ioc;
4773 struct bfa_diag_memtest_result *res = diag->result;
4774 u32 loff = BFI_BOOT_MEMTEST_RES_ADDR;
4775 u32 pgnum, pgoff, i;
4777 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
4778 pgoff = PSS_SMEM_PGOFF(loff);
4780 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
4782 for (i = 0; i < (sizeof(struct bfa_diag_memtest_result) /
4783 sizeof(u32)); i++) {
4784 /* read test result from smem */
4785 *((u32 *) res + i) =
4786 bfa_mem_read(ioc->ioc_regs.smem_page_start, loff);
4787 loff += sizeof(u32);
4790 /* Reset IOC fwstates to BFI_IOC_UNINIT */
4791 bfa_ioc_reset_fwstate(ioc);
4793 res->status = swab32(res->status);
4794 bfa_trc(diag, res->status);
4796 if (res->status == BFI_BOOT_MEMTEST_RES_SIG)
4797 diag->status = BFA_STATUS_OK;
4799 diag->status = BFA_STATUS_MEMTEST_FAILED;
4800 res->addr = swab32(res->addr);
4801 res->exp = swab32(res->exp);
4802 res->act = swab32(res->act);
4803 res->err_status = swab32(res->err_status);
4804 res->err_status1 = swab32(res->err_status1);
4805 res->err_addr = swab32(res->err_addr);
4806 bfa_trc(diag, res->addr);
4807 bfa_trc(diag, res->exp);
4808 bfa_trc(diag, res->act);
4809 bfa_trc(diag, res->err_status);
4810 bfa_trc(diag, res->err_status1);
4811 bfa_trc(diag, res->err_addr);
4813 diag->timer_active = 0;
4814 diag->cbfn(diag->cbarg, diag->status);
4823 * Perform DMA test directly
4826 diag_fwping_send(struct bfa_diag_s *diag)
4828 struct bfi_diag_fwping_req_s *fwping_req;
4831 bfa_trc(diag, diag->fwping.dbuf_pa);
4833 /* fill DMA area with pattern */
4834 for (i = 0; i < (BFI_DIAG_DMA_BUF_SZ >> 2); i++)
4835 *((u32 *)diag->fwping.dbuf_kva + i) = diag->fwping.data;
4838 fwping_req = (struct bfi_diag_fwping_req_s *)diag->fwping.mbcmd.msg;
4841 bfa_alen_set(&fwping_req->alen, BFI_DIAG_DMA_BUF_SZ,
4842 diag->fwping.dbuf_pa);
4843 /* Set up dma count */
4844 fwping_req->count = cpu_to_be32(diag->fwping.count);
4845 /* Set up data pattern */
4846 fwping_req->data = diag->fwping.data;
4848 /* build host command */
4849 bfi_h2i_set(fwping_req->mh, BFI_MC_DIAG, BFI_DIAG_H2I_FWPING,
4850 bfa_ioc_portid(diag->ioc));
4853 bfa_ioc_mbox_queue(diag->ioc, &diag->fwping.mbcmd);
4857 diag_fwping_comp(struct bfa_diag_s *diag,
4858 struct bfi_diag_fwping_rsp_s *diag_rsp)
4860 u32 rsp_data = diag_rsp->data;
4861 u8 rsp_dma_status = diag_rsp->dma_status;
4863 bfa_trc(diag, rsp_data);
4864 bfa_trc(diag, rsp_dma_status);
4866 if (rsp_dma_status == BFA_STATUS_OK) {
4868 pat = (diag->fwping.count & 0x1) ? ~(diag->fwping.data) :
4870 /* Check mbox data */
4871 if (diag->fwping.data != rsp_data) {
4872 bfa_trc(diag, rsp_data);
4873 diag->fwping.result->dmastatus =
4874 BFA_STATUS_DATACORRUPTED;
4875 diag->fwping.status = BFA_STATUS_DATACORRUPTED;
4876 diag->fwping.cbfn(diag->fwping.cbarg,
4877 diag->fwping.status);
4878 diag->fwping.lock = 0;
4881 /* Check dma pattern */
4882 for (i = 0; i < (BFI_DIAG_DMA_BUF_SZ >> 2); i++) {
4883 if (*((u32 *)diag->fwping.dbuf_kva + i) != pat) {
4887 *((u32 *)diag->fwping.dbuf_kva + i));
4888 diag->fwping.result->dmastatus =
4889 BFA_STATUS_DATACORRUPTED;
4890 diag->fwping.status = BFA_STATUS_DATACORRUPTED;
4891 diag->fwping.cbfn(diag->fwping.cbarg,
4892 diag->fwping.status);
4893 diag->fwping.lock = 0;
4897 diag->fwping.result->dmastatus = BFA_STATUS_OK;
4898 diag->fwping.status = BFA_STATUS_OK;
4899 diag->fwping.cbfn(diag->fwping.cbarg, diag->fwping.status);
4900 diag->fwping.lock = 0;
4902 diag->fwping.status = BFA_STATUS_HDMA_FAILED;
4903 diag->fwping.cbfn(diag->fwping.cbarg, diag->fwping.status);
4904 diag->fwping.lock = 0;
4909 * Temperature Sensor
4913 diag_tempsensor_send(struct bfa_diag_s *diag)
4915 struct bfi_diag_ts_req_s *msg;
4917 msg = (struct bfi_diag_ts_req_s *)diag->tsensor.mbcmd.msg;
4918 bfa_trc(diag, msg->temp);
4919 /* build host command */
4920 bfi_h2i_set(msg->mh, BFI_MC_DIAG, BFI_DIAG_H2I_TEMPSENSOR,
4921 bfa_ioc_portid(diag->ioc));
4923 bfa_ioc_mbox_queue(diag->ioc, &diag->tsensor.mbcmd);
4927 diag_tempsensor_comp(struct bfa_diag_s *diag, bfi_diag_ts_rsp_t *rsp)
4929 if (!diag->tsensor.lock) {
4930 /* receiving response after ioc failure */
4931 bfa_trc(diag, diag->tsensor.lock);
4936 * ASIC junction tempsensor is a reg read operation
4937 * it will always return OK
4939 diag->tsensor.temp->temp = be16_to_cpu(rsp->temp);
4940 diag->tsensor.temp->ts_junc = rsp->ts_junc;
4941 diag->tsensor.temp->ts_brd = rsp->ts_brd;
4944 /* tsensor.temp->status is brd_temp status */
4945 diag->tsensor.temp->status = rsp->status;
4946 if (rsp->status == BFA_STATUS_OK) {
4947 diag->tsensor.temp->brd_temp =
4948 be16_to_cpu(rsp->brd_temp);
4950 diag->tsensor.temp->brd_temp = 0;
4953 bfa_trc(diag, rsp->status);
4954 bfa_trc(diag, rsp->ts_junc);
4955 bfa_trc(diag, rsp->temp);
4956 bfa_trc(diag, rsp->ts_brd);
4957 bfa_trc(diag, rsp->brd_temp);
4959 /* tsensor status is always good bcos we always have junction temp */
4960 diag->tsensor.status = BFA_STATUS_OK;
4961 diag->tsensor.cbfn(diag->tsensor.cbarg, diag->tsensor.status);
4962 diag->tsensor.lock = 0;
4969 diag_ledtest_send(struct bfa_diag_s *diag, struct bfa_diag_ledtest_s *ledtest)
4971 struct bfi_diag_ledtest_req_s *msg;
4973 msg = (struct bfi_diag_ledtest_req_s *)diag->ledtest.mbcmd.msg;
4974 /* build host command */
4975 bfi_h2i_set(msg->mh, BFI_MC_DIAG, BFI_DIAG_H2I_LEDTEST,
4976 bfa_ioc_portid(diag->ioc));
4979 * convert the freq from N blinks per 10 sec to
4980 * crossbow ontime value. We do it here because division is need
4983 ledtest->freq = 500 / ledtest->freq;
4985 if (ledtest->freq == 0)
4988 bfa_trc(diag, ledtest->freq);
4989 /* mcpy(&ledtest_req->req, ledtest, sizeof(bfa_diag_ledtest_t)); */
4990 msg->cmd = (u8) ledtest->cmd;
4991 msg->color = (u8) ledtest->color;
4992 msg->portid = bfa_ioc_portid(diag->ioc);
4993 msg->led = ledtest->led;
4994 msg->freq = cpu_to_be16(ledtest->freq);
4997 bfa_ioc_mbox_queue(diag->ioc, &diag->ledtest.mbcmd);
5001 diag_ledtest_comp(struct bfa_diag_s *diag, struct bfi_diag_ledtest_rsp_s *msg)
5003 bfa_trc(diag, diag->ledtest.lock);
5004 diag->ledtest.lock = BFA_FALSE;
5005 /* no bfa_cb_queue is needed because driver is not waiting */
5012 diag_portbeacon_send(struct bfa_diag_s *diag, bfa_boolean_t beacon, u32 sec)
5014 struct bfi_diag_portbeacon_req_s *msg;
5016 msg = (struct bfi_diag_portbeacon_req_s *)diag->beacon.mbcmd.msg;
5017 /* build host command */
5018 bfi_h2i_set(msg->mh, BFI_MC_DIAG, BFI_DIAG_H2I_PORTBEACON,
5019 bfa_ioc_portid(diag->ioc));
5020 msg->beacon = beacon;
5021 msg->period = cpu_to_be32(sec);
5023 bfa_ioc_mbox_queue(diag->ioc, &diag->beacon.mbcmd);
5027 diag_portbeacon_comp(struct bfa_diag_s *diag)
5029 bfa_trc(diag, diag->beacon.state);
5030 diag->beacon.state = BFA_FALSE;
5031 if (diag->cbfn_beacon)
5032 diag->cbfn_beacon(diag->dev, BFA_FALSE, diag->beacon.link_e2e);
5036 * Diag hmbox handler
5039 bfa_diag_intr(void *diagarg, struct bfi_mbmsg_s *msg)
5041 struct bfa_diag_s *diag = diagarg;
5043 switch (msg->mh.msg_id) {
5044 case BFI_DIAG_I2H_PORTBEACON:
5045 diag_portbeacon_comp(diag);
5047 case BFI_DIAG_I2H_FWPING:
5048 diag_fwping_comp(diag, (struct bfi_diag_fwping_rsp_s *) msg);
5050 case BFI_DIAG_I2H_TEMPSENSOR:
5051 diag_tempsensor_comp(diag, (bfi_diag_ts_rsp_t *) msg);
5053 case BFI_DIAG_I2H_LEDTEST:
5054 diag_ledtest_comp(diag, (struct bfi_diag_ledtest_rsp_s *) msg);
5057 bfa_trc(diag, msg->mh.msg_id);
5065 * @param[in] *diag - diag data struct
5066 * @param[in] *memtest - mem test params input from upper layer,
5067 * @param[in] pattern - mem test pattern
5068 * @param[in] *result - mem test result
5069 * @param[in] cbfn - mem test callback functioin
5070 * @param[in] cbarg - callback functioin arg
5075 bfa_diag_memtest(struct bfa_diag_s *diag, struct bfa_diag_memtest_s *memtest,
5076 u32 pattern, struct bfa_diag_memtest_result *result,
5077 bfa_cb_diag_t cbfn, void *cbarg)
5081 bfa_trc(diag, pattern);
5083 if (!bfa_ioc_adapter_is_disabled(diag->ioc))
5084 return BFA_STATUS_ADAPTER_ENABLED;
5086 /* check to see if there is another destructive diag cmd running */
5088 bfa_trc(diag, diag->block);
5089 return BFA_STATUS_DEVBUSY;
5093 diag->result = result;
5095 diag->cbarg = cbarg;
5097 /* download memtest code and take LPU0 out of reset */
5098 bfa_ioc_boot(diag->ioc, BFI_FWBOOT_TYPE_MEMTEST, BFI_FWBOOT_ENV_OS);
5100 memtest_tov = (bfa_ioc_asic_gen(diag->ioc) == BFI_ASIC_GEN_CT2) ?
5101 CT2_BFA_DIAG_MEMTEST_TOV : BFA_DIAG_MEMTEST_TOV;
5102 bfa_timer_begin(diag->ioc->timer_mod, &diag->timer,
5103 bfa_diag_memtest_done, diag, memtest_tov);
5104 diag->timer_active = 1;
5105 return BFA_STATUS_OK;
5109 * DIAG firmware ping command
5111 * @param[in] *diag - diag data struct
5112 * @param[in] cnt - dma loop count for testing PCIE
5113 * @param[in] data - data pattern to pass in fw
5114 * @param[in] *result - pt to bfa_diag_fwping_result_t data struct
5115 * @param[in] cbfn - callback function
5116 * @param[in] *cbarg - callback functioin arg
5121 bfa_diag_fwping(struct bfa_diag_s *diag, u32 cnt, u32 data,
5122 struct bfa_diag_results_fwping *result, bfa_cb_diag_t cbfn,
5126 bfa_trc(diag, data);
5128 if (!bfa_ioc_is_operational(diag->ioc))
5129 return BFA_STATUS_IOC_NON_OP;
5131 if (bfa_asic_id_ct2(bfa_ioc_devid((diag->ioc))) &&
5132 ((diag->ioc)->clscode == BFI_PCIFN_CLASS_ETH))
5133 return BFA_STATUS_CMD_NOTSUPP;
5135 /* check to see if there is another destructive diag cmd running */
5136 if (diag->block || diag->fwping.lock) {
5137 bfa_trc(diag, diag->block);
5138 bfa_trc(diag, diag->fwping.lock);
5139 return BFA_STATUS_DEVBUSY;
5142 /* Initialization */
5143 diag->fwping.lock = 1;
5144 diag->fwping.cbfn = cbfn;
5145 diag->fwping.cbarg = cbarg;
5146 diag->fwping.result = result;
5147 diag->fwping.data = data;
5148 diag->fwping.count = cnt;
5150 /* Init test results */
5151 diag->fwping.result->data = 0;
5152 diag->fwping.result->status = BFA_STATUS_OK;
5154 /* kick off the first ping */
5155 diag_fwping_send(diag);
5156 return BFA_STATUS_OK;
5160 * Read Temperature Sensor
5162 * @param[in] *diag - diag data struct
5163 * @param[in] *result - pt to bfa_diag_temp_t data struct
5164 * @param[in] cbfn - callback function
5165 * @param[in] *cbarg - callback functioin arg
5170 bfa_diag_tsensor_query(struct bfa_diag_s *diag,
5171 struct bfa_diag_results_tempsensor_s *result,
5172 bfa_cb_diag_t cbfn, void *cbarg)
5174 /* check to see if there is a destructive diag cmd running */
5175 if (diag->block || diag->tsensor.lock) {
5176 bfa_trc(diag, diag->block);
5177 bfa_trc(diag, diag->tsensor.lock);
5178 return BFA_STATUS_DEVBUSY;
5181 if (!bfa_ioc_is_operational(diag->ioc))
5182 return BFA_STATUS_IOC_NON_OP;
5184 /* Init diag mod params */
5185 diag->tsensor.lock = 1;
5186 diag->tsensor.temp = result;
5187 diag->tsensor.cbfn = cbfn;
5188 diag->tsensor.cbarg = cbarg;
5189 diag->tsensor.status = BFA_STATUS_OK;
5191 /* Send msg to fw */
5192 diag_tempsensor_send(diag);
5194 return BFA_STATUS_OK;
5200 * @param[in] *diag - diag data struct
5201 * @param[in] *ledtest - pt to ledtest data structure
5206 bfa_diag_ledtest(struct bfa_diag_s *diag, struct bfa_diag_ledtest_s *ledtest)
5208 bfa_trc(diag, ledtest->cmd);
5210 if (!bfa_ioc_is_operational(diag->ioc))
5211 return BFA_STATUS_IOC_NON_OP;
5213 if (diag->beacon.state)
5214 return BFA_STATUS_BEACON_ON;
5216 if (diag->ledtest.lock)
5217 return BFA_STATUS_LEDTEST_OP;
5219 /* Send msg to fw */
5220 diag->ledtest.lock = BFA_TRUE;
5221 diag_ledtest_send(diag, ledtest);
5223 return BFA_STATUS_OK;
5227 * Port beaconing command
5229 * @param[in] *diag - diag data struct
5230 * @param[in] beacon - port beaconing 1:ON 0:OFF
5231 * @param[in] link_e2e_beacon - link beaconing 1:ON 0:OFF
5232 * @param[in] sec - beaconing duration in seconds
5237 bfa_diag_beacon_port(struct bfa_diag_s *diag, bfa_boolean_t beacon,
5238 bfa_boolean_t link_e2e_beacon, uint32_t sec)
5240 bfa_trc(diag, beacon);
5241 bfa_trc(diag, link_e2e_beacon);
5244 if (!bfa_ioc_is_operational(diag->ioc))
5245 return BFA_STATUS_IOC_NON_OP;
5247 if (diag->ledtest.lock)
5248 return BFA_STATUS_LEDTEST_OP;
5250 if (diag->beacon.state && beacon) /* beacon alread on */
5251 return BFA_STATUS_BEACON_ON;
5253 diag->beacon.state = beacon;
5254 diag->beacon.link_e2e = link_e2e_beacon;
5255 if (diag->cbfn_beacon)
5256 diag->cbfn_beacon(diag->dev, beacon, link_e2e_beacon);
5258 /* Send msg to fw */
5259 diag_portbeacon_send(diag, beacon, sec);
5261 return BFA_STATUS_OK;
5265 * Return DMA memory needed by diag module.
5268 bfa_diag_meminfo(void)
5270 return BFA_ROUNDUP(BFI_DIAG_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5274 * Attach virtual and physical memory for Diag.
5277 bfa_diag_attach(struct bfa_diag_s *diag, struct bfa_ioc_s *ioc, void *dev,
5278 bfa_cb_diag_beacon_t cbfn_beacon, struct bfa_trc_mod_s *trcmod)
5282 diag->trcmod = trcmod;
5287 diag->result = NULL;
5288 diag->cbfn_beacon = cbfn_beacon;
5290 bfa_ioc_mbox_regisr(diag->ioc, BFI_MC_DIAG, bfa_diag_intr, diag);
5291 bfa_q_qe_init(&diag->ioc_notify);
5292 bfa_ioc_notify_init(&diag->ioc_notify, bfa_diag_notify, diag);
5293 list_add_tail(&diag->ioc_notify.qe, &diag->ioc->notify_q);
5297 bfa_diag_memclaim(struct bfa_diag_s *diag, u8 *dm_kva, u64 dm_pa)
5299 diag->fwping.dbuf_kva = dm_kva;
5300 diag->fwping.dbuf_pa = dm_pa;
5301 memset(diag->fwping.dbuf_kva, 0, BFI_DIAG_DMA_BUF_SZ);
5305 * PHY module specific
5307 #define BFA_PHY_DMA_BUF_SZ 0x02000 /* 8k dma buffer */
5308 #define BFA_PHY_LOCK_STATUS 0x018878 /* phy semaphore status reg */
5311 bfa_phy_ntoh32(u32 *obuf, u32 *ibuf, int sz)
5315 for (i = 0; i < m; i++)
5316 obuf[i] = be32_to_cpu(ibuf[i]);
5319 static bfa_boolean_t
5320 bfa_phy_present(struct bfa_phy_s *phy)
5322 return (phy->ioc->attr->card_type == BFA_MFG_TYPE_LIGHTNING);
5326 bfa_phy_notify(void *cbarg, enum bfa_ioc_event_e event)
5328 struct bfa_phy_s *phy = cbarg;
5330 bfa_trc(phy, event);
5333 case BFA_IOC_E_DISABLED:
5334 case BFA_IOC_E_FAILED:
5336 phy->status = BFA_STATUS_IOC_FAILURE;
5337 phy->cbfn(phy->cbarg, phy->status);
5348 * Send phy attribute query request.
5350 * @param[in] cbarg - callback argument
5353 bfa_phy_query_send(void *cbarg)
5355 struct bfa_phy_s *phy = cbarg;
5356 struct bfi_phy_query_req_s *msg =
5357 (struct bfi_phy_query_req_s *) phy->mb.msg;
5359 msg->instance = phy->instance;
5360 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_QUERY_REQ,
5361 bfa_ioc_portid(phy->ioc));
5362 bfa_alen_set(&msg->alen, sizeof(struct bfa_phy_attr_s), phy->dbuf_pa);
5363 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5367 * Send phy write request.
5369 * @param[in] cbarg - callback argument
5372 bfa_phy_write_send(void *cbarg)
5374 struct bfa_phy_s *phy = cbarg;
5375 struct bfi_phy_write_req_s *msg =
5376 (struct bfi_phy_write_req_s *) phy->mb.msg;
5381 msg->instance = phy->instance;
5382 msg->offset = cpu_to_be32(phy->addr_off + phy->offset);
5383 len = (phy->residue < BFA_PHY_DMA_BUF_SZ) ?
5384 phy->residue : BFA_PHY_DMA_BUF_SZ;
5385 msg->length = cpu_to_be32(len);
5387 /* indicate if it's the last msg of the whole write operation */
5388 msg->last = (len == phy->residue) ? 1 : 0;
5390 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_WRITE_REQ,
5391 bfa_ioc_portid(phy->ioc));
5392 bfa_alen_set(&msg->alen, len, phy->dbuf_pa);
5394 buf = (u16 *) (phy->ubuf + phy->offset);
5395 dbuf = (u16 *)phy->dbuf_kva;
5397 for (i = 0; i < sz; i++)
5398 buf[i] = cpu_to_be16(dbuf[i]);
5400 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5402 phy->residue -= len;
5407 * Send phy read request.
5409 * @param[in] cbarg - callback argument
5412 bfa_phy_read_send(void *cbarg)
5414 struct bfa_phy_s *phy = cbarg;
5415 struct bfi_phy_read_req_s *msg =
5416 (struct bfi_phy_read_req_s *) phy->mb.msg;
5419 msg->instance = phy->instance;
5420 msg->offset = cpu_to_be32(phy->addr_off + phy->offset);
5421 len = (phy->residue < BFA_PHY_DMA_BUF_SZ) ?
5422 phy->residue : BFA_PHY_DMA_BUF_SZ;
5423 msg->length = cpu_to_be32(len);
5424 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_READ_REQ,
5425 bfa_ioc_portid(phy->ioc));
5426 bfa_alen_set(&msg->alen, len, phy->dbuf_pa);
5427 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5431 * Send phy stats request.
5433 * @param[in] cbarg - callback argument
5436 bfa_phy_stats_send(void *cbarg)
5438 struct bfa_phy_s *phy = cbarg;
5439 struct bfi_phy_stats_req_s *msg =
5440 (struct bfi_phy_stats_req_s *) phy->mb.msg;
5442 msg->instance = phy->instance;
5443 bfi_h2i_set(msg->mh, BFI_MC_PHY, BFI_PHY_H2I_STATS_REQ,
5444 bfa_ioc_portid(phy->ioc));
5445 bfa_alen_set(&msg->alen, sizeof(struct bfa_phy_stats_s), phy->dbuf_pa);
5446 bfa_ioc_mbox_queue(phy->ioc, &phy->mb);
5450 * Flash memory info API.
5452 * @param[in] mincfg - minimal cfg variable
5455 bfa_phy_meminfo(bfa_boolean_t mincfg)
5457 /* min driver doesn't need phy */
5461 return BFA_ROUNDUP(BFA_PHY_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5467 * @param[in] phy - phy structure
5468 * @param[in] ioc - ioc structure
5469 * @param[in] dev - device structure
5470 * @param[in] trcmod - trace module
5471 * @param[in] logmod - log module
5474 bfa_phy_attach(struct bfa_phy_s *phy, struct bfa_ioc_s *ioc, void *dev,
5475 struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg)
5478 phy->trcmod = trcmod;
5483 bfa_ioc_mbox_regisr(phy->ioc, BFI_MC_PHY, bfa_phy_intr, phy);
5484 bfa_q_qe_init(&phy->ioc_notify);
5485 bfa_ioc_notify_init(&phy->ioc_notify, bfa_phy_notify, phy);
5486 list_add_tail(&phy->ioc_notify.qe, &phy->ioc->notify_q);
5488 /* min driver doesn't need phy */
5490 phy->dbuf_kva = NULL;
5496 * Claim memory for phy
5498 * @param[in] phy - phy structure
5499 * @param[in] dm_kva - pointer to virtual memory address
5500 * @param[in] dm_pa - physical memory address
5501 * @param[in] mincfg - minimal cfg variable
5504 bfa_phy_memclaim(struct bfa_phy_s *phy, u8 *dm_kva, u64 dm_pa,
5505 bfa_boolean_t mincfg)
5510 phy->dbuf_kva = dm_kva;
5511 phy->dbuf_pa = dm_pa;
5512 memset(phy->dbuf_kva, 0, BFA_PHY_DMA_BUF_SZ);
5513 dm_kva += BFA_ROUNDUP(BFA_PHY_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5514 dm_pa += BFA_ROUNDUP(BFA_PHY_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
5518 bfa_phy_busy(struct bfa_ioc_s *ioc)
5522 rb = bfa_ioc_bar0(ioc);
5523 return readl(rb + BFA_PHY_LOCK_STATUS);
5527 * Get phy attribute.
5529 * @param[in] phy - phy structure
5530 * @param[in] attr - phy attribute structure
5531 * @param[in] cbfn - callback function
5532 * @param[in] cbarg - callback argument
5537 bfa_phy_get_attr(struct bfa_phy_s *phy, u8 instance,
5538 struct bfa_phy_attr_s *attr, bfa_cb_phy_t cbfn, void *cbarg)
5540 bfa_trc(phy, BFI_PHY_H2I_QUERY_REQ);
5541 bfa_trc(phy, instance);
5543 if (!bfa_phy_present(phy))
5544 return BFA_STATUS_PHY_NOT_PRESENT;
5546 if (!bfa_ioc_is_operational(phy->ioc))
5547 return BFA_STATUS_IOC_NON_OP;
5549 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5550 bfa_trc(phy, phy->op_busy);
5551 return BFA_STATUS_DEVBUSY;
5557 phy->instance = instance;
5558 phy->ubuf = (uint8_t *) attr;
5559 bfa_phy_query_send(phy);
5561 return BFA_STATUS_OK;
5567 * @param[in] phy - phy structure
5568 * @param[in] instance - phy image instance
5569 * @param[in] stats - pointer to phy stats
5570 * @param[in] cbfn - callback function
5571 * @param[in] cbarg - callback argument
5576 bfa_phy_get_stats(struct bfa_phy_s *phy, u8 instance,
5577 struct bfa_phy_stats_s *stats,
5578 bfa_cb_phy_t cbfn, void *cbarg)
5580 bfa_trc(phy, BFI_PHY_H2I_STATS_REQ);
5581 bfa_trc(phy, instance);
5583 if (!bfa_phy_present(phy))
5584 return BFA_STATUS_PHY_NOT_PRESENT;
5586 if (!bfa_ioc_is_operational(phy->ioc))
5587 return BFA_STATUS_IOC_NON_OP;
5589 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5590 bfa_trc(phy, phy->op_busy);
5591 return BFA_STATUS_DEVBUSY;
5597 phy->instance = instance;
5598 phy->ubuf = (u8 *) stats;
5599 bfa_phy_stats_send(phy);
5601 return BFA_STATUS_OK;
5607 * @param[in] phy - phy structure
5608 * @param[in] instance - phy image instance
5609 * @param[in] buf - update data buffer
5610 * @param[in] len - data buffer length
5611 * @param[in] offset - offset relative to starting address
5612 * @param[in] cbfn - callback function
5613 * @param[in] cbarg - callback argument
5618 bfa_phy_update(struct bfa_phy_s *phy, u8 instance,
5619 void *buf, u32 len, u32 offset,
5620 bfa_cb_phy_t cbfn, void *cbarg)
5622 bfa_trc(phy, BFI_PHY_H2I_WRITE_REQ);
5623 bfa_trc(phy, instance);
5625 bfa_trc(phy, offset);
5627 if (!bfa_phy_present(phy))
5628 return BFA_STATUS_PHY_NOT_PRESENT;
5630 if (!bfa_ioc_is_operational(phy->ioc))
5631 return BFA_STATUS_IOC_NON_OP;
5633 /* 'len' must be in word (4-byte) boundary */
5634 if (!len || (len & 0x03))
5635 return BFA_STATUS_FAILED;
5637 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5638 bfa_trc(phy, phy->op_busy);
5639 return BFA_STATUS_DEVBUSY;
5645 phy->instance = instance;
5648 phy->addr_off = offset;
5651 bfa_phy_write_send(phy);
5652 return BFA_STATUS_OK;
5658 * @param[in] phy - phy structure
5659 * @param[in] instance - phy image instance
5660 * @param[in] buf - read data buffer
5661 * @param[in] len - data buffer length
5662 * @param[in] offset - offset relative to starting address
5663 * @param[in] cbfn - callback function
5664 * @param[in] cbarg - callback argument
5669 bfa_phy_read(struct bfa_phy_s *phy, u8 instance,
5670 void *buf, u32 len, u32 offset,
5671 bfa_cb_phy_t cbfn, void *cbarg)
5673 bfa_trc(phy, BFI_PHY_H2I_READ_REQ);
5674 bfa_trc(phy, instance);
5676 bfa_trc(phy, offset);
5678 if (!bfa_phy_present(phy))
5679 return BFA_STATUS_PHY_NOT_PRESENT;
5681 if (!bfa_ioc_is_operational(phy->ioc))
5682 return BFA_STATUS_IOC_NON_OP;
5684 /* 'len' must be in word (4-byte) boundary */
5685 if (!len || (len & 0x03))
5686 return BFA_STATUS_FAILED;
5688 if (phy->op_busy || bfa_phy_busy(phy->ioc)) {
5689 bfa_trc(phy, phy->op_busy);
5690 return BFA_STATUS_DEVBUSY;
5696 phy->instance = instance;
5699 phy->addr_off = offset;
5701 bfa_phy_read_send(phy);
5703 return BFA_STATUS_OK;
5707 * Process phy response messages upon receiving interrupts.
5709 * @param[in] phyarg - phy structure
5710 * @param[in] msg - message structure
5713 bfa_phy_intr(void *phyarg, struct bfi_mbmsg_s *msg)
5715 struct bfa_phy_s *phy = phyarg;
5719 struct bfi_phy_query_rsp_s *query;
5720 struct bfi_phy_stats_rsp_s *stats;
5721 struct bfi_phy_write_rsp_s *write;
5722 struct bfi_phy_read_rsp_s *read;
5723 struct bfi_mbmsg_s *msg;
5727 bfa_trc(phy, msg->mh.msg_id);
5729 if (!phy->op_busy) {
5730 /* receiving response after ioc failure */
5731 bfa_trc(phy, 0x9999);
5735 switch (msg->mh.msg_id) {
5736 case BFI_PHY_I2H_QUERY_RSP:
5737 status = be32_to_cpu(m.query->status);
5738 bfa_trc(phy, status);
5740 if (status == BFA_STATUS_OK) {
5741 struct bfa_phy_attr_s *attr =
5742 (struct bfa_phy_attr_s *) phy->ubuf;
5743 bfa_phy_ntoh32((u32 *)attr, (u32 *)phy->dbuf_kva,
5744 sizeof(struct bfa_phy_attr_s));
5745 bfa_trc(phy, attr->status);
5746 bfa_trc(phy, attr->length);
5749 phy->status = status;
5752 phy->cbfn(phy->cbarg, phy->status);
5754 case BFI_PHY_I2H_STATS_RSP:
5755 status = be32_to_cpu(m.stats->status);
5756 bfa_trc(phy, status);
5758 if (status == BFA_STATUS_OK) {
5759 struct bfa_phy_stats_s *stats =
5760 (struct bfa_phy_stats_s *) phy->ubuf;
5761 bfa_phy_ntoh32((u32 *)stats, (u32 *)phy->dbuf_kva,
5762 sizeof(struct bfa_phy_stats_s));
5763 bfa_trc(phy, stats->status);
5766 phy->status = status;
5769 phy->cbfn(phy->cbarg, phy->status);
5771 case BFI_PHY_I2H_WRITE_RSP:
5772 status = be32_to_cpu(m.write->status);
5773 bfa_trc(phy, status);
5775 if (status != BFA_STATUS_OK || phy->residue == 0) {
5776 phy->status = status;
5779 phy->cbfn(phy->cbarg, phy->status);
5781 bfa_trc(phy, phy->offset);
5782 bfa_phy_write_send(phy);
5785 case BFI_PHY_I2H_READ_RSP:
5786 status = be32_to_cpu(m.read->status);
5787 bfa_trc(phy, status);
5789 if (status != BFA_STATUS_OK) {
5790 phy->status = status;
5793 phy->cbfn(phy->cbarg, phy->status);
5795 u32 len = be32_to_cpu(m.read->length);
5796 u16 *buf = (u16 *)(phy->ubuf + phy->offset);
5797 u16 *dbuf = (u16 *)phy->dbuf_kva;
5798 int i, sz = len >> 1;
5800 bfa_trc(phy, phy->offset);
5803 for (i = 0; i < sz; i++)
5804 buf[i] = be16_to_cpu(dbuf[i]);
5806 phy->residue -= len;
5809 if (phy->residue == 0) {
5810 phy->status = status;
5813 phy->cbfn(phy->cbarg, phy->status);
5815 bfa_phy_read_send(phy);
5824 * DCONF module specific
5830 * DCONF state machine events
5832 enum bfa_dconf_event {
5833 BFA_DCONF_SM_INIT = 1, /* dconf Init */
5834 BFA_DCONF_SM_FLASH_COMP = 2, /* read/write to flash */
5835 BFA_DCONF_SM_WR = 3, /* binding change, map */
5836 BFA_DCONF_SM_TIMEOUT = 4, /* Start timer */
5837 BFA_DCONF_SM_EXIT = 5, /* exit dconf module */
5838 BFA_DCONF_SM_IOCDISABLE = 6, /* IOC disable event */
5841 /* forward declaration of DCONF state machine */
5842 static void bfa_dconf_sm_uninit(struct bfa_dconf_mod_s *dconf,
5843 enum bfa_dconf_event event);
5844 static void bfa_dconf_sm_flash_read(struct bfa_dconf_mod_s *dconf,
5845 enum bfa_dconf_event event);
5846 static void bfa_dconf_sm_ready(struct bfa_dconf_mod_s *dconf,
5847 enum bfa_dconf_event event);
5848 static void bfa_dconf_sm_dirty(struct bfa_dconf_mod_s *dconf,
5849 enum bfa_dconf_event event);
5850 static void bfa_dconf_sm_sync(struct bfa_dconf_mod_s *dconf,
5851 enum bfa_dconf_event event);
5852 static void bfa_dconf_sm_final_sync(struct bfa_dconf_mod_s *dconf,
5853 enum bfa_dconf_event event);
5854 static void bfa_dconf_sm_iocdown_dirty(struct bfa_dconf_mod_s *dconf,
5855 enum bfa_dconf_event event);
5857 static void bfa_dconf_cbfn(void *dconf, bfa_status_t status);
5858 static void bfa_dconf_timer(void *cbarg);
5859 static bfa_status_t bfa_dconf_flash_write(struct bfa_dconf_mod_s *dconf);
5860 static void bfa_dconf_init_cb(void *arg, bfa_status_t status);
5863 * Beginning state of dconf module. Waiting for an event to start.
5866 bfa_dconf_sm_uninit(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
5868 bfa_status_t bfa_status;
5869 bfa_trc(dconf->bfa, event);
5872 case BFA_DCONF_SM_INIT:
5873 if (dconf->min_cfg) {
5874 bfa_trc(dconf->bfa, dconf->min_cfg);
5875 bfa_fsm_send_event(&dconf->bfa->iocfc,
5876 IOCFC_E_DCONF_DONE);
5879 bfa_sm_set_state(dconf, bfa_dconf_sm_flash_read);
5880 bfa_timer_start(dconf->bfa, &dconf->timer,
5881 bfa_dconf_timer, dconf, 2 * BFA_DCONF_UPDATE_TOV);
5882 bfa_status = bfa_flash_read_part(BFA_FLASH(dconf->bfa),
5883 BFA_FLASH_PART_DRV, dconf->instance,
5885 sizeof(struct bfa_dconf_s), 0,
5886 bfa_dconf_init_cb, dconf->bfa);
5887 if (bfa_status != BFA_STATUS_OK) {
5888 bfa_timer_stop(&dconf->timer);
5889 bfa_dconf_init_cb(dconf->bfa, BFA_STATUS_FAILED);
5890 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5894 case BFA_DCONF_SM_EXIT:
5895 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
5896 case BFA_DCONF_SM_IOCDISABLE:
5897 case BFA_DCONF_SM_WR:
5898 case BFA_DCONF_SM_FLASH_COMP:
5901 bfa_sm_fault(dconf->bfa, event);
5906 * Read flash for dconf entries and make a call back to the driver once done.
5909 bfa_dconf_sm_flash_read(struct bfa_dconf_mod_s *dconf,
5910 enum bfa_dconf_event event)
5912 bfa_trc(dconf->bfa, event);
5915 case BFA_DCONF_SM_FLASH_COMP:
5916 bfa_timer_stop(&dconf->timer);
5917 bfa_sm_set_state(dconf, bfa_dconf_sm_ready);
5919 case BFA_DCONF_SM_TIMEOUT:
5920 bfa_sm_set_state(dconf, bfa_dconf_sm_ready);
5921 bfa_ioc_suspend(&dconf->bfa->ioc);
5923 case BFA_DCONF_SM_EXIT:
5924 bfa_timer_stop(&dconf->timer);
5925 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5926 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
5928 case BFA_DCONF_SM_IOCDISABLE:
5929 bfa_timer_stop(&dconf->timer);
5930 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5933 bfa_sm_fault(dconf->bfa, event);
5938 * DCONF Module is in ready state. Has completed the initialization.
5941 bfa_dconf_sm_ready(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
5943 bfa_trc(dconf->bfa, event);
5946 case BFA_DCONF_SM_WR:
5947 bfa_timer_start(dconf->bfa, &dconf->timer,
5948 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
5949 bfa_sm_set_state(dconf, bfa_dconf_sm_dirty);
5951 case BFA_DCONF_SM_EXIT:
5952 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
5953 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
5955 case BFA_DCONF_SM_INIT:
5956 case BFA_DCONF_SM_IOCDISABLE:
5959 bfa_sm_fault(dconf->bfa, event);
5964 * entries are dirty, write back to the flash.
5968 bfa_dconf_sm_dirty(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
5970 bfa_trc(dconf->bfa, event);
5973 case BFA_DCONF_SM_TIMEOUT:
5974 bfa_sm_set_state(dconf, bfa_dconf_sm_sync);
5975 bfa_dconf_flash_write(dconf);
5977 case BFA_DCONF_SM_WR:
5978 bfa_timer_stop(&dconf->timer);
5979 bfa_timer_start(dconf->bfa, &dconf->timer,
5980 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
5982 case BFA_DCONF_SM_EXIT:
5983 bfa_timer_stop(&dconf->timer);
5984 bfa_timer_start(dconf->bfa, &dconf->timer,
5985 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
5986 bfa_sm_set_state(dconf, bfa_dconf_sm_final_sync);
5987 bfa_dconf_flash_write(dconf);
5989 case BFA_DCONF_SM_FLASH_COMP:
5991 case BFA_DCONF_SM_IOCDISABLE:
5992 bfa_timer_stop(&dconf->timer);
5993 bfa_sm_set_state(dconf, bfa_dconf_sm_iocdown_dirty);
5996 bfa_sm_fault(dconf->bfa, event);
6001 * Sync the dconf entries to the flash.
6004 bfa_dconf_sm_final_sync(struct bfa_dconf_mod_s *dconf,
6005 enum bfa_dconf_event event)
6007 bfa_trc(dconf->bfa, event);
6010 case BFA_DCONF_SM_IOCDISABLE:
6011 case BFA_DCONF_SM_FLASH_COMP:
6012 bfa_timer_stop(&dconf->timer);
6013 case BFA_DCONF_SM_TIMEOUT:
6014 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
6015 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
6018 bfa_sm_fault(dconf->bfa, event);
6023 bfa_dconf_sm_sync(struct bfa_dconf_mod_s *dconf, enum bfa_dconf_event event)
6025 bfa_trc(dconf->bfa, event);
6028 case BFA_DCONF_SM_FLASH_COMP:
6029 bfa_sm_set_state(dconf, bfa_dconf_sm_ready);
6031 case BFA_DCONF_SM_WR:
6032 bfa_timer_start(dconf->bfa, &dconf->timer,
6033 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
6034 bfa_sm_set_state(dconf, bfa_dconf_sm_dirty);
6036 case BFA_DCONF_SM_EXIT:
6037 bfa_timer_start(dconf->bfa, &dconf->timer,
6038 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
6039 bfa_sm_set_state(dconf, bfa_dconf_sm_final_sync);
6041 case BFA_DCONF_SM_IOCDISABLE:
6042 bfa_sm_set_state(dconf, bfa_dconf_sm_iocdown_dirty);
6045 bfa_sm_fault(dconf->bfa, event);
6050 bfa_dconf_sm_iocdown_dirty(struct bfa_dconf_mod_s *dconf,
6051 enum bfa_dconf_event event)
6053 bfa_trc(dconf->bfa, event);
6056 case BFA_DCONF_SM_INIT:
6057 bfa_timer_start(dconf->bfa, &dconf->timer,
6058 bfa_dconf_timer, dconf, BFA_DCONF_UPDATE_TOV);
6059 bfa_sm_set_state(dconf, bfa_dconf_sm_dirty);
6061 case BFA_DCONF_SM_EXIT:
6062 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
6063 bfa_fsm_send_event(&dconf->bfa->iocfc, IOCFC_E_DCONF_DONE);
6065 case BFA_DCONF_SM_IOCDISABLE:
6068 bfa_sm_fault(dconf->bfa, event);
6073 * Compute and return memory needed by DRV_CFG module.
6076 bfa_dconf_meminfo(struct bfa_iocfc_cfg_s *cfg, struct bfa_meminfo_s *meminfo,
6079 struct bfa_mem_kva_s *dconf_kva = BFA_MEM_DCONF_KVA(bfa);
6081 if (cfg->drvcfg.min_cfg)
6082 bfa_mem_kva_setup(meminfo, dconf_kva,
6083 sizeof(struct bfa_dconf_hdr_s));
6085 bfa_mem_kva_setup(meminfo, dconf_kva,
6086 sizeof(struct bfa_dconf_s));
6090 bfa_dconf_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg,
6091 struct bfa_pcidev_s *pcidev)
6093 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6097 dconf->instance = bfa->ioc.port_id;
6098 bfa_trc(bfa, dconf->instance);
6100 dconf->dconf = (struct bfa_dconf_s *) bfa_mem_kva_curp(dconf);
6101 if (cfg->drvcfg.min_cfg) {
6102 bfa_mem_kva_curp(dconf) += sizeof(struct bfa_dconf_hdr_s);
6103 dconf->min_cfg = BFA_TRUE;
6105 dconf->min_cfg = BFA_FALSE;
6106 bfa_mem_kva_curp(dconf) += sizeof(struct bfa_dconf_s);
6109 bfa_dconf_read_data_valid(bfa) = BFA_FALSE;
6110 bfa_sm_set_state(dconf, bfa_dconf_sm_uninit);
6114 bfa_dconf_init_cb(void *arg, bfa_status_t status)
6116 struct bfa_s *bfa = arg;
6117 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6119 if (status == BFA_STATUS_OK) {
6120 bfa_dconf_read_data_valid(bfa) = BFA_TRUE;
6121 if (dconf->dconf->hdr.signature != BFI_DCONF_SIGNATURE)
6122 dconf->dconf->hdr.signature = BFI_DCONF_SIGNATURE;
6123 if (dconf->dconf->hdr.version != BFI_DCONF_VERSION)
6124 dconf->dconf->hdr.version = BFI_DCONF_VERSION;
6126 bfa_sm_send_event(dconf, BFA_DCONF_SM_FLASH_COMP);
6127 bfa_fsm_send_event(&bfa->iocfc, IOCFC_E_DCONF_DONE);
6131 bfa_dconf_modinit(struct bfa_s *bfa)
6133 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6134 bfa_sm_send_event(dconf, BFA_DCONF_SM_INIT);
6137 bfa_dconf_start(struct bfa_s *bfa)
6142 bfa_dconf_stop(struct bfa_s *bfa)
6146 static void bfa_dconf_timer(void *cbarg)
6148 struct bfa_dconf_mod_s *dconf = cbarg;
6149 bfa_sm_send_event(dconf, BFA_DCONF_SM_TIMEOUT);
6152 bfa_dconf_iocdisable(struct bfa_s *bfa)
6154 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6155 bfa_sm_send_event(dconf, BFA_DCONF_SM_IOCDISABLE);
6159 bfa_dconf_detach(struct bfa_s *bfa)
6164 bfa_dconf_flash_write(struct bfa_dconf_mod_s *dconf)
6166 bfa_status_t bfa_status;
6167 bfa_trc(dconf->bfa, 0);
6169 bfa_status = bfa_flash_update_part(BFA_FLASH(dconf->bfa),
6170 BFA_FLASH_PART_DRV, dconf->instance,
6171 dconf->dconf, sizeof(struct bfa_dconf_s), 0,
6172 bfa_dconf_cbfn, dconf);
6173 if (bfa_status != BFA_STATUS_OK)
6174 WARN_ON(bfa_status);
6175 bfa_trc(dconf->bfa, bfa_status);
6181 bfa_dconf_update(struct bfa_s *bfa)
6183 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6184 bfa_trc(dconf->bfa, 0);
6185 if (bfa_sm_cmp_state(dconf, bfa_dconf_sm_iocdown_dirty))
6186 return BFA_STATUS_FAILED;
6188 if (dconf->min_cfg) {
6189 bfa_trc(dconf->bfa, dconf->min_cfg);
6190 return BFA_STATUS_FAILED;
6193 bfa_sm_send_event(dconf, BFA_DCONF_SM_WR);
6194 return BFA_STATUS_OK;
6198 bfa_dconf_cbfn(void *arg, bfa_status_t status)
6200 struct bfa_dconf_mod_s *dconf = arg;
6202 bfa_sm_send_event(dconf, BFA_DCONF_SM_FLASH_COMP);
6206 bfa_dconf_modexit(struct bfa_s *bfa)
6208 struct bfa_dconf_mod_s *dconf = BFA_DCONF_MOD(bfa);
6209 bfa_sm_send_event(dconf, BFA_DCONF_SM_EXIT);
6213 * FRU specific functions
6216 #define BFA_FRU_DMA_BUF_SZ 0x02000 /* 8k dma buffer */
6217 #define BFA_FRU_CHINOOK_MAX_SIZE 0x10000
6218 #define BFA_FRU_LIGHTNING_MAX_SIZE 0x200
6221 bfa_fru_notify(void *cbarg, enum bfa_ioc_event_e event)
6223 struct bfa_fru_s *fru = cbarg;
6225 bfa_trc(fru, event);
6228 case BFA_IOC_E_DISABLED:
6229 case BFA_IOC_E_FAILED:
6231 fru->status = BFA_STATUS_IOC_FAILURE;
6232 fru->cbfn(fru->cbarg, fru->status);
6243 * Send fru write request.
6245 * @param[in] cbarg - callback argument
6248 bfa_fru_write_send(void *cbarg, enum bfi_fru_h2i_msgs msg_type)
6250 struct bfa_fru_s *fru = cbarg;
6251 struct bfi_fru_write_req_s *msg =
6252 (struct bfi_fru_write_req_s *) fru->mb.msg;
6255 msg->offset = cpu_to_be32(fru->addr_off + fru->offset);
6256 len = (fru->residue < BFA_FRU_DMA_BUF_SZ) ?
6257 fru->residue : BFA_FRU_DMA_BUF_SZ;
6258 msg->length = cpu_to_be32(len);
6261 * indicate if it's the last msg of the whole write operation
6263 msg->last = (len == fru->residue) ? 1 : 0;
6265 msg->trfr_cmpl = (len == fru->residue) ? fru->trfr_cmpl : 0;
6266 bfi_h2i_set(msg->mh, BFI_MC_FRU, msg_type, bfa_ioc_portid(fru->ioc));
6267 bfa_alen_set(&msg->alen, len, fru->dbuf_pa);
6269 memcpy(fru->dbuf_kva, fru->ubuf + fru->offset, len);
6270 bfa_ioc_mbox_queue(fru->ioc, &fru->mb);
6272 fru->residue -= len;
6277 * Send fru read request.
6279 * @param[in] cbarg - callback argument
6282 bfa_fru_read_send(void *cbarg, enum bfi_fru_h2i_msgs msg_type)
6284 struct bfa_fru_s *fru = cbarg;
6285 struct bfi_fru_read_req_s *msg =
6286 (struct bfi_fru_read_req_s *) fru->mb.msg;
6289 msg->offset = cpu_to_be32(fru->addr_off + fru->offset);
6290 len = (fru->residue < BFA_FRU_DMA_BUF_SZ) ?
6291 fru->residue : BFA_FRU_DMA_BUF_SZ;
6292 msg->length = cpu_to_be32(len);
6293 bfi_h2i_set(msg->mh, BFI_MC_FRU, msg_type, bfa_ioc_portid(fru->ioc));
6294 bfa_alen_set(&msg->alen, len, fru->dbuf_pa);
6295 bfa_ioc_mbox_queue(fru->ioc, &fru->mb);
6299 * Flash memory info API.
6301 * @param[in] mincfg - minimal cfg variable
6304 bfa_fru_meminfo(bfa_boolean_t mincfg)
6306 /* min driver doesn't need fru */
6310 return BFA_ROUNDUP(BFA_FRU_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
6316 * @param[in] fru - fru structure
6317 * @param[in] ioc - ioc structure
6318 * @param[in] dev - device structure
6319 * @param[in] trcmod - trace module
6320 * @param[in] logmod - log module
6323 bfa_fru_attach(struct bfa_fru_s *fru, struct bfa_ioc_s *ioc, void *dev,
6324 struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg)
6327 fru->trcmod = trcmod;
6332 bfa_ioc_mbox_regisr(fru->ioc, BFI_MC_FRU, bfa_fru_intr, fru);
6333 bfa_q_qe_init(&fru->ioc_notify);
6334 bfa_ioc_notify_init(&fru->ioc_notify, bfa_fru_notify, fru);
6335 list_add_tail(&fru->ioc_notify.qe, &fru->ioc->notify_q);
6337 /* min driver doesn't need fru */
6339 fru->dbuf_kva = NULL;
6345 * Claim memory for fru
6347 * @param[in] fru - fru structure
6348 * @param[in] dm_kva - pointer to virtual memory address
6349 * @param[in] dm_pa - frusical memory address
6350 * @param[in] mincfg - minimal cfg variable
6353 bfa_fru_memclaim(struct bfa_fru_s *fru, u8 *dm_kva, u64 dm_pa,
6354 bfa_boolean_t mincfg)
6359 fru->dbuf_kva = dm_kva;
6360 fru->dbuf_pa = dm_pa;
6361 memset(fru->dbuf_kva, 0, BFA_FRU_DMA_BUF_SZ);
6362 dm_kva += BFA_ROUNDUP(BFA_FRU_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
6363 dm_pa += BFA_ROUNDUP(BFA_FRU_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
6367 * Update fru vpd image.
6369 * @param[in] fru - fru structure
6370 * @param[in] buf - update data buffer
6371 * @param[in] len - data buffer length
6372 * @param[in] offset - offset relative to starting address
6373 * @param[in] cbfn - callback function
6374 * @param[in] cbarg - callback argument
6379 bfa_fruvpd_update(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6380 bfa_cb_fru_t cbfn, void *cbarg, u8 trfr_cmpl)
6382 bfa_trc(fru, BFI_FRUVPD_H2I_WRITE_REQ);
6384 bfa_trc(fru, offset);
6386 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2 &&
6387 fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK2)
6388 return BFA_STATUS_FRU_NOT_PRESENT;
6390 if (fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK)
6391 return BFA_STATUS_CMD_NOTSUPP;
6393 if (!bfa_ioc_is_operational(fru->ioc))
6394 return BFA_STATUS_IOC_NON_OP;
6397 bfa_trc(fru, fru->op_busy);
6398 return BFA_STATUS_DEVBUSY;
6407 fru->addr_off = offset;
6409 fru->trfr_cmpl = trfr_cmpl;
6411 bfa_fru_write_send(fru, BFI_FRUVPD_H2I_WRITE_REQ);
6413 return BFA_STATUS_OK;
6417 * Read fru vpd image.
6419 * @param[in] fru - fru structure
6420 * @param[in] buf - read data buffer
6421 * @param[in] len - data buffer length
6422 * @param[in] offset - offset relative to starting address
6423 * @param[in] cbfn - callback function
6424 * @param[in] cbarg - callback argument
6429 bfa_fruvpd_read(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6430 bfa_cb_fru_t cbfn, void *cbarg)
6432 bfa_trc(fru, BFI_FRUVPD_H2I_READ_REQ);
6434 bfa_trc(fru, offset);
6436 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6437 return BFA_STATUS_FRU_NOT_PRESENT;
6439 if (fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK &&
6440 fru->ioc->attr->card_type != BFA_MFG_TYPE_CHINOOK2)
6441 return BFA_STATUS_CMD_NOTSUPP;
6443 if (!bfa_ioc_is_operational(fru->ioc))
6444 return BFA_STATUS_IOC_NON_OP;
6447 bfa_trc(fru, fru->op_busy);
6448 return BFA_STATUS_DEVBUSY;
6457 fru->addr_off = offset;
6459 bfa_fru_read_send(fru, BFI_FRUVPD_H2I_READ_REQ);
6461 return BFA_STATUS_OK;
6465 * Get maximum size fru vpd image.
6467 * @param[in] fru - fru structure
6468 * @param[out] size - maximum size of fru vpd data
6473 bfa_fruvpd_get_max_size(struct bfa_fru_s *fru, u32 *max_size)
6475 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6476 return BFA_STATUS_FRU_NOT_PRESENT;
6478 if (!bfa_ioc_is_operational(fru->ioc))
6479 return BFA_STATUS_IOC_NON_OP;
6481 if (fru->ioc->attr->card_type == BFA_MFG_TYPE_CHINOOK ||
6482 fru->ioc->attr->card_type == BFA_MFG_TYPE_CHINOOK2)
6483 *max_size = BFA_FRU_CHINOOK_MAX_SIZE;
6485 return BFA_STATUS_CMD_NOTSUPP;
6486 return BFA_STATUS_OK;
6491 * @param[in] fru - fru structure
6492 * @param[in] buf - update data buffer
6493 * @param[in] len - data buffer length
6494 * @param[in] offset - offset relative to starting address
6495 * @param[in] cbfn - callback function
6496 * @param[in] cbarg - callback argument
6501 bfa_tfru_write(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6502 bfa_cb_fru_t cbfn, void *cbarg)
6504 bfa_trc(fru, BFI_TFRU_H2I_WRITE_REQ);
6506 bfa_trc(fru, offset);
6507 bfa_trc(fru, *((u8 *) buf));
6509 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6510 return BFA_STATUS_FRU_NOT_PRESENT;
6512 if (!bfa_ioc_is_operational(fru->ioc))
6513 return BFA_STATUS_IOC_NON_OP;
6516 bfa_trc(fru, fru->op_busy);
6517 return BFA_STATUS_DEVBUSY;
6526 fru->addr_off = offset;
6529 bfa_fru_write_send(fru, BFI_TFRU_H2I_WRITE_REQ);
6531 return BFA_STATUS_OK;
6537 * @param[in] fru - fru structure
6538 * @param[in] buf - read data buffer
6539 * @param[in] len - data buffer length
6540 * @param[in] offset - offset relative to starting address
6541 * @param[in] cbfn - callback function
6542 * @param[in] cbarg - callback argument
6547 bfa_tfru_read(struct bfa_fru_s *fru, void *buf, u32 len, u32 offset,
6548 bfa_cb_fru_t cbfn, void *cbarg)
6550 bfa_trc(fru, BFI_TFRU_H2I_READ_REQ);
6552 bfa_trc(fru, offset);
6554 if (fru->ioc->asic_gen != BFI_ASIC_GEN_CT2)
6555 return BFA_STATUS_FRU_NOT_PRESENT;
6557 if (!bfa_ioc_is_operational(fru->ioc))
6558 return BFA_STATUS_IOC_NON_OP;
6561 bfa_trc(fru, fru->op_busy);
6562 return BFA_STATUS_DEVBUSY;
6571 fru->addr_off = offset;
6573 bfa_fru_read_send(fru, BFI_TFRU_H2I_READ_REQ);
6575 return BFA_STATUS_OK;
6579 * Process fru response messages upon receiving interrupts.
6581 * @param[in] fruarg - fru structure
6582 * @param[in] msg - message structure
6585 bfa_fru_intr(void *fruarg, struct bfi_mbmsg_s *msg)
6587 struct bfa_fru_s *fru = fruarg;
6588 struct bfi_fru_rsp_s *rsp = (struct bfi_fru_rsp_s *)msg;
6591 bfa_trc(fru, msg->mh.msg_id);
6593 if (!fru->op_busy) {
6595 * receiving response after ioc failure
6597 bfa_trc(fru, 0x9999);
6601 switch (msg->mh.msg_id) {
6602 case BFI_FRUVPD_I2H_WRITE_RSP:
6603 case BFI_TFRU_I2H_WRITE_RSP:
6604 status = be32_to_cpu(rsp->status);
6605 bfa_trc(fru, status);
6607 if (status != BFA_STATUS_OK || fru->residue == 0) {
6608 fru->status = status;
6611 fru->cbfn(fru->cbarg, fru->status);
6613 bfa_trc(fru, fru->offset);
6614 if (msg->mh.msg_id == BFI_FRUVPD_I2H_WRITE_RSP)
6615 bfa_fru_write_send(fru,
6616 BFI_FRUVPD_H2I_WRITE_REQ);
6618 bfa_fru_write_send(fru,
6619 BFI_TFRU_H2I_WRITE_REQ);
6622 case BFI_FRUVPD_I2H_READ_RSP:
6623 case BFI_TFRU_I2H_READ_RSP:
6624 status = be32_to_cpu(rsp->status);
6625 bfa_trc(fru, status);
6627 if (status != BFA_STATUS_OK) {
6628 fru->status = status;
6631 fru->cbfn(fru->cbarg, fru->status);
6633 u32 len = be32_to_cpu(rsp->length);
6635 bfa_trc(fru, fru->offset);
6638 memcpy(fru->ubuf + fru->offset, fru->dbuf_kva, len);
6639 fru->residue -= len;
6642 if (fru->residue == 0) {
6643 fru->status = status;
6646 fru->cbfn(fru->cbarg, fru->status);
6648 if (msg->mh.msg_id == BFI_FRUVPD_I2H_READ_RSP)
6649 bfa_fru_read_send(fru,
6650 BFI_FRUVPD_H2I_READ_REQ);
6652 bfa_fru_read_send(fru,
6653 BFI_TFRU_H2I_READ_REQ);
6663 * register definitions
6665 #define FLI_CMD_REG 0x0001d000
6666 #define FLI_RDDATA_REG 0x0001d010
6667 #define FLI_ADDR_REG 0x0001d004
6668 #define FLI_DEV_STATUS_REG 0x0001d014
6670 #define BFA_FLASH_FIFO_SIZE 128 /* fifo size */
6671 #define BFA_FLASH_CHECK_MAX 10000 /* max # of status check */
6672 #define BFA_FLASH_BLOCKING_OP_MAX 1000000 /* max # of blocking op check */
6673 #define BFA_FLASH_WIP_MASK 0x01 /* write in progress bit mask */
6675 enum bfa_flash_cmd {
6676 BFA_FLASH_FAST_READ = 0x0b, /* fast read */
6677 BFA_FLASH_READ_STATUS = 0x05, /* read status */
6681 * @brief hardware error definition
6683 enum bfa_flash_err {
6684 BFA_FLASH_NOT_PRESENT = -1, /*!< flash not present */
6685 BFA_FLASH_UNINIT = -2, /*!< flash not initialized */
6686 BFA_FLASH_BAD = -3, /*!< flash bad */
6687 BFA_FLASH_BUSY = -4, /*!< flash busy */
6688 BFA_FLASH_ERR_CMD_ACT = -5, /*!< command active never cleared */
6689 BFA_FLASH_ERR_FIFO_CNT = -6, /*!< fifo count never cleared */
6690 BFA_FLASH_ERR_WIP = -7, /*!< write-in-progress never cleared */
6691 BFA_FLASH_ERR_TIMEOUT = -8, /*!< fli timeout */
6692 BFA_FLASH_ERR_LEN = -9, /*!< invalid length */
6696 * @brief flash command register data structure
6698 union bfa_flash_cmd_reg_u {
6720 * @brief flash device status register data structure
6722 union bfa_flash_dev_status_reg_u {
6746 * @brief flash address register data structure
6748 union bfa_flash_addr_reg_u {
6762 * dg flash_raw_private Flash raw private functions
6765 bfa_flash_set_cmd(void __iomem *pci_bar, u8 wr_cnt,
6766 u8 rd_cnt, u8 ad_cnt, u8 op)
6768 union bfa_flash_cmd_reg_u cmd;
6772 cmd.r.write_cnt = wr_cnt;
6773 cmd.r.read_cnt = rd_cnt;
6774 cmd.r.addr_cnt = ad_cnt;
6776 writel(cmd.i, (pci_bar + FLI_CMD_REG));
6780 bfa_flash_set_addr(void __iomem *pci_bar, u32 address)
6782 union bfa_flash_addr_reg_u addr;
6784 addr.r.addr = address & 0x00ffffff;
6786 writel(addr.i, (pci_bar + FLI_ADDR_REG));
6790 bfa_flash_cmd_act_check(void __iomem *pci_bar)
6792 union bfa_flash_cmd_reg_u cmd;
6794 cmd.i = readl(pci_bar + FLI_CMD_REG);
6797 return BFA_FLASH_ERR_CMD_ACT;
6804 * Flush FLI data fifo.
6806 * @param[in] pci_bar - pci bar address
6807 * @param[in] dev_status - device status
6809 * Return 0 on success, negative error number on error.
6812 bfa_flash_fifo_flush(void __iomem *pci_bar)
6816 union bfa_flash_dev_status_reg_u dev_status;
6818 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
6820 if (!dev_status.r.fifo_cnt)
6823 /* fifo counter in terms of words */
6824 for (i = 0; i < dev_status.r.fifo_cnt; i++)
6825 t = readl(pci_bar + FLI_RDDATA_REG);
6828 * Check the device status. It may take some time.
6830 for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) {
6831 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
6832 if (!dev_status.r.fifo_cnt)
6836 if (dev_status.r.fifo_cnt)
6837 return BFA_FLASH_ERR_FIFO_CNT;
6844 * Read flash status.
6846 * @param[in] pci_bar - pci bar address
6848 * Return 0 on success, negative error number on error.
6851 bfa_flash_status_read(void __iomem *pci_bar)
6853 union bfa_flash_dev_status_reg_u dev_status;
6858 status = bfa_flash_fifo_flush(pci_bar);
6862 bfa_flash_set_cmd(pci_bar, 0, 4, 0, BFA_FLASH_READ_STATUS);
6864 for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) {
6865 status = bfa_flash_cmd_act_check(pci_bar);
6873 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
6874 if (!dev_status.r.fifo_cnt)
6875 return BFA_FLASH_BUSY;
6877 ret_status = readl(pci_bar + FLI_RDDATA_REG);
6880 status = bfa_flash_fifo_flush(pci_bar);
6889 * Start flash read operation.
6891 * @param[in] pci_bar - pci bar address
6892 * @param[in] offset - flash address offset
6893 * @param[in] len - read data length
6894 * @param[in] buf - read data buffer
6896 * Return 0 on success, negative error number on error.
6899 bfa_flash_read_start(void __iomem *pci_bar, u32 offset, u32 len,
6905 * len must be mutiple of 4 and not exceeding fifo size
6907 if (len == 0 || len > BFA_FLASH_FIFO_SIZE || (len & 0x03) != 0)
6908 return BFA_FLASH_ERR_LEN;
6913 status = bfa_flash_status_read(pci_bar);
6914 if (status == BFA_FLASH_BUSY)
6915 status = bfa_flash_status_read(pci_bar);
6921 * check if write-in-progress bit is cleared
6923 if (status & BFA_FLASH_WIP_MASK)
6924 return BFA_FLASH_ERR_WIP;
6926 bfa_flash_set_addr(pci_bar, offset);
6928 bfa_flash_set_cmd(pci_bar, 0, (u8)len, 4, BFA_FLASH_FAST_READ);
6935 * Check flash read operation.
6937 * @param[in] pci_bar - pci bar address
6939 * Return flash device status, 1 if busy, 0 if not.
6942 bfa_flash_read_check(void __iomem *pci_bar)
6944 if (bfa_flash_cmd_act_check(pci_bar))
6951 * End flash read operation.
6953 * @param[in] pci_bar - pci bar address
6954 * @param[in] len - read data length
6955 * @param[in] buf - read data buffer
6959 bfa_flash_read_end(void __iomem *pci_bar, u32 len, char *buf)
6965 * read data fifo up to 32 words
6967 for (i = 0; i < len; i += 4) {
6968 u32 w = readl(pci_bar + FLI_RDDATA_REG);
6969 *((u32 *) (buf + i)) = swab32(w);
6972 bfa_flash_fifo_flush(pci_bar);
6977 * Perform flash raw read.
6979 * @param[in] pci_bar - pci bar address
6980 * @param[in] offset - flash partition address offset
6981 * @param[in] buf - read data buffer
6982 * @param[in] len - read data length
6988 #define FLASH_BLOCKING_OP_MAX 500
6989 #define FLASH_SEM_LOCK_REG 0x18820
6992 bfa_raw_sem_get(void __iomem *bar)
6996 locked = readl((bar + FLASH_SEM_LOCK_REG));
7002 bfa_flash_sem_get(void __iomem *bar)
7004 u32 n = FLASH_BLOCKING_OP_MAX;
7006 while (!bfa_raw_sem_get(bar)) {
7008 return BFA_STATUS_BADFLASH;
7011 return BFA_STATUS_OK;
7015 bfa_flash_sem_put(void __iomem *bar)
7017 writel(0, (bar + FLASH_SEM_LOCK_REG));
7021 bfa_flash_raw_read(void __iomem *pci_bar, u32 offset, char *buf,
7026 u32 off, l, s, residue, fifo_sz;
7030 fifo_sz = BFA_FLASH_FIFO_SIZE;
7031 status = bfa_flash_sem_get(pci_bar);
7032 if (status != BFA_STATUS_OK)
7038 l = (n + 1) * fifo_sz - s;
7042 status = bfa_flash_read_start(pci_bar, offset + off, l,
7045 bfa_flash_sem_put(pci_bar);
7046 return BFA_STATUS_FAILED;
7049 n = BFA_FLASH_BLOCKING_OP_MAX;
7050 while (bfa_flash_read_check(pci_bar)) {
7052 bfa_flash_sem_put(pci_bar);
7053 return BFA_STATUS_FAILED;
7057 bfa_flash_read_end(pci_bar, l, &buf[off]);
7062 bfa_flash_sem_put(pci_bar);
7064 return BFA_STATUS_OK;