2 * CXL Flash Device Driver
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
7 * Copyright (C) 2015 IBM Corporation
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
15 #ifndef _CXLFLASH_COMMON_H
16 #define _CXLFLASH_COMMON_H
18 #include <linux/irq_poll.h>
19 #include <linux/list.h>
20 #include <linux/rwsem.h>
21 #include <linux/types.h>
22 #include <scsi/scsi.h>
23 #include <scsi/scsi_cmnd.h>
24 #include <scsi/scsi_device.h>
26 extern const struct file_operations cxlflash_cxl_fops;
28 #define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */
30 #define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */
31 #define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */
32 #define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants
39 #define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))
41 /* AFU command retry limit */
42 #define MC_RETRY_CNT 5 /* sufficient for SCSI check and
45 /* Command management definitions */
46 #define CXLFLASH_NUM_CMDS (2 * CXLFLASH_MAX_CMDS) /* Must be a pow2 for
52 #define CXLFLASH_MAX_CMDS 256
53 #define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS
55 /* RRQ for master issued cmds */
56 #define NUM_RRQ_ENTRY CXLFLASH_MAX_CMDS
58 /* SQ for master issued cmds */
59 #define NUM_SQ_ENTRY CXLFLASH_MAX_CMDS
62 static inline void check_sizes(void)
64 BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS);
67 /* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
68 #define CMD_BUFSIZE SIZE_4K
70 enum cxlflash_lr_state {
76 enum cxlflash_init_state {
84 STATE_NORMAL, /* Normal running state, everything good */
85 STATE_RESET, /* Reset state, trying to reset/recover */
86 STATE_FAILTERM /* Failed/terminating state, error out users/threads */
90 * Each context has its own set of resource handles that is visible
91 * only from that context.
96 struct cxl_context *mcctx;
99 struct pci_device_id *dev_id;
100 struct Scsi_Host *host;
102 ulong cxlflash_regs_pci;
104 struct work_struct work_q;
105 enum cxlflash_init_state init_state;
106 enum cxlflash_lr_state lr_state;
108 atomic_t scan_host_needed;
110 struct cxl_afu *cxl_afu;
112 atomic_t recovery_threads;
113 struct mutex ctx_recovery_mutex;
114 struct mutex ctx_tbl_list_mutex;
115 struct rw_semaphore ioctl_rwsem;
116 struct ctx_info *ctx_tbl[MAX_CONTEXT];
117 struct list_head ctx_err_recovery; /* contexts w/ recovery pending */
118 struct file_operations cxl_fops;
120 /* Parameters that are LUN table related */
121 int last_lun_index[CXLFLASH_NUM_FC_PORTS];
122 int promote_lun_index;
123 struct list_head lluns; /* list of llun_info structs */
125 wait_queue_head_t tmf_waitq;
126 spinlock_t tmf_slock;
128 wait_queue_head_t reset_waitq;
129 enum cxlflash_state state;
133 struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */
134 struct sisl_ioasa sa; /* IOASA must follow IOARCB */
136 struct scsi_cmnd *scp;
137 struct completion cevent;
138 struct list_head queue;
142 /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
143 * However for performance reasons the IOARCB/IOASA should be
144 * cache line aligned.
146 } __aligned(cache_line_size());
148 static inline struct afu_cmd *sc_to_afuc(struct scsi_cmnd *sc)
150 return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd));
153 static inline struct afu_cmd *sc_to_afucz(struct scsi_cmnd *sc)
155 struct afu_cmd *afuc = sc_to_afuc(sc);
157 memset(afuc, 0, sizeof(*afuc));
162 /* Stuff requiring alignment go first. */
163 struct sisl_ioarcb sq[NUM_SQ_ENTRY]; /* 16K SQ */
164 u64 rrq_entry[NUM_RRQ_ENTRY]; /* 2K RRQ */
166 /* Beware of alignment till here. Preferably introduce new
167 * fields after this point
170 int (*send_cmd)(struct afu *, struct afu_cmd *);
171 void (*context_reset)(struct afu_cmd *);
174 struct cxl_ioctl_start_work work;
175 struct cxlflash_afu_map __iomem *afu_map; /* entire MMIO map */
176 struct sisl_host_map __iomem *host_map; /* MC host map */
177 struct sisl_ctrl_map __iomem *ctrl_map; /* MC control map */
179 ctx_hndl_t ctx_hndl; /* master's context handle */
181 atomic_t hsq_credits;
182 spinlock_t hsq_slock;
183 struct sisl_ioarcb *hsq_start;
184 struct sisl_ioarcb *hsq_end;
185 struct sisl_ioarcb *hsq_curr;
186 spinlock_t hrrq_slock;
191 atomic_t cmds_active; /* Number of currently active AFU commands */
193 spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */
195 u32 internal_lun; /* User-desired LUN mode for this AFU */
198 u64 interface_version;
201 struct irq_poll irqpoll;
202 struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */
206 static inline bool afu_is_irqpoll_enabled(struct afu *afu)
208 return !!afu->irqpoll_weight;
211 static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode)
213 u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT;
215 return afu_cap & cmd_mode;
218 static inline bool afu_is_sq_cmd_mode(struct afu *afu)
220 return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE);
223 static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu)
225 return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE);
228 static inline u64 lun_to_lunid(u64 lun)
232 int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
233 return be64_to_cpu(lun_id);
236 int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8);
237 void cxlflash_list_init(void);
238 void cxlflash_term_global_luns(void);
239 void cxlflash_free_errpage(void);
240 int cxlflash_ioctl(struct scsi_device *, int, void __user *);
241 void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *);
242 int cxlflash_mark_contexts_error(struct cxlflash_cfg *);
243 void cxlflash_term_local_luns(struct cxlflash_cfg *);
244 void cxlflash_restore_luntable(struct cxlflash_cfg *);
246 #endif /* ifndef _CXLFLASH_COMMON_H */