drivers/scsi/gdth.c

   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-06 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.6.x supported                                         *
  31  *                                                                      *
  32  ************************************************************************/
  33
  34 /* All GDT Disk Array Controllers are fully supported by this driver.
  35  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
  36  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
  37  * list of all controller types.
  38  *
  39  * If you have one or more GDT3000/3020 EISA controllers with
  40  * controller BIOS disabled, you have to set the IRQ values with the
  41  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
  42  * the IRQ values for the EISA controllers.
  43  *
  44  * After the optional list of IRQ values, other possible
  45  * command line options are:
  46  * disable:Y                    disable driver
  47  * disable:N                    enable driver
  48  * reserve_mode:0               reserve no drives for the raw service
  49  * reserve_mode:1               reserve all not init., removable drives
  50  * reserve_mode:2               reserve all not init. drives
  51  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
  52  *                              h- controller no., b- channel no.,
  53  *                              t- target ID, l- LUN
  54  * reverse_scan:Y               reverse scan order for PCI controllers
  55  * reverse_scan:N               scan PCI controllers like BIOS
  56  * max_ids:x                    x - target ID count per channel (1..MAXID)
  57  * rescan:Y                     rescan all channels/IDs
  58  * rescan:N                     use all devices found until now
  59  * hdr_channel:x                x - number of virtual bus for host drives
  60  * shared_access:Y              disable driver reserve/release protocol to
  61  *                              access a shared resource from several nodes,
  62  *                              appropriate controller firmware required
  63  * shared_access:N              enable driver reserve/release protocol
  64  * probe_eisa_isa:Y             scan for EISA/ISA controllers
  65  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
  66  * force_dma32:Y                use only 32 bit DMA mode
  67  * force_dma32:N                use 64 bit DMA mode, if supported
  68  *
  69  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
  70  *                          max_ids:127,rescan:N,hdr_channel:0,
  71  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
  72  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
  73  *
  74  * When loading the gdth driver as a module, the same options are available.
  75  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
  76  * options changes slightly. You must replace all ',' between options
  77  * with ' ' and all ':' with '=' and you must use
  78  * '1' in place of 'Y' and '0' in place of 'N'.
  79  *
  80  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
  81  *           max_ids=127 rescan=0 hdr_channel=0 shared_access=0
  82  *           probe_eisa_isa=0 force_dma32=0"
  83  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
  84  */
  85
  86 /* The meaning of the Scsi_Pointer members in this driver is as follows:
  87  * ptr:                     Chaining
  88  * this_residual:           Command priority
  89  * buffer:                  phys. DMA sense buffer
  90  * dma_handle:              phys. DMA buffer (kernel >= 2.4.0)
  91  * buffers_residual:        Timeout value
  92  * Status:                  Command status (gdth_do_cmd()), DMA mem. mappings
  93  * Message:                 Additional info (gdth_do_cmd()), DMA direction
  94  * have_data_in:            Flag for gdth_wait_completion()
  95  * sent_command:            Opcode special command
  96  * phase:                   Service/parameter/return code special command
  97  */
  98
  99
 100 /* interrupt coalescing */
 101 /* #define INT_COAL */
 102
 103 /* statistics */
 104 #define GDTH_STATISTICS
 105
 106 #include <linux/module.h>
 107
 108 #include <linux/version.h>
 109 #include <linux/kernel.h>
 110 #include <linux/types.h>
 111 #include <linux/pci.h>
 112 #include <linux/string.h>
 113 #include <linux/ctype.h>
 114 #include <linux/ioport.h>
 115 #include <linux/delay.h>
 116 #include <linux/interrupt.h>
 117 #include <linux/in.h>
 118 #include <linux/proc_fs.h>
 119 #include <linux/time.h>
 120 #include <linux/timer.h>
 121 #include <linux/dma-mapping.h>
 122
 123 #ifdef GDTH_RTC
 124 #include <linux/mc146818rtc.h>
 125 #endif
 126 #include <linux/reboot.h>
 127
 128 #include <asm/dma.h>
 129 #include <asm/system.h>
 130 #include <asm/io.h>
 131 #include <asm/uaccess.h>
 132 #include <linux/spinlock.h>
 133 #include <linux/blkdev.h>
 134
 135 #include "scsi.h"
 136 #include <scsi/scsi_host.h>
 137 #include "gdth.h"
 138
 139 static void gdth_delay(int milliseconds);
 140 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
 141 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
 142 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
 143 static int gdth_async_event(int hanum);
 144 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 145
 146 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
 147 static void gdth_next(int hanum);
 148 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
 149 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
 150 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
 151                                       ushort idx, gdth_evt_data *evt);
 152 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 153 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
 154                                gdth_evt_str *estr);
 155 static void gdth_clear_events(void);
 156
 157 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
 158                                     char *buffer,ushort count);
 159 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
 160 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
 161
 162 static void gdth_enable_int(int hanum);
 163 static int gdth_get_status(unchar *pIStatus,int irq);
 164 static int gdth_test_busy(int hanum);
 165 static int gdth_get_cmd_index(int hanum);
 166 static void gdth_release_event(int hanum);
 167 static int gdth_wait(int hanum,int index,ulong32 time);
 168 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
 169                              ulong64 p2,ulong64 p3);
 170 static int gdth_search_drives(int hanum);
 171 static int gdth_analyse_hdrive(int hanum, ushort hdrive);
 172
 173 static const char *gdth_ctr_name(int hanum);
 174
 175 static int gdth_open(struct inode *inode, struct file *filep);
 176 static int gdth_close(struct inode *inode, struct file *filep);
 177 static int gdth_ioctl(struct inode *inode, struct file *filep,
 178                       unsigned int cmd, unsigned long arg);
 179
 180 static void gdth_flush(int hanum);
 181 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
 182 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *));
 183 static void gdth_scsi_done(struct scsi_cmnd *scp);
 184 #ifdef CONFIG_ISA
 185 static int gdth_isa_probe_one(struct scsi_host_template *, ulong32);
 186 #endif
 187 #ifdef CONFIG_EISA
 188 static int gdth_eisa_probe_one(struct scsi_host_template *, ushort);
 189 #endif
 190 #ifdef CONFIG_PCI
 191 static int gdth_pci_probe_one(struct scsi_host_template *, gdth_pci_str *, int);
 192 #endif
 193
 194 #ifdef DEBUG_GDTH
 195 static unchar   DebugState = DEBUG_GDTH;
 196
 197 #ifdef __SERIAL__
 198 #define MAX_SERBUF 160
 199 static void ser_init(void);
 200 static void ser_puts(char *str);
 201 static void ser_putc(char c);
 202 static int  ser_printk(const char *fmt, ...);
 203 static char strbuf[MAX_SERBUF+1];
 204 #ifdef __COM2__
 205 #define COM_BASE 0x2f8
 206 #else
 207 #define COM_BASE 0x3f8
 208 #endif
 209 static void ser_init()
 210 {
 211     unsigned port=COM_BASE;
 212
 213     outb(0x80,port+3);
 214     outb(0,port+1);
 215     /* 19200 Baud, if 9600: outb(12,port) */
 216     outb(6, port);
 217     outb(3,port+3);
 218     outb(0,port+1);
 219     /*
 220     ser_putc('I');
 221     ser_putc(' ');
 222     */
 223 }
 224
 225 static void ser_puts(char *str)
 226 {
 227     char *ptr;
 228
 229     ser_init();
 230     for (ptr=str;*ptr;++ptr)
 231         ser_putc(*ptr);
 232 }
 233
 234 static void ser_putc(char c)
 235 {
 236     unsigned port=COM_BASE;
 237
 238     while ((inb(port+5) & 0x20)==0);
 239     outb(c,port);
 240     if (c==0x0a)
 241     {
 242         while ((inb(port+5) & 0x20)==0);
 243         outb(0x0d,port);
 244     }
 245 }
 246
 247 static int ser_printk(const char *fmt, ...)
 248 {
 249     va_list args;
 250     int i;
 251
 252     va_start(args,fmt);
 253     i = vsprintf(strbuf,fmt,args);
 254     ser_puts(strbuf);
 255     va_end(args);
 256     return i;
 257 }
 258
 259 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 260 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 261 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 262
 263 #else /* !__SERIAL__ */
 264 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 265 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 266 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 267 #endif
 268
 269 #else /* !DEBUG */
 270 #define TRACE(a)
 271 #define TRACE2(a)
 272 #define TRACE3(a)
 273 #endif
 274
 275 #ifdef GDTH_STATISTICS
 276 static ulong32 max_rq=0, max_index=0, max_sg=0;
 277 #ifdef INT_COAL
 278 static ulong32 max_int_coal=0;
 279 #endif
 280 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 281 static struct timer_list gdth_timer;
 282 #endif
 283
 284 #define PTR2USHORT(a)   (ushort)(ulong)(a)
 285 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 286 #define INDEX_OK(i,t)   ((i)<ARRAY_SIZE(t))
 287
 288 #define NUMDATA(a)      ( (gdth_num_str  *)((a)->hostdata))
 289 #define HADATA(a)       (&((gdth_ext_str *)((a)->hostdata))->haext)
 290 #define CMDDATA(a)      (&((gdth_ext_str *)((a)->hostdata))->cmdext)
 291
 292 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 293
 294 #ifdef CONFIG_ISA
 295 static unchar   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 296 #endif
 297 #ifdef CONFIG_EISA
 298 static unchar   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 299 #endif
 300 static unchar   gdth_polling;                           /* polling if TRUE */
 301 static unchar   gdth_from_wait  = FALSE;                /* gdth_wait() */
 302 static int      wait_index,wait_hanum;                  /* gdth_wait() */
 303 static int      gdth_ctr_count  = 0;                    /* controller count */
 304 static int      gdth_ctr_released = 0;                  /* gdth_release() */
 305 static struct Scsi_Host *gdth_ctr_tab[MAXHA];           /* controller table */
 306 static unchar   gdth_write_through = FALSE;             /* write through */
 307 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 308 static int elastidx;
 309 static int eoldidx;
 310 static int major;
 311
 312 #define DIN     1                               /* IN data direction */
 313 #define DOU     2                               /* OUT data direction */
 314 #define DNO     DIN                             /* no data transfer */
 315 #define DUN     DIN                             /* unknown data direction */
 316 static unchar gdth_direction_tab[0x100] = {
 317     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 318     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 319     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 320     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 321     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 322     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 323     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 324     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 325     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 326     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 327     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 328     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 329     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 330     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 331     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 332     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 333 };
 334
 335 /* LILO and modprobe/insmod parameters */
 336 /* IRQ list for GDT3000/3020 EISA controllers */
 337 static int irq[MAXHA] __initdata =
 338 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 339  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 340 /* disable driver flag */
 341 static int disable __initdata = 0;
 342 /* reserve flag */
 343 static int reserve_mode = 1;
 344 /* reserve list */
 345 static int reserve_list[MAX_RES_ARGS] =
 346 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 347  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 348  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 349 /* scan order for PCI controllers */
 350 static int reverse_scan = 0;
 351 /* virtual channel for the host drives */
 352 static int hdr_channel = 0;
 353 /* max. IDs per channel */
 354 static int max_ids = MAXID;
 355 /* rescan all IDs */
 356 static int rescan = 0;
 357 /* shared access */
 358 static int shared_access = 1;
 359 /* enable support for EISA and ISA controllers */
 360 static int probe_eisa_isa = 0;
 361 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 362 static int force_dma32 = 0;
 363
 364 /* parameters for modprobe/insmod */
 365 module_param_array(irq, int, NULL, 0);
 366 module_param(disable, int, 0);
 367 module_param(reserve_mode, int, 0);
 368 module_param_array(reserve_list, int, NULL, 0);
 369 module_param(reverse_scan, int, 0);
 370 module_param(hdr_channel, int, 0);
 371 module_param(max_ids, int, 0);
 372 module_param(rescan, int, 0);
 373 module_param(shared_access, int, 0);
 374 module_param(probe_eisa_isa, int, 0);
 375 module_param(force_dma32, int, 0);
 376 MODULE_AUTHOR("Achim Leubner");
 377 MODULE_LICENSE("GPL");
 378
 379 /* ioctl interface */
 380 static const struct file_operations gdth_fops = {
 381     .ioctl   = gdth_ioctl,
 382     .open    = gdth_open,
 383     .release = gdth_close,
 384 };
 385
 386 #define GDTH_MAGIC      0xc2e7c389      /* I got it from /dev/urandom */
 387 #define IS_GDTH_INTERNAL_CMD(scp)       (scp->underflow == GDTH_MAGIC)
 388
 389 #include "gdth_proc.h"
 390 #include "gdth_proc.c"
 391
 392 /* notifier block to get a notify on system shutdown/halt/reboot */
 393 static struct notifier_block gdth_notifier = {
 394     gdth_halt, NULL, 0
 395 };
 396 static int notifier_disabled = 0;
 397
 398 static void gdth_delay(int milliseconds)
 399 {
 400     if (milliseconds == 0) {
 401         udelay(1);
 402     } else {
 403         mdelay(milliseconds);
 404     }
 405 }
 406
 407 static void gdth_scsi_done(struct scsi_cmnd *scp)
 408 {
 409         TRACE2(("gdth_scsi_done()\n"));
 410
 411         if (IS_GDTH_INTERNAL_CMD(scp))
 412                 complete((struct completion *)scp->request);
 413         else
 414                 scp->scsi_done(scp);
 415 }
 416
 417 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 418                    int timeout, u32 *info)
 419 {
 420     Scsi_Cmnd *scp;
 421     DECLARE_COMPLETION_ONSTACK(wait);
 422     int rval;
 423
 424     scp = kzalloc(sizeof(*scp), GFP_KERNEL);
 425     if (!scp)
 426         return -ENOMEM;
 427
 428     scp->device = sdev;
 429     /* use request field to save the ptr. to completion struct. */
 430     scp->request = (struct request *)&wait;
 431     scp->timeout_per_command = timeout*HZ;
 432     scp->request_buffer = gdtcmd;
 433     scp->cmd_len = 12;
 434     memcpy(scp->cmnd, cmnd, 12);
 435     scp->SCp.this_residual = IOCTL_PRI;   /* priority */
 436     scp->underflow = GDTH_MAGIC;
 437     gdth_queuecommand(scp, NULL);
 438     wait_for_completion(&wait);
 439
 440     rval = scp->SCp.Status;
 441     if (info)
 442         *info = scp->SCp.Message;
 443     kfree(scp);
 444     return rval;
 445 }
 446
 447 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
 448                  int timeout, u32 *info)
 449 {
 450     struct scsi_device *sdev = scsi_get_host_dev(shost);
 451     int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
 452
 453     scsi_free_host_dev(sdev);
 454     return rval;
 455 }
 456
 457 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
 458 {
 459     *cyls = size /HEADS/SECS;
 460     if (*cyls <= MAXCYLS) {
 461         *heads = HEADS;
 462         *secs = SECS;
 463     } else {                                        /* too high for 64*32 */
 464         *cyls = size /MEDHEADS/MEDSECS;
 465         if (*cyls <= MAXCYLS) {
 466             *heads = MEDHEADS;
 467             *secs = MEDSECS;
 468         } else {                                    /* too high for 127*63 */
 469             *cyls = size /BIGHEADS/BIGSECS;
 470             *heads = BIGHEADS;
 471             *secs = BIGSECS;
 472         }
 473     }
 474 }
 475
 476 /* controller search and initialization functions */
 477 #ifdef CONFIG_EISA
 478 static int __init gdth_search_eisa(ushort eisa_adr)
 479 {
 480     ulong32 id;
 481
 482     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 483     id = inl(eisa_adr+ID0REG);
 484     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 485         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 486             return 0;                           /* not EISA configured */
 487         return 1;
 488     }
 489     if (id == GDT3_ID)                          /* GDT3000 */
 490         return 1;
 491
 492     return 0;
 493 }
 494 #endif /* CONFIG_EISA */
 495
 496 #ifdef CONFIG_ISA
 497 static int __init gdth_search_isa(ulong32 bios_adr)
 498 {
 499     void __iomem *addr;
 500     ulong32 id;
 501
 502     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 503     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
 504         id = readl(addr);
 505         iounmap(addr);
 506         if (id == GDT2_ID)                          /* GDT2000 */
 507             return 1;
 508     }
 509     return 0;
 510 }
 511 #endif /* CONFIG_ISA */
 512
 513 #ifdef CONFIG_PCI
 514 static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 515                             ushort vendor, ushort dev);
 516
 517 static int __init gdth_search_pci(gdth_pci_str *pcistr)
 518 {
 519     ushort device, cnt;
 520
 521     TRACE(("gdth_search_pci()\n"));
 522
 523     cnt = 0;
 524     for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
 525         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 526     for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
 527          device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
 528         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 529     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 530                     PCI_DEVICE_ID_VORTEX_GDTNEWRX);
 531     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 532                     PCI_DEVICE_ID_VORTEX_GDTNEWRX2);
 533     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 534                     PCI_DEVICE_ID_INTEL_SRC);
 535     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 536                     PCI_DEVICE_ID_INTEL_SRC_XSCALE);
 537     return cnt;
 538 }
 539
 540 /* Vortex only makes RAID controllers.
 541  * We do not really want to specify all 550 ids here, so wildcard match.
 542  */
 543 static struct pci_device_id gdthtable[] __maybe_unused = {
 544     {PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
 545     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
 546     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
 547     {0}
 548 };
 549 MODULE_DEVICE_TABLE(pci,gdthtable);
 550
 551 static void __init gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 552                                    ushort vendor, ushort device)
 553 {
 554     ulong base0, base1, base2;
 555     struct pci_dev *pdev;
 556
 557     TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 558           *cnt, vendor, device));
 559
 560     pdev = NULL;
 561     while ((pdev = pci_find_device(vendor, device, pdev))
 562            != NULL) {
 563         if (pci_enable_device(pdev))
 564             continue;
 565         if (*cnt >= MAXHA)
 566             return;
 567         /* GDT PCI controller found, resources are already in pdev */
 568         pcistr[*cnt].pdev = pdev;
 569         pcistr[*cnt].irq = pdev->irq;
 570         base0 = pci_resource_flags(pdev, 0);
 571         base1 = pci_resource_flags(pdev, 1);
 572         base2 = pci_resource_flags(pdev, 2);
 573         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 574             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 575             if (!(base0 & IORESOURCE_MEM))
 576                 continue;
 577             pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
 578         } else {                                  /* GDT6110, GDT6120, .. */
 579             if (!(base0 & IORESOURCE_MEM) ||
 580                 !(base2 & IORESOURCE_MEM) ||
 581                 !(base1 & IORESOURCE_IO))
 582                 continue;
 583             pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
 584             pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
 585             pcistr[*cnt].io    = pci_resource_start(pdev, 1);
 586         }
 587         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 588                 pcistr[*cnt].pdev->bus->number,
 589                 PCI_SLOT(pcistr[*cnt].pdev->devfn),
 590                 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
 591         (*cnt)++;
 592     }
 593 }
 594
 595 static void __init gdth_sort_pci(gdth_pci_str *pcistr, int cnt)
 596 {
 597     gdth_pci_str temp;
 598     int i, changed;
 599
 600     TRACE(("gdth_sort_pci() cnt %d\n",cnt));
 601     if (cnt == 0)
 602         return;
 603
 604     do {
 605         changed = FALSE;
 606         for (i = 0; i < cnt-1; ++i) {
 607             if (!reverse_scan) {
 608                 if ((pcistr[i].pdev->bus->number > pcistr[i+1].pdev->bus->number) ||
 609                     (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
 610                      PCI_SLOT(pcistr[i].pdev->devfn) >
 611                      PCI_SLOT(pcistr[i+1].pdev->devfn))) {
 612                     temp = pcistr[i];
 613                     pcistr[i] = pcistr[i+1];
 614                     pcistr[i+1] = temp;
 615                     changed = TRUE;
 616                 }
 617             } else {
 618                 if ((pcistr[i].pdev->bus->number < pcistr[i+1].pdev->bus->number) ||
 619                     (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
 620                      PCI_SLOT(pcistr[i].pdev->devfn) <
 621                      PCI_SLOT(pcistr[i+1].pdev->devfn))) {
 622                     temp = pcistr[i];
 623                     pcistr[i] = pcistr[i+1];
 624                     pcistr[i+1] = temp;
 625                     changed = TRUE;
 626                 }
 627             }
 628         }
 629     } while (changed);
 630 }
 631 #endif /* CONFIG_PCI */
 632
 633 #ifdef CONFIG_EISA
 634 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
 635 {
 636     ulong32 retries,id;
 637     unchar prot_ver,eisacf,i,irq_found;
 638
 639     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 640
 641     /* disable board interrupts, deinitialize services */
 642     outb(0xff,eisa_adr+EDOORREG);
 643     outb(0x00,eisa_adr+EDENABREG);
 644     outb(0x00,eisa_adr+EINTENABREG);
 645
 646     outb(0xff,eisa_adr+LDOORREG);
 647     retries = INIT_RETRIES;
 648     gdth_delay(20);
 649     while (inb(eisa_adr+EDOORREG) != 0xff) {
 650         if (--retries == 0) {
 651             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 652             return 0;
 653         }
 654         gdth_delay(1);
 655         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 656     }
 657     prot_ver = inb(eisa_adr+MAILBOXREG);
 658     outb(0xff,eisa_adr+EDOORREG);
 659     if (prot_ver != PROTOCOL_VERSION) {
 660         printk("GDT-EISA: Illegal protocol version\n");
 661         return 0;
 662     }
 663     ha->bmic = eisa_adr;
 664     ha->brd_phys = (ulong32)eisa_adr >> 12;
 665
 666     outl(0,eisa_adr+MAILBOXREG);
 667     outl(0,eisa_adr+MAILBOXREG+4);
 668     outl(0,eisa_adr+MAILBOXREG+8);
 669     outl(0,eisa_adr+MAILBOXREG+12);
 670
 671     /* detect IRQ */
 672     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
 673         ha->oem_id = OEM_ID_ICP;
 674         ha->type = GDT_EISA;
 675         ha->stype = id;
 676         outl(1,eisa_adr+MAILBOXREG+8);
 677         outb(0xfe,eisa_adr+LDOORREG);
 678         retries = INIT_RETRIES;
 679         gdth_delay(20);
 680         while (inb(eisa_adr+EDOORREG) != 0xfe) {
 681             if (--retries == 0) {
 682                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
 683                 return 0;
 684             }
 685             gdth_delay(1);
 686         }
 687         ha->irq = inb(eisa_adr+MAILBOXREG);
 688         outb(0xff,eisa_adr+EDOORREG);
 689         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
 690         /* check the result */
 691         if (ha->irq == 0) {
 692                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
 693                 for (i = 0, irq_found = FALSE;
 694                      i < MAXHA && irq[i] != 0xff; ++i) {
 695                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
 696                     irq_found = TRUE;
 697                     break;
 698                 }
 699                 }
 700             if (irq_found) {
 701                 ha->irq = irq[i];
 702                 irq[i] = 0;
 703                 printk("GDT-EISA: Can not detect controller IRQ,\n");
 704                 printk("Use IRQ setting from command line (IRQ = %d)\n",
 705                        ha->irq);
 706             } else {
 707                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
 708                 printk("the controller BIOS or use command line parameters\n");
 709                 return 0;
 710             }
 711         }
 712     } else {
 713         eisacf = inb(eisa_adr+EISAREG) & 7;
 714         if (eisacf > 4)                         /* level triggered */
 715             eisacf -= 4;
 716         ha->irq = gdth_irq_tab[eisacf];
 717         ha->oem_id = OEM_ID_ICP;
 718         ha->type = GDT_EISA;
 719         ha->stype = id;
 720     }
 721
 722     ha->dma64_support = 0;
 723     return 1;
 724 }
 725 #endif /* CONFIG_EISA */
 726
 727 #ifdef CONFIG_ISA
 728 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
 729 {
 730     register gdt2_dpram_str __iomem *dp2_ptr;
 731     int i;
 732     unchar irq_drq,prot_ver;
 733     ulong32 retries;
 734
 735     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
 736
 737     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
 738     if (ha->brd == NULL) {
 739         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
 740         return 0;
 741     }
 742     dp2_ptr = ha->brd;
 743     writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
 744     /* reset interface area */
 745     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
 746     if (readl(&dp2_ptr->u) != 0) {
 747         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
 748         iounmap(ha->brd);
 749         return 0;
 750     }
 751
 752     /* disable board interrupts, read DRQ and IRQ */
 753     writeb(0xff, &dp2_ptr->io.irqdel);
 754     writeb(0x00, &dp2_ptr->io.irqen);
 755     writeb(0x00, &dp2_ptr->u.ic.S_Status);
 756     writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
 757
 758     irq_drq = readb(&dp2_ptr->io.rq);
 759     for (i=0; i<3; ++i) {
 760         if ((irq_drq & 1)==0)
 761             break;
 762         irq_drq >>= 1;
 763     }
 764     ha->drq = gdth_drq_tab[i];
 765
 766     irq_drq = readb(&dp2_ptr->io.rq) >> 3;
 767     for (i=1; i<5; ++i) {
 768         if ((irq_drq & 1)==0)
 769             break;
 770         irq_drq >>= 1;
 771     }
 772     ha->irq = gdth_irq_tab[i];
 773
 774     /* deinitialize services */
 775     writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
 776     writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
 777     writeb(0, &dp2_ptr->io.event);
 778     retries = INIT_RETRIES;
 779     gdth_delay(20);
 780     while (readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
 781         if (--retries == 0) {
 782             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
 783             iounmap(ha->brd);
 784             return 0;
 785         }
 786         gdth_delay(1);
 787     }
 788     prot_ver = (unchar)readl(&dp2_ptr->u.ic.S_Info[0]);
 789     writeb(0, &dp2_ptr->u.ic.Status);
 790     writeb(0xff, &dp2_ptr->io.irqdel);
 791     if (prot_ver != PROTOCOL_VERSION) {
 792         printk("GDT-ISA: Illegal protocol version\n");
 793         iounmap(ha->brd);
 794         return 0;
 795     }
 796
 797     ha->oem_id = OEM_ID_ICP;
 798     ha->type = GDT_ISA;
 799     ha->ic_all_size = sizeof(dp2_ptr->u);
 800     ha->stype= GDT2_ID;
 801     ha->brd_phys = bios_adr >> 4;
 802
 803     /* special request to controller BIOS */
 804     writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
 805     writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
 806     writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
 807     writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
 808     writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
 809     writeb(0, &dp2_ptr->io.event);
 810     retries = INIT_RETRIES;
 811     gdth_delay(20);
 812     while (readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
 813         if (--retries == 0) {
 814             printk("GDT-ISA: Initialization error\n");
 815             iounmap(ha->brd);
 816             return 0;
 817         }
 818         gdth_delay(1);
 819     }
 820     writeb(0, &dp2_ptr->u.ic.Status);
 821     writeb(0xff, &dp2_ptr->io.irqdel);
 822
 823     ha->dma64_support = 0;
 824     return 1;
 825 }
 826 #endif /* CONFIG_ISA */
 827
 828 #ifdef CONFIG_PCI
 829 static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha)
 830 {
 831     register gdt6_dpram_str __iomem *dp6_ptr;
 832     register gdt6c_dpram_str __iomem *dp6c_ptr;
 833     register gdt6m_dpram_str __iomem *dp6m_ptr;
 834     ulong32 retries;
 835     unchar prot_ver;
 836     ushort command;
 837     int i, found = FALSE;
 838
 839     TRACE(("gdth_init_pci()\n"));
 840
 841     if (pcistr->pdev->vendor == PCI_VENDOR_ID_INTEL)
 842         ha->oem_id = OEM_ID_INTEL;
 843     else
 844         ha->oem_id = OEM_ID_ICP;
 845     ha->brd_phys = (pcistr->pdev->bus->number << 8) | (pcistr->pdev->devfn & 0xf8);
 846     ha->stype = (ulong32)pcistr->pdev->device;
 847     ha->irq = pcistr->irq;
 848     ha->pdev = pcistr->pdev;
 849
 850     if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
 851         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
 852         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
 853         if (ha->brd == NULL) {
 854             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 855             return 0;
 856         }
 857         /* check and reset interface area */
 858         dp6_ptr = ha->brd;
 859         writel(DPMEM_MAGIC, &dp6_ptr->u);
 860         if (readl(&dp6_ptr->u) != DPMEM_MAGIC) {
 861             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 862                    pcistr->dpmem);
 863             found = FALSE;
 864             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 865                 iounmap(ha->brd);
 866                 ha->brd = ioremap(i, sizeof(ushort));
 867                 if (ha->brd == NULL) {
 868                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 869                     return 0;
 870                 }
 871                 if (readw(ha->brd) != 0xffff) {
 872                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
 873                     continue;
 874                 }
 875                 iounmap(ha->brd);
 876                 pci_write_config_dword(pcistr->pdev,
 877                                        PCI_BASE_ADDRESS_0, i);
 878                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
 879                 if (ha->brd == NULL) {
 880                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 881                     return 0;
 882                 }
 883                 dp6_ptr = ha->brd;
 884                 writel(DPMEM_MAGIC, &dp6_ptr->u);
 885                 if (readl(&dp6_ptr->u) == DPMEM_MAGIC) {
 886                     printk("GDT-PCI: Use free address at 0x%x\n", i);
 887                     found = TRUE;
 888                     break;
 889                 }
 890             }
 891             if (!found) {
 892                 printk("GDT-PCI: No free address found!\n");
 893                 iounmap(ha->brd);
 894                 return 0;
 895             }
 896         }
 897         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
 898         if (readl(&dp6_ptr->u) != 0) {
 899             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
 900             iounmap(ha->brd);
 901             return 0;
 902         }
 903
 904         /* disable board interrupts, deinit services */
 905         writeb(0xff, &dp6_ptr->io.irqdel);
 906         writeb(0x00, &dp6_ptr->io.irqen);
 907         writeb(0x00, &dp6_ptr->u.ic.S_Status);
 908         writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
 909
 910         writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
 911         writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
 912         writeb(0, &dp6_ptr->io.event);
 913         retries = INIT_RETRIES;
 914         gdth_delay(20);
 915         while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
 916             if (--retries == 0) {
 917                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
 918                 iounmap(ha->brd);
 919                 return 0;
 920             }
 921             gdth_delay(1);
 922         }
 923         prot_ver = (unchar)readl(&dp6_ptr->u.ic.S_Info[0]);
 924         writeb(0, &dp6_ptr->u.ic.S_Status);
 925         writeb(0xff, &dp6_ptr->io.irqdel);
 926         if (prot_ver != PROTOCOL_VERSION) {
 927             printk("GDT-PCI: Illegal protocol version\n");
 928             iounmap(ha->brd);
 929             return 0;
 930         }
 931
 932         ha->type = GDT_PCI;
 933         ha->ic_all_size = sizeof(dp6_ptr->u);
 934
 935         /* special command to controller BIOS */
 936         writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
 937         writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
 938         writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
 939         writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
 940         writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
 941         writeb(0, &dp6_ptr->io.event);
 942         retries = INIT_RETRIES;
 943         gdth_delay(20);
 944         while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
 945             if (--retries == 0) {
 946                 printk("GDT-PCI: Initialization error\n");
 947                 iounmap(ha->brd);
 948                 return 0;
 949             }
 950             gdth_delay(1);
 951         }
 952         writeb(0, &dp6_ptr->u.ic.S_Status);
 953         writeb(0xff, &dp6_ptr->io.irqdel);
 954
 955         ha->dma64_support = 0;
 956
 957     } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
 958         ha->plx = (gdt6c_plx_regs *)pcistr->io;
 959         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
 960             pcistr->dpmem,ha->irq));
 961         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
 962         if (ha->brd == NULL) {
 963             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 964             iounmap(ha->brd);
 965             return 0;
 966         }
 967         /* check and reset interface area */
 968         dp6c_ptr = ha->brd;
 969         writel(DPMEM_MAGIC, &dp6c_ptr->u);
 970         if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
 971             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 972                    pcistr->dpmem);
 973             found = FALSE;
 974             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 975                 iounmap(ha->brd);
 976                 ha->brd = ioremap(i, sizeof(ushort));
 977                 if (ha->brd == NULL) {
 978                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 979                     return 0;
 980                 }
 981                 if (readw(ha->brd) != 0xffff) {
 982                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
 983                     continue;
 984                 }
 985                 iounmap(ha->brd);
 986                 pci_write_config_dword(pcistr->pdev,
 987                                        PCI_BASE_ADDRESS_2, i);
 988                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
 989                 if (ha->brd == NULL) {
 990                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 991                     return 0;
 992                 }
 993                 dp6c_ptr = ha->brd;
 994                 writel(DPMEM_MAGIC, &dp6c_ptr->u);
 995                 if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
 996                     printk("GDT-PCI: Use free address at 0x%x\n", i);
 997                     found = TRUE;
 998                     break;
 999                 }
1000             }
1001             if (!found) {
1002                 printk("GDT-PCI: No free address found!\n");
1003                 iounmap(ha->brd);
1004                 return 0;
1005             }
1006         }
1007         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1008         if (readl(&dp6c_ptr->u) != 0) {
1009             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1010             iounmap(ha->brd);
1011             return 0;
1012         }
1013
1014         /* disable board interrupts, deinit services */
1015         outb(0x00,PTR2USHORT(&ha->plx->control1));
1016         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1017
1018         writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1019         writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1020
1021         writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1022         writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1023
1024         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1025
1026         retries = INIT_RETRIES;
1027         gdth_delay(20);
1028         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1029             if (--retries == 0) {
1030                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1031                 iounmap(ha->brd);
1032                 return 0;
1033             }
1034             gdth_delay(1);
1035         }
1036         prot_ver = (unchar)readl(&dp6c_ptr->u.ic.S_Info[0]);
1037         writeb(0, &dp6c_ptr->u.ic.Status);
1038         if (prot_ver != PROTOCOL_VERSION) {
1039             printk("GDT-PCI: Illegal protocol version\n");
1040             iounmap(ha->brd);
1041             return 0;
1042         }
1043
1044         ha->type = GDT_PCINEW;
1045         ha->ic_all_size = sizeof(dp6c_ptr->u);
1046
1047         /* special command to controller BIOS */
1048         writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1049         writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1050         writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1051         writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1052         writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1053
1054         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1055
1056         retries = INIT_RETRIES;
1057         gdth_delay(20);
1058         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1059             if (--retries == 0) {
1060                 printk("GDT-PCI: Initialization error\n");
1061                 iounmap(ha->brd);
1062                 return 0;
1063             }
1064             gdth_delay(1);
1065         }
1066         writeb(0, &dp6c_ptr->u.ic.S_Status);
1067
1068         ha->dma64_support = 0;
1069
1070     } else {                                            /* MPR */
1071         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1072         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1073         if (ha->brd == NULL) {
1074             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1075             return 0;
1076         }
1077
1078         /* manipulate config. space to enable DPMEM, start RP controller */
1079         pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1080         command |= 6;
1081         pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1082         if (pci_resource_start(pcistr->pdev, 8) == 1UL)
1083             pci_resource_start(pcistr->pdev, 8) = 0UL;
1084         i = 0xFEFF0001UL;
1085         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1086         gdth_delay(1);
1087         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1088                                pci_resource_start(pcistr->pdev, 8));
1089
1090         dp6m_ptr = ha->brd;
1091
1092         /* Ensure that it is safe to access the non HW portions of DPMEM.
1093          * Aditional check needed for Xscale based RAID controllers */
1094         while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1095             gdth_delay(1);
1096
1097         /* check and reset interface area */
1098         writel(DPMEM_MAGIC, &dp6m_ptr->u);
1099         if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1100             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1101                    pcistr->dpmem);
1102             found = FALSE;
1103             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1104                 iounmap(ha->brd);
1105                 ha->brd = ioremap(i, sizeof(ushort));
1106                 if (ha->brd == NULL) {
1107                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1108                     return 0;
1109                 }
1110                 if (readw(ha->brd) != 0xffff) {
1111                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1112                     continue;
1113                 }
1114                 iounmap(ha->brd);
1115                 pci_write_config_dword(pcistr->pdev,
1116                                        PCI_BASE_ADDRESS_0, i);
1117                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1118                 if (ha->brd == NULL) {
1119                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1120                     return 0;
1121                 }
1122                 dp6m_ptr = ha->brd;
1123                 writel(DPMEM_MAGIC, &dp6m_ptr->u);
1124                 if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1125                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1126                     found = TRUE;
1127                     break;
1128                 }
1129             }
1130             if (!found) {
1131                 printk("GDT-PCI: No free address found!\n");
1132                 iounmap(ha->brd);
1133                 return 0;
1134             }
1135         }
1136         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1137
1138         /* disable board interrupts, deinit services */
1139         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1140                     &dp6m_ptr->i960r.edoor_en_reg);
1141         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1142         writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1143         writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1144
1145         writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1146         writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1147         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1148         retries = INIT_RETRIES;
1149         gdth_delay(20);
1150         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1151             if (--retries == 0) {
1152                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1153                 iounmap(ha->brd);
1154                 return 0;
1155             }
1156             gdth_delay(1);
1157         }
1158         prot_ver = (unchar)readl(&dp6m_ptr->u.ic.S_Info[0]);
1159         writeb(0, &dp6m_ptr->u.ic.S_Status);
1160         if (prot_ver != PROTOCOL_VERSION) {
1161             printk("GDT-PCI: Illegal protocol version\n");
1162             iounmap(ha->brd);
1163             return 0;
1164         }
1165
1166         ha->type = GDT_PCIMPR;
1167         ha->ic_all_size = sizeof(dp6m_ptr->u);
1168
1169         /* special command to controller BIOS */
1170         writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1171         writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1172         writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1173         writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1174         writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1175         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1176         retries = INIT_RETRIES;
1177         gdth_delay(20);
1178         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1179             if (--retries == 0) {
1180                 printk("GDT-PCI: Initialization error\n");
1181                 iounmap(ha->brd);
1182                 return 0;
1183             }
1184             gdth_delay(1);
1185         }
1186         writeb(0, &dp6m_ptr->u.ic.S_Status);
1187
1188         /* read FW version to detect 64-bit DMA support */
1189         writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1190         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1191         retries = INIT_RETRIES;
1192         gdth_delay(20);
1193         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1194             if (--retries == 0) {
1195                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1196                 iounmap(ha->brd);
1197                 return 0;
1198             }
1199             gdth_delay(1);
1200         }
1201         prot_ver = (unchar)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1202         writeb(0, &dp6m_ptr->u.ic.S_Status);
1203         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1204             ha->dma64_support = 0;
1205         else
1206             ha->dma64_support = 1;
1207     }
1208
1209     return 1;
1210 }
1211 #endif /* CONFIG_PCI */
1212
1213 /* controller protocol functions */
1214
1215 static void __init gdth_enable_int(int hanum)
1216 {
1217     gdth_ha_str *ha;
1218     ulong flags;
1219     gdt2_dpram_str __iomem *dp2_ptr;
1220     gdt6_dpram_str __iomem *dp6_ptr;
1221     gdt6m_dpram_str __iomem *dp6m_ptr;
1222
1223     TRACE(("gdth_enable_int() hanum %d\n",hanum));
1224     ha = HADATA(gdth_ctr_tab[hanum]);
1225     spin_lock_irqsave(&ha->smp_lock, flags);
1226
1227     if (ha->type == GDT_EISA) {
1228         outb(0xff, ha->bmic + EDOORREG);
1229         outb(0xff, ha->bmic + EDENABREG);
1230         outb(0x01, ha->bmic + EINTENABREG);
1231     } else if (ha->type == GDT_ISA) {
1232         dp2_ptr = ha->brd;
1233         writeb(1, &dp2_ptr->io.irqdel);
1234         writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1235         writeb(1, &dp2_ptr->io.irqen);
1236     } else if (ha->type == GDT_PCI) {
1237         dp6_ptr = ha->brd;
1238         writeb(1, &dp6_ptr->io.irqdel);
1239         writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1240         writeb(1, &dp6_ptr->io.irqen);
1241     } else if (ha->type == GDT_PCINEW) {
1242         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1243         outb(0x03, PTR2USHORT(&ha->plx->control1));
1244     } else if (ha->type == GDT_PCIMPR) {
1245         dp6m_ptr = ha->brd;
1246         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1247         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1248                     &dp6m_ptr->i960r.edoor_en_reg);
1249     }
1250     spin_unlock_irqrestore(&ha->smp_lock, flags);
1251 }
1252
1253
1254 static int gdth_get_status(unchar *pIStatus,int irq)
1255 {
1256     register gdth_ha_str *ha;
1257     int i;
1258
1259     TRACE(("gdth_get_status() irq %d ctr_count %d\n",
1260            irq,gdth_ctr_count));
1261
1262     *pIStatus = 0;
1263     for (i=0; i<gdth_ctr_count; ++i) {
1264         ha = HADATA(gdth_ctr_tab[i]);
1265         if (ha->irq != (unchar)irq)             /* check IRQ */
1266             continue;
1267         if (ha->type == GDT_EISA)
1268             *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1269         else if (ha->type == GDT_ISA)
1270             *pIStatus =
1271                 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1272         else if (ha->type == GDT_PCI)
1273             *pIStatus =
1274                 readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1275         else if (ha->type == GDT_PCINEW)
1276             *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1277         else if (ha->type == GDT_PCIMPR)
1278             *pIStatus =
1279                 readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1280
1281         if (*pIStatus)
1282             return i;                           /* board found */
1283     }
1284     return -1;
1285 }
1286
1287
1288 static int gdth_test_busy(int hanum)
1289 {
1290     register gdth_ha_str *ha;
1291     register int gdtsema0 = 0;
1292
1293     TRACE(("gdth_test_busy() hanum %d\n",hanum));
1294
1295     ha = HADATA(gdth_ctr_tab[hanum]);
1296     if (ha->type == GDT_EISA)
1297         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1298     else if (ha->type == GDT_ISA)
1299         gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1300     else if (ha->type == GDT_PCI)
1301         gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1302     else if (ha->type == GDT_PCINEW)
1303         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1304     else if (ha->type == GDT_PCIMPR)
1305         gdtsema0 =
1306             (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1307
1308     return (gdtsema0 & 1);
1309 }
1310
1311
1312 static int gdth_get_cmd_index(int hanum)
1313 {
1314     register gdth_ha_str *ha;
1315     int i;
1316
1317     TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
1318
1319     ha = HADATA(gdth_ctr_tab[hanum]);
1320     for (i=0; i<GDTH_MAXCMDS; ++i) {
1321         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1322             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1323             ha->cmd_tab[i].service = ha->pccb->Service;
1324             ha->pccb->CommandIndex = (ulong32)i+2;
1325             return (i+2);
1326         }
1327     }
1328     return 0;
1329 }
1330
1331
1332 static void gdth_set_sema0(int hanum)
1333 {
1334     register gdth_ha_str *ha;
1335
1336     TRACE(("gdth_set_sema0() hanum %d\n",hanum));
1337
1338     ha = HADATA(gdth_ctr_tab[hanum]);
1339     if (ha->type == GDT_EISA) {
1340         outb(1, ha->bmic + SEMA0REG);
1341     } else if (ha->type == GDT_ISA) {
1342         writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1343     } else if (ha->type == GDT_PCI) {
1344         writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1345     } else if (ha->type == GDT_PCINEW) {
1346         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1347     } else if (ha->type == GDT_PCIMPR) {
1348         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1349     }
1350 }
1351
1352
1353 static void gdth_copy_command(int hanum)
1354 {
1355     register gdth_ha_str *ha;
1356     register gdth_cmd_str *cmd_ptr;
1357     register gdt6m_dpram_str __iomem *dp6m_ptr;
1358     register gdt6c_dpram_str __iomem *dp6c_ptr;
1359     gdt6_dpram_str __iomem *dp6_ptr;
1360     gdt2_dpram_str __iomem *dp2_ptr;
1361     ushort cp_count,dp_offset,cmd_no;
1362
1363     TRACE(("gdth_copy_command() hanum %d\n",hanum));
1364
1365     ha = HADATA(gdth_ctr_tab[hanum]);
1366     cp_count = ha->cmd_len;
1367     dp_offset= ha->cmd_offs_dpmem;
1368     cmd_no   = ha->cmd_cnt;
1369     cmd_ptr  = ha->pccb;
1370
1371     ++ha->cmd_cnt;
1372     if (ha->type == GDT_EISA)
1373         return;                                 /* no DPMEM, no copy */
1374
1375     /* set cpcount dword aligned */
1376     if (cp_count & 3)
1377         cp_count += (4 - (cp_count & 3));
1378
1379     ha->cmd_offs_dpmem += cp_count;
1380
1381     /* set offset and service, copy command to DPMEM */
1382     if (ha->type == GDT_ISA) {
1383         dp2_ptr = ha->brd;
1384         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1385                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1386         writew((ushort)cmd_ptr->Service,
1387                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1388         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1389     } else if (ha->type == GDT_PCI) {
1390         dp6_ptr = ha->brd;
1391         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1392                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1393         writew((ushort)cmd_ptr->Service,
1394                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1395         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1396     } else if (ha->type == GDT_PCINEW) {
1397         dp6c_ptr = ha->brd;
1398         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1399                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1400         writew((ushort)cmd_ptr->Service,
1401                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1402         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1403     } else if (ha->type == GDT_PCIMPR) {
1404         dp6m_ptr = ha->brd;
1405         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1406                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1407         writew((ushort)cmd_ptr->Service,
1408                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1409         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1410     }
1411 }
1412
1413
1414 static void gdth_release_event(int hanum)
1415 {
1416     register gdth_ha_str *ha;
1417
1418     TRACE(("gdth_release_event() hanum %d\n",hanum));
1419     ha = HADATA(gdth_ctr_tab[hanum]);
1420
1421 #ifdef GDTH_STATISTICS
1422     {
1423         ulong32 i,j;
1424         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1425             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1426                 ++i;
1427         }
1428         if (max_index < i) {
1429             max_index = i;
1430             TRACE3(("GDT: max_index = %d\n",(ushort)i));
1431         }
1432     }
1433 #endif
1434
1435     if (ha->pccb->OpCode == GDT_INIT)
1436         ha->pccb->Service |= 0x80;
1437
1438     if (ha->type == GDT_EISA) {
1439         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1440             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1441         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1442     } else if (ha->type == GDT_ISA) {
1443         writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1444     } else if (ha->type == GDT_PCI) {
1445         writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1446     } else if (ha->type == GDT_PCINEW) {
1447         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1448     } else if (ha->type == GDT_PCIMPR) {
1449         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1450     }
1451 }
1452
1453
1454 static int gdth_wait(int hanum,int index,ulong32 time)
1455 {
1456     gdth_ha_str *ha;
1457     int answer_found = FALSE;
1458
1459     TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
1460
1461     ha = HADATA(gdth_ctr_tab[hanum]);
1462     if (index == 0)
1463         return 1;                               /* no wait required */
1464
1465     gdth_from_wait = TRUE;
1466     do {
1467         gdth_interrupt((int)ha->irq,ha);
1468         if (wait_hanum==hanum && wait_index==index) {
1469             answer_found = TRUE;
1470             break;
1471         }
1472         gdth_delay(1);
1473     } while (--time);
1474     gdth_from_wait = FALSE;
1475
1476     while (gdth_test_busy(hanum))
1477         gdth_delay(0);
1478
1479     return (answer_found);
1480 }
1481
1482
1483 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
1484                              ulong64 p2,ulong64 p3)
1485 {
1486     register gdth_ha_str *ha;
1487     register gdth_cmd_str *cmd_ptr;
1488     int retries,index;
1489
1490     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1491
1492     ha = HADATA(gdth_ctr_tab[hanum]);
1493     cmd_ptr = ha->pccb;
1494     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1495
1496     /* make command  */
1497     for (retries = INIT_RETRIES;;) {
1498         cmd_ptr->Service          = service;
1499         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1500         if (!(index=gdth_get_cmd_index(hanum))) {
1501             TRACE(("GDT: No free command index found\n"));
1502             return 0;
1503         }
1504         gdth_set_sema0(hanum);
1505         cmd_ptr->OpCode           = opcode;
1506         cmd_ptr->BoardNode        = LOCALBOARD;
1507         if (service == CACHESERVICE) {
1508             if (opcode == GDT_IOCTL) {
1509                 cmd_ptr->u.ioctl.subfunc = p1;
1510                 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1511                 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1512                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1513             } else {
1514                 if (ha->cache_feat & GDT_64BIT) {
1515                     cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1516                     cmd_ptr->u.cache64.BlockNo  = p2;
1517                 } else {
1518                     cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1519                     cmd_ptr->u.cache.BlockNo  = (ulong32)p2;
1520                 }
1521             }
1522         } else if (service == SCSIRAWSERVICE) {
1523             if (ha->raw_feat & GDT_64BIT) {
1524                 cmd_ptr->u.raw64.direction  = p1;
1525                 cmd_ptr->u.raw64.bus        = (unchar)p2;
1526                 cmd_ptr->u.raw64.target     = (unchar)p3;
1527                 cmd_ptr->u.raw64.lun        = (unchar)(p3 >> 8);
1528             } else {
1529                 cmd_ptr->u.raw.direction  = p1;
1530                 cmd_ptr->u.raw.bus        = (unchar)p2;
1531                 cmd_ptr->u.raw.target     = (unchar)p3;
1532                 cmd_ptr->u.raw.lun        = (unchar)(p3 >> 8);
1533             }
1534         } else if (service == SCREENSERVICE) {
1535             if (opcode == GDT_REALTIME) {
1536                 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1537                 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1538                 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1539             }
1540         }
1541         ha->cmd_len          = sizeof(gdth_cmd_str);
1542         ha->cmd_offs_dpmem   = 0;
1543         ha->cmd_cnt          = 0;
1544         gdth_copy_command(hanum);
1545         gdth_release_event(hanum);
1546         gdth_delay(20);
1547         if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
1548             printk("GDT: Initialization error (timeout service %d)\n",service);
1549             return 0;
1550         }
1551         if (ha->status != S_BSY || --retries == 0)
1552             break;
1553         gdth_delay(1);
1554     }
1555
1556     return (ha->status != S_OK ? 0:1);
1557 }
1558
1559
1560 /* search for devices */
1561
1562 static int __init gdth_search_drives(int hanum)
1563 {
1564     register gdth_ha_str *ha;
1565     ushort cdev_cnt, i;
1566     int ok;
1567     ulong32 bus_no, drv_cnt, drv_no, j;
1568     gdth_getch_str *chn;
1569     gdth_drlist_str *drl;
1570     gdth_iochan_str *ioc;
1571     gdth_raw_iochan_str *iocr;
1572     gdth_arcdl_str *alst;
1573     gdth_alist_str *alst2;
1574     gdth_oem_str_ioctl *oemstr;
1575 #ifdef INT_COAL
1576     gdth_perf_modes *pmod;
1577 #endif
1578
1579 #ifdef GDTH_RTC
1580     unchar rtc[12];
1581     ulong flags;
1582 #endif
1583
1584     TRACE(("gdth_search_drives() hanum %d\n",hanum));
1585     ha = HADATA(gdth_ctr_tab[hanum]);
1586     ok = 0;
1587
1588     /* initialize controller services, at first: screen service */
1589     ha->screen_feat = 0;
1590     if (!force_dma32) {
1591         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_X_INIT_SCR,0,0,0);
1592         if (ok)
1593             ha->screen_feat = GDT_64BIT;
1594     }
1595     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1596         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0);
1597     if (!ok) {
1598         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1599                hanum, ha->status);
1600         return 0;
1601     }
1602     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1603
1604 #ifdef GDTH_RTC
1605     /* read realtime clock info, send to controller */
1606     /* 1. wait for the falling edge of update flag */
1607     spin_lock_irqsave(&rtc_lock, flags);
1608     for (j = 0; j < 1000000; ++j)
1609         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1610             break;
1611     for (j = 0; j < 1000000; ++j)
1612         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1613             break;
1614     /* 2. read info */
1615     do {
1616         for (j = 0; j < 12; ++j)
1617             rtc[j] = CMOS_READ(j);
1618     } while (rtc[0] != CMOS_READ(0));
1619     spin_unlock_irqrestore(&rtc_lock, flags);
1620     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1621             *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1622     /* 3. send to controller firmware */
1623     gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
1624                       *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1625 #endif
1626
1627     /* unfreeze all IOs */
1628     gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
1629
1630     /* initialize cache service */
1631     ha->cache_feat = 0;
1632     if (!force_dma32) {
1633         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INIT_HOST,LINUX_OS,0,0);
1634         if (ok)
1635             ha->cache_feat = GDT_64BIT;
1636     }
1637     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1638         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0);
1639     if (!ok) {
1640         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1641                hanum, ha->status);
1642         return 0;
1643     }
1644     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1645     cdev_cnt = (ushort)ha->info;
1646     ha->fw_vers = ha->service;
1647
1648 #ifdef INT_COAL
1649     if (ha->type == GDT_PCIMPR) {
1650         /* set perf. modes */
1651         pmod = (gdth_perf_modes *)ha->pscratch;
1652         pmod->version          = 1;
1653         pmod->st_mode          = 1;    /* enable one status buffer */
1654         *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1655         pmod->st_buff_indx1    = COALINDEX;
1656         pmod->st_buff_addr2    = 0;
1657         pmod->st_buff_u_addr2  = 0;
1658         pmod->st_buff_indx2    = 0;
1659         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1660         pmod->cmd_mode         = 0;    // disable all cmd buffers
1661         pmod->cmd_buff_addr1   = 0;
1662         pmod->cmd_buff_u_addr1 = 0;
1663         pmod->cmd_buff_indx1   = 0;
1664         pmod->cmd_buff_addr2   = 0;
1665         pmod->cmd_buff_u_addr2 = 0;
1666         pmod->cmd_buff_indx2   = 0;
1667         pmod->cmd_buff_size    = 0;
1668         pmod->reserved1        = 0;
1669         pmod->reserved2        = 0;
1670         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,SET_PERF_MODES,
1671                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
1672             printk("GDT-HA %d: Interrupt coalescing activated\n", hanum);
1673         }
1674     }
1675 #endif
1676
1677     /* detect number of buses - try new IOCTL */
1678     iocr = (gdth_raw_iochan_str *)ha->pscratch;
1679     iocr->hdr.version        = 0xffffffff;
1680     iocr->hdr.list_entries   = MAXBUS;
1681     iocr->hdr.first_chan     = 0;
1682     iocr->hdr.last_chan      = MAXBUS-1;
1683     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
1684     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
1685                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
1686         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1687         ha->bus_cnt = iocr->hdr.chan_count;
1688         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1689             if (iocr->list[bus_no].proc_id < MAXID)
1690                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
1691             else
1692                 ha->bus_id[bus_no] = 0xff;
1693         }
1694     } else {
1695         /* old method */
1696         chn = (gdth_getch_str *)ha->pscratch;
1697         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
1698             chn->channel_no = bus_no;
1699             if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1700                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
1701                                    IO_CHANNEL | INVALID_CHANNEL,
1702                                    sizeof(gdth_getch_str))) {
1703                 if (bus_no == 0) {
1704                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1705                            hanum, ha->status);
1706                     return 0;
1707                 }
1708                 break;
1709             }
1710             if (chn->siop_id < MAXID)
1711                 ha->bus_id[bus_no] = chn->siop_id;
1712             else
1713                 ha->bus_id[bus_no] = 0xff;
1714         }
1715         ha->bus_cnt = (unchar)bus_no;
1716     }
1717     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1718
1719     /* read cache configuration */
1720     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
1721                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
1722         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1723                hanum, ha->status);
1724         return 0;
1725     }
1726     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
1727     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1728             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
1729             ha->cpar.write_back,ha->cpar.block_size));
1730
1731     /* read board info and features */
1732     ha->more_proc = FALSE;
1733     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
1734                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
1735         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
1736                sizeof(gdth_binfo_str));
1737         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
1738                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
1739             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1740             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
1741             ha->more_proc = TRUE;
1742         }
1743     } else {
1744         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1745         strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
1746     }
1747     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
1748
1749     /* read more informations */
1750     if (ha->more_proc) {
1751         /* physical drives, channel addresses */
1752         ioc = (gdth_iochan_str *)ha->pscratch;
1753         ioc->hdr.version        = 0xffffffff;
1754         ioc->hdr.list_entries   = MAXBUS;
1755         ioc->hdr.first_chan     = 0;
1756         ioc->hdr.last_chan      = MAXBUS-1;
1757         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
1758         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
1759                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
1760             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1761                 ha->raw[bus_no].address = ioc->list[bus_no].address;
1762                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
1763             }
1764         } else {
1765             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1766                 ha->raw[bus_no].address = IO_CHANNEL;
1767                 ha->raw[bus_no].local_no = bus_no;
1768             }
1769         }
1770         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1771             chn = (gdth_getch_str *)ha->pscratch;
1772             chn->channel_no = ha->raw[bus_no].local_no;
1773             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1774                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
1775                                   ha->raw[bus_no].address | INVALID_CHANNEL,
1776                                   sizeof(gdth_getch_str))) {
1777                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
1778                 TRACE2(("Channel %d: %d phys. drives\n",
1779                         bus_no,chn->drive_cnt));
1780             }
1781             if (ha->raw[bus_no].pdev_cnt > 0) {
1782                 drl = (gdth_drlist_str *)ha->pscratch;
1783                 drl->sc_no = ha->raw[bus_no].local_no;
1784                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
1785                 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1786                                       SCSI_DR_LIST | L_CTRL_PATTERN,
1787                                       ha->raw[bus_no].address | INVALID_CHANNEL,
1788                                       sizeof(gdth_drlist_str))) {
1789                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
1790                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
1791                 } else {
1792                     ha->raw[bus_no].pdev_cnt = 0;
1793                 }
1794             }
1795         }
1796
1797         /* logical drives */
1798         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
1799                               INVALID_CHANNEL,sizeof(ulong32))) {
1800             drv_cnt = *(ulong32 *)ha->pscratch;
1801             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
1802                                   INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
1803                 for (j = 0; j < drv_cnt; ++j) {
1804                     drv_no = ((ulong32 *)ha->pscratch)[j];
1805                     if (drv_no < MAX_LDRIVES) {
1806                         ha->hdr[drv_no].is_logdrv = TRUE;
1807                         TRACE2(("Drive %d is log. drive\n",drv_no));
1808                     }
1809                 }
1810             }
1811             alst = (gdth_arcdl_str *)ha->pscratch;
1812             alst->entries_avail = MAX_LDRIVES;
1813             alst->first_entry = 0;
1814             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
1815             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1816                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
1817                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
1818                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
1819                 for (j = 0; j < alst->entries_init; ++j) {
1820                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
1821                     ha->hdr[j].is_master = alst->list[j].is_master;
1822                     ha->hdr[j].is_parity = alst->list[j].is_parity;
1823                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
1824                     ha->hdr[j].master_no = alst->list[j].cd_handle;
1825                 }
1826             } else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1827                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
1828                                          0, 35 * sizeof(gdth_alist_str))) {
1829                 for (j = 0; j < 35; ++j) {
1830                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
1831                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
1832                     ha->hdr[j].is_master = alst2->is_master;
1833                     ha->hdr[j].is_parity = alst2->is_parity;
1834                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
1835                     ha->hdr[j].master_no = alst2->cd_handle;
1836                 }
1837             }
1838         }
1839     }
1840
1841     /* initialize raw service */
1842     ha->raw_feat = 0;
1843     if (!force_dma32) {
1844         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_X_INIT_RAW,0,0,0);
1845         if (ok)
1846             ha->raw_feat = GDT_64BIT;
1847     }
1848     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1849         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0);
1850     if (!ok) {
1851         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
1852                hanum, ha->status);
1853         return 0;
1854     }
1855     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
1856
1857     /* set/get features raw service (scatter/gather) */
1858     if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
1859                           0,0)) {
1860         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
1861         if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
1862             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1863                     ha->info));
1864             ha->raw_feat |= (ushort)ha->info;
1865         }
1866     }
1867
1868     /* set/get features cache service (equal to raw service) */
1869     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
1870                           SCATTER_GATHER,0)) {
1871         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
1872         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
1873             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1874                     ha->info));
1875             ha->cache_feat |= (ushort)ha->info;
1876         }
1877     }
1878
1879     /* reserve drives for raw service */
1880     if (reserve_mode != 0) {
1881         gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
1882                           reserve_mode == 1 ? 1 : 3, 0, 0);
1883         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
1884                 ha->status));
1885     }
1886     for (i = 0; i < MAX_RES_ARGS; i += 4) {
1887         if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
1888             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
1889             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
1890                     reserve_list[i], reserve_list[i+1],
1891                     reserve_list[i+2], reserve_list[i+3]));
1892             if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
1893                                    reserve_list[i+1], reserve_list[i+2] |
1894                                    (reserve_list[i+3] << 8))) {
1895                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
1896                        hanum, ha->status);
1897              }
1898         }
1899     }
1900
1901     /* Determine OEM string using IOCTL */
1902     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
1903     oemstr->params.ctl_version = 0x01;
1904     oemstr->params.buffer_size = sizeof(oemstr->text);
1905     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1906                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
1907                           sizeof(gdth_oem_str_ioctl))) {
1908         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
1909         printk("GDT-HA %d: Vendor: %s Name: %s\n",
1910                hanum,oemstr->text.oem_company_name,ha->binfo.type_string);
1911         /* Save the Host Drive inquiry data */
1912         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
1913                 sizeof(ha->oem_name));
1914     } else {
1915         /* Old method, based on PCI ID */
1916         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
1917         printk("GDT-HA %d: Name: %s\n",
1918                hanum,ha->binfo.type_string);
1919         if (ha->oem_id == OEM_ID_INTEL)
1920             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
1921         else
1922             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
1923     }
1924
1925     /* scanning for host drives */
1926     for (i = 0; i < cdev_cnt; ++i)
1927         gdth_analyse_hdrive(hanum,i);
1928
1929     TRACE(("gdth_search_drives() OK\n"));
1930     return 1;
1931 }
1932
1933 static int gdth_analyse_hdrive(int hanum,ushort hdrive)
1934 {
1935     register gdth_ha_str *ha;
1936     ulong32 drv_cyls;
1937     int drv_hds, drv_secs;
1938
1939     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
1940     if (hdrive >= MAX_HDRIVES)
1941         return 0;
1942     ha = HADATA(gdth_ctr_tab[hanum]);
1943
1944     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
1945         return 0;
1946     ha->hdr[hdrive].present = TRUE;
1947     ha->hdr[hdrive].size = ha->info;
1948
1949     /* evaluate mapping (sectors per head, heads per cylinder) */
1950     ha->hdr[hdrive].size &= ~SECS32;
1951     if (ha->info2 == 0) {
1952         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
1953     } else {
1954         drv_hds = ha->info2 & 0xff;
1955         drv_secs = (ha->info2 >> 8) & 0xff;
1956         drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
1957     }
1958     ha->hdr[hdrive].heads = (unchar)drv_hds;
1959     ha->hdr[hdrive].secs  = (unchar)drv_secs;
1960     /* round size */
1961     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
1962
1963     if (ha->cache_feat & GDT_64BIT) {
1964         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INFO,hdrive,0,0)
1965             && ha->info2 != 0) {
1966             ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
1967         }
1968     }
1969     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
1970             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
1971
1972     /* get informations about device */
1973     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
1974         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
1975                 hdrive,ha->info));
1976         ha->hdr[hdrive].devtype = (ushort)ha->info;
1977     }
1978
1979     /* cluster info */
1980     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
1981         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
1982                 hdrive,ha->info));
1983         if (!shared_access)
1984             ha->hdr[hdrive].cluster_type = (unchar)ha->info;
1985     }
1986
1987     /* R/W attributes */
1988     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
1989         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
1990                 hdrive,ha->info));
1991         ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
1992     }
1993
1994     return 1;
1995 }
1996
1997
1998 /* command queueing/sending functions */
1999
2000 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
2001 {
2002     register gdth_ha_str *ha;
2003     register Scsi_Cmnd *pscp;
2004     register Scsi_Cmnd *nscp;
2005     ulong flags;
2006     unchar b, t;
2007
2008     TRACE(("gdth_putq() priority %d\n",priority));
2009     ha = HADATA(gdth_ctr_tab[hanum]);
2010     spin_lock_irqsave(&ha->smp_lock, flags);
2011
2012     if (!IS_GDTH_INTERNAL_CMD(scp)) {
2013         scp->SCp.this_residual = (int)priority;
2014         b = scp->device->channel;
2015         t = scp->device->id;
2016         if (priority >= DEFAULT_PRI) {
2017             if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2018                 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2019                 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2020                 scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
2021             }
2022         }
2023     }
2024
2025     if (ha->req_first==NULL) {
2026         ha->req_first = scp;                    /* queue was empty */
2027         scp->SCp.ptr = NULL;
2028     } else {                                    /* queue not empty */
2029         pscp = ha->req_first;
2030         nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2031         /* priority: 0-highest,..,0xff-lowest */
2032         while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
2033             pscp = nscp;
2034             nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2035         }
2036         pscp->SCp.ptr = (char *)scp;
2037         scp->SCp.ptr  = (char *)nscp;
2038     }
2039     spin_unlock_irqrestore(&ha->smp_lock, flags);
2040
2041 #ifdef GDTH_STATISTICS
2042     flags = 0;
2043     for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2044         ++flags;
2045     if (max_rq < flags) {
2046         max_rq = flags;
2047         TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2048     }
2049 #endif
2050 }
2051
2052 static void gdth_next(int hanum)
2053 {
2054     register gdth_ha_str *ha;
2055     register Scsi_Cmnd *pscp;
2056     register Scsi_Cmnd *nscp;
2057     unchar b, t, l, firsttime;
2058     unchar this_cmd, next_cmd;
2059     ulong flags = 0;
2060     int cmd_index;
2061
2062     TRACE(("gdth_next() hanum %d\n",hanum));
2063     ha = HADATA(gdth_ctr_tab[hanum]);
2064     if (!gdth_polling)
2065         spin_lock_irqsave(&ha->smp_lock, flags);
2066
2067     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2068     this_cmd = firsttime = TRUE;
2069     next_cmd = gdth_polling ? FALSE:TRUE;
2070     cmd_index = 0;
2071
2072     for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2073         if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2074             pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2075         if (!IS_GDTH_INTERNAL_CMD(nscp)) {
2076             b = nscp->device->channel;
2077             t = nscp->device->id;
2078             l = nscp->device->lun;
2079             if (nscp->SCp.this_residual >= DEFAULT_PRI) {
2080                 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2081                     (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2082                     continue;
2083             }
2084         } else
2085             b = t = l = 0;
2086
2087         if (firsttime) {
2088             if (gdth_test_busy(hanum)) {        /* controller busy ? */
2089                 TRACE(("gdth_next() controller %d busy !\n",hanum));
2090                 if (!gdth_polling) {
2091                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2092                     return;
2093                 }
2094                 while (gdth_test_busy(hanum))
2095                     gdth_delay(1);
2096             }
2097             firsttime = FALSE;
2098         }
2099
2100         if (!IS_GDTH_INTERNAL_CMD(nscp)) {
2101         if (nscp->SCp.phase == -1) {
2102             nscp->SCp.phase = CACHESERVICE;           /* default: cache svc. */
2103             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2104                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2105                         b, t, l));
2106                 /* TEST_UNIT_READY -> set scan mode */
2107                 if ((ha->scan_mode & 0x0f) == 0) {
2108                     if (b == 0 && t == 0 && l == 0) {
2109                         ha->scan_mode |= 1;
2110                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2111                     }
2112                 } else if ((ha->scan_mode & 0x0f) == 1) {
2113                     if (b == 0 && ((t == 0 && l == 1) ||
2114                          (t == 1 && l == 0))) {
2115                         nscp->SCp.sent_command = GDT_SCAN_START;
2116                         nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2117                             | SCSIRAWSERVICE;
2118                         ha->scan_mode = 0x12;
2119                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2120                                 ha->scan_mode));
2121                     } else {
2122                         ha->scan_mode &= 0x10;
2123                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2124                     }
2125                 } else if (ha->scan_mode == 0x12) {
2126                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2127                         nscp->SCp.phase = SCSIRAWSERVICE;
2128                         nscp->SCp.sent_command = GDT_SCAN_END;
2129                         ha->scan_mode &= 0x10;
2130                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2131                                 ha->scan_mode));
2132                     }
2133                 }
2134             }
2135             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2136                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2137                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2138                 /* always GDT_CLUST_INFO! */
2139                 nscp->SCp.sent_command = GDT_CLUST_INFO;
2140             }
2141         }
2142         }
2143
2144         if (nscp->SCp.sent_command != -1) {
2145             if ((nscp->SCp.phase & 0xff) == CACHESERVICE) {
2146                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2147                     this_cmd = FALSE;
2148                 next_cmd = FALSE;
2149             } else if ((nscp->SCp.phase & 0xff) == SCSIRAWSERVICE) {
2150                 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2151                     this_cmd = FALSE;
2152                 next_cmd = FALSE;
2153             } else {
2154                 memset((char*)nscp->sense_buffer,0,16);
2155                 nscp->sense_buffer[0] = 0x70;
2156                 nscp->sense_buffer[2] = NOT_READY;
2157                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2158                 if (!nscp->SCp.have_data_in)
2159                     nscp->SCp.have_data_in++;
2160                 else
2161                     gdth_scsi_done(nscp);
2162             }
2163         } else if (IS_GDTH_INTERNAL_CMD(nscp)) {
2164             if (!(cmd_index=gdth_special_cmd(hanum,nscp)))
2165                 this_cmd = FALSE;
2166             next_cmd = FALSE;
2167         } else if (b != ha->virt_bus) {
2168             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2169                 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2170                 this_cmd = FALSE;
2171             else
2172                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2173         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2174             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2175                     nscp->cmnd[0], b, t, l));
2176             nscp->result = DID_BAD_TARGET << 16;
2177             if (!nscp->SCp.have_data_in)
2178                 nscp->SCp.have_data_in++;
2179             else
2180                 gdth_scsi_done(nscp);
2181         } else {
2182             switch (nscp->cmnd[0]) {
2183               case TEST_UNIT_READY:
2184               case INQUIRY:
2185               case REQUEST_SENSE:
2186               case READ_CAPACITY:
2187               case VERIFY:
2188               case START_STOP:
2189               case MODE_SENSE:
2190               case SERVICE_ACTION_IN:
2191                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2192                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2193                        nscp->cmnd[4],nscp->cmnd[5]));
2194                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2195                     /* return UNIT_ATTENTION */
2196                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2197                              nscp->cmnd[0], t));
2198                     ha->hdr[t].media_changed = FALSE;
2199                     memset((char*)nscp->sense_buffer,0,16);
2200                     nscp->sense_buffer[0] = 0x70;
2201                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2202                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2203                     if (!nscp->SCp.have_data_in)
2204                         nscp->SCp.have_data_in++;
2205                     else
2206                         gdth_scsi_done(nscp);
2207                 } else if (gdth_internal_cache_cmd(hanum, nscp))
2208                     gdth_scsi_done(nscp);
2209                 break;
2210
2211               case ALLOW_MEDIUM_REMOVAL:
2212                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2213                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2214                        nscp->cmnd[4],nscp->cmnd[5]));
2215                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2216                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2217                     nscp->result = DID_OK << 16;
2218                     nscp->sense_buffer[0] = 0;
2219                     if (!nscp->SCp.have_data_in)
2220                         nscp->SCp.have_data_in++;
2221                     else
2222                         gdth_scsi_done(nscp);
2223                 } else {
2224                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2225                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2226                            nscp->cmnd[4],nscp->cmnd[3]));
2227                     if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2228                         this_cmd = FALSE;
2229                 }
2230                 break;
2231
2232               case RESERVE:
2233               case RELEASE:
2234                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2235                         "RESERVE" : "RELEASE"));
2236                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2237                     this_cmd = FALSE;
2238                 break;
2239
2240               case READ_6:
2241               case WRITE_6:
2242               case READ_10:
2243               case WRITE_10:
2244               case READ_16:
2245               case WRITE_16:
2246                 if (ha->hdr[t].media_changed) {
2247                     /* return UNIT_ATTENTION */
2248                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2249                              nscp->cmnd[0], t));
2250                     ha->hdr[t].media_changed = FALSE;
2251                     memset((char*)nscp->sense_buffer,0,16);
2252                     nscp->sense_buffer[0] = 0x70;
2253                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2254                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2255                     if (!nscp->SCp.have_data_in)
2256                         nscp->SCp.have_data_in++;
2257                     else
2258                         gdth_scsi_done(nscp);
2259                 } else if (!(cmd_index=gdth_fill_cache_cmd(hanum, nscp, t)))
2260                     this_cmd = FALSE;
2261                 break;
2262
2263               default:
2264                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2265                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2266                         nscp->cmnd[4],nscp->cmnd[5]));
2267                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2268                        hanum, nscp->cmnd[0]);
2269                 nscp->result = DID_ABORT << 16;
2270                 if (!nscp->SCp.have_data_in)
2271                     nscp->SCp.have_data_in++;
2272                 else
2273                     gdth_scsi_done(nscp);
2274                 break;
2275             }
2276         }
2277
2278         if (!this_cmd)
2279             break;
2280         if (nscp == ha->req_first)
2281             ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2282         else
2283             pscp->SCp.ptr = nscp->SCp.ptr;
2284         if (!next_cmd)
2285             break;
2286     }
2287
2288     if (ha->cmd_cnt > 0) {
2289         gdth_release_event(hanum);
2290     }
2291
2292     if (!gdth_polling)
2293         spin_unlock_irqrestore(&ha->smp_lock, flags);
2294
2295     if (gdth_polling && ha->cmd_cnt > 0) {
2296         if (!gdth_wait(hanum,cmd_index,POLL_TIMEOUT))
2297             printk("GDT-HA %d: Command %d timed out !\n",
2298                    hanum,cmd_index);
2299     }
2300 }
2301
2302 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
2303                                     char *buffer,ushort count)
2304 {
2305     ushort cpcount,i;
2306     ushort cpsum,cpnow;
2307     struct scatterlist *sl;
2308     gdth_ha_str *ha;
2309     char *address;
2310
2311     cpcount = count<=(ushort)scp->request_bufflen ? count:(ushort)scp->request_bufflen;
2312     ha = HADATA(gdth_ctr_tab[hanum]);
2313
2314     if (scp->use_sg) {
2315         sl = (struct scatterlist *)scp->request_buffer;
2316         for (i=0,cpsum=0; i<scp->use_sg; ++i,++sl) {
2317             unsigned long flags;
2318             cpnow = (ushort)sl->length;
2319             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2320                           cpnow,cpsum,cpcount,(ushort)scp->bufflen));
2321             if (cpsum+cpnow > cpcount)
2322                 cpnow = cpcount - cpsum;
2323             cpsum += cpnow;
2324             if (!sl->page) {
2325                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2326                        hanum);
2327                 return;
2328             }
2329             local_irq_save(flags);
2330             address = kmap_atomic(sl->page, KM_BIO_SRC_IRQ) + sl->offset;
2331             memcpy(address,buffer,cpnow);
2332             flush_dcache_page(sl->page);
2333             kunmap_atomic(address, KM_BIO_SRC_IRQ);
2334             local_irq_restore(flags);
2335             if (cpsum == cpcount)
2336                 break;
2337             buffer += cpnow;
2338         }
2339     } else {
2340         TRACE(("copy_internal() count %d\n",cpcount));
2341         memcpy((char*)scp->request_buffer,buffer,cpcount);
2342     }
2343 }
2344
2345 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp)
2346 {
2347     register gdth_ha_str *ha;
2348     unchar t;
2349     gdth_inq_data inq;
2350     gdth_rdcap_data rdc;
2351     gdth_sense_data sd;
2352     gdth_modep_data mpd;
2353
2354     ha = HADATA(gdth_ctr_tab[hanum]);
2355     t  = scp->device->id;
2356     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2357            scp->cmnd[0],t));
2358
2359     scp->result = DID_OK << 16;
2360     scp->sense_buffer[0] = 0;
2361
2362     switch (scp->cmnd[0]) {
2363       case TEST_UNIT_READY:
2364       case VERIFY:
2365       case START_STOP:
2366         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2367         break;
2368
2369       case INQUIRY:
2370         TRACE2(("Inquiry hdrive %d devtype %d\n",
2371                 t,ha->hdr[t].devtype));
2372         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2373         /* you can here set all disks to removable, if you want to do
2374            a flush using the ALLOW_MEDIUM_REMOVAL command */
2375         inq.modif_rmb = 0x00;
2376         if ((ha->hdr[t].devtype & 1) ||
2377             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2378             inq.modif_rmb = 0x80;
2379         inq.version   = 2;
2380         inq.resp_aenc = 2;
2381         inq.add_length= 32;
2382         strcpy(inq.vendor,ha->oem_name);
2383         sprintf(inq.product,"Host Drive  #%02d",t);
2384         strcpy(inq.revision,"   ");
2385         gdth_copy_internal_data(hanum,scp,(char*)&inq,sizeof(gdth_inq_data));
2386         break;
2387
2388       case REQUEST_SENSE:
2389         TRACE2(("Request sense hdrive %d\n",t));
2390         sd.errorcode = 0x70;
2391         sd.segno     = 0x00;
2392         sd.key       = NO_SENSE;
2393         sd.info      = 0;
2394         sd.add_length= 0;
2395         gdth_copy_internal_data(hanum,scp,(char*)&sd,sizeof(gdth_sense_data));
2396         break;
2397
2398       case MODE_SENSE:
2399         TRACE2(("Mode sense hdrive %d\n",t));
2400         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2401         mpd.hd.data_length = sizeof(gdth_modep_data);
2402         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2403         mpd.hd.bd_length   = sizeof(mpd.bd);
2404         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2405         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2406         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2407         gdth_copy_internal_data(hanum,scp,(char*)&mpd,sizeof(gdth_modep_data));
2408         break;
2409
2410       case READ_CAPACITY:
2411         TRACE2(("Read capacity hdrive %d\n",t));
2412         if (ha->hdr[t].size > (ulong64)0xffffffff)
2413             rdc.last_block_no = 0xffffffff;
2414         else
2415             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2416         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2417         gdth_copy_internal_data(hanum,scp,(char*)&rdc,sizeof(gdth_rdcap_data));
2418         break;
2419
2420       case SERVICE_ACTION_IN:
2421         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2422             (ha->cache_feat & GDT_64BIT)) {
2423             gdth_rdcap16_data rdc16;
2424
2425             TRACE2(("Read capacity (16) hdrive %d\n",t));
2426             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2427             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2428             gdth_copy_internal_data(hanum,scp,(char*)&rdc16,sizeof(gdth_rdcap16_data));
2429         } else {
2430             scp->result = DID_ABORT << 16;
2431         }
2432         break;
2433
2434       default:
2435         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2436         break;
2437     }
2438
2439     if (!scp->SCp.have_data_in)
2440         scp->SCp.have_data_in++;
2441     else
2442         return 1;
2443
2444     return 0;
2445 }
2446
2447 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive)
2448 {
2449     register gdth_ha_str *ha;
2450     register gdth_cmd_str *cmdp;
2451     struct scatterlist *sl;
2452     ulong32 cnt, blockcnt;
2453     ulong64 no, blockno;
2454     dma_addr_t phys_addr;
2455     int i, cmd_index, read_write, sgcnt, mode64;
2456     struct page *page;
2457     ulong offset;
2458
2459     ha = HADATA(gdth_ctr_tab[hanum]);
2460     cmdp = ha->pccb;
2461     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2462                  scp->cmnd[0],scp->cmd_len,hdrive));
2463
2464     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2465         return 0;
2466
2467     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2468     /* test for READ_16, WRITE_16 if !mode64 ? ---
2469        not required, should not occur due to error return on
2470        READ_CAPACITY_16 */
2471
2472     cmdp->Service = CACHESERVICE;
2473     cmdp->RequestBuffer = scp;
2474     /* search free command index */
2475     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2476         TRACE(("GDT: No free command index found\n"));
2477         return 0;
2478     }
2479     /* if it's the first command, set command semaphore */
2480     if (ha->cmd_cnt == 0)
2481         gdth_set_sema0(hanum);
2482
2483     /* fill command */
2484     read_write = 0;
2485     if (scp->SCp.sent_command != -1)
2486         cmdp->OpCode = scp->SCp.sent_command;   /* special cache cmd. */
2487     else if (scp->cmnd[0] == RESERVE)
2488         cmdp->OpCode = GDT_RESERVE_DRV;
2489     else if (scp->cmnd[0] == RELEASE)
2490         cmdp->OpCode = GDT_RELEASE_DRV;
2491     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2492         if (scp->cmnd[4] & 1)                   /* prevent ? */
2493             cmdp->OpCode = GDT_MOUNT;
2494         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2495             cmdp->OpCode = GDT_UNMOUNT;
2496         else
2497             cmdp->OpCode = GDT_FLUSH;
2498     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2499                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2500     ) {
2501         read_write = 1;
2502         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2503                                    (ha->cache_feat & GDT_WR_THROUGH)))
2504             cmdp->OpCode = GDT_WRITE_THR;
2505         else
2506             cmdp->OpCode = GDT_WRITE;
2507     } else {
2508         read_write = 2;
2509         cmdp->OpCode = GDT_READ;
2510     }
2511
2512     cmdp->BoardNode = LOCALBOARD;
2513     if (mode64) {
2514         cmdp->u.cache64.DeviceNo = hdrive;
2515         cmdp->u.cache64.BlockNo  = 1;
2516         cmdp->u.cache64.sg_canz  = 0;
2517     } else {
2518         cmdp->u.cache.DeviceNo = hdrive;
2519         cmdp->u.cache.BlockNo  = 1;
2520         cmdp->u.cache.sg_canz  = 0;
2521     }
2522
2523     if (read_write) {
2524         if (scp->cmd_len == 16) {
2525             memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2526             blockno = be64_to_cpu(no);
2527             memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2528             blockcnt = be32_to_cpu(cnt);
2529         } else if (scp->cmd_len == 10) {
2530             memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2531             blockno = be32_to_cpu(no);
2532             memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2533             blockcnt = be16_to_cpu(cnt);
2534         } else {
2535             memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2536             blockno = be32_to_cpu(no) & 0x001fffffUL;
2537             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2538         }
2539         if (mode64) {
2540             cmdp->u.cache64.BlockNo = blockno;
2541             cmdp->u.cache64.BlockCnt = blockcnt;
2542         } else {
2543             cmdp->u.cache.BlockNo = (ulong32)blockno;
2544             cmdp->u.cache.BlockCnt = blockcnt;
2545         }
2546
2547         if (scp->use_sg) {
2548             sl = (struct scatterlist *)scp->request_buffer;
2549             sgcnt = scp->use_sg;
2550             scp->SCp.Status = GDTH_MAP_SG;
2551             scp->SCp.Message = (read_write == 1 ?
2552                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2553             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2554             if (mode64) {
2555                 cmdp->u.cache64.DestAddr= (ulong64)-1;
2556                 cmdp->u.cache64.sg_canz = sgcnt;
2557                 for (i=0; i<sgcnt; ++i,++sl) {
2558                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2559 #ifdef GDTH_DMA_STATISTICS
2560                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2561                         ha->dma64_cnt++;
2562                     else
2563                         ha->dma32_cnt++;
2564 #endif
2565                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2566                 }
2567             } else {
2568                 cmdp->u.cache.DestAddr= 0xffffffff;
2569                 cmdp->u.cache.sg_canz = sgcnt;
2570                 for (i=0; i<sgcnt; ++i,++sl) {
2571                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2572 #ifdef GDTH_DMA_STATISTICS
2573                     ha->dma32_cnt++;
2574 #endif
2575                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2576                 }
2577             }
2578
2579 #ifdef GDTH_STATISTICS
2580             if (max_sg < (ulong32)sgcnt) {
2581                 max_sg = (ulong32)sgcnt;
2582                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2583             }
2584 #endif
2585
2586         } else if (scp->request_bufflen) {
2587             scp->SCp.Status = GDTH_MAP_SINGLE;
2588             scp->SCp.Message = (read_write == 1 ?
2589                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2590             page = virt_to_page(scp->request_buffer);
2591             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2592             phys_addr = pci_map_page(ha->pdev,page,offset,
2593                                      scp->request_bufflen,scp->SCp.Message);
2594             scp->SCp.dma_handle = phys_addr;
2595             if (mode64) {
2596                 if (ha->cache_feat & SCATTER_GATHER) {
2597                     cmdp->u.cache64.DestAddr = (ulong64)-1;
2598                     cmdp->u.cache64.sg_canz = 1;
2599                     cmdp->u.cache64.sg_lst[0].sg_ptr = phys_addr;
2600                     cmdp->u.cache64.sg_lst[0].sg_len = scp->request_bufflen;
2601                     cmdp->u.cache64.sg_lst[1].sg_len = 0;
2602                 } else {
2603                     cmdp->u.cache64.DestAddr  = phys_addr;
2604                     cmdp->u.cache64.sg_canz= 0;
2605                 }
2606             } else {
2607                 if (ha->cache_feat & SCATTER_GATHER) {
2608                     cmdp->u.cache.DestAddr = 0xffffffff;
2609                     cmdp->u.cache.sg_canz = 1;
2610                     cmdp->u.cache.sg_lst[0].sg_ptr = phys_addr;
2611                     cmdp->u.cache.sg_lst[0].sg_len = scp->request_bufflen;
2612                     cmdp->u.cache.sg_lst[1].sg_len = 0;
2613                 } else {
2614                     cmdp->u.cache.DestAddr  = phys_addr;
2615                     cmdp->u.cache.sg_canz= 0;
2616                 }
2617             }
2618         }
2619     }
2620     /* evaluate command size, check space */
2621     if (mode64) {
2622         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2623                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2624                cmdp->u.cache64.sg_lst[0].sg_ptr,
2625                cmdp->u.cache64.sg_lst[0].sg_len));
2626         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2627                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2628         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2629             (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2630     } else {
2631         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2632                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2633                cmdp->u.cache.sg_lst[0].sg_ptr,
2634                cmdp->u.cache.sg_lst[0].sg_len));
2635         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2636                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2637         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2638             (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2639     }
2640     if (ha->cmd_len & 3)
2641         ha->cmd_len += (4 - (ha->cmd_len & 3));
2642
2643     if (ha->cmd_cnt > 0) {
2644         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2645             ha->ic_all_size) {
2646             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2647             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2648             return 0;
2649         }
2650     }
2651
2652     /* copy command */
2653     gdth_copy_command(hanum);
2654     return cmd_index;
2655 }
2656
2657 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b)
2658 {
2659     register gdth_ha_str *ha;
2660     register gdth_cmd_str *cmdp;
2661     struct scatterlist *sl;
2662     ushort i;
2663     dma_addr_t phys_addr, sense_paddr;
2664     int cmd_index, sgcnt, mode64;
2665     unchar t,l;
2666     struct page *page;
2667     ulong offset;
2668
2669     ha = HADATA(gdth_ctr_tab[hanum]);
2670     t = scp->device->id;
2671     l = scp->device->lun;
2672     cmdp = ha->pccb;
2673     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2674            scp->cmnd[0],b,t,l));
2675
2676     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2677         return 0;
2678
2679     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
2680
2681     cmdp->Service = SCSIRAWSERVICE;
2682     cmdp->RequestBuffer = scp;
2683     /* search free command index */
2684     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2685         TRACE(("GDT: No free command index found\n"));
2686         return 0;
2687     }
2688     /* if it's the first command, set command semaphore */
2689     if (ha->cmd_cnt == 0)
2690         gdth_set_sema0(hanum);
2691
2692     /* fill command */
2693     if (scp->SCp.sent_command != -1) {
2694         cmdp->OpCode           = scp->SCp.sent_command; /* special raw cmd. */
2695         cmdp->BoardNode        = LOCALBOARD;
2696         if (mode64) {
2697             cmdp->u.raw64.direction = (scp->SCp.phase >> 8);
2698             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2699                     cmdp->OpCode, cmdp->u.raw64.direction));
2700             /* evaluate command size */
2701             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
2702         } else {
2703             cmdp->u.raw.direction  = (scp->SCp.phase >> 8);
2704             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2705                     cmdp->OpCode, cmdp->u.raw.direction));
2706             /* evaluate command size */
2707             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2708         }
2709
2710     } else {
2711         page = virt_to_page(scp->sense_buffer);
2712         offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
2713         sense_paddr = pci_map_page(ha->pdev,page,offset,
2714                                    16,PCI_DMA_FROMDEVICE);
2715         *(ulong32 *)&scp->SCp.buffer = (ulong32)sense_paddr;
2716         /* high part, if 64bit */
2717         *(ulong32 *)&scp->host_scribble = (ulong32)((ulong64)sense_paddr >> 32);
2718         cmdp->OpCode           = GDT_WRITE;             /* always */
2719         cmdp->BoardNode        = LOCALBOARD;
2720         if (mode64) {
2721             cmdp->u.raw64.reserved   = 0;
2722             cmdp->u.raw64.mdisc_time = 0;
2723             cmdp->u.raw64.mcon_time  = 0;
2724             cmdp->u.raw64.clen       = scp->cmd_len;
2725             cmdp->u.raw64.target     = t;
2726             cmdp->u.raw64.lun        = l;
2727             cmdp->u.raw64.bus        = b;
2728             cmdp->u.raw64.priority   = 0;
2729             cmdp->u.raw64.sdlen      = scp->request_bufflen;
2730             cmdp->u.raw64.sense_len  = 16;
2731             cmdp->u.raw64.sense_data = sense_paddr;
2732             cmdp->u.raw64.direction  =
2733                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2734             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
2735             cmdp->u.raw64.sg_ranz    = 0;
2736         } else {
2737             cmdp->u.raw.reserved   = 0;
2738             cmdp->u.raw.mdisc_time = 0;
2739             cmdp->u.raw.mcon_time  = 0;
2740             cmdp->u.raw.clen       = scp->cmd_len;
2741             cmdp->u.raw.target     = t;
2742             cmdp->u.raw.lun        = l;
2743             cmdp->u.raw.bus        = b;
2744             cmdp->u.raw.priority   = 0;
2745             cmdp->u.raw.link_p     = 0;
2746             cmdp->u.raw.sdlen      = scp->request_bufflen;
2747             cmdp->u.raw.sense_len  = 16;
2748             cmdp->u.raw.sense_data = sense_paddr;
2749             cmdp->u.raw.direction  =
2750                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2751             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2752             cmdp->u.raw.sg_ranz    = 0;
2753         }
2754
2755         if (scp->use_sg) {
2756             sl = (struct scatterlist *)scp->request_buffer;
2757             sgcnt = scp->use_sg;
2758             scp->SCp.Status = GDTH_MAP_SG;
2759             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
2760             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2761             if (mode64) {
2762                 cmdp->u.raw64.sdata = (ulong64)-1;
2763                 cmdp->u.raw64.sg_ranz = sgcnt;
2764                 for (i=0; i<sgcnt; ++i,++sl) {
2765                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2766 #ifdef GDTH_DMA_STATISTICS
2767                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2768                         ha->dma64_cnt++;
2769                     else
2770                         ha->dma32_cnt++;
2771 #endif
2772                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
2773                 }
2774             } else {
2775                 cmdp->u.raw.sdata = 0xffffffff;
2776                 cmdp->u.raw.sg_ranz = sgcnt;
2777                 for (i=0; i<sgcnt; ++i,++sl) {
2778                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
2779 #ifdef GDTH_DMA_STATISTICS
2780                     ha->dma32_cnt++;
2781 #endif
2782                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
2783                 }
2784             }
2785
2786 #ifdef GDTH_STATISTICS
2787             if (max_sg < sgcnt) {
2788                 max_sg = sgcnt;
2789                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
2790             }
2791 #endif
2792
2793         } else if (scp->request_bufflen) {
2794             scp->SCp.Status = GDTH_MAP_SINGLE;
2795             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
2796             page = virt_to_page(scp->request_buffer);
2797             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2798             phys_addr = pci_map_page(ha->pdev,page,offset,
2799                                      scp->request_bufflen,scp->SCp.Message);
2800             scp->SCp.dma_handle = phys_addr;
2801
2802             if (mode64) {
2803                 if (ha->raw_feat & SCATTER_GATHER) {
2804                     cmdp->u.raw64.sdata  = (ulong64)-1;
2805                     cmdp->u.raw64.sg_ranz= 1;
2806                     cmdp->u.raw64.sg_lst[0].sg_ptr = phys_addr;
2807                     cmdp->u.raw64.sg_lst[0].sg_len = scp->request_bufflen;
2808                     cmdp->u.raw64.sg_lst[1].sg_len = 0;
2809                 } else {
2810                     cmdp->u.raw64.sdata  = phys_addr;
2811                     cmdp->u.raw64.sg_ranz= 0;
2812                 }
2813             } else {
2814                 if (ha->raw_feat & SCATTER_GATHER) {
2815                     cmdp->u.raw.sdata  = 0xffffffff;
2816                     cmdp->u.raw.sg_ranz= 1;
2817                     cmdp->u.raw.sg_lst[0].sg_ptr = phys_addr;
2818                     cmdp->u.raw.sg_lst[0].sg_len = scp->request_bufflen;
2819                     cmdp->u.raw.sg_lst[1].sg_len = 0;
2820                 } else {
2821                     cmdp->u.raw.sdata  = phys_addr;
2822                     cmdp->u.raw.sg_ranz= 0;
2823                 }
2824             }
2825         }
2826         if (mode64) {
2827             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2828                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
2829                    cmdp->u.raw64.sg_lst[0].sg_ptr,
2830                    cmdp->u.raw64.sg_lst[0].sg_len));
2831             /* evaluate command size */
2832             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
2833                 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
2834         } else {
2835             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2836                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
2837                    cmdp->u.raw.sg_lst[0].sg_ptr,
2838                    cmdp->u.raw.sg_lst[0].sg_len));
2839             /* evaluate command size */
2840             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2841                 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2842         }
2843     }
2844     /* check space */
2845     if (ha->cmd_len & 3)
2846         ha->cmd_len += (4 - (ha->cmd_len & 3));
2847
2848     if (ha->cmd_cnt > 0) {
2849         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2850             ha->ic_all_size) {
2851             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2852             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2853             return 0;
2854         }
2855     }
2856
2857     /* copy command */
2858     gdth_copy_command(hanum);
2859     return cmd_index;
2860 }
2861
2862 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp)
2863 {
2864     register gdth_ha_str *ha;
2865     register gdth_cmd_str *cmdp;
2866     int cmd_index;
2867
2868     ha  = HADATA(gdth_ctr_tab[hanum]);
2869     cmdp= ha->pccb;
2870     TRACE2(("gdth_special_cmd(): "));
2871
2872     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2873         return 0;
2874
2875     memcpy( cmdp, scp->request_buffer, sizeof(gdth_cmd_str));
2876     cmdp->RequestBuffer = scp;
2877
2878     /* search free command index */
2879     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2880         TRACE(("GDT: No free command index found\n"));
2881         return 0;
2882     }
2883
2884     /* if it's the first command, set command semaphore */
2885     if (ha->cmd_cnt == 0)
2886        gdth_set_sema0(hanum);
2887
2888     /* evaluate command size, check space */
2889     if (cmdp->OpCode == GDT_IOCTL) {
2890         TRACE2(("IOCTL\n"));
2891         ha->cmd_len =
2892             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
2893     } else if (cmdp->Service == CACHESERVICE) {
2894         TRACE2(("cache command %d\n",cmdp->OpCode));
2895         if (ha->cache_feat & GDT_64BIT)
2896             ha->cmd_len =
2897                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
2898         else
2899             ha->cmd_len =
2900                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
2901     } else if (cmdp->Service == SCSIRAWSERVICE) {
2902         TRACE2(("raw command %d\n",cmdp->OpCode));
2903         if (ha->raw_feat & GDT_64BIT)
2904             ha->cmd_len =
2905                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
2906         else
2907             ha->cmd_len =
2908                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
2909     }
2910
2911     if (ha->cmd_len & 3)
2912         ha->cmd_len += (4 - (ha->cmd_len & 3));
2913
2914     if (ha->cmd_cnt > 0) {
2915         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2916             ha->ic_all_size) {
2917             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
2918             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2919             return 0;
2920         }
2921     }
2922
2923     /* copy command */
2924     gdth_copy_command(hanum);
2925     return cmd_index;
2926 }
2927
2928
2929 /* Controller event handling functions */
2930 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
2931                                       ushort idx, gdth_evt_data *evt)
2932 {
2933     gdth_evt_str *e;
2934     struct timeval tv;
2935
2936     /* no GDTH_LOCK_HA() ! */
2937     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
2938     if (source == 0)                        /* no source -> no event */
2939         return NULL;
2940
2941     if (ebuffer[elastidx].event_source == source &&
2942         ebuffer[elastidx].event_idx == idx &&
2943         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
2944             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
2945             (char *)&evt->eu, evt->size)) ||
2946         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
2947             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
2948             (char *)&evt->event_string)))) {
2949         e = &ebuffer[elastidx];
2950         do_gettimeofday(&tv);
2951         e->last_stamp = tv.tv_sec;
2952         ++e->same_count;
2953     } else {
2954         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
2955             ++elastidx;
2956             if (elastidx == MAX_EVENTS)
2957                 elastidx = 0;
2958             if (elastidx == eoldidx) {              /* reached mark ? */
2959                 ++eoldidx;
2960                 if (eoldidx == MAX_EVENTS)
2961                     eoldidx = 0;
2962             }
2963         }
2964         e = &ebuffer[elastidx];
2965         e->event_source = source;
2966         e->event_idx = idx;
2967         do_gettimeofday(&tv);
2968         e->first_stamp = e->last_stamp = tv.tv_sec;
2969         e->same_count = 1;
2970         e->event_data = *evt;
2971         e->application = 0;
2972     }
2973     return e;
2974 }
2975
2976 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2977 {
2978     gdth_evt_str *e;
2979     int eindex;
2980     ulong flags;
2981
2982     TRACE2(("gdth_read_event() handle %d\n", handle));
2983     spin_lock_irqsave(&ha->smp_lock, flags);
2984     if (handle == -1)
2985         eindex = eoldidx;
2986     else
2987         eindex = handle;
2988     estr->event_source = 0;
2989
2990     if (eindex >= MAX_EVENTS) {
2991         spin_unlock_irqrestore(&ha->smp_lock, flags);
2992         return eindex;
2993     }
2994     e = &ebuffer[eindex];
2995     if (e->event_source != 0) {
2996         if (eindex != elastidx) {
2997             if (++eindex == MAX_EVENTS)
2998                 eindex = 0;
2999         } else {
3000             eindex = -1;
3001         }
3002         memcpy(estr, e, sizeof(gdth_evt_str));
3003     }
3004     spin_unlock_irqrestore(&ha->smp_lock, flags);
3005     return eindex;
3006 }
3007
3008 static void gdth_readapp_event(gdth_ha_str *ha,
3009                                unchar application, gdth_evt_str *estr)
3010 {
3011     gdth_evt_str *e;
3012     int eindex;
3013     ulong flags;
3014     unchar found = FALSE;
3015
3016     TRACE2(("gdth_readapp_event() app. %d\n", application));
3017     spin_lock_irqsave(&ha->smp_lock, flags);
3018     eindex = eoldidx;
3019     for (;;) {
3020         e = &ebuffer[eindex];
3021         if (e->event_source == 0)
3022             break;
3023         if ((e->application & application) == 0) {
3024             e->application |= application;
3025             found = TRUE;
3026             break;
3027         }
3028         if (eindex == elastidx)
3029             break;
3030         if (++eindex == MAX_EVENTS)
3031             eindex = 0;
3032     }
3033     if (found)
3034         memcpy(estr, e, sizeof(gdth_evt_str));
3035     else
3036         estr->event_source = 0;
3037     spin_unlock_irqrestore(&ha->smp_lock, flags);
3038 }
3039
3040 static void gdth_clear_events(void)
3041 {
3042     TRACE(("gdth_clear_events()"));
3043
3044     eoldidx = elastidx = 0;
3045     ebuffer[0].event_source = 0;
3046 }
3047
3048
3049 /* SCSI interface functions */
3050
3051 static irqreturn_t gdth_interrupt(int irq,void *dev_id)
3052 {
3053     gdth_ha_str *ha2 = (gdth_ha_str *)dev_id;
3054     register gdth_ha_str *ha;
3055     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
3056     gdt6_dpram_str __iomem *dp6_ptr;
3057     gdt2_dpram_str __iomem *dp2_ptr;
3058     Scsi_Cmnd *scp;
3059     int hanum, rval, i;
3060     unchar IStatus;
3061     ushort Service;
3062     ulong flags = 0;
3063 #ifdef INT_COAL
3064     int coalesced = FALSE;
3065     int next = FALSE;
3066     gdth_coal_status *pcs = NULL;
3067     int act_int_coal = 0;
3068 #endif
3069
3070     TRACE(("gdth_interrupt() IRQ %d\n",irq));
3071
3072     /* if polling and not from gdth_wait() -> return */
3073     if (gdth_polling) {
3074         if (!gdth_from_wait) {
3075             return IRQ_HANDLED;
3076         }
3077     }
3078
3079     if (!gdth_polling)
3080         spin_lock_irqsave(&ha2->smp_lock, flags);
3081     wait_index = 0;
3082
3083     /* search controller */
3084     if ((hanum = gdth_get_status(&IStatus,irq)) == -1) {
3085         /* spurious interrupt */
3086         if (!gdth_polling)
3087             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3088             return IRQ_HANDLED;
3089     }
3090     ha = HADATA(gdth_ctr_tab[hanum]);
3091
3092 #ifdef GDTH_STATISTICS
3093     ++act_ints;
3094 #endif
3095
3096 #ifdef INT_COAL
3097     /* See if the fw is returning coalesced status */
3098     if (IStatus == COALINDEX) {
3099         /* Coalesced status.  Setup the initial status
3100            buffer pointer and flags */
3101         pcs = ha->coal_stat;
3102         coalesced = TRUE;
3103         next = TRUE;
3104     }
3105
3106     do {
3107         if (coalesced) {
3108             /* For coalesced requests all status
3109                information is found in the status buffer */
3110             IStatus = (unchar)(pcs->status & 0xff);
3111         }
3112 #endif
3113
3114         if (ha->type == GDT_EISA) {
3115             if (IStatus & 0x80) {                       /* error flag */
3116                 IStatus &= ~0x80;
3117                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3118                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3119             } else                                      /* no error */
3120                 ha->status = S_OK;
3121             ha->info = inl(ha->bmic + MAILBOXREG+12);
3122             ha->service = inw(ha->bmic + MAILBOXREG+10);
3123             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3124
3125             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3126             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3127         } else if (ha->type == GDT_ISA) {
3128             dp2_ptr = ha->brd;
3129             if (IStatus & 0x80) {                       /* error flag */
3130                 IStatus &= ~0x80;
3131                 ha->status = readw(&dp2_ptr->u.ic.Status);
3132                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3133             } else                                      /* no error */
3134                 ha->status = S_OK;
3135             ha->info = readl(&dp2_ptr->u.ic.Info[0]);
3136             ha->service = readw(&dp2_ptr->u.ic.Service);
3137             ha->info2 = readl(&dp2_ptr->u.ic.Info[1]);
3138
3139             writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3140             writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3141             writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3142         } else if (ha->type == GDT_PCI) {
3143             dp6_ptr = ha->brd;
3144             if (IStatus & 0x80) {                       /* error flag */
3145                 IStatus &= ~0x80;
3146                 ha->status = readw(&dp6_ptr->u.ic.Status);
3147                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3148             } else                                      /* no error */
3149                 ha->status = S_OK;
3150             ha->info = readl(&dp6_ptr->u.ic.Info[0]);
3151             ha->service = readw(&dp6_ptr->u.ic.Service);
3152             ha->info2 = readl(&dp6_ptr->u.ic.Info[1]);
3153
3154             writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3155             writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3156             writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3157         } else if (ha->type == GDT_PCINEW) {
3158             if (IStatus & 0x80) {                       /* error flag */
3159                 IStatus &= ~0x80;
3160                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3161                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3162             } else
3163                 ha->status = S_OK;
3164             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3165             ha->service = inw(PTR2USHORT(&ha->plx->service));
3166             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3167
3168             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3169             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3170         } else if (ha->type == GDT_PCIMPR) {
3171             dp6m_ptr = ha->brd;
3172             if (IStatus & 0x80) {                       /* error flag */
3173                 IStatus &= ~0x80;
3174 #ifdef INT_COAL
3175                 if (coalesced)
3176                     ha->status = pcs->ext_status & 0xffff;
3177                 else
3178 #endif
3179                     ha->status = readw(&dp6m_ptr->i960r.status);
3180                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3181             } else                                      /* no error */
3182                 ha->status = S_OK;
3183 #ifdef INT_COAL
3184             /* get information */
3185             if (coalesced) {
3186                 ha->info = pcs->info0;
3187                 ha->info2 = pcs->info1;
3188                 ha->service = (pcs->ext_status >> 16) & 0xffff;
3189             } else
3190 #endif
3191             {
3192                 ha->info = readl(&dp6m_ptr->i960r.info[0]);
3193                 ha->service = readw(&dp6m_ptr->i960r.service);
3194                 ha->info2 = readl(&dp6m_ptr->i960r.info[1]);
3195             }
3196             /* event string */
3197             if (IStatus == ASYNCINDEX) {
3198                 if (ha->service != SCREENSERVICE &&
3199                     (ha->fw_vers & 0xff) >= 0x1a) {
3200                     ha->dvr.severity = readb
3201                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3202                     for (i = 0; i < 256; ++i) {
3203                         ha->dvr.event_string[i] = readb
3204                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3205                         if (ha->dvr.event_string[i] == 0)
3206                             break;
3207                     }
3208                 }
3209             }
3210 #ifdef INT_COAL
3211             /* Make sure that non coalesced interrupts get cleared
3212                before being handled by gdth_async_event/gdth_sync_event */
3213             if (!coalesced)
3214 #endif
3215             {
3216                 writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3217                 writeb(0, &dp6m_ptr->i960r.sema1_reg);
3218             }
3219         } else {
3220             TRACE2(("gdth_interrupt() unknown controller type\n"));
3221             if (!gdth_polling)
3222                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3223             return IRQ_HANDLED;
3224         }
3225
3226         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3227                IStatus,ha->status,ha->info));
3228
3229         if (gdth_from_wait) {
3230             wait_hanum = hanum;
3231             wait_index = (int)IStatus;
3232         }
3233
3234         if (IStatus == ASYNCINDEX) {
3235             TRACE2(("gdth_interrupt() async. event\n"));
3236             gdth_async_event(hanum);
3237             if (!gdth_polling)
3238                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3239             gdth_next(hanum);
3240             return IRQ_HANDLED;
3241         }
3242
3243         if (IStatus == SPEZINDEX) {
3244             TRACE2(("Service unknown or not initialized !\n"));
3245             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3246             ha->dvr.eu.driver.ionode = hanum;
3247             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3248             if (!gdth_polling)
3249                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3250             return IRQ_HANDLED;
3251         }
3252         scp     = ha->cmd_tab[IStatus-2].cmnd;
3253         Service = ha->cmd_tab[IStatus-2].service;
3254         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3255         if (scp == UNUSED_CMND) {
3256             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3257             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3258             ha->dvr.eu.driver.ionode = hanum;
3259             ha->dvr.eu.driver.index = IStatus;
3260             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3261             if (!gdth_polling)
3262                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3263             return IRQ_HANDLED;
3264         }
3265         if (scp == INTERNAL_CMND) {
3266             TRACE(("gdth_interrupt() answer to internal command\n"));
3267             if (!gdth_polling)
3268                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3269             return IRQ_HANDLED;
3270         }
3271
3272         TRACE(("gdth_interrupt() sync. status\n"));
3273         rval = gdth_sync_event(hanum,Service,IStatus,scp);
3274         if (!gdth_polling)
3275             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3276         if (rval == 2) {
3277             gdth_putq(hanum,scp,scp->SCp.this_residual);
3278         } else if (rval == 1) {
3279             gdth_scsi_done(scp);
3280         }
3281
3282 #ifdef INT_COAL
3283         if (coalesced) {
3284             /* go to the next status in the status buffer */
3285             ++pcs;
3286 #ifdef GDTH_STATISTICS
3287             ++act_int_coal;
3288             if (act_int_coal > max_int_coal) {
3289                 max_int_coal = act_int_coal;
3290                 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3291             }
3292 #endif
3293             /* see if there is another status */
3294             if (pcs->status == 0)
3295                 /* Stop the coalesce loop */
3296                 next = FALSE;
3297         }
3298     } while (next);
3299
3300     /* coalescing only for new GDT_PCIMPR controllers available */
3301     if (ha->type == GDT_PCIMPR && coalesced) {
3302         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3303         writeb(0, &dp6m_ptr->i960r.sema1_reg);
3304     }
3305 #endif
3306
3307     gdth_next(hanum);
3308     return IRQ_HANDLED;
3309 }
3310
3311 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp)
3312 {
3313     register gdth_ha_str *ha;
3314     gdth_msg_str *msg;
3315     gdth_cmd_str *cmdp;
3316     unchar b, t;
3317
3318     ha   = HADATA(gdth_ctr_tab[hanum]);
3319     cmdp = ha->pccb;
3320     TRACE(("gdth_sync_event() serv %d status %d\n",
3321            service,ha->status));
3322
3323     if (service == SCREENSERVICE) {
3324         msg  = ha->pmsg;
3325         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3326                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3327         if (msg->msg_len > MSGLEN+1)
3328             msg->msg_len = MSGLEN+1;
3329         if (msg->msg_len)
3330             if (!(msg->msg_answer && msg->msg_ext)) {
3331                 msg->msg_text[msg->msg_len] = '\0';
3332                 printk("%s",msg->msg_text);
3333             }
3334
3335         if (msg->msg_ext && !msg->msg_answer) {
3336             while (gdth_test_busy(hanum))
3337                 gdth_delay(0);
3338             cmdp->Service       = SCREENSERVICE;
3339             cmdp->RequestBuffer = SCREEN_CMND;
3340             gdth_get_cmd_index(hanum);
3341             gdth_set_sema0(hanum);
3342             cmdp->OpCode        = GDT_READ;
3343             cmdp->BoardNode     = LOCALBOARD;
3344             cmdp->u.screen.reserved  = 0;
3345             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3346             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3347             ha->cmd_offs_dpmem = 0;
3348             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3349                 + sizeof(ulong64);
3350             ha->cmd_cnt = 0;
3351             gdth_copy_command(hanum);
3352             gdth_release_event(hanum);
3353             return 0;
3354         }
3355
3356         if (msg->msg_answer && msg->msg_alen) {
3357             /* default answers (getchar() not possible) */
3358             if (msg->msg_alen == 1) {
3359                 msg->msg_alen = 0;
3360                 msg->msg_len = 1;
3361                 msg->msg_text[0] = 0;
3362             } else {
3363                 msg->msg_alen -= 2;
3364                 msg->msg_len = 2;
3365                 msg->msg_text[0] = 1;
3366                 msg->msg_text[1] = 0;
3367             }
3368             msg->msg_ext    = 0;
3369             msg->msg_answer = 0;
3370             while (gdth_test_busy(hanum))
3371                 gdth_delay(0);
3372             cmdp->Service       = SCREENSERVICE;
3373             cmdp->RequestBuffer = SCREEN_CMND;
3374             gdth_get_cmd_index(hanum);
3375             gdth_set_sema0(hanum);
3376             cmdp->OpCode        = GDT_WRITE;
3377             cmdp->BoardNode     = LOCALBOARD;
3378             cmdp->u.screen.reserved  = 0;
3379             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3380             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3381             ha->cmd_offs_dpmem = 0;
3382             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3383                 + sizeof(ulong64);
3384             ha->cmd_cnt = 0;
3385             gdth_copy_command(hanum);
3386             gdth_release_event(hanum);
3387             return 0;
3388         }
3389         printk("\n");
3390
3391     } else {
3392         b = scp->device->channel;
3393         t = scp->device->id;
3394         if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3395             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3396         }
3397         /* cache or raw service */
3398         if (ha->status == S_BSY) {
3399             TRACE2(("Controller busy -> retry !\n"));
3400             if (scp->SCp.sent_command == GDT_MOUNT)
3401                 scp->SCp.sent_command = GDT_CLUST_INFO;
3402             /* retry */
3403             return 2;
3404         }
3405         if (scp->SCp.Status == GDTH_MAP_SG)
3406             pci_unmap_sg(ha->pdev,scp->request_buffer,
3407                          scp->use_sg,scp->SCp.Message);
3408         else if (scp->SCp.Status == GDTH_MAP_SINGLE)
3409             pci_unmap_page(ha->pdev,scp->SCp.dma_handle,
3410                            scp->request_bufflen,scp->SCp.Message);
3411         if (scp->SCp.buffer) {
3412             dma_addr_t addr;
3413             addr = (dma_addr_t)*(ulong32 *)&scp->SCp.buffer;
3414             if (scp->host_scribble)
3415                 addr += (dma_addr_t)
3416                     ((ulong64)(*(ulong32 *)&scp->host_scribble) << 32);
3417             pci_unmap_page(ha->pdev,addr,16,PCI_DMA_FROMDEVICE);
3418         }
3419
3420         if (ha->status == S_OK) {
3421             scp->SCp.Status = S_OK;
3422             scp->SCp.Message = ha->info;
3423             if (scp->SCp.sent_command != -1) {
3424                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3425                         scp->SCp.sent_command));
3426                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3427                 if (scp->SCp.sent_command == GDT_CLUST_INFO) {
3428                     ha->hdr[t].cluster_type = (unchar)ha->info;
3429                     if (!(ha->hdr[t].cluster_type &
3430                         CLUSTER_MOUNTED)) {
3431                         /* NOT MOUNTED -> MOUNT */
3432                         scp->SCp.sent_command = GDT_MOUNT;
3433                         if (ha->hdr[t].cluster_type &
3434                             CLUSTER_RESERVED) {
3435                             /* cluster drive RESERVED (on the other node) */
3436                             scp->SCp.phase = -2;      /* reservation conflict */
3437                         }
3438                     } else {
3439                         scp->SCp.sent_command = -1;
3440                     }
3441                 } else {
3442                     if (scp->SCp.sent_command == GDT_MOUNT) {
3443                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3444                         ha->hdr[t].media_changed = TRUE;
3445                     } else if (scp->SCp.sent_command == GDT_UNMOUNT) {
3446                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3447                         ha->hdr[t].media_changed = TRUE;
3448                     }
3449                     scp->SCp.sent_command = -1;
3450                 }
3451                 /* retry */
3452                 scp->SCp.this_residual = HIGH_PRI;
3453                 return 2;
3454             } else {
3455                 /* RESERVE/RELEASE ? */
3456                 if (scp->cmnd[0] == RESERVE) {
3457                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3458                 } else if (scp->cmnd[0] == RELEASE) {
3459                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3460                 }
3461                 scp->result = DID_OK << 16;
3462                 scp->sense_buffer[0] = 0;
3463             }
3464         } else {
3465             scp->SCp.Status = ha->status;
3466             scp->SCp.Message = ha->info;
3467
3468             if (scp->SCp.sent_command != -1) {
3469                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3470                         scp->SCp.sent_command, ha->status));
3471                 if (scp->SCp.sent_command == GDT_SCAN_START ||
3472                     scp->SCp.sent_command == GDT_SCAN_END) {
3473                     scp->SCp.sent_command = -1;
3474                     /* retry */
3475                     scp->SCp.this_residual = HIGH_PRI;
3476                     return 2;
3477                 }
3478                 memset((char*)scp->sense_buffer,0,16);
3479                 scp->sense_buffer[0] = 0x70;
3480                 scp->sense_buffer[2] = NOT_READY;
3481                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3482             } else if (service == CACHESERVICE) {
3483                 if (ha->status == S_CACHE_UNKNOWN &&
3484                     (ha->hdr[t].cluster_type &
3485                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3486                     /* bus reset -> force GDT_CLUST_INFO */
3487                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3488                 }
3489                 memset((char*)scp->sense_buffer,0,16);
3490                 if (ha->status == (ushort)S_CACHE_RESERV) {
3491                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3492                 } else {
3493                     scp->sense_buffer[0] = 0x70;
3494                     scp->sense_buffer[2] = NOT_READY;
3495                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3496                 }
3497                 if (!IS_GDTH_INTERNAL_CMD(scp)) {
3498                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3499                     ha->dvr.eu.sync.ionode  = hanum;
3500                     ha->dvr.eu.sync.service = service;
3501                     ha->dvr.eu.sync.status  = ha->status;
3502                     ha->dvr.eu.sync.info    = ha->info;
3503                     ha->dvr.eu.sync.hostdrive = t;
3504                     if (ha->status >= 0x8000)
3505                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3506                     else
3507                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3508                 }
3509             } else {
3510                 /* sense buffer filled from controller firmware (DMA) */
3511                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3512                     scp->result = DID_BAD_TARGET << 16;
3513                 } else {
3514                     scp->result = (DID_OK << 16) | ha->info;
3515                 }
3516             }
3517         }
3518         if (!scp->SCp.have_data_in)
3519             scp->SCp.have_data_in++;
3520         else
3521             return 1;
3522     }
3523
3524     return 0;
3525 }
3526
3527 static char *async_cache_tab[] = {
3528 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3529         "GDT HA %u, service %u, async. status %u/%lu unknown",
3530 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3531         "GDT HA %u, service %u, async. status %u/%lu unknown",
3532 /* 2*/  "\005\000\002\006\004"
3533         "GDT HA %u, Host Drive %lu not ready",
3534 /* 3*/  "\005\000\002\006\004"
3535         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3536 /* 4*/  "\005\000\002\006\004"
3537         "GDT HA %u, mirror update on Host Drive %lu failed",
3538 /* 5*/  "\005\000\002\006\004"
3539         "GDT HA %u, Mirror Drive %lu failed",
3540 /* 6*/  "\005\000\002\006\004"
3541         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3542 /* 7*/  "\005\000\002\006\004"
3543         "GDT HA %u, Host Drive %lu write protected",
3544 /* 8*/  "\005\000\002\006\004"
3545         "GDT HA %u, media changed in Host Drive %lu",
3546 /* 9*/  "\005\000\002\006\004"
3547         "GDT HA %u, Host Drive %lu is offline",
3548 /*10*/  "\005\000\002\006\004"
3549         "GDT HA %u, media change of Mirror Drive %lu",
3550 /*11*/  "\005\000\002\006\004"
3551         "GDT HA %u, Mirror Drive %lu is write protected",
3552 /*12*/  "\005\000\002\006\004"
3553         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3554 /*13*/  "\007\000\002\006\002\010\002"
3555         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3556 /*14*/  "\005\000\002\006\002"
3557         "GDT HA %u, Array Drive %u: FAIL state entered",
3558 /*15*/  "\005\000\002\006\002"
3559         "GDT HA %u, Array Drive %u: error",
3560 /*16*/  "\007\000\002\006\002\010\002"
3561         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3562 /*17*/  "\005\000\002\006\002"
3563         "GDT HA %u, Array Drive %u: parity build failed",
3564 /*18*/  "\005\000\002\006\002"
3565         "GDT HA %u, Array Drive %u: drive rebuild failed",
3566 /*19*/  "\005\000\002\010\002"
3567         "GDT HA %u, Test of Hot Fix %u failed",
3568 /*20*/  "\005\000\002\006\002"
3569         "GDT HA %u, Array Drive %u: drive build finished successfully",
3570 /*21*/  "\005\000\002\006\002"
3571         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3572 /*22*/  "\007\000\002\006\002\010\002"
3573         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3574 /*23*/  "\005\000\002\006\002"
3575         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3576 /*24*/  "\005\000\002\010\002"
3577         "GDT HA %u, mirror update on Cache Drive %u completed",
3578 /*25*/  "\005\000\002\010\002"
3579         "GDT HA %u, mirror update on Cache Drive %lu failed",
3580 /*26*/  "\005\000\002\006\002"
3581         "GDT HA %u, Array Drive %u: drive rebuild started",
3582 /*27*/  "\005\000\002\012\001"
3583         "GDT HA %u, Fault bus %u: SHELF OK detected",
3584 /*28*/  "\005\000\002\012\001"
3585         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3586 /*29*/  "\007\000\002\012\001\013\001"
3587         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3588 /*30*/  "\007\000\002\012\001\013\001"
3589         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3590 /*31*/  "\007\000\002\012\001\013\001"
3591         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3592 /*32*/  "\007\000\002\012\001\013\001"
3593         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3594 /*33*/  "\007\000\002\012\001\013\001"
3595         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3596 /*34*/  "\011\000\002\012\001\013\001\006\004"
3597         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3598 /*35*/  "\007\000\002\012\001\013\001"
3599         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3600 /*36*/  "\007\000\002\012\001\013\001"
3601         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3602 /*37*/  "\007\000\002\012\001\006\004"
3603         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3604 /*38*/  "\007\000\002\012\001\013\001"
3605         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3606 /*39*/  "\007\000\002\012\001\013\001"
3607         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3608 /*40*/  "\007\000\002\012\001\013\001"
3609         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3610 /*41*/  "\007\000\002\012\001\013\001"
3611         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3612 /*42*/  "\005\000\002\006\002"
3613         "GDT HA %u, Array Drive %u: drive build started",
3614 /*43*/  "\003\000\002"
3615         "GDT HA %u, DRAM parity error detected",
3616 /*44*/  "\005\000\002\006\002"
3617         "GDT HA %u, Mirror Drive %u: update started",
3618 /*45*/  "\007\000\002\006\002\010\002"
3619         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3620 /*46*/  "\005\000\002\006\002"
3621         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3622 /*47*/  "\005\000\002\006\002"
3623         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3624 /*48*/  "\005\000\002\006\002"
3625         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3626 /*49*/  "\005\000\002\006\002"
3627         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3628 /*50*/  "\007\000\002\012\001\013\001"
3629         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3630 /*51*/  "\005\000\002\006\002"
3631         "GDT HA %u, Array Drive %u: expand started",
3632 /*52*/  "\005\000\002\006\002"
3633         "GDT HA %u, Array Drive %u: expand finished successfully",
3634 /*53*/  "\005\000\002\006\002"
3635         "GDT HA %u, Array Drive %u: expand failed",
3636 /*54*/  "\003\000\002"
3637         "GDT HA %u, CPU temperature critical",
3638 /*55*/  "\003\000\002"
3639         "GDT HA %u, CPU temperature OK",
3640 /*56*/  "\005\000\002\006\004"
3641         "GDT HA %u, Host drive %lu created",
3642 /*57*/  "\005\000\002\006\002"
3643         "GDT HA %u, Array Drive %u: expand restarted",
3644 /*58*/  "\005\000\002\006\002"
3645         "GDT HA %u, Array Drive %u: expand stopped",
3646 /*59*/  "\005\000\002\010\002"
3647         "GDT HA %u, Mirror Drive %u: drive build quited",
3648 /*60*/  "\005\000\002\006\002"
3649         "GDT HA %u, Array Drive %u: parity build quited",
3650 /*61*/  "\005\000\002\006\002"
3651         "GDT HA %u, Array Drive %u: drive rebuild quited",
3652 /*62*/  "\005\000\002\006\002"
3653         "GDT HA %u, Array Drive %u: parity verify started",
3654 /*63*/  "\005\000\002\006\002"
3655         "GDT HA %u, Array Drive %u: parity verify done",
3656 /*64*/  "\005\000\002\006\002"
3657         "GDT HA %u, Array Drive %u: parity verify failed",
3658 /*65*/  "\005\000\002\006\002"
3659         "GDT HA %u, Array Drive %u: parity error detected",
3660 /*66*/  "\005\000\002\006\002"
3661         "GDT HA %u, Array Drive %u: parity verify quited",
3662 /*67*/  "\005\000\002\006\002"
3663         "GDT HA %u, Host Drive %u reserved",
3664 /*68*/  "\005\000\002\006\002"
3665         "GDT HA %u, Host Drive %u mounted and released",
3666 /*69*/  "\005\000\002\006\002"
3667         "GDT HA %u, Host Drive %u released",
3668 /*70*/  "\003\000\002"
3669         "GDT HA %u, DRAM error detected and corrected with ECC",
3670 /*71*/  "\003\000\002"
3671         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3672 /*72*/  "\011\000\002\012\001\013\001\014\001"
3673         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3674 /*73*/  "\005\000\002\006\002"
3675         "GDT HA %u, Host drive %u resetted locally",
3676 /*74*/  "\005\000\002\006\002"
3677         "GDT HA %u, Host drive %u resetted remotely",
3678 /*75*/  "\003\000\002"
3679         "GDT HA %u, async. status 75 unknown",
3680 };
3681
3682
3683 static int gdth_async_event(int hanum)
3684 {
3685     gdth_ha_str *ha;
3686     gdth_cmd_str *cmdp;
3687     int cmd_index;
3688
3689     ha  = HADATA(gdth_ctr_tab[hanum]);
3690     cmdp= ha->pccb;
3691     TRACE2(("gdth_async_event() ha %d serv %d\n",
3692             hanum,ha->service));
3693
3694     if (ha->service == SCREENSERVICE) {
3695         if (ha->status == MSG_REQUEST) {
3696             while (gdth_test_busy(hanum))
3697                 gdth_delay(0);
3698             cmdp->Service       = SCREENSERVICE;
3699             cmdp->RequestBuffer = SCREEN_CMND;
3700             cmd_index = gdth_get_cmd_index(hanum);
3701             gdth_set_sema0(hanum);
3702             cmdp->OpCode        = GDT_READ;
3703             cmdp->BoardNode     = LOCALBOARD;
3704             cmdp->u.screen.reserved  = 0;
3705             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3706             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3707             ha->cmd_offs_dpmem = 0;
3708             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3709                 + sizeof(ulong64);
3710             ha->cmd_cnt = 0;
3711             gdth_copy_command(hanum);
3712             if (ha->type == GDT_EISA)
3713                 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
3714             else if (ha->type == GDT_ISA)
3715                 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
3716             else
3717                 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
3718                        (ushort)((ha->brd_phys>>3)&0x1f));
3719             gdth_release_event(hanum);
3720         }
3721
3722     } else {
3723         if (ha->type == GDT_PCIMPR &&
3724             (ha->fw_vers & 0xff) >= 0x1a) {
3725             ha->dvr.size = 0;
3726             ha->dvr.eu.async.ionode = hanum;
3727             ha->dvr.eu.async.status  = ha->status;
3728             /* severity and event_string already set! */
3729         } else {
3730             ha->dvr.size = sizeof(ha->dvr.eu.async);
3731             ha->dvr.eu.async.ionode   = hanum;
3732             ha->dvr.eu.async.service = ha->service;
3733             ha->dvr.eu.async.status  = ha->status;
3734             ha->dvr.eu.async.info    = ha->info;
3735             *(ulong32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
3736         }
3737         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3738         gdth_log_event( &ha->dvr, NULL );
3739
3740         /* new host drive from expand? */
3741         if (ha->service == CACHESERVICE && ha->status == 56) {
3742             TRACE2(("gdth_async_event(): new host drive %d created\n",
3743                     (ushort)ha->info));
3744             /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
3745         }
3746     }
3747     return 1;
3748 }
3749
3750 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3751 {
3752     gdth_stackframe stack;
3753     char *f = NULL;
3754     int i,j;
3755
3756     TRACE2(("gdth_log_event()\n"));
3757     if (dvr->size == 0) {
3758         if (buffer == NULL) {
3759             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3760         } else {
3761             sprintf(buffer,"Adapter %d: %s\n",
3762                 dvr->eu.async.ionode,dvr->event_string);
3763         }
3764     } else if (dvr->eu.async.service == CACHESERVICE &&
3765         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3766         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3767                 dvr->eu.async.status));
3768
3769         f = async_cache_tab[dvr->eu.async.status];
3770
3771         /* i: parameter to push, j: stack element to fill */
3772         for (j=0,i=1; i < f[0]; i+=2) {
3773             switch (f[i+1]) {
3774               case 4:
3775                 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
3776                 break;
3777               case 2:
3778                 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
3779                 break;
3780               case 1:
3781                 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
3782                 break;
3783               default:
3784                 break;
3785             }
3786         }
3787
3788         if (buffer == NULL) {
3789             printk(&f[(int)f[0]],stack);
3790             printk("\n");
3791         } else {
3792             sprintf(buffer,&f[(int)f[0]],stack);
3793         }
3794
3795     } else {
3796         if (buffer == NULL) {
3797             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3798                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3799         } else {
3800             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
3801                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3802         }
3803     }
3804 }
3805
3806 #ifdef GDTH_STATISTICS
3807 static void gdth_timeout(ulong data)
3808 {
3809     ulong32 i;
3810     Scsi_Cmnd *nscp;
3811     gdth_ha_str *ha;
3812     ulong flags;
3813     int hanum = 0;
3814
3815     ha = HADATA(gdth_ctr_tab[hanum]);
3816     spin_lock_irqsave(&ha->smp_lock, flags);
3817
3818     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
3819         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
3820             ++act_stats;
3821
3822     for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
3823         ++act_rq;
3824
3825     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3826             act_ints, act_ios, act_stats, act_rq));
3827     act_ints = act_ios = 0;
3828
3829     gdth_timer.expires = jiffies + 30 * HZ;
3830     add_timer(&gdth_timer);
3831     spin_unlock_irqrestore(&ha->smp_lock, flags);
3832 }
3833 #endif
3834
3835 static void __init internal_setup(char *str,int *ints)
3836 {
3837     int i, argc;
3838     char *cur_str, *argv;
3839
3840     TRACE2(("internal_setup() str %s ints[0] %d\n",
3841             str ? str:"NULL", ints ? ints[0]:0));
3842
3843     /* read irq[] from ints[] */
3844     if (ints) {
3845         argc = ints[0];
3846         if (argc > 0) {
3847             if (argc > MAXHA)
3848                 argc = MAXHA;
3849             for (i = 0; i < argc; ++i)
3850                 irq[i] = ints[i+1];
3851         }
3852     }
3853
3854     /* analyse string */
3855     argv = str;
3856     while (argv && (cur_str = strchr(argv, ':'))) {
3857         int val = 0, c = *++cur_str;
3858
3859         if (c == 'n' || c == 'N')
3860             val = 0;
3861         else if (c == 'y' || c == 'Y')
3862             val = 1;
3863         else
3864             val = (int)simple_strtoul(cur_str, NULL, 0);
3865
3866         if (!strncmp(argv, "disable:", 8))
3867             disable = val;
3868         else if (!strncmp(argv, "reserve_mode:", 13))
3869             reserve_mode = val;
3870         else if (!strncmp(argv, "reverse_scan:", 13))
3871             reverse_scan = val;
3872         else if (!strncmp(argv, "hdr_channel:", 12))
3873             hdr_channel = val;
3874         else if (!strncmp(argv, "max_ids:", 8))
3875             max_ids = val;
3876         else if (!strncmp(argv, "rescan:", 7))
3877             rescan = val;
3878         else if (!strncmp(argv, "shared_access:", 14))
3879             shared_access = val;
3880         else if (!strncmp(argv, "probe_eisa_isa:", 15))
3881             probe_eisa_isa = val;
3882         else if (!strncmp(argv, "reserve_list:", 13)) {
3883             reserve_list[0] = val;
3884             for (i = 1; i < MAX_RES_ARGS; i++) {
3885                 cur_str = strchr(cur_str, ',');
3886                 if (!cur_str)
3887                     break;
3888                 if (!isdigit((int)*++cur_str)) {
3889                     --cur_str;
3890                     break;
3891                 }
3892                 reserve_list[i] =
3893                     (int)simple_strtoul(cur_str, NULL, 0);
3894             }
3895             if (!cur_str)
3896                 break;
3897             argv = ++cur_str;
3898             continue;
3899         }
3900
3901         if ((argv = strchr(argv, ',')))
3902             ++argv;
3903     }
3904 }
3905
3906 int __init option_setup(char *str)
3907 {
3908     int ints[MAXHA];
3909     char *cur = str;
3910     int i = 1;
3911
3912     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
3913
3914     while (cur && isdigit(*cur) && i <= MAXHA) {
3915         ints[i++] = simple_strtoul(cur, NULL, 0);
3916         if ((cur = strchr(cur, ',')) != NULL) cur++;
3917     }
3918
3919     ints[0] = i - 1;
3920     internal_setup(cur, ints);
3921     return 1;
3922 }
3923
3924 static int __init gdth_detect(struct scsi_host_template *shtp)
3925 {
3926 #ifdef DEBUG_GDTH
3927     printk("GDT: This driver contains debugging information !! Trace level = %d\n",
3928         DebugState);
3929     printk("     Destination of debugging information: ");
3930 #ifdef __SERIAL__
3931 #ifdef __COM2__
3932     printk("Serial port COM2\n");
3933 #else
3934     printk("Serial port COM1\n");
3935 #endif
3936 #else
3937     printk("Console\n");
3938 #endif
3939     gdth_delay(3000);
3940 #endif
3941
3942     TRACE(("gdth_detect()\n"));
3943
3944     if (disable) {
3945         printk("GDT-HA: Controller driver disabled from command line !\n");
3946         return 0;
3947     }
3948
3949     printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",GDTH_VERSION_STR);
3950     /* initializations */
3951     gdth_polling = TRUE;
3952     gdth_clear_events();
3953
3954     /* As default we do not probe for EISA or ISA controllers */
3955     if (probe_eisa_isa) {
3956         /* scanning for controllers, at first: ISA controller */
3957 #ifdef CONFIG_ISA
3958         ulong32 isa_bios;
3959         for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
3960              isa_bios += 0x8000UL) {
3961             if (gdth_ctr_count >= MAXHA)
3962                 break;
3963             gdth_isa_probe_one(shtp, isa_bios);
3964         }
3965 #endif
3966 #ifdef CONFIG_EISA
3967         {
3968         ushort eisa_slot;
3969         for (eisa_slot = 0x1000; eisa_slot <= 0x8000; eisa_slot += 0x1000) {
3970             if (gdth_ctr_count >= MAXHA)
3971                 break;
3972             gdth_eisa_probe_one(shtp, eisa_slot);
3973         }
3974         }
3975 #endif
3976     }
3977
3978 #ifdef CONFIG_PCI
3979     /* scanning for PCI controllers */
3980     {
3981     gdth_pci_str pcistr[MAXHA];
3982     int cnt,ctr;
3983
3984     cnt = gdth_search_pci(pcistr);
3985     printk("GDT-HA: Found %d PCI Storage RAID Controllers\n",cnt);
3986     gdth_sort_pci(pcistr,cnt);
3987     for (ctr = 0; ctr < cnt; ++ctr) {
3988         if (gdth_ctr_count >= MAXHA)
3989             break;
3990         gdth_pci_probe_one(shtp, pcistr, ctr);
3991     }
3992     }
3993 #endif /* CONFIG_PCI */
3994
3995     TRACE2(("gdth_detect() %d controller detected\n",gdth_ctr_count));
3996     if (gdth_ctr_count > 0) {
3997 #ifdef GDTH_STATISTICS
3998         TRACE2(("gdth_detect(): Initializing timer !\n"));
3999         init_timer(&gdth_timer);
4000         gdth_timer.expires = jiffies + HZ;
4001         gdth_timer.data = 0L;
4002         gdth_timer.function = gdth_timeout;
4003         add_timer(&gdth_timer);
4004 #endif
4005         major = register_chrdev(0,"gdth",&gdth_fops);
4006         notifier_disabled = 0;
4007         register_reboot_notifier(&gdth_notifier);
4008     }
4009     gdth_polling = FALSE;
4010     return gdth_ctr_count;
4011 }
4012
4013 static int gdth_release(struct Scsi_Host *shp)
4014 {
4015     int hanum;
4016     gdth_ha_str *ha;
4017
4018     TRACE2(("gdth_release()\n"));
4019         hanum = NUMDATA(shp)->hanum;
4020         ha    = HADATA(gdth_ctr_tab[hanum]);
4021         if (ha->sdev) {
4022             scsi_free_host_dev(ha->sdev);
4023             ha->sdev = NULL;
4024         }
4025         gdth_flush(hanum);
4026
4027         if (shp->irq) {
4028             free_irq(shp->irq,ha);
4029         }
4030 #ifdef CONFIG_ISA
4031         if (shp->dma_channel != 0xff) {
4032             free_dma(shp->dma_channel);
4033         }
4034 #endif
4035 #ifdef INT_COAL
4036         if (ha->coal_stat)
4037             pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4038                                 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
4039 #endif
4040         if (ha->pscratch)
4041             pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4042                                 ha->pscratch, ha->scratch_phys);
4043         if (ha->pmsg)
4044             pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4045                                 ha->pmsg, ha->msg_phys);
4046         if (ha->ccb_phys)
4047             pci_unmap_single(ha->pdev,ha->ccb_phys,
4048                              sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4049         gdth_ctr_released++;
4050         TRACE2(("gdth_release(): HA %d of %d\n",
4051                 gdth_ctr_released, gdth_ctr_count));
4052
4053         if (gdth_ctr_released == gdth_ctr_count) {
4054 #ifdef GDTH_STATISTICS
4055             del_timer(&gdth_timer);
4056 #endif
4057             unregister_chrdev(major,"gdth");
4058             unregister_reboot_notifier(&gdth_notifier);
4059         }
4060
4061     scsi_unregister(shp);
4062     return 0;
4063 }
4064
4065
4066 static const char *gdth_ctr_name(int hanum)
4067 {
4068     gdth_ha_str *ha;
4069
4070     TRACE2(("gdth_ctr_name()\n"));
4071
4072     ha    = HADATA(gdth_ctr_tab[hanum]);
4073
4074     if (ha->type == GDT_EISA) {
4075         switch (ha->stype) {
4076           case GDT3_ID:
4077             return("GDT3000/3020");
4078           case GDT3A_ID:
4079             return("GDT3000A/3020A/3050A");
4080           case GDT3B_ID:
4081             return("GDT3000B/3010A");
4082         }
4083     } else if (ha->type == GDT_ISA) {
4084         return("GDT2000/2020");
4085     } else if (ha->type == GDT_PCI) {
4086         switch (ha->pdev->device) {
4087           case PCI_DEVICE_ID_VORTEX_GDT60x0:
4088             return("GDT6000/6020/6050");
4089           case PCI_DEVICE_ID_VORTEX_GDT6000B:
4090             return("GDT6000B/6010");
4091         }
4092     }
4093     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
4094
4095     return("");
4096 }
4097
4098 static const char *gdth_info(struct Scsi_Host *shp)
4099 {
4100     int hanum;
4101     gdth_ha_str *ha;
4102
4103     TRACE2(("gdth_info()\n"));
4104     hanum = NUMDATA(shp)->hanum;
4105     ha    = HADATA(gdth_ctr_tab[hanum]);
4106
4107     return ((const char *)ha->binfo.type_string);
4108 }
4109
4110 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
4111 {
4112     int i, hanum;
4113     gdth_ha_str *ha;
4114     ulong flags;
4115     Scsi_Cmnd *cmnd;
4116     unchar b;
4117
4118     TRACE2(("gdth_eh_bus_reset()\n"));
4119
4120     hanum = NUMDATA(scp->device->host)->hanum;
4121     b = scp->device->channel;
4122     ha    = HADATA(gdth_ctr_tab[hanum]);
4123
4124     /* clear command tab */
4125     spin_lock_irqsave(&ha->smp_lock, flags);
4126     for (i = 0; i < GDTH_MAXCMDS; ++i) {
4127         cmnd = ha->cmd_tab[i].cmnd;
4128         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
4129             ha->cmd_tab[i].cmnd = UNUSED_CMND;
4130     }
4131     spin_unlock_irqrestore(&ha->smp_lock, flags);
4132
4133     if (b == ha->virt_bus) {
4134         /* host drives */
4135         for (i = 0; i < MAX_HDRIVES; ++i) {
4136             if (ha->hdr[i].present) {
4137                 spin_lock_irqsave(&ha->smp_lock, flags);
4138                 gdth_polling = TRUE;
4139                 while (gdth_test_busy(hanum))
4140                     gdth_delay(0);
4141                 if (gdth_internal_cmd(hanum, CACHESERVICE,
4142                                       GDT_CLUST_RESET, i, 0, 0))
4143                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4144                 gdth_polling = FALSE;
4145                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4146             }
4147         }
4148     } else {
4149         /* raw devices */
4150         spin_lock_irqsave(&ha->smp_lock, flags);
4151         for (i = 0; i < MAXID; ++i)
4152             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4153         gdth_polling = TRUE;
4154         while (gdth_test_busy(hanum))
4155             gdth_delay(0);
4156         gdth_internal_cmd(hanum, SCSIRAWSERVICE, GDT_RESET_BUS,
4157                           BUS_L2P(ha,b), 0, 0);
4158         gdth_polling = FALSE;
4159         spin_unlock_irqrestore(&ha->smp_lock, flags);
4160     }
4161     return SUCCESS;
4162 }
4163
4164 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
4165 {
4166     unchar b, t;
4167     int hanum;
4168     gdth_ha_str *ha;
4169     struct scsi_device *sd;
4170     unsigned capacity;
4171
4172     sd = sdev;
4173     capacity = cap;
4174     hanum = NUMDATA(sd->host)->hanum;
4175     b = sd->channel;
4176     t = sd->id;
4177     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4178     ha = HADATA(gdth_ctr_tab[hanum]);
4179
4180     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4181         /* raw device or host drive without mapping information */
4182         TRACE2(("Evaluate mapping\n"));
4183         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
4184     } else {
4185         ip[0] = ha->hdr[t].heads;
4186         ip[1] = ha->hdr[t].secs;
4187         ip[2] = capacity / ip[0] / ip[1];
4188     }
4189
4190     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4191             ip[0],ip[1],ip[2]));
4192     return 0;
4193 }
4194
4195
4196 static int gdth_queuecommand(struct scsi_cmnd *scp,
4197                                 void (*done)(struct scsi_cmnd *))
4198 {
4199     int hanum;
4200     int priority;
4201
4202     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4203
4204     scp->scsi_done = done;
4205     scp->SCp.have_data_in = 1;
4206     scp->SCp.phase = -1;
4207     scp->SCp.sent_command = -1;
4208     scp->SCp.Status = GDTH_MAP_NONE;
4209     scp->SCp.buffer = (struct scatterlist *)NULL;
4210
4211     hanum = NUMDATA(scp->device->host)->hanum;
4212 #ifdef GDTH_STATISTICS
4213     ++act_ios;
4214 #endif
4215
4216     priority = DEFAULT_PRI;
4217     if (IS_GDTH_INTERNAL_CMD(scp))
4218         priority = scp->SCp.this_residual;
4219     else
4220         gdth_update_timeout(hanum, scp, scp->timeout_per_command * 6);
4221
4222     gdth_putq( hanum, scp, priority );
4223     gdth_next( hanum );
4224     return 0;
4225 }
4226
4227
4228 static int gdth_open(struct inode *inode, struct file *filep)
4229 {
4230     gdth_ha_str *ha;
4231     int i;
4232
4233     for (i = 0; i < gdth_ctr_count; i++) {
4234         ha = HADATA(gdth_ctr_tab[i]);
4235         if (!ha->sdev)
4236             ha->sdev = scsi_get_host_dev(gdth_ctr_tab[i]);
4237     }
4238
4239     TRACE(("gdth_open()\n"));
4240     return 0;
4241 }
4242
4243 static int gdth_close(struct inode *inode, struct file *filep)
4244 {
4245     TRACE(("gdth_close()\n"));
4246     return 0;
4247 }
4248
4249 static int ioc_event(void __user *arg)
4250 {
4251     gdth_ioctl_event evt;
4252     gdth_ha_str *ha;
4253     ulong flags;
4254
4255     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)) ||
4256         evt.ionode >= gdth_ctr_count)
4257         return -EFAULT;
4258     ha = HADATA(gdth_ctr_tab[evt.ionode]);
4259
4260     if (evt.erase == 0xff) {
4261         if (evt.event.event_source == ES_TEST)
4262             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4263         else if (evt.event.event_source == ES_DRIVER)
4264             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4265         else if (evt.event.event_source == ES_SYNC)
4266             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4267         else
4268             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4269         spin_lock_irqsave(&ha->smp_lock, flags);
4270         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4271                          &evt.event.event_data);
4272         spin_unlock_irqrestore(&ha->smp_lock, flags);
4273     } else if (evt.erase == 0xfe) {
4274         gdth_clear_events();
4275     } else if (evt.erase == 0) {
4276         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4277     } else {
4278         gdth_readapp_event(ha, evt.erase, &evt.event);
4279     }
4280     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4281         return -EFAULT;
4282     return 0;
4283 }
4284
4285 static int ioc_lockdrv(void __user *arg)
4286 {
4287     gdth_ioctl_lockdrv ldrv;
4288     unchar i, j;
4289     ulong flags;
4290     gdth_ha_str *ha;
4291
4292     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)) ||
4293         ldrv.ionode >= gdth_ctr_count)
4294         return -EFAULT;
4295     ha = HADATA(gdth_ctr_tab[ldrv.ionode]);
4296
4297     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4298         j = ldrv.drives[i];
4299         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4300             continue;
4301         if (ldrv.lock) {
4302             spin_lock_irqsave(&ha->smp_lock, flags);
4303             ha->hdr[j].lock = 1;
4304             spin_unlock_irqrestore(&ha->smp_lock, flags);
4305             gdth_wait_completion(ldrv.ionode, ha->bus_cnt, j);
4306             gdth_stop_timeout(ldrv.ionode, ha->bus_cnt, j);
4307         } else {
4308             spin_lock_irqsave(&ha->smp_lock, flags);
4309             ha->hdr[j].lock = 0;
4310             spin_unlock_irqrestore(&ha->smp_lock, flags);
4311             gdth_start_timeout(ldrv.ionode, ha->bus_cnt, j);
4312             gdth_next(ldrv.ionode);
4313         }
4314     }
4315     return 0;
4316 }
4317
4318 static int ioc_resetdrv(void __user *arg, char *cmnd)
4319 {
4320     gdth_ioctl_reset res;
4321     gdth_cmd_str cmd;
4322     int hanum;
4323     gdth_ha_str *ha;
4324     int rval;
4325
4326     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4327         res.ionode >= gdth_ctr_count || res.number >= MAX_HDRIVES)
4328         return -EFAULT;
4329     hanum = res.ionode;
4330     ha = HADATA(gdth_ctr_tab[hanum]);
4331
4332     if (!ha->hdr[res.number].present)
4333         return 0;
4334     memset(&cmd, 0, sizeof(gdth_cmd_str));
4335     cmd.Service = CACHESERVICE;
4336     cmd.OpCode = GDT_CLUST_RESET;
4337     if (ha->cache_feat & GDT_64BIT)
4338         cmd.u.cache64.DeviceNo = res.number;
4339     else
4340         cmd.u.cache.DeviceNo = res.number;
4341
4342     rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
4343     if (rval < 0)
4344         return rval;
4345     res.status = rval;
4346
4347     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4348         return -EFAULT;
4349     return 0;
4350 }
4351
4352 static int ioc_general(void __user *arg, char *cmnd)
4353 {
4354     gdth_ioctl_general gen;
4355     char *buf = NULL;
4356     ulong64 paddr;
4357     int hanum;
4358     gdth_ha_str *ha;
4359     int rval;
4360
4361     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)) ||
4362         gen.ionode >= gdth_ctr_count)
4363         return -EFAULT;
4364     hanum = gen.ionode;
4365     ha = HADATA(gdth_ctr_tab[hanum]);
4366     if (gen.data_len + gen.sense_len != 0) {
4367         if (!(buf = gdth_ioctl_alloc(hanum, gen.data_len + gen.sense_len,
4368                                      FALSE, &paddr)))
4369             return -EFAULT;
4370         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4371                            gen.data_len + gen.sense_len)) {
4372             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4373             return -EFAULT;
4374         }
4375
4376         if (gen.command.OpCode == GDT_IOCTL) {
4377             gen.command.u.ioctl.p_param = paddr;
4378         } else if (gen.command.Service == CACHESERVICE) {
4379             if (ha->cache_feat & GDT_64BIT) {
4380                 /* copy elements from 32-bit IOCTL structure */
4381                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
4382                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
4383                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4384                 /* addresses */
4385                 if (ha->cache_feat & SCATTER_GATHER) {
4386                     gen.command.u.cache64.DestAddr = (ulong64)-1;
4387                     gen.command.u.cache64.sg_canz = 1;
4388                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4389                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
4390                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
4391                 } else {
4392                     gen.command.u.cache64.DestAddr = paddr;
4393                     gen.command.u.cache64.sg_canz = 0;
4394                 }
4395             } else {
4396                 if (ha->cache_feat & SCATTER_GATHER) {
4397                     gen.command.u.cache.DestAddr = 0xffffffff;
4398                     gen.command.u.cache.sg_canz = 1;
4399                     gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
4400                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4401                     gen.command.u.cache.sg_lst[1].sg_len = 0;
4402                 } else {
4403                     gen.command.u.cache.DestAddr = paddr;
4404                     gen.command.u.cache.sg_canz = 0;
4405                 }
4406             }
4407         } else if (gen.command.Service == SCSIRAWSERVICE) {
4408             if (ha->raw_feat & GDT_64BIT) {
4409                 /* copy elements from 32-bit IOCTL structure */
4410                 char cmd[16];
4411                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
4412                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
4413                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
4414                 gen.command.u.raw64.target = gen.command.u.raw.target;
4415                 memcpy(cmd, gen.command.u.raw.cmd, 16);
4416                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
4417                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
4418                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
4419                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4420                 /* addresses */
4421                 if (ha->raw_feat & SCATTER_GATHER) {
4422                     gen.command.u.raw64.sdata = (ulong64)-1;
4423                     gen.command.u.raw64.sg_ranz = 1;
4424                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4425                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
4426                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
4427                 } else {
4428                     gen.command.u.raw64.sdata = paddr;
4429                     gen.command.u.raw64.sg_ranz = 0;
4430                 }
4431                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
4432             } else {
4433                 if (ha->raw_feat & SCATTER_GATHER) {
4434                     gen.command.u.raw.sdata = 0xffffffff;
4435                     gen.command.u.raw.sg_ranz = 1;
4436                     gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
4437                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4438                     gen.command.u.raw.sg_lst[1].sg_len = 0;
4439                 } else {
4440                     gen.command.u.raw.sdata = paddr;
4441                     gen.command.u.raw.sg_ranz = 0;
4442                 }
4443                 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
4444             }
4445         } else {
4446             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4447             return -EFAULT;
4448         }
4449     }
4450
4451     rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
4452     if (rval < 0)
4453         return rval;
4454     gen.status = rval;
4455
4456     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
4457                      gen.data_len + gen.sense_len)) {
4458         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4459         return -EFAULT;
4460     }
4461     if (copy_to_user(arg, &gen,
4462         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
4463         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4464         return -EFAULT;
4465     }
4466     gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4467     return 0;
4468 }
4469
4470 static int ioc_hdrlist(void __user *arg, char *cmnd)
4471 {
4472     gdth_ioctl_rescan *rsc;
4473     gdth_cmd_str *cmd;
4474     gdth_ha_str *ha;
4475     unchar i;
4476     int hanum, rc = -ENOMEM;
4477     u32 cluster_type = 0;
4478
4479     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4480     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4481     if (!rsc || !cmd)
4482         goto free_fail;
4483
4484     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4485         rsc->ionode >= gdth_ctr_count) {
4486         rc = -EFAULT;
4487         goto free_fail;
4488     }
4489     hanum = rsc->ionode;
4490     ha = HADATA(gdth_ctr_tab[hanum]);
4491     memset(cmd, 0, sizeof(gdth_cmd_str));
4492
4493     for (i = 0; i < MAX_HDRIVES; ++i) {
4494         if (!ha->hdr[i].present) {
4495             rsc->hdr_list[i].bus = 0xff;
4496             continue;
4497         }
4498         rsc->hdr_list[i].bus = ha->virt_bus;
4499         rsc->hdr_list[i].target = i;
4500         rsc->hdr_list[i].lun = 0;
4501         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4502         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
4503             cmd->Service = CACHESERVICE;
4504             cmd->OpCode = GDT_CLUST_INFO;
4505             if (ha->cache_feat & GDT_64BIT)
4506                 cmd->u.cache64.DeviceNo = i;
4507             else
4508                 cmd->u.cache.DeviceNo = i;
4509             if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
4510                 rsc->hdr_list[i].cluster_type = cluster_type;
4511         }
4512     }
4513
4514     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4515         rc = -EFAULT;
4516     else
4517         rc = 0;
4518
4519 free_fail:
4520     kfree(rsc);
4521     kfree(cmd);
4522     return rc;
4523 }
4524
4525 static int ioc_rescan(void __user *arg, char *cmnd)
4526 {
4527     gdth_ioctl_rescan *rsc;
4528     gdth_cmd_str *cmd;
4529     ushort i, status, hdr_cnt;
4530     ulong32 info;
4531     int hanum, cyls, hds, secs;
4532     int rc = -ENOMEM;
4533     ulong flags;
4534     gdth_ha_str *ha;
4535
4536     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4537     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4538     if (!cmd || !rsc)
4539         goto free_fail;
4540
4541     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4542         rsc->ionode >= gdth_ctr_count) {
4543         rc = -EFAULT;
4544         goto free_fail;
4545     }
4546     hanum = rsc->ionode;
4547     ha = HADATA(gdth_ctr_tab[hanum]);
4548     memset(cmd, 0, sizeof(gdth_cmd_str));
4549
4550     if (rsc->flag == 0) {
4551         /* old method: re-init. cache service */
4552         cmd->Service = CACHESERVICE;
4553         if (ha->cache_feat & GDT_64BIT) {
4554             cmd->OpCode = GDT_X_INIT_HOST;
4555             cmd->u.cache64.DeviceNo = LINUX_OS;
4556         } else {
4557             cmd->OpCode = GDT_INIT;
4558             cmd->u.cache.DeviceNo = LINUX_OS;
4559         }
4560
4561         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4562         i = 0;
4563         hdr_cnt = (status == S_OK ? (ushort)info : 0);
4564     } else {
4565         i = rsc->hdr_no;
4566         hdr_cnt = i + 1;
4567     }
4568
4569     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
4570         cmd->Service = CACHESERVICE;
4571         cmd->OpCode = GDT_INFO;
4572         if (ha->cache_feat & GDT_64BIT)
4573             cmd->u.cache64.DeviceNo = i;
4574         else
4575             cmd->u.cache.DeviceNo = i;
4576
4577         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4578
4579         spin_lock_irqsave(&ha->smp_lock, flags);
4580         rsc->hdr_list[i].bus = ha->virt_bus;
4581         rsc->hdr_list[i].target = i;
4582         rsc->hdr_list[i].lun = 0;
4583         if (status != S_OK) {
4584             ha->hdr[i].present = FALSE;
4585         } else {
4586             ha->hdr[i].present = TRUE;
4587             ha->hdr[i].size = info;
4588             /* evaluate mapping */
4589             ha->hdr[i].size &= ~SECS32;
4590             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
4591             ha->hdr[i].heads = hds;
4592             ha->hdr[i].secs = secs;
4593             /* round size */
4594             ha->hdr[i].size = cyls * hds * secs;
4595         }
4596         spin_unlock_irqrestore(&ha->smp_lock, flags);
4597         if (status != S_OK)
4598             continue;
4599
4600         /* extended info, if GDT_64BIT, for drives > 2 TB */
4601         /* but we need ha->info2, not yet stored in scp->SCp */
4602
4603         /* devtype, cluster info, R/W attribs */
4604         cmd->Service = CACHESERVICE;
4605         cmd->OpCode = GDT_DEVTYPE;
4606         if (ha->cache_feat & GDT_64BIT)
4607             cmd->u.cache64.DeviceNo = i;
4608         else
4609             cmd->u.cache.DeviceNo = i;
4610
4611         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4612
4613         spin_lock_irqsave(&ha->smp_lock, flags);
4614         ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
4615         spin_unlock_irqrestore(&ha->smp_lock, flags);
4616
4617         cmd->Service = CACHESERVICE;
4618         cmd->OpCode = GDT_CLUST_INFO;
4619         if (ha->cache_feat & GDT_64BIT)
4620             cmd->u.cache64.DeviceNo = i;
4621         else
4622             cmd->u.cache.DeviceNo = i;
4623
4624         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4625
4626         spin_lock_irqsave(&ha->smp_lock, flags);
4627         ha->hdr[i].cluster_type =
4628             ((status == S_OK && !shared_access) ? (ushort)info : 0);
4629         spin_unlock_irqrestore(&ha->smp_lock, flags);
4630         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4631
4632         cmd->Service = CACHESERVICE;
4633         cmd->OpCode = GDT_RW_ATTRIBS;
4634         if (ha->cache_feat & GDT_64BIT)
4635             cmd->u.cache64.DeviceNo = i;
4636         else
4637             cmd->u.cache.DeviceNo = i;
4638
4639         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4640
4641         spin_lock_irqsave(&ha->smp_lock, flags);
4642         ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
4643         spin_unlock_irqrestore(&ha->smp_lock, flags);
4644     }
4645
4646     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4647         rc = -EFAULT;
4648     else
4649         rc = 0;
4650
4651 free_fail:
4652     kfree(rsc);
4653     kfree(cmd);
4654     return rc;
4655 }
4656
4657 static int gdth_ioctl(struct inode *inode, struct file *filep,
4658                       unsigned int cmd, unsigned long arg)
4659 {
4660     gdth_ha_str *ha;
4661     Scsi_Cmnd *scp;
4662     ulong flags;
4663     char cmnd[MAX_COMMAND_SIZE];
4664     void __user *argp = (void __user *)arg;
4665
4666     memset(cmnd, 0xff, 12);
4667
4668     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
4669
4670     switch (cmd) {
4671       case GDTIOCTL_CTRCNT:
4672       {
4673         int cnt = gdth_ctr_count;
4674         if (put_user(cnt, (int __user *)argp))
4675                 return -EFAULT;
4676         break;
4677       }
4678
4679       case GDTIOCTL_DRVERS:
4680       {
4681         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
4682         if (put_user(ver, (int __user *)argp))
4683                 return -EFAULT;
4684         break;
4685       }
4686
4687       case GDTIOCTL_OSVERS:
4688       {
4689         gdth_ioctl_osvers osv;
4690
4691         osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
4692         osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
4693         osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
4694         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
4695                 return -EFAULT;
4696         break;
4697       }
4698
4699       case GDTIOCTL_CTRTYPE:
4700       {
4701         gdth_ioctl_ctrtype ctrt;
4702
4703         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
4704             ctrt.ionode >= gdth_ctr_count)
4705             return -EFAULT;
4706         ha = HADATA(gdth_ctr_tab[ctrt.ionode]);
4707         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
4708             ctrt.type = (unchar)((ha->stype>>20) - 0x10);
4709         } else {
4710             if (ha->type != GDT_PCIMPR) {
4711                 ctrt.type = (unchar)((ha->stype<<4) + 6);
4712             } else {
4713                 ctrt.type =
4714                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
4715                 if (ha->stype >= 0x300)
4716                     ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
4717                 else
4718                     ctrt.ext_type = 0x6000 | ha->stype;
4719             }
4720             ctrt.device_id = ha->pdev->device;
4721             ctrt.sub_device_id = ha->pdev->subsystem_device;
4722         }
4723         ctrt.info = ha->brd_phys;
4724         ctrt.oem_id = ha->oem_id;
4725         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
4726             return -EFAULT;
4727         break;
4728       }
4729
4730       case GDTIOCTL_GENERAL:
4731         return ioc_general(argp, cmnd);
4732
4733       case GDTIOCTL_EVENT:
4734         return ioc_event(argp);
4735
4736       case GDTIOCTL_LOCKDRV:
4737         return ioc_lockdrv(argp);
4738
4739       case GDTIOCTL_LOCKCHN:
4740       {
4741         gdth_ioctl_lockchn lchn;
4742         unchar i, j;
4743
4744         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
4745             lchn.ionode >= gdth_ctr_count)
4746             return -EFAULT;
4747         ha = HADATA(gdth_ctr_tab[lchn.ionode]);
4748
4749         i = lchn.channel;
4750         if (i < ha->bus_cnt) {
4751             if (lchn.lock) {
4752                 spin_lock_irqsave(&ha->smp_lock, flags);
4753                 ha->raw[i].lock = 1;
4754                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4755                 for (j = 0; j < ha->tid_cnt; ++j) {
4756                     gdth_wait_completion(lchn.ionode, i, j);
4757                     gdth_stop_timeout(lchn.ionode, i, j);
4758                 }
4759             } else {
4760                 spin_lock_irqsave(&ha->smp_lock, flags);
4761                 ha->raw[i].lock = 0;
4762                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4763                 for (j = 0; j < ha->tid_cnt; ++j) {
4764                     gdth_start_timeout(lchn.ionode, i, j);
4765                     gdth_next(lchn.ionode);
4766                 }
4767             }
4768         }
4769         break;
4770       }
4771
4772       case GDTIOCTL_RESCAN:
4773         return ioc_rescan(argp, cmnd);
4774
4775       case GDTIOCTL_HDRLIST:
4776         return ioc_hdrlist(argp, cmnd);
4777
4778       case GDTIOCTL_RESET_BUS:
4779       {
4780         gdth_ioctl_reset res;
4781         int hanum, rval;
4782
4783         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
4784             res.ionode >= gdth_ctr_count)
4785             return -EFAULT;
4786         hanum = res.ionode;
4787         ha = HADATA(gdth_ctr_tab[hanum]);
4788
4789         scp  = kzalloc(sizeof(*scp), GFP_KERNEL);
4790         if (!scp)
4791             return -ENOMEM;
4792         scp->device = ha->sdev;
4793         scp->cmd_len = 12;
4794         scp->use_sg = 0;
4795         scp->device->channel = res.number;
4796         rval = gdth_eh_bus_reset(scp);
4797         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
4798         kfree(scp);
4799
4800         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
4801             return -EFAULT;
4802         break;
4803       }
4804
4805       case GDTIOCTL_RESET_DRV:
4806         return ioc_resetdrv(argp, cmnd);
4807
4808       default:
4809         break;
4810     }
4811     return 0;
4812 }
4813
4814
4815 /* flush routine */
4816 static void gdth_flush(int hanum)
4817 {
4818     int             i;
4819     gdth_ha_str     *ha;
4820     gdth_cmd_str    gdtcmd;
4821     char            cmnd[MAX_COMMAND_SIZE];
4822     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4823
4824     TRACE2(("gdth_flush() hanum %d\n",hanum));
4825     ha = HADATA(gdth_ctr_tab[hanum]);
4826
4827     for (i = 0; i < MAX_HDRIVES; ++i) {
4828         if (ha->hdr[i].present) {
4829             gdtcmd.BoardNode = LOCALBOARD;
4830             gdtcmd.Service = CACHESERVICE;
4831             gdtcmd.OpCode = GDT_FLUSH;
4832             if (ha->cache_feat & GDT_64BIT) {
4833                 gdtcmd.u.cache64.DeviceNo = i;
4834                 gdtcmd.u.cache64.BlockNo = 1;
4835                 gdtcmd.u.cache64.sg_canz = 0;
4836             } else {
4837                 gdtcmd.u.cache.DeviceNo = i;
4838                 gdtcmd.u.cache.BlockNo = 1;
4839                 gdtcmd.u.cache.sg_canz = 0;
4840             }
4841             TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));
4842
4843             gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 30, NULL);
4844         }
4845     }
4846 }
4847
4848 /* shutdown routine */
4849 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
4850 {
4851     int             hanum;
4852 #ifndef __alpha__
4853     gdth_cmd_str    gdtcmd;
4854     char            cmnd[MAX_COMMAND_SIZE];
4855 #endif
4856
4857     if (notifier_disabled)
4858         return NOTIFY_OK;
4859
4860     TRACE2(("gdth_halt() event %d\n",(int)event));
4861     if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
4862         return NOTIFY_DONE;
4863
4864     notifier_disabled = 1;
4865     printk("GDT-HA: Flushing all host drives .. ");
4866     for (hanum = 0; hanum < gdth_ctr_count; ++hanum) {
4867         gdth_flush(hanum);
4868
4869 #ifndef __alpha__
4870         /* controller reset */
4871         memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4872         gdtcmd.BoardNode = LOCALBOARD;
4873         gdtcmd.Service = CACHESERVICE;
4874         gdtcmd.OpCode = GDT_RESET;
4875         TRACE2(("gdth_halt(): reset controller %d\n", hanum));
4876         gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 10, NULL);
4877 #endif
4878     }
4879     printk("Done.\n");
4880
4881 #ifdef GDTH_STATISTICS
4882     del_timer(&gdth_timer);
4883 #endif
4884     return NOTIFY_OK;
4885 }
4886
4887 /* configure lun */
4888 static int gdth_slave_configure(struct scsi_device *sdev)
4889 {
4890     scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
4891     sdev->skip_ms_page_3f = 1;
4892     sdev->skip_ms_page_8 = 1;
4893     return 0;
4894 }
4895
4896 static struct scsi_host_template driver_template = {
4897         .name                   = "GDT SCSI Disk Array Controller",
4898         .detect                 = gdth_detect,
4899         .release                = gdth_release,
4900         .info                   = gdth_info,
4901         .queuecommand           = gdth_queuecommand,
4902         .eh_bus_reset_handler   = gdth_eh_bus_reset,
4903         .slave_configure        = gdth_slave_configure,
4904         .bios_param             = gdth_bios_param,
4905         .proc_info              = gdth_proc_info,
4906         .proc_name              = "gdth",
4907         .can_queue              = GDTH_MAXCMDS,
4908         .this_id                = -1,
4909         .sg_tablesize           = GDTH_MAXSG,
4910         .cmd_per_lun            = GDTH_MAXC_P_L,
4911         .unchecked_isa_dma      = 1,
4912         .use_clustering         = ENABLE_CLUSTERING,
4913 };
4914
4915 #ifdef CONFIG_ISA
4916 static int gdth_isa_probe_one(struct scsi_host_template *shtp, ulong32 isa_bios)
4917 {
4918         struct Scsi_Host *shp;
4919         gdth_ha_str *ha;
4920         dma_addr_t scratch_dma_handle = 0;
4921         int error, hanum, i;
4922
4923         if (!gdth_search_isa(isa_bios))
4924                 return -ENXIO;
4925
4926         shp = scsi_register(shtp, sizeof(gdth_ext_str));
4927         if (!shp)
4928                 return -ENOMEM;
4929         ha = HADATA(shp);
4930
4931         error = -ENODEV;
4932         if (!gdth_init_isa(isa_bios,ha))
4933                 goto out_host_put;
4934
4935         /* controller found and initialized */
4936         printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4937                 isa_bios, ha->irq, ha->drq);
4938
4939         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4940         if (error) {
4941                 printk("GDT-ISA: Unable to allocate IRQ\n");
4942                 goto out_host_put;
4943         }
4944
4945         error = request_dma(ha->drq, "gdth");
4946         if (error) {
4947                 printk("GDT-ISA: Unable to allocate DMA channel\n");
4948                 goto out_free_irq;
4949         }
4950
4951         set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4952         enable_dma(ha->drq);
4953         shp->unchecked_isa_dma = 1;
4954         shp->irq = ha->irq;
4955         shp->dma_channel = ha->drq;
4956         hanum = gdth_ctr_count;
4957         gdth_ctr_tab[gdth_ctr_count++] = shp;
4958
4959         NUMDATA(shp)->hanum = (ushort)hanum;
4960
4961         ha->pccb = CMDDATA(shp);
4962         ha->ccb_phys = 0L;
4963         ha->pdev = NULL;
4964
4965         error = -ENOMEM;
4966
4967         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4968                                                 &scratch_dma_handle);
4969         if (!ha->pscratch)
4970                 goto out_dec_counters;
4971         ha->scratch_phys = scratch_dma_handle;
4972
4973         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4974                                                 &scratch_dma_handle);
4975         if (!ha->pmsg)
4976                 goto out_free_pscratch;
4977         ha->msg_phys = scratch_dma_handle;
4978
4979 #ifdef INT_COAL
4980         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4981                                 sizeof(gdth_coal_status) * MAXOFFSETS,
4982                                 &scratch_dma_handle);
4983         if (!ha->coal_stat)
4984                 goto out_free_pmsg;
4985         ha->coal_stat_phys = scratch_dma_handle;
4986 #endif
4987
4988         ha->scratch_busy = FALSE;
4989         ha->req_first = NULL;
4990         ha->tid_cnt = MAX_HDRIVES;
4991         if (max_ids > 0 && max_ids < ha->tid_cnt)
4992                 ha->tid_cnt = max_ids;
4993         for (i = 0; i < GDTH_MAXCMDS; ++i)
4994                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4995         ha->scan_mode = rescan ? 0x10 : 0;
4996
4997         error = -ENODEV;
4998         if (!gdth_search_drives(hanum)) {
4999                 printk("GDT-ISA: Error during device scan\n");
5000                 goto out_free_coal_stat;
5001         }
5002
5003         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5004                 hdr_channel = ha->bus_cnt;
5005         ha->virt_bus = hdr_channel;
5006
5007         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
5008                 shp->max_cmd_len = 16;
5009
5010         shp->max_id      = ha->tid_cnt;
5011         shp->max_lun     = MAXLUN;
5012         shp->max_channel = ha->bus_cnt;
5013
5014         spin_lock_init(&ha->smp_lock);
5015         gdth_enable_int(hanum);
5016
5017         return 0;
5018
5019  out_free_coal_stat:
5020 #ifdef INT_COAL
5021         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5022                                 ha->coal_stat, ha->coal_stat_phys);
5023  out_free_pmsg:
5024 #endif
5025         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5026                                 ha->pmsg, ha->msg_phys);
5027  out_free_pscratch:
5028         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5029                                 ha->pscratch, ha->scratch_phys);
5030  out_dec_counters:
5031         gdth_ctr_count--;
5032  out_free_irq:
5033         free_irq(ha->irq, ha);
5034  out_host_put:
5035         scsi_unregister(shp);
5036         return error;
5037 }
5038 #endif /* CONFIG_ISA */
5039
5040 #ifdef CONFIG_EISA
5041 static int gdth_eisa_probe_one(struct scsi_host_template *shtp,
5042                 ushort eisa_slot)
5043 {
5044         struct Scsi_Host *shp;
5045         gdth_ha_str *ha;
5046         dma_addr_t scratch_dma_handle = 0;
5047         int error, hanum, i;
5048
5049         if (!gdth_search_eisa(eisa_slot))
5050                 return -ENXIO;
5051
5052         shp = scsi_register(shtp,sizeof(gdth_ext_str));
5053         if (!shp)
5054                 return -ENOMEM;
5055         ha = HADATA(shp);
5056
5057         error = -ENODEV;
5058         if (!gdth_init_eisa(eisa_slot,ha))
5059                 goto out_host_put;
5060
5061         /* controller found and initialized */
5062         printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
5063                 eisa_slot >> 12, ha->irq);
5064
5065         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
5066         if (error) {
5067                 printk("GDT-EISA: Unable to allocate IRQ\n");
5068                 goto out_host_put;
5069         }
5070
5071         shp->unchecked_isa_dma = 0;
5072         shp->irq = ha->irq;
5073         shp->dma_channel = 0xff;
5074         hanum = gdth_ctr_count;
5075         gdth_ctr_tab[gdth_ctr_count++] = shp;
5076
5077         NUMDATA(shp)->hanum = (ushort)hanum;
5078         TRACE2(("EISA detect Bus 0: hanum %d\n",
5079                 NUMDATA(shp)->hanum));
5080
5081         ha->pccb = CMDDATA(shp);
5082         ha->ccb_phys = 0L;
5083
5084         error = -ENOMEM;
5085
5086         ha->pdev = NULL;
5087         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5088                                                 &scratch_dma_handle);
5089         if (!ha->pscratch)
5090                 goto out_free_irq;
5091         ha->scratch_phys = scratch_dma_handle;
5092
5093         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5094                                                 &scratch_dma_handle);
5095         if (!ha->pmsg)
5096                 goto out_free_pscratch;
5097         ha->msg_phys = scratch_dma_handle;
5098
5099 #ifdef INT_COAL
5100         ha->coal_stat = pci_alloc_consistent(ha->pdev,
5101                         sizeof(gdth_coal_status) * MAXOFFSETS,
5102                         &scratch_dma_handle);
5103         if (!ha->coal_stat)
5104                 goto out_free_pmsg;
5105         ha->coal_stat_phys = scratch_dma_handle;
5106 #endif
5107
5108         ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb,
5109                         sizeof(gdth_cmd_str), PCI_DMA_BIDIRECTIONAL);
5110         if (!ha->ccb_phys)
5111                 goto out_free_coal_stat;
5112
5113         ha->scratch_busy = FALSE;
5114         ha->req_first = NULL;
5115         ha->tid_cnt = MAX_HDRIVES;
5116         if (max_ids > 0 && max_ids < ha->tid_cnt)
5117                 ha->tid_cnt = max_ids;
5118         for (i = 0; i < GDTH_MAXCMDS; ++i)
5119                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5120         ha->scan_mode = rescan ? 0x10 : 0;
5121
5122         if (!gdth_search_drives(hanum)) {
5123                 printk("GDT-EISA: Error during device scan\n");
5124                 error = -ENODEV;
5125                 goto out_free_ccb_phys;
5126         }
5127
5128         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5129                 hdr_channel = ha->bus_cnt;
5130         ha->virt_bus = hdr_channel;
5131
5132         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
5133                 shp->max_cmd_len = 16;
5134
5135         shp->max_id      = ha->tid_cnt;
5136         shp->max_lun     = MAXLUN;
5137         shp->max_channel = ha->bus_cnt;
5138
5139         spin_lock_init(&ha->smp_lock);
5140         gdth_enable_int(hanum);
5141         return 0;
5142
5143  out_free_ccb_phys:
5144         pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str),
5145                         PCI_DMA_BIDIRECTIONAL);
5146  out_free_coal_stat:
5147 #ifdef INT_COAL
5148         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5149                                 ha->coal_stat, ha->coal_stat_phys);
5150  out_free_pmsg:
5151 #endif
5152         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5153                                 ha->pmsg, ha->msg_phys);
5154  out_free_pscratch:
5155         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5156                                 ha->pscratch, ha->scratch_phys);
5157  out_free_irq:
5158         free_irq(ha->irq, ha);
5159         gdth_ctr_count--;
5160  out_host_put:
5161         scsi_unregister(shp);
5162         return error;
5163 }
5164 #endif /* CONFIG_EISA */
5165
5166 #ifdef CONFIG_PCI
5167 static int gdth_pci_probe_one(struct scsi_host_template *shtp,
5168                 gdth_pci_str *pcistr, int ctr)
5169 {
5170         struct Scsi_Host *shp;
5171         gdth_ha_str *ha;
5172         dma_addr_t scratch_dma_handle = 0;
5173         int error, hanum, i;
5174
5175         shp = scsi_register(shtp,sizeof(gdth_ext_str));
5176         if (!shp)
5177                 return -ENOMEM;
5178         ha = HADATA(shp);
5179
5180         error = -ENODEV;
5181         if (!gdth_init_pci(&pcistr[ctr],ha))
5182                 goto out_host_put;
5183
5184         /* controller found and initialized */
5185         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
5186                 pcistr[ctr].pdev->bus->number,
5187                 PCI_SLOT(pcistr[ctr].pdev->devfn),
5188                 ha->irq);
5189
5190         error = request_irq(ha->irq, gdth_interrupt,
5191                                 IRQF_DISABLED|IRQF_SHARED, "gdth", ha);
5192         if (error) {
5193                 printk("GDT-PCI: Unable to allocate IRQ\n");
5194                 goto out_host_put;
5195         }
5196
5197         shp->unchecked_isa_dma = 0;
5198         shp->irq = ha->irq;
5199         shp->dma_channel = 0xff;
5200         hanum = gdth_ctr_count;
5201         gdth_ctr_tab[gdth_ctr_count++] = shp;
5202
5203         NUMDATA(shp)->hanum = (ushort)hanum;
5204
5205         ha->pccb = CMDDATA(shp);
5206         ha->ccb_phys = 0L;
5207
5208         error = -ENOMEM;
5209
5210         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5211                                                 &scratch_dma_handle);
5212         if (!ha->pscratch)
5213                 goto out_free_irq;
5214         ha->scratch_phys = scratch_dma_handle;
5215
5216         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5217                                         &scratch_dma_handle);
5218         if (!ha->pmsg)
5219                 goto out_free_pscratch;
5220         ha->msg_phys = scratch_dma_handle;
5221
5222 #ifdef INT_COAL
5223         ha->coal_stat = pci_alloc_consistent(ha->pdev,
5224                         sizeof(gdth_coal_status) * MAXOFFSETS,
5225                         &scratch_dma_handle);
5226         if (!ha->coal_stat)
5227                 goto out_free_pmsg;
5228         ha->coal_stat_phys = scratch_dma_handle;
5229 #endif
5230
5231         ha->scratch_busy = FALSE;
5232         ha->req_first = NULL;
5233         ha->tid_cnt = pcistr[ctr].pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
5234         if (max_ids > 0 && max_ids < ha->tid_cnt)
5235                 ha->tid_cnt = max_ids;
5236         for (i = 0; i < GDTH_MAXCMDS; ++i)
5237                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5238         ha->scan_mode = rescan ? 0x10 : 0;
5239
5240         error = -ENODEV;
5241         if (!gdth_search_drives(hanum)) {
5242                 printk("GDT-PCI %d: Error during device scan\n", hanum);
5243                 goto out_free_coal_stat;
5244         }
5245
5246         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5247                 hdr_channel = ha->bus_cnt;
5248         ha->virt_bus = hdr_channel;
5249
5250         /* 64-bit DMA only supported from FW >= x.43 */
5251         if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) ||
5252             !ha->dma64_support) {
5253                 if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
5254                         printk(KERN_WARNING "GDT-PCI %d: "
5255                                 "Unable to set 32-bit DMA\n", hanum);
5256                                 goto out_free_coal_stat;
5257                 }
5258         } else {
5259                 shp->max_cmd_len = 16;
5260                 if (!pci_set_dma_mask(pcistr[ctr].pdev, DMA_64BIT_MASK)) {
5261                         printk("GDT-PCI %d: 64-bit DMA enabled\n", hanum);
5262                 } else if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
5263                         printk(KERN_WARNING "GDT-PCI %d: "
5264                                 "Unable to set 64/32-bit DMA\n", hanum);
5265                         goto out_free_coal_stat;
5266                 }
5267         }
5268
5269         shp->max_id      = ha->tid_cnt;
5270         shp->max_lun     = MAXLUN;
5271         shp->max_channel = ha->bus_cnt;
5272
5273         spin_lock_init(&ha->smp_lock);
5274         gdth_enable_int(hanum);
5275         return 0;
5276
5277  out_free_coal_stat:
5278 #ifdef INT_COAL
5279         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5280                                 ha->coal_stat, ha->coal_stat_phys);
5281  out_free_pmsg:
5282 #endif
5283         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5284                                 ha->pmsg, ha->msg_phys);
5285  out_free_pscratch:
5286         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5287                                 ha->pscratch, ha->scratch_phys);
5288  out_free_irq:
5289         free_irq(ha->irq, ha);
5290         gdth_ctr_count--;
5291  out_host_put:
5292         scsi_unregister(shp);
5293         return error;
5294 }
5295 #endif /* CONFIG_PCI */
5296
5297 #include "scsi_module.c"
5298 #ifndef MODULE
5299 __setup("gdth=", option_setup);
5300 #endif