drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <linux/cciss_ioctl.h>
  47 #include <linux/string.h>
  48 #include <linux/bitmap.h>
  49 #include <linux/atomic.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/percpu-defs.h>
  52 #include <linux/percpu.h>
  53 #include <asm/unaligned.h>
  54 #include <asm/div64.h>
  55 #include "hpsa_cmd.h"
  56 #include "hpsa.h"
  57
  58 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  59 #define HPSA_DRIVER_VERSION "3.4.4-1"
  60 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  61 #define HPSA "hpsa"
  62
  63 /* How long to wait (in milliseconds) for board to go into simple mode */
  64 #define MAX_CONFIG_WAIT 30000
  65 #define MAX_IOCTL_CONFIG_WAIT 1000
  66
  67 /*define how many times we will try a command because of bus resets */
  68 #define MAX_CMD_RETRIES 3
  69
  70 /* Embedded module documentation macros - see modules.h */
  71 MODULE_AUTHOR("Hewlett-Packard Company");
  72 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  73         HPSA_DRIVER_VERSION);
  74 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  75 MODULE_VERSION(HPSA_DRIVER_VERSION);
  76 MODULE_LICENSE("GPL");
  77
  78 static int hpsa_allow_any;
  79 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  80 MODULE_PARM_DESC(hpsa_allow_any,
  81                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  82 static int hpsa_simple_mode;
  83 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  84 MODULE_PARM_DESC(hpsa_simple_mode,
  85         "Use 'simple mode' rather than 'performant mode'");
  86
  87 /* define the PCI info for the cards we can control */
  88 static const struct pci_device_id hpsa_pci_device_id[] = {
  89         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  90         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 129         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 130         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 131         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 132         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 133         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 134         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 135                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 136         {0,}
 137 };
 138
 139 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 140
 141 /*  board_id = Subsystem Device ID & Vendor ID
 142  *  product = Marketing Name for the board
 143  *  access = Address of the struct of function pointers
 144  */
 145 static struct board_type products[] = {
 146         {0x3241103C, "Smart Array P212", &SA5_access},
 147         {0x3243103C, "Smart Array P410", &SA5_access},
 148         {0x3245103C, "Smart Array P410i", &SA5_access},
 149         {0x3247103C, "Smart Array P411", &SA5_access},
 150         {0x3249103C, "Smart Array P812", &SA5_access},
 151         {0x324A103C, "Smart Array P712m", &SA5_access},
 152         {0x324B103C, "Smart Array P711m", &SA5_access},
 153         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 154         {0x3350103C, "Smart Array P222", &SA5_access},
 155         {0x3351103C, "Smart Array P420", &SA5_access},
 156         {0x3352103C, "Smart Array P421", &SA5_access},
 157         {0x3353103C, "Smart Array P822", &SA5_access},
 158         {0x3354103C, "Smart Array P420i", &SA5_access},
 159         {0x3355103C, "Smart Array P220i", &SA5_access},
 160         {0x3356103C, "Smart Array P721m", &SA5_access},
 161         {0x1921103C, "Smart Array P830i", &SA5_access},
 162         {0x1922103C, "Smart Array P430", &SA5_access},
 163         {0x1923103C, "Smart Array P431", &SA5_access},
 164         {0x1924103C, "Smart Array P830", &SA5_access},
 165         {0x1926103C, "Smart Array P731m", &SA5_access},
 166         {0x1928103C, "Smart Array P230i", &SA5_access},
 167         {0x1929103C, "Smart Array P530", &SA5_access},
 168         {0x21BD103C, "Smart Array", &SA5_access},
 169         {0x21BE103C, "Smart Array", &SA5_access},
 170         {0x21BF103C, "Smart Array", &SA5_access},
 171         {0x21C0103C, "Smart Array", &SA5_access},
 172         {0x21C1103C, "Smart Array", &SA5_access},
 173         {0x21C2103C, "Smart Array", &SA5_access},
 174         {0x21C3103C, "Smart Array", &SA5_access},
 175         {0x21C4103C, "Smart Array", &SA5_access},
 176         {0x21C5103C, "Smart Array", &SA5_access},
 177         {0x21C6103C, "Smart Array", &SA5_access},
 178         {0x21C7103C, "Smart Array", &SA5_access},
 179         {0x21C8103C, "Smart Array", &SA5_access},
 180         {0x21C9103C, "Smart Array", &SA5_access},
 181         {0x21CA103C, "Smart Array", &SA5_access},
 182         {0x21CB103C, "Smart Array", &SA5_access},
 183         {0x21CC103C, "Smart Array", &SA5_access},
 184         {0x21CD103C, "Smart Array", &SA5_access},
 185         {0x21CE103C, "Smart Array", &SA5_access},
 186         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 187         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 188         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 189         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 190         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 191         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 192 };
 193
 194 static int number_of_controllers;
 195
 196 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 197 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 198 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 199 static void lock_and_start_io(struct ctlr_info *h);
 200 static void start_io(struct ctlr_info *h, unsigned long *flags);
 201
 202 #ifdef CONFIG_COMPAT
 203 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 204         void __user *arg);
 205 #endif
 206
 207 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 208 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
 209 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 210 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
 211 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 212         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 213         int cmd_type);
 214 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 215 #define VPD_PAGE (1 << 8)
 216
 217 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 218 static void hpsa_scan_start(struct Scsi_Host *);
 219 static int hpsa_scan_finished(struct Scsi_Host *sh,
 220         unsigned long elapsed_time);
 221 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 222
 223 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 224 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 225 static int hpsa_slave_alloc(struct scsi_device *sdev);
 226 static void hpsa_slave_destroy(struct scsi_device *sdev);
 227
 228 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 229 static int check_for_unit_attention(struct ctlr_info *h,
 230         struct CommandList *c);
 231 static void check_ioctl_unit_attention(struct ctlr_info *h,
 232         struct CommandList *c);
 233 /* performant mode helper functions */
 234 static void calc_bucket_map(int *bucket, int num_buckets,
 235         int nsgs, int min_blocks, u32 *bucket_map);
 236 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 237 static inline u32 next_command(struct ctlr_info *h, u8 q);
 238 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 239                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 240                                u64 *cfg_offset);
 241 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 242                                     unsigned long *memory_bar);
 243 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 244 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 245                                      int wait_for_ready);
 246 static inline void finish_cmd(struct CommandList *c);
 247 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 248 #define BOARD_NOT_READY 0
 249 #define BOARD_READY 1
 250 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 251 static void hpsa_flush_cache(struct ctlr_info *h);
 252 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 253         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 254         u8 *scsi3addr);
 255
 256 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 257 {
 258         unsigned long *priv = shost_priv(sdev->host);
 259         return (struct ctlr_info *) *priv;
 260 }
 261
 262 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 263 {
 264         unsigned long *priv = shost_priv(sh);
 265         return (struct ctlr_info *) *priv;
 266 }
 267
 268 static int check_for_unit_attention(struct ctlr_info *h,
 269         struct CommandList *c)
 270 {
 271         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
 272                 return 0;
 273
 274         switch (c->err_info->SenseInfo[12]) {
 275         case STATE_CHANGED:
 276                 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
 277                         "detected, command retried\n", h->ctlr);
 278                 break;
 279         case LUN_FAILED:
 280                 dev_warn(&h->pdev->dev,
 281                         HPSA "%d: LUN failure detected\n", h->ctlr);
 282                 break;
 283         case REPORT_LUNS_CHANGED:
 284                 dev_warn(&h->pdev->dev,
 285                         HPSA "%d: report LUN data changed\n", h->ctlr);
 286         /*
 287          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 288          * target (array) devices.
 289          */
 290                 break;
 291         case POWER_OR_RESET:
 292                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 293                         "or device reset detected\n", h->ctlr);
 294                 break;
 295         case UNIT_ATTENTION_CLEARED:
 296                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 297                     "cleared by another initiator\n", h->ctlr);
 298                 break;
 299         default:
 300                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 301                         "unit attention detected\n", h->ctlr);
 302                 break;
 303         }
 304         return 1;
 305 }
 306
 307 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 308 {
 309         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 310                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 311                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 312                 return 0;
 313         dev_warn(&h->pdev->dev, HPSA "device busy");
 314         return 1;
 315 }
 316
 317 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 318                                          struct device_attribute *attr,
 319                                          const char *buf, size_t count)
 320 {
 321         int status, len;
 322         struct ctlr_info *h;
 323         struct Scsi_Host *shost = class_to_shost(dev);
 324         char tmpbuf[10];
 325
 326         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 327                 return -EACCES;
 328         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 329         strncpy(tmpbuf, buf, len);
 330         tmpbuf[len] = '\0';
 331         if (sscanf(tmpbuf, "%d", &status) != 1)
 332                 return -EINVAL;
 333         h = shost_to_hba(shost);
 334         h->acciopath_status = !!status;
 335         dev_warn(&h->pdev->dev,
 336                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 337                 h->acciopath_status ? "enabled" : "disabled");
 338         return count;
 339 }
 340
 341 static ssize_t host_store_raid_offload_debug(struct device *dev,
 342                                          struct device_attribute *attr,
 343                                          const char *buf, size_t count)
 344 {
 345         int debug_level, len;
 346         struct ctlr_info *h;
 347         struct Scsi_Host *shost = class_to_shost(dev);
 348         char tmpbuf[10];
 349
 350         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 351                 return -EACCES;
 352         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 353         strncpy(tmpbuf, buf, len);
 354         tmpbuf[len] = '\0';
 355         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 356                 return -EINVAL;
 357         if (debug_level < 0)
 358                 debug_level = 0;
 359         h = shost_to_hba(shost);
 360         h->raid_offload_debug = debug_level;
 361         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 362                 h->raid_offload_debug);
 363         return count;
 364 }
 365
 366 static ssize_t host_store_rescan(struct device *dev,
 367                                  struct device_attribute *attr,
 368                                  const char *buf, size_t count)
 369 {
 370         struct ctlr_info *h;
 371         struct Scsi_Host *shost = class_to_shost(dev);
 372         h = shost_to_hba(shost);
 373         hpsa_scan_start(h->scsi_host);
 374         return count;
 375 }
 376
 377 static ssize_t host_show_firmware_revision(struct device *dev,
 378              struct device_attribute *attr, char *buf)
 379 {
 380         struct ctlr_info *h;
 381         struct Scsi_Host *shost = class_to_shost(dev);
 382         unsigned char *fwrev;
 383
 384         h = shost_to_hba(shost);
 385         if (!h->hba_inquiry_data)
 386                 return 0;
 387         fwrev = &h->hba_inquiry_data[32];
 388         return snprintf(buf, 20, "%c%c%c%c\n",
 389                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 390 }
 391
 392 static ssize_t host_show_commands_outstanding(struct device *dev,
 393              struct device_attribute *attr, char *buf)
 394 {
 395         struct Scsi_Host *shost = class_to_shost(dev);
 396         struct ctlr_info *h = shost_to_hba(shost);
 397
 398         return snprintf(buf, 20, "%d\n",
 399                         atomic_read(&h->commands_outstanding));
 400 }
 401
 402 static ssize_t host_show_transport_mode(struct device *dev,
 403         struct device_attribute *attr, char *buf)
 404 {
 405         struct ctlr_info *h;
 406         struct Scsi_Host *shost = class_to_shost(dev);
 407
 408         h = shost_to_hba(shost);
 409         return snprintf(buf, 20, "%s\n",
 410                 h->transMethod & CFGTBL_Trans_Performant ?
 411                         "performant" : "simple");
 412 }
 413
 414 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 415         struct device_attribute *attr, char *buf)
 416 {
 417         struct ctlr_info *h;
 418         struct Scsi_Host *shost = class_to_shost(dev);
 419
 420         h = shost_to_hba(shost);
 421         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 422                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 423 }
 424
 425 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 426 static u32 unresettable_controller[] = {
 427         0x324a103C, /* Smart Array P712m */
 428         0x324b103C, /* SmartArray P711m */
 429         0x3223103C, /* Smart Array P800 */
 430         0x3234103C, /* Smart Array P400 */
 431         0x3235103C, /* Smart Array P400i */
 432         0x3211103C, /* Smart Array E200i */
 433         0x3212103C, /* Smart Array E200 */
 434         0x3213103C, /* Smart Array E200i */
 435         0x3214103C, /* Smart Array E200i */
 436         0x3215103C, /* Smart Array E200i */
 437         0x3237103C, /* Smart Array E500 */
 438         0x323D103C, /* Smart Array P700m */
 439         0x40800E11, /* Smart Array 5i */
 440         0x409C0E11, /* Smart Array 6400 */
 441         0x409D0E11, /* Smart Array 6400 EM */
 442         0x40700E11, /* Smart Array 5300 */
 443         0x40820E11, /* Smart Array 532 */
 444         0x40830E11, /* Smart Array 5312 */
 445         0x409A0E11, /* Smart Array 641 */
 446         0x409B0E11, /* Smart Array 642 */
 447         0x40910E11, /* Smart Array 6i */
 448 };
 449
 450 /* List of controllers which cannot even be soft reset */
 451 static u32 soft_unresettable_controller[] = {
 452         0x40800E11, /* Smart Array 5i */
 453         0x40700E11, /* Smart Array 5300 */
 454         0x40820E11, /* Smart Array 532 */
 455         0x40830E11, /* Smart Array 5312 */
 456         0x409A0E11, /* Smart Array 641 */
 457         0x409B0E11, /* Smart Array 642 */
 458         0x40910E11, /* Smart Array 6i */
 459         /* Exclude 640x boards.  These are two pci devices in one slot
 460          * which share a battery backed cache module.  One controls the
 461          * cache, the other accesses the cache through the one that controls
 462          * it.  If we reset the one controlling the cache, the other will
 463          * likely not be happy.  Just forbid resetting this conjoined mess.
 464          * The 640x isn't really supported by hpsa anyway.
 465          */
 466         0x409C0E11, /* Smart Array 6400 */
 467         0x409D0E11, /* Smart Array 6400 EM */
 468 };
 469
 470 static int ctlr_is_hard_resettable(u32 board_id)
 471 {
 472         int i;
 473
 474         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
 475                 if (unresettable_controller[i] == board_id)
 476                         return 0;
 477         return 1;
 478 }
 479
 480 static int ctlr_is_soft_resettable(u32 board_id)
 481 {
 482         int i;
 483
 484         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
 485                 if (soft_unresettable_controller[i] == board_id)
 486                         return 0;
 487         return 1;
 488 }
 489
 490 static int ctlr_is_resettable(u32 board_id)
 491 {
 492         return ctlr_is_hard_resettable(board_id) ||
 493                 ctlr_is_soft_resettable(board_id);
 494 }
 495
 496 static ssize_t host_show_resettable(struct device *dev,
 497         struct device_attribute *attr, char *buf)
 498 {
 499         struct ctlr_info *h;
 500         struct Scsi_Host *shost = class_to_shost(dev);
 501
 502         h = shost_to_hba(shost);
 503         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 504 }
 505
 506 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 507 {
 508         return (scsi3addr[3] & 0xC0) == 0x40;
 509 }
 510
 511 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 512         "1(+0)ADM", "UNKNOWN"
 513 };
 514 #define HPSA_RAID_0     0
 515 #define HPSA_RAID_4     1
 516 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 517 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 518 #define HPSA_RAID_51    4
 519 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 520 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 521 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 522
 523 static ssize_t raid_level_show(struct device *dev,
 524              struct device_attribute *attr, char *buf)
 525 {
 526         ssize_t l = 0;
 527         unsigned char rlevel;
 528         struct ctlr_info *h;
 529         struct scsi_device *sdev;
 530         struct hpsa_scsi_dev_t *hdev;
 531         unsigned long flags;
 532
 533         sdev = to_scsi_device(dev);
 534         h = sdev_to_hba(sdev);
 535         spin_lock_irqsave(&h->lock, flags);
 536         hdev = sdev->hostdata;
 537         if (!hdev) {
 538                 spin_unlock_irqrestore(&h->lock, flags);
 539                 return -ENODEV;
 540         }
 541
 542         /* Is this even a logical drive? */
 543         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 544                 spin_unlock_irqrestore(&h->lock, flags);
 545                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 546                 return l;
 547         }
 548
 549         rlevel = hdev->raid_level;
 550         spin_unlock_irqrestore(&h->lock, flags);
 551         if (rlevel > RAID_UNKNOWN)
 552                 rlevel = RAID_UNKNOWN;
 553         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 554         return l;
 555 }
 556
 557 static ssize_t lunid_show(struct device *dev,
 558              struct device_attribute *attr, char *buf)
 559 {
 560         struct ctlr_info *h;
 561         struct scsi_device *sdev;
 562         struct hpsa_scsi_dev_t *hdev;
 563         unsigned long flags;
 564         unsigned char lunid[8];
 565
 566         sdev = to_scsi_device(dev);
 567         h = sdev_to_hba(sdev);
 568         spin_lock_irqsave(&h->lock, flags);
 569         hdev = sdev->hostdata;
 570         if (!hdev) {
 571                 spin_unlock_irqrestore(&h->lock, flags);
 572                 return -ENODEV;
 573         }
 574         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 575         spin_unlock_irqrestore(&h->lock, flags);
 576         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 577                 lunid[0], lunid[1], lunid[2], lunid[3],
 578                 lunid[4], lunid[5], lunid[6], lunid[7]);
 579 }
 580
 581 static ssize_t unique_id_show(struct device *dev,
 582              struct device_attribute *attr, char *buf)
 583 {
 584         struct ctlr_info *h;
 585         struct scsi_device *sdev;
 586         struct hpsa_scsi_dev_t *hdev;
 587         unsigned long flags;
 588         unsigned char sn[16];
 589
 590         sdev = to_scsi_device(dev);
 591         h = sdev_to_hba(sdev);
 592         spin_lock_irqsave(&h->lock, flags);
 593         hdev = sdev->hostdata;
 594         if (!hdev) {
 595                 spin_unlock_irqrestore(&h->lock, flags);
 596                 return -ENODEV;
 597         }
 598         memcpy(sn, hdev->device_id, sizeof(sn));
 599         spin_unlock_irqrestore(&h->lock, flags);
 600         return snprintf(buf, 16 * 2 + 2,
 601                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 602                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 603                         sn[0], sn[1], sn[2], sn[3],
 604                         sn[4], sn[5], sn[6], sn[7],
 605                         sn[8], sn[9], sn[10], sn[11],
 606                         sn[12], sn[13], sn[14], sn[15]);
 607 }
 608
 609 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 610              struct device_attribute *attr, char *buf)
 611 {
 612         struct ctlr_info *h;
 613         struct scsi_device *sdev;
 614         struct hpsa_scsi_dev_t *hdev;
 615         unsigned long flags;
 616         int offload_enabled;
 617
 618         sdev = to_scsi_device(dev);
 619         h = sdev_to_hba(sdev);
 620         spin_lock_irqsave(&h->lock, flags);
 621         hdev = sdev->hostdata;
 622         if (!hdev) {
 623                 spin_unlock_irqrestore(&h->lock, flags);
 624                 return -ENODEV;
 625         }
 626         offload_enabled = hdev->offload_enabled;
 627         spin_unlock_irqrestore(&h->lock, flags);
 628         return snprintf(buf, 20, "%d\n", offload_enabled);
 629 }
 630
 631 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 632 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 633 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 634 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 635 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 636                         host_show_hp_ssd_smart_path_enabled, NULL);
 637 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 638                 host_show_hp_ssd_smart_path_status,
 639                 host_store_hp_ssd_smart_path_status);
 640 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 641                         host_store_raid_offload_debug);
 642 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 643         host_show_firmware_revision, NULL);
 644 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 645         host_show_commands_outstanding, NULL);
 646 static DEVICE_ATTR(transport_mode, S_IRUGO,
 647         host_show_transport_mode, NULL);
 648 static DEVICE_ATTR(resettable, S_IRUGO,
 649         host_show_resettable, NULL);
 650
 651 static struct device_attribute *hpsa_sdev_attrs[] = {
 652         &dev_attr_raid_level,
 653         &dev_attr_lunid,
 654         &dev_attr_unique_id,
 655         &dev_attr_hp_ssd_smart_path_enabled,
 656         NULL,
 657 };
 658
 659 static struct device_attribute *hpsa_shost_attrs[] = {
 660         &dev_attr_rescan,
 661         &dev_attr_firmware_revision,
 662         &dev_attr_commands_outstanding,
 663         &dev_attr_transport_mode,
 664         &dev_attr_resettable,
 665         &dev_attr_hp_ssd_smart_path_status,
 666         &dev_attr_raid_offload_debug,
 667         NULL,
 668 };
 669
 670 static struct scsi_host_template hpsa_driver_template = {
 671         .module                 = THIS_MODULE,
 672         .name                   = HPSA,
 673         .proc_name              = HPSA,
 674         .queuecommand           = hpsa_scsi_queue_command,
 675         .scan_start             = hpsa_scan_start,
 676         .scan_finished          = hpsa_scan_finished,
 677         .change_queue_depth     = hpsa_change_queue_depth,
 678         .this_id                = -1,
 679         .use_clustering         = ENABLE_CLUSTERING,
 680         .eh_abort_handler       = hpsa_eh_abort_handler,
 681         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 682         .ioctl                  = hpsa_ioctl,
 683         .slave_alloc            = hpsa_slave_alloc,
 684         .slave_destroy          = hpsa_slave_destroy,
 685 #ifdef CONFIG_COMPAT
 686         .compat_ioctl           = hpsa_compat_ioctl,
 687 #endif
 688         .sdev_attrs = hpsa_sdev_attrs,
 689         .shost_attrs = hpsa_shost_attrs,
 690         .max_sectors = 8192,
 691         .no_write_same = 1,
 692 };
 693
 694
 695 /* Enqueuing and dequeuing functions for cmdlists. */
 696 static inline void addQ(struct list_head *list, struct CommandList *c)
 697 {
 698         list_add_tail(&c->list, list);
 699 }
 700
 701 static inline u32 next_command(struct ctlr_info *h, u8 q)
 702 {
 703         u32 a;
 704         struct reply_queue_buffer *rq = &h->reply_queue[q];
 705
 706         if (h->transMethod & CFGTBL_Trans_io_accel1)
 707                 return h->access.command_completed(h, q);
 708
 709         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 710                 return h->access.command_completed(h, q);
 711
 712         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 713                 a = rq->head[rq->current_entry];
 714                 rq->current_entry++;
 715                 atomic_dec(&h->commands_outstanding);
 716         } else {
 717                 a = FIFO_EMPTY;
 718         }
 719         /* Check for wraparound */
 720         if (rq->current_entry == h->max_commands) {
 721                 rq->current_entry = 0;
 722                 rq->wraparound ^= 1;
 723         }
 724         return a;
 725 }
 726
 727 /*
 728  * There are some special bits in the bus address of the
 729  * command that we have to set for the controller to know
 730  * how to process the command:
 731  *
 732  * Normal performant mode:
 733  * bit 0: 1 means performant mode, 0 means simple mode.
 734  * bits 1-3 = block fetch table entry
 735  * bits 4-6 = command type (== 0)
 736  *
 737  * ioaccel1 mode:
 738  * bit 0 = "performant mode" bit.
 739  * bits 1-3 = block fetch table entry
 740  * bits 4-6 = command type (== 110)
 741  * (command type is needed because ioaccel1 mode
 742  * commands are submitted through the same register as normal
 743  * mode commands, so this is how the controller knows whether
 744  * the command is normal mode or ioaccel1 mode.)
 745  *
 746  * ioaccel2 mode:
 747  * bit 0 = "performant mode" bit.
 748  * bits 1-4 = block fetch table entry (note extra bit)
 749  * bits 4-6 = not needed, because ioaccel2 mode has
 750  * a separate special register for submitting commands.
 751  */
 752
 753 /* set_performant_mode: Modify the tag for cciss performant
 754  * set bit 0 for pull model, bits 3-1 for block fetch
 755  * register number
 756  */
 757 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
 758 {
 759         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 760                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 761                 if (likely(h->msix_vector > 0))
 762                         c->Header.ReplyQueue =
 763                                 raw_smp_processor_id() % h->nreply_queues;
 764         }
 765 }
 766
 767 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 768                                                 struct CommandList *c)
 769 {
 770         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 771
 772         /* Tell the controller to post the reply to the queue for this
 773          * processor.  This seems to give the best I/O throughput.
 774          */
 775         cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 776         /* Set the bits in the address sent down to include:
 777          *  - performant mode bit (bit 0)
 778          *  - pull count (bits 1-3)
 779          *  - command type (bits 4-6)
 780          */
 781         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 782                                         IOACCEL1_BUSADDR_CMDTYPE;
 783 }
 784
 785 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 786                                                 struct CommandList *c)
 787 {
 788         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 789
 790         /* Tell the controller to post the reply to the queue for this
 791          * processor.  This seems to give the best I/O throughput.
 792          */
 793         cp->reply_queue = smp_processor_id() % h->nreply_queues;
 794         /* Set the bits in the address sent down to include:
 795          *  - performant mode bit not used in ioaccel mode 2
 796          *  - pull count (bits 0-3)
 797          *  - command type isn't needed for ioaccel2
 798          */
 799         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 800 }
 801
 802 static int is_firmware_flash_cmd(u8 *cdb)
 803 {
 804         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 805 }
 806
 807 /*
 808  * During firmware flash, the heartbeat register may not update as frequently
 809  * as it should.  So we dial down lockup detection during firmware flash. and
 810  * dial it back up when firmware flash completes.
 811  */
 812 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 813 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 814 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 815                 struct CommandList *c)
 816 {
 817         if (!is_firmware_flash_cmd(c->Request.CDB))
 818                 return;
 819         atomic_inc(&h->firmware_flash_in_progress);
 820         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 821 }
 822
 823 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 824                 struct CommandList *c)
 825 {
 826         if (is_firmware_flash_cmd(c->Request.CDB) &&
 827                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 828                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 829 }
 830
 831 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 832         struct CommandList *c)
 833 {
 834         unsigned long flags;
 835
 836         switch (c->cmd_type) {
 837         case CMD_IOACCEL1:
 838                 set_ioaccel1_performant_mode(h, c);
 839                 break;
 840         case CMD_IOACCEL2:
 841                 set_ioaccel2_performant_mode(h, c);
 842                 break;
 843         default:
 844                 set_performant_mode(h, c);
 845         }
 846         dial_down_lockup_detection_during_fw_flash(h, c);
 847         spin_lock_irqsave(&h->lock, flags);
 848         addQ(&h->reqQ, c);
 849         h->Qdepth++;
 850         start_io(h, &flags);
 851         spin_unlock_irqrestore(&h->lock, flags);
 852 }
 853
 854 static inline void removeQ(struct CommandList *c)
 855 {
 856         if (WARN_ON(list_empty(&c->list)))
 857                 return;
 858         list_del_init(&c->list);
 859 }
 860
 861 static inline int is_hba_lunid(unsigned char scsi3addr[])
 862 {
 863         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 864 }
 865
 866 static inline int is_scsi_rev_5(struct ctlr_info *h)
 867 {
 868         if (!h->hba_inquiry_data)
 869                 return 0;
 870         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 871                 return 1;
 872         return 0;
 873 }
 874
 875 static int hpsa_find_target_lun(struct ctlr_info *h,
 876         unsigned char scsi3addr[], int bus, int *target, int *lun)
 877 {
 878         /* finds an unused bus, target, lun for a new physical device
 879          * assumes h->devlock is held
 880          */
 881         int i, found = 0;
 882         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 883
 884         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 885
 886         for (i = 0; i < h->ndevices; i++) {
 887                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 888                         __set_bit(h->dev[i]->target, lun_taken);
 889         }
 890
 891         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 892         if (i < HPSA_MAX_DEVICES) {
 893                 /* *bus = 1; */
 894                 *target = i;
 895                 *lun = 0;
 896                 found = 1;
 897         }
 898         return !found;
 899 }
 900
 901 /* Add an entry into h->dev[] array. */
 902 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
 903                 struct hpsa_scsi_dev_t *device,
 904                 struct hpsa_scsi_dev_t *added[], int *nadded)
 905 {
 906         /* assumes h->devlock is held */
 907         int n = h->ndevices;
 908         int i;
 909         unsigned char addr1[8], addr2[8];
 910         struct hpsa_scsi_dev_t *sd;
 911
 912         if (n >= HPSA_MAX_DEVICES) {
 913                 dev_err(&h->pdev->dev, "too many devices, some will be "
 914                         "inaccessible.\n");
 915                 return -1;
 916         }
 917
 918         /* physical devices do not have lun or target assigned until now. */
 919         if (device->lun != -1)
 920                 /* Logical device, lun is already assigned. */
 921                 goto lun_assigned;
 922
 923         /* If this device a non-zero lun of a multi-lun device
 924          * byte 4 of the 8-byte LUN addr will contain the logical
 925          * unit no, zero otherwise.
 926          */
 927         if (device->scsi3addr[4] == 0) {
 928                 /* This is not a non-zero lun of a multi-lun device */
 929                 if (hpsa_find_target_lun(h, device->scsi3addr,
 930                         device->bus, &device->target, &device->lun) != 0)
 931                         return -1;
 932                 goto lun_assigned;
 933         }
 934
 935         /* This is a non-zero lun of a multi-lun device.
 936          * Search through our list and find the device which
 937          * has the same 8 byte LUN address, excepting byte 4.
 938          * Assign the same bus and target for this new LUN.
 939          * Use the logical unit number from the firmware.
 940          */
 941         memcpy(addr1, device->scsi3addr, 8);
 942         addr1[4] = 0;
 943         for (i = 0; i < n; i++) {
 944                 sd = h->dev[i];
 945                 memcpy(addr2, sd->scsi3addr, 8);
 946                 addr2[4] = 0;
 947                 /* differ only in byte 4? */
 948                 if (memcmp(addr1, addr2, 8) == 0) {
 949                         device->bus = sd->bus;
 950                         device->target = sd->target;
 951                         device->lun = device->scsi3addr[4];
 952                         break;
 953                 }
 954         }
 955         if (device->lun == -1) {
 956                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
 957                         " suspect firmware bug or unsupported hardware "
 958                         "configuration.\n");
 959                         return -1;
 960         }
 961
 962 lun_assigned:
 963
 964         h->dev[n] = device;
 965         h->ndevices++;
 966         added[*nadded] = device;
 967         (*nadded)++;
 968
 969         /* initially, (before registering with scsi layer) we don't
 970          * know our hostno and we don't want to print anything first
 971          * time anyway (the scsi layer's inquiries will show that info)
 972          */
 973         /* if (hostno != -1) */
 974                 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
 975                         scsi_device_type(device->devtype), hostno,
 976                         device->bus, device->target, device->lun);
 977         return 0;
 978 }
 979
 980 /* Update an entry in h->dev[] array. */
 981 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
 982         int entry, struct hpsa_scsi_dev_t *new_entry)
 983 {
 984         /* assumes h->devlock is held */
 985         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
 986
 987         /* Raid level changed. */
 988         h->dev[entry]->raid_level = new_entry->raid_level;
 989
 990         /* Raid offload parameters changed. */
 991         h->dev[entry]->offload_config = new_entry->offload_config;
 992         h->dev[entry]->offload_enabled = new_entry->offload_enabled;
 993         h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
 994         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
 995         h->dev[entry]->raid_map = new_entry->raid_map;
 996
 997         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
 998                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
 999                 new_entry->target, new_entry->lun);
1000 }
1001
1002 /* Replace an entry from h->dev[] array. */
1003 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1004         int entry, struct hpsa_scsi_dev_t *new_entry,
1005         struct hpsa_scsi_dev_t *added[], int *nadded,
1006         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1007 {
1008         /* assumes h->devlock is held */
1009         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1010         removed[*nremoved] = h->dev[entry];
1011         (*nremoved)++;
1012
1013         /*
1014          * New physical devices won't have target/lun assigned yet
1015          * so we need to preserve the values in the slot we are replacing.
1016          */
1017         if (new_entry->target == -1) {
1018                 new_entry->target = h->dev[entry]->target;
1019                 new_entry->lun = h->dev[entry]->lun;
1020         }
1021
1022         h->dev[entry] = new_entry;
1023         added[*nadded] = new_entry;
1024         (*nadded)++;
1025         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
1026                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
1027                         new_entry->target, new_entry->lun);
1028 }
1029
1030 /* Remove an entry from h->dev[] array. */
1031 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1032         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1033 {
1034         /* assumes h->devlock is held */
1035         int i;
1036         struct hpsa_scsi_dev_t *sd;
1037
1038         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1039
1040         sd = h->dev[entry];
1041         removed[*nremoved] = h->dev[entry];
1042         (*nremoved)++;
1043
1044         for (i = entry; i < h->ndevices-1; i++)
1045                 h->dev[i] = h->dev[i+1];
1046         h->ndevices--;
1047         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
1048                 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
1049                 sd->lun);
1050 }
1051
1052 #define SCSI3ADDR_EQ(a, b) ( \
1053         (a)[7] == (b)[7] && \
1054         (a)[6] == (b)[6] && \
1055         (a)[5] == (b)[5] && \
1056         (a)[4] == (b)[4] && \
1057         (a)[3] == (b)[3] && \
1058         (a)[2] == (b)[2] && \
1059         (a)[1] == (b)[1] && \
1060         (a)[0] == (b)[0])
1061
1062 static void fixup_botched_add(struct ctlr_info *h,
1063         struct hpsa_scsi_dev_t *added)
1064 {
1065         /* called when scsi_add_device fails in order to re-adjust
1066          * h->dev[] to match the mid layer's view.
1067          */
1068         unsigned long flags;
1069         int i, j;
1070
1071         spin_lock_irqsave(&h->lock, flags);
1072         for (i = 0; i < h->ndevices; i++) {
1073                 if (h->dev[i] == added) {
1074                         for (j = i; j < h->ndevices-1; j++)
1075                                 h->dev[j] = h->dev[j+1];
1076                         h->ndevices--;
1077                         break;
1078                 }
1079         }
1080         spin_unlock_irqrestore(&h->lock, flags);
1081         kfree(added);
1082 }
1083
1084 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1085         struct hpsa_scsi_dev_t *dev2)
1086 {
1087         /* we compare everything except lun and target as these
1088          * are not yet assigned.  Compare parts likely
1089          * to differ first
1090          */
1091         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1092                 sizeof(dev1->scsi3addr)) != 0)
1093                 return 0;
1094         if (memcmp(dev1->device_id, dev2->device_id,
1095                 sizeof(dev1->device_id)) != 0)
1096                 return 0;
1097         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1098                 return 0;
1099         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1100                 return 0;
1101         if (dev1->devtype != dev2->devtype)
1102                 return 0;
1103         if (dev1->bus != dev2->bus)
1104                 return 0;
1105         return 1;
1106 }
1107
1108 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1109         struct hpsa_scsi_dev_t *dev2)
1110 {
1111         /* Device attributes that can change, but don't mean
1112          * that the device is a different device, nor that the OS
1113          * needs to be told anything about the change.
1114          */
1115         if (dev1->raid_level != dev2->raid_level)
1116                 return 1;
1117         if (dev1->offload_config != dev2->offload_config)
1118                 return 1;
1119         if (dev1->offload_enabled != dev2->offload_enabled)
1120                 return 1;
1121         return 0;
1122 }
1123
1124 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1125  * and return needle location in *index.  If scsi3addr matches, but not
1126  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1127  * location in *index.
1128  * In the case of a minor device attribute change, such as RAID level, just
1129  * return DEVICE_UPDATED, along with the updated device's location in index.
1130  * If needle not found, return DEVICE_NOT_FOUND.
1131  */
1132 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1133         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1134         int *index)
1135 {
1136         int i;
1137 #define DEVICE_NOT_FOUND 0
1138 #define DEVICE_CHANGED 1
1139 #define DEVICE_SAME 2
1140 #define DEVICE_UPDATED 3
1141         for (i = 0; i < haystack_size; i++) {
1142                 if (haystack[i] == NULL) /* previously removed. */
1143                         continue;
1144                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1145                         *index = i;
1146                         if (device_is_the_same(needle, haystack[i])) {
1147                                 if (device_updated(needle, haystack[i]))
1148                                         return DEVICE_UPDATED;
1149                                 return DEVICE_SAME;
1150                         } else {
1151                                 /* Keep offline devices offline */
1152                                 if (needle->volume_offline)
1153                                         return DEVICE_NOT_FOUND;
1154                                 return DEVICE_CHANGED;
1155                         }
1156                 }
1157         }
1158         *index = -1;
1159         return DEVICE_NOT_FOUND;
1160 }
1161
1162 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1163                                         unsigned char scsi3addr[])
1164 {
1165         struct offline_device_entry *device;
1166         unsigned long flags;
1167
1168         /* Check to see if device is already on the list */
1169         spin_lock_irqsave(&h->offline_device_lock, flags);
1170         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1171                 if (memcmp(device->scsi3addr, scsi3addr,
1172                         sizeof(device->scsi3addr)) == 0) {
1173                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1174                         return;
1175                 }
1176         }
1177         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1178
1179         /* Device is not on the list, add it. */
1180         device = kmalloc(sizeof(*device), GFP_KERNEL);
1181         if (!device) {
1182                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1183                 return;
1184         }
1185         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1186         spin_lock_irqsave(&h->offline_device_lock, flags);
1187         list_add_tail(&device->offline_list, &h->offline_device_list);
1188         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1189 }
1190
1191 /* Print a message explaining various offline volume states */
1192 static void hpsa_show_volume_status(struct ctlr_info *h,
1193         struct hpsa_scsi_dev_t *sd)
1194 {
1195         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1196                 dev_info(&h->pdev->dev,
1197                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1198                         h->scsi_host->host_no,
1199                         sd->bus, sd->target, sd->lun);
1200         switch (sd->volume_offline) {
1201         case HPSA_LV_OK:
1202                 break;
1203         case HPSA_LV_UNDERGOING_ERASE:
1204                 dev_info(&h->pdev->dev,
1205                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1206                         h->scsi_host->host_no,
1207                         sd->bus, sd->target, sd->lun);
1208                 break;
1209         case HPSA_LV_UNDERGOING_RPI:
1210                 dev_info(&h->pdev->dev,
1211                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1212                         h->scsi_host->host_no,
1213                         sd->bus, sd->target, sd->lun);
1214                 break;
1215         case HPSA_LV_PENDING_RPI:
1216                 dev_info(&h->pdev->dev,
1217                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1218                                 h->scsi_host->host_no,
1219                                 sd->bus, sd->target, sd->lun);
1220                 break;
1221         case HPSA_LV_ENCRYPTED_NO_KEY:
1222                 dev_info(&h->pdev->dev,
1223                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1224                         h->scsi_host->host_no,
1225                         sd->bus, sd->target, sd->lun);
1226                 break;
1227         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1228                 dev_info(&h->pdev->dev,
1229                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1230                         h->scsi_host->host_no,
1231                         sd->bus, sd->target, sd->lun);
1232                 break;
1233         case HPSA_LV_UNDERGOING_ENCRYPTION:
1234                 dev_info(&h->pdev->dev,
1235                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1236                         h->scsi_host->host_no,
1237                         sd->bus, sd->target, sd->lun);
1238                 break;
1239         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1240                 dev_info(&h->pdev->dev,
1241                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1242                         h->scsi_host->host_no,
1243                         sd->bus, sd->target, sd->lun);
1244                 break;
1245         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1246                 dev_info(&h->pdev->dev,
1247                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1248                         h->scsi_host->host_no,
1249                         sd->bus, sd->target, sd->lun);
1250                 break;
1251         case HPSA_LV_PENDING_ENCRYPTION:
1252                 dev_info(&h->pdev->dev,
1253                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1254                         h->scsi_host->host_no,
1255                         sd->bus, sd->target, sd->lun);
1256                 break;
1257         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1258                 dev_info(&h->pdev->dev,
1259                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1260                         h->scsi_host->host_no,
1261                         sd->bus, sd->target, sd->lun);
1262                 break;
1263         }
1264 }
1265
1266 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1267         struct hpsa_scsi_dev_t *sd[], int nsds)
1268 {
1269         /* sd contains scsi3 addresses and devtypes, and inquiry
1270          * data.  This function takes what's in sd to be the current
1271          * reality and updates h->dev[] to reflect that reality.
1272          */
1273         int i, entry, device_change, changes = 0;
1274         struct hpsa_scsi_dev_t *csd;
1275         unsigned long flags;
1276         struct hpsa_scsi_dev_t **added, **removed;
1277         int nadded, nremoved;
1278         struct Scsi_Host *sh = NULL;
1279
1280         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1281         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1282
1283         if (!added || !removed) {
1284                 dev_warn(&h->pdev->dev, "out of memory in "
1285                         "adjust_hpsa_scsi_table\n");
1286                 goto free_and_out;
1287         }
1288
1289         spin_lock_irqsave(&h->devlock, flags);
1290
1291         /* find any devices in h->dev[] that are not in
1292          * sd[] and remove them from h->dev[], and for any
1293          * devices which have changed, remove the old device
1294          * info and add the new device info.
1295          * If minor device attributes change, just update
1296          * the existing device structure.
1297          */
1298         i = 0;
1299         nremoved = 0;
1300         nadded = 0;
1301         while (i < h->ndevices) {
1302                 csd = h->dev[i];
1303                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1304                 if (device_change == DEVICE_NOT_FOUND) {
1305                         changes++;
1306                         hpsa_scsi_remove_entry(h, hostno, i,
1307                                 removed, &nremoved);
1308                         continue; /* remove ^^^, hence i not incremented */
1309                 } else if (device_change == DEVICE_CHANGED) {
1310                         changes++;
1311                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1312                                 added, &nadded, removed, &nremoved);
1313                         /* Set it to NULL to prevent it from being freed
1314                          * at the bottom of hpsa_update_scsi_devices()
1315                          */
1316                         sd[entry] = NULL;
1317                 } else if (device_change == DEVICE_UPDATED) {
1318                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1319                 }
1320                 i++;
1321         }
1322
1323         /* Now, make sure every device listed in sd[] is also
1324          * listed in h->dev[], adding them if they aren't found
1325          */
1326
1327         for (i = 0; i < nsds; i++) {
1328                 if (!sd[i]) /* if already added above. */
1329                         continue;
1330
1331                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1332                  * as the SCSI mid-layer does not handle such devices well.
1333                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1334                  * at 160Hz, and prevents the system from coming up.
1335                  */
1336                 if (sd[i]->volume_offline) {
1337                         hpsa_show_volume_status(h, sd[i]);
1338                         dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n",
1339                                 h->scsi_host->host_no,
1340                                 sd[i]->bus, sd[i]->target, sd[i]->lun);
1341                         continue;
1342                 }
1343
1344                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1345                                         h->ndevices, &entry);
1346                 if (device_change == DEVICE_NOT_FOUND) {
1347                         changes++;
1348                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1349                                 added, &nadded) != 0)
1350                                 break;
1351                         sd[i] = NULL; /* prevent from being freed later. */
1352                 } else if (device_change == DEVICE_CHANGED) {
1353                         /* should never happen... */
1354                         changes++;
1355                         dev_warn(&h->pdev->dev,
1356                                 "device unexpectedly changed.\n");
1357                         /* but if it does happen, we just ignore that device */
1358                 }
1359         }
1360         spin_unlock_irqrestore(&h->devlock, flags);
1361
1362         /* Monitor devices which are in one of several NOT READY states to be
1363          * brought online later. This must be done without holding h->devlock,
1364          * so don't touch h->dev[]
1365          */
1366         for (i = 0; i < nsds; i++) {
1367                 if (!sd[i]) /* if already added above. */
1368                         continue;
1369                 if (sd[i]->volume_offline)
1370                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1371         }
1372
1373         /* Don't notify scsi mid layer of any changes the first time through
1374          * (or if there are no changes) scsi_scan_host will do it later the
1375          * first time through.
1376          */
1377         if (hostno == -1 || !changes)
1378                 goto free_and_out;
1379
1380         sh = h->scsi_host;
1381         /* Notify scsi mid layer of any removed devices */
1382         for (i = 0; i < nremoved; i++) {
1383                 struct scsi_device *sdev =
1384                         scsi_device_lookup(sh, removed[i]->bus,
1385                                 removed[i]->target, removed[i]->lun);
1386                 if (sdev != NULL) {
1387                         scsi_remove_device(sdev);
1388                         scsi_device_put(sdev);
1389                 } else {
1390                         /* We don't expect to get here.
1391                          * future cmds to this device will get selection
1392                          * timeout as if the device was gone.
1393                          */
1394                         dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1395                                 " for removal.", hostno, removed[i]->bus,
1396                                 removed[i]->target, removed[i]->lun);
1397                 }
1398                 kfree(removed[i]);
1399                 removed[i] = NULL;
1400         }
1401
1402         /* Notify scsi mid layer of any added devices */
1403         for (i = 0; i < nadded; i++) {
1404                 if (scsi_add_device(sh, added[i]->bus,
1405                         added[i]->target, added[i]->lun) == 0)
1406                         continue;
1407                 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1408                         "device not added.\n", hostno, added[i]->bus,
1409                         added[i]->target, added[i]->lun);
1410                 /* now we have to remove it from h->dev,
1411                  * since it didn't get added to scsi mid layer
1412                  */
1413                 fixup_botched_add(h, added[i]);
1414         }
1415
1416 free_and_out:
1417         kfree(added);
1418         kfree(removed);
1419 }
1420
1421 /*
1422  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1423  * Assume's h->devlock is held.
1424  */
1425 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1426         int bus, int target, int lun)
1427 {
1428         int i;
1429         struct hpsa_scsi_dev_t *sd;
1430
1431         for (i = 0; i < h->ndevices; i++) {
1432                 sd = h->dev[i];
1433                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1434                         return sd;
1435         }
1436         return NULL;
1437 }
1438
1439 /* link sdev->hostdata to our per-device structure. */
1440 static int hpsa_slave_alloc(struct scsi_device *sdev)
1441 {
1442         struct hpsa_scsi_dev_t *sd;
1443         unsigned long flags;
1444         struct ctlr_info *h;
1445
1446         h = sdev_to_hba(sdev);
1447         spin_lock_irqsave(&h->devlock, flags);
1448         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1449                 sdev_id(sdev), sdev->lun);
1450         if (sd != NULL)
1451                 sdev->hostdata = sd;
1452         spin_unlock_irqrestore(&h->devlock, flags);
1453         return 0;
1454 }
1455
1456 static void hpsa_slave_destroy(struct scsi_device *sdev)
1457 {
1458         /* nothing to do. */
1459 }
1460
1461 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1462 {
1463         int i;
1464
1465         if (!h->cmd_sg_list)
1466                 return;
1467         for (i = 0; i < h->nr_cmds; i++) {
1468                 kfree(h->cmd_sg_list[i]);
1469                 h->cmd_sg_list[i] = NULL;
1470         }
1471         kfree(h->cmd_sg_list);
1472         h->cmd_sg_list = NULL;
1473 }
1474
1475 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1476 {
1477         int i;
1478
1479         if (h->chainsize <= 0)
1480                 return 0;
1481
1482         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1483                                 GFP_KERNEL);
1484         if (!h->cmd_sg_list) {
1485                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1486                 return -ENOMEM;
1487         }
1488         for (i = 0; i < h->nr_cmds; i++) {
1489                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1490                                                 h->chainsize, GFP_KERNEL);
1491                 if (!h->cmd_sg_list[i]) {
1492                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1493                         goto clean;
1494                 }
1495         }
1496         return 0;
1497
1498 clean:
1499         hpsa_free_sg_chain_blocks(h);
1500         return -ENOMEM;
1501 }
1502
1503 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1504         struct CommandList *c)
1505 {
1506         struct SGDescriptor *chain_sg, *chain_block;
1507         u64 temp64;
1508         u32 chain_len;
1509
1510         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1511         chain_block = h->cmd_sg_list[c->cmdindex];
1512         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1513         chain_len = sizeof(*chain_sg) *
1514                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1515         chain_sg->Len = cpu_to_le32(chain_len);
1516         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1517                                 PCI_DMA_TODEVICE);
1518         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1519                 /* prevent subsequent unmapping */
1520                 chain_sg->Addr = cpu_to_le64(0);
1521                 return -1;
1522         }
1523         chain_sg->Addr = cpu_to_le64(temp64);
1524         return 0;
1525 }
1526
1527 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1528         struct CommandList *c)
1529 {
1530         struct SGDescriptor *chain_sg;
1531
1532         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1533                 return;
1534
1535         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1536         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
1537                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1538 }
1539
1540
1541 /* Decode the various types of errors on ioaccel2 path.
1542  * Return 1 for any error that should generate a RAID path retry.
1543  * Return 0 for errors that don't require a RAID path retry.
1544  */
1545 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1546                                         struct CommandList *c,
1547                                         struct scsi_cmnd *cmd,
1548                                         struct io_accel2_cmd *c2)
1549 {
1550         int data_len;
1551         int retry = 0;
1552
1553         switch (c2->error_data.serv_response) {
1554         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1555                 switch (c2->error_data.status) {
1556                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1557                         break;
1558                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1559                         dev_warn(&h->pdev->dev,
1560                                 "%s: task complete with check condition.\n",
1561                                 "HP SSD Smart Path");
1562                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1563                         if (c2->error_data.data_present !=
1564                                         IOACCEL2_SENSE_DATA_PRESENT) {
1565                                 memset(cmd->sense_buffer, 0,
1566                                         SCSI_SENSE_BUFFERSIZE);
1567                                 break;
1568                         }
1569                         /* copy the sense data */
1570                         data_len = c2->error_data.sense_data_len;
1571                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1572                                 data_len = SCSI_SENSE_BUFFERSIZE;
1573                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1574                                 data_len =
1575                                         sizeof(c2->error_data.sense_data_buff);
1576                         memcpy(cmd->sense_buffer,
1577                                 c2->error_data.sense_data_buff, data_len);
1578                         retry = 1;
1579                         break;
1580                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1581                         dev_warn(&h->pdev->dev,
1582                                 "%s: task complete with BUSY status.\n",
1583                                 "HP SSD Smart Path");
1584                         retry = 1;
1585                         break;
1586                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1587                         dev_warn(&h->pdev->dev,
1588                                 "%s: task complete with reservation conflict.\n",
1589                                 "HP SSD Smart Path");
1590                         retry = 1;
1591                         break;
1592                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1593                         /* Make scsi midlayer do unlimited retries */
1594                         cmd->result = DID_IMM_RETRY << 16;
1595                         break;
1596                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1597                         dev_warn(&h->pdev->dev,
1598                                 "%s: task complete with aborted status.\n",
1599                                 "HP SSD Smart Path");
1600                         retry = 1;
1601                         break;
1602                 default:
1603                         dev_warn(&h->pdev->dev,
1604                                 "%s: task complete with unrecognized status: 0x%02x\n",
1605                                 "HP SSD Smart Path", c2->error_data.status);
1606                         retry = 1;
1607                         break;
1608                 }
1609                 break;
1610         case IOACCEL2_SERV_RESPONSE_FAILURE:
1611                 /* don't expect to get here. */
1612                 dev_warn(&h->pdev->dev,
1613                         "unexpected delivery or target failure, status = 0x%02x\n",
1614                         c2->error_data.status);
1615                 retry = 1;
1616                 break;
1617         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1618                 break;
1619         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1620                 break;
1621         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1622                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1623                 retry = 1;
1624                 break;
1625         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1626                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1627                 break;
1628         default:
1629                 dev_warn(&h->pdev->dev,
1630                         "%s: Unrecognized server response: 0x%02x\n",
1631                         "HP SSD Smart Path",
1632                         c2->error_data.serv_response);
1633                 retry = 1;
1634                 break;
1635         }
1636
1637         return retry;   /* retry on raid path? */
1638 }
1639
1640 static void process_ioaccel2_completion(struct ctlr_info *h,
1641                 struct CommandList *c, struct scsi_cmnd *cmd,
1642                 struct hpsa_scsi_dev_t *dev)
1643 {
1644         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1645         int raid_retry = 0;
1646
1647         /* check for good status */
1648         if (likely(c2->error_data.serv_response == 0 &&
1649                         c2->error_data.status == 0)) {
1650                 cmd_free(h, c);
1651                 cmd->scsi_done(cmd);
1652                 return;
1653         }
1654
1655         /* Any RAID offload error results in retry which will use
1656          * the normal I/O path so the controller can handle whatever's
1657          * wrong.
1658          */
1659         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1660                 c2->error_data.serv_response ==
1661                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1662                 dev->offload_enabled = 0;
1663                 h->drv_req_rescan = 1;  /* schedule controller for a rescan */
1664                 cmd->result = DID_SOFT_ERROR << 16;
1665                 cmd_free(h, c);
1666                 cmd->scsi_done(cmd);
1667                 return;
1668         }
1669         raid_retry = handle_ioaccel_mode2_error(h, c, cmd, c2);
1670         /* If error found, disable Smart Path, schedule a rescan,
1671          * and force a retry on the standard path.
1672          */
1673         if (raid_retry) {
1674                 dev_warn(&h->pdev->dev, "%s: Retrying on standard path.\n",
1675                         "HP SSD Smart Path");
1676                 dev->offload_enabled = 0; /* Disable Smart Path */
1677                 h->drv_req_rescan = 1;    /* schedule controller rescan */
1678                 cmd->result = DID_SOFT_ERROR << 16;
1679         }
1680         cmd_free(h, c);
1681         cmd->scsi_done(cmd);
1682 }
1683
1684 static void complete_scsi_command(struct CommandList *cp)
1685 {
1686         struct scsi_cmnd *cmd;
1687         struct ctlr_info *h;
1688         struct ErrorInfo *ei;
1689         struct hpsa_scsi_dev_t *dev;
1690
1691         unsigned char sense_key;
1692         unsigned char asc;      /* additional sense code */
1693         unsigned char ascq;     /* additional sense code qualifier */
1694         unsigned long sense_data_size;
1695
1696         ei = cp->err_info;
1697         cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1698         h = cp->h;
1699         dev = cmd->device->hostdata;
1700
1701         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1702         if ((cp->cmd_type == CMD_SCSI) &&
1703                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
1704                 hpsa_unmap_sg_chain_block(h, cp);
1705
1706         cmd->result = (DID_OK << 16);           /* host byte */
1707         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1708
1709         if (cp->cmd_type == CMD_IOACCEL2)
1710                 return process_ioaccel2_completion(h, cp, cmd, dev);
1711
1712         cmd->result |= ei->ScsiStatus;
1713
1714         scsi_set_resid(cmd, ei->ResidualCnt);
1715         if (ei->CommandStatus == 0) {
1716                 cmd_free(h, cp);
1717                 cmd->scsi_done(cmd);
1718                 return;
1719         }
1720
1721         /* copy the sense data */
1722         if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1723                 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1724         else
1725                 sense_data_size = sizeof(ei->SenseInfo);
1726         if (ei->SenseLen < sense_data_size)
1727                 sense_data_size = ei->SenseLen;
1728
1729         memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1730
1731         /* For I/O accelerator commands, copy over some fields to the normal
1732          * CISS header used below for error handling.
1733          */
1734         if (cp->cmd_type == CMD_IOACCEL1) {
1735                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1736                 cp->Header.SGList = scsi_sg_count(cmd);
1737                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
1738                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
1739                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
1740                 cp->Header.tag = c->tag;
1741                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
1742                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
1743
1744                 /* Any RAID offload error results in retry which will use
1745                  * the normal I/O path so the controller can handle whatever's
1746                  * wrong.
1747                  */
1748                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
1749                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
1750                                 dev->offload_enabled = 0;
1751                         cmd->result = DID_SOFT_ERROR << 16;
1752                         cmd_free(h, cp);
1753                         cmd->scsi_done(cmd);
1754                         return;
1755                 }
1756         }
1757
1758         /* an error has occurred */
1759         switch (ei->CommandStatus) {
1760
1761         case CMD_TARGET_STATUS:
1762                 if (ei->ScsiStatus) {
1763                         /* Get sense key */
1764                         sense_key = 0xf & ei->SenseInfo[2];
1765                         /* Get additional sense code */
1766                         asc = ei->SenseInfo[12];
1767                         /* Get addition sense code qualifier */
1768                         ascq = ei->SenseInfo[13];
1769                 }
1770                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1771                         if (sense_key == ABORTED_COMMAND) {
1772                                 cmd->result |= DID_SOFT_ERROR << 16;
1773                                 break;
1774                         }
1775                         break;
1776                 }
1777                 /* Problem was not a check condition
1778                  * Pass it up to the upper layers...
1779                  */
1780                 if (ei->ScsiStatus) {
1781                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1782                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1783                                 "Returning result: 0x%x\n",
1784                                 cp, ei->ScsiStatus,
1785                                 sense_key, asc, ascq,
1786                                 cmd->result);
1787                 } else {  /* scsi status is zero??? How??? */
1788                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1789                                 "Returning no connection.\n", cp),
1790
1791                         /* Ordinarily, this case should never happen,
1792                          * but there is a bug in some released firmware
1793                          * revisions that allows it to happen if, for
1794                          * example, a 4100 backplane loses power and
1795                          * the tape drive is in it.  We assume that
1796                          * it's a fatal error of some kind because we
1797                          * can't show that it wasn't. We will make it
1798                          * look like selection timeout since that is
1799                          * the most common reason for this to occur,
1800                          * and it's severe enough.
1801                          */
1802
1803                         cmd->result = DID_NO_CONNECT << 16;
1804                 }
1805                 break;
1806
1807         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1808                 break;
1809         case CMD_DATA_OVERRUN:
1810                 dev_warn(&h->pdev->dev, "cp %p has"
1811                         " completed with data overrun "
1812                         "reported\n", cp);
1813                 break;
1814         case CMD_INVALID: {
1815                 /* print_bytes(cp, sizeof(*cp), 1, 0);
1816                 print_cmd(cp); */
1817                 /* We get CMD_INVALID if you address a non-existent device
1818                  * instead of a selection timeout (no response).  You will
1819                  * see this if you yank out a drive, then try to access it.
1820                  * This is kind of a shame because it means that any other
1821                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
1822                  * missing target. */
1823                 cmd->result = DID_NO_CONNECT << 16;
1824         }
1825                 break;
1826         case CMD_PROTOCOL_ERR:
1827                 cmd->result = DID_ERROR << 16;
1828                 dev_warn(&h->pdev->dev, "cp %p has "
1829                         "protocol error\n", cp);
1830                 break;
1831         case CMD_HARDWARE_ERR:
1832                 cmd->result = DID_ERROR << 16;
1833                 dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp);
1834                 break;
1835         case CMD_CONNECTION_LOST:
1836                 cmd->result = DID_ERROR << 16;
1837                 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1838                 break;
1839         case CMD_ABORTED:
1840                 cmd->result = DID_ABORT << 16;
1841                 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1842                                 cp, ei->ScsiStatus);
1843                 break;
1844         case CMD_ABORT_FAILED:
1845                 cmd->result = DID_ERROR << 16;
1846                 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1847                 break;
1848         case CMD_UNSOLICITED_ABORT:
1849                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1850                 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1851                         "abort\n", cp);
1852                 break;
1853         case CMD_TIMEOUT:
1854                 cmd->result = DID_TIME_OUT << 16;
1855                 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1856                 break;
1857         case CMD_UNABORTABLE:
1858                 cmd->result = DID_ERROR << 16;
1859                 dev_warn(&h->pdev->dev, "Command unabortable\n");
1860                 break;
1861         case CMD_IOACCEL_DISABLED:
1862                 /* This only handles the direct pass-through case since RAID
1863                  * offload is handled above.  Just attempt a retry.
1864                  */
1865                 cmd->result = DID_SOFT_ERROR << 16;
1866                 dev_warn(&h->pdev->dev,
1867                                 "cp %p had HP SSD Smart Path error\n", cp);
1868                 break;
1869         default:
1870                 cmd->result = DID_ERROR << 16;
1871                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1872                                 cp, ei->CommandStatus);
1873         }
1874         cmd_free(h, cp);
1875         cmd->scsi_done(cmd);
1876 }
1877
1878 static void hpsa_pci_unmap(struct pci_dev *pdev,
1879         struct CommandList *c, int sg_used, int data_direction)
1880 {
1881         int i;
1882
1883         for (i = 0; i < sg_used; i++)
1884                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
1885                                 le32_to_cpu(c->SG[i].Len),
1886                                 data_direction);
1887 }
1888
1889 static int hpsa_map_one(struct pci_dev *pdev,
1890                 struct CommandList *cp,
1891                 unsigned char *buf,
1892                 size_t buflen,
1893                 int data_direction)
1894 {
1895         u64 addr64;
1896
1897         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1898                 cp->Header.SGList = 0;
1899                 cp->Header.SGTotal = cpu_to_le16(0);
1900                 return 0;
1901         }
1902
1903         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
1904         if (dma_mapping_error(&pdev->dev, addr64)) {
1905                 /* Prevent subsequent unmap of something never mapped */
1906                 cp->Header.SGList = 0;
1907                 cp->Header.SGTotal = cpu_to_le16(0);
1908                 return -1;
1909         }
1910         cp->SG[0].Addr = cpu_to_le64(addr64);
1911         cp->SG[0].Len = cpu_to_le32(buflen);
1912         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
1913         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
1914         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
1915         return 0;
1916 }
1917
1918 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1919         struct CommandList *c)
1920 {
1921         DECLARE_COMPLETION_ONSTACK(wait);
1922
1923         c->waiting = &wait;
1924         enqueue_cmd_and_start_io(h, c);
1925         wait_for_completion(&wait);
1926 }
1927
1928 static u32 lockup_detected(struct ctlr_info *h)
1929 {
1930         int cpu;
1931         u32 rc, *lockup_detected;
1932
1933         cpu = get_cpu();
1934         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
1935         rc = *lockup_detected;
1936         put_cpu();
1937         return rc;
1938 }
1939
1940 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1941         struct CommandList *c)
1942 {
1943         /* If controller lockup detected, fake a hardware error. */
1944         if (unlikely(lockup_detected(h)))
1945                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1946         else
1947                 hpsa_scsi_do_simple_cmd_core(h, c);
1948 }
1949
1950 #define MAX_DRIVER_CMD_RETRIES 25
1951 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1952         struct CommandList *c, int data_direction)
1953 {
1954         int backoff_time = 10, retry_count = 0;
1955
1956         do {
1957                 memset(c->err_info, 0, sizeof(*c->err_info));
1958                 hpsa_scsi_do_simple_cmd_core(h, c);
1959                 retry_count++;
1960                 if (retry_count > 3) {
1961                         msleep(backoff_time);
1962                         if (backoff_time < 1000)
1963                                 backoff_time *= 2;
1964                 }
1965         } while ((check_for_unit_attention(h, c) ||
1966                         check_for_busy(h, c)) &&
1967                         retry_count <= MAX_DRIVER_CMD_RETRIES);
1968         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1969 }
1970
1971 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
1972                                 struct CommandList *c)
1973 {
1974         const u8 *cdb = c->Request.CDB;
1975         const u8 *lun = c->Header.LUN.LunAddrBytes;
1976
1977         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
1978         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
1979                 txt, lun[0], lun[1], lun[2], lun[3],
1980                 lun[4], lun[5], lun[6], lun[7],
1981                 cdb[0], cdb[1], cdb[2], cdb[3],
1982                 cdb[4], cdb[5], cdb[6], cdb[7],
1983                 cdb[8], cdb[9], cdb[10], cdb[11],
1984                 cdb[12], cdb[13], cdb[14], cdb[15]);
1985 }
1986
1987 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
1988                         struct CommandList *cp)
1989 {
1990         const struct ErrorInfo *ei = cp->err_info;
1991         struct device *d = &cp->h->pdev->dev;
1992         const u8 *sd = ei->SenseInfo;
1993
1994         switch (ei->CommandStatus) {
1995         case CMD_TARGET_STATUS:
1996                 hpsa_print_cmd(h, "SCSI status", cp);
1997                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
1998                         dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n",
1999                                 sd[2] & 0x0f, sd[12], sd[13]);
2000                 else
2001                         dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus);
2002                 if (ei->ScsiStatus == 0)
2003                         dev_warn(d, "SCSI status is abnormally zero.  "
2004                         "(probably indicates selection timeout "
2005                         "reported incorrectly due to a known "
2006                         "firmware bug, circa July, 2001.)\n");
2007                 break;
2008         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2009                 break;
2010         case CMD_DATA_OVERRUN:
2011                 hpsa_print_cmd(h, "overrun condition", cp);
2012                 break;
2013         case CMD_INVALID: {
2014                 /* controller unfortunately reports SCSI passthru's
2015                  * to non-existent targets as invalid commands.
2016                  */
2017                 hpsa_print_cmd(h, "invalid command", cp);
2018                 dev_warn(d, "probably means device no longer present\n");
2019                 }
2020                 break;
2021         case CMD_PROTOCOL_ERR:
2022                 hpsa_print_cmd(h, "protocol error", cp);
2023                 break;
2024         case CMD_HARDWARE_ERR:
2025                 hpsa_print_cmd(h, "hardware error", cp);
2026                 break;
2027         case CMD_CONNECTION_LOST:
2028                 hpsa_print_cmd(h, "connection lost", cp);
2029                 break;
2030         case CMD_ABORTED:
2031                 hpsa_print_cmd(h, "aborted", cp);
2032                 break;
2033         case CMD_ABORT_FAILED:
2034                 hpsa_print_cmd(h, "abort failed", cp);
2035                 break;
2036         case CMD_UNSOLICITED_ABORT:
2037                 hpsa_print_cmd(h, "unsolicited abort", cp);
2038                 break;
2039         case CMD_TIMEOUT:
2040                 hpsa_print_cmd(h, "timed out", cp);
2041                 break;
2042         case CMD_UNABORTABLE:
2043                 hpsa_print_cmd(h, "unabortable", cp);
2044                 break;
2045         default:
2046                 hpsa_print_cmd(h, "unknown status", cp);
2047                 dev_warn(d, "Unknown command status %x\n",
2048                                 ei->CommandStatus);
2049         }
2050 }
2051
2052 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2053                         u16 page, unsigned char *buf,
2054                         unsigned char bufsize)
2055 {
2056         int rc = IO_OK;
2057         struct CommandList *c;
2058         struct ErrorInfo *ei;
2059
2060         c = cmd_special_alloc(h);
2061
2062         if (c == NULL) {                        /* trouble... */
2063                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2064                 return -ENOMEM;
2065         }
2066
2067         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2068                         page, scsi3addr, TYPE_CMD)) {
2069                 rc = -1;
2070                 goto out;
2071         }
2072         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2073         ei = c->err_info;
2074         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2075                 hpsa_scsi_interpret_error(h, c);
2076                 rc = -1;
2077         }
2078 out:
2079         cmd_special_free(h, c);
2080         return rc;
2081 }
2082
2083 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2084                 unsigned char *scsi3addr, unsigned char page,
2085                 struct bmic_controller_parameters *buf, size_t bufsize)
2086 {
2087         int rc = IO_OK;
2088         struct CommandList *c;
2089         struct ErrorInfo *ei;
2090
2091         c = cmd_special_alloc(h);
2092
2093         if (c == NULL) {                        /* trouble... */
2094                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2095                 return -ENOMEM;
2096         }
2097
2098         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2099                         page, scsi3addr, TYPE_CMD)) {
2100                 rc = -1;
2101                 goto out;
2102         }
2103         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2104         ei = c->err_info;
2105         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2106                 hpsa_scsi_interpret_error(h, c);
2107                 rc = -1;
2108         }
2109 out:
2110         cmd_special_free(h, c);
2111         return rc;
2112         }
2113
2114 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2115         u8 reset_type)
2116 {
2117         int rc = IO_OK;
2118         struct CommandList *c;
2119         struct ErrorInfo *ei;
2120
2121         c = cmd_special_alloc(h);
2122
2123         if (c == NULL) {                        /* trouble... */
2124                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2125                 return -ENOMEM;
2126         }
2127
2128         /* fill_cmd can't fail here, no data buffer to map. */
2129         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2130                         scsi3addr, TYPE_MSG);
2131         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2132         hpsa_scsi_do_simple_cmd_core(h, c);
2133         /* no unmap needed here because no data xfer. */
2134
2135         ei = c->err_info;
2136         if (ei->CommandStatus != 0) {
2137                 hpsa_scsi_interpret_error(h, c);
2138                 rc = -1;
2139         }
2140         cmd_special_free(h, c);
2141         return rc;
2142 }
2143
2144 static void hpsa_get_raid_level(struct ctlr_info *h,
2145         unsigned char *scsi3addr, unsigned char *raid_level)
2146 {
2147         int rc;
2148         unsigned char *buf;
2149
2150         *raid_level = RAID_UNKNOWN;
2151         buf = kzalloc(64, GFP_KERNEL);
2152         if (!buf)
2153                 return;
2154         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2155         if (rc == 0)
2156                 *raid_level = buf[8];
2157         if (*raid_level > RAID_UNKNOWN)
2158                 *raid_level = RAID_UNKNOWN;
2159         kfree(buf);
2160         return;
2161 }
2162
2163 #define HPSA_MAP_DEBUG
2164 #ifdef HPSA_MAP_DEBUG
2165 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2166                                 struct raid_map_data *map_buff)
2167 {
2168         struct raid_map_disk_data *dd = &map_buff->data[0];
2169         int map, row, col;
2170         u16 map_cnt, row_cnt, disks_per_row;
2171
2172         if (rc != 0)
2173                 return;
2174
2175         /* Show details only if debugging has been activated. */
2176         if (h->raid_offload_debug < 2)
2177                 return;
2178
2179         dev_info(&h->pdev->dev, "structure_size = %u\n",
2180                                 le32_to_cpu(map_buff->structure_size));
2181         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2182                         le32_to_cpu(map_buff->volume_blk_size));
2183         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2184                         le64_to_cpu(map_buff->volume_blk_cnt));
2185         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2186                         map_buff->phys_blk_shift);
2187         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2188                         map_buff->parity_rotation_shift);
2189         dev_info(&h->pdev->dev, "strip_size = %u\n",
2190                         le16_to_cpu(map_buff->strip_size));
2191         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2192                         le64_to_cpu(map_buff->disk_starting_blk));
2193         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2194                         le64_to_cpu(map_buff->disk_blk_cnt));
2195         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2196                         le16_to_cpu(map_buff->data_disks_per_row));
2197         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2198                         le16_to_cpu(map_buff->metadata_disks_per_row));
2199         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2200                         le16_to_cpu(map_buff->row_cnt));
2201         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2202                         le16_to_cpu(map_buff->layout_map_count));
2203         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2204                         le16_to_cpu(map_buff->flags));
2205         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2206                         le16_to_cpu(map_buff->flags) &
2207                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2208         dev_info(&h->pdev->dev, "dekindex = %u\n",
2209                         le16_to_cpu(map_buff->dekindex));
2210         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2211         for (map = 0; map < map_cnt; map++) {
2212                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2213                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2214                 for (row = 0; row < row_cnt; row++) {
2215                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2216                         disks_per_row =
2217                                 le16_to_cpu(map_buff->data_disks_per_row);
2218                         for (col = 0; col < disks_per_row; col++, dd++)
2219                                 dev_info(&h->pdev->dev,
2220                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2221                                         col, dd->ioaccel_handle,
2222                                         dd->xor_mult[0], dd->xor_mult[1]);
2223                         disks_per_row =
2224                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2225                         for (col = 0; col < disks_per_row; col++, dd++)
2226                                 dev_info(&h->pdev->dev,
2227                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2228                                         col, dd->ioaccel_handle,
2229                                         dd->xor_mult[0], dd->xor_mult[1]);
2230                 }
2231         }
2232 }
2233 #else
2234 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2235                         __attribute__((unused)) int rc,
2236                         __attribute__((unused)) struct raid_map_data *map_buff)
2237 {
2238 }
2239 #endif
2240
2241 static int hpsa_get_raid_map(struct ctlr_info *h,
2242         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2243 {
2244         int rc = 0;
2245         struct CommandList *c;
2246         struct ErrorInfo *ei;
2247
2248         c = cmd_special_alloc(h);
2249         if (c == NULL) {
2250                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2251                 return -ENOMEM;
2252         }
2253         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2254                         sizeof(this_device->raid_map), 0,
2255                         scsi3addr, TYPE_CMD)) {
2256                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2257                 cmd_special_free(h, c);
2258                 return -ENOMEM;
2259         }
2260         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2261         ei = c->err_info;
2262         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2263                 hpsa_scsi_interpret_error(h, c);
2264                 cmd_special_free(h, c);
2265                 return -1;
2266         }
2267         cmd_special_free(h, c);
2268
2269         /* @todo in the future, dynamically allocate RAID map memory */
2270         if (le32_to_cpu(this_device->raid_map.structure_size) >
2271                                 sizeof(this_device->raid_map)) {
2272                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2273                 rc = -1;
2274         }
2275         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2276         return rc;
2277 }
2278
2279 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2280         unsigned char scsi3addr[], u8 page)
2281 {
2282         int rc;
2283         int i;
2284         int pages;
2285         unsigned char *buf, bufsize;
2286
2287         buf = kzalloc(256, GFP_KERNEL);
2288         if (!buf)
2289                 return 0;
2290
2291         /* Get the size of the page list first */
2292         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2293                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2294                                 buf, HPSA_VPD_HEADER_SZ);
2295         if (rc != 0)
2296                 goto exit_unsupported;
2297         pages = buf[3];
2298         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2299                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2300         else
2301                 bufsize = 255;
2302
2303         /* Get the whole VPD page list */
2304         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2305                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2306                                 buf, bufsize);
2307         if (rc != 0)
2308                 goto exit_unsupported;
2309
2310         pages = buf[3];
2311         for (i = 1; i <= pages; i++)
2312                 if (buf[3 + i] == page)
2313                         goto exit_supported;
2314 exit_unsupported:
2315         kfree(buf);
2316         return 0;
2317 exit_supported:
2318         kfree(buf);
2319         return 1;
2320 }
2321
2322 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2323         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2324 {
2325         int rc;
2326         unsigned char *buf;
2327         u8 ioaccel_status;
2328
2329         this_device->offload_config = 0;
2330         this_device->offload_enabled = 0;
2331
2332         buf = kzalloc(64, GFP_KERNEL);
2333         if (!buf)
2334                 return;
2335         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2336                 goto out;
2337         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2338                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2339         if (rc != 0)
2340                 goto out;
2341
2342 #define IOACCEL_STATUS_BYTE 4
2343 #define OFFLOAD_CONFIGURED_BIT 0x01
2344 #define OFFLOAD_ENABLED_BIT 0x02
2345         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2346         this_device->offload_config =
2347                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2348         if (this_device->offload_config) {
2349                 this_device->offload_enabled =
2350                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2351                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2352                         this_device->offload_enabled = 0;
2353         }
2354 out:
2355         kfree(buf);
2356         return;
2357 }
2358
2359 /* Get the device id from inquiry page 0x83 */
2360 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2361         unsigned char *device_id, int buflen)
2362 {
2363         int rc;
2364         unsigned char *buf;
2365
2366         if (buflen > 16)
2367                 buflen = 16;
2368         buf = kzalloc(64, GFP_KERNEL);
2369         if (!buf)
2370                 return -ENOMEM;
2371         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2372         if (rc == 0)
2373                 memcpy(device_id, &buf[8], buflen);
2374         kfree(buf);
2375         return rc != 0;
2376 }
2377
2378 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2379                 struct ReportLUNdata *buf, int bufsize,
2380                 int extended_response)
2381 {
2382         int rc = IO_OK;
2383         struct CommandList *c;
2384         unsigned char scsi3addr[8];
2385         struct ErrorInfo *ei;
2386
2387         c = cmd_special_alloc(h);
2388         if (c == NULL) {                        /* trouble... */
2389                 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2390                 return -1;
2391         }
2392         /* address the controller */
2393         memset(scsi3addr, 0, sizeof(scsi3addr));
2394         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2395                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2396                 rc = -1;
2397                 goto out;
2398         }
2399         if (extended_response)
2400                 c->Request.CDB[1] = extended_response;
2401         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2402         ei = c->err_info;
2403         if (ei->CommandStatus != 0 &&
2404             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2405                 hpsa_scsi_interpret_error(h, c);
2406                 rc = -1;
2407         } else {
2408                 if (buf->extended_response_flag != extended_response) {
2409                         dev_err(&h->pdev->dev,
2410                                 "report luns requested format %u, got %u\n",
2411                                 extended_response,
2412                                 buf->extended_response_flag);
2413                         rc = -1;
2414                 }
2415         }
2416 out:
2417         cmd_special_free(h, c);
2418         return rc;
2419 }
2420
2421 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2422                 struct ReportLUNdata *buf,
2423                 int bufsize, int extended_response)
2424 {
2425         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
2426 }
2427
2428 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2429                 struct ReportLUNdata *buf, int bufsize)
2430 {
2431         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2432 }
2433
2434 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2435         int bus, int target, int lun)
2436 {
2437         device->bus = bus;
2438         device->target = target;
2439         device->lun = lun;
2440 }
2441
2442 /* Use VPD inquiry to get details of volume status */
2443 static int hpsa_get_volume_status(struct ctlr_info *h,
2444                                         unsigned char scsi3addr[])
2445 {
2446         int rc;
2447         int status;
2448         int size;
2449         unsigned char *buf;
2450
2451         buf = kzalloc(64, GFP_KERNEL);
2452         if (!buf)
2453                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2454
2455         /* Does controller have VPD for logical volume status? */
2456         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2457                 goto exit_failed;
2458
2459         /* Get the size of the VPD return buffer */
2460         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2461                                         buf, HPSA_VPD_HEADER_SZ);
2462         if (rc != 0)
2463                 goto exit_failed;
2464         size = buf[3];
2465
2466         /* Now get the whole VPD buffer */
2467         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2468                                         buf, size + HPSA_VPD_HEADER_SZ);
2469         if (rc != 0)
2470                 goto exit_failed;
2471         status = buf[4]; /* status byte */
2472
2473         kfree(buf);
2474         return status;
2475 exit_failed:
2476         kfree(buf);
2477         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2478 }
2479
2480 /* Determine offline status of a volume.
2481  * Return either:
2482  *  0 (not offline)
2483  *  0xff (offline for unknown reasons)
2484  *  # (integer code indicating one of several NOT READY states
2485  *     describing why a volume is to be kept offline)
2486  */
2487 static int hpsa_volume_offline(struct ctlr_info *h,
2488                                         unsigned char scsi3addr[])
2489 {
2490         struct CommandList *c;
2491         unsigned char *sense, sense_key, asc, ascq;
2492         int ldstat = 0;
2493         u16 cmd_status;
2494         u8 scsi_status;
2495 #define ASC_LUN_NOT_READY 0x04
2496 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2497 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2498
2499         c = cmd_alloc(h);
2500         if (!c)
2501                 return 0;
2502         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2503         hpsa_scsi_do_simple_cmd_core(h, c);
2504         sense = c->err_info->SenseInfo;
2505         sense_key = sense[2];
2506         asc = sense[12];
2507         ascq = sense[13];
2508         cmd_status = c->err_info->CommandStatus;
2509         scsi_status = c->err_info->ScsiStatus;
2510         cmd_free(h, c);
2511         /* Is the volume 'not ready'? */
2512         if (cmd_status != CMD_TARGET_STATUS ||
2513                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2514                 sense_key != NOT_READY ||
2515                 asc != ASC_LUN_NOT_READY)  {
2516                 return 0;
2517         }
2518
2519         /* Determine the reason for not ready state */
2520         ldstat = hpsa_get_volume_status(h, scsi3addr);
2521
2522         /* Keep volume offline in certain cases: */
2523         switch (ldstat) {
2524         case HPSA_LV_UNDERGOING_ERASE:
2525         case HPSA_LV_UNDERGOING_RPI:
2526         case HPSA_LV_PENDING_RPI:
2527         case HPSA_LV_ENCRYPTED_NO_KEY:
2528         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2529         case HPSA_LV_UNDERGOING_ENCRYPTION:
2530         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2531         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2532                 return ldstat;
2533         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2534                 /* If VPD status page isn't available,
2535                  * use ASC/ASCQ to determine state
2536                  */
2537                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2538                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2539                         return ldstat;
2540                 break;
2541         default:
2542                 break;
2543         }
2544         return 0;
2545 }
2546
2547 static int hpsa_update_device_info(struct ctlr_info *h,
2548         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2549         unsigned char *is_OBDR_device)
2550 {
2551
2552 #define OBDR_SIG_OFFSET 43
2553 #define OBDR_TAPE_SIG "$DR-10"
2554 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2555 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2556
2557         unsigned char *inq_buff;
2558         unsigned char *obdr_sig;
2559
2560         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2561         if (!inq_buff)
2562                 goto bail_out;
2563
2564         /* Do an inquiry to the device to see what it is. */
2565         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2566                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2567                 /* Inquiry failed (msg printed already) */
2568                 dev_err(&h->pdev->dev,
2569                         "hpsa_update_device_info: inquiry failed\n");
2570                 goto bail_out;
2571         }
2572
2573         this_device->devtype = (inq_buff[0] & 0x1f);
2574         memcpy(this_device->scsi3addr, scsi3addr, 8);
2575         memcpy(this_device->vendor, &inq_buff[8],
2576                 sizeof(this_device->vendor));
2577         memcpy(this_device->model, &inq_buff[16],
2578                 sizeof(this_device->model));
2579         memset(this_device->device_id, 0,
2580                 sizeof(this_device->device_id));
2581         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2582                 sizeof(this_device->device_id));
2583
2584         if (this_device->devtype == TYPE_DISK &&
2585                 is_logical_dev_addr_mode(scsi3addr)) {
2586                 int volume_offline;
2587
2588                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2589                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2590                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2591                 volume_offline = hpsa_volume_offline(h, scsi3addr);
2592                 if (volume_offline < 0 || volume_offline > 0xff)
2593                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
2594                 this_device->volume_offline = volume_offline & 0xff;
2595         } else {
2596                 this_device->raid_level = RAID_UNKNOWN;
2597                 this_device->offload_config = 0;
2598                 this_device->offload_enabled = 0;
2599                 this_device->volume_offline = 0;
2600         }
2601
2602         if (is_OBDR_device) {
2603                 /* See if this is a One-Button-Disaster-Recovery device
2604                  * by looking for "$DR-10" at offset 43 in inquiry data.
2605                  */
2606                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
2607                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
2608                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
2609                                                 OBDR_SIG_LEN) == 0);
2610         }
2611
2612         kfree(inq_buff);
2613         return 0;
2614
2615 bail_out:
2616         kfree(inq_buff);
2617         return 1;
2618 }
2619
2620 static unsigned char *ext_target_model[] = {
2621         "MSA2012",
2622         "MSA2024",
2623         "MSA2312",
2624         "MSA2324",
2625         "P2000 G3 SAS",
2626         "MSA 2040 SAS",
2627         NULL,
2628 };
2629
2630 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
2631 {
2632         int i;
2633
2634         for (i = 0; ext_target_model[i]; i++)
2635                 if (strncmp(device->model, ext_target_model[i],
2636                         strlen(ext_target_model[i])) == 0)
2637                         return 1;
2638         return 0;
2639 }
2640
2641 /* Helper function to assign bus, target, lun mapping of devices.
2642  * Puts non-external target logical volumes on bus 0, external target logical
2643  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
2644  * Logical drive target and lun are assigned at this time, but
2645  * physical device lun and target assignment are deferred (assigned
2646  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
2647  */
2648 static void figure_bus_target_lun(struct ctlr_info *h,
2649         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
2650 {
2651         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
2652
2653         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
2654                 /* physical device, target and lun filled in later */
2655                 if (is_hba_lunid(lunaddrbytes))
2656                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
2657                 else
2658                         /* defer target, lun assignment for physical devices */
2659                         hpsa_set_bus_target_lun(device, 2, -1, -1);
2660                 return;
2661         }
2662         /* It's a logical device */
2663         if (is_ext_target(h, device)) {
2664                 /* external target way, put logicals on bus 1
2665                  * and match target/lun numbers box
2666                  * reports, other smart array, bus 0, target 0, match lunid
2667                  */
2668                 hpsa_set_bus_target_lun(device,
2669                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
2670                 return;
2671         }
2672         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
2673 }
2674
2675 /*
2676  * If there is no lun 0 on a target, linux won't find any devices.
2677  * For the external targets (arrays), we have to manually detect the enclosure
2678  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
2679  * it for some reason.  *tmpdevice is the target we're adding,
2680  * this_device is a pointer into the current element of currentsd[]
2681  * that we're building up in update_scsi_devices(), below.
2682  * lunzerobits is a bitmap that tracks which targets already have a
2683  * lun 0 assigned.
2684  * Returns 1 if an enclosure was added, 0 if not.
2685  */
2686 static int add_ext_target_dev(struct ctlr_info *h,
2687         struct hpsa_scsi_dev_t *tmpdevice,
2688         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
2689         unsigned long lunzerobits[], int *n_ext_target_devs)
2690 {
2691         unsigned char scsi3addr[8];
2692
2693         if (test_bit(tmpdevice->target, lunzerobits))
2694                 return 0; /* There is already a lun 0 on this target. */
2695
2696         if (!is_logical_dev_addr_mode(lunaddrbytes))
2697                 return 0; /* It's the logical targets that may lack lun 0. */
2698
2699         if (!is_ext_target(h, tmpdevice))
2700                 return 0; /* Only external target devices have this problem. */
2701
2702         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
2703                 return 0;
2704
2705         memset(scsi3addr, 0, 8);
2706         scsi3addr[3] = tmpdevice->target;
2707         if (is_hba_lunid(scsi3addr))
2708                 return 0; /* Don't add the RAID controller here. */
2709
2710         if (is_scsi_rev_5(h))
2711                 return 0; /* p1210m doesn't need to do this. */
2712
2713         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
2714                 dev_warn(&h->pdev->dev, "Maximum number of external "
2715                         "target devices exceeded.  Check your hardware "
2716                         "configuration.");
2717                 return 0;
2718         }
2719
2720         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
2721                 return 0;
2722         (*n_ext_target_devs)++;
2723         hpsa_set_bus_target_lun(this_device,
2724                                 tmpdevice->bus, tmpdevice->target, 0);
2725         set_bit(tmpdevice->target, lunzerobits);
2726         return 1;
2727 }
2728
2729 /*
2730  * Get address of physical disk used for an ioaccel2 mode command:
2731  *      1. Extract ioaccel2 handle from the command.
2732  *      2. Find a matching ioaccel2 handle from list of physical disks.
2733  *      3. Return:
2734  *              1 and set scsi3addr to address of matching physical
2735  *              0 if no matching physical disk was found.
2736  */
2737 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
2738         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
2739 {
2740         struct ReportExtendedLUNdata *physicals = NULL;
2741         int responsesize = 24;  /* size of physical extended response */
2742         int extended = 2;       /* flag forces reporting 'other dev info'. */
2743         int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize;
2744         u32 nphysicals = 0;     /* number of reported physical devs */
2745         int found = 0;          /* found match (1) or not (0) */
2746         u32 find;               /* handle we need to match */
2747         int i;
2748         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
2749         struct hpsa_scsi_dev_t *d; /* device of request being aborted */
2750         struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */
2751         __le32 it_nexus;        /* 4 byte device handle for the ioaccel2 cmd */
2752         __le32 scsi_nexus;      /* 4 byte device handle for the ioaccel2 cmd */
2753
2754         if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2)
2755                 return 0; /* no match */
2756
2757         /* point to the ioaccel2 device handle */
2758         c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
2759         if (c2a == NULL)
2760                 return 0; /* no match */
2761
2762         scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd;
2763         if (scmd == NULL)
2764                 return 0; /* no match */
2765
2766         d = scmd->device->hostdata;
2767         if (d == NULL)
2768                 return 0; /* no match */
2769
2770         it_nexus = cpu_to_le32(d->ioaccel_handle);
2771         scsi_nexus = c2a->scsi_nexus;
2772         find = le32_to_cpu(c2a->scsi_nexus);
2773
2774         if (h->raid_offload_debug > 0)
2775                 dev_info(&h->pdev->dev,
2776                         "%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
2777                         __func__, scsi_nexus,
2778                         d->device_id[0], d->device_id[1], d->device_id[2],
2779                         d->device_id[3], d->device_id[4], d->device_id[5],
2780                         d->device_id[6], d->device_id[7], d->device_id[8],
2781                         d->device_id[9], d->device_id[10], d->device_id[11],
2782                         d->device_id[12], d->device_id[13], d->device_id[14],
2783                         d->device_id[15]);
2784
2785         /* Get the list of physical devices */
2786         physicals = kzalloc(reportsize, GFP_KERNEL);
2787         if (physicals == NULL)
2788                 return 0;
2789         if (hpsa_scsi_do_report_phys_luns(h, (struct ReportLUNdata *) physicals,
2790                 reportsize, extended)) {
2791                 dev_err(&h->pdev->dev,
2792                         "Can't lookup %s device handle: report physical LUNs failed.\n",
2793                         "HP SSD Smart Path");
2794                 kfree(physicals);
2795                 return 0;
2796         }
2797         nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) /
2798                                                         responsesize;
2799
2800         /* find ioaccel2 handle in list of physicals: */
2801         for (i = 0; i < nphysicals; i++) {
2802                 struct ext_report_lun_entry *entry = &physicals->LUN[i];
2803
2804                 /* handle is in bytes 28-31 of each lun */
2805                 if (entry->ioaccel_handle != find)
2806                         continue; /* didn't match */
2807                 found = 1;
2808                 memcpy(scsi3addr, entry->lunid, 8);
2809                 if (h->raid_offload_debug > 0)
2810                         dev_info(&h->pdev->dev,
2811                                 "%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n",
2812                                 __func__, find,
2813                                 entry->ioaccel_handle, scsi3addr);
2814                 break; /* found it */
2815         }
2816
2817         kfree(physicals);
2818         if (found)
2819                 return 1;
2820         else
2821                 return 0;
2822
2823 }
2824 /*
2825  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
2826  * logdev.  The number of luns in physdev and logdev are returned in
2827  * *nphysicals and *nlogicals, respectively.
2828  * Returns 0 on success, -1 otherwise.
2829  */
2830 static int hpsa_gather_lun_info(struct ctlr_info *h,
2831         int reportphyslunsize, int reportloglunsize,
2832         struct ReportLUNdata *physdev, u32 *nphysicals, int *physical_mode,
2833         struct ReportLUNdata *logdev, u32 *nlogicals)
2834 {
2835         int physical_entry_size = 8;
2836
2837         *physical_mode = 0;
2838
2839         /* For I/O accelerator mode we need to read physical device handles */
2840         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
2841                 h->transMethod & CFGTBL_Trans_io_accel2) {
2842                 *physical_mode = HPSA_REPORT_PHYS_EXTENDED;
2843                 physical_entry_size = 24;
2844         }
2845         if (hpsa_scsi_do_report_phys_luns(h, physdev, reportphyslunsize,
2846                                                         *physical_mode)) {
2847                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
2848                 return -1;
2849         }
2850         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) /
2851                                                         physical_entry_size;
2852         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
2853                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
2854                         "  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2855                         *nphysicals - HPSA_MAX_PHYS_LUN);
2856                 *nphysicals = HPSA_MAX_PHYS_LUN;
2857         }
2858         if (hpsa_scsi_do_report_log_luns(h, logdev, reportloglunsize)) {
2859                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
2860                 return -1;
2861         }
2862         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
2863         /* Reject Logicals in excess of our max capability. */
2864         if (*nlogicals > HPSA_MAX_LUN) {
2865                 dev_warn(&h->pdev->dev,
2866                         "maximum logical LUNs (%d) exceeded.  "
2867                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
2868                         *nlogicals - HPSA_MAX_LUN);
2869                         *nlogicals = HPSA_MAX_LUN;
2870         }
2871         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
2872                 dev_warn(&h->pdev->dev,
2873                         "maximum logical + physical LUNs (%d) exceeded. "
2874                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2875                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
2876                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
2877         }
2878         return 0;
2879 }
2880
2881 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
2882         int i, int nphysicals, int nlogicals,
2883         struct ReportExtendedLUNdata *physdev_list,
2884         struct ReportLUNdata *logdev_list)
2885 {
2886         /* Helper function, figure out where the LUN ID info is coming from
2887          * given index i, lists of physical and logical devices, where in
2888          * the list the raid controller is supposed to appear (first or last)
2889          */
2890
2891         int logicals_start = nphysicals + (raid_ctlr_position == 0);
2892         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
2893
2894         if (i == raid_ctlr_position)
2895                 return RAID_CTLR_LUNID;
2896
2897         if (i < logicals_start)
2898                 return &physdev_list->LUN[i -
2899                                 (raid_ctlr_position == 0)].lunid[0];
2900
2901         if (i < last_device)
2902                 return &logdev_list->LUN[i - nphysicals -
2903                         (raid_ctlr_position == 0)][0];
2904         BUG();
2905         return NULL;
2906 }
2907
2908 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
2909 {
2910         int rc;
2911         int hba_mode_enabled;
2912         struct bmic_controller_parameters *ctlr_params;
2913         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
2914                 GFP_KERNEL);
2915
2916         if (!ctlr_params)
2917                 return -ENOMEM;
2918         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
2919                 sizeof(struct bmic_controller_parameters));
2920         if (rc) {
2921                 kfree(ctlr_params);
2922                 return rc;
2923         }
2924
2925         hba_mode_enabled =
2926                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
2927         kfree(ctlr_params);
2928         return hba_mode_enabled;
2929 }
2930
2931 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
2932 {
2933         /* the idea here is we could get notified
2934          * that some devices have changed, so we do a report
2935          * physical luns and report logical luns cmd, and adjust
2936          * our list of devices accordingly.
2937          *
2938          * The scsi3addr's of devices won't change so long as the
2939          * adapter is not reset.  That means we can rescan and
2940          * tell which devices we already know about, vs. new
2941          * devices, vs.  disappearing devices.
2942          */
2943         struct ReportExtendedLUNdata *physdev_list = NULL;
2944         struct ReportLUNdata *logdev_list = NULL;
2945         u32 nphysicals = 0;
2946         u32 nlogicals = 0;
2947         int physical_mode = 0;
2948         u32 ndev_allocated = 0;
2949         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
2950         int ncurrent = 0;
2951         int i, n_ext_target_devs, ndevs_to_allocate;
2952         int raid_ctlr_position;
2953         int rescan_hba_mode;
2954         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
2955
2956         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
2957         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
2958         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
2959         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
2960
2961         if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
2962                 dev_err(&h->pdev->dev, "out of memory\n");
2963                 goto out;
2964         }
2965         memset(lunzerobits, 0, sizeof(lunzerobits));
2966
2967         rescan_hba_mode = hpsa_hba_mode_enabled(h);
2968         if (rescan_hba_mode < 0)
2969                 goto out;
2970
2971         if (!h->hba_mode_enabled && rescan_hba_mode)
2972                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
2973         else if (h->hba_mode_enabled && !rescan_hba_mode)
2974                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
2975
2976         h->hba_mode_enabled = rescan_hba_mode;
2977
2978         if (hpsa_gather_lun_info(h,
2979                         sizeof(*physdev_list), sizeof(*logdev_list),
2980                         (struct ReportLUNdata *) physdev_list, &nphysicals,
2981                         &physical_mode, logdev_list, &nlogicals))
2982                 goto out;
2983
2984         /* We might see up to the maximum number of logical and physical disks
2985          * plus external target devices, and a device for the local RAID
2986          * controller.
2987          */
2988         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
2989
2990         /* Allocate the per device structures */
2991         for (i = 0; i < ndevs_to_allocate; i++) {
2992                 if (i >= HPSA_MAX_DEVICES) {
2993                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
2994                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
2995                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
2996                         break;
2997                 }
2998
2999                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3000                 if (!currentsd[i]) {
3001                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3002                                 __FILE__, __LINE__);
3003                         goto out;
3004                 }
3005                 ndev_allocated++;
3006         }
3007
3008         if (is_scsi_rev_5(h))
3009                 raid_ctlr_position = 0;
3010         else
3011                 raid_ctlr_position = nphysicals + nlogicals;
3012
3013         /* adjust our table of devices */
3014         n_ext_target_devs = 0;
3015         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3016                 u8 *lunaddrbytes, is_OBDR = 0;
3017
3018                 /* Figure out where the LUN ID info is coming from */
3019                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3020                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3021                 /* skip masked physical devices. */
3022                 if (lunaddrbytes[3] & 0xC0 &&
3023                         i < nphysicals + (raid_ctlr_position == 0))
3024                         continue;
3025
3026                 /* Get device type, vendor, model, device id */
3027                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3028                                                         &is_OBDR))
3029                         continue; /* skip it if we can't talk to it. */
3030                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3031                 this_device = currentsd[ncurrent];
3032
3033                 /*
3034                  * For external target devices, we have to insert a LUN 0 which
3035                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3036                  * is nonetheless an enclosure device there.  We have to
3037                  * present that otherwise linux won't find anything if
3038                  * there is no lun 0.
3039                  */
3040                 if (add_ext_target_dev(h, tmpdevice, this_device,
3041                                 lunaddrbytes, lunzerobits,
3042                                 &n_ext_target_devs)) {
3043                         ncurrent++;
3044                         this_device = currentsd[ncurrent];
3045                 }
3046
3047                 *this_device = *tmpdevice;
3048
3049                 switch (this_device->devtype) {
3050                 case TYPE_ROM:
3051                         /* We don't *really* support actual CD-ROM devices,
3052                          * just "One Button Disaster Recovery" tape drive
3053                          * which temporarily pretends to be a CD-ROM drive.
3054                          * So we check that the device is really an OBDR tape
3055                          * device by checking for "$DR-10" in bytes 43-48 of
3056                          * the inquiry data.
3057                          */
3058                         if (is_OBDR)
3059                                 ncurrent++;
3060                         break;
3061                 case TYPE_DISK:
3062                         if (h->hba_mode_enabled) {
3063                                 /* never use raid mapper in HBA mode */
3064                                 this_device->offload_enabled = 0;
3065                                 ncurrent++;
3066                                 break;
3067                         } else if (h->acciopath_status) {
3068                                 if (i >= nphysicals) {
3069                                         ncurrent++;
3070                                         break;
3071                                 }
3072                         } else {
3073                                 if (i < nphysicals)
3074                                         break;
3075                                 ncurrent++;
3076                                 break;
3077                         }
3078                         if (physical_mode == HPSA_REPORT_PHYS_EXTENDED) {
3079                                 memcpy(&this_device->ioaccel_handle,
3080                                         &lunaddrbytes[20],
3081                                         sizeof(this_device->ioaccel_handle));
3082                                 ncurrent++;
3083                         }
3084                         break;
3085                 case TYPE_TAPE:
3086                 case TYPE_MEDIUM_CHANGER:
3087                         ncurrent++;
3088                         break;
3089                 case TYPE_RAID:
3090                         /* Only present the Smartarray HBA as a RAID controller.
3091                          * If it's a RAID controller other than the HBA itself
3092                          * (an external RAID controller, MSA500 or similar)
3093                          * don't present it.
3094                          */
3095                         if (!is_hba_lunid(lunaddrbytes))
3096                                 break;
3097                         ncurrent++;
3098                         break;
3099                 default:
3100                         break;
3101                 }
3102                 if (ncurrent >= HPSA_MAX_DEVICES)
3103                         break;
3104         }
3105         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3106 out:
3107         kfree(tmpdevice);
3108         for (i = 0; i < ndev_allocated; i++)
3109                 kfree(currentsd[i]);
3110         kfree(currentsd);
3111         kfree(physdev_list);
3112         kfree(logdev_list);
3113 }
3114
3115 /*
3116  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3117  * dma mapping  and fills in the scatter gather entries of the
3118  * hpsa command, cp.
3119  */
3120 static int hpsa_scatter_gather(struct ctlr_info *h,
3121                 struct CommandList *cp,
3122                 struct scsi_cmnd *cmd)
3123 {
3124         unsigned int len;
3125         struct scatterlist *sg;
3126         u64 addr64;
3127         int use_sg, i, sg_index, chained;
3128         struct SGDescriptor *curr_sg;
3129
3130         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3131
3132         use_sg = scsi_dma_map(cmd);
3133         if (use_sg < 0)
3134                 return use_sg;
3135
3136         if (!use_sg)
3137                 goto sglist_finished;
3138
3139         curr_sg = cp->SG;
3140         chained = 0;
3141         sg_index = 0;
3142         scsi_for_each_sg(cmd, sg, use_sg, i) {
3143                 if (i == h->max_cmd_sg_entries - 1 &&
3144                         use_sg > h->max_cmd_sg_entries) {
3145                         chained = 1;
3146                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3147                         sg_index = 0;
3148                 }
3149                 addr64 = (u64) sg_dma_address(sg);
3150                 len  = sg_dma_len(sg);
3151                 curr_sg->Addr = cpu_to_le64(addr64);
3152                 curr_sg->Len = cpu_to_le32(len);
3153                 curr_sg->Ext = cpu_to_le32(0);
3154                 curr_sg++;
3155         }
3156         (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3157
3158         if (use_sg + chained > h->maxSG)
3159                 h->maxSG = use_sg + chained;
3160
3161         if (chained) {
3162                 cp->Header.SGList = h->max_cmd_sg_entries;
3163                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3164                 if (hpsa_map_sg_chain_block(h, cp)) {
3165                         scsi_dma_unmap(cmd);
3166                         return -1;
3167                 }
3168                 return 0;
3169         }
3170
3171 sglist_finished:
3172
3173         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3174         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3175         return 0;
3176 }
3177
3178 #define IO_ACCEL_INELIGIBLE (1)
3179 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3180 {
3181         int is_write = 0;
3182         u32 block;
3183         u32 block_cnt;
3184
3185         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3186         switch (cdb[0]) {
3187         case WRITE_6:
3188         case WRITE_12:
3189                 is_write = 1;
3190         case READ_6:
3191         case READ_12:
3192                 if (*cdb_len == 6) {
3193                         block = (((u32) cdb[2]) << 8) | cdb[3];
3194                         block_cnt = cdb[4];
3195                 } else {
3196                         BUG_ON(*cdb_len != 12);
3197                         block = (((u32) cdb[2]) << 24) |
3198                                 (((u32) cdb[3]) << 16) |
3199                                 (((u32) cdb[4]) << 8) |
3200                                 cdb[5];
3201                         block_cnt =
3202                                 (((u32) cdb[6]) << 24) |
3203                                 (((u32) cdb[7]) << 16) |
3204                                 (((u32) cdb[8]) << 8) |
3205                                 cdb[9];
3206                 }
3207                 if (block_cnt > 0xffff)
3208                         return IO_ACCEL_INELIGIBLE;
3209
3210                 cdb[0] = is_write ? WRITE_10 : READ_10;
3211                 cdb[1] = 0;
3212                 cdb[2] = (u8) (block >> 24);
3213                 cdb[3] = (u8) (block >> 16);
3214                 cdb[4] = (u8) (block >> 8);
3215                 cdb[5] = (u8) (block);
3216                 cdb[6] = 0;
3217                 cdb[7] = (u8) (block_cnt >> 8);
3218                 cdb[8] = (u8) (block_cnt);
3219                 cdb[9] = 0;
3220                 *cdb_len = 10;
3221                 break;
3222         }
3223         return 0;
3224 }
3225
3226 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3227         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3228         u8 *scsi3addr)
3229 {
3230         struct scsi_cmnd *cmd = c->scsi_cmd;
3231         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3232         unsigned int len;
3233         unsigned int total_len = 0;
3234         struct scatterlist *sg;
3235         u64 addr64;
3236         int use_sg, i;
3237         struct SGDescriptor *curr_sg;
3238         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3239
3240         /* TODO: implement chaining support */
3241         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3242                 return IO_ACCEL_INELIGIBLE;
3243
3244         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3245
3246         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3247                 return IO_ACCEL_INELIGIBLE;
3248
3249         c->cmd_type = CMD_IOACCEL1;
3250
3251         /* Adjust the DMA address to point to the accelerated command buffer */
3252         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3253                                 (c->cmdindex * sizeof(*cp));
3254         BUG_ON(c->busaddr & 0x0000007F);
3255
3256         use_sg = scsi_dma_map(cmd);
3257         if (use_sg < 0)
3258                 return use_sg;
3259
3260         if (use_sg) {
3261                 curr_sg = cp->SG;
3262                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3263                         addr64 = (u64) sg_dma_address(sg);
3264                         len  = sg_dma_len(sg);
3265                         total_len += len;
3266                         curr_sg->Addr = cpu_to_le64(addr64);
3267                         curr_sg->Len = cpu_to_le32(len);
3268                         curr_sg->Ext = cpu_to_le32(0);
3269                         curr_sg++;
3270                 }
3271                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3272
3273                 switch (cmd->sc_data_direction) {
3274                 case DMA_TO_DEVICE:
3275                         control |= IOACCEL1_CONTROL_DATA_OUT;
3276                         break;
3277                 case DMA_FROM_DEVICE:
3278                         control |= IOACCEL1_CONTROL_DATA_IN;
3279                         break;
3280                 case DMA_NONE:
3281                         control |= IOACCEL1_CONTROL_NODATAXFER;
3282                         break;
3283                 default:
3284                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3285                         cmd->sc_data_direction);
3286                         BUG();
3287                         break;
3288                 }
3289         } else {
3290                 control |= IOACCEL1_CONTROL_NODATAXFER;
3291         }
3292
3293         c->Header.SGList = use_sg;
3294         /* Fill out the command structure to submit */
3295         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
3296         cp->transfer_len = cpu_to_le32(total_len);
3297         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
3298                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
3299         cp->control = cpu_to_le32(control);
3300         memcpy(cp->CDB, cdb, cdb_len);
3301         memcpy(cp->CISS_LUN, scsi3addr, 8);
3302         /* Tag was already set at init time. */
3303         enqueue_cmd_and_start_io(h, c);
3304         return 0;
3305 }
3306
3307 /*
3308  * Queue a command directly to a device behind the controller using the
3309  * I/O accelerator path.
3310  */
3311 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3312         struct CommandList *c)
3313 {
3314         struct scsi_cmnd *cmd = c->scsi_cmd;
3315         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3316
3317         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3318                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr);
3319 }
3320
3321 /*
3322  * Set encryption parameters for the ioaccel2 request
3323  */
3324 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3325         struct CommandList *c, struct io_accel2_cmd *cp)
3326 {
3327         struct scsi_cmnd *cmd = c->scsi_cmd;
3328         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3329         struct raid_map_data *map = &dev->raid_map;
3330         u64 first_block;
3331
3332         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3333
3334         /* Are we doing encryption on this device */
3335         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3336                 return;
3337         /* Set the data encryption key index. */
3338         cp->dekindex = map->dekindex;
3339
3340         /* Set the encryption enable flag, encoded into direction field. */
3341         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3342
3343         /* Set encryption tweak values based on logical block address
3344          * If block size is 512, tweak value is LBA.
3345          * For other block sizes, tweak is (LBA * block size)/ 512)
3346          */
3347         switch (cmd->cmnd[0]) {
3348         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3349         case WRITE_6:
3350         case READ_6:
3351                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
3352                 break;
3353         case WRITE_10:
3354         case READ_10:
3355         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3356         case WRITE_12:
3357         case READ_12:
3358                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
3359                 break;
3360         case WRITE_16:
3361         case READ_16:
3362                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
3363                 break;
3364         default:
3365                 dev_err(&h->pdev->dev,
3366                         "ERROR: %s: size (0x%x) not supported for encryption\n",
3367                         __func__, cmd->cmnd[0]);
3368                 BUG();
3369                 break;
3370         }
3371
3372         if (le32_to_cpu(map->volume_blk_size) != 512)
3373                 first_block = first_block *
3374                                 le32_to_cpu(map->volume_blk_size)/512;
3375
3376         cp->tweak_lower = cpu_to_le32(first_block);
3377         cp->tweak_upper = cpu_to_le32(first_block >> 32);
3378 }
3379
3380 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3381         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3382         u8 *scsi3addr)
3383 {
3384         struct scsi_cmnd *cmd = c->scsi_cmd;
3385         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3386         struct ioaccel2_sg_element *curr_sg;
3387         int use_sg, i;
3388         struct scatterlist *sg;
3389         u64 addr64;
3390         u32 len;
3391         u32 total_len = 0;
3392
3393         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3394                 return IO_ACCEL_INELIGIBLE;
3395
3396         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3397                 return IO_ACCEL_INELIGIBLE;
3398         c->cmd_type = CMD_IOACCEL2;
3399         /* Adjust the DMA address to point to the accelerated command buffer */
3400         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3401                                 (c->cmdindex * sizeof(*cp));
3402         BUG_ON(c->busaddr & 0x0000007F);
3403
3404         memset(cp, 0, sizeof(*cp));
3405         cp->IU_type = IOACCEL2_IU_TYPE;
3406
3407         use_sg = scsi_dma_map(cmd);
3408         if (use_sg < 0)
3409                 return use_sg;
3410
3411         if (use_sg) {
3412                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3413                 curr_sg = cp->sg;
3414                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3415                         addr64 = (u64) sg_dma_address(sg);
3416                         len  = sg_dma_len(sg);
3417                         total_len += len;
3418                         curr_sg->address = cpu_to_le64(addr64);
3419                         curr_sg->length = cpu_to_le32(len);
3420                         curr_sg->reserved[0] = 0;
3421                         curr_sg->reserved[1] = 0;
3422                         curr_sg->reserved[2] = 0;
3423                         curr_sg->chain_indicator = 0;
3424                         curr_sg++;
3425                 }
3426
3427                 switch (cmd->sc_data_direction) {
3428                 case DMA_TO_DEVICE:
3429                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3430                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3431                         break;
3432                 case DMA_FROM_DEVICE:
3433                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3434                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3435                         break;
3436                 case DMA_NONE:
3437                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3438                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3439                         break;
3440                 default:
3441                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3442                                 cmd->sc_data_direction);
3443                         BUG();
3444                         break;
3445                 }
3446         } else {
3447                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3448                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3449         }
3450
3451         /* Set encryption parameters, if necessary */
3452         set_encrypt_ioaccel2(h, c, cp);
3453
3454         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
3455         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT |
3456                                 DIRECT_LOOKUP_BIT);
3457         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3458
3459         /* fill in sg elements */
3460         cp->sg_count = (u8) use_sg;
3461
3462         cp->data_len = cpu_to_le32(total_len);
3463         cp->err_ptr = cpu_to_le64(c->busaddr +
3464                         offsetof(struct io_accel2_cmd, error_data));
3465         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3466
3467         enqueue_cmd_and_start_io(h, c);
3468         return 0;
3469 }
3470
3471 /*
3472  * Queue a command to the correct I/O accelerator path.
3473  */
3474 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3475         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3476         u8 *scsi3addr)
3477 {
3478         if (h->transMethod & CFGTBL_Trans_io_accel1)
3479                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3480                                                 cdb, cdb_len, scsi3addr);
3481         else
3482                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3483                                                 cdb, cdb_len, scsi3addr);
3484 }
3485
3486 static void raid_map_helper(struct raid_map_data *map,
3487                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3488 {
3489         if (offload_to_mirror == 0)  {
3490                 /* use physical disk in the first mirrored group. */
3491                 *map_index %= le16_to_cpu(map->data_disks_per_row);
3492                 return;
3493         }
3494         do {
3495                 /* determine mirror group that *map_index indicates */
3496                 *current_group = *map_index /
3497                         le16_to_cpu(map->data_disks_per_row);
3498                 if (offload_to_mirror == *current_group)
3499                         continue;
3500                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
3501                         /* select map index from next group */
3502                         *map_index += le16_to_cpu(map->data_disks_per_row);
3503                         (*current_group)++;
3504                 } else {
3505                         /* select map index from first group */
3506                         *map_index %= le16_to_cpu(map->data_disks_per_row);
3507                         *current_group = 0;
3508                 }
3509         } while (offload_to_mirror != *current_group);
3510 }
3511
3512 /*
3513  * Attempt to perform offload RAID mapping for a logical volume I/O.
3514  */
3515 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3516         struct CommandList *c)
3517 {
3518         struct scsi_cmnd *cmd = c->scsi_cmd;
3519         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3520         struct raid_map_data *map = &dev->raid_map;
3521         struct raid_map_disk_data *dd = &map->data[0];
3522         int is_write = 0;
3523         u32 map_index;
3524         u64 first_block, last_block;
3525         u32 block_cnt;
3526         u32 blocks_per_row;
3527         u64 first_row, last_row;
3528         u32 first_row_offset, last_row_offset;
3529         u32 first_column, last_column;
3530         u64 r0_first_row, r0_last_row;
3531         u32 r5or6_blocks_per_row;
3532         u64 r5or6_first_row, r5or6_last_row;
3533         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3534         u32 r5or6_first_column, r5or6_last_column;
3535         u32 total_disks_per_row;
3536         u32 stripesize;
3537         u32 first_group, last_group, current_group;
3538         u32 map_row;
3539         u32 disk_handle;
3540         u64 disk_block;
3541         u32 disk_block_cnt;
3542         u8 cdb[16];
3543         u8 cdb_len;
3544         u16 strip_size;
3545 #if BITS_PER_LONG == 32
3546         u64 tmpdiv;
3547 #endif
3548         int offload_to_mirror;
3549
3550         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3551
3552         /* check for valid opcode, get LBA and block count */
3553         switch (cmd->cmnd[0]) {
3554         case WRITE_6:
3555                 is_write = 1;
3556         case READ_6:
3557                 first_block =
3558                         (((u64) cmd->cmnd[2]) << 8) |
3559                         cmd->cmnd[3];
3560                 block_cnt = cmd->cmnd[4];
3561                 if (block_cnt == 0)
3562                         block_cnt = 256;
3563                 break;
3564         case WRITE_10:
3565                 is_write = 1;
3566         case READ_10:
3567                 first_block =
3568                         (((u64) cmd->cmnd[2]) << 24) |
3569                         (((u64) cmd->cmnd[3]) << 16) |
3570                         (((u64) cmd->cmnd[4]) << 8) |
3571                         cmd->cmnd[5];
3572                 block_cnt =
3573                         (((u32) cmd->cmnd[7]) << 8) |
3574                         cmd->cmnd[8];
3575                 break;
3576         case WRITE_12:
3577                 is_write = 1;
3578         case READ_12:
3579                 first_block =
3580                         (((u64) cmd->cmnd[2]) << 24) |
3581                         (((u64) cmd->cmnd[3]) << 16) |
3582                         (((u64) cmd->cmnd[4]) << 8) |
3583                         cmd->cmnd[5];
3584                 block_cnt =
3585                         (((u32) cmd->cmnd[6]) << 24) |
3586                         (((u32) cmd->cmnd[7]) << 16) |
3587                         (((u32) cmd->cmnd[8]) << 8) |
3588                 cmd->cmnd[9];
3589                 break;
3590         case WRITE_16:
3591                 is_write = 1;
3592         case READ_16:
3593                 first_block =
3594                         (((u64) cmd->cmnd[2]) << 56) |
3595                         (((u64) cmd->cmnd[3]) << 48) |
3596                         (((u64) cmd->cmnd[4]) << 40) |
3597                         (((u64) cmd->cmnd[5]) << 32) |
3598                         (((u64) cmd->cmnd[6]) << 24) |
3599                         (((u64) cmd->cmnd[7]) << 16) |
3600                         (((u64) cmd->cmnd[8]) << 8) |
3601                         cmd->cmnd[9];
3602                 block_cnt =
3603                         (((u32) cmd->cmnd[10]) << 24) |
3604                         (((u32) cmd->cmnd[11]) << 16) |
3605                         (((u32) cmd->cmnd[12]) << 8) |
3606                         cmd->cmnd[13];
3607                 break;
3608         default:
3609                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
3610         }
3611         last_block = first_block + block_cnt - 1;
3612
3613         /* check for write to non-RAID-0 */
3614         if (is_write && dev->raid_level != 0)
3615                 return IO_ACCEL_INELIGIBLE;
3616
3617         /* check for invalid block or wraparound */
3618         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
3619                 last_block < first_block)
3620                 return IO_ACCEL_INELIGIBLE;
3621
3622         /* calculate stripe information for the request */
3623         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
3624                                 le16_to_cpu(map->strip_size);
3625         strip_size = le16_to_cpu(map->strip_size);
3626 #if BITS_PER_LONG == 32
3627         tmpdiv = first_block;
3628         (void) do_div(tmpdiv, blocks_per_row);
3629         first_row = tmpdiv;
3630         tmpdiv = last_block;
3631         (void) do_div(tmpdiv, blocks_per_row);
3632         last_row = tmpdiv;
3633         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3634         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3635         tmpdiv = first_row_offset;
3636         (void) do_div(tmpdiv, strip_size);
3637         first_column = tmpdiv;
3638         tmpdiv = last_row_offset;
3639         (void) do_div(tmpdiv, strip_size);
3640         last_column = tmpdiv;
3641 #else
3642         first_row = first_block / blocks_per_row;
3643         last_row = last_block / blocks_per_row;
3644         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3645         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3646         first_column = first_row_offset / strip_size;
3647         last_column = last_row_offset / strip_size;
3648 #endif
3649
3650         /* if this isn't a single row/column then give to the controller */
3651         if ((first_row != last_row) || (first_column != last_column))
3652                 return IO_ACCEL_INELIGIBLE;
3653
3654         /* proceeding with driver mapping */
3655         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
3656                                 le16_to_cpu(map->metadata_disks_per_row);
3657         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3658                                 le16_to_cpu(map->row_cnt);
3659         map_index = (map_row * total_disks_per_row) + first_column;
3660
3661         switch (dev->raid_level) {
3662         case HPSA_RAID_0:
3663                 break; /* nothing special to do */
3664         case HPSA_RAID_1:
3665                 /* Handles load balance across RAID 1 members.
3666                  * (2-drive R1 and R10 with even # of drives.)
3667                  * Appropriate for SSDs, not optimal for HDDs
3668                  */
3669                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
3670                 if (dev->offload_to_mirror)
3671                         map_index += le16_to_cpu(map->data_disks_per_row);
3672                 dev->offload_to_mirror = !dev->offload_to_mirror;
3673                 break;
3674         case HPSA_RAID_ADM:
3675                 /* Handles N-way mirrors  (R1-ADM)
3676                  * and R10 with # of drives divisible by 3.)
3677                  */
3678                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
3679
3680                 offload_to_mirror = dev->offload_to_mirror;
3681                 raid_map_helper(map, offload_to_mirror,
3682                                 &map_index, &current_group);
3683                 /* set mirror group to use next time */
3684                 offload_to_mirror =
3685                         (offload_to_mirror >=
3686                         le16_to_cpu(map->layout_map_count) - 1)
3687                         ? 0 : offload_to_mirror + 1;
3688                 dev->offload_to_mirror = offload_to_mirror;
3689                 /* Avoid direct use of dev->offload_to_mirror within this
3690                  * function since multiple threads might simultaneously
3691                  * increment it beyond the range of dev->layout_map_count -1.
3692                  */
3693                 break;
3694         case HPSA_RAID_5:
3695         case HPSA_RAID_6:
3696                 if (le16_to_cpu(map->layout_map_count) <= 1)
3697                         break;
3698
3699                 /* Verify first and last block are in same RAID group */
3700                 r5or6_blocks_per_row =
3701                         le16_to_cpu(map->strip_size) *
3702                         le16_to_cpu(map->data_disks_per_row);
3703                 BUG_ON(r5or6_blocks_per_row == 0);
3704                 stripesize = r5or6_blocks_per_row *
3705                         le16_to_cpu(map->layout_map_count);
3706 #if BITS_PER_LONG == 32
3707                 tmpdiv = first_block;
3708                 first_group = do_div(tmpdiv, stripesize);
3709                 tmpdiv = first_group;
3710                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3711                 first_group = tmpdiv;
3712                 tmpdiv = last_block;
3713                 last_group = do_div(tmpdiv, stripesize);
3714                 tmpdiv = last_group;
3715                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3716                 last_group = tmpdiv;
3717 #else
3718                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
3719                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
3720 #endif
3721                 if (first_group != last_group)
3722                         return IO_ACCEL_INELIGIBLE;
3723
3724                 /* Verify request is in a single row of RAID 5/6 */
3725 #if BITS_PER_LONG == 32
3726                 tmpdiv = first_block;
3727                 (void) do_div(tmpdiv, stripesize);
3728                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
3729                 tmpdiv = last_block;
3730                 (void) do_div(tmpdiv, stripesize);
3731                 r5or6_last_row = r0_last_row = tmpdiv;
3732 #else
3733                 first_row = r5or6_first_row = r0_first_row =
3734                                                 first_block / stripesize;
3735                 r5or6_last_row = r0_last_row = last_block / stripesize;
3736 #endif
3737                 if (r5or6_first_row != r5or6_last_row)
3738                         return IO_ACCEL_INELIGIBLE;
3739
3740
3741                 /* Verify request is in a single column */
3742 #if BITS_PER_LONG == 32
3743                 tmpdiv = first_block;
3744                 first_row_offset = do_div(tmpdiv, stripesize);
3745                 tmpdiv = first_row_offset;
3746                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
3747                 r5or6_first_row_offset = first_row_offset;
3748                 tmpdiv = last_block;
3749                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
3750                 tmpdiv = r5or6_last_row_offset;
3751                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
3752                 tmpdiv = r5or6_first_row_offset;
3753                 (void) do_div(tmpdiv, map->strip_size);
3754                 first_column = r5or6_first_column = tmpdiv;
3755                 tmpdiv = r5or6_last_row_offset;
3756                 (void) do_div(tmpdiv, map->strip_size);
3757                 r5or6_last_column = tmpdiv;
3758 #else
3759                 first_row_offset = r5or6_first_row_offset =
3760                         (u32)((first_block % stripesize) %
3761                                                 r5or6_blocks_per_row);
3762
3763                 r5or6_last_row_offset =
3764                         (u32)((last_block % stripesize) %
3765                                                 r5or6_blocks_per_row);
3766
3767                 first_column = r5or6_first_column =
3768                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
3769                 r5or6_last_column =
3770                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
3771 #endif
3772                 if (r5or6_first_column != r5or6_last_column)
3773                         return IO_ACCEL_INELIGIBLE;
3774
3775                 /* Request is eligible */
3776                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3777                         le16_to_cpu(map->row_cnt);
3778
3779                 map_index = (first_group *
3780                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
3781                         (map_row * total_disks_per_row) + first_column;
3782                 break;
3783         default:
3784                 return IO_ACCEL_INELIGIBLE;
3785         }
3786
3787         disk_handle = dd[map_index].ioaccel_handle;
3788         disk_block = le64_to_cpu(map->disk_starting_blk) +
3789                         first_row * le16_to_cpu(map->strip_size) +
3790                         (first_row_offset - first_column *
3791                         le16_to_cpu(map->strip_size));
3792         disk_block_cnt = block_cnt;
3793
3794         /* handle differing logical/physical block sizes */
3795         if (map->phys_blk_shift) {
3796                 disk_block <<= map->phys_blk_shift;
3797                 disk_block_cnt <<= map->phys_blk_shift;
3798         }
3799         BUG_ON(disk_block_cnt > 0xffff);
3800
3801         /* build the new CDB for the physical disk I/O */
3802         if (disk_block > 0xffffffff) {
3803                 cdb[0] = is_write ? WRITE_16 : READ_16;
3804                 cdb[1] = 0;
3805                 cdb[2] = (u8) (disk_block >> 56);
3806                 cdb[3] = (u8) (disk_block >> 48);
3807                 cdb[4] = (u8) (disk_block >> 40);
3808                 cdb[5] = (u8) (disk_block >> 32);
3809                 cdb[6] = (u8) (disk_block >> 24);
3810                 cdb[7] = (u8) (disk_block >> 16);
3811                 cdb[8] = (u8) (disk_block >> 8);
3812                 cdb[9] = (u8) (disk_block);
3813                 cdb[10] = (u8) (disk_block_cnt >> 24);
3814                 cdb[11] = (u8) (disk_block_cnt >> 16);
3815                 cdb[12] = (u8) (disk_block_cnt >> 8);
3816                 cdb[13] = (u8) (disk_block_cnt);
3817                 cdb[14] = 0;
3818                 cdb[15] = 0;
3819                 cdb_len = 16;
3820         } else {
3821                 cdb[0] = is_write ? WRITE_10 : READ_10;
3822                 cdb[1] = 0;
3823                 cdb[2] = (u8) (disk_block >> 24);
3824                 cdb[3] = (u8) (disk_block >> 16);
3825                 cdb[4] = (u8) (disk_block >> 8);
3826                 cdb[5] = (u8) (disk_block);
3827                 cdb[6] = 0;
3828                 cdb[7] = (u8) (disk_block_cnt >> 8);
3829                 cdb[8] = (u8) (disk_block_cnt);
3830                 cdb[9] = 0;
3831                 cdb_len = 10;
3832         }
3833         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
3834                                                 dev->scsi3addr);
3835 }
3836
3837 /*
3838  * Running in struct Scsi_Host->host_lock less mode using LLD internal
3839  * struct ctlr_info *h->lock w/ spin_lock_irqsave() protection.
3840  */
3841 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
3842 {
3843         struct ctlr_info *h;
3844         struct hpsa_scsi_dev_t *dev;
3845         unsigned char scsi3addr[8];
3846         struct CommandList *c;
3847         int rc = 0;
3848
3849         /* Get the ptr to our adapter structure out of cmd->host. */
3850         h = sdev_to_hba(cmd->device);
3851         dev = cmd->device->hostdata;
3852         if (!dev) {
3853                 cmd->result = DID_NO_CONNECT << 16;
3854                 cmd->scsi_done(cmd);
3855                 return 0;
3856         }
3857         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
3858
3859         if (unlikely(lockup_detected(h))) {
3860                 cmd->result = DID_ERROR << 16;
3861                 cmd->scsi_done(cmd);
3862                 return 0;
3863         }
3864         c = cmd_alloc(h);
3865         if (c == NULL) {                        /* trouble... */
3866                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
3867                 return SCSI_MLQUEUE_HOST_BUSY;
3868         }
3869
3870         /* Fill in the command list header */
3871         /* save c in case we have to abort it  */
3872         cmd->host_scribble = (unsigned char *) c;
3873
3874         c->cmd_type = CMD_SCSI;
3875         c->scsi_cmd = cmd;
3876
3877         /* Call alternate submit routine for I/O accelerated commands.
3878          * Retries always go down the normal I/O path.
3879          */
3880         if (likely(cmd->retries == 0 &&
3881                 cmd->request->cmd_type == REQ_TYPE_FS &&
3882                 h->acciopath_status)) {
3883                 if (dev->offload_enabled) {
3884                         rc = hpsa_scsi_ioaccel_raid_map(h, c);
3885                         if (rc == 0)
3886                                 return 0; /* Sent on ioaccel path */
3887                         if (rc < 0) {   /* scsi_dma_map failed. */
3888                                 cmd_free(h, c);
3889                                 return SCSI_MLQUEUE_HOST_BUSY;
3890                         }
3891                 } else if (dev->ioaccel_handle) {
3892                         rc = hpsa_scsi_ioaccel_direct_map(h, c);
3893                         if (rc == 0)
3894                                 return 0; /* Sent on direct map path */
3895                         if (rc < 0) {   /* scsi_dma_map failed. */
3896                                 cmd_free(h, c);
3897                                 return SCSI_MLQUEUE_HOST_BUSY;
3898                         }
3899                 }
3900         }
3901
3902         c->Header.ReplyQueue = 0;  /* unused in simple mode */
3903         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
3904         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT) |
3905                                         DIRECT_LOOKUP_BIT);
3906
3907         /* Fill in the request block... */
3908
3909         c->Request.Timeout = 0;
3910         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
3911         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
3912         c->Request.CDBLen = cmd->cmd_len;
3913         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
3914         switch (cmd->sc_data_direction) {
3915         case DMA_TO_DEVICE:
3916                 c->Request.type_attr_dir =
3917                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
3918                 break;
3919         case DMA_FROM_DEVICE:
3920                 c->Request.type_attr_dir =
3921                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
3922                 break;
3923         case DMA_NONE:
3924                 c->Request.type_attr_dir =
3925                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
3926                 break;
3927         case DMA_BIDIRECTIONAL:
3928                 /* This can happen if a buggy application does a scsi passthru
3929                  * and sets both inlen and outlen to non-zero. ( see
3930                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
3931                  */
3932
3933                 c->Request.type_attr_dir =
3934                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
3935                 /* This is technically wrong, and hpsa controllers should
3936                  * reject it with CMD_INVALID, which is the most correct
3937                  * response, but non-fibre backends appear to let it
3938                  * slide by, and give the same results as if this field
3939                  * were set correctly.  Either way is acceptable for
3940                  * our purposes here.
3941                  */
3942
3943                 break;
3944
3945         default:
3946                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3947                         cmd->sc_data_direction);
3948                 BUG();
3949                 break;
3950         }
3951
3952         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
3953                 cmd_free(h, c);
3954                 return SCSI_MLQUEUE_HOST_BUSY;
3955         }
3956         enqueue_cmd_and_start_io(h, c);
3957         /* the cmd'll come back via intr handler in complete_scsi_command()  */
3958         return 0;
3959 }
3960
3961 static int do_not_scan_if_controller_locked_up(struct ctlr_info *h)
3962 {
3963         unsigned long flags;
3964
3965         /*
3966          * Don't let rescans be initiated on a controller known
3967          * to be locked up.  If the controller locks up *during*
3968          * a rescan, that thread is probably hosed, but at least
3969          * we can prevent new rescan threads from piling up on a
3970          * locked up controller.
3971          */
3972         if (unlikely(lockup_detected(h))) {
3973                 spin_lock_irqsave(&h->scan_lock, flags);
3974                 h->scan_finished = 1;
3975                 wake_up_all(&h->scan_wait_queue);
3976                 spin_unlock_irqrestore(&h->scan_lock, flags);
3977                 return 1;
3978         }
3979         return 0;
3980 }
3981
3982 static void hpsa_scan_start(struct Scsi_Host *sh)
3983 {
3984         struct ctlr_info *h = shost_to_hba(sh);
3985         unsigned long flags;
3986
3987         if (do_not_scan_if_controller_locked_up(h))
3988                 return;
3989
3990         /* wait until any scan already in progress is finished. */
3991         while (1) {
3992                 spin_lock_irqsave(&h->scan_lock, flags);
3993                 if (h->scan_finished)
3994                         break;
3995                 spin_unlock_irqrestore(&h->scan_lock, flags);
3996                 wait_event(h->scan_wait_queue, h->scan_finished);
3997                 /* Note: We don't need to worry about a race between this
3998                  * thread and driver unload because the midlayer will
3999                  * have incremented the reference count, so unload won't
4000                  * happen if we're in here.
4001                  */
4002         }
4003         h->scan_finished = 0; /* mark scan as in progress */
4004         spin_unlock_irqrestore(&h->scan_lock, flags);
4005
4006         if (do_not_scan_if_controller_locked_up(h))
4007                 return;
4008
4009         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4010
4011         spin_lock_irqsave(&h->scan_lock, flags);
4012         h->scan_finished = 1; /* mark scan as finished. */
4013         wake_up_all(&h->scan_wait_queue);
4014         spin_unlock_irqrestore(&h->scan_lock, flags);
4015 }
4016
4017 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4018 {
4019         struct ctlr_info *h = sdev_to_hba(sdev);
4020
4021         if (qdepth < 1)
4022                 qdepth = 1;
4023         else
4024                 if (qdepth > h->nr_cmds)
4025                         qdepth = h->nr_cmds;
4026         scsi_change_queue_depth(sdev, qdepth);
4027         return sdev->queue_depth;
4028 }
4029
4030 static int hpsa_scan_finished(struct Scsi_Host *sh,
4031         unsigned long elapsed_time)
4032 {
4033         struct ctlr_info *h = shost_to_hba(sh);
4034         unsigned long flags;
4035         int finished;
4036
4037         spin_lock_irqsave(&h->scan_lock, flags);
4038         finished = h->scan_finished;
4039         spin_unlock_irqrestore(&h->scan_lock, flags);
4040         return finished;
4041 }
4042
4043 static void hpsa_unregister_scsi(struct ctlr_info *h)
4044 {
4045         /* we are being forcibly unloaded, and may not refuse. */
4046         scsi_remove_host(h->scsi_host);
4047         scsi_host_put(h->scsi_host);
4048         h->scsi_host = NULL;
4049 }
4050
4051 static int hpsa_register_scsi(struct ctlr_info *h)
4052 {
4053         struct Scsi_Host *sh;
4054         int error;
4055
4056         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4057         if (sh == NULL)
4058                 goto fail;
4059
4060         sh->io_port = 0;
4061         sh->n_io_port = 0;
4062         sh->this_id = -1;
4063         sh->max_channel = 3;
4064         sh->max_cmd_len = MAX_COMMAND_SIZE;
4065         sh->max_lun = HPSA_MAX_LUN;
4066         sh->max_id = HPSA_MAX_LUN;
4067         sh->can_queue = h->nr_cmds;
4068         if (h->hba_mode_enabled)
4069                 sh->cmd_per_lun = 7;
4070         else
4071                 sh->cmd_per_lun = h->nr_cmds;
4072         sh->sg_tablesize = h->maxsgentries;
4073         h->scsi_host = sh;
4074         sh->hostdata[0] = (unsigned long) h;
4075         sh->irq = h->intr[h->intr_mode];
4076         sh->unique_id = sh->irq;
4077         error = scsi_add_host(sh, &h->pdev->dev);
4078         if (error)
4079                 goto fail_host_put;
4080         scsi_scan_host(sh);
4081         return 0;
4082
4083  fail_host_put:
4084         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4085                 " failed for controller %d\n", __func__, h->ctlr);
4086         scsi_host_put(sh);
4087         return error;
4088  fail:
4089         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4090                 " failed for controller %d\n", __func__, h->ctlr);
4091         return -ENOMEM;
4092 }
4093
4094 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4095         unsigned char lunaddr[])
4096 {
4097         int rc;
4098         int count = 0;
4099         int waittime = 1; /* seconds */
4100         struct CommandList *c;
4101
4102         c = cmd_special_alloc(h);
4103         if (!c) {
4104                 dev_warn(&h->pdev->dev, "out of memory in "
4105                         "wait_for_device_to_become_ready.\n");
4106                 return IO_ERROR;
4107         }
4108
4109         /* Send test unit ready until device ready, or give up. */
4110         while (count < HPSA_TUR_RETRY_LIMIT) {
4111
4112                 /* Wait for a bit.  do this first, because if we send
4113                  * the TUR right away, the reset will just abort it.
4114                  */
4115                 msleep(1000 * waittime);
4116                 count++;
4117                 rc = 0; /* Device ready. */
4118
4119                 /* Increase wait time with each try, up to a point. */
4120                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4121                         waittime = waittime * 2;
4122
4123                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4124                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4125                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4126                 hpsa_scsi_do_simple_cmd_core(h, c);
4127                 /* no unmap needed here because no data xfer. */
4128
4129                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4130                         break;
4131
4132                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4133                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4134                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4135                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4136                         break;
4137
4138                 dev_warn(&h->pdev->dev, "waiting %d secs "
4139                         "for device to become ready.\n", waittime);
4140                 rc = 1; /* device not ready. */
4141         }
4142
4143         if (rc)
4144                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4145         else
4146                 dev_warn(&h->pdev->dev, "device is ready.\n");
4147
4148         cmd_special_free(h, c);
4149         return rc;
4150 }
4151
4152 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4153  * complaining.  Doing a host- or bus-reset can't do anything good here.
4154  */
4155 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4156 {
4157         int rc;
4158         struct ctlr_info *h;
4159         struct hpsa_scsi_dev_t *dev;
4160
4161         /* find the controller to which the command to be aborted was sent */
4162         h = sdev_to_hba(scsicmd->device);
4163         if (h == NULL) /* paranoia */
4164                 return FAILED;
4165         dev = scsicmd->device->hostdata;
4166         if (!dev) {
4167                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4168                         "device lookup failed.\n");
4169                 return FAILED;
4170         }
4171         dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
4172                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4173         /* send a reset to the SCSI LUN which the command was sent to */
4174         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN);
4175         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4176                 return SUCCESS;
4177
4178         dev_warn(&h->pdev->dev, "resetting device failed.\n");
4179         return FAILED;
4180 }
4181
4182 static void swizzle_abort_tag(u8 *tag)
4183 {
4184         u8 original_tag[8];
4185
4186         memcpy(original_tag, tag, 8);
4187         tag[0] = original_tag[3];
4188         tag[1] = original_tag[2];
4189         tag[2] = original_tag[1];
4190         tag[3] = original_tag[0];
4191         tag[4] = original_tag[7];
4192         tag[5] = original_tag[6];
4193         tag[6] = original_tag[5];
4194         tag[7] = original_tag[4];
4195 }
4196
4197 static void hpsa_get_tag(struct ctlr_info *h,
4198         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4199 {
4200         u64 tag;
4201         if (c->cmd_type == CMD_IOACCEL1) {
4202                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4203                         &h->ioaccel_cmd_pool[c->cmdindex];
4204                 tag = le64_to_cpu(cm1->tag);
4205                 *tagupper = cpu_to_le32(tag >> 32);
4206                 *taglower = cpu_to_le32(tag);
4207                 return;
4208         }
4209         if (c->cmd_type == CMD_IOACCEL2) {
4210                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4211                         &h->ioaccel2_cmd_pool[c->cmdindex];
4212                 /* upper tag not used in ioaccel2 mode */
4213                 memset(tagupper, 0, sizeof(*tagupper));
4214                 *taglower = cm2->Tag;
4215                 return;
4216         }
4217         tag = le64_to_cpu(c->Header.tag);
4218         *tagupper = cpu_to_le32(tag >> 32);
4219         *taglower = cpu_to_le32(tag);
4220 }
4221
4222 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4223         struct CommandList *abort, int swizzle)
4224 {
4225         int rc = IO_OK;
4226         struct CommandList *c;
4227         struct ErrorInfo *ei;
4228         __le32 tagupper, taglower;
4229
4230         c = cmd_special_alloc(h);
4231         if (c == NULL) {        /* trouble... */
4232                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4233                 return -ENOMEM;
4234         }
4235
4236         /* fill_cmd can't fail here, no buffer to map */
4237         (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
4238                 0, 0, scsi3addr, TYPE_MSG);
4239         if (swizzle)
4240                 swizzle_abort_tag(&c->Request.CDB[4]);
4241         hpsa_scsi_do_simple_cmd_core(h, c);
4242         hpsa_get_tag(h, abort, &taglower, &tagupper);
4243         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
4244                 __func__, tagupper, taglower);
4245         /* no unmap needed here because no data xfer. */
4246
4247         ei = c->err_info;
4248         switch (ei->CommandStatus) {
4249         case CMD_SUCCESS:
4250                 break;
4251         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4252                 rc = -1;
4253                 break;
4254         default:
4255                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4256                         __func__, tagupper, taglower);
4257                 hpsa_scsi_interpret_error(h, c);
4258                 rc = -1;
4259                 break;
4260         }
4261         cmd_special_free(h, c);
4262         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4263                 __func__, tagupper, taglower);
4264         return rc;
4265 }
4266
4267 /*
4268  * hpsa_find_cmd_in_queue
4269  *
4270  * Used to determine whether a command (find) is still present
4271  * in queue_head.   Optionally excludes the last element of queue_head.
4272  *
4273  * This is used to avoid unnecessary aborts.  Commands in h->reqQ have
4274  * not yet been submitted, and so can be aborted by the driver without
4275  * sending an abort to the hardware.
4276  *
4277  * Returns pointer to command if found in queue, NULL otherwise.
4278  */
4279 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
4280                         struct scsi_cmnd *find, struct list_head *queue_head)
4281 {
4282         unsigned long flags;
4283         struct CommandList *c = NULL;   /* ptr into cmpQ */
4284
4285         if (!find)
4286                 return NULL;
4287         spin_lock_irqsave(&h->lock, flags);
4288         list_for_each_entry(c, queue_head, list) {
4289                 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
4290                         continue;
4291                 if (c->scsi_cmd == find) {
4292                         spin_unlock_irqrestore(&h->lock, flags);
4293                         return c;
4294                 }
4295         }
4296         spin_unlock_irqrestore(&h->lock, flags);
4297         return NULL;
4298 }
4299
4300 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
4301                                         u8 *tag, struct list_head *queue_head)
4302 {
4303         unsigned long flags;
4304         struct CommandList *c;
4305
4306         spin_lock_irqsave(&h->lock, flags);
4307         list_for_each_entry(c, queue_head, list) {
4308                 if (memcmp(&c->Header.tag, tag, 8) != 0)
4309                         continue;
4310                 spin_unlock_irqrestore(&h->lock, flags);
4311                 return c;
4312         }
4313         spin_unlock_irqrestore(&h->lock, flags);
4314         return NULL;
4315 }
4316
4317 /* ioaccel2 path firmware cannot handle abort task requests.
4318  * Change abort requests to physical target reset, and send to the
4319  * address of the physical disk used for the ioaccel 2 command.
4320  * Return 0 on success (IO_OK)
4321  *       -1 on failure
4322  */
4323
4324 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4325         unsigned char *scsi3addr, struct CommandList *abort)
4326 {
4327         int rc = IO_OK;
4328         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4329         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4330         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4331         unsigned char *psa = &phys_scsi3addr[0];
4332
4333         /* Get a pointer to the hpsa logical device. */
4334         scmd = (struct scsi_cmnd *) abort->scsi_cmd;
4335         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4336         if (dev == NULL) {
4337                 dev_warn(&h->pdev->dev,
4338                         "Cannot abort: no device pointer for command.\n");
4339                         return -1; /* not abortable */
4340         }
4341
4342         if (h->raid_offload_debug > 0)
4343                 dev_info(&h->pdev->dev,
4344                         "Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4345                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4346                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4347                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4348
4349         if (!dev->offload_enabled) {
4350                 dev_warn(&h->pdev->dev,
4351                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4352                 return -1; /* not abortable */
4353         }
4354
4355         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4356         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4357                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4358                 return -1; /* not abortable */
4359         }
4360
4361         /* send the reset */
4362         if (h->raid_offload_debug > 0)
4363                 dev_info(&h->pdev->dev,
4364                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4365                         psa[0], psa[1], psa[2], psa[3],
4366                         psa[4], psa[5], psa[6], psa[7]);
4367         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET);
4368         if (rc != 0) {
4369                 dev_warn(&h->pdev->dev,
4370                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4371                         psa[0], psa[1], psa[2], psa[3],
4372                         psa[4], psa[5], psa[6], psa[7]);
4373                 return rc; /* failed to reset */
4374         }
4375
4376         /* wait for device to recover */
4377         if (wait_for_device_to_become_ready(h, psa) != 0) {
4378                 dev_warn(&h->pdev->dev,
4379                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4380                         psa[0], psa[1], psa[2], psa[3],
4381                         psa[4], psa[5], psa[6], psa[7]);
4382                 return -1;  /* failed to recover */
4383         }
4384
4385         /* device recovered */
4386         dev_info(&h->pdev->dev,
4387                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4388                 psa[0], psa[1], psa[2], psa[3],
4389                 psa[4], psa[5], psa[6], psa[7]);
4390
4391         return rc; /* success */
4392 }
4393
4394 /* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
4395  * tell which kind we're dealing with, so we send the abort both ways.  There
4396  * shouldn't be any collisions between swizzled and unswizzled tags due to the
4397  * way we construct our tags but we check anyway in case the assumptions which
4398  * make this true someday become false.
4399  */
4400 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4401         unsigned char *scsi3addr, struct CommandList *abort)
4402 {
4403         u8 swizzled_tag[8];
4404         struct CommandList *c;
4405         int rc = 0, rc2 = 0;
4406
4407         /* ioccelerator mode 2 commands should be aborted via the
4408          * accelerated path, since RAID path is unaware of these commands,
4409          * but underlying firmware can't handle abort TMF.
4410          * Change abort to physical device reset.
4411          */
4412         if (abort->cmd_type == CMD_IOACCEL2)
4413                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort);
4414
4415         /* we do not expect to find the swizzled tag in our queue, but
4416          * check anyway just to be sure the assumptions which make this
4417          * the case haven't become wrong.
4418          */
4419         memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
4420         swizzle_abort_tag(swizzled_tag);
4421         c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
4422         if (c != NULL) {
4423                 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
4424                 return hpsa_send_abort(h, scsi3addr, abort, 0);
4425         }
4426         rc = hpsa_send_abort(h, scsi3addr, abort, 0);
4427
4428         /* if the command is still in our queue, we can't conclude that it was
4429          * aborted (it might have just completed normally) but in any case
4430          * we don't need to try to abort it another way.
4431          */
4432         c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
4433         if (c)
4434                 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
4435         return rc && rc2;
4436 }
4437
4438 /* Send an abort for the specified command.
4439  *      If the device and controller support it,
4440  *              send a task abort request.
4441  */
4442 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4443 {
4444
4445         int i, rc;
4446         struct ctlr_info *h;
4447         struct hpsa_scsi_dev_t *dev;
4448         struct CommandList *abort; /* pointer to command to be aborted */
4449         struct CommandList *found;
4450         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4451         char msg[256];          /* For debug messaging. */
4452         int ml = 0;
4453         __le32 tagupper, taglower;
4454
4455         /* Find the controller of the command to be aborted */
4456         h = sdev_to_hba(sc->device);
4457         if (WARN(h == NULL,
4458                         "ABORT REQUEST FAILED, Controller lookup failed.\n"))
4459                 return FAILED;
4460
4461         /* Check that controller supports some kind of task abort */
4462         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
4463                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
4464                 return FAILED;
4465
4466         memset(msg, 0, sizeof(msg));
4467         ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%llu ",
4468                 h->scsi_host->host_no, sc->device->channel,
4469                 sc->device->id, sc->device->lun);
4470
4471         /* Find the device of the command to be aborted */
4472         dev = sc->device->hostdata;
4473         if (!dev) {
4474                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4475                                 msg);
4476                 return FAILED;
4477         }
4478
4479         /* Get SCSI command to be aborted */
4480         abort = (struct CommandList *) sc->host_scribble;
4481         if (abort == NULL) {
4482                 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
4483                                 msg);
4484                 return FAILED;
4485         }
4486         hpsa_get_tag(h, abort, &taglower, &tagupper);
4487         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
4488         as  = (struct scsi_cmnd *) abort->scsi_cmd;
4489         if (as != NULL)
4490                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
4491                         as->cmnd[0], as->serial_number);
4492         dev_dbg(&h->pdev->dev, "%s\n", msg);
4493         dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
4494                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4495
4496         /* Search reqQ to See if command is queued but not submitted,
4497          * if so, complete the command with aborted status and remove
4498          * it from the reqQ.
4499          */
4500         found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
4501         if (found) {
4502                 found->err_info->CommandStatus = CMD_ABORTED;
4503                 finish_cmd(found);
4504                 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
4505                                 msg);
4506                 return SUCCESS;
4507         }
4508
4509         /* not in reqQ, if also not in cmpQ, must have already completed */
4510         found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4511         if (!found)  {
4512                 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
4513                                 msg);
4514                 return SUCCESS;
4515         }
4516
4517         /*
4518          * Command is in flight, or possibly already completed
4519          * by the firmware (but not to the scsi mid layer) but we can't
4520          * distinguish which.  Send the abort down.
4521          */
4522         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
4523         if (rc != 0) {
4524                 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
4525                 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
4526                         h->scsi_host->host_no,
4527                         dev->bus, dev->target, dev->lun);
4528                 return FAILED;
4529         }
4530         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
4531
4532         /* If the abort(s) above completed and actually aborted the
4533          * command, then the command to be aborted should already be
4534          * completed.  If not, wait around a bit more to see if they
4535          * manage to complete normally.
4536          */
4537 #define ABORT_COMPLETE_WAIT_SECS 30
4538         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
4539                 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4540                 if (!found)
4541                         return SUCCESS;
4542                 msleep(100);
4543         }
4544         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
4545                 msg, ABORT_COMPLETE_WAIT_SECS);
4546         return FAILED;
4547 }
4548
4549
4550 /*
4551  * For operations that cannot sleep, a command block is allocated at init,
4552  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
4553  * which ones are free or in use.  Lock must be held when calling this.
4554  * cmd_free() is the complement.
4555  */
4556 static struct CommandList *cmd_alloc(struct ctlr_info *h)
4557 {
4558         struct CommandList *c;
4559         int i;
4560         union u64bit temp64;
4561         dma_addr_t cmd_dma_handle, err_dma_handle;
4562         int loopcount;
4563
4564         /* There is some *extremely* small but non-zero chance that that
4565          * multiple threads could get in here, and one thread could
4566          * be scanning through the list of bits looking for a free
4567          * one, but the free ones are always behind him, and other
4568          * threads sneak in behind him and eat them before he can
4569          * get to them, so that while there is always a free one, a
4570          * very unlucky thread might be starved anyway, never able to
4571          * beat the other threads.  In reality, this happens so
4572          * infrequently as to be indistinguishable from never.
4573          */
4574
4575         loopcount = 0;
4576         do {
4577                 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
4578                 if (i == h->nr_cmds)
4579                         i = 0;
4580                 loopcount++;
4581         } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
4582                   h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0 &&
4583                 loopcount < 10);
4584
4585         /* Thread got starved?  We do not expect this to ever happen. */
4586         if (loopcount >= 10)
4587                 return NULL;
4588
4589         c = h->cmd_pool + i;
4590         memset(c, 0, sizeof(*c));
4591         cmd_dma_handle = h->cmd_pool_dhandle
4592             + i * sizeof(*c);
4593         c->err_info = h->errinfo_pool + i;
4594         memset(c->err_info, 0, sizeof(*c->err_info));
4595         err_dma_handle = h->errinfo_pool_dhandle
4596             + i * sizeof(*c->err_info);
4597
4598         c->cmdindex = i;
4599
4600         INIT_LIST_HEAD(&c->list);
4601         c->busaddr = (u32) cmd_dma_handle;
4602         temp64.val = (u64) err_dma_handle;
4603         c->ErrDesc.Addr = cpu_to_le64(err_dma_handle);
4604         c->ErrDesc.Len = cpu_to_le32(sizeof(*c->err_info));
4605
4606         c->h = h;
4607         return c;
4608 }
4609
4610 /* For operations that can wait for kmalloc to possibly sleep,
4611  * this routine can be called. Lock need not be held to call
4612  * cmd_special_alloc. cmd_special_free() is the complement.
4613  */
4614 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
4615 {
4616         struct CommandList *c;
4617         dma_addr_t cmd_dma_handle, err_dma_handle;
4618
4619         c = pci_zalloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
4620         if (c == NULL)
4621                 return NULL;
4622
4623         c->cmd_type = CMD_SCSI;
4624         c->cmdindex = -1;
4625
4626         c->err_info = pci_zalloc_consistent(h->pdev, sizeof(*c->err_info),
4627                                             &err_dma_handle);
4628
4629         if (c->err_info == NULL) {
4630                 pci_free_consistent(h->pdev,
4631                         sizeof(*c), c, cmd_dma_handle);
4632                 return NULL;
4633         }
4634
4635         INIT_LIST_HEAD(&c->list);
4636         c->busaddr = (u32) cmd_dma_handle;
4637         c->ErrDesc.Addr = cpu_to_le64(err_dma_handle);
4638         c->ErrDesc.Len = cpu_to_le32(sizeof(*c->err_info));
4639
4640         c->h = h;
4641         return c;
4642 }
4643
4644 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
4645 {
4646         int i;
4647
4648         i = c - h->cmd_pool;
4649         clear_bit(i & (BITS_PER_LONG - 1),
4650                   h->cmd_pool_bits + (i / BITS_PER_LONG));
4651 }
4652
4653 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
4654 {
4655         pci_free_consistent(h->pdev, sizeof(*c->err_info),
4656                             c->err_info,
4657                             (dma_addr_t) le64_to_cpu(c->ErrDesc.Addr));
4658         pci_free_consistent(h->pdev, sizeof(*c),
4659                             c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
4660 }
4661
4662 #ifdef CONFIG_COMPAT
4663
4664 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
4665         void __user *arg)
4666 {
4667         IOCTL32_Command_struct __user *arg32 =
4668             (IOCTL32_Command_struct __user *) arg;
4669         IOCTL_Command_struct arg64;
4670         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
4671         int err;
4672         u32 cp;
4673
4674         memset(&arg64, 0, sizeof(arg64));
4675         err = 0;
4676         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4677                            sizeof(arg64.LUN_info));
4678         err |= copy_from_user(&arg64.Request, &arg32->Request,
4679                            sizeof(arg64.Request));
4680         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4681                            sizeof(arg64.error_info));
4682         err |= get_user(arg64.buf_size, &arg32->buf_size);
4683         err |= get_user(cp, &arg32->buf);
4684         arg64.buf = compat_ptr(cp);
4685         err |= copy_to_user(p, &arg64, sizeof(arg64));
4686
4687         if (err)
4688                 return -EFAULT;
4689
4690         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
4691         if (err)
4692                 return err;
4693         err |= copy_in_user(&arg32->error_info, &p->error_info,
4694                          sizeof(arg32->error_info));
4695         if (err)
4696                 return -EFAULT;
4697         return err;
4698 }
4699
4700 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
4701         int cmd, void __user *arg)
4702 {
4703         BIG_IOCTL32_Command_struct __user *arg32 =
4704             (BIG_IOCTL32_Command_struct __user *) arg;
4705         BIG_IOCTL_Command_struct arg64;
4706         BIG_IOCTL_Command_struct __user *p =
4707             compat_alloc_user_space(sizeof(arg64));
4708         int err;
4709         u32 cp;
4710
4711         memset(&arg64, 0, sizeof(arg64));
4712         err = 0;
4713         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4714                            sizeof(arg64.LUN_info));
4715         err |= copy_from_user(&arg64.Request, &arg32->Request,
4716                            sizeof(arg64.Request));
4717         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4718                            sizeof(arg64.error_info));
4719         err |= get_user(arg64.buf_size, &arg32->buf_size);
4720         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
4721         err |= get_user(cp, &arg32->buf);
4722         arg64.buf = compat_ptr(cp);
4723         err |= copy_to_user(p, &arg64, sizeof(arg64));
4724
4725         if (err)
4726                 return -EFAULT;
4727
4728         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
4729         if (err)
4730                 return err;
4731         err |= copy_in_user(&arg32->error_info, &p->error_info,
4732                          sizeof(arg32->error_info));
4733         if (err)
4734                 return -EFAULT;
4735         return err;
4736 }
4737
4738 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
4739 {
4740         switch (cmd) {
4741         case CCISS_GETPCIINFO:
4742         case CCISS_GETINTINFO:
4743         case CCISS_SETINTINFO:
4744         case CCISS_GETNODENAME:
4745         case CCISS_SETNODENAME:
4746         case CCISS_GETHEARTBEAT:
4747         case CCISS_GETBUSTYPES:
4748         case CCISS_GETFIRMVER:
4749         case CCISS_GETDRIVVER:
4750         case CCISS_REVALIDVOLS:
4751         case CCISS_DEREGDISK:
4752         case CCISS_REGNEWDISK:
4753         case CCISS_REGNEWD:
4754         case CCISS_RESCANDISK:
4755         case CCISS_GETLUNINFO:
4756                 return hpsa_ioctl(dev, cmd, arg);
4757
4758         case CCISS_PASSTHRU32:
4759                 return hpsa_ioctl32_passthru(dev, cmd, arg);
4760         case CCISS_BIG_PASSTHRU32:
4761                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
4762
4763         default:
4764                 return -ENOIOCTLCMD;
4765         }
4766 }
4767 #endif
4768
4769 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
4770 {
4771         struct hpsa_pci_info pciinfo;
4772
4773         if (!argp)
4774                 return -EINVAL;
4775         pciinfo.domain = pci_domain_nr(h->pdev->bus);
4776         pciinfo.bus = h->pdev->bus->number;
4777         pciinfo.dev_fn = h->pdev->devfn;
4778         pciinfo.board_id = h->board_id;
4779         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
4780                 return -EFAULT;
4781         return 0;
4782 }
4783
4784 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
4785 {
4786         DriverVer_type DriverVer;
4787         unsigned char vmaj, vmin, vsubmin;
4788         int rc;
4789
4790         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
4791                 &vmaj, &vmin, &vsubmin);
4792         if (rc != 3) {
4793                 dev_info(&h->pdev->dev, "driver version string '%s' "
4794                         "unrecognized.", HPSA_DRIVER_VERSION);
4795                 vmaj = 0;
4796                 vmin = 0;
4797                 vsubmin = 0;
4798         }
4799         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
4800         if (!argp)
4801                 return -EINVAL;
4802         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
4803                 return -EFAULT;
4804         return 0;
4805 }
4806
4807 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4808 {
4809         IOCTL_Command_struct iocommand;
4810         struct CommandList *c;
4811         char *buff = NULL;
4812         u64 temp64;
4813         int rc = 0;
4814
4815         if (!argp)
4816                 return -EINVAL;
4817         if (!capable(CAP_SYS_RAWIO))
4818                 return -EPERM;
4819         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
4820                 return -EFAULT;
4821         if ((iocommand.buf_size < 1) &&
4822             (iocommand.Request.Type.Direction != XFER_NONE)) {
4823                 return -EINVAL;
4824         }
4825         if (iocommand.buf_size > 0) {
4826                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
4827                 if (buff == NULL)
4828                         return -EFAULT;
4829                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
4830                         /* Copy the data into the buffer we created */
4831                         if (copy_from_user(buff, iocommand.buf,
4832                                 iocommand.buf_size)) {
4833                                 rc = -EFAULT;
4834                                 goto out_kfree;
4835                         }
4836                 } else {
4837                         memset(buff, 0, iocommand.buf_size);
4838                 }
4839         }
4840         c = cmd_special_alloc(h);
4841         if (c == NULL) {
4842                 rc = -ENOMEM;
4843                 goto out_kfree;
4844         }
4845         /* Fill in the command type */
4846         c->cmd_type = CMD_IOCTL_PEND;
4847         /* Fill in Command Header */
4848         c->Header.ReplyQueue = 0; /* unused in simple mode */
4849         if (iocommand.buf_size > 0) {   /* buffer to fill */
4850                 c->Header.SGList = 1;
4851                 c->Header.SGTotal = cpu_to_le16(1);
4852         } else  { /* no buffers to fill */
4853                 c->Header.SGList = 0;
4854                 c->Header.SGTotal = cpu_to_le16(0);
4855         }
4856         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
4857         /* use the kernel address the cmd block for tag */
4858         c->Header.tag = cpu_to_le64(c->busaddr);
4859
4860         /* Fill in Request block */
4861         memcpy(&c->Request, &iocommand.Request,
4862                 sizeof(c->Request));
4863
4864         /* Fill in the scatter gather information */
4865         if (iocommand.buf_size > 0) {
4866                 temp64 = pci_map_single(h->pdev, buff,
4867                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
4868                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
4869                         c->SG[0].Addr = cpu_to_le64(0);
4870                         c->SG[0].Len = cpu_to_le32(0);
4871                         rc = -ENOMEM;
4872                         goto out;
4873                 }
4874                 c->SG[0].Addr = cpu_to_le64(temp64);
4875                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
4876                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
4877         }
4878         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
4879         if (iocommand.buf_size > 0)
4880                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
4881         check_ioctl_unit_attention(h, c);
4882
4883         /* Copy the error information out */
4884         memcpy(&iocommand.error_info, c->err_info,
4885                 sizeof(iocommand.error_info));
4886         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
4887                 rc = -EFAULT;
4888                 goto out;
4889         }
4890         if ((iocommand.Request.Type.Direction & XFER_READ) &&
4891                 iocommand.buf_size > 0) {
4892                 /* Copy the data out of the buffer we created */
4893                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
4894                         rc = -EFAULT;
4895                         goto out;
4896                 }
4897         }
4898 out:
4899         cmd_special_free(h, c);
4900 out_kfree:
4901         kfree(buff);
4902         return rc;
4903 }
4904
4905 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4906 {
4907         BIG_IOCTL_Command_struct *ioc;
4908         struct CommandList *c;
4909         unsigned char **buff = NULL;
4910         int *buff_size = NULL;
4911         u64 temp64;
4912         BYTE sg_used = 0;
4913         int status = 0;
4914         u32 left;
4915         u32 sz;
4916         BYTE __user *data_ptr;
4917
4918         if (!argp)
4919                 return -EINVAL;
4920         if (!capable(CAP_SYS_RAWIO))
4921                 return -EPERM;
4922         ioc = (BIG_IOCTL_Command_struct *)
4923             kmalloc(sizeof(*ioc), GFP_KERNEL);
4924         if (!ioc) {
4925                 status = -ENOMEM;
4926                 goto cleanup1;
4927         }
4928         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
4929                 status = -EFAULT;
4930                 goto cleanup1;
4931         }
4932         if ((ioc->buf_size < 1) &&
4933             (ioc->Request.Type.Direction != XFER_NONE)) {
4934                 status = -EINVAL;
4935                 goto cleanup1;
4936         }
4937         /* Check kmalloc limits  using all SGs */
4938         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
4939                 status = -EINVAL;
4940                 goto cleanup1;
4941         }
4942         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
4943                 status = -EINVAL;
4944                 goto cleanup1;
4945         }
4946         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
4947         if (!buff) {
4948                 status = -ENOMEM;
4949                 goto cleanup1;
4950         }
4951         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
4952         if (!buff_size) {
4953                 status = -ENOMEM;
4954                 goto cleanup1;
4955         }
4956         left = ioc->buf_size;
4957         data_ptr = ioc->buf;
4958         while (left) {
4959                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
4960                 buff_size[sg_used] = sz;
4961                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
4962                 if (buff[sg_used] == NULL) {
4963                         status = -ENOMEM;
4964                         goto cleanup1;
4965                 }
4966                 if (ioc->Request.Type.Direction & XFER_WRITE) {
4967                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
4968                                 status = -EFAULT;
4969                                 goto cleanup1;
4970                         }
4971                 } else
4972                         memset(buff[sg_used], 0, sz);
4973                 left -= sz;
4974                 data_ptr += sz;
4975                 sg_used++;
4976         }
4977         c = cmd_special_alloc(h);
4978         if (c == NULL) {
4979                 status = -ENOMEM;
4980                 goto cleanup1;
4981         }
4982         c->cmd_type = CMD_IOCTL_PEND;
4983         c->Header.ReplyQueue = 0;
4984         c->Header.SGList = (u8) sg_used;
4985         c->Header.SGTotal = cpu_to_le16(sg_used);
4986         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
4987         c->Header.tag = cpu_to_le64(c->busaddr);
4988         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
4989         if (ioc->buf_size > 0) {
4990                 int i;
4991                 for (i = 0; i < sg_used; i++) {
4992                         temp64 = pci_map_single(h->pdev, buff[i],
4993                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
4994                         if (dma_mapping_error(&h->pdev->dev,
4995                                                         (dma_addr_t) temp64)) {
4996                                 c->SG[i].Addr = cpu_to_le64(0);
4997                                 c->SG[i].Len = cpu_to_le32(0);
4998                                 hpsa_pci_unmap(h->pdev, c, i,
4999                                         PCI_DMA_BIDIRECTIONAL);
5000                                 status = -ENOMEM;
5001                                 goto cleanup0;
5002                         }
5003                         c->SG[i].Addr = cpu_to_le64(temp64);
5004                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
5005                         c->SG[i].Ext = cpu_to_le32(0);
5006                 }
5007                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5008         }
5009         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5010         if (sg_used)
5011                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5012         check_ioctl_unit_attention(h, c);
5013         /* Copy the error information out */
5014         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5015         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5016                 status = -EFAULT;
5017                 goto cleanup0;
5018         }
5019         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5020                 int i;
5021
5022                 /* Copy the data out of the buffer we created */
5023                 BYTE __user *ptr = ioc->buf;
5024                 for (i = 0; i < sg_used; i++) {
5025                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5026                                 status = -EFAULT;
5027                                 goto cleanup0;
5028                         }
5029                         ptr += buff_size[i];
5030                 }
5031         }
5032         status = 0;
5033 cleanup0:
5034         cmd_special_free(h, c);
5035 cleanup1:
5036         if (buff) {
5037                 int i;
5038
5039                 for (i = 0; i < sg_used; i++)
5040                         kfree(buff[i]);
5041                 kfree(buff);
5042         }
5043         kfree(buff_size);
5044         kfree(ioc);
5045         return status;
5046 }
5047
5048 static void check_ioctl_unit_attention(struct ctlr_info *h,
5049         struct CommandList *c)
5050 {
5051         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5052                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5053                 (void) check_for_unit_attention(h, c);
5054 }
5055
5056 static int increment_passthru_count(struct ctlr_info *h)
5057 {
5058         unsigned long flags;
5059
5060         spin_lock_irqsave(&h->passthru_count_lock, flags);
5061         if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
5062                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5063                 return -1;
5064         }
5065         h->passthru_count++;
5066         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5067         return 0;
5068 }
5069
5070 static void decrement_passthru_count(struct ctlr_info *h)
5071 {
5072         unsigned long flags;
5073
5074         spin_lock_irqsave(&h->passthru_count_lock, flags);
5075         if (h->passthru_count <= 0) {
5076                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5077                 /* not expecting to get here. */
5078                 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
5079                 return;
5080         }
5081         h->passthru_count--;
5082         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5083 }
5084
5085 /*
5086  * ioctl
5087  */
5088 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5089 {
5090         struct ctlr_info *h;
5091         void __user *argp = (void __user *)arg;
5092         int rc;
5093
5094         h = sdev_to_hba(dev);
5095
5096         switch (cmd) {
5097         case CCISS_DEREGDISK:
5098         case CCISS_REGNEWDISK:
5099         case CCISS_REGNEWD:
5100                 hpsa_scan_start(h->scsi_host);
5101                 return 0;
5102         case CCISS_GETPCIINFO:
5103                 return hpsa_getpciinfo_ioctl(h, argp);
5104         case CCISS_GETDRIVVER:
5105                 return hpsa_getdrivver_ioctl(h, argp);
5106         case CCISS_PASSTHRU:
5107                 if (increment_passthru_count(h))
5108                         return -EAGAIN;
5109                 rc = hpsa_passthru_ioctl(h, argp);
5110                 decrement_passthru_count(h);
5111                 return rc;
5112         case CCISS_BIG_PASSTHRU:
5113                 if (increment_passthru_count(h))
5114                         return -EAGAIN;
5115                 rc = hpsa_big_passthru_ioctl(h, argp);
5116                 decrement_passthru_count(h);
5117                 return rc;
5118         default:
5119                 return -ENOTTY;
5120         }
5121 }
5122
5123 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5124                                 u8 reset_type)
5125 {
5126         struct CommandList *c;
5127
5128         c = cmd_alloc(h);
5129         if (!c)
5130                 return -ENOMEM;
5131         /* fill_cmd can't fail here, no data buffer to map */
5132         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5133                 RAID_CTLR_LUNID, TYPE_MSG);
5134         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5135         c->waiting = NULL;
5136         enqueue_cmd_and_start_io(h, c);
5137         /* Don't wait for completion, the reset won't complete.  Don't free
5138          * the command either.  This is the last command we will send before
5139          * re-initializing everything, so it doesn't matter and won't leak.
5140          */
5141         return 0;
5142 }
5143
5144 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5145         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5146         int cmd_type)
5147 {
5148         int pci_dir = XFER_NONE;
5149         struct CommandList *a; /* for commands to be aborted */
5150
5151         c->cmd_type = CMD_IOCTL_PEND;
5152         c->Header.ReplyQueue = 0;
5153         if (buff != NULL && size > 0) {
5154                 c->Header.SGList = 1;
5155                 c->Header.SGTotal = cpu_to_le16(1);
5156         } else {
5157                 c->Header.SGList = 0;
5158                 c->Header.SGTotal = cpu_to_le16(0);
5159         }
5160         c->Header.tag = cpu_to_le64(c->busaddr);
5161         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5162
5163         if (cmd_type == TYPE_CMD) {
5164                 switch (cmd) {
5165                 case HPSA_INQUIRY:
5166                         /* are we trying to read a vital product page */
5167                         if (page_code & VPD_PAGE) {
5168                                 c->Request.CDB[1] = 0x01;
5169                                 c->Request.CDB[2] = (page_code & 0xff);
5170                         }
5171                         c->Request.CDBLen = 6;
5172                         c->Request.type_attr_dir =
5173                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5174                         c->Request.Timeout = 0;
5175                         c->Request.CDB[0] = HPSA_INQUIRY;
5176                         c->Request.CDB[4] = size & 0xFF;
5177                         break;
5178                 case HPSA_REPORT_LOG:
5179                 case HPSA_REPORT_PHYS:
5180                         /* Talking to controller so It's a physical command
5181                            mode = 00 target = 0.  Nothing to write.
5182                          */
5183                         c->Request.CDBLen = 12;
5184                         c->Request.type_attr_dir =
5185                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5186                         c->Request.Timeout = 0;
5187                         c->Request.CDB[0] = cmd;
5188                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5189                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5190                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5191                         c->Request.CDB[9] = size & 0xFF;
5192                         break;
5193                 case HPSA_CACHE_FLUSH:
5194                         c->Request.CDBLen = 12;
5195                         c->Request.type_attr_dir =
5196                                         TYPE_ATTR_DIR(cmd_type,
5197                                                 ATTR_SIMPLE, XFER_WRITE);
5198                         c->Request.Timeout = 0;
5199                         c->Request.CDB[0] = BMIC_WRITE;
5200                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5201                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5202                         c->Request.CDB[8] = size & 0xFF;
5203                         break;
5204                 case TEST_UNIT_READY:
5205                         c->Request.CDBLen = 6;
5206                         c->Request.type_attr_dir =
5207                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5208                         c->Request.Timeout = 0;
5209                         break;
5210                 case HPSA_GET_RAID_MAP:
5211                         c->Request.CDBLen = 12;
5212                         c->Request.type_attr_dir =
5213                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5214                         c->Request.Timeout = 0;
5215                         c->Request.CDB[0] = HPSA_CISS_READ;
5216                         c->Request.CDB[1] = cmd;
5217                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5218                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5219                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5220                         c->Request.CDB[9] = size & 0xFF;
5221                         break;
5222                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5223                         c->Request.CDBLen = 10;
5224                         c->Request.type_attr_dir =
5225                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5226                         c->Request.Timeout = 0;
5227                         c->Request.CDB[0] = BMIC_READ;
5228                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5229                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5230                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5231                         break;
5232                 default:
5233                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5234                         BUG();
5235                         return -1;
5236                 }
5237         } else if (cmd_type == TYPE_MSG) {
5238                 switch (cmd) {
5239
5240                 case  HPSA_DEVICE_RESET_MSG:
5241                         c->Request.CDBLen = 16;
5242                         c->Request.type_attr_dir =
5243                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5244                         c->Request.Timeout = 0; /* Don't time out */
5245                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5246                         c->Request.CDB[0] =  cmd;
5247                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5248                         /* If bytes 4-7 are zero, it means reset the */
5249                         /* LunID device */
5250                         c->Request.CDB[4] = 0x00;
5251                         c->Request.CDB[5] = 0x00;
5252                         c->Request.CDB[6] = 0x00;
5253                         c->Request.CDB[7] = 0x00;
5254                         break;
5255                 case  HPSA_ABORT_MSG:
5256                         a = buff;       /* point to command to be aborted */
5257                         dev_dbg(&h->pdev->dev,
5258                                 "Abort Tag:0x%016llx request Tag:0x%016llx",
5259                                 a->Header.tag, c->Header.tag);
5260                         c->Request.CDBLen = 16;
5261                         c->Request.type_attr_dir =
5262                                         TYPE_ATTR_DIR(cmd_type,
5263                                                 ATTR_SIMPLE, XFER_WRITE);
5264                         c->Request.Timeout = 0; /* Don't time out */
5265                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5266                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5267                         c->Request.CDB[2] = 0x00; /* reserved */
5268                         c->Request.CDB[3] = 0x00; /* reserved */
5269                         /* Tag to abort goes in CDB[4]-CDB[11] */
5270                         memcpy(&c->Request.CDB[4], &a->Header.tag,
5271                                 sizeof(a->Header.tag));
5272                         c->Request.CDB[12] = 0x00; /* reserved */
5273                         c->Request.CDB[13] = 0x00; /* reserved */
5274                         c->Request.CDB[14] = 0x00; /* reserved */
5275                         c->Request.CDB[15] = 0x00; /* reserved */
5276                 break;
5277                 default:
5278                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5279                                 cmd);
5280                         BUG();
5281                 }
5282         } else {
5283                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5284                 BUG();
5285         }
5286
5287         switch (GET_DIR(c->Request.type_attr_dir)) {
5288         case XFER_READ:
5289                 pci_dir = PCI_DMA_FROMDEVICE;
5290                 break;
5291         case XFER_WRITE:
5292                 pci_dir = PCI_DMA_TODEVICE;
5293                 break;
5294         case XFER_NONE:
5295                 pci_dir = PCI_DMA_NONE;
5296                 break;
5297         default:
5298                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5299         }
5300         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5301                 return -1;
5302         return 0;
5303 }
5304
5305 /*
5306  * Map (physical) PCI mem into (virtual) kernel space
5307  */
5308 static void __iomem *remap_pci_mem(ulong base, ulong size)
5309 {
5310         ulong page_base = ((ulong) base) & PAGE_MASK;
5311         ulong page_offs = ((ulong) base) - page_base;
5312         void __iomem *page_remapped = ioremap_nocache(page_base,
5313                 page_offs + size);
5314
5315         return page_remapped ? (page_remapped + page_offs) : NULL;
5316 }
5317
5318 /* Takes cmds off the submission queue and sends them to the hardware,
5319  * then puts them on the queue of cmds waiting for completion.
5320  * Assumes h->lock is held
5321  */
5322 static void start_io(struct ctlr_info *h, unsigned long *flags)
5323 {
5324         struct CommandList *c;
5325
5326         while (!list_empty(&h->reqQ)) {
5327                 c = list_entry(h->reqQ.next, struct CommandList, list);
5328                 /* can't do anything if fifo is full */
5329                 if ((h->access.fifo_full(h))) {
5330                         h->fifo_recently_full = 1;
5331                         dev_warn(&h->pdev->dev, "fifo full\n");
5332                         break;
5333                 }
5334                 h->fifo_recently_full = 0;
5335
5336                 /* Get the first entry from the Request Q */
5337                 removeQ(c);
5338                 h->Qdepth--;
5339
5340                 /* Put job onto the completed Q */
5341                 addQ(&h->cmpQ, c);
5342                 atomic_inc(&h->commands_outstanding);
5343                 spin_unlock_irqrestore(&h->lock, *flags);
5344                 /* Tell the controller execute command */
5345                 h->access.submit_command(h, c);
5346                 spin_lock_irqsave(&h->lock, *flags);
5347         }
5348 }
5349
5350 static void lock_and_start_io(struct ctlr_info *h)
5351 {
5352         unsigned long flags;
5353
5354         spin_lock_irqsave(&h->lock, flags);
5355         start_io(h, &flags);
5356         spin_unlock_irqrestore(&h->lock, flags);
5357 }
5358
5359 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5360 {
5361         return h->access.command_completed(h, q);
5362 }
5363
5364 static inline bool interrupt_pending(struct ctlr_info *h)
5365 {
5366         return h->access.intr_pending(h);
5367 }
5368
5369 static inline long interrupt_not_for_us(struct ctlr_info *h)
5370 {
5371         return (h->access.intr_pending(h) == 0) ||
5372                 (h->interrupts_enabled == 0);
5373 }
5374
5375 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5376         u32 raw_tag)
5377 {
5378         if (unlikely(tag_index >= h->nr_cmds)) {
5379                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5380                 return 1;
5381         }
5382         return 0;
5383 }
5384
5385 static inline void finish_cmd(struct CommandList *c)
5386 {
5387         unsigned long flags;
5388         int io_may_be_stalled = 0;
5389         struct ctlr_info *h = c->h;
5390         int count;
5391
5392         spin_lock_irqsave(&h->lock, flags);
5393         removeQ(c);
5394
5395         /*
5396          * Check for possibly stalled i/o.
5397          *
5398          * If a fifo_full condition is encountered, requests will back up
5399          * in h->reqQ.  This queue is only emptied out by start_io which is
5400          * only called when a new i/o request comes in.  If no i/o's are
5401          * forthcoming, the i/o's in h->reqQ can get stuck.  So we call
5402          * start_io from here if we detect such a danger.
5403          *
5404          * Normally, we shouldn't hit this case, but pounding on the
5405          * CCISS_PASSTHRU ioctl can provoke it.  Only call start_io if
5406          * commands_outstanding is low.  We want to avoid calling
5407          * start_io from in here as much as possible, and esp. don't
5408          * want to get in a cycle where we call start_io every time
5409          * through here.
5410          */
5411         count = atomic_read(&h->commands_outstanding);
5412         spin_unlock_irqrestore(&h->lock, flags);
5413         if (unlikely(h->fifo_recently_full) && count < 5)
5414                 io_may_be_stalled = 1;
5415
5416         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5417         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5418                         || c->cmd_type == CMD_IOACCEL2))
5419                 complete_scsi_command(c);
5420         else if (c->cmd_type == CMD_IOCTL_PEND)
5421                 complete(c->waiting);
5422         if (unlikely(io_may_be_stalled))
5423                 lock_and_start_io(h);
5424 }
5425
5426 static inline u32 hpsa_tag_contains_index(u32 tag)
5427 {
5428         return tag & DIRECT_LOOKUP_BIT;
5429 }
5430
5431 static inline u32 hpsa_tag_to_index(u32 tag)
5432 {
5433         return tag >> DIRECT_LOOKUP_SHIFT;
5434 }
5435
5436
5437 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5438 {
5439 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5440 #define HPSA_SIMPLE_ERROR_BITS 0x03
5441         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5442                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5443         return tag & ~HPSA_PERF_ERROR_BITS;
5444 }
5445
5446 /* process completion of an indexed ("direct lookup") command */
5447 static inline void process_indexed_cmd(struct ctlr_info *h,
5448         u32 raw_tag)
5449 {
5450         u32 tag_index;
5451         struct CommandList *c;
5452
5453         tag_index = hpsa_tag_to_index(raw_tag);
5454         if (!bad_tag(h, tag_index, raw_tag)) {
5455                 c = h->cmd_pool + tag_index;
5456                 finish_cmd(c);
5457         }
5458 }
5459
5460 /* process completion of a non-indexed command */
5461 static inline void process_nonindexed_cmd(struct ctlr_info *h,
5462         u32 raw_tag)
5463 {
5464         u32 tag;
5465         struct CommandList *c = NULL;
5466         unsigned long flags;
5467
5468         tag = hpsa_tag_discard_error_bits(h, raw_tag);
5469         spin_lock_irqsave(&h->lock, flags);
5470         list_for_each_entry(c, &h->cmpQ, list) {
5471                 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
5472                         spin_unlock_irqrestore(&h->lock, flags);
5473                         finish_cmd(c);
5474                         return;
5475                 }
5476         }
5477         spin_unlock_irqrestore(&h->lock, flags);
5478         bad_tag(h, h->nr_cmds + 1, raw_tag);
5479 }
5480
5481 /* Some controllers, like p400, will give us one interrupt
5482  * after a soft reset, even if we turned interrupts off.
5483  * Only need to check for this in the hpsa_xxx_discard_completions
5484  * functions.
5485  */
5486 static int ignore_bogus_interrupt(struct ctlr_info *h)
5487 {
5488         if (likely(!reset_devices))
5489                 return 0;
5490
5491         if (likely(h->interrupts_enabled))
5492                 return 0;
5493
5494         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5495                 "(known firmware bug.)  Ignoring.\n");
5496
5497         return 1;
5498 }
5499
5500 /*
5501  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5502  * Relies on (h-q[x] == x) being true for x such that
5503  * 0 <= x < MAX_REPLY_QUEUES.
5504  */
5505 static struct ctlr_info *queue_to_hba(u8 *queue)
5506 {
5507         return container_of((queue - *queue), struct ctlr_info, q[0]);
5508 }
5509
5510 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5511 {
5512         struct ctlr_info *h = queue_to_hba(queue);
5513         u8 q = *(u8 *) queue;
5514         u32 raw_tag;
5515
5516         if (ignore_bogus_interrupt(h))
5517                 return IRQ_NONE;
5518
5519         if (interrupt_not_for_us(h))
5520                 return IRQ_NONE;
5521         h->last_intr_timestamp = get_jiffies_64();
5522         while (interrupt_pending(h)) {
5523                 raw_tag = get_next_completion(h, q);
5524                 while (raw_tag != FIFO_EMPTY)
5525                         raw_tag = next_command(h, q);
5526         }
5527         return IRQ_HANDLED;
5528 }
5529
5530 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5531 {
5532         struct ctlr_info *h = queue_to_hba(queue);
5533         u32 raw_tag;
5534         u8 q = *(u8 *) queue;
5535
5536         if (ignore_bogus_interrupt(h))
5537                 return IRQ_NONE;
5538
5539         h->last_intr_timestamp = get_jiffies_64();
5540         raw_tag = get_next_completion(h, q);
5541         while (raw_tag != FIFO_EMPTY)
5542                 raw_tag = next_command(h, q);
5543         return IRQ_HANDLED;
5544 }
5545
5546 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5547 {
5548         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5549         u32 raw_tag;
5550         u8 q = *(u8 *) queue;
5551
5552         if (interrupt_not_for_us(h))
5553                 return IRQ_NONE;
5554         h->last_intr_timestamp = get_jiffies_64();
5555         while (interrupt_pending(h)) {
5556                 raw_tag = get_next_completion(h, q);
5557                 while (raw_tag != FIFO_EMPTY) {
5558                         if (likely(hpsa_tag_contains_index(raw_tag)))
5559                                 process_indexed_cmd(h, raw_tag);
5560                         else
5561                                 process_nonindexed_cmd(h, raw_tag);
5562                         raw_tag = next_command(h, q);
5563                 }
5564         }
5565         return IRQ_HANDLED;
5566 }
5567
5568 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5569 {
5570         struct ctlr_info *h = queue_to_hba(queue);
5571         u32 raw_tag;
5572         u8 q = *(u8 *) queue;
5573
5574         h->last_intr_timestamp = get_jiffies_64();
5575         raw_tag = get_next_completion(h, q);
5576         while (raw_tag != FIFO_EMPTY) {
5577                 if (likely(hpsa_tag_contains_index(raw_tag)))
5578                         process_indexed_cmd(h, raw_tag);
5579                 else
5580                         process_nonindexed_cmd(h, raw_tag);
5581                 raw_tag = next_command(h, q);
5582         }
5583         return IRQ_HANDLED;
5584 }
5585
5586 /* Send a message CDB to the firmware. Careful, this only works
5587  * in simple mode, not performant mode due to the tag lookup.
5588  * We only ever use this immediately after a controller reset.
5589  */
5590 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5591                         unsigned char type)
5592 {
5593         struct Command {
5594                 struct CommandListHeader CommandHeader;
5595                 struct RequestBlock Request;
5596                 struct ErrDescriptor ErrorDescriptor;
5597         };
5598         struct Command *cmd;
5599         static const size_t cmd_sz = sizeof(*cmd) +
5600                                         sizeof(cmd->ErrorDescriptor);
5601         dma_addr_t paddr64;
5602         __le32 paddr32;
5603         u32 tag;
5604         void __iomem *vaddr;
5605         int i, err;
5606
5607         vaddr = pci_ioremap_bar(pdev, 0);
5608         if (vaddr == NULL)
5609                 return -ENOMEM;
5610
5611         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5612          * CCISS commands, so they must be allocated from the lower 4GiB of
5613          * memory.
5614          */
5615         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5616         if (err) {
5617                 iounmap(vaddr);
5618                 return err;
5619         }
5620
5621         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5622         if (cmd == NULL) {
5623                 iounmap(vaddr);
5624                 return -ENOMEM;
5625         }
5626
5627         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5628          * although there's no guarantee, we assume that the address is at
5629          * least 4-byte aligned (most likely, it's page-aligned).
5630          */
5631         paddr32 = cpu_to_le32(paddr64);
5632
5633         cmd->CommandHeader.ReplyQueue = 0;
5634         cmd->CommandHeader.SGList = 0;
5635         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
5636         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
5637         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
5638
5639         cmd->Request.CDBLen = 16;
5640         cmd->Request.type_attr_dir =
5641                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
5642         cmd->Request.Timeout = 0; /* Don't time out */
5643         cmd->Request.CDB[0] = opcode;
5644         cmd->Request.CDB[1] = type;
5645         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5646         cmd->ErrorDescriptor.Addr =
5647                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
5648         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
5649
5650         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
5651
5652         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
5653                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
5654                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
5655                         break;
5656                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
5657         }
5658
5659         iounmap(vaddr);
5660
5661         /* we leak the DMA buffer here ... no choice since the controller could
5662          *  still complete the command.
5663          */
5664         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
5665                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
5666                         opcode, type);
5667                 return -ETIMEDOUT;
5668         }
5669
5670         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
5671
5672         if (tag & HPSA_ERROR_BIT) {
5673                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
5674                         opcode, type);
5675                 return -EIO;
5676         }
5677
5678         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
5679                 opcode, type);
5680         return 0;
5681 }
5682
5683 #define hpsa_noop(p) hpsa_message(p, 3, 0)
5684
5685 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
5686         void __iomem *vaddr, u32 use_doorbell)
5687 {
5688
5689         if (use_doorbell) {
5690                 /* For everything after the P600, the PCI power state method
5691                  * of resetting the controller doesn't work, so we have this
5692                  * other way using the doorbell register.
5693                  */
5694                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
5695                 writel(use_doorbell, vaddr + SA5_DOORBELL);
5696
5697                 /* PMC hardware guys tell us we need a 10 second delay after
5698                  * doorbell reset and before any attempt to talk to the board
5699                  * at all to ensure that this actually works and doesn't fall
5700                  * over in some weird corner cases.
5701                  */
5702                 msleep(10000);
5703         } else { /* Try to do it the PCI power state way */
5704
5705                 /* Quoting from the Open CISS Specification: "The Power
5706                  * Management Control/Status Register (CSR) controls the power
5707                  * state of the device.  The normal operating state is D0,
5708                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
5709                  * the controller, place the interface device in D3 then to D0,
5710                  * this causes a secondary PCI reset which will reset the
5711                  * controller." */
5712
5713                 int rc = 0;
5714
5715                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
5716
5717                 /* enter the D3hot power management state */
5718                 rc = pci_set_power_state(pdev, PCI_D3hot);
5719                 if (rc)
5720                         return rc;
5721
5722                 msleep(500);
5723
5724                 /* enter the D0 power management state */
5725                 rc = pci_set_power_state(pdev, PCI_D0);
5726                 if (rc)
5727                         return rc;
5728
5729                 /*
5730                  * The P600 requires a small delay when changing states.
5731                  * Otherwise we may think the board did not reset and we bail.
5732                  * This for kdump only and is particular to the P600.
5733                  */
5734                 msleep(500);
5735         }
5736         return 0;
5737 }
5738
5739 static void init_driver_version(char *driver_version, int len)
5740 {
5741         memset(driver_version, 0, len);
5742         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
5743 }
5744
5745 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
5746 {
5747         char *driver_version;
5748         int i, size = sizeof(cfgtable->driver_version);
5749
5750         driver_version = kmalloc(size, GFP_KERNEL);
5751         if (!driver_version)
5752                 return -ENOMEM;
5753
5754         init_driver_version(driver_version, size);
5755         for (i = 0; i < size; i++)
5756                 writeb(driver_version[i], &cfgtable->driver_version[i]);
5757         kfree(driver_version);
5758         return 0;
5759 }
5760
5761 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
5762                                           unsigned char *driver_ver)
5763 {
5764         int i;
5765
5766         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
5767                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
5768 }
5769
5770 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
5771 {
5772
5773         char *driver_ver, *old_driver_ver;
5774         int rc, size = sizeof(cfgtable->driver_version);
5775
5776         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
5777         if (!old_driver_ver)
5778                 return -ENOMEM;
5779         driver_ver = old_driver_ver + size;
5780
5781         /* After a reset, the 32 bytes of "driver version" in the cfgtable
5782          * should have been changed, otherwise we know the reset failed.
5783          */
5784         init_driver_version(old_driver_ver, size);
5785         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
5786         rc = !memcmp(driver_ver, old_driver_ver, size);
5787         kfree(old_driver_ver);
5788         return rc;
5789 }
5790 /* This does a hard reset of the controller using PCI power management
5791  * states or the using the doorbell register.
5792  */
5793 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
5794 {
5795         u64 cfg_offset;
5796         u32 cfg_base_addr;
5797         u64 cfg_base_addr_index;
5798         void __iomem *vaddr;
5799         unsigned long paddr;
5800         u32 misc_fw_support;
5801         int rc;
5802         struct CfgTable __iomem *cfgtable;
5803         u32 use_doorbell;
5804         u32 board_id;
5805         u16 command_register;
5806
5807         /* For controllers as old as the P600, this is very nearly
5808          * the same thing as
5809          *
5810          * pci_save_state(pci_dev);
5811          * pci_set_power_state(pci_dev, PCI_D3hot);
5812          * pci_set_power_state(pci_dev, PCI_D0);
5813          * pci_restore_state(pci_dev);
5814          *
5815          * For controllers newer than the P600, the pci power state
5816          * method of resetting doesn't work so we have another way
5817          * using the doorbell register.
5818          */
5819
5820         rc = hpsa_lookup_board_id(pdev, &board_id);
5821         if (rc < 0) {
5822                 dev_warn(&pdev->dev, "Board ID not found\n");
5823                 return rc;
5824         }
5825         if (!ctlr_is_resettable(board_id)) {
5826                 dev_warn(&pdev->dev, "Controller not resettable\n");
5827                 return -ENODEV;
5828         }
5829
5830         /* if controller is soft- but not hard resettable... */
5831         if (!ctlr_is_hard_resettable(board_id))
5832                 return -ENOTSUPP; /* try soft reset later. */
5833
5834         /* Save the PCI command register */
5835         pci_read_config_word(pdev, 4, &command_register);
5836         pci_save_state(pdev);
5837
5838         /* find the first memory BAR, so we can find the cfg table */
5839         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
5840         if (rc)
5841                 return rc;
5842         vaddr = remap_pci_mem(paddr, 0x250);
5843         if (!vaddr)
5844                 return -ENOMEM;
5845
5846         /* find cfgtable in order to check if reset via doorbell is supported */
5847         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
5848                                         &cfg_base_addr_index, &cfg_offset);
5849         if (rc)
5850                 goto unmap_vaddr;
5851         cfgtable = remap_pci_mem(pci_resource_start(pdev,
5852                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
5853         if (!cfgtable) {
5854                 rc = -ENOMEM;
5855                 goto unmap_vaddr;
5856         }
5857         rc = write_driver_ver_to_cfgtable(cfgtable);
5858         if (rc)
5859                 goto unmap_cfgtable;
5860
5861         /* If reset via doorbell register is supported, use that.
5862          * There are two such methods.  Favor the newest method.
5863          */
5864         misc_fw_support = readl(&cfgtable->misc_fw_support);
5865         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
5866         if (use_doorbell) {
5867                 use_doorbell = DOORBELL_CTLR_RESET2;
5868         } else {
5869                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
5870                 if (use_doorbell) {
5871                         dev_warn(&pdev->dev,
5872                                 "Soft reset not supported. Firmware update is required.\n");
5873                         rc = -ENOTSUPP; /* try soft reset */
5874                         goto unmap_cfgtable;
5875                 }
5876         }
5877
5878         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
5879         if (rc)
5880                 goto unmap_cfgtable;
5881
5882         pci_restore_state(pdev);
5883         pci_write_config_word(pdev, 4, command_register);
5884
5885         /* Some devices (notably the HP Smart Array 5i Controller)
5886            need a little pause here */
5887         msleep(HPSA_POST_RESET_PAUSE_MSECS);
5888
5889         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
5890         if (rc) {
5891                 dev_warn(&pdev->dev,
5892                         "Failed waiting for board to become ready after hard reset\n");
5893                 goto unmap_cfgtable;
5894         }
5895
5896         rc = controller_reset_failed(vaddr);
5897         if (rc < 0)
5898                 goto unmap_cfgtable;
5899         if (rc) {
5900                 dev_warn(&pdev->dev, "Unable to successfully reset "
5901                         "controller. Will try soft reset.\n");
5902                 rc = -ENOTSUPP;
5903         } else {
5904                 dev_info(&pdev->dev, "board ready after hard reset.\n");
5905         }
5906
5907 unmap_cfgtable:
5908         iounmap(cfgtable);
5909
5910 unmap_vaddr:
5911         iounmap(vaddr);
5912         return rc;
5913 }
5914
5915 /*
5916  *  We cannot read the structure directly, for portability we must use
5917  *   the io functions.
5918  *   This is for debug only.
5919  */
5920 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
5921 {
5922 #ifdef HPSA_DEBUG
5923         int i;
5924         char temp_name[17];
5925
5926         dev_info(dev, "Controller Configuration information\n");
5927         dev_info(dev, "------------------------------------\n");
5928         for (i = 0; i < 4; i++)
5929                 temp_name[i] = readb(&(tb->Signature[i]));
5930         temp_name[4] = '\0';
5931         dev_info(dev, "   Signature = %s\n", temp_name);
5932         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
5933         dev_info(dev, "   Transport methods supported = 0x%x\n",
5934                readl(&(tb->TransportSupport)));
5935         dev_info(dev, "   Transport methods active = 0x%x\n",
5936                readl(&(tb->TransportActive)));
5937         dev_info(dev, "   Requested transport Method = 0x%x\n",
5938                readl(&(tb->HostWrite.TransportRequest)));
5939         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
5940                readl(&(tb->HostWrite.CoalIntDelay)));
5941         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
5942                readl(&(tb->HostWrite.CoalIntCount)));
5943         dev_info(dev, "   Max outstanding commands = %d\n",
5944                readl(&(tb->CmdsOutMax)));
5945         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
5946         for (i = 0; i < 16; i++)
5947                 temp_name[i] = readb(&(tb->ServerName[i]));
5948         temp_name[16] = '\0';
5949         dev_info(dev, "   Server Name = %s\n", temp_name);
5950         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
5951                 readl(&(tb->HeartBeat)));
5952 #endif                          /* HPSA_DEBUG */
5953 }
5954
5955 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
5956 {
5957         int i, offset, mem_type, bar_type;
5958
5959         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
5960                 return 0;
5961         offset = 0;
5962         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
5963                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
5964                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
5965                         offset += 4;
5966                 else {
5967                         mem_type = pci_resource_flags(pdev, i) &
5968                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
5969                         switch (mem_type) {
5970                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
5971                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
5972                                 offset += 4;    /* 32 bit */
5973                                 break;
5974                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
5975                                 offset += 8;
5976                                 break;
5977                         default:        /* reserved in PCI 2.2 */
5978                                 dev_warn(&pdev->dev,
5979                                        "base address is invalid\n");
5980                                 return -1;
5981                                 break;
5982                         }
5983                 }
5984                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
5985                         return i + 1;
5986         }
5987         return -1;
5988 }
5989
5990 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
5991  * controllers that are capable. If not, we use legacy INTx mode.
5992  */
5993
5994 static void hpsa_interrupt_mode(struct ctlr_info *h)
5995 {
5996 #ifdef CONFIG_PCI_MSI
5997         int err, i;
5998         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
5999
6000         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6001                 hpsa_msix_entries[i].vector = 0;
6002                 hpsa_msix_entries[i].entry = i;
6003         }
6004
6005         /* Some boards advertise MSI but don't really support it */
6006         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6007             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6008                 goto default_int_mode;
6009         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6010                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6011                 h->msix_vector = MAX_REPLY_QUEUES;
6012                 if (h->msix_vector > num_online_cpus())
6013                         h->msix_vector = num_online_cpus();
6014                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6015                                             1, h->msix_vector);
6016                 if (err < 0) {
6017                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6018                         h->msix_vector = 0;
6019                         goto single_msi_mode;
6020                 } else if (err < h->msix_vector) {
6021                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6022                                "available\n", err);
6023                 }
6024                 h->msix_vector = err;
6025                 for (i = 0; i < h->msix_vector; i++)
6026                         h->intr[i] = hpsa_msix_entries[i].vector;
6027                 return;
6028         }
6029 single_msi_mode:
6030         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6031                 dev_info(&h->pdev->dev, "MSI capable controller\n");
6032                 if (!pci_enable_msi(h->pdev))
6033                         h->msi_vector = 1;
6034                 else
6035                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6036         }
6037 default_int_mode:
6038 #endif                          /* CONFIG_PCI_MSI */
6039         /* if we get here we're going to use the default interrupt mode */
6040         h->intr[h->intr_mode] = h->pdev->irq;
6041 }
6042
6043 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6044 {
6045         int i;
6046         u32 subsystem_vendor_id, subsystem_device_id;
6047
6048         subsystem_vendor_id = pdev->subsystem_vendor;
6049         subsystem_device_id = pdev->subsystem_device;
6050         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6051                     subsystem_vendor_id;
6052
6053         for (i = 0; i < ARRAY_SIZE(products); i++)
6054                 if (*board_id == products[i].board_id)
6055                         return i;
6056
6057         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6058                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6059                 !hpsa_allow_any) {
6060                 dev_warn(&pdev->dev, "unrecognized board ID: "
6061                         "0x%08x, ignoring.\n", *board_id);
6062                         return -ENODEV;
6063         }
6064         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6065 }
6066
6067 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6068                                     unsigned long *memory_bar)
6069 {
6070         int i;
6071
6072         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6073                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6074                         /* addressing mode bits already removed */
6075                         *memory_bar = pci_resource_start(pdev, i);
6076                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6077                                 *memory_bar);
6078                         return 0;
6079                 }
6080         dev_warn(&pdev->dev, "no memory BAR found\n");
6081         return -ENODEV;
6082 }
6083
6084 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6085                                      int wait_for_ready)
6086 {
6087         int i, iterations;
6088         u32 scratchpad;
6089         if (wait_for_ready)
6090                 iterations = HPSA_BOARD_READY_ITERATIONS;
6091         else
6092                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6093
6094         for (i = 0; i < iterations; i++) {
6095                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6096                 if (wait_for_ready) {
6097                         if (scratchpad == HPSA_FIRMWARE_READY)
6098                                 return 0;
6099                 } else {
6100                         if (scratchpad != HPSA_FIRMWARE_READY)
6101                                 return 0;
6102                 }
6103                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6104         }
6105         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6106         return -ENODEV;
6107 }
6108
6109 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6110                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6111                                u64 *cfg_offset)
6112 {
6113         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6114         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6115         *cfg_base_addr &= (u32) 0x0000ffff;
6116         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6117         if (*cfg_base_addr_index == -1) {
6118                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6119                 return -ENODEV;
6120         }
6121         return 0;
6122 }
6123
6124 static int hpsa_find_cfgtables(struct ctlr_info *h)
6125 {
6126         u64 cfg_offset;
6127         u32 cfg_base_addr;
6128         u64 cfg_base_addr_index;
6129         u32 trans_offset;
6130         int rc;
6131
6132         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6133                 &cfg_base_addr_index, &cfg_offset);
6134         if (rc)
6135                 return rc;
6136         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6137                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6138         if (!h->cfgtable) {
6139                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6140                 return -ENOMEM;
6141         }
6142         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6143         if (rc)
6144                 return rc;
6145         /* Find performant mode table. */
6146         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6147         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6148                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6149                                 sizeof(*h->transtable));
6150         if (!h->transtable)
6151                 return -ENOMEM;
6152         return 0;
6153 }
6154
6155 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6156 {
6157         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
6158
6159         /* Limit commands in memory limited kdump scenario. */
6160         if (reset_devices && h->max_commands > 32)
6161                 h->max_commands = 32;
6162
6163         if (h->max_commands < 16) {
6164                 dev_warn(&h->pdev->dev, "Controller reports "
6165                         "max supported commands of %d, an obvious lie. "
6166                         "Using 16.  Ensure that firmware is up to date.\n",
6167                         h->max_commands);
6168                 h->max_commands = 16;
6169         }
6170 }
6171
6172 /* If the controller reports that the total max sg entries is greater than 512,
6173  * then we know that chained SG blocks work.  (Original smart arrays did not
6174  * support chained SG blocks and would return zero for max sg entries.)
6175  */
6176 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
6177 {
6178         return h->maxsgentries > 512;
6179 }
6180
6181 /* Interrogate the hardware for some limits:
6182  * max commands, max SG elements without chaining, and with chaining,
6183  * SG chain block size, etc.
6184  */
6185 static void hpsa_find_board_params(struct ctlr_info *h)
6186 {
6187         hpsa_get_max_perf_mode_cmds(h);
6188         h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
6189         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6190         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6191         if (hpsa_supports_chained_sg_blocks(h)) {
6192                 /* Limit in-command s/g elements to 32 save dma'able memory. */
6193                 h->max_cmd_sg_entries = 32;
6194                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6195                 h->maxsgentries--; /* save one for chain pointer */
6196         } else {
6197                 /*
6198                  * Original smart arrays supported at most 31 s/g entries
6199                  * embedded inline in the command (trying to use more
6200                  * would lock up the controller)
6201                  */
6202                 h->max_cmd_sg_entries = 31;
6203                 h->maxsgentries = 31; /* default to traditional values */
6204                 h->chainsize = 0;
6205         }
6206
6207         /* Find out what task management functions are supported and cache */
6208         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6209         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6210                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6211         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6212                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6213 }
6214
6215 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6216 {
6217         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6218                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6219                 return false;
6220         }
6221         return true;
6222 }
6223
6224 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6225 {
6226         u32 driver_support;
6227
6228         driver_support = readl(&(h->cfgtable->driver_support));
6229         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6230 #ifdef CONFIG_X86
6231         driver_support |= ENABLE_SCSI_PREFETCH;
6232 #endif
6233         driver_support |= ENABLE_UNIT_ATTN;
6234         writel(driver_support, &(h->cfgtable->driver_support));
6235 }
6236
6237 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6238  * in a prefetch beyond physical memory.
6239  */
6240 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6241 {
6242         u32 dma_prefetch;
6243
6244         if (h->board_id != 0x3225103C)
6245                 return;
6246         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6247         dma_prefetch |= 0x8000;
6248         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6249 }
6250
6251 static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6252 {
6253         int i;
6254         u32 doorbell_value;
6255         unsigned long flags;
6256         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6257         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6258                 spin_lock_irqsave(&h->lock, flags);
6259                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6260                 spin_unlock_irqrestore(&h->lock, flags);
6261                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6262                         break;
6263                 /* delay and try again */
6264                 msleep(20);
6265         }
6266 }
6267
6268 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6269 {
6270         int i;
6271         u32 doorbell_value;
6272         unsigned long flags;
6273
6274         /* under certain very rare conditions, this can take awhile.
6275          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6276          * as we enter this code.)
6277          */
6278         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6279                 spin_lock_irqsave(&h->lock, flags);
6280                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6281                 spin_unlock_irqrestore(&h->lock, flags);
6282                 if (!(doorbell_value & CFGTBL_ChangeReq))
6283                         break;
6284                 /* delay and try again */
6285                 usleep_range(10000, 20000);
6286         }
6287 }
6288
6289 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6290 {
6291         u32 trans_support;
6292
6293         trans_support = readl(&(h->cfgtable->TransportSupport));
6294         if (!(trans_support & SIMPLE_MODE))
6295                 return -ENOTSUPP;
6296
6297         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6298
6299         /* Update the field, and then ring the doorbell */
6300         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6301         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6302         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6303         hpsa_wait_for_mode_change_ack(h);
6304         print_cfg_table(&h->pdev->dev, h->cfgtable);
6305         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6306                 goto error;
6307         h->transMethod = CFGTBL_Trans_Simple;
6308         return 0;
6309 error:
6310         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
6311         return -ENODEV;
6312 }
6313
6314 static int hpsa_pci_init(struct ctlr_info *h)
6315 {
6316         int prod_index, err;
6317
6318         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6319         if (prod_index < 0)
6320                 return prod_index;
6321         h->product_name = products[prod_index].product_name;
6322         h->access = *(products[prod_index].access);
6323
6324         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6325                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6326
6327         err = pci_enable_device(h->pdev);
6328         if (err) {
6329                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6330                 return err;
6331         }
6332
6333         err = pci_request_regions(h->pdev, HPSA);
6334         if (err) {
6335                 dev_err(&h->pdev->dev,
6336                         "cannot obtain PCI resources, aborting\n");
6337                 return err;
6338         }
6339
6340         pci_set_master(h->pdev);
6341
6342         hpsa_interrupt_mode(h);
6343         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6344         if (err)
6345                 goto err_out_free_res;
6346         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6347         if (!h->vaddr) {
6348                 err = -ENOMEM;
6349                 goto err_out_free_res;
6350         }
6351         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6352         if (err)
6353                 goto err_out_free_res;
6354         err = hpsa_find_cfgtables(h);
6355         if (err)
6356                 goto err_out_free_res;
6357         hpsa_find_board_params(h);
6358
6359         if (!hpsa_CISS_signature_present(h)) {
6360                 err = -ENODEV;
6361                 goto err_out_free_res;
6362         }
6363         hpsa_set_driver_support_bits(h);
6364         hpsa_p600_dma_prefetch_quirk(h);
6365         err = hpsa_enter_simple_mode(h);
6366         if (err)
6367                 goto err_out_free_res;
6368         return 0;
6369
6370 err_out_free_res:
6371         if (h->transtable)
6372                 iounmap(h->transtable);
6373         if (h->cfgtable)
6374                 iounmap(h->cfgtable);
6375         if (h->vaddr)
6376                 iounmap(h->vaddr);
6377         pci_disable_device(h->pdev);
6378         pci_release_regions(h->pdev);
6379         return err;
6380 }
6381
6382 static void hpsa_hba_inquiry(struct ctlr_info *h)
6383 {
6384         int rc;
6385
6386 #define HBA_INQUIRY_BYTE_COUNT 64
6387         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6388         if (!h->hba_inquiry_data)
6389                 return;
6390         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6391                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6392         if (rc != 0) {
6393                 kfree(h->hba_inquiry_data);
6394                 h->hba_inquiry_data = NULL;
6395         }
6396 }
6397
6398 static int hpsa_init_reset_devices(struct pci_dev *pdev)
6399 {
6400         int rc, i;
6401         void __iomem *vaddr;
6402
6403         if (!reset_devices)
6404                 return 0;
6405
6406         /* kdump kernel is loading, we don't know in which state is
6407          * the pci interface. The dev->enable_cnt is equal zero
6408          * so we call enable+disable, wait a while and switch it on.
6409          */
6410         rc = pci_enable_device(pdev);
6411         if (rc) {
6412                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6413                 return -ENODEV;
6414         }
6415         pci_disable_device(pdev);
6416         msleep(260);                    /* a randomly chosen number */
6417         rc = pci_enable_device(pdev);
6418         if (rc) {
6419                 dev_warn(&pdev->dev, "failed to enable device.\n");
6420                 return -ENODEV;
6421         }
6422
6423         pci_set_master(pdev);
6424
6425         vaddr = pci_ioremap_bar(pdev, 0);
6426         if (vaddr == NULL) {
6427                 rc = -ENOMEM;
6428                 goto out_disable;
6429         }
6430         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
6431         iounmap(vaddr);
6432
6433         /* Reset the controller with a PCI power-cycle or via doorbell */
6434         rc = hpsa_kdump_hard_reset_controller(pdev);
6435
6436         /* -ENOTSUPP here means we cannot reset the controller
6437          * but it's already (and still) up and running in
6438          * "performant mode".  Or, it might be 640x, which can't reset
6439          * due to concerns about shared bbwc between 6402/6404 pair.
6440          */
6441         if (rc)
6442                 goto out_disable;
6443
6444         /* Now try to get the controller to respond to a no-op */
6445         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
6446         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6447                 if (hpsa_noop(pdev) == 0)
6448                         break;
6449                 else
6450                         dev_warn(&pdev->dev, "no-op failed%s\n",
6451                                         (i < 11 ? "; re-trying" : ""));
6452         }
6453
6454 out_disable:
6455
6456         pci_disable_device(pdev);
6457         return rc;
6458 }
6459
6460 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
6461 {
6462         h->cmd_pool_bits = kzalloc(
6463                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6464                 sizeof(unsigned long), GFP_KERNEL);
6465         h->cmd_pool = pci_alloc_consistent(h->pdev,
6466                     h->nr_cmds * sizeof(*h->cmd_pool),
6467                     &(h->cmd_pool_dhandle));
6468         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6469                     h->nr_cmds * sizeof(*h->errinfo_pool),
6470                     &(h->errinfo_pool_dhandle));
6471         if ((h->cmd_pool_bits == NULL)
6472             || (h->cmd_pool == NULL)
6473             || (h->errinfo_pool == NULL)) {
6474                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6475                 goto clean_up;
6476         }
6477         return 0;
6478 clean_up:
6479         hpsa_free_cmd_pool(h);
6480         return -ENOMEM;
6481 }
6482
6483 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6484 {
6485         kfree(h->cmd_pool_bits);
6486         if (h->cmd_pool)
6487                 pci_free_consistent(h->pdev,
6488                             h->nr_cmds * sizeof(struct CommandList),
6489                             h->cmd_pool, h->cmd_pool_dhandle);
6490         if (h->ioaccel2_cmd_pool)
6491                 pci_free_consistent(h->pdev,
6492                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6493                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6494         if (h->errinfo_pool)
6495                 pci_free_consistent(h->pdev,
6496                             h->nr_cmds * sizeof(struct ErrorInfo),
6497                             h->errinfo_pool,
6498                             h->errinfo_pool_dhandle);
6499         if (h->ioaccel_cmd_pool)
6500                 pci_free_consistent(h->pdev,
6501                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6502                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6503 }
6504
6505 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6506 {
6507         int i, cpu;
6508
6509         cpu = cpumask_first(cpu_online_mask);
6510         for (i = 0; i < h->msix_vector; i++) {
6511                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6512                 cpu = cpumask_next(cpu, cpu_online_mask);
6513         }
6514 }
6515
6516 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
6517 static void hpsa_free_irqs(struct ctlr_info *h)
6518 {
6519         int i;
6520
6521         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6522                 /* Single reply queue, only one irq to free */
6523                 i = h->intr_mode;
6524                 irq_set_affinity_hint(h->intr[i], NULL);
6525                 free_irq(h->intr[i], &h->q[i]);
6526                 return;
6527         }
6528
6529         for (i = 0; i < h->msix_vector; i++) {
6530                 irq_set_affinity_hint(h->intr[i], NULL);
6531                 free_irq(h->intr[i], &h->q[i]);
6532         }
6533         for (; i < MAX_REPLY_QUEUES; i++)
6534                 h->q[i] = 0;
6535 }
6536
6537 /* returns 0 on success; cleans up and returns -Enn on error */
6538 static int hpsa_request_irqs(struct ctlr_info *h,
6539         irqreturn_t (*msixhandler)(int, void *),
6540         irqreturn_t (*intxhandler)(int, void *))
6541 {
6542         int rc, i;
6543
6544         /*
6545          * initialize h->q[x] = x so that interrupt handlers know which
6546          * queue to process.
6547          */
6548         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6549                 h->q[i] = (u8) i;
6550
6551         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6552                 /* If performant mode and MSI-X, use multiple reply queues */
6553                 for (i = 0; i < h->msix_vector; i++) {
6554                         rc = request_irq(h->intr[i], msixhandler,
6555                                         0, h->devname,
6556                                         &h->q[i]);
6557                         if (rc) {
6558                                 int j;
6559
6560                                 dev_err(&h->pdev->dev,
6561                                         "failed to get irq %d for %s\n",
6562                                        h->intr[i], h->devname);
6563                                 for (j = 0; j < i; j++) {
6564                                         free_irq(h->intr[j], &h->q[j]);
6565                                         h->q[j] = 0;
6566                                 }
6567                                 for (; j < MAX_REPLY_QUEUES; j++)
6568                                         h->q[j] = 0;
6569                                 return rc;
6570                         }
6571                 }
6572                 hpsa_irq_affinity_hints(h);
6573         } else {
6574                 /* Use single reply pool */
6575                 if (h->msix_vector > 0 || h->msi_vector) {
6576                         rc = request_irq(h->intr[h->intr_mode],
6577                                 msixhandler, 0, h->devname,
6578                                 &h->q[h->intr_mode]);
6579                 } else {
6580                         rc = request_irq(h->intr[h->intr_mode],
6581                                 intxhandler, IRQF_SHARED, h->devname,
6582                                 &h->q[h->intr_mode]);
6583                 }
6584         }
6585         if (rc) {
6586                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6587                        h->intr[h->intr_mode], h->devname);
6588                 return -ENODEV;
6589         }
6590         return 0;
6591 }
6592
6593 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6594 {
6595         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6596                 HPSA_RESET_TYPE_CONTROLLER)) {
6597                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6598                 return -EIO;
6599         }
6600
6601         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6602         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6603                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6604                 return -1;
6605         }
6606
6607         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6608         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6609                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6610                         "after soft reset.\n");
6611                 return -1;
6612         }
6613
6614         return 0;
6615 }
6616
6617 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6618 {
6619         hpsa_free_irqs(h);
6620 #ifdef CONFIG_PCI_MSI
6621         if (h->msix_vector) {
6622                 if (h->pdev->msix_enabled)
6623                         pci_disable_msix(h->pdev);
6624         } else if (h->msi_vector) {
6625                 if (h->pdev->msi_enabled)
6626                         pci_disable_msi(h->pdev);
6627         }
6628 #endif /* CONFIG_PCI_MSI */
6629 }
6630
6631 static void hpsa_free_reply_queues(struct ctlr_info *h)
6632 {
6633         int i;
6634
6635         for (i = 0; i < h->nreply_queues; i++) {
6636                 if (!h->reply_queue[i].head)
6637                         continue;
6638                 pci_free_consistent(h->pdev, h->reply_queue_size,
6639                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
6640                 h->reply_queue[i].head = NULL;
6641                 h->reply_queue[i].busaddr = 0;
6642         }
6643 }
6644
6645 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
6646 {
6647         hpsa_free_irqs_and_disable_msix(h);
6648         hpsa_free_sg_chain_blocks(h);
6649         hpsa_free_cmd_pool(h);
6650         kfree(h->ioaccel1_blockFetchTable);
6651         kfree(h->blockFetchTable);
6652         hpsa_free_reply_queues(h);
6653         if (h->vaddr)
6654                 iounmap(h->vaddr);
6655         if (h->transtable)
6656                 iounmap(h->transtable);
6657         if (h->cfgtable)
6658                 iounmap(h->cfgtable);
6659         pci_disable_device(h->pdev);
6660         pci_release_regions(h->pdev);
6661         kfree(h);
6662 }
6663
6664 /* Called when controller lockup detected. */
6665 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
6666 {
6667         struct CommandList *c = NULL;
6668
6669         assert_spin_locked(&h->lock);
6670         /* Mark all outstanding commands as failed and complete them. */
6671         while (!list_empty(list)) {
6672                 c = list_entry(list->next, struct CommandList, list);
6673                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
6674                 finish_cmd(c);
6675         }
6676 }
6677
6678 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
6679 {
6680         int i, cpu;
6681
6682         cpu = cpumask_first(cpu_online_mask);
6683         for (i = 0; i < num_online_cpus(); i++) {
6684                 u32 *lockup_detected;
6685                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
6686                 *lockup_detected = value;
6687                 cpu = cpumask_next(cpu, cpu_online_mask);
6688         }
6689         wmb(); /* be sure the per-cpu variables are out to memory */
6690 }
6691
6692 static void controller_lockup_detected(struct ctlr_info *h)
6693 {
6694         unsigned long flags;
6695         u32 lockup_detected;
6696
6697         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6698         spin_lock_irqsave(&h->lock, flags);
6699         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
6700         if (!lockup_detected) {
6701                 /* no heartbeat, but controller gave us a zero. */
6702                 dev_warn(&h->pdev->dev,
6703                         "lockup detected but scratchpad register is zero\n");
6704                 lockup_detected = 0xffffffff;
6705         }
6706         set_lockup_detected_for_all_cpus(h, lockup_detected);
6707         spin_unlock_irqrestore(&h->lock, flags);
6708         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
6709                         lockup_detected);
6710         pci_disable_device(h->pdev);
6711         spin_lock_irqsave(&h->lock, flags);
6712         fail_all_cmds_on_list(h, &h->cmpQ);
6713         fail_all_cmds_on_list(h, &h->reqQ);
6714         spin_unlock_irqrestore(&h->lock, flags);
6715 }
6716
6717 static void detect_controller_lockup(struct ctlr_info *h)
6718 {
6719         u64 now;
6720         u32 heartbeat;
6721         unsigned long flags;
6722
6723         now = get_jiffies_64();
6724         /* If we've received an interrupt recently, we're ok. */
6725         if (time_after64(h->last_intr_timestamp +
6726                                 (h->heartbeat_sample_interval), now))
6727                 return;
6728
6729         /*
6730          * If we've already checked the heartbeat recently, we're ok.
6731          * This could happen if someone sends us a signal. We
6732          * otherwise don't care about signals in this thread.
6733          */
6734         if (time_after64(h->last_heartbeat_timestamp +
6735                                 (h->heartbeat_sample_interval), now))
6736                 return;
6737
6738         /* If heartbeat has not changed since we last looked, we're not ok. */
6739         spin_lock_irqsave(&h->lock, flags);
6740         heartbeat = readl(&h->cfgtable->HeartBeat);
6741         spin_unlock_irqrestore(&h->lock, flags);
6742         if (h->last_heartbeat == heartbeat) {
6743                 controller_lockup_detected(h);
6744                 return;
6745         }
6746
6747         /* We're ok. */
6748         h->last_heartbeat = heartbeat;
6749         h->last_heartbeat_timestamp = now;
6750 }
6751
6752 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
6753 {
6754         int i;
6755         char *event_type;
6756
6757         /* Clear the driver-requested rescan flag */
6758         h->drv_req_rescan = 0;
6759
6760         /* Ask the controller to clear the events we're handling. */
6761         if ((h->transMethod & (CFGTBL_Trans_io_accel1
6762                         | CFGTBL_Trans_io_accel2)) &&
6763                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
6764                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
6765
6766                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
6767                         event_type = "state change";
6768                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
6769                         event_type = "configuration change";
6770                 /* Stop sending new RAID offload reqs via the IO accelerator */
6771                 scsi_block_requests(h->scsi_host);
6772                 for (i = 0; i < h->ndevices; i++)
6773                         h->dev[i]->offload_enabled = 0;
6774                 hpsa_drain_accel_commands(h);
6775                 /* Set 'accelerator path config change' bit */
6776                 dev_warn(&h->pdev->dev,
6777                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
6778                         h->events, event_type);
6779                 writel(h->events, &(h->cfgtable->clear_event_notify));
6780                 /* Set the "clear event notify field update" bit 6 */
6781                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6782                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
6783                 hpsa_wait_for_clear_event_notify_ack(h);
6784                 scsi_unblock_requests(h->scsi_host);
6785         } else {
6786                 /* Acknowledge controller notification events. */
6787                 writel(h->events, &(h->cfgtable->clear_event_notify));
6788                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6789                 hpsa_wait_for_clear_event_notify_ack(h);
6790 #if 0
6791                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6792                 hpsa_wait_for_mode_change_ack(h);
6793 #endif
6794         }
6795         return;
6796 }
6797
6798 /* Check a register on the controller to see if there are configuration
6799  * changes (added/changed/removed logical drives, etc.) which mean that
6800  * we should rescan the controller for devices.
6801  * Also check flag for driver-initiated rescan.
6802  */
6803 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
6804 {
6805         if (h->drv_req_rescan)
6806                 return 1;
6807
6808         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6809                 return 0;
6810
6811         h->events = readl(&(h->cfgtable->event_notify));
6812         return h->events & RESCAN_REQUIRED_EVENT_BITS;
6813 }
6814
6815 /*
6816  * Check if any of the offline devices have become ready
6817  */
6818 static int hpsa_offline_devices_ready(struct ctlr_info *h)
6819 {
6820         unsigned long flags;
6821         struct offline_device_entry *d;
6822         struct list_head *this, *tmp;
6823
6824         spin_lock_irqsave(&h->offline_device_lock, flags);
6825         list_for_each_safe(this, tmp, &h->offline_device_list) {
6826                 d = list_entry(this, struct offline_device_entry,
6827                                 offline_list);
6828                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
6829                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
6830                         spin_lock_irqsave(&h->offline_device_lock, flags);
6831                         list_del(&d->offline_list);
6832                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6833                         return 1;
6834                 }
6835                 spin_lock_irqsave(&h->offline_device_lock, flags);
6836         }
6837         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6838         return 0;
6839 }
6840
6841
6842 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
6843 {
6844         unsigned long flags;
6845         struct ctlr_info *h = container_of(to_delayed_work(work),
6846                                         struct ctlr_info, monitor_ctlr_work);
6847         detect_controller_lockup(h);
6848         if (lockup_detected(h))
6849                 return;
6850
6851         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
6852                 scsi_host_get(h->scsi_host);
6853                 h->drv_req_rescan = 0;
6854                 hpsa_ack_ctlr_events(h);
6855                 hpsa_scan_start(h->scsi_host);
6856                 scsi_host_put(h->scsi_host);
6857         }
6858
6859         spin_lock_irqsave(&h->lock, flags);
6860         if (h->remove_in_progress) {
6861                 spin_unlock_irqrestore(&h->lock, flags);
6862                 return;
6863         }
6864         schedule_delayed_work(&h->monitor_ctlr_work,
6865                                 h->heartbeat_sample_interval);
6866         spin_unlock_irqrestore(&h->lock, flags);
6867 }
6868
6869 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6870 {
6871         int dac, rc;
6872         struct ctlr_info *h;
6873         int try_soft_reset = 0;
6874         unsigned long flags;
6875
6876         if (number_of_controllers == 0)
6877                 printk(KERN_INFO DRIVER_NAME "\n");
6878
6879         rc = hpsa_init_reset_devices(pdev);
6880         if (rc) {
6881                 if (rc != -ENOTSUPP)
6882                         return rc;
6883                 /* If the reset fails in a particular way (it has no way to do
6884                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
6885                  * a soft reset once we get the controller configured up to the
6886                  * point that it can accept a command.
6887                  */
6888                 try_soft_reset = 1;
6889                 rc = 0;
6890         }
6891
6892 reinit_after_soft_reset:
6893
6894         /* Command structures must be aligned on a 32-byte boundary because
6895          * the 5 lower bits of the address are used by the hardware. and by
6896          * the driver.  See comments in hpsa.h for more info.
6897          */
6898         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
6899         h = kzalloc(sizeof(*h), GFP_KERNEL);
6900         if (!h)
6901                 return -ENOMEM;
6902
6903         h->pdev = pdev;
6904         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
6905         INIT_LIST_HEAD(&h->cmpQ);
6906         INIT_LIST_HEAD(&h->reqQ);
6907         INIT_LIST_HEAD(&h->offline_device_list);
6908         spin_lock_init(&h->lock);
6909         spin_lock_init(&h->offline_device_lock);
6910         spin_lock_init(&h->scan_lock);
6911         spin_lock_init(&h->passthru_count_lock);
6912
6913         /* Allocate and clear per-cpu variable lockup_detected */
6914         h->lockup_detected = alloc_percpu(u32);
6915         if (!h->lockup_detected) {
6916                 rc = -ENOMEM;
6917                 goto clean1;
6918         }
6919         set_lockup_detected_for_all_cpus(h, 0);
6920
6921         rc = hpsa_pci_init(h);
6922         if (rc != 0)
6923                 goto clean1;
6924
6925         sprintf(h->devname, HPSA "%d", number_of_controllers);
6926         h->ctlr = number_of_controllers;
6927         number_of_controllers++;
6928
6929         /* configure PCI DMA stuff */
6930         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6931         if (rc == 0) {
6932                 dac = 1;
6933         } else {
6934                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6935                 if (rc == 0) {
6936                         dac = 0;
6937                 } else {
6938                         dev_err(&pdev->dev, "no suitable DMA available\n");
6939                         goto clean1;
6940                 }
6941         }
6942
6943         /* make sure the board interrupts are off */
6944         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6945
6946         if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
6947                 goto clean2;
6948         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
6949                h->devname, pdev->device,
6950                h->intr[h->intr_mode], dac ? "" : " not");
6951         rc = hpsa_allocate_cmd_pool(h);
6952         if (rc)
6953                 goto clean2_and_free_irqs;
6954         if (hpsa_allocate_sg_chain_blocks(h))
6955                 goto clean4;
6956         init_waitqueue_head(&h->scan_wait_queue);
6957         h->scan_finished = 1; /* no scan currently in progress */
6958
6959         pci_set_drvdata(pdev, h);
6960         h->ndevices = 0;
6961         h->hba_mode_enabled = 0;
6962         h->scsi_host = NULL;
6963         spin_lock_init(&h->devlock);
6964         hpsa_put_ctlr_into_performant_mode(h);
6965
6966         /* At this point, the controller is ready to take commands.
6967          * Now, if reset_devices and the hard reset didn't work, try
6968          * the soft reset and see if that works.
6969          */
6970         if (try_soft_reset) {
6971
6972                 /* This is kind of gross.  We may or may not get a completion
6973                  * from the soft reset command, and if we do, then the value
6974                  * from the fifo may or may not be valid.  So, we wait 10 secs
6975                  * after the reset throwing away any completions we get during
6976                  * that time.  Unregister the interrupt handler and register
6977                  * fake ones to scoop up any residual completions.
6978                  */
6979                 spin_lock_irqsave(&h->lock, flags);
6980                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
6981                 spin_unlock_irqrestore(&h->lock, flags);
6982                 hpsa_free_irqs(h);
6983                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
6984                                         hpsa_intx_discard_completions);
6985                 if (rc) {
6986                         dev_warn(&h->pdev->dev,
6987                                 "Failed to request_irq after soft reset.\n");
6988                         goto clean4;
6989                 }
6990
6991                 rc = hpsa_kdump_soft_reset(h);
6992                 if (rc)
6993                         /* Neither hard nor soft reset worked, we're hosed. */
6994                         goto clean4;
6995
6996                 dev_info(&h->pdev->dev, "Board READY.\n");
6997                 dev_info(&h->pdev->dev,
6998                         "Waiting for stale completions to drain.\n");
6999                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7000                 msleep(10000);
7001                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7002
7003                 rc = controller_reset_failed(h->cfgtable);
7004                 if (rc)
7005                         dev_info(&h->pdev->dev,
7006                                 "Soft reset appears to have failed.\n");
7007
7008                 /* since the controller's reset, we have to go back and re-init
7009                  * everything.  Easiest to just forget what we've done and do it
7010                  * all over again.
7011                  */
7012                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7013                 try_soft_reset = 0;
7014                 if (rc)
7015                         /* don't go to clean4, we already unallocated */
7016                         return -ENODEV;
7017
7018                 goto reinit_after_soft_reset;
7019         }
7020
7021                 /* Enable Accelerated IO path at driver layer */
7022                 h->acciopath_status = 1;
7023
7024         h->drv_req_rescan = 0;
7025
7026         /* Turn the interrupts on so we can service requests */
7027         h->access.set_intr_mask(h, HPSA_INTR_ON);
7028
7029         hpsa_hba_inquiry(h);
7030         hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
7031
7032         /* Monitor the controller for firmware lockups */
7033         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7034         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7035         schedule_delayed_work(&h->monitor_ctlr_work,
7036                                 h->heartbeat_sample_interval);
7037         return 0;
7038
7039 clean4:
7040         hpsa_free_sg_chain_blocks(h);
7041         hpsa_free_cmd_pool(h);
7042 clean2_and_free_irqs:
7043         hpsa_free_irqs(h);
7044 clean2:
7045 clean1:
7046         if (h->lockup_detected)
7047                 free_percpu(h->lockup_detected);
7048         kfree(h);
7049         return rc;
7050 }
7051
7052 static void hpsa_flush_cache(struct ctlr_info *h)
7053 {
7054         char *flush_buf;
7055         struct CommandList *c;
7056
7057         /* Don't bother trying to flush the cache if locked up */
7058         if (unlikely(lockup_detected(h)))
7059                 return;
7060         flush_buf = kzalloc(4, GFP_KERNEL);
7061         if (!flush_buf)
7062                 return;
7063
7064         c = cmd_special_alloc(h);
7065         if (!c) {
7066                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
7067                 goto out_of_memory;
7068         }
7069         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7070                 RAID_CTLR_LUNID, TYPE_CMD)) {
7071                 goto out;
7072         }
7073         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
7074         if (c->err_info->CommandStatus != 0)
7075 out:
7076                 dev_warn(&h->pdev->dev,
7077                         "error flushing cache on controller\n");
7078         cmd_special_free(h, c);
7079 out_of_memory:
7080         kfree(flush_buf);
7081 }
7082
7083 static void hpsa_shutdown(struct pci_dev *pdev)
7084 {
7085         struct ctlr_info *h;
7086
7087         h = pci_get_drvdata(pdev);
7088         /* Turn board interrupts off  and send the flush cache command
7089          * sendcmd will turn off interrupt, and send the flush...
7090          * To write all data in the battery backed cache to disks
7091          */
7092         hpsa_flush_cache(h);
7093         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7094         hpsa_free_irqs_and_disable_msix(h);
7095 }
7096
7097 static void hpsa_free_device_info(struct ctlr_info *h)
7098 {
7099         int i;
7100
7101         for (i = 0; i < h->ndevices; i++)
7102                 kfree(h->dev[i]);
7103 }
7104
7105 static void hpsa_remove_one(struct pci_dev *pdev)
7106 {
7107         struct ctlr_info *h;
7108         unsigned long flags;
7109
7110         if (pci_get_drvdata(pdev) == NULL) {
7111                 dev_err(&pdev->dev, "unable to remove device\n");
7112                 return;
7113         }
7114         h = pci_get_drvdata(pdev);
7115
7116         /* Get rid of any controller monitoring work items */
7117         spin_lock_irqsave(&h->lock, flags);
7118         h->remove_in_progress = 1;
7119         cancel_delayed_work(&h->monitor_ctlr_work);
7120         spin_unlock_irqrestore(&h->lock, flags);
7121
7122         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7123         hpsa_shutdown(pdev);
7124         iounmap(h->vaddr);
7125         iounmap(h->transtable);
7126         iounmap(h->cfgtable);
7127         hpsa_free_device_info(h);
7128         hpsa_free_sg_chain_blocks(h);
7129         pci_free_consistent(h->pdev,
7130                 h->nr_cmds * sizeof(struct CommandList),
7131                 h->cmd_pool, h->cmd_pool_dhandle);
7132         pci_free_consistent(h->pdev,
7133                 h->nr_cmds * sizeof(struct ErrorInfo),
7134                 h->errinfo_pool, h->errinfo_pool_dhandle);
7135         hpsa_free_reply_queues(h);
7136         kfree(h->cmd_pool_bits);
7137         kfree(h->blockFetchTable);
7138         kfree(h->ioaccel1_blockFetchTable);
7139         kfree(h->ioaccel2_blockFetchTable);
7140         kfree(h->hba_inquiry_data);
7141         pci_disable_device(pdev);
7142         pci_release_regions(pdev);
7143         free_percpu(h->lockup_detected);
7144         kfree(h);
7145 }
7146
7147 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7148         __attribute__((unused)) pm_message_t state)
7149 {
7150         return -ENOSYS;
7151 }
7152
7153 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7154 {
7155         return -ENOSYS;
7156 }
7157
7158 static struct pci_driver hpsa_pci_driver = {
7159         .name = HPSA,
7160         .probe = hpsa_init_one,
7161         .remove = hpsa_remove_one,
7162         .id_table = hpsa_pci_device_id, /* id_table */
7163         .shutdown = hpsa_shutdown,
7164         .suspend = hpsa_suspend,
7165         .resume = hpsa_resume,
7166 };
7167
7168 /* Fill in bucket_map[], given nsgs (the max number of
7169  * scatter gather elements supported) and bucket[],
7170  * which is an array of 8 integers.  The bucket[] array
7171  * contains 8 different DMA transfer sizes (in 16
7172  * byte increments) which the controller uses to fetch
7173  * commands.  This function fills in bucket_map[], which
7174  * maps a given number of scatter gather elements to one of
7175  * the 8 DMA transfer sizes.  The point of it is to allow the
7176  * controller to only do as much DMA as needed to fetch the
7177  * command, with the DMA transfer size encoded in the lower
7178  * bits of the command address.
7179  */
7180 static void  calc_bucket_map(int bucket[], int num_buckets,
7181         int nsgs, int min_blocks, u32 *bucket_map)
7182 {
7183         int i, j, b, size;
7184
7185         /* Note, bucket_map must have nsgs+1 entries. */
7186         for (i = 0; i <= nsgs; i++) {
7187                 /* Compute size of a command with i SG entries */
7188                 size = i + min_blocks;
7189                 b = num_buckets; /* Assume the biggest bucket */
7190                 /* Find the bucket that is just big enough */
7191                 for (j = 0; j < num_buckets; j++) {
7192                         if (bucket[j] >= size) {
7193                                 b = j;
7194                                 break;
7195                         }
7196                 }
7197                 /* for a command with i SG entries, use bucket b. */
7198                 bucket_map[i] = b;
7199         }
7200 }
7201
7202 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7203 {
7204         int i;
7205         unsigned long register_value;
7206         unsigned long transMethod = CFGTBL_Trans_Performant |
7207                         (trans_support & CFGTBL_Trans_use_short_tags) |
7208                                 CFGTBL_Trans_enable_directed_msix |
7209                         (trans_support & (CFGTBL_Trans_io_accel1 |
7210                                 CFGTBL_Trans_io_accel2));
7211         struct access_method access = SA5_performant_access;
7212
7213         /* This is a bit complicated.  There are 8 registers on
7214          * the controller which we write to to tell it 8 different
7215          * sizes of commands which there may be.  It's a way of
7216          * reducing the DMA done to fetch each command.  Encoded into
7217          * each command's tag are 3 bits which communicate to the controller
7218          * which of the eight sizes that command fits within.  The size of
7219          * each command depends on how many scatter gather entries there are.
7220          * Each SG entry requires 16 bytes.  The eight registers are programmed
7221          * with the number of 16-byte blocks a command of that size requires.
7222          * The smallest command possible requires 5 such 16 byte blocks.
7223          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7224          * blocks.  Note, this only extends to the SG entries contained
7225          * within the command block, and does not extend to chained blocks
7226          * of SG elements.   bft[] contains the eight values we write to
7227          * the registers.  They are not evenly distributed, but have more
7228          * sizes for small commands, and fewer sizes for larger commands.
7229          */
7230         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7231 #define MIN_IOACCEL2_BFT_ENTRY 5
7232 #define HPSA_IOACCEL2_HEADER_SZ 4
7233         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7234                         13, 14, 15, 16, 17, 18, 19,
7235                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7236         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7237         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7238         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7239                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7240         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7241         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7242         /*  5 = 1 s/g entry or 4k
7243          *  6 = 2 s/g entry or 8k
7244          *  8 = 4 s/g entry or 16k
7245          * 10 = 6 s/g entry or 24k
7246          */
7247
7248         /* If the controller supports either ioaccel method then
7249          * we can also use the RAID stack submit path that does not
7250          * perform the superfluous readl() after each command submission.
7251          */
7252         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7253                 access = SA5_performant_access_no_read;
7254
7255         /* Controller spec: zero out this buffer. */
7256         for (i = 0; i < h->nreply_queues; i++)
7257                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7258
7259         bft[7] = SG_ENTRIES_IN_CMD + 4;
7260         calc_bucket_map(bft, ARRAY_SIZE(bft),
7261                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7262         for (i = 0; i < 8; i++)
7263                 writel(bft[i], &h->transtable->BlockFetch[i]);
7264
7265         /* size of controller ring buffer */
7266         writel(h->max_commands, &h->transtable->RepQSize);
7267         writel(h->nreply_queues, &h->transtable->RepQCount);
7268         writel(0, &h->transtable->RepQCtrAddrLow32);
7269         writel(0, &h->transtable->RepQCtrAddrHigh32);
7270
7271         for (i = 0; i < h->nreply_queues; i++) {
7272                 writel(0, &h->transtable->RepQAddr[i].upper);
7273                 writel(h->reply_queue[i].busaddr,
7274                         &h->transtable->RepQAddr[i].lower);
7275         }
7276
7277         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7278         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7279         /*
7280          * enable outbound interrupt coalescing in accelerator mode;
7281          */
7282         if (trans_support & CFGTBL_Trans_io_accel1) {
7283                 access = SA5_ioaccel_mode1_access;
7284                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7285                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7286         } else {
7287                 if (trans_support & CFGTBL_Trans_io_accel2) {
7288                         access = SA5_ioaccel_mode2_access;
7289                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7290                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7291                 }
7292         }
7293         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7294         hpsa_wait_for_mode_change_ack(h);
7295         register_value = readl(&(h->cfgtable->TransportActive));
7296         if (!(register_value & CFGTBL_Trans_Performant)) {
7297                 dev_err(&h->pdev->dev,
7298                         "performant mode problem - transport not active\n");
7299                 return;
7300         }
7301         /* Change the access methods to the performant access methods */
7302         h->access = access;
7303         h->transMethod = transMethod;
7304
7305         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7306                 (trans_support & CFGTBL_Trans_io_accel2)))
7307                 return;
7308
7309         if (trans_support & CFGTBL_Trans_io_accel1) {
7310                 /* Set up I/O accelerator mode */
7311                 for (i = 0; i < h->nreply_queues; i++) {
7312                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7313                         h->reply_queue[i].current_entry =
7314                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7315                 }
7316                 bft[7] = h->ioaccel_maxsg + 8;
7317                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7318                                 h->ioaccel1_blockFetchTable);
7319
7320                 /* initialize all reply queue entries to unused */
7321                 for (i = 0; i < h->nreply_queues; i++)
7322                         memset(h->reply_queue[i].head,
7323                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7324                                 h->reply_queue_size);
7325
7326                 /* set all the constant fields in the accelerator command
7327                  * frames once at init time to save CPU cycles later.
7328                  */
7329                 for (i = 0; i < h->nr_cmds; i++) {
7330                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7331
7332                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7333                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7334                                         (i * sizeof(struct ErrorInfo)));
7335                         cp->err_info_len = sizeof(struct ErrorInfo);
7336                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7337                         cp->host_context_flags =
7338                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
7339                         cp->timeout_sec = 0;
7340                         cp->ReplyQueue = 0;
7341                         cp->tag =
7342                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT) |
7343                                                 DIRECT_LOOKUP_BIT);
7344                         cp->host_addr =
7345                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7346                                         (i * sizeof(struct io_accel1_cmd)));
7347                 }
7348         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7349                 u64 cfg_offset, cfg_base_addr_index;
7350                 u32 bft2_offset, cfg_base_addr;
7351                 int rc;
7352
7353                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7354                         &cfg_base_addr_index, &cfg_offset);
7355                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7356                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7357                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7358                                 4, h->ioaccel2_blockFetchTable);
7359                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7360                 BUILD_BUG_ON(offsetof(struct CfgTable,
7361                                 io_accel_request_size_offset) != 0xb8);
7362                 h->ioaccel2_bft2_regs =
7363                         remap_pci_mem(pci_resource_start(h->pdev,
7364                                         cfg_base_addr_index) +
7365                                         cfg_offset + bft2_offset,
7366                                         ARRAY_SIZE(bft2) *
7367                                         sizeof(*h->ioaccel2_bft2_regs));
7368                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7369                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7370         }
7371         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7372         hpsa_wait_for_mode_change_ack(h);
7373 }
7374
7375 static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
7376 {
7377         h->ioaccel_maxsg =
7378                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7379         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7380                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7381
7382         /* Command structures must be aligned on a 128-byte boundary
7383          * because the 7 lower bits of the address are used by the
7384          * hardware.
7385          */
7386         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7387                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7388         h->ioaccel_cmd_pool =
7389                 pci_alloc_consistent(h->pdev,
7390                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7391                         &(h->ioaccel_cmd_pool_dhandle));
7392
7393         h->ioaccel1_blockFetchTable =
7394                 kmalloc(((h->ioaccel_maxsg + 1) *
7395                                 sizeof(u32)), GFP_KERNEL);
7396
7397         if ((h->ioaccel_cmd_pool == NULL) ||
7398                 (h->ioaccel1_blockFetchTable == NULL))
7399                 goto clean_up;
7400
7401         memset(h->ioaccel_cmd_pool, 0,
7402                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7403         return 0;
7404
7405 clean_up:
7406         if (h->ioaccel_cmd_pool)
7407                 pci_free_consistent(h->pdev,
7408                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7409                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7410         kfree(h->ioaccel1_blockFetchTable);
7411         return 1;
7412 }
7413
7414 static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
7415 {
7416         /* Allocate ioaccel2 mode command blocks and block fetch table */
7417
7418         h->ioaccel_maxsg =
7419                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7420         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7421                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7422
7423         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7424                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7425         h->ioaccel2_cmd_pool =
7426                 pci_alloc_consistent(h->pdev,
7427                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7428                         &(h->ioaccel2_cmd_pool_dhandle));
7429
7430         h->ioaccel2_blockFetchTable =
7431                 kmalloc(((h->ioaccel_maxsg + 1) *
7432                                 sizeof(u32)), GFP_KERNEL);
7433
7434         if ((h->ioaccel2_cmd_pool == NULL) ||
7435                 (h->ioaccel2_blockFetchTable == NULL))
7436                 goto clean_up;
7437
7438         memset(h->ioaccel2_cmd_pool, 0,
7439                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7440         return 0;
7441
7442 clean_up:
7443         if (h->ioaccel2_cmd_pool)
7444                 pci_free_consistent(h->pdev,
7445                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7446                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7447         kfree(h->ioaccel2_blockFetchTable);
7448         return 1;
7449 }
7450
7451 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7452 {
7453         u32 trans_support;
7454         unsigned long transMethod = CFGTBL_Trans_Performant |
7455                                         CFGTBL_Trans_use_short_tags;
7456         int i;
7457
7458         if (hpsa_simple_mode)
7459                 return;
7460
7461         trans_support = readl(&(h->cfgtable->TransportSupport));
7462         if (!(trans_support & PERFORMANT_MODE))
7463                 return;
7464
7465         /* Check for I/O accelerator mode support */
7466         if (trans_support & CFGTBL_Trans_io_accel1) {
7467                 transMethod |= CFGTBL_Trans_io_accel1 |
7468                                 CFGTBL_Trans_enable_directed_msix;
7469                 if (hpsa_alloc_ioaccel_cmd_and_bft(h))
7470                         goto clean_up;
7471         } else {
7472                 if (trans_support & CFGTBL_Trans_io_accel2) {
7473                                 transMethod |= CFGTBL_Trans_io_accel2 |
7474                                 CFGTBL_Trans_enable_directed_msix;
7475                 if (ioaccel2_alloc_cmds_and_bft(h))
7476                         goto clean_up;
7477                 }
7478         }
7479
7480         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7481         hpsa_get_max_perf_mode_cmds(h);
7482         /* Performant mode ring buffer and supporting data structures */
7483         h->reply_queue_size = h->max_commands * sizeof(u64);
7484
7485         for (i = 0; i < h->nreply_queues; i++) {
7486                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7487                                                 h->reply_queue_size,
7488                                                 &(h->reply_queue[i].busaddr));
7489                 if (!h->reply_queue[i].head)
7490                         goto clean_up;
7491                 h->reply_queue[i].size = h->max_commands;
7492                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7493                 h->reply_queue[i].current_entry = 0;
7494         }
7495
7496         /* Need a block fetch table for performant mode */
7497         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7498                                 sizeof(u32)), GFP_KERNEL);
7499         if (!h->blockFetchTable)
7500                 goto clean_up;
7501
7502         hpsa_enter_performant_mode(h, trans_support);
7503         return;
7504
7505 clean_up:
7506         hpsa_free_reply_queues(h);
7507         kfree(h->blockFetchTable);
7508 }
7509
7510 static int is_accelerated_cmd(struct CommandList *c)
7511 {
7512         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7513 }
7514
7515 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7516 {
7517         struct CommandList *c = NULL;
7518         unsigned long flags;
7519         int accel_cmds_out;
7520
7521         do { /* wait for all outstanding commands to drain out */
7522                 accel_cmds_out = 0;
7523                 spin_lock_irqsave(&h->lock, flags);
7524                 list_for_each_entry(c, &h->cmpQ, list)
7525                         accel_cmds_out += is_accelerated_cmd(c);
7526                 list_for_each_entry(c, &h->reqQ, list)
7527                         accel_cmds_out += is_accelerated_cmd(c);
7528                 spin_unlock_irqrestore(&h->lock, flags);
7529                 if (accel_cmds_out <= 0)
7530                         break;
7531                 msleep(100);
7532         } while (1);
7533 }
7534
7535 /*
7536  *  This is it.  Register the PCI driver information for the cards we control
7537  *  the OS will call our registered routines when it finds one of our cards.
7538  */
7539 static int __init hpsa_init(void)
7540 {
7541         return pci_register_driver(&hpsa_pci_driver);
7542 }
7543
7544 static void __exit hpsa_cleanup(void)
7545 {
7546         pci_unregister_driver(&hpsa_pci_driver);
7547 }
7548
7549 static void __attribute__((unused)) verify_offsets(void)
7550 {
7551 #define VERIFY_OFFSET(member, offset) \
7552         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
7553
7554         VERIFY_OFFSET(structure_size, 0);
7555         VERIFY_OFFSET(volume_blk_size, 4);
7556         VERIFY_OFFSET(volume_blk_cnt, 8);
7557         VERIFY_OFFSET(phys_blk_shift, 16);
7558         VERIFY_OFFSET(parity_rotation_shift, 17);
7559         VERIFY_OFFSET(strip_size, 18);
7560         VERIFY_OFFSET(disk_starting_blk, 20);
7561         VERIFY_OFFSET(disk_blk_cnt, 28);
7562         VERIFY_OFFSET(data_disks_per_row, 36);
7563         VERIFY_OFFSET(metadata_disks_per_row, 38);
7564         VERIFY_OFFSET(row_cnt, 40);
7565         VERIFY_OFFSET(layout_map_count, 42);
7566         VERIFY_OFFSET(flags, 44);
7567         VERIFY_OFFSET(dekindex, 46);
7568         /* VERIFY_OFFSET(reserved, 48 */
7569         VERIFY_OFFSET(data, 64);
7570
7571 #undef VERIFY_OFFSET
7572
7573 #define VERIFY_OFFSET(member, offset) \
7574         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
7575
7576         VERIFY_OFFSET(IU_type, 0);
7577         VERIFY_OFFSET(direction, 1);
7578         VERIFY_OFFSET(reply_queue, 2);
7579         /* VERIFY_OFFSET(reserved1, 3);  */
7580         VERIFY_OFFSET(scsi_nexus, 4);
7581         VERIFY_OFFSET(Tag, 8);
7582         VERIFY_OFFSET(cdb, 16);
7583         VERIFY_OFFSET(cciss_lun, 32);
7584         VERIFY_OFFSET(data_len, 40);
7585         VERIFY_OFFSET(cmd_priority_task_attr, 44);
7586         VERIFY_OFFSET(sg_count, 45);
7587         /* VERIFY_OFFSET(reserved3 */
7588         VERIFY_OFFSET(err_ptr, 48);
7589         VERIFY_OFFSET(err_len, 56);
7590         /* VERIFY_OFFSET(reserved4  */
7591         VERIFY_OFFSET(sg, 64);
7592
7593 #undef VERIFY_OFFSET
7594
7595 #define VERIFY_OFFSET(member, offset) \
7596         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
7597
7598         VERIFY_OFFSET(dev_handle, 0x00);
7599         VERIFY_OFFSET(reserved1, 0x02);
7600         VERIFY_OFFSET(function, 0x03);
7601         VERIFY_OFFSET(reserved2, 0x04);
7602         VERIFY_OFFSET(err_info, 0x0C);
7603         VERIFY_OFFSET(reserved3, 0x10);
7604         VERIFY_OFFSET(err_info_len, 0x12);
7605         VERIFY_OFFSET(reserved4, 0x13);
7606         VERIFY_OFFSET(sgl_offset, 0x14);
7607         VERIFY_OFFSET(reserved5, 0x15);
7608         VERIFY_OFFSET(transfer_len, 0x1C);
7609         VERIFY_OFFSET(reserved6, 0x20);
7610         VERIFY_OFFSET(io_flags, 0x24);
7611         VERIFY_OFFSET(reserved7, 0x26);
7612         VERIFY_OFFSET(LUN, 0x34);
7613         VERIFY_OFFSET(control, 0x3C);
7614         VERIFY_OFFSET(CDB, 0x40);
7615         VERIFY_OFFSET(reserved8, 0x50);
7616         VERIFY_OFFSET(host_context_flags, 0x60);
7617         VERIFY_OFFSET(timeout_sec, 0x62);
7618         VERIFY_OFFSET(ReplyQueue, 0x64);
7619         VERIFY_OFFSET(reserved9, 0x65);
7620         VERIFY_OFFSET(tag, 0x68);
7621         VERIFY_OFFSET(host_addr, 0x70);
7622         VERIFY_OFFSET(CISS_LUN, 0x78);
7623         VERIFY_OFFSET(SG, 0x78 + 8);
7624 #undef VERIFY_OFFSET
7625 }
7626
7627 module_init(hpsa_init);
7628 module_exit(hpsa_cleanup);