drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2014-2015 PMC-Sierra, Inc.
   4  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; version 2 of the License.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    Questions/Comments/Bugfixes to storagedev@pmcs.com
  16  *
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/types.h>
  22 #include <linux/pci.h>
  23 #include <linux/pci-aspm.h>
  24 #include <linux/kernel.h>
  25 #include <linux/slab.h>
  26 #include <linux/delay.h>
  27 #include <linux/fs.h>
  28 #include <linux/timer.h>
  29 #include <linux/init.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/compat.h>
  32 #include <linux/blktrace_api.h>
  33 #include <linux/uaccess.h>
  34 #include <linux/io.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/completion.h>
  37 #include <linux/moduleparam.h>
  38 #include <scsi/scsi.h>
  39 #include <scsi/scsi_cmnd.h>
  40 #include <scsi/scsi_device.h>
  41 #include <scsi/scsi_host.h>
  42 #include <scsi/scsi_tcq.h>
  43 #include <scsi/scsi_eh.h>
  44 #include <scsi/scsi_dbg.h>
  45 #include <linux/cciss_ioctl.h>
  46 #include <linux/string.h>
  47 #include <linux/bitmap.h>
  48 #include <linux/atomic.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/percpu-defs.h>
  51 #include <linux/percpu.h>
  52 #include <asm/unaligned.h>
  53 #include <asm/div64.h>
  54 #include "hpsa_cmd.h"
  55 #include "hpsa.h"
  56
  57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  58 #define HPSA_DRIVER_VERSION "3.4.10-0"
  59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  60 #define HPSA "hpsa"
  61
  62 /* How long to wait for CISS doorbell communication */
  63 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
  64 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
  65 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
  66 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
  67 #define MAX_IOCTL_CONFIG_WAIT 1000
  68
  69 /*define how many times we will try a command because of bus resets */
  70 #define MAX_CMD_RETRIES 3
  71
  72 /* Embedded module documentation macros - see modules.h */
  73 MODULE_AUTHOR("Hewlett-Packard Company");
  74 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  75         HPSA_DRIVER_VERSION);
  76 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  77 MODULE_VERSION(HPSA_DRIVER_VERSION);
  78 MODULE_LICENSE("GPL");
  79
  80 static int hpsa_allow_any;
  81 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(hpsa_allow_any,
  83                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  84 static int hpsa_simple_mode;
  85 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  86 MODULE_PARM_DESC(hpsa_simple_mode,
  87         "Use 'simple mode' rather than 'performant mode'");
  88
  89 /* define the PCI info for the cards we can control */
  90 static const struct pci_device_id hpsa_pci_device_id[] = {
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 131         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
 132         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
 133         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
 134         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
 135         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
 136         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
 137         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 138         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 139         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 140         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 141         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 142         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 143                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 144         {0,}
 145 };
 146
 147 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 148
 149 /*  board_id = Subsystem Device ID & Vendor ID
 150  *  product = Marketing Name for the board
 151  *  access = Address of the struct of function pointers
 152  */
 153 static struct board_type products[] = {
 154         {0x3241103C, "Smart Array P212", &SA5_access},
 155         {0x3243103C, "Smart Array P410", &SA5_access},
 156         {0x3245103C, "Smart Array P410i", &SA5_access},
 157         {0x3247103C, "Smart Array P411", &SA5_access},
 158         {0x3249103C, "Smart Array P812", &SA5_access},
 159         {0x324A103C, "Smart Array P712m", &SA5_access},
 160         {0x324B103C, "Smart Array P711m", &SA5_access},
 161         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 162         {0x3350103C, "Smart Array P222", &SA5_access},
 163         {0x3351103C, "Smart Array P420", &SA5_access},
 164         {0x3352103C, "Smart Array P421", &SA5_access},
 165         {0x3353103C, "Smart Array P822", &SA5_access},
 166         {0x3354103C, "Smart Array P420i", &SA5_access},
 167         {0x3355103C, "Smart Array P220i", &SA5_access},
 168         {0x3356103C, "Smart Array P721m", &SA5_access},
 169         {0x1921103C, "Smart Array P830i", &SA5_access},
 170         {0x1922103C, "Smart Array P430", &SA5_access},
 171         {0x1923103C, "Smart Array P431", &SA5_access},
 172         {0x1924103C, "Smart Array P830", &SA5_access},
 173         {0x1926103C, "Smart Array P731m", &SA5_access},
 174         {0x1928103C, "Smart Array P230i", &SA5_access},
 175         {0x1929103C, "Smart Array P530", &SA5_access},
 176         {0x21BD103C, "Smart Array P244br", &SA5_access},
 177         {0x21BE103C, "Smart Array P741m", &SA5_access},
 178         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
 179         {0x21C0103C, "Smart Array P440ar", &SA5_access},
 180         {0x21C1103C, "Smart Array P840ar", &SA5_access},
 181         {0x21C2103C, "Smart Array P440", &SA5_access},
 182         {0x21C3103C, "Smart Array P441", &SA5_access},
 183         {0x21C4103C, "Smart Array", &SA5_access},
 184         {0x21C5103C, "Smart Array P841", &SA5_access},
 185         {0x21C6103C, "Smart HBA H244br", &SA5_access},
 186         {0x21C7103C, "Smart HBA H240", &SA5_access},
 187         {0x21C8103C, "Smart HBA H241", &SA5_access},
 188         {0x21C9103C, "Smart Array", &SA5_access},
 189         {0x21CA103C, "Smart Array P246br", &SA5_access},
 190         {0x21CB103C, "Smart Array P840", &SA5_access},
 191         {0x21CC103C, "Smart Array", &SA5_access},
 192         {0x21CD103C, "Smart Array", &SA5_access},
 193         {0x21CE103C, "Smart HBA", &SA5_access},
 194         {0x05809005, "SmartHBA-SA", &SA5_access},
 195         {0x05819005, "SmartHBA-SA 8i", &SA5_access},
 196         {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
 197         {0x05839005, "SmartHBA-SA 8e", &SA5_access},
 198         {0x05849005, "SmartHBA-SA 16i", &SA5_access},
 199         {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
 200         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 201         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 202         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 203         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 204         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 205         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 206 };
 207
 208 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
 209 static const struct scsi_cmnd hpsa_cmd_busy;
 210 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
 211 static const struct scsi_cmnd hpsa_cmd_idle;
 212 static int number_of_controllers;
 213
 214 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 215 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 216 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 217
 218 #ifdef CONFIG_COMPAT
 219 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 220         void __user *arg);
 221 #endif
 222
 223 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 224 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 225 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
 226 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
 227                                             struct scsi_cmnd *scmd);
 228 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 229         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 230         int cmd_type);
 231 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 232 #define VPD_PAGE (1 << 8)
 233 #define HPSA_SIMPLE_ERROR_BITS 0x03
 234
 235 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 236 static void hpsa_scan_start(struct Scsi_Host *);
 237 static int hpsa_scan_finished(struct Scsi_Host *sh,
 238         unsigned long elapsed_time);
 239 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 240
 241 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 242 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 243 static int hpsa_slave_alloc(struct scsi_device *sdev);
 244 static int hpsa_slave_configure(struct scsi_device *sdev);
 245 static void hpsa_slave_destroy(struct scsi_device *sdev);
 246
 247 static void hpsa_update_scsi_devices(struct ctlr_info *h);
 248 static int check_for_unit_attention(struct ctlr_info *h,
 249         struct CommandList *c);
 250 static void check_ioctl_unit_attention(struct ctlr_info *h,
 251         struct CommandList *c);
 252 /* performant mode helper functions */
 253 static void calc_bucket_map(int *bucket, int num_buckets,
 254         int nsgs, int min_blocks, u32 *bucket_map);
 255 static void hpsa_free_performant_mode(struct ctlr_info *h);
 256 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 257 static inline u32 next_command(struct ctlr_info *h, u8 q);
 258 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 259                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 260                                u64 *cfg_offset);
 261 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 262                                     unsigned long *memory_bar);
 263 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 264 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 265                                      int wait_for_ready);
 266 static inline void finish_cmd(struct CommandList *c);
 267 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 268 #define BOARD_NOT_READY 0
 269 #define BOARD_READY 1
 270 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 271 static void hpsa_flush_cache(struct ctlr_info *h);
 272 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 273         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 274         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 275 static void hpsa_command_resubmit_worker(struct work_struct *work);
 276 static u32 lockup_detected(struct ctlr_info *h);
 277 static int detect_controller_lockup(struct ctlr_info *h);
 278 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device);
 279
 280 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 281 {
 282         unsigned long *priv = shost_priv(sdev->host);
 283         return (struct ctlr_info *) *priv;
 284 }
 285
 286 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 287 {
 288         unsigned long *priv = shost_priv(sh);
 289         return (struct ctlr_info *) *priv;
 290 }
 291
 292 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
 293 {
 294         return c->scsi_cmd == SCSI_CMD_IDLE;
 295 }
 296
 297 static inline bool hpsa_is_pending_event(struct CommandList *c)
 298 {
 299         return c->abort_pending || c->reset_pending;
 300 }
 301
 302 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
 303 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
 304                         u8 *sense_key, u8 *asc, u8 *ascq)
 305 {
 306         struct scsi_sense_hdr sshdr;
 307         bool rc;
 308
 309         *sense_key = -1;
 310         *asc = -1;
 311         *ascq = -1;
 312
 313         if (sense_data_len < 1)
 314                 return;
 315
 316         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
 317         if (rc) {
 318                 *sense_key = sshdr.sense_key;
 319                 *asc = sshdr.asc;
 320                 *ascq = sshdr.ascq;
 321         }
 322 }
 323
 324 static int check_for_unit_attention(struct ctlr_info *h,
 325         struct CommandList *c)
 326 {
 327         u8 sense_key, asc, ascq;
 328         int sense_len;
 329
 330         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
 331                 sense_len = sizeof(c->err_info->SenseInfo);
 332         else
 333                 sense_len = c->err_info->SenseLen;
 334
 335         decode_sense_data(c->err_info->SenseInfo, sense_len,
 336                                 &sense_key, &asc, &ascq);
 337         if (sense_key != UNIT_ATTENTION || asc == 0xff)
 338                 return 0;
 339
 340         switch (asc) {
 341         case STATE_CHANGED:
 342                 dev_warn(&h->pdev->dev,
 343                         "%s: a state change detected, command retried\n",
 344                         h->devname);
 345                 break;
 346         case LUN_FAILED:
 347                 dev_warn(&h->pdev->dev,
 348                         "%s: LUN failure detected\n", h->devname);
 349                 break;
 350         case REPORT_LUNS_CHANGED:
 351                 dev_warn(&h->pdev->dev,
 352                         "%s: report LUN data changed\n", h->devname);
 353         /*
 354          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 355          * target (array) devices.
 356          */
 357                 break;
 358         case POWER_OR_RESET:
 359                 dev_warn(&h->pdev->dev,
 360                         "%s: a power on or device reset detected\n",
 361                         h->devname);
 362                 break;
 363         case UNIT_ATTENTION_CLEARED:
 364                 dev_warn(&h->pdev->dev,
 365                         "%s: unit attention cleared by another initiator\n",
 366                         h->devname);
 367                 break;
 368         default:
 369                 dev_warn(&h->pdev->dev,
 370                         "%s: unknown unit attention detected\n",
 371                         h->devname);
 372                 break;
 373         }
 374         return 1;
 375 }
 376
 377 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 378 {
 379         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 380                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 381                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 382                 return 0;
 383         dev_warn(&h->pdev->dev, HPSA "device busy");
 384         return 1;
 385 }
 386
 387 static u32 lockup_detected(struct ctlr_info *h);
 388 static ssize_t host_show_lockup_detected(struct device *dev,
 389                 struct device_attribute *attr, char *buf)
 390 {
 391         int ld;
 392         struct ctlr_info *h;
 393         struct Scsi_Host *shost = class_to_shost(dev);
 394
 395         h = shost_to_hba(shost);
 396         ld = lockup_detected(h);
 397
 398         return sprintf(buf, "ld=%d\n", ld);
 399 }
 400
 401 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 402                                          struct device_attribute *attr,
 403                                          const char *buf, size_t count)
 404 {
 405         int status, len;
 406         struct ctlr_info *h;
 407         struct Scsi_Host *shost = class_to_shost(dev);
 408         char tmpbuf[10];
 409
 410         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 411                 return -EACCES;
 412         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 413         strncpy(tmpbuf, buf, len);
 414         tmpbuf[len] = '\0';
 415         if (sscanf(tmpbuf, "%d", &status) != 1)
 416                 return -EINVAL;
 417         h = shost_to_hba(shost);
 418         h->acciopath_status = !!status;
 419         dev_warn(&h->pdev->dev,
 420                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 421                 h->acciopath_status ? "enabled" : "disabled");
 422         return count;
 423 }
 424
 425 static ssize_t host_store_raid_offload_debug(struct device *dev,
 426                                          struct device_attribute *attr,
 427                                          const char *buf, size_t count)
 428 {
 429         int debug_level, len;
 430         struct ctlr_info *h;
 431         struct Scsi_Host *shost = class_to_shost(dev);
 432         char tmpbuf[10];
 433
 434         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 435                 return -EACCES;
 436         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 437         strncpy(tmpbuf, buf, len);
 438         tmpbuf[len] = '\0';
 439         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 440                 return -EINVAL;
 441         if (debug_level < 0)
 442                 debug_level = 0;
 443         h = shost_to_hba(shost);
 444         h->raid_offload_debug = debug_level;
 445         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 446                 h->raid_offload_debug);
 447         return count;
 448 }
 449
 450 static ssize_t host_store_rescan(struct device *dev,
 451                                  struct device_attribute *attr,
 452                                  const char *buf, size_t count)
 453 {
 454         struct ctlr_info *h;
 455         struct Scsi_Host *shost = class_to_shost(dev);
 456         h = shost_to_hba(shost);
 457         hpsa_scan_start(h->scsi_host);
 458         return count;
 459 }
 460
 461 static ssize_t host_show_firmware_revision(struct device *dev,
 462              struct device_attribute *attr, char *buf)
 463 {
 464         struct ctlr_info *h;
 465         struct Scsi_Host *shost = class_to_shost(dev);
 466         unsigned char *fwrev;
 467
 468         h = shost_to_hba(shost);
 469         if (!h->hba_inquiry_data)
 470                 return 0;
 471         fwrev = &h->hba_inquiry_data[32];
 472         return snprintf(buf, 20, "%c%c%c%c\n",
 473                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 474 }
 475
 476 static ssize_t host_show_commands_outstanding(struct device *dev,
 477              struct device_attribute *attr, char *buf)
 478 {
 479         struct Scsi_Host *shost = class_to_shost(dev);
 480         struct ctlr_info *h = shost_to_hba(shost);
 481
 482         return snprintf(buf, 20, "%d\n",
 483                         atomic_read(&h->commands_outstanding));
 484 }
 485
 486 static ssize_t host_show_transport_mode(struct device *dev,
 487         struct device_attribute *attr, char *buf)
 488 {
 489         struct ctlr_info *h;
 490         struct Scsi_Host *shost = class_to_shost(dev);
 491
 492         h = shost_to_hba(shost);
 493         return snprintf(buf, 20, "%s\n",
 494                 h->transMethod & CFGTBL_Trans_Performant ?
 495                         "performant" : "simple");
 496 }
 497
 498 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 499         struct device_attribute *attr, char *buf)
 500 {
 501         struct ctlr_info *h;
 502         struct Scsi_Host *shost = class_to_shost(dev);
 503
 504         h = shost_to_hba(shost);
 505         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 506                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 507 }
 508
 509 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 510 static u32 unresettable_controller[] = {
 511         0x324a103C, /* Smart Array P712m */
 512         0x324b103C, /* Smart Array P711m */
 513         0x3223103C, /* Smart Array P800 */
 514         0x3234103C, /* Smart Array P400 */
 515         0x3235103C, /* Smart Array P400i */
 516         0x3211103C, /* Smart Array E200i */
 517         0x3212103C, /* Smart Array E200 */
 518         0x3213103C, /* Smart Array E200i */
 519         0x3214103C, /* Smart Array E200i */
 520         0x3215103C, /* Smart Array E200i */
 521         0x3237103C, /* Smart Array E500 */
 522         0x323D103C, /* Smart Array P700m */
 523         0x40800E11, /* Smart Array 5i */
 524         0x409C0E11, /* Smart Array 6400 */
 525         0x409D0E11, /* Smart Array 6400 EM */
 526         0x40700E11, /* Smart Array 5300 */
 527         0x40820E11, /* Smart Array 532 */
 528         0x40830E11, /* Smart Array 5312 */
 529         0x409A0E11, /* Smart Array 641 */
 530         0x409B0E11, /* Smart Array 642 */
 531         0x40910E11, /* Smart Array 6i */
 532 };
 533
 534 /* List of controllers which cannot even be soft reset */
 535 static u32 soft_unresettable_controller[] = {
 536         0x40800E11, /* Smart Array 5i */
 537         0x40700E11, /* Smart Array 5300 */
 538         0x40820E11, /* Smart Array 532 */
 539         0x40830E11, /* Smart Array 5312 */
 540         0x409A0E11, /* Smart Array 641 */
 541         0x409B0E11, /* Smart Array 642 */
 542         0x40910E11, /* Smart Array 6i */
 543         /* Exclude 640x boards.  These are two pci devices in one slot
 544          * which share a battery backed cache module.  One controls the
 545          * cache, the other accesses the cache through the one that controls
 546          * it.  If we reset the one controlling the cache, the other will
 547          * likely not be happy.  Just forbid resetting this conjoined mess.
 548          * The 640x isn't really supported by hpsa anyway.
 549          */
 550         0x409C0E11, /* Smart Array 6400 */
 551         0x409D0E11, /* Smart Array 6400 EM */
 552 };
 553
 554 static u32 needs_abort_tags_swizzled[] = {
 555         0x323D103C, /* Smart Array P700m */
 556         0x324a103C, /* Smart Array P712m */
 557         0x324b103C, /* SmartArray P711m */
 558 };
 559
 560 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
 561 {
 562         int i;
 563
 564         for (i = 0; i < nelems; i++)
 565                 if (a[i] == board_id)
 566                         return 1;
 567         return 0;
 568 }
 569
 570 static int ctlr_is_hard_resettable(u32 board_id)
 571 {
 572         return !board_id_in_array(unresettable_controller,
 573                         ARRAY_SIZE(unresettable_controller), board_id);
 574 }
 575
 576 static int ctlr_is_soft_resettable(u32 board_id)
 577 {
 578         return !board_id_in_array(soft_unresettable_controller,
 579                         ARRAY_SIZE(soft_unresettable_controller), board_id);
 580 }
 581
 582 static int ctlr_is_resettable(u32 board_id)
 583 {
 584         return ctlr_is_hard_resettable(board_id) ||
 585                 ctlr_is_soft_resettable(board_id);
 586 }
 587
 588 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
 589 {
 590         return board_id_in_array(needs_abort_tags_swizzled,
 591                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
 592 }
 593
 594 static ssize_t host_show_resettable(struct device *dev,
 595         struct device_attribute *attr, char *buf)
 596 {
 597         struct ctlr_info *h;
 598         struct Scsi_Host *shost = class_to_shost(dev);
 599
 600         h = shost_to_hba(shost);
 601         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 602 }
 603
 604 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 605 {
 606         return (scsi3addr[3] & 0xC0) == 0x40;
 607 }
 608
 609 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 610         "1(+0)ADM", "UNKNOWN"
 611 };
 612 #define HPSA_RAID_0     0
 613 #define HPSA_RAID_4     1
 614 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 615 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 616 #define HPSA_RAID_51    4
 617 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 618 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 619 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 620
 621 static ssize_t raid_level_show(struct device *dev,
 622              struct device_attribute *attr, char *buf)
 623 {
 624         ssize_t l = 0;
 625         unsigned char rlevel;
 626         struct ctlr_info *h;
 627         struct scsi_device *sdev;
 628         struct hpsa_scsi_dev_t *hdev;
 629         unsigned long flags;
 630
 631         sdev = to_scsi_device(dev);
 632         h = sdev_to_hba(sdev);
 633         spin_lock_irqsave(&h->lock, flags);
 634         hdev = sdev->hostdata;
 635         if (!hdev) {
 636                 spin_unlock_irqrestore(&h->lock, flags);
 637                 return -ENODEV;
 638         }
 639
 640         /* Is this even a logical drive? */
 641         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 642                 spin_unlock_irqrestore(&h->lock, flags);
 643                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 644                 return l;
 645         }
 646
 647         rlevel = hdev->raid_level;
 648         spin_unlock_irqrestore(&h->lock, flags);
 649         if (rlevel > RAID_UNKNOWN)
 650                 rlevel = RAID_UNKNOWN;
 651         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 652         return l;
 653 }
 654
 655 static ssize_t lunid_show(struct device *dev,
 656              struct device_attribute *attr, char *buf)
 657 {
 658         struct ctlr_info *h;
 659         struct scsi_device *sdev;
 660         struct hpsa_scsi_dev_t *hdev;
 661         unsigned long flags;
 662         unsigned char lunid[8];
 663
 664         sdev = to_scsi_device(dev);
 665         h = sdev_to_hba(sdev);
 666         spin_lock_irqsave(&h->lock, flags);
 667         hdev = sdev->hostdata;
 668         if (!hdev) {
 669                 spin_unlock_irqrestore(&h->lock, flags);
 670                 return -ENODEV;
 671         }
 672         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 673         spin_unlock_irqrestore(&h->lock, flags);
 674         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 675                 lunid[0], lunid[1], lunid[2], lunid[3],
 676                 lunid[4], lunid[5], lunid[6], lunid[7]);
 677 }
 678
 679 static ssize_t unique_id_show(struct device *dev,
 680              struct device_attribute *attr, char *buf)
 681 {
 682         struct ctlr_info *h;
 683         struct scsi_device *sdev;
 684         struct hpsa_scsi_dev_t *hdev;
 685         unsigned long flags;
 686         unsigned char sn[16];
 687
 688         sdev = to_scsi_device(dev);
 689         h = sdev_to_hba(sdev);
 690         spin_lock_irqsave(&h->lock, flags);
 691         hdev = sdev->hostdata;
 692         if (!hdev) {
 693                 spin_unlock_irqrestore(&h->lock, flags);
 694                 return -ENODEV;
 695         }
 696         memcpy(sn, hdev->device_id, sizeof(sn));
 697         spin_unlock_irqrestore(&h->lock, flags);
 698         return snprintf(buf, 16 * 2 + 2,
 699                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 700                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 701                         sn[0], sn[1], sn[2], sn[3],
 702                         sn[4], sn[5], sn[6], sn[7],
 703                         sn[8], sn[9], sn[10], sn[11],
 704                         sn[12], sn[13], sn[14], sn[15]);
 705 }
 706
 707 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 708              struct device_attribute *attr, char *buf)
 709 {
 710         struct ctlr_info *h;
 711         struct scsi_device *sdev;
 712         struct hpsa_scsi_dev_t *hdev;
 713         unsigned long flags;
 714         int offload_enabled;
 715
 716         sdev = to_scsi_device(dev);
 717         h = sdev_to_hba(sdev);
 718         spin_lock_irqsave(&h->lock, flags);
 719         hdev = sdev->hostdata;
 720         if (!hdev) {
 721                 spin_unlock_irqrestore(&h->lock, flags);
 722                 return -ENODEV;
 723         }
 724         offload_enabled = hdev->offload_enabled;
 725         spin_unlock_irqrestore(&h->lock, flags);
 726         return snprintf(buf, 20, "%d\n", offload_enabled);
 727 }
 728
 729 #define MAX_PATHS 8
 730 #define PATH_STRING_LEN 50
 731
 732 static ssize_t path_info_show(struct device *dev,
 733              struct device_attribute *attr, char *buf)
 734 {
 735         struct ctlr_info *h;
 736         struct scsi_device *sdev;
 737         struct hpsa_scsi_dev_t *hdev;
 738         unsigned long flags;
 739         int i;
 740         int output_len = 0;
 741         u8 box;
 742         u8 bay;
 743         u8 path_map_index = 0;
 744         char *active;
 745         unsigned char phys_connector[2];
 746         unsigned char path[MAX_PATHS][PATH_STRING_LEN];
 747
 748         memset(path, 0, MAX_PATHS * PATH_STRING_LEN);
 749         sdev = to_scsi_device(dev);
 750         h = sdev_to_hba(sdev);
 751         spin_lock_irqsave(&h->devlock, flags);
 752         hdev = sdev->hostdata;
 753         if (!hdev) {
 754                 spin_unlock_irqrestore(&h->devlock, flags);
 755                 return -ENODEV;
 756         }
 757
 758         bay = hdev->bay;
 759         for (i = 0; i < MAX_PATHS; i++) {
 760                 path_map_index = 1<<i;
 761                 if (i == hdev->active_path_index)
 762                         active = "Active";
 763                 else if (hdev->path_map & path_map_index)
 764                         active = "Inactive";
 765                 else
 766                         continue;
 767
 768                 output_len = snprintf(path[i],
 769                                 PATH_STRING_LEN, "[%d:%d:%d:%d] %20.20s ",
 770                                 h->scsi_host->host_no,
 771                                 hdev->bus, hdev->target, hdev->lun,
 772                                 scsi_device_type(hdev->devtype));
 773
 774                 if (is_ext_target(h, hdev) ||
 775                         (hdev->devtype == TYPE_RAID) ||
 776                         is_logical_dev_addr_mode(hdev->scsi3addr)) {
 777                         output_len += snprintf(path[i] + output_len,
 778                                                 PATH_STRING_LEN, "%s\n",
 779                                                 active);
 780                         continue;
 781                 }
 782
 783                 box = hdev->box[i];
 784                 memcpy(&phys_connector, &hdev->phys_connector[i],
 785                         sizeof(phys_connector));
 786                 if (phys_connector[0] < '0')
 787                         phys_connector[0] = '0';
 788                 if (phys_connector[1] < '0')
 789                         phys_connector[1] = '0';
 790                 if (hdev->phys_connector[i] > 0)
 791                         output_len += snprintf(path[i] + output_len,
 792                                 PATH_STRING_LEN,
 793                                 "PORT: %.2s ",
 794                                 phys_connector);
 795                 if (hdev->devtype == TYPE_DISK &&
 796                         hdev->expose_state != HPSA_DO_NOT_EXPOSE) {
 797                         if (box == 0 || box == 0xFF) {
 798                                 output_len += snprintf(path[i] + output_len,
 799                                         PATH_STRING_LEN,
 800                                         "BAY: %hhu %s\n",
 801                                         bay, active);
 802                         } else {
 803                                 output_len += snprintf(path[i] + output_len,
 804                                         PATH_STRING_LEN,
 805                                         "BOX: %hhu BAY: %hhu %s\n",
 806                                         box, bay, active);
 807                         }
 808                 } else if (box != 0 && box != 0xFF) {
 809                         output_len += snprintf(path[i] + output_len,
 810                                 PATH_STRING_LEN, "BOX: %hhu %s\n",
 811                                 box, active);
 812                 } else
 813                         output_len += snprintf(path[i] + output_len,
 814                                 PATH_STRING_LEN, "%s\n", active);
 815         }
 816
 817         spin_unlock_irqrestore(&h->devlock, flags);
 818         return snprintf(buf, output_len+1, "%s%s%s%s%s%s%s%s",
 819                 path[0], path[1], path[2], path[3],
 820                 path[4], path[5], path[6], path[7]);
 821 }
 822
 823 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 824 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 825 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 826 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 827 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 828                         host_show_hp_ssd_smart_path_enabled, NULL);
 829 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
 830 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 831                 host_show_hp_ssd_smart_path_status,
 832                 host_store_hp_ssd_smart_path_status);
 833 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 834                         host_store_raid_offload_debug);
 835 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 836         host_show_firmware_revision, NULL);
 837 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 838         host_show_commands_outstanding, NULL);
 839 static DEVICE_ATTR(transport_mode, S_IRUGO,
 840         host_show_transport_mode, NULL);
 841 static DEVICE_ATTR(resettable, S_IRUGO,
 842         host_show_resettable, NULL);
 843 static DEVICE_ATTR(lockup_detected, S_IRUGO,
 844         host_show_lockup_detected, NULL);
 845
 846 static struct device_attribute *hpsa_sdev_attrs[] = {
 847         &dev_attr_raid_level,
 848         &dev_attr_lunid,
 849         &dev_attr_unique_id,
 850         &dev_attr_hp_ssd_smart_path_enabled,
 851         &dev_attr_path_info,
 852         &dev_attr_lockup_detected,
 853         NULL,
 854 };
 855
 856 static struct device_attribute *hpsa_shost_attrs[] = {
 857         &dev_attr_rescan,
 858         &dev_attr_firmware_revision,
 859         &dev_attr_commands_outstanding,
 860         &dev_attr_transport_mode,
 861         &dev_attr_resettable,
 862         &dev_attr_hp_ssd_smart_path_status,
 863         &dev_attr_raid_offload_debug,
 864         NULL,
 865 };
 866
 867 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
 868                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
 869
 870 static struct scsi_host_template hpsa_driver_template = {
 871         .module                 = THIS_MODULE,
 872         .name                   = HPSA,
 873         .proc_name              = HPSA,
 874         .queuecommand           = hpsa_scsi_queue_command,
 875         .scan_start             = hpsa_scan_start,
 876         .scan_finished          = hpsa_scan_finished,
 877         .change_queue_depth     = hpsa_change_queue_depth,
 878         .this_id                = -1,
 879         .use_clustering         = ENABLE_CLUSTERING,
 880         .eh_abort_handler       = hpsa_eh_abort_handler,
 881         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 882         .ioctl                  = hpsa_ioctl,
 883         .slave_alloc            = hpsa_slave_alloc,
 884         .slave_configure        = hpsa_slave_configure,
 885         .slave_destroy          = hpsa_slave_destroy,
 886 #ifdef CONFIG_COMPAT
 887         .compat_ioctl           = hpsa_compat_ioctl,
 888 #endif
 889         .sdev_attrs = hpsa_sdev_attrs,
 890         .shost_attrs = hpsa_shost_attrs,
 891         .max_sectors = 8192,
 892         .no_write_same = 1,
 893 };
 894
 895 static inline u32 next_command(struct ctlr_info *h, u8 q)
 896 {
 897         u32 a;
 898         struct reply_queue_buffer *rq = &h->reply_queue[q];
 899
 900         if (h->transMethod & CFGTBL_Trans_io_accel1)
 901                 return h->access.command_completed(h, q);
 902
 903         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 904                 return h->access.command_completed(h, q);
 905
 906         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 907                 a = rq->head[rq->current_entry];
 908                 rq->current_entry++;
 909                 atomic_dec(&h->commands_outstanding);
 910         } else {
 911                 a = FIFO_EMPTY;
 912         }
 913         /* Check for wraparound */
 914         if (rq->current_entry == h->max_commands) {
 915                 rq->current_entry = 0;
 916                 rq->wraparound ^= 1;
 917         }
 918         return a;
 919 }
 920
 921 /*
 922  * There are some special bits in the bus address of the
 923  * command that we have to set for the controller to know
 924  * how to process the command:
 925  *
 926  * Normal performant mode:
 927  * bit 0: 1 means performant mode, 0 means simple mode.
 928  * bits 1-3 = block fetch table entry
 929  * bits 4-6 = command type (== 0)
 930  *
 931  * ioaccel1 mode:
 932  * bit 0 = "performant mode" bit.
 933  * bits 1-3 = block fetch table entry
 934  * bits 4-6 = command type (== 110)
 935  * (command type is needed because ioaccel1 mode
 936  * commands are submitted through the same register as normal
 937  * mode commands, so this is how the controller knows whether
 938  * the command is normal mode or ioaccel1 mode.)
 939  *
 940  * ioaccel2 mode:
 941  * bit 0 = "performant mode" bit.
 942  * bits 1-4 = block fetch table entry (note extra bit)
 943  * bits 4-6 = not needed, because ioaccel2 mode has
 944  * a separate special register for submitting commands.
 945  */
 946
 947 /*
 948  * set_performant_mode: Modify the tag for cciss performant
 949  * set bit 0 for pull model, bits 3-1 for block fetch
 950  * register number
 951  */
 952 #define DEFAULT_REPLY_QUEUE (-1)
 953 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
 954                                         int reply_queue)
 955 {
 956         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 957                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 958                 if (unlikely(!h->msix_vector))
 959                         return;
 960                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 961                         c->Header.ReplyQueue =
 962                                 raw_smp_processor_id() % h->nreply_queues;
 963                 else
 964                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
 965         }
 966 }
 967
 968 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 969                                                 struct CommandList *c,
 970                                                 int reply_queue)
 971 {
 972         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 973
 974         /*
 975          * Tell the controller to post the reply to the queue for this
 976          * processor.  This seems to give the best I/O throughput.
 977          */
 978         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 979                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 980         else
 981                 cp->ReplyQueue = reply_queue % h->nreply_queues;
 982         /*
 983          * Set the bits in the address sent down to include:
 984          *  - performant mode bit (bit 0)
 985          *  - pull count (bits 1-3)
 986          *  - command type (bits 4-6)
 987          */
 988         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 989                                         IOACCEL1_BUSADDR_CMDTYPE;
 990 }
 991
 992 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
 993                                                 struct CommandList *c,
 994                                                 int reply_queue)
 995 {
 996         struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
 997                 &h->ioaccel2_cmd_pool[c->cmdindex];
 998
 999         /* Tell the controller to post the reply to the queue for this
1000          * processor.  This seems to give the best I/O throughput.
1001          */
1002         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1003                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1004         else
1005                 cp->reply_queue = reply_queue % h->nreply_queues;
1006         /* Set the bits in the address sent down to include:
1007          *  - performant mode bit not used in ioaccel mode 2
1008          *  - pull count (bits 0-3)
1009          *  - command type isn't needed for ioaccel2
1010          */
1011         c->busaddr |= h->ioaccel2_blockFetchTable[0];
1012 }
1013
1014 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1015                                                 struct CommandList *c,
1016                                                 int reply_queue)
1017 {
1018         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1019
1020         /*
1021          * Tell the controller to post the reply to the queue for this
1022          * processor.  This seems to give the best I/O throughput.
1023          */
1024         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1025                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1026         else
1027                 cp->reply_queue = reply_queue % h->nreply_queues;
1028         /*
1029          * Set the bits in the address sent down to include:
1030          *  - performant mode bit not used in ioaccel mode 2
1031          *  - pull count (bits 0-3)
1032          *  - command type isn't needed for ioaccel2
1033          */
1034         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1035 }
1036
1037 static int is_firmware_flash_cmd(u8 *cdb)
1038 {
1039         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1040 }
1041
1042 /*
1043  * During firmware flash, the heartbeat register may not update as frequently
1044  * as it should.  So we dial down lockup detection during firmware flash. and
1045  * dial it back up when firmware flash completes.
1046  */
1047 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1048 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1049 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1050                 struct CommandList *c)
1051 {
1052         if (!is_firmware_flash_cmd(c->Request.CDB))
1053                 return;
1054         atomic_inc(&h->firmware_flash_in_progress);
1055         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1056 }
1057
1058 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1059                 struct CommandList *c)
1060 {
1061         if (is_firmware_flash_cmd(c->Request.CDB) &&
1062                 atomic_dec_and_test(&h->firmware_flash_in_progress))
1063                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1064 }
1065
1066 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1067         struct CommandList *c, int reply_queue)
1068 {
1069         dial_down_lockup_detection_during_fw_flash(h, c);
1070         atomic_inc(&h->commands_outstanding);
1071         switch (c->cmd_type) {
1072         case CMD_IOACCEL1:
1073                 set_ioaccel1_performant_mode(h, c, reply_queue);
1074                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1075                 break;
1076         case CMD_IOACCEL2:
1077                 set_ioaccel2_performant_mode(h, c, reply_queue);
1078                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1079                 break;
1080         case IOACCEL2_TMF:
1081                 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1082                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1083                 break;
1084         default:
1085                 set_performant_mode(h, c, reply_queue);
1086                 h->access.submit_command(h, c);
1087         }
1088 }
1089
1090 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1091 {
1092         if (unlikely(hpsa_is_pending_event(c)))
1093                 return finish_cmd(c);
1094
1095         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1096 }
1097
1098 static inline int is_hba_lunid(unsigned char scsi3addr[])
1099 {
1100         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1101 }
1102
1103 static inline int is_scsi_rev_5(struct ctlr_info *h)
1104 {
1105         if (!h->hba_inquiry_data)
1106                 return 0;
1107         if ((h->hba_inquiry_data[2] & 0x07) == 5)
1108                 return 1;
1109         return 0;
1110 }
1111
1112 static int hpsa_find_target_lun(struct ctlr_info *h,
1113         unsigned char scsi3addr[], int bus, int *target, int *lun)
1114 {
1115         /* finds an unused bus, target, lun for a new physical device
1116          * assumes h->devlock is held
1117          */
1118         int i, found = 0;
1119         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1120
1121         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1122
1123         for (i = 0; i < h->ndevices; i++) {
1124                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1125                         __set_bit(h->dev[i]->target, lun_taken);
1126         }
1127
1128         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1129         if (i < HPSA_MAX_DEVICES) {
1130                 /* *bus = 1; */
1131                 *target = i;
1132                 *lun = 0;
1133                 found = 1;
1134         }
1135         return !found;
1136 }
1137
1138 static inline void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1139         struct hpsa_scsi_dev_t *dev, char *description)
1140 {
1141         if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1142                 return;
1143
1144         dev_printk(level, &h->pdev->dev,
1145                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
1146                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1147                         description,
1148                         scsi_device_type(dev->devtype),
1149                         dev->vendor,
1150                         dev->model,
1151                         dev->raid_level > RAID_UNKNOWN ?
1152                                 "RAID-?" : raid_label[dev->raid_level],
1153                         dev->offload_config ? '+' : '-',
1154                         dev->offload_enabled ? '+' : '-',
1155                         dev->expose_state);
1156 }
1157
1158 /* Add an entry into h->dev[] array. */
1159 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1160                 struct hpsa_scsi_dev_t *device,
1161                 struct hpsa_scsi_dev_t *added[], int *nadded)
1162 {
1163         /* assumes h->devlock is held */
1164         int n = h->ndevices;
1165         int i;
1166         unsigned char addr1[8], addr2[8];
1167         struct hpsa_scsi_dev_t *sd;
1168
1169         if (n >= HPSA_MAX_DEVICES) {
1170                 dev_err(&h->pdev->dev, "too many devices, some will be "
1171                         "inaccessible.\n");
1172                 return -1;
1173         }
1174
1175         /* physical devices do not have lun or target assigned until now. */
1176         if (device->lun != -1)
1177                 /* Logical device, lun is already assigned. */
1178                 goto lun_assigned;
1179
1180         /* If this device a non-zero lun of a multi-lun device
1181          * byte 4 of the 8-byte LUN addr will contain the logical
1182          * unit no, zero otherwise.
1183          */
1184         if (device->scsi3addr[4] == 0) {
1185                 /* This is not a non-zero lun of a multi-lun device */
1186                 if (hpsa_find_target_lun(h, device->scsi3addr,
1187                         device->bus, &device->target, &device->lun) != 0)
1188                         return -1;
1189                 goto lun_assigned;
1190         }
1191
1192         /* This is a non-zero lun of a multi-lun device.
1193          * Search through our list and find the device which
1194          * has the same 8 byte LUN address, excepting byte 4 and 5.
1195          * Assign the same bus and target for this new LUN.
1196          * Use the logical unit number from the firmware.
1197          */
1198         memcpy(addr1, device->scsi3addr, 8);
1199         addr1[4] = 0;
1200         addr1[5] = 0;
1201         for (i = 0; i < n; i++) {
1202                 sd = h->dev[i];
1203                 memcpy(addr2, sd->scsi3addr, 8);
1204                 addr2[4] = 0;
1205                 addr2[5] = 0;
1206                 /* differ only in byte 4 and 5? */
1207                 if (memcmp(addr1, addr2, 8) == 0) {
1208                         device->bus = sd->bus;
1209                         device->target = sd->target;
1210                         device->lun = device->scsi3addr[4];
1211                         break;
1212                 }
1213         }
1214         if (device->lun == -1) {
1215                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1216                         " suspect firmware bug or unsupported hardware "
1217                         "configuration.\n");
1218                         return -1;
1219         }
1220
1221 lun_assigned:
1222
1223         h->dev[n] = device;
1224         h->ndevices++;
1225         added[*nadded] = device;
1226         (*nadded)++;
1227         hpsa_show_dev_msg(KERN_INFO, h, device,
1228                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1229         device->offload_to_be_enabled = device->offload_enabled;
1230         device->offload_enabled = 0;
1231         return 0;
1232 }
1233
1234 /* Update an entry in h->dev[] array. */
1235 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1236         int entry, struct hpsa_scsi_dev_t *new_entry)
1237 {
1238         int offload_enabled;
1239         /* assumes h->devlock is held */
1240         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1241
1242         /* Raid level changed. */
1243         h->dev[entry]->raid_level = new_entry->raid_level;
1244
1245         /* Raid offload parameters changed.  Careful about the ordering. */
1246         if (new_entry->offload_config && new_entry->offload_enabled) {
1247                 /*
1248                  * if drive is newly offload_enabled, we want to copy the
1249                  * raid map data first.  If previously offload_enabled and
1250                  * offload_config were set, raid map data had better be
1251                  * the same as it was before.  if raid map data is changed
1252                  * then it had better be the case that
1253                  * h->dev[entry]->offload_enabled is currently 0.
1254                  */
1255                 h->dev[entry]->raid_map = new_entry->raid_map;
1256                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1257         }
1258         if (new_entry->hba_ioaccel_enabled) {
1259                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1260                 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1261         }
1262         h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1263         h->dev[entry]->offload_config = new_entry->offload_config;
1264         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1265         h->dev[entry]->queue_depth = new_entry->queue_depth;
1266
1267         /*
1268          * We can turn off ioaccel offload now, but need to delay turning
1269          * it on until we can update h->dev[entry]->phys_disk[], but we
1270          * can't do that until all the devices are updated.
1271          */
1272         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1273         if (!new_entry->offload_enabled)
1274                 h->dev[entry]->offload_enabled = 0;
1275
1276         offload_enabled = h->dev[entry]->offload_enabled;
1277         h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1278         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1279         h->dev[entry]->offload_enabled = offload_enabled;
1280 }
1281
1282 /* Replace an entry from h->dev[] array. */
1283 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1284         int entry, struct hpsa_scsi_dev_t *new_entry,
1285         struct hpsa_scsi_dev_t *added[], int *nadded,
1286         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1287 {
1288         /* assumes h->devlock is held */
1289         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1290         removed[*nremoved] = h->dev[entry];
1291         (*nremoved)++;
1292
1293         /*
1294          * New physical devices won't have target/lun assigned yet
1295          * so we need to preserve the values in the slot we are replacing.
1296          */
1297         if (new_entry->target == -1) {
1298                 new_entry->target = h->dev[entry]->target;
1299                 new_entry->lun = h->dev[entry]->lun;
1300         }
1301
1302         h->dev[entry] = new_entry;
1303         added[*nadded] = new_entry;
1304         (*nadded)++;
1305         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1306         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1307         new_entry->offload_enabled = 0;
1308 }
1309
1310 /* Remove an entry from h->dev[] array. */
1311 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1312         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1313 {
1314         /* assumes h->devlock is held */
1315         int i;
1316         struct hpsa_scsi_dev_t *sd;
1317
1318         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1319
1320         sd = h->dev[entry];
1321         removed[*nremoved] = h->dev[entry];
1322         (*nremoved)++;
1323
1324         for (i = entry; i < h->ndevices-1; i++)
1325                 h->dev[i] = h->dev[i+1];
1326         h->ndevices--;
1327         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1328 }
1329
1330 #define SCSI3ADDR_EQ(a, b) ( \
1331         (a)[7] == (b)[7] && \
1332         (a)[6] == (b)[6] && \
1333         (a)[5] == (b)[5] && \
1334         (a)[4] == (b)[4] && \
1335         (a)[3] == (b)[3] && \
1336         (a)[2] == (b)[2] && \
1337         (a)[1] == (b)[1] && \
1338         (a)[0] == (b)[0])
1339
1340 static void fixup_botched_add(struct ctlr_info *h,
1341         struct hpsa_scsi_dev_t *added)
1342 {
1343         /* called when scsi_add_device fails in order to re-adjust
1344          * h->dev[] to match the mid layer's view.
1345          */
1346         unsigned long flags;
1347         int i, j;
1348
1349         spin_lock_irqsave(&h->lock, flags);
1350         for (i = 0; i < h->ndevices; i++) {
1351                 if (h->dev[i] == added) {
1352                         for (j = i; j < h->ndevices-1; j++)
1353                                 h->dev[j] = h->dev[j+1];
1354                         h->ndevices--;
1355                         break;
1356                 }
1357         }
1358         spin_unlock_irqrestore(&h->lock, flags);
1359         kfree(added);
1360 }
1361
1362 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1363         struct hpsa_scsi_dev_t *dev2)
1364 {
1365         /* we compare everything except lun and target as these
1366          * are not yet assigned.  Compare parts likely
1367          * to differ first
1368          */
1369         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1370                 sizeof(dev1->scsi3addr)) != 0)
1371                 return 0;
1372         if (memcmp(dev1->device_id, dev2->device_id,
1373                 sizeof(dev1->device_id)) != 0)
1374                 return 0;
1375         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1376                 return 0;
1377         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1378                 return 0;
1379         if (dev1->devtype != dev2->devtype)
1380                 return 0;
1381         if (dev1->bus != dev2->bus)
1382                 return 0;
1383         return 1;
1384 }
1385
1386 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1387         struct hpsa_scsi_dev_t *dev2)
1388 {
1389         /* Device attributes that can change, but don't mean
1390          * that the device is a different device, nor that the OS
1391          * needs to be told anything about the change.
1392          */
1393         if (dev1->raid_level != dev2->raid_level)
1394                 return 1;
1395         if (dev1->offload_config != dev2->offload_config)
1396                 return 1;
1397         if (dev1->offload_enabled != dev2->offload_enabled)
1398                 return 1;
1399         if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1400                 if (dev1->queue_depth != dev2->queue_depth)
1401                         return 1;
1402         return 0;
1403 }
1404
1405 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1406  * and return needle location in *index.  If scsi3addr matches, but not
1407  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1408  * location in *index.
1409  * In the case of a minor device attribute change, such as RAID level, just
1410  * return DEVICE_UPDATED, along with the updated device's location in index.
1411  * If needle not found, return DEVICE_NOT_FOUND.
1412  */
1413 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1414         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1415         int *index)
1416 {
1417         int i;
1418 #define DEVICE_NOT_FOUND 0
1419 #define DEVICE_CHANGED 1
1420 #define DEVICE_SAME 2
1421 #define DEVICE_UPDATED 3
1422         for (i = 0; i < haystack_size; i++) {
1423                 if (haystack[i] == NULL) /* previously removed. */
1424                         continue;
1425                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1426                         *index = i;
1427                         if (device_is_the_same(needle, haystack[i])) {
1428                                 if (device_updated(needle, haystack[i]))
1429                                         return DEVICE_UPDATED;
1430                                 return DEVICE_SAME;
1431                         } else {
1432                                 /* Keep offline devices offline */
1433                                 if (needle->volume_offline)
1434                                         return DEVICE_NOT_FOUND;
1435                                 return DEVICE_CHANGED;
1436                         }
1437                 }
1438         }
1439         *index = -1;
1440         return DEVICE_NOT_FOUND;
1441 }
1442
1443 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1444                                         unsigned char scsi3addr[])
1445 {
1446         struct offline_device_entry *device;
1447         unsigned long flags;
1448
1449         /* Check to see if device is already on the list */
1450         spin_lock_irqsave(&h->offline_device_lock, flags);
1451         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1452                 if (memcmp(device->scsi3addr, scsi3addr,
1453                         sizeof(device->scsi3addr)) == 0) {
1454                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1455                         return;
1456                 }
1457         }
1458         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1459
1460         /* Device is not on the list, add it. */
1461         device = kmalloc(sizeof(*device), GFP_KERNEL);
1462         if (!device) {
1463                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1464                 return;
1465         }
1466         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1467         spin_lock_irqsave(&h->offline_device_lock, flags);
1468         list_add_tail(&device->offline_list, &h->offline_device_list);
1469         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1470 }
1471
1472 /* Print a message explaining various offline volume states */
1473 static void hpsa_show_volume_status(struct ctlr_info *h,
1474         struct hpsa_scsi_dev_t *sd)
1475 {
1476         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1477                 dev_info(&h->pdev->dev,
1478                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1479                         h->scsi_host->host_no,
1480                         sd->bus, sd->target, sd->lun);
1481         switch (sd->volume_offline) {
1482         case HPSA_LV_OK:
1483                 break;
1484         case HPSA_LV_UNDERGOING_ERASE:
1485                 dev_info(&h->pdev->dev,
1486                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1487                         h->scsi_host->host_no,
1488                         sd->bus, sd->target, sd->lun);
1489                 break;
1490         case HPSA_LV_NOT_AVAILABLE:
1491                 dev_info(&h->pdev->dev,
1492                         "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1493                         h->scsi_host->host_no,
1494                         sd->bus, sd->target, sd->lun);
1495                 break;
1496         case HPSA_LV_UNDERGOING_RPI:
1497                 dev_info(&h->pdev->dev,
1498                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1499                         h->scsi_host->host_no,
1500                         sd->bus, sd->target, sd->lun);
1501                 break;
1502         case HPSA_LV_PENDING_RPI:
1503                 dev_info(&h->pdev->dev,
1504                         "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1505                         h->scsi_host->host_no,
1506                         sd->bus, sd->target, sd->lun);
1507                 break;
1508         case HPSA_LV_ENCRYPTED_NO_KEY:
1509                 dev_info(&h->pdev->dev,
1510                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1511                         h->scsi_host->host_no,
1512                         sd->bus, sd->target, sd->lun);
1513                 break;
1514         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1515                 dev_info(&h->pdev->dev,
1516                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1517                         h->scsi_host->host_no,
1518                         sd->bus, sd->target, sd->lun);
1519                 break;
1520         case HPSA_LV_UNDERGOING_ENCRYPTION:
1521                 dev_info(&h->pdev->dev,
1522                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1523                         h->scsi_host->host_no,
1524                         sd->bus, sd->target, sd->lun);
1525                 break;
1526         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1527                 dev_info(&h->pdev->dev,
1528                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1529                         h->scsi_host->host_no,
1530                         sd->bus, sd->target, sd->lun);
1531                 break;
1532         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1533                 dev_info(&h->pdev->dev,
1534                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1535                         h->scsi_host->host_no,
1536                         sd->bus, sd->target, sd->lun);
1537                 break;
1538         case HPSA_LV_PENDING_ENCRYPTION:
1539                 dev_info(&h->pdev->dev,
1540                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1541                         h->scsi_host->host_no,
1542                         sd->bus, sd->target, sd->lun);
1543                 break;
1544         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1545                 dev_info(&h->pdev->dev,
1546                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1547                         h->scsi_host->host_no,
1548                         sd->bus, sd->target, sd->lun);
1549                 break;
1550         }
1551 }
1552
1553 /*
1554  * Figure the list of physical drive pointers for a logical drive with
1555  * raid offload configured.
1556  */
1557 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1558                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1559                                 struct hpsa_scsi_dev_t *logical_drive)
1560 {
1561         struct raid_map_data *map = &logical_drive->raid_map;
1562         struct raid_map_disk_data *dd = &map->data[0];
1563         int i, j;
1564         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1565                                 le16_to_cpu(map->metadata_disks_per_row);
1566         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1567                                 le16_to_cpu(map->layout_map_count) *
1568                                 total_disks_per_row;
1569         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1570                                 total_disks_per_row;
1571         int qdepth;
1572
1573         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1574                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1575
1576         logical_drive->nphysical_disks = nraid_map_entries;
1577
1578         qdepth = 0;
1579         for (i = 0; i < nraid_map_entries; i++) {
1580                 logical_drive->phys_disk[i] = NULL;
1581                 if (!logical_drive->offload_config)
1582                         continue;
1583                 for (j = 0; j < ndevices; j++) {
1584                         if (dev[j]->devtype != TYPE_DISK)
1585                                 continue;
1586                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1587                                 continue;
1588                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1589                                 continue;
1590
1591                         logical_drive->phys_disk[i] = dev[j];
1592                         if (i < nphys_disk)
1593                                 qdepth = min(h->nr_cmds, qdepth +
1594                                     logical_drive->phys_disk[i]->queue_depth);
1595                         break;
1596                 }
1597
1598                 /*
1599                  * This can happen if a physical drive is removed and
1600                  * the logical drive is degraded.  In that case, the RAID
1601                  * map data will refer to a physical disk which isn't actually
1602                  * present.  And in that case offload_enabled should already
1603                  * be 0, but we'll turn it off here just in case
1604                  */
1605                 if (!logical_drive->phys_disk[i]) {
1606                         logical_drive->offload_enabled = 0;
1607                         logical_drive->offload_to_be_enabled = 0;
1608                         logical_drive->queue_depth = 8;
1609                 }
1610         }
1611         if (nraid_map_entries)
1612                 /*
1613                  * This is correct for reads, too high for full stripe writes,
1614                  * way too high for partial stripe writes
1615                  */
1616                 logical_drive->queue_depth = qdepth;
1617         else
1618                 logical_drive->queue_depth = h->nr_cmds;
1619 }
1620
1621 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1622                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1623 {
1624         int i;
1625
1626         for (i = 0; i < ndevices; i++) {
1627                 if (dev[i]->devtype != TYPE_DISK)
1628                         continue;
1629                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1630                         continue;
1631
1632                 /*
1633                  * If offload is currently enabled, the RAID map and
1634                  * phys_disk[] assignment *better* not be changing
1635                  * and since it isn't changing, we do not need to
1636                  * update it.
1637                  */
1638                 if (dev[i]->offload_enabled)
1639                         continue;
1640
1641                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1642         }
1643 }
1644
1645 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1646         struct hpsa_scsi_dev_t *sd[], int nsds)
1647 {
1648         /* sd contains scsi3 addresses and devtypes, and inquiry
1649          * data.  This function takes what's in sd to be the current
1650          * reality and updates h->dev[] to reflect that reality.
1651          */
1652         int i, entry, device_change, changes = 0;
1653         struct hpsa_scsi_dev_t *csd;
1654         unsigned long flags;
1655         struct hpsa_scsi_dev_t **added, **removed;
1656         int nadded, nremoved;
1657         struct Scsi_Host *sh = NULL;
1658
1659         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1660         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1661
1662         if (!added || !removed) {
1663                 dev_warn(&h->pdev->dev, "out of memory in "
1664                         "adjust_hpsa_scsi_table\n");
1665                 goto free_and_out;
1666         }
1667
1668         spin_lock_irqsave(&h->devlock, flags);
1669
1670         /* find any devices in h->dev[] that are not in
1671          * sd[] and remove them from h->dev[], and for any
1672          * devices which have changed, remove the old device
1673          * info and add the new device info.
1674          * If minor device attributes change, just update
1675          * the existing device structure.
1676          */
1677         i = 0;
1678         nremoved = 0;
1679         nadded = 0;
1680         while (i < h->ndevices) {
1681                 csd = h->dev[i];
1682                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1683                 if (device_change == DEVICE_NOT_FOUND) {
1684                         changes++;
1685                         hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1686                         continue; /* remove ^^^, hence i not incremented */
1687                 } else if (device_change == DEVICE_CHANGED) {
1688                         changes++;
1689                         hpsa_scsi_replace_entry(h, i, sd[entry],
1690                                 added, &nadded, removed, &nremoved);
1691                         /* Set it to NULL to prevent it from being freed
1692                          * at the bottom of hpsa_update_scsi_devices()
1693                          */
1694                         sd[entry] = NULL;
1695                 } else if (device_change == DEVICE_UPDATED) {
1696                         hpsa_scsi_update_entry(h, i, sd[entry]);
1697                 }
1698                 i++;
1699         }
1700
1701         /* Now, make sure every device listed in sd[] is also
1702          * listed in h->dev[], adding them if they aren't found
1703          */
1704
1705         for (i = 0; i < nsds; i++) {
1706                 if (!sd[i]) /* if already added above. */
1707                         continue;
1708
1709                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1710                  * as the SCSI mid-layer does not handle such devices well.
1711                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1712                  * at 160Hz, and prevents the system from coming up.
1713                  */
1714                 if (sd[i]->volume_offline) {
1715                         hpsa_show_volume_status(h, sd[i]);
1716                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1717                         continue;
1718                 }
1719
1720                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1721                                         h->ndevices, &entry);
1722                 if (device_change == DEVICE_NOT_FOUND) {
1723                         changes++;
1724                         if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1725                                 break;
1726                         sd[i] = NULL; /* prevent from being freed later. */
1727                 } else if (device_change == DEVICE_CHANGED) {
1728                         /* should never happen... */
1729                         changes++;
1730                         dev_warn(&h->pdev->dev,
1731                                 "device unexpectedly changed.\n");
1732                         /* but if it does happen, we just ignore that device */
1733                 }
1734         }
1735         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1736
1737         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1738          * any logical drives that need it enabled.
1739          */
1740         for (i = 0; i < h->ndevices; i++)
1741                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1742
1743         spin_unlock_irqrestore(&h->devlock, flags);
1744
1745         /* Monitor devices which are in one of several NOT READY states to be
1746          * brought online later. This must be done without holding h->devlock,
1747          * so don't touch h->dev[]
1748          */
1749         for (i = 0; i < nsds; i++) {
1750                 if (!sd[i]) /* if already added above. */
1751                         continue;
1752                 if (sd[i]->volume_offline)
1753                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1754         }
1755
1756         /* Don't notify scsi mid layer of any changes the first time through
1757          * (or if there are no changes) scsi_scan_host will do it later the
1758          * first time through.
1759          */
1760         if (!changes)
1761                 goto free_and_out;
1762
1763         sh = h->scsi_host;
1764         /* Notify scsi mid layer of any removed devices */
1765         for (i = 0; i < nremoved; i++) {
1766                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1767                         struct scsi_device *sdev =
1768                                 scsi_device_lookup(sh, removed[i]->bus,
1769                                         removed[i]->target, removed[i]->lun);
1770                         if (sdev != NULL) {
1771                                 scsi_remove_device(sdev);
1772                                 scsi_device_put(sdev);
1773                         } else {
1774                                 /*
1775                                  * We don't expect to get here.
1776                                  * future cmds to this device will get selection
1777                                  * timeout as if the device was gone.
1778                                  */
1779                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1780                                         "didn't find device for removal.");
1781                         }
1782                 }
1783                 kfree(removed[i]);
1784                 removed[i] = NULL;
1785         }
1786
1787         /* Notify scsi mid layer of any added devices */
1788         for (i = 0; i < nadded; i++) {
1789                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1790                         continue;
1791                 if (scsi_add_device(sh, added[i]->bus,
1792                         added[i]->target, added[i]->lun) == 0)
1793                         continue;
1794                 hpsa_show_dev_msg(KERN_WARNING, h, added[i],
1795                                         "addition failed, device not added.");
1796                 /* now we have to remove it from h->dev,
1797                  * since it didn't get added to scsi mid layer
1798                  */
1799                 fixup_botched_add(h, added[i]);
1800                 added[i] = NULL;
1801         }
1802
1803 free_and_out:
1804         kfree(added);
1805         kfree(removed);
1806 }
1807
1808 /*
1809  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1810  * Assume's h->devlock is held.
1811  */
1812 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1813         int bus, int target, int lun)
1814 {
1815         int i;
1816         struct hpsa_scsi_dev_t *sd;
1817
1818         for (i = 0; i < h->ndevices; i++) {
1819                 sd = h->dev[i];
1820                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1821                         return sd;
1822         }
1823         return NULL;
1824 }
1825
1826 static int hpsa_slave_alloc(struct scsi_device *sdev)
1827 {
1828         struct hpsa_scsi_dev_t *sd;
1829         unsigned long flags;
1830         struct ctlr_info *h;
1831
1832         h = sdev_to_hba(sdev);
1833         spin_lock_irqsave(&h->devlock, flags);
1834         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1835                 sdev_id(sdev), sdev->lun);
1836         if (likely(sd)) {
1837                 atomic_set(&sd->ioaccel_cmds_out, 0);
1838                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1839         } else
1840                 sdev->hostdata = NULL;
1841         spin_unlock_irqrestore(&h->devlock, flags);
1842         return 0;
1843 }
1844
1845 /* configure scsi device based on internal per-device structure */
1846 static int hpsa_slave_configure(struct scsi_device *sdev)
1847 {
1848         struct hpsa_scsi_dev_t *sd;
1849         int queue_depth;
1850
1851         sd = sdev->hostdata;
1852         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1853
1854         if (sd)
1855                 queue_depth = sd->queue_depth != 0 ?
1856                         sd->queue_depth : sdev->host->can_queue;
1857         else
1858                 queue_depth = sdev->host->can_queue;
1859
1860         scsi_change_queue_depth(sdev, queue_depth);
1861
1862         return 0;
1863 }
1864
1865 static void hpsa_slave_destroy(struct scsi_device *sdev)
1866 {
1867         /* nothing to do. */
1868 }
1869
1870 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1871 {
1872         int i;
1873
1874         if (!h->ioaccel2_cmd_sg_list)
1875                 return;
1876         for (i = 0; i < h->nr_cmds; i++) {
1877                 kfree(h->ioaccel2_cmd_sg_list[i]);
1878                 h->ioaccel2_cmd_sg_list[i] = NULL;
1879         }
1880         kfree(h->ioaccel2_cmd_sg_list);
1881         h->ioaccel2_cmd_sg_list = NULL;
1882 }
1883
1884 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1885 {
1886         int i;
1887
1888         if (h->chainsize <= 0)
1889                 return 0;
1890
1891         h->ioaccel2_cmd_sg_list =
1892                 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
1893                                         GFP_KERNEL);
1894         if (!h->ioaccel2_cmd_sg_list)
1895                 return -ENOMEM;
1896         for (i = 0; i < h->nr_cmds; i++) {
1897                 h->ioaccel2_cmd_sg_list[i] =
1898                         kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
1899                                         h->maxsgentries, GFP_KERNEL);
1900                 if (!h->ioaccel2_cmd_sg_list[i])
1901                         goto clean;
1902         }
1903         return 0;
1904
1905 clean:
1906         hpsa_free_ioaccel2_sg_chain_blocks(h);
1907         return -ENOMEM;
1908 }
1909
1910 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1911 {
1912         int i;
1913
1914         if (!h->cmd_sg_list)
1915                 return;
1916         for (i = 0; i < h->nr_cmds; i++) {
1917                 kfree(h->cmd_sg_list[i]);
1918                 h->cmd_sg_list[i] = NULL;
1919         }
1920         kfree(h->cmd_sg_list);
1921         h->cmd_sg_list = NULL;
1922 }
1923
1924 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
1925 {
1926         int i;
1927
1928         if (h->chainsize <= 0)
1929                 return 0;
1930
1931         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1932                                 GFP_KERNEL);
1933         if (!h->cmd_sg_list) {
1934                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1935                 return -ENOMEM;
1936         }
1937         for (i = 0; i < h->nr_cmds; i++) {
1938                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1939                                                 h->chainsize, GFP_KERNEL);
1940                 if (!h->cmd_sg_list[i]) {
1941                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1942                         goto clean;
1943                 }
1944         }
1945         return 0;
1946
1947 clean:
1948         hpsa_free_sg_chain_blocks(h);
1949         return -ENOMEM;
1950 }
1951
1952 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
1953         struct io_accel2_cmd *cp, struct CommandList *c)
1954 {
1955         struct ioaccel2_sg_element *chain_block;
1956         u64 temp64;
1957         u32 chain_size;
1958
1959         chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
1960         chain_size = le32_to_cpu(cp->data_len);
1961         temp64 = pci_map_single(h->pdev, chain_block, chain_size,
1962                                 PCI_DMA_TODEVICE);
1963         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1964                 /* prevent subsequent unmapping */
1965                 cp->sg->address = 0;
1966                 return -1;
1967         }
1968         cp->sg->address = cpu_to_le64(temp64);
1969         return 0;
1970 }
1971
1972 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
1973         struct io_accel2_cmd *cp)
1974 {
1975         struct ioaccel2_sg_element *chain_sg;
1976         u64 temp64;
1977         u32 chain_size;
1978
1979         chain_sg = cp->sg;
1980         temp64 = le64_to_cpu(chain_sg->address);
1981         chain_size = le32_to_cpu(cp->data_len);
1982         pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
1983 }
1984
1985 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1986         struct CommandList *c)
1987 {
1988         struct SGDescriptor *chain_sg, *chain_block;
1989         u64 temp64;
1990         u32 chain_len;
1991
1992         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1993         chain_block = h->cmd_sg_list[c->cmdindex];
1994         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1995         chain_len = sizeof(*chain_sg) *
1996                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1997         chain_sg->Len = cpu_to_le32(chain_len);
1998         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1999                                 PCI_DMA_TODEVICE);
2000         if (dma_mapping_error(&h->pdev->dev, temp64)) {
2001                 /* prevent subsequent unmapping */
2002                 chain_sg->Addr = cpu_to_le64(0);
2003                 return -1;
2004         }
2005         chain_sg->Addr = cpu_to_le64(temp64);
2006         return 0;
2007 }
2008
2009 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2010         struct CommandList *c)
2011 {
2012         struct SGDescriptor *chain_sg;
2013
2014         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2015                 return;
2016
2017         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2018         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2019                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2020 }
2021
2022
2023 /* Decode the various types of errors on ioaccel2 path.
2024  * Return 1 for any error that should generate a RAID path retry.
2025  * Return 0 for errors that don't require a RAID path retry.
2026  */
2027 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2028                                         struct CommandList *c,
2029                                         struct scsi_cmnd *cmd,
2030                                         struct io_accel2_cmd *c2)
2031 {
2032         int data_len;
2033         int retry = 0;
2034         u32 ioaccel2_resid = 0;
2035
2036         switch (c2->error_data.serv_response) {
2037         case IOACCEL2_SERV_RESPONSE_COMPLETE:
2038                 switch (c2->error_data.status) {
2039                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2040                         break;
2041                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2042                         cmd->result |= SAM_STAT_CHECK_CONDITION;
2043                         if (c2->error_data.data_present !=
2044                                         IOACCEL2_SENSE_DATA_PRESENT) {
2045                                 memset(cmd->sense_buffer, 0,
2046                                         SCSI_SENSE_BUFFERSIZE);
2047                                 break;
2048                         }
2049                         /* copy the sense data */
2050                         data_len = c2->error_data.sense_data_len;
2051                         if (data_len > SCSI_SENSE_BUFFERSIZE)
2052                                 data_len = SCSI_SENSE_BUFFERSIZE;
2053                         if (data_len > sizeof(c2->error_data.sense_data_buff))
2054                                 data_len =
2055                                         sizeof(c2->error_data.sense_data_buff);
2056                         memcpy(cmd->sense_buffer,
2057                                 c2->error_data.sense_data_buff, data_len);
2058                         retry = 1;
2059                         break;
2060                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2061                         retry = 1;
2062                         break;
2063                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2064                         retry = 1;
2065                         break;
2066                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2067                         retry = 1;
2068                         break;
2069                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2070                         retry = 1;
2071                         break;
2072                 default:
2073                         retry = 1;
2074                         break;
2075                 }
2076                 break;
2077         case IOACCEL2_SERV_RESPONSE_FAILURE:
2078                 switch (c2->error_data.status) {
2079                 case IOACCEL2_STATUS_SR_IO_ERROR:
2080                 case IOACCEL2_STATUS_SR_IO_ABORTED:
2081                 case IOACCEL2_STATUS_SR_OVERRUN:
2082                         retry = 1;
2083                         break;
2084                 case IOACCEL2_STATUS_SR_UNDERRUN:
2085                         cmd->result = (DID_OK << 16);           /* host byte */
2086                         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2087                         ioaccel2_resid = get_unaligned_le32(
2088                                                 &c2->error_data.resid_cnt[0]);
2089                         scsi_set_resid(cmd, ioaccel2_resid);
2090                         break;
2091                 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2092                 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2093                 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2094                         /* We will get an event from ctlr to trigger rescan */
2095                         retry = 1;
2096                         break;
2097                 default:
2098                         retry = 1;
2099                 }
2100                 break;
2101         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2102                 break;
2103         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2104                 break;
2105         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2106                 retry = 1;
2107                 break;
2108         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2109                 break;
2110         default:
2111                 retry = 1;
2112                 break;
2113         }
2114
2115         return retry;   /* retry on raid path? */
2116 }
2117
2118 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2119                 struct CommandList *c)
2120 {
2121         bool do_wake = false;
2122
2123         /*
2124          * Prevent the following race in the abort handler:
2125          *
2126          * 1. LLD is requested to abort a SCSI command
2127          * 2. The SCSI command completes
2128          * 3. The struct CommandList associated with step 2 is made available
2129          * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2130          * 5. Abort handler follows scsi_cmnd->host_scribble and
2131          *    finds struct CommandList and tries to aborts it
2132          * Now we have aborted the wrong command.
2133          *
2134          * Reset c->scsi_cmd here so that the abort or reset handler will know
2135          * this command has completed.  Then, check to see if the handler is
2136          * waiting for this command, and, if so, wake it.
2137          */
2138         c->scsi_cmd = SCSI_CMD_IDLE;
2139         mb();   /* Declare command idle before checking for pending events. */
2140         if (c->abort_pending) {
2141                 do_wake = true;
2142                 c->abort_pending = false;
2143         }
2144         if (c->reset_pending) {
2145                 unsigned long flags;
2146                 struct hpsa_scsi_dev_t *dev;
2147
2148                 /*
2149                  * There appears to be a reset pending; lock the lock and
2150                  * reconfirm.  If so, then decrement the count of outstanding
2151                  * commands and wake the reset command if this is the last one.
2152                  */
2153                 spin_lock_irqsave(&h->lock, flags);
2154                 dev = c->reset_pending;         /* Re-fetch under the lock. */
2155                 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2156                         do_wake = true;
2157                 c->reset_pending = NULL;
2158                 spin_unlock_irqrestore(&h->lock, flags);
2159         }
2160
2161         if (do_wake)
2162                 wake_up_all(&h->event_sync_wait_queue);
2163 }
2164
2165 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2166                                       struct CommandList *c)
2167 {
2168         hpsa_cmd_resolve_events(h, c);
2169         cmd_tagged_free(h, c);
2170 }
2171
2172 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2173                 struct CommandList *c, struct scsi_cmnd *cmd)
2174 {
2175         hpsa_cmd_resolve_and_free(h, c);
2176         cmd->scsi_done(cmd);
2177 }
2178
2179 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2180 {
2181         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2182         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2183 }
2184
2185 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2186 {
2187         cmd->result = DID_ABORT << 16;
2188 }
2189
2190 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2191                                     struct scsi_cmnd *cmd)
2192 {
2193         hpsa_set_scsi_cmd_aborted(cmd);
2194         dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2195                          c->Request.CDB, c->err_info->ScsiStatus);
2196         hpsa_cmd_resolve_and_free(h, c);
2197 }
2198
2199 static void process_ioaccel2_completion(struct ctlr_info *h,
2200                 struct CommandList *c, struct scsi_cmnd *cmd,
2201                 struct hpsa_scsi_dev_t *dev)
2202 {
2203         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2204
2205         /* check for good status */
2206         if (likely(c2->error_data.serv_response == 0 &&
2207                         c2->error_data.status == 0))
2208                 return hpsa_cmd_free_and_done(h, c, cmd);
2209
2210         /*
2211          * Any RAID offload error results in retry which will use
2212          * the normal I/O path so the controller can handle whatever's
2213          * wrong.
2214          */
2215         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
2216                 c2->error_data.serv_response ==
2217                         IOACCEL2_SERV_RESPONSE_FAILURE) {
2218                 if (c2->error_data.status ==
2219                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2220                         dev->offload_enabled = 0;
2221
2222                 return hpsa_retry_cmd(h, c);
2223         }
2224
2225         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
2226                 return hpsa_retry_cmd(h, c);
2227
2228         return hpsa_cmd_free_and_done(h, c, cmd);
2229 }
2230
2231 /* Returns 0 on success, < 0 otherwise. */
2232 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2233                                         struct CommandList *cp)
2234 {
2235         u8 tmf_status = cp->err_info->ScsiStatus;
2236
2237         switch (tmf_status) {
2238         case CISS_TMF_COMPLETE:
2239                 /*
2240                  * CISS_TMF_COMPLETE never happens, instead,
2241                  * ei->CommandStatus == 0 for this case.
2242                  */
2243         case CISS_TMF_SUCCESS:
2244                 return 0;
2245         case CISS_TMF_INVALID_FRAME:
2246         case CISS_TMF_NOT_SUPPORTED:
2247         case CISS_TMF_FAILED:
2248         case CISS_TMF_WRONG_LUN:
2249         case CISS_TMF_OVERLAPPED_TAG:
2250                 break;
2251         default:
2252                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2253                                 tmf_status);
2254                 break;
2255         }
2256         return -tmf_status;
2257 }
2258
2259 static void complete_scsi_command(struct CommandList *cp)
2260 {
2261         struct scsi_cmnd *cmd;
2262         struct ctlr_info *h;
2263         struct ErrorInfo *ei;
2264         struct hpsa_scsi_dev_t *dev;
2265         struct io_accel2_cmd *c2;
2266
2267         u8 sense_key;
2268         u8 asc;      /* additional sense code */
2269         u8 ascq;     /* additional sense code qualifier */
2270         unsigned long sense_data_size;
2271
2272         ei = cp->err_info;
2273         cmd = cp->scsi_cmd;
2274         h = cp->h;
2275         dev = cmd->device->hostdata;
2276         c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2277
2278         scsi_dma_unmap(cmd); /* undo the DMA mappings */
2279         if ((cp->cmd_type == CMD_SCSI) &&
2280                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2281                 hpsa_unmap_sg_chain_block(h, cp);
2282
2283         if ((cp->cmd_type == CMD_IOACCEL2) &&
2284                 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2285                 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2286
2287         cmd->result = (DID_OK << 16);           /* host byte */
2288         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2289
2290         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
2291                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2292
2293         /*
2294          * We check for lockup status here as it may be set for
2295          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2296          * fail_all_oustanding_cmds()
2297          */
2298         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2299                 /* DID_NO_CONNECT will prevent a retry */
2300                 cmd->result = DID_NO_CONNECT << 16;
2301                 return hpsa_cmd_free_and_done(h, cp, cmd);
2302         }
2303
2304         if ((unlikely(hpsa_is_pending_event(cp)))) {
2305                 if (cp->reset_pending)
2306                         return hpsa_cmd_resolve_and_free(h, cp);
2307                 if (cp->abort_pending)
2308                         return hpsa_cmd_abort_and_free(h, cp, cmd);
2309         }
2310
2311         if (cp->cmd_type == CMD_IOACCEL2)
2312                 return process_ioaccel2_completion(h, cp, cmd, dev);
2313
2314         scsi_set_resid(cmd, ei->ResidualCnt);
2315         if (ei->CommandStatus == 0)
2316                 return hpsa_cmd_free_and_done(h, cp, cmd);
2317
2318         /* For I/O accelerator commands, copy over some fields to the normal
2319          * CISS header used below for error handling.
2320          */
2321         if (cp->cmd_type == CMD_IOACCEL1) {
2322                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2323                 cp->Header.SGList = scsi_sg_count(cmd);
2324                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2325                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2326                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
2327                 cp->Header.tag = c->tag;
2328                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2329                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2330
2331                 /* Any RAID offload error results in retry which will use
2332                  * the normal I/O path so the controller can handle whatever's
2333                  * wrong.
2334                  */
2335                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2336                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2337                                 dev->offload_enabled = 0;
2338                         return hpsa_retry_cmd(h, cp);
2339                 }
2340         }
2341
2342         /* an error has occurred */
2343         switch (ei->CommandStatus) {
2344
2345         case CMD_TARGET_STATUS:
2346                 cmd->result |= ei->ScsiStatus;
2347                 /* copy the sense data */
2348                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2349                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2350                 else
2351                         sense_data_size = sizeof(ei->SenseInfo);
2352                 if (ei->SenseLen < sense_data_size)
2353                         sense_data_size = ei->SenseLen;
2354                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2355                 if (ei->ScsiStatus)
2356                         decode_sense_data(ei->SenseInfo, sense_data_size,
2357                                 &sense_key, &asc, &ascq);
2358                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2359                         if (sense_key == ABORTED_COMMAND) {
2360                                 cmd->result |= DID_SOFT_ERROR << 16;
2361                                 break;
2362                         }
2363                         break;
2364                 }
2365                 /* Problem was not a check condition
2366                  * Pass it up to the upper layers...
2367                  */
2368                 if (ei->ScsiStatus) {
2369                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2370                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2371                                 "Returning result: 0x%x\n",
2372                                 cp, ei->ScsiStatus,
2373                                 sense_key, asc, ascq,
2374                                 cmd->result);
2375                 } else {  /* scsi status is zero??? How??? */
2376                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2377                                 "Returning no connection.\n", cp),
2378
2379                         /* Ordinarily, this case should never happen,
2380                          * but there is a bug in some released firmware
2381                          * revisions that allows it to happen if, for
2382                          * example, a 4100 backplane loses power and
2383                          * the tape drive is in it.  We assume that
2384                          * it's a fatal error of some kind because we
2385                          * can't show that it wasn't. We will make it
2386                          * look like selection timeout since that is
2387                          * the most common reason for this to occur,
2388                          * and it's severe enough.
2389                          */
2390
2391                         cmd->result = DID_NO_CONNECT << 16;
2392                 }
2393                 break;
2394
2395         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2396                 break;
2397         case CMD_DATA_OVERRUN:
2398                 dev_warn(&h->pdev->dev,
2399                         "CDB %16phN data overrun\n", cp->Request.CDB);
2400                 break;
2401         case CMD_INVALID: {
2402                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2403                 print_cmd(cp); */
2404                 /* We get CMD_INVALID if you address a non-existent device
2405                  * instead of a selection timeout (no response).  You will
2406                  * see this if you yank out a drive, then try to access it.
2407                  * This is kind of a shame because it means that any other
2408                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2409                  * missing target. */
2410                 cmd->result = DID_NO_CONNECT << 16;
2411         }
2412                 break;
2413         case CMD_PROTOCOL_ERR:
2414                 cmd->result = DID_ERROR << 16;
2415                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2416                                 cp->Request.CDB);
2417                 break;
2418         case CMD_HARDWARE_ERR:
2419                 cmd->result = DID_ERROR << 16;
2420                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2421                         cp->Request.CDB);
2422                 break;
2423         case CMD_CONNECTION_LOST:
2424                 cmd->result = DID_ERROR << 16;
2425                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2426                         cp->Request.CDB);
2427                 break;
2428         case CMD_ABORTED:
2429                 /* Return now to avoid calling scsi_done(). */
2430                 return hpsa_cmd_abort_and_free(h, cp, cmd);
2431         case CMD_ABORT_FAILED:
2432                 cmd->result = DID_ERROR << 16;
2433                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2434                         cp->Request.CDB);
2435                 break;
2436         case CMD_UNSOLICITED_ABORT:
2437                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2438                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2439                         cp->Request.CDB);
2440                 break;
2441         case CMD_TIMEOUT:
2442                 cmd->result = DID_TIME_OUT << 16;
2443                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2444                         cp->Request.CDB);
2445                 break;
2446         case CMD_UNABORTABLE:
2447                 cmd->result = DID_ERROR << 16;
2448                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2449                 break;
2450         case CMD_TMF_STATUS:
2451                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2452                         cmd->result = DID_ERROR << 16;
2453                 break;
2454         case CMD_IOACCEL_DISABLED:
2455                 /* This only handles the direct pass-through case since RAID
2456                  * offload is handled above.  Just attempt a retry.
2457                  */
2458                 cmd->result = DID_SOFT_ERROR << 16;
2459                 dev_warn(&h->pdev->dev,
2460                                 "cp %p had HP SSD Smart Path error\n", cp);
2461                 break;
2462         default:
2463                 cmd->result = DID_ERROR << 16;
2464                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2465                                 cp, ei->CommandStatus);
2466         }
2467
2468         return hpsa_cmd_free_and_done(h, cp, cmd);
2469 }
2470
2471 static void hpsa_pci_unmap(struct pci_dev *pdev,
2472         struct CommandList *c, int sg_used, int data_direction)
2473 {
2474         int i;
2475
2476         for (i = 0; i < sg_used; i++)
2477                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2478                                 le32_to_cpu(c->SG[i].Len),
2479                                 data_direction);
2480 }
2481
2482 static int hpsa_map_one(struct pci_dev *pdev,
2483                 struct CommandList *cp,
2484                 unsigned char *buf,
2485                 size_t buflen,
2486                 int data_direction)
2487 {
2488         u64 addr64;
2489
2490         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2491                 cp->Header.SGList = 0;
2492                 cp->Header.SGTotal = cpu_to_le16(0);
2493                 return 0;
2494         }
2495
2496         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2497         if (dma_mapping_error(&pdev->dev, addr64)) {
2498                 /* Prevent subsequent unmap of something never mapped */
2499                 cp->Header.SGList = 0;
2500                 cp->Header.SGTotal = cpu_to_le16(0);
2501                 return -1;
2502         }
2503         cp->SG[0].Addr = cpu_to_le64(addr64);
2504         cp->SG[0].Len = cpu_to_le32(buflen);
2505         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2506         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2507         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2508         return 0;
2509 }
2510
2511 #define NO_TIMEOUT ((unsigned long) -1)
2512 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2513 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2514         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2515 {
2516         DECLARE_COMPLETION_ONSTACK(wait);
2517
2518         c->waiting = &wait;
2519         __enqueue_cmd_and_start_io(h, c, reply_queue);
2520         if (timeout_msecs == NO_TIMEOUT) {
2521                 /* TODO: get rid of this no-timeout thing */
2522                 wait_for_completion_io(&wait);
2523                 return IO_OK;
2524         }
2525         if (!wait_for_completion_io_timeout(&wait,
2526                                         msecs_to_jiffies(timeout_msecs))) {
2527                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2528                 return -ETIMEDOUT;
2529         }
2530         return IO_OK;
2531 }
2532
2533 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2534                                    int reply_queue, unsigned long timeout_msecs)
2535 {
2536         if (unlikely(lockup_detected(h))) {
2537                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2538                 return IO_OK;
2539         }
2540         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2541 }
2542
2543 static u32 lockup_detected(struct ctlr_info *h)
2544 {
2545         int cpu;
2546         u32 rc, *lockup_detected;
2547
2548         cpu = get_cpu();
2549         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2550         rc = *lockup_detected;
2551         put_cpu();
2552         return rc;
2553 }
2554
2555 #define MAX_DRIVER_CMD_RETRIES 25
2556 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2557         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2558 {
2559         int backoff_time = 10, retry_count = 0;
2560         int rc;
2561
2562         do {
2563                 memset(c->err_info, 0, sizeof(*c->err_info));
2564                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2565                                                   timeout_msecs);
2566                 if (rc)
2567                         break;
2568                 retry_count++;
2569                 if (retry_count > 3) {
2570                         msleep(backoff_time);
2571                         if (backoff_time < 1000)
2572                                 backoff_time *= 2;
2573                 }
2574         } while ((check_for_unit_attention(h, c) ||
2575                         check_for_busy(h, c)) &&
2576                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2577         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2578         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2579                 rc = -EIO;
2580         return rc;
2581 }
2582
2583 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2584                                 struct CommandList *c)
2585 {
2586         const u8 *cdb = c->Request.CDB;
2587         const u8 *lun = c->Header.LUN.LunAddrBytes;
2588
2589         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2590         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2591                 txt, lun[0], lun[1], lun[2], lun[3],
2592                 lun[4], lun[5], lun[6], lun[7],
2593                 cdb[0], cdb[1], cdb[2], cdb[3],
2594                 cdb[4], cdb[5], cdb[6], cdb[7],
2595                 cdb[8], cdb[9], cdb[10], cdb[11],
2596                 cdb[12], cdb[13], cdb[14], cdb[15]);
2597 }
2598
2599 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2600                         struct CommandList *cp)
2601 {
2602         const struct ErrorInfo *ei = cp->err_info;
2603         struct device *d = &cp->h->pdev->dev;
2604         u8 sense_key, asc, ascq;
2605         int sense_len;
2606
2607         switch (ei->CommandStatus) {
2608         case CMD_TARGET_STATUS:
2609                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2610                         sense_len = sizeof(ei->SenseInfo);
2611                 else
2612                         sense_len = ei->SenseLen;
2613                 decode_sense_data(ei->SenseInfo, sense_len,
2614                                         &sense_key, &asc, &ascq);
2615                 hpsa_print_cmd(h, "SCSI status", cp);
2616                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2617                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2618                                 sense_key, asc, ascq);
2619                 else
2620                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2621                 if (ei->ScsiStatus == 0)
2622                         dev_warn(d, "SCSI status is abnormally zero.  "
2623                         "(probably indicates selection timeout "
2624                         "reported incorrectly due to a known "
2625                         "firmware bug, circa July, 2001.)\n");
2626                 break;
2627         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2628                 break;
2629         case CMD_DATA_OVERRUN:
2630                 hpsa_print_cmd(h, "overrun condition", cp);
2631                 break;
2632         case CMD_INVALID: {
2633                 /* controller unfortunately reports SCSI passthru's
2634                  * to non-existent targets as invalid commands.
2635                  */
2636                 hpsa_print_cmd(h, "invalid command", cp);
2637                 dev_warn(d, "probably means device no longer present\n");
2638                 }
2639                 break;
2640         case CMD_PROTOCOL_ERR:
2641                 hpsa_print_cmd(h, "protocol error", cp);
2642                 break;
2643         case CMD_HARDWARE_ERR:
2644                 hpsa_print_cmd(h, "hardware error", cp);
2645                 break;
2646         case CMD_CONNECTION_LOST:
2647                 hpsa_print_cmd(h, "connection lost", cp);
2648                 break;
2649         case CMD_ABORTED:
2650                 hpsa_print_cmd(h, "aborted", cp);
2651                 break;
2652         case CMD_ABORT_FAILED:
2653                 hpsa_print_cmd(h, "abort failed", cp);
2654                 break;
2655         case CMD_UNSOLICITED_ABORT:
2656                 hpsa_print_cmd(h, "unsolicited abort", cp);
2657                 break;
2658         case CMD_TIMEOUT:
2659                 hpsa_print_cmd(h, "timed out", cp);
2660                 break;
2661         case CMD_UNABORTABLE:
2662                 hpsa_print_cmd(h, "unabortable", cp);
2663                 break;
2664         case CMD_CTLR_LOCKUP:
2665                 hpsa_print_cmd(h, "controller lockup detected", cp);
2666                 break;
2667         default:
2668                 hpsa_print_cmd(h, "unknown status", cp);
2669                 dev_warn(d, "Unknown command status %x\n",
2670                                 ei->CommandStatus);
2671         }
2672 }
2673
2674 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2675                         u16 page, unsigned char *buf,
2676                         unsigned char bufsize)
2677 {
2678         int rc = IO_OK;
2679         struct CommandList *c;
2680         struct ErrorInfo *ei;
2681
2682         c = cmd_alloc(h);
2683
2684         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2685                         page, scsi3addr, TYPE_CMD)) {
2686                 rc = -1;
2687                 goto out;
2688         }
2689         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2690                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2691         if (rc)
2692                 goto out;
2693         ei = c->err_info;
2694         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2695                 hpsa_scsi_interpret_error(h, c);
2696                 rc = -1;
2697         }
2698 out:
2699         cmd_free(h, c);
2700         return rc;
2701 }
2702
2703 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2704         u8 reset_type, int reply_queue)
2705 {
2706         int rc = IO_OK;
2707         struct CommandList *c;
2708         struct ErrorInfo *ei;
2709
2710         c = cmd_alloc(h);
2711
2712
2713         /* fill_cmd can't fail here, no data buffer to map. */
2714         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2715                         scsi3addr, TYPE_MSG);
2716         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2717         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2718         if (rc) {
2719                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2720                 goto out;
2721         }
2722         /* no unmap needed here because no data xfer. */
2723
2724         ei = c->err_info;
2725         if (ei->CommandStatus != 0) {
2726                 hpsa_scsi_interpret_error(h, c);
2727                 rc = -1;
2728         }
2729 out:
2730         cmd_free(h, c);
2731         return rc;
2732 }
2733
2734 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2735                                struct hpsa_scsi_dev_t *dev,
2736                                unsigned char *scsi3addr)
2737 {
2738         int i;
2739         bool match = false;
2740         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2741         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2742
2743         if (hpsa_is_cmd_idle(c))
2744                 return false;
2745
2746         switch (c->cmd_type) {
2747         case CMD_SCSI:
2748         case CMD_IOCTL_PEND:
2749                 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2750                                 sizeof(c->Header.LUN.LunAddrBytes));
2751                 break;
2752
2753         case CMD_IOACCEL1:
2754         case CMD_IOACCEL2:
2755                 if (c->phys_disk == dev) {
2756                         /* HBA mode match */
2757                         match = true;
2758                 } else {
2759                         /* Possible RAID mode -- check each phys dev. */
2760                         /* FIXME:  Do we need to take out a lock here?  If
2761                          * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2762                          * instead. */
2763                         for (i = 0; i < dev->nphysical_disks && !match; i++) {
2764                                 /* FIXME: an alternate test might be
2765                                  *
2766                                  * match = dev->phys_disk[i]->ioaccel_handle
2767                                  *              == c2->scsi_nexus;      */
2768                                 match = dev->phys_disk[i] == c->phys_disk;
2769                         }
2770                 }
2771                 break;
2772
2773         case IOACCEL2_TMF:
2774                 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2775                         match = dev->phys_disk[i]->ioaccel_handle ==
2776                                         le32_to_cpu(ac->it_nexus);
2777                 }
2778                 break;
2779
2780         case 0:         /* The command is in the middle of being initialized. */
2781                 match = false;
2782                 break;
2783
2784         default:
2785                 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
2786                         c->cmd_type);
2787                 BUG();
2788         }
2789
2790         return match;
2791 }
2792
2793 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
2794         unsigned char *scsi3addr, u8 reset_type, int reply_queue)
2795 {
2796         int i;
2797         int rc = 0;
2798
2799         /* We can really only handle one reset at a time */
2800         if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
2801                 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
2802                 return -EINTR;
2803         }
2804
2805         BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
2806
2807         for (i = 0; i < h->nr_cmds; i++) {
2808                 struct CommandList *c = h->cmd_pool + i;
2809                 int refcount = atomic_inc_return(&c->refcount);
2810
2811                 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
2812                         unsigned long flags;
2813
2814                         /*
2815                          * Mark the target command as having a reset pending,
2816                          * then lock a lock so that the command cannot complete
2817                          * while we're considering it.  If the command is not
2818                          * idle then count it; otherwise revoke the event.
2819                          */
2820                         c->reset_pending = dev;
2821                         spin_lock_irqsave(&h->lock, flags);     /* Implied MB */
2822                         if (!hpsa_is_cmd_idle(c))
2823                                 atomic_inc(&dev->reset_cmds_out);
2824                         else
2825                                 c->reset_pending = NULL;
2826                         spin_unlock_irqrestore(&h->lock, flags);
2827                 }
2828
2829                 cmd_free(h, c);
2830         }
2831
2832         rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
2833         if (!rc)
2834                 wait_event(h->event_sync_wait_queue,
2835                         atomic_read(&dev->reset_cmds_out) == 0 ||
2836                         lockup_detected(h));
2837
2838         if (unlikely(lockup_detected(h))) {
2839                 dev_warn(&h->pdev->dev,
2840                          "Controller lockup detected during reset wait\n");
2841                 rc = -ENODEV;
2842         }
2843
2844         if (unlikely(rc))
2845                 atomic_set(&dev->reset_cmds_out, 0);
2846
2847         mutex_unlock(&h->reset_mutex);
2848         return rc;
2849 }
2850
2851 static void hpsa_get_raid_level(struct ctlr_info *h,
2852         unsigned char *scsi3addr, unsigned char *raid_level)
2853 {
2854         int rc;
2855         unsigned char *buf;
2856
2857         *raid_level = RAID_UNKNOWN;
2858         buf = kzalloc(64, GFP_KERNEL);
2859         if (!buf)
2860                 return;
2861         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2862         if (rc == 0)
2863                 *raid_level = buf[8];
2864         if (*raid_level > RAID_UNKNOWN)
2865                 *raid_level = RAID_UNKNOWN;
2866         kfree(buf);
2867         return;
2868 }
2869
2870 #define HPSA_MAP_DEBUG
2871 #ifdef HPSA_MAP_DEBUG
2872 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2873                                 struct raid_map_data *map_buff)
2874 {
2875         struct raid_map_disk_data *dd = &map_buff->data[0];
2876         int map, row, col;
2877         u16 map_cnt, row_cnt, disks_per_row;
2878
2879         if (rc != 0)
2880                 return;
2881
2882         /* Show details only if debugging has been activated. */
2883         if (h->raid_offload_debug < 2)
2884                 return;
2885
2886         dev_info(&h->pdev->dev, "structure_size = %u\n",
2887                                 le32_to_cpu(map_buff->structure_size));
2888         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2889                         le32_to_cpu(map_buff->volume_blk_size));
2890         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2891                         le64_to_cpu(map_buff->volume_blk_cnt));
2892         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2893                         map_buff->phys_blk_shift);
2894         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2895                         map_buff->parity_rotation_shift);
2896         dev_info(&h->pdev->dev, "strip_size = %u\n",
2897                         le16_to_cpu(map_buff->strip_size));
2898         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2899                         le64_to_cpu(map_buff->disk_starting_blk));
2900         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2901                         le64_to_cpu(map_buff->disk_blk_cnt));
2902         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2903                         le16_to_cpu(map_buff->data_disks_per_row));
2904         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2905                         le16_to_cpu(map_buff->metadata_disks_per_row));
2906         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2907                         le16_to_cpu(map_buff->row_cnt));
2908         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2909                         le16_to_cpu(map_buff->layout_map_count));
2910         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2911                         le16_to_cpu(map_buff->flags));
2912         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2913                         le16_to_cpu(map_buff->flags) &
2914                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2915         dev_info(&h->pdev->dev, "dekindex = %u\n",
2916                         le16_to_cpu(map_buff->dekindex));
2917         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2918         for (map = 0; map < map_cnt; map++) {
2919                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2920                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2921                 for (row = 0; row < row_cnt; row++) {
2922                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2923                         disks_per_row =
2924                                 le16_to_cpu(map_buff->data_disks_per_row);
2925                         for (col = 0; col < disks_per_row; col++, dd++)
2926                                 dev_info(&h->pdev->dev,
2927                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2928                                         col, dd->ioaccel_handle,
2929                                         dd->xor_mult[0], dd->xor_mult[1]);
2930                         disks_per_row =
2931                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2932                         for (col = 0; col < disks_per_row; col++, dd++)
2933                                 dev_info(&h->pdev->dev,
2934                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2935                                         col, dd->ioaccel_handle,
2936                                         dd->xor_mult[0], dd->xor_mult[1]);
2937                 }
2938         }
2939 }
2940 #else
2941 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2942                         __attribute__((unused)) int rc,
2943                         __attribute__((unused)) struct raid_map_data *map_buff)
2944 {
2945 }
2946 #endif
2947
2948 static int hpsa_get_raid_map(struct ctlr_info *h,
2949         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2950 {
2951         int rc = 0;
2952         struct CommandList *c;
2953         struct ErrorInfo *ei;
2954
2955         c = cmd_alloc(h);
2956
2957         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2958                         sizeof(this_device->raid_map), 0,
2959                         scsi3addr, TYPE_CMD)) {
2960                 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
2961                 cmd_free(h, c);
2962                 return -1;
2963         }
2964         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2965                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2966         if (rc)
2967                 goto out;
2968         ei = c->err_info;
2969         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2970                 hpsa_scsi_interpret_error(h, c);
2971                 rc = -1;
2972                 goto out;
2973         }
2974         cmd_free(h, c);
2975
2976         /* @todo in the future, dynamically allocate RAID map memory */
2977         if (le32_to_cpu(this_device->raid_map.structure_size) >
2978                                 sizeof(this_device->raid_map)) {
2979                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2980                 rc = -1;
2981         }
2982         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2983         return rc;
2984 out:
2985         cmd_free(h, c);
2986         return rc;
2987 }
2988
2989 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
2990                 unsigned char scsi3addr[], u16 bmic_device_index,
2991                 struct bmic_identify_physical_device *buf, size_t bufsize)
2992 {
2993         int rc = IO_OK;
2994         struct CommandList *c;
2995         struct ErrorInfo *ei;
2996
2997         c = cmd_alloc(h);
2998         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
2999                 0, RAID_CTLR_LUNID, TYPE_CMD);
3000         if (rc)
3001                 goto out;
3002
3003         c->Request.CDB[2] = bmic_device_index & 0xff;
3004         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3005
3006         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3007                                                 NO_TIMEOUT);
3008         ei = c->err_info;
3009         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3010                 hpsa_scsi_interpret_error(h, c);
3011                 rc = -1;
3012         }
3013 out:
3014         cmd_free(h, c);
3015         return rc;
3016 }
3017
3018 static int hpsa_vpd_page_supported(struct ctlr_info *h,
3019         unsigned char scsi3addr[], u8 page)
3020 {
3021         int rc;
3022         int i;
3023         int pages;
3024         unsigned char *buf, bufsize;
3025
3026         buf = kzalloc(256, GFP_KERNEL);
3027         if (!buf)
3028                 return 0;
3029
3030         /* Get the size of the page list first */
3031         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3032                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3033                                 buf, HPSA_VPD_HEADER_SZ);
3034         if (rc != 0)
3035                 goto exit_unsupported;
3036         pages = buf[3];
3037         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3038                 bufsize = pages + HPSA_VPD_HEADER_SZ;
3039         else
3040                 bufsize = 255;
3041
3042         /* Get the whole VPD page list */
3043         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3044                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3045                                 buf, bufsize);
3046         if (rc != 0)
3047                 goto exit_unsupported;
3048
3049         pages = buf[3];
3050         for (i = 1; i <= pages; i++)
3051                 if (buf[3 + i] == page)
3052                         goto exit_supported;
3053 exit_unsupported:
3054         kfree(buf);
3055         return 0;
3056 exit_supported:
3057         kfree(buf);
3058         return 1;
3059 }
3060
3061 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3062         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3063 {
3064         int rc;
3065         unsigned char *buf;
3066         u8 ioaccel_status;
3067
3068         this_device->offload_config = 0;
3069         this_device->offload_enabled = 0;
3070         this_device->offload_to_be_enabled = 0;
3071
3072         buf = kzalloc(64, GFP_KERNEL);
3073         if (!buf)
3074                 return;
3075         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3076                 goto out;
3077         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3078                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3079         if (rc != 0)
3080                 goto out;
3081
3082 #define IOACCEL_STATUS_BYTE 4
3083 #define OFFLOAD_CONFIGURED_BIT 0x01
3084 #define OFFLOAD_ENABLED_BIT 0x02
3085         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3086         this_device->offload_config =
3087                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3088         if (this_device->offload_config) {
3089                 this_device->offload_enabled =
3090                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3091                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3092                         this_device->offload_enabled = 0;
3093         }
3094         this_device->offload_to_be_enabled = this_device->offload_enabled;
3095 out:
3096         kfree(buf);
3097         return;
3098 }
3099
3100 /* Get the device id from inquiry page 0x83 */
3101 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3102         unsigned char *device_id, int buflen)
3103 {
3104         int rc;
3105         unsigned char *buf;
3106
3107         if (buflen > 16)
3108                 buflen = 16;
3109         buf = kzalloc(64, GFP_KERNEL);
3110         if (!buf)
3111                 return -ENOMEM;
3112         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3113         if (rc == 0)
3114                 memcpy(device_id, &buf[8], buflen);
3115         kfree(buf);
3116         return rc != 0;
3117 }
3118
3119 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3120                 void *buf, int bufsize,
3121                 int extended_response)
3122 {
3123         int rc = IO_OK;
3124         struct CommandList *c;
3125         unsigned char scsi3addr[8];
3126         struct ErrorInfo *ei;
3127
3128         c = cmd_alloc(h);
3129
3130         /* address the controller */
3131         memset(scsi3addr, 0, sizeof(scsi3addr));
3132         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3133                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3134                 rc = -1;
3135                 goto out;
3136         }
3137         if (extended_response)
3138                 c->Request.CDB[1] = extended_response;
3139         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3140                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3141         if (rc)
3142                 goto out;
3143         ei = c->err_info;
3144         if (ei->CommandStatus != 0 &&
3145             ei->CommandStatus != CMD_DATA_UNDERRUN) {
3146                 hpsa_scsi_interpret_error(h, c);
3147                 rc = -1;
3148         } else {
3149                 struct ReportLUNdata *rld = buf;
3150
3151                 if (rld->extended_response_flag != extended_response) {
3152                         dev_err(&h->pdev->dev,
3153                                 "report luns requested format %u, got %u\n",
3154                                 extended_response,
3155                                 rld->extended_response_flag);
3156                         rc = -1;
3157                 }
3158         }
3159 out:
3160         cmd_free(h, c);
3161         return rc;
3162 }
3163
3164 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3165                 struct ReportExtendedLUNdata *buf, int bufsize)
3166 {
3167         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3168                                                 HPSA_REPORT_PHYS_EXTENDED);
3169 }
3170
3171 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3172                 struct ReportLUNdata *buf, int bufsize)
3173 {
3174         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3175 }
3176
3177 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3178         int bus, int target, int lun)
3179 {
3180         device->bus = bus;
3181         device->target = target;
3182         device->lun = lun;
3183 }
3184
3185 /* Use VPD inquiry to get details of volume status */
3186 static int hpsa_get_volume_status(struct ctlr_info *h,
3187                                         unsigned char scsi3addr[])
3188 {
3189         int rc;
3190         int status;
3191         int size;
3192         unsigned char *buf;
3193
3194         buf = kzalloc(64, GFP_KERNEL);
3195         if (!buf)
3196                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3197
3198         /* Does controller have VPD for logical volume status? */
3199         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3200                 goto exit_failed;
3201
3202         /* Get the size of the VPD return buffer */
3203         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3204                                         buf, HPSA_VPD_HEADER_SZ);
3205         if (rc != 0)
3206                 goto exit_failed;
3207         size = buf[3];
3208
3209         /* Now get the whole VPD buffer */
3210         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3211                                         buf, size + HPSA_VPD_HEADER_SZ);
3212         if (rc != 0)
3213                 goto exit_failed;
3214         status = buf[4]; /* status byte */
3215
3216         kfree(buf);
3217         return status;
3218 exit_failed:
3219         kfree(buf);
3220         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3221 }
3222
3223 /* Determine offline status of a volume.
3224  * Return either:
3225  *  0 (not offline)
3226  *  0xff (offline for unknown reasons)
3227  *  # (integer code indicating one of several NOT READY states
3228  *     describing why a volume is to be kept offline)
3229  */
3230 static int hpsa_volume_offline(struct ctlr_info *h,
3231                                         unsigned char scsi3addr[])
3232 {
3233         struct CommandList *c;
3234         unsigned char *sense;
3235         u8 sense_key, asc, ascq;
3236         int sense_len;
3237         int rc, ldstat = 0;
3238         u16 cmd_status;
3239         u8 scsi_status;
3240 #define ASC_LUN_NOT_READY 0x04
3241 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3242 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3243
3244         c = cmd_alloc(h);
3245
3246         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3247         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3248         if (rc) {
3249                 cmd_free(h, c);
3250                 return 0;
3251         }
3252         sense = c->err_info->SenseInfo;
3253         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3254                 sense_len = sizeof(c->err_info->SenseInfo);
3255         else
3256                 sense_len = c->err_info->SenseLen;
3257         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3258         cmd_status = c->err_info->CommandStatus;
3259         scsi_status = c->err_info->ScsiStatus;
3260         cmd_free(h, c);
3261         /* Is the volume 'not ready'? */
3262         if (cmd_status != CMD_TARGET_STATUS ||
3263                 scsi_status != SAM_STAT_CHECK_CONDITION ||
3264                 sense_key != NOT_READY ||
3265                 asc != ASC_LUN_NOT_READY)  {
3266                 return 0;
3267         }
3268
3269         /* Determine the reason for not ready state */
3270         ldstat = hpsa_get_volume_status(h, scsi3addr);
3271
3272         /* Keep volume offline in certain cases: */
3273         switch (ldstat) {
3274         case HPSA_LV_UNDERGOING_ERASE:
3275         case HPSA_LV_NOT_AVAILABLE:
3276         case HPSA_LV_UNDERGOING_RPI:
3277         case HPSA_LV_PENDING_RPI:
3278         case HPSA_LV_ENCRYPTED_NO_KEY:
3279         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3280         case HPSA_LV_UNDERGOING_ENCRYPTION:
3281         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3282         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3283                 return ldstat;
3284         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3285                 /* If VPD status page isn't available,
3286                  * use ASC/ASCQ to determine state
3287                  */
3288                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3289                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3290                         return ldstat;
3291                 break;
3292         default:
3293                 break;
3294         }
3295         return 0;
3296 }
3297
3298 /*
3299  * Find out if a logical device supports aborts by simply trying one.
3300  * Smart Array may claim not to support aborts on logical drives, but
3301  * if a MSA2000 * is connected, the drives on that will be presented
3302  * by the Smart Array as logical drives, and aborts may be sent to
3303  * those devices successfully.  So the simplest way to find out is
3304  * to simply try an abort and see how the device responds.
3305  */
3306 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3307                                         unsigned char *scsi3addr)
3308 {
3309         struct CommandList *c;
3310         struct ErrorInfo *ei;
3311         int rc = 0;
3312
3313         u64 tag = (u64) -1; /* bogus tag */
3314
3315         /* Assume that physical devices support aborts */
3316         if (!is_logical_dev_addr_mode(scsi3addr))
3317                 return 1;
3318
3319         c = cmd_alloc(h);
3320
3321         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3322         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3323         /* no unmap needed here because no data xfer. */
3324         ei = c->err_info;
3325         switch (ei->CommandStatus) {
3326         case CMD_INVALID:
3327                 rc = 0;
3328                 break;
3329         case CMD_UNABORTABLE:
3330         case CMD_ABORT_FAILED:
3331                 rc = 1;
3332                 break;
3333         case CMD_TMF_STATUS:
3334                 rc = hpsa_evaluate_tmf_status(h, c);
3335                 break;
3336         default:
3337                 rc = 0;
3338                 break;
3339         }
3340         cmd_free(h, c);
3341         return rc;
3342 }
3343
3344 static int hpsa_update_device_info(struct ctlr_info *h,
3345         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3346         unsigned char *is_OBDR_device)
3347 {
3348
3349 #define OBDR_SIG_OFFSET 43
3350 #define OBDR_TAPE_SIG "$DR-10"
3351 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3352 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3353
3354         unsigned char *inq_buff;
3355         unsigned char *obdr_sig;
3356
3357         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3358         if (!inq_buff)
3359                 goto bail_out;
3360
3361         /* Do an inquiry to the device to see what it is. */
3362         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3363                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3364                 /* Inquiry failed (msg printed already) */
3365                 dev_err(&h->pdev->dev,
3366                         "hpsa_update_device_info: inquiry failed\n");
3367                 goto bail_out;
3368         }
3369
3370         this_device->devtype = (inq_buff[0] & 0x1f);
3371         memcpy(this_device->scsi3addr, scsi3addr, 8);
3372         memcpy(this_device->vendor, &inq_buff[8],
3373                 sizeof(this_device->vendor));
3374         memcpy(this_device->model, &inq_buff[16],
3375                 sizeof(this_device->model));
3376         memset(this_device->device_id, 0,
3377                 sizeof(this_device->device_id));
3378         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
3379                 sizeof(this_device->device_id));
3380
3381         if (this_device->devtype == TYPE_DISK &&
3382                 is_logical_dev_addr_mode(scsi3addr)) {
3383                 int volume_offline;
3384
3385                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3386                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3387                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3388                 volume_offline = hpsa_volume_offline(h, scsi3addr);
3389                 if (volume_offline < 0 || volume_offline > 0xff)
3390                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3391                 this_device->volume_offline = volume_offline & 0xff;
3392         } else {
3393                 this_device->raid_level = RAID_UNKNOWN;
3394                 this_device->offload_config = 0;
3395                 this_device->offload_enabled = 0;
3396                 this_device->offload_to_be_enabled = 0;
3397                 this_device->hba_ioaccel_enabled = 0;
3398                 this_device->volume_offline = 0;
3399                 this_device->queue_depth = h->nr_cmds;
3400         }
3401
3402         if (is_OBDR_device) {
3403                 /* See if this is a One-Button-Disaster-Recovery device
3404                  * by looking for "$DR-10" at offset 43 in inquiry data.
3405                  */
3406                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3407                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3408                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3409                                                 OBDR_SIG_LEN) == 0);
3410         }
3411         kfree(inq_buff);
3412         return 0;
3413
3414 bail_out:
3415         kfree(inq_buff);
3416         return 1;
3417 }
3418
3419 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3420                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3421 {
3422         unsigned long flags;
3423         int rc, entry;
3424         /*
3425          * See if this device supports aborts.  If we already know
3426          * the device, we already know if it supports aborts, otherwise
3427          * we have to find out if it supports aborts by trying one.
3428          */
3429         spin_lock_irqsave(&h->devlock, flags);
3430         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3431         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3432                 entry >= 0 && entry < h->ndevices) {
3433                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3434                 spin_unlock_irqrestore(&h->devlock, flags);
3435         } else {
3436                 spin_unlock_irqrestore(&h->devlock, flags);
3437                 dev->supports_aborts =
3438                                 hpsa_device_supports_aborts(h, scsi3addr);
3439                 if (dev->supports_aborts < 0)
3440                         dev->supports_aborts = 0;
3441         }
3442 }
3443
3444 static unsigned char *ext_target_model[] = {
3445         "MSA2012",
3446         "MSA2024",
3447         "MSA2312",
3448         "MSA2324",
3449         "P2000 G3 SAS",
3450         "MSA 2040 SAS",
3451         NULL,
3452 };
3453
3454 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3455 {
3456         int i;
3457
3458         for (i = 0; ext_target_model[i]; i++)
3459                 if (strncmp(device->model, ext_target_model[i],
3460                         strlen(ext_target_model[i])) == 0)
3461                         return 1;
3462         return 0;
3463 }
3464
3465 /* Helper function to assign bus, target, lun mapping of devices.
3466  * Puts non-external target logical volumes on bus 0, external target logical
3467  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3468  * Logical drive target and lun are assigned at this time, but
3469  * physical device lun and target assignment are deferred (assigned
3470  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3471  */
3472 static void figure_bus_target_lun(struct ctlr_info *h,
3473         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3474 {
3475         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3476
3477         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3478                 /* physical device, target and lun filled in later */
3479                 if (is_hba_lunid(lunaddrbytes))
3480                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3481                 else
3482                         /* defer target, lun assignment for physical devices */
3483                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3484                 return;
3485         }
3486         /* It's a logical device */
3487         if (is_ext_target(h, device)) {
3488                 /* external target way, put logicals on bus 1
3489                  * and match target/lun numbers box
3490                  * reports, other smart array, bus 0, target 0, match lunid
3491                  */
3492                 hpsa_set_bus_target_lun(device,
3493                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3494                 return;
3495         }
3496         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3497 }
3498
3499 /*
3500  * If there is no lun 0 on a target, linux won't find any devices.
3501  * For the external targets (arrays), we have to manually detect the enclosure
3502  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3503  * it for some reason.  *tmpdevice is the target we're adding,
3504  * this_device is a pointer into the current element of currentsd[]
3505  * that we're building up in update_scsi_devices(), below.
3506  * lunzerobits is a bitmap that tracks which targets already have a
3507  * lun 0 assigned.
3508  * Returns 1 if an enclosure was added, 0 if not.
3509  */
3510 static int add_ext_target_dev(struct ctlr_info *h,
3511         struct hpsa_scsi_dev_t *tmpdevice,
3512         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3513         unsigned long lunzerobits[], int *n_ext_target_devs)
3514 {
3515         unsigned char scsi3addr[8];
3516
3517         if (test_bit(tmpdevice->target, lunzerobits))
3518                 return 0; /* There is already a lun 0 on this target. */
3519
3520         if (!is_logical_dev_addr_mode(lunaddrbytes))
3521                 return 0; /* It's the logical targets that may lack lun 0. */
3522
3523         if (!is_ext_target(h, tmpdevice))
3524                 return 0; /* Only external target devices have this problem. */
3525
3526         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3527                 return 0;
3528
3529         memset(scsi3addr, 0, 8);
3530         scsi3addr[3] = tmpdevice->target;
3531         if (is_hba_lunid(scsi3addr))
3532                 return 0; /* Don't add the RAID controller here. */
3533
3534         if (is_scsi_rev_5(h))
3535                 return 0; /* p1210m doesn't need to do this. */
3536
3537         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3538                 dev_warn(&h->pdev->dev, "Maximum number of external "
3539                         "target devices exceeded.  Check your hardware "
3540                         "configuration.");
3541                 return 0;
3542         }
3543
3544         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3545                 return 0;
3546         (*n_ext_target_devs)++;
3547         hpsa_set_bus_target_lun(this_device,
3548                                 tmpdevice->bus, tmpdevice->target, 0);
3549         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3550         set_bit(tmpdevice->target, lunzerobits);
3551         return 1;
3552 }
3553
3554 /*
3555  * Get address of physical disk used for an ioaccel2 mode command:
3556  *      1. Extract ioaccel2 handle from the command.
3557  *      2. Find a matching ioaccel2 handle from list of physical disks.
3558  *      3. Return:
3559  *              1 and set scsi3addr to address of matching physical
3560  *              0 if no matching physical disk was found.
3561  */
3562 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3563         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3564 {
3565         struct io_accel2_cmd *c2 =
3566                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3567         unsigned long flags;
3568         int i;
3569
3570         spin_lock_irqsave(&h->devlock, flags);
3571         for (i = 0; i < h->ndevices; i++)
3572                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3573                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3574                                 sizeof(h->dev[i]->scsi3addr));
3575                         spin_unlock_irqrestore(&h->devlock, flags);
3576                         return 1;
3577                 }
3578         spin_unlock_irqrestore(&h->devlock, flags);
3579         return 0;
3580 }
3581
3582 /*
3583  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3584  * logdev.  The number of luns in physdev and logdev are returned in
3585  * *nphysicals and *nlogicals, respectively.
3586  * Returns 0 on success, -1 otherwise.
3587  */
3588 static int hpsa_gather_lun_info(struct ctlr_info *h,
3589         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3590         struct ReportLUNdata *logdev, u32 *nlogicals)
3591 {
3592         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3593                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3594                 return -1;
3595         }
3596         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3597         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3598                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3599                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3600                 *nphysicals = HPSA_MAX_PHYS_LUN;
3601         }
3602         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3603                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3604                 return -1;
3605         }
3606         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3607         /* Reject Logicals in excess of our max capability. */
3608         if (*nlogicals > HPSA_MAX_LUN) {
3609                 dev_warn(&h->pdev->dev,
3610                         "maximum logical LUNs (%d) exceeded.  "
3611                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3612                         *nlogicals - HPSA_MAX_LUN);
3613                         *nlogicals = HPSA_MAX_LUN;
3614         }
3615         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3616                 dev_warn(&h->pdev->dev,
3617                         "maximum logical + physical LUNs (%d) exceeded. "
3618                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3619                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3620                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3621         }
3622         return 0;
3623 }
3624
3625 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3626         int i, int nphysicals, int nlogicals,
3627         struct ReportExtendedLUNdata *physdev_list,
3628         struct ReportLUNdata *logdev_list)
3629 {
3630         /* Helper function, figure out where the LUN ID info is coming from
3631          * given index i, lists of physical and logical devices, where in
3632          * the list the raid controller is supposed to appear (first or last)
3633          */
3634
3635         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3636         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3637
3638         if (i == raid_ctlr_position)
3639                 return RAID_CTLR_LUNID;
3640
3641         if (i < logicals_start)
3642                 return &physdev_list->LUN[i -
3643                                 (raid_ctlr_position == 0)].lunid[0];
3644
3645         if (i < last_device)
3646                 return &logdev_list->LUN[i - nphysicals -
3647                         (raid_ctlr_position == 0)][0];
3648         BUG();
3649         return NULL;
3650 }
3651
3652 /* get physical drive ioaccel handle and queue depth */
3653 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3654                 struct hpsa_scsi_dev_t *dev,
3655                 u8 *lunaddrbytes,
3656                 struct bmic_identify_physical_device *id_phys)
3657 {
3658         int rc;
3659         struct ext_report_lun_entry *rle =
3660                 (struct ext_report_lun_entry *) lunaddrbytes;
3661
3662         dev->ioaccel_handle = rle->ioaccel_handle;
3663         if (PHYS_IOACCEL(lunaddrbytes) && dev->ioaccel_handle)
3664                 dev->hba_ioaccel_enabled = 1;
3665         memset(id_phys, 0, sizeof(*id_phys));
3666         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3667                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3668                         sizeof(*id_phys));
3669         if (!rc)
3670                 /* Reserve space for FW operations */
3671 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3672 #define DRIVE_QUEUE_DEPTH 7
3673                 dev->queue_depth =
3674                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3675                                 DRIVE_CMDS_RESERVED_FOR_FW;
3676         else
3677                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3678 }
3679
3680 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
3681         u8 *lunaddrbytes,
3682         struct bmic_identify_physical_device *id_phys)
3683 {
3684         if (PHYS_IOACCEL(lunaddrbytes)
3685                 && this_device->ioaccel_handle)
3686                 this_device->hba_ioaccel_enabled = 1;
3687
3688         memcpy(&this_device->active_path_index,
3689                 &id_phys->active_path_number,
3690                 sizeof(this_device->active_path_index));
3691         memcpy(&this_device->path_map,
3692                 &id_phys->redundant_path_present_map,
3693                 sizeof(this_device->path_map));
3694         memcpy(&this_device->box,
3695                 &id_phys->alternate_paths_phys_box_on_port,
3696                 sizeof(this_device->box));
3697         memcpy(&this_device->phys_connector,
3698                 &id_phys->alternate_paths_phys_connector,
3699                 sizeof(this_device->phys_connector));
3700         memcpy(&this_device->bay,
3701                 &id_phys->phys_bay_in_box,
3702                 sizeof(this_device->bay));
3703 }
3704
3705 static void hpsa_update_scsi_devices(struct ctlr_info *h)
3706 {
3707         /* the idea here is we could get notified
3708          * that some devices have changed, so we do a report
3709          * physical luns and report logical luns cmd, and adjust
3710          * our list of devices accordingly.
3711          *
3712          * The scsi3addr's of devices won't change so long as the
3713          * adapter is not reset.  That means we can rescan and
3714          * tell which devices we already know about, vs. new
3715          * devices, vs.  disappearing devices.
3716          */
3717         struct ReportExtendedLUNdata *physdev_list = NULL;
3718         struct ReportLUNdata *logdev_list = NULL;
3719         struct bmic_identify_physical_device *id_phys = NULL;
3720         u32 nphysicals = 0;
3721         u32 nlogicals = 0;
3722         u32 ndev_allocated = 0;
3723         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3724         int ncurrent = 0;
3725         int i, n_ext_target_devs, ndevs_to_allocate;
3726         int raid_ctlr_position;
3727         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3728
3729         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3730         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3731         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3732         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3733         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3734
3735         if (!currentsd || !physdev_list || !logdev_list ||
3736                 !tmpdevice || !id_phys) {
3737                 dev_err(&h->pdev->dev, "out of memory\n");
3738                 goto out;
3739         }
3740         memset(lunzerobits, 0, sizeof(lunzerobits));
3741
3742         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3743                         logdev_list, &nlogicals))
3744                 goto out;
3745
3746         /* We might see up to the maximum number of logical and physical disks
3747          * plus external target devices, and a device for the local RAID
3748          * controller.
3749          */
3750         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3751
3752         /* Allocate the per device structures */
3753         for (i = 0; i < ndevs_to_allocate; i++) {
3754                 if (i >= HPSA_MAX_DEVICES) {
3755                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3756                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3757                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3758                         break;
3759                 }
3760
3761                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3762                 if (!currentsd[i]) {
3763                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3764                                 __FILE__, __LINE__);
3765                         goto out;
3766                 }
3767                 ndev_allocated++;
3768         }
3769
3770         if (is_scsi_rev_5(h))
3771                 raid_ctlr_position = 0;
3772         else
3773                 raid_ctlr_position = nphysicals + nlogicals;
3774
3775         /* adjust our table of devices */
3776         n_ext_target_devs = 0;
3777         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3778                 u8 *lunaddrbytes, is_OBDR = 0;
3779
3780                 /* Figure out where the LUN ID info is coming from */
3781                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3782                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3783
3784                 /* skip masked non-disk devices */
3785                 if (MASKED_DEVICE(lunaddrbytes))
3786                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3787                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3788                                 continue;
3789
3790                 /* Get device type, vendor, model, device id */
3791                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3792                                                         &is_OBDR))
3793                         continue; /* skip it if we can't talk to it. */
3794                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3795                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3796                 this_device = currentsd[ncurrent];
3797
3798                 /*
3799                  * For external target devices, we have to insert a LUN 0 which
3800                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3801                  * is nonetheless an enclosure device there.  We have to
3802                  * present that otherwise linux won't find anything if
3803                  * there is no lun 0.
3804                  */
3805                 if (add_ext_target_dev(h, tmpdevice, this_device,
3806                                 lunaddrbytes, lunzerobits,
3807                                 &n_ext_target_devs)) {
3808                         ncurrent++;
3809                         this_device = currentsd[ncurrent];
3810                 }
3811
3812                 *this_device = *tmpdevice;
3813
3814                 /* do not expose masked devices */
3815                 if (MASKED_DEVICE(lunaddrbytes) &&
3816                         i < nphysicals + (raid_ctlr_position == 0)) {
3817                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3818                 } else {
3819                         this_device->expose_state =
3820                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3821                 }
3822
3823                 switch (this_device->devtype) {
3824                 case TYPE_ROM:
3825                         /* We don't *really* support actual CD-ROM devices,
3826                          * just "One Button Disaster Recovery" tape drive
3827                          * which temporarily pretends to be a CD-ROM drive.
3828                          * So we check that the device is really an OBDR tape
3829                          * device by checking for "$DR-10" in bytes 43-48 of
3830                          * the inquiry data.
3831                          */
3832                         if (is_OBDR)
3833                                 ncurrent++;
3834                         break;
3835                 case TYPE_DISK:
3836                         if (i < nphysicals + (raid_ctlr_position == 0)) {
3837                                 /* The disk is in HBA mode. */
3838                                 /* Never use RAID mapper in HBA mode. */
3839                                 this_device->offload_enabled = 0;
3840                                 hpsa_get_ioaccel_drive_info(h, this_device,
3841                                         lunaddrbytes, id_phys);
3842                                 hpsa_get_path_info(this_device, lunaddrbytes,
3843                                                         id_phys);
3844                         }
3845                         ncurrent++;
3846                         break;
3847                 case TYPE_TAPE:
3848                 case TYPE_MEDIUM_CHANGER:
3849                 case TYPE_ENCLOSURE:
3850                         ncurrent++;
3851                         break;
3852                 case TYPE_RAID:
3853                         /* Only present the Smartarray HBA as a RAID controller.
3854                          * If it's a RAID controller other than the HBA itself
3855                          * (an external RAID controller, MSA500 or similar)
3856                          * don't present it.
3857                          */
3858                         if (!is_hba_lunid(lunaddrbytes))
3859                                 break;
3860                         ncurrent++;
3861                         break;
3862                 default:
3863                         break;
3864                 }
3865                 if (ncurrent >= HPSA_MAX_DEVICES)
3866                         break;
3867         }
3868         adjust_hpsa_scsi_table(h, currentsd, ncurrent);
3869 out:
3870         kfree(tmpdevice);
3871         for (i = 0; i < ndev_allocated; i++)
3872                 kfree(currentsd[i]);
3873         kfree(currentsd);
3874         kfree(physdev_list);
3875         kfree(logdev_list);
3876         kfree(id_phys);
3877 }
3878
3879 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3880                                    struct scatterlist *sg)
3881 {
3882         u64 addr64 = (u64) sg_dma_address(sg);
3883         unsigned int len = sg_dma_len(sg);
3884
3885         desc->Addr = cpu_to_le64(addr64);
3886         desc->Len = cpu_to_le32(len);
3887         desc->Ext = 0;
3888 }
3889
3890 /*
3891  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3892  * dma mapping  and fills in the scatter gather entries of the
3893  * hpsa command, cp.
3894  */
3895 static int hpsa_scatter_gather(struct ctlr_info *h,
3896                 struct CommandList *cp,
3897                 struct scsi_cmnd *cmd)
3898 {
3899         struct scatterlist *sg;
3900         int use_sg, i, sg_limit, chained, last_sg;
3901         struct SGDescriptor *curr_sg;
3902
3903         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3904
3905         use_sg = scsi_dma_map(cmd);
3906         if (use_sg < 0)
3907                 return use_sg;
3908
3909         if (!use_sg)
3910                 goto sglist_finished;
3911
3912         /*
3913          * If the number of entries is greater than the max for a single list,
3914          * then we have a chained list; we will set up all but one entry in the
3915          * first list (the last entry is saved for link information);
3916          * otherwise, we don't have a chained list and we'll set up at each of
3917          * the entries in the one list.
3918          */
3919         curr_sg = cp->SG;
3920         chained = use_sg > h->max_cmd_sg_entries;
3921         sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
3922         last_sg = scsi_sg_count(cmd) - 1;
3923         scsi_for_each_sg(cmd, sg, sg_limit, i) {
3924                 hpsa_set_sg_descriptor(curr_sg, sg);
3925                 curr_sg++;
3926         }
3927
3928         if (chained) {
3929                 /*
3930                  * Continue with the chained list.  Set curr_sg to the chained
3931                  * list.  Modify the limit to the total count less the entries
3932                  * we've already set up.  Resume the scan at the list entry
3933                  * where the previous loop left off.
3934                  */
3935                 curr_sg = h->cmd_sg_list[cp->cmdindex];
3936                 sg_limit = use_sg - sg_limit;
3937                 for_each_sg(sg, sg, sg_limit, i) {
3938                         hpsa_set_sg_descriptor(curr_sg, sg);
3939                         curr_sg++;
3940                 }
3941         }
3942
3943         /* Back the pointer up to the last entry and mark it as "last". */
3944         (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
3945
3946         if (use_sg + chained > h->maxSG)
3947                 h->maxSG = use_sg + chained;
3948
3949         if (chained) {
3950                 cp->Header.SGList = h->max_cmd_sg_entries;
3951                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3952                 if (hpsa_map_sg_chain_block(h, cp)) {
3953                         scsi_dma_unmap(cmd);
3954                         return -1;
3955                 }
3956                 return 0;
3957         }
3958
3959 sglist_finished:
3960
3961         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3962         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3963         return 0;
3964 }
3965
3966 #define IO_ACCEL_INELIGIBLE (1)
3967 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3968 {
3969         int is_write = 0;
3970         u32 block;
3971         u32 block_cnt;
3972
3973         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3974         switch (cdb[0]) {
3975         case WRITE_6:
3976         case WRITE_12:
3977                 is_write = 1;
3978         case READ_6:
3979         case READ_12:
3980                 if (*cdb_len == 6) {
3981                         block = (((u32) cdb[2]) << 8) | cdb[3];
3982                         block_cnt = cdb[4];
3983                 } else {
3984                         BUG_ON(*cdb_len != 12);
3985                         block = (((u32) cdb[2]) << 24) |
3986                                 (((u32) cdb[3]) << 16) |
3987                                 (((u32) cdb[4]) << 8) |
3988                                 cdb[5];
3989                         block_cnt =
3990                                 (((u32) cdb[6]) << 24) |
3991                                 (((u32) cdb[7]) << 16) |
3992                                 (((u32) cdb[8]) << 8) |
3993                                 cdb[9];
3994                 }
3995                 if (block_cnt > 0xffff)
3996                         return IO_ACCEL_INELIGIBLE;
3997
3998                 cdb[0] = is_write ? WRITE_10 : READ_10;
3999                 cdb[1] = 0;
4000                 cdb[2] = (u8) (block >> 24);
4001                 cdb[3] = (u8) (block >> 16);
4002                 cdb[4] = (u8) (block >> 8);
4003                 cdb[5] = (u8) (block);
4004                 cdb[6] = 0;
4005                 cdb[7] = (u8) (block_cnt >> 8);
4006                 cdb[8] = (u8) (block_cnt);
4007                 cdb[9] = 0;
4008                 *cdb_len = 10;
4009                 break;
4010         }
4011         return 0;
4012 }
4013
4014 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4015         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4016         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4017 {
4018         struct scsi_cmnd *cmd = c->scsi_cmd;
4019         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4020         unsigned int len;
4021         unsigned int total_len = 0;
4022         struct scatterlist *sg;
4023         u64 addr64;
4024         int use_sg, i;
4025         struct SGDescriptor *curr_sg;
4026         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4027
4028         /* TODO: implement chaining support */
4029         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4030                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4031                 return IO_ACCEL_INELIGIBLE;
4032         }
4033
4034         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4035
4036         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4037                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4038                 return IO_ACCEL_INELIGIBLE;
4039         }
4040
4041         c->cmd_type = CMD_IOACCEL1;
4042
4043         /* Adjust the DMA address to point to the accelerated command buffer */
4044         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4045                                 (c->cmdindex * sizeof(*cp));
4046         BUG_ON(c->busaddr & 0x0000007F);
4047
4048         use_sg = scsi_dma_map(cmd);
4049         if (use_sg < 0) {
4050                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4051                 return use_sg;
4052         }
4053
4054         if (use_sg) {
4055                 curr_sg = cp->SG;
4056                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4057                         addr64 = (u64) sg_dma_address(sg);
4058                         len  = sg_dma_len(sg);
4059                         total_len += len;
4060                         curr_sg->Addr = cpu_to_le64(addr64);
4061                         curr_sg->Len = cpu_to_le32(len);
4062                         curr_sg->Ext = cpu_to_le32(0);
4063                         curr_sg++;
4064                 }
4065                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4066
4067                 switch (cmd->sc_data_direction) {
4068                 case DMA_TO_DEVICE:
4069                         control |= IOACCEL1_CONTROL_DATA_OUT;
4070                         break;
4071                 case DMA_FROM_DEVICE:
4072                         control |= IOACCEL1_CONTROL_DATA_IN;
4073                         break;
4074                 case DMA_NONE:
4075                         control |= IOACCEL1_CONTROL_NODATAXFER;
4076                         break;
4077                 default:
4078                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4079                         cmd->sc_data_direction);
4080                         BUG();
4081                         break;
4082                 }
4083         } else {
4084                 control |= IOACCEL1_CONTROL_NODATAXFER;
4085         }
4086
4087         c->Header.SGList = use_sg;
4088         /* Fill out the command structure to submit */
4089         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4090         cp->transfer_len = cpu_to_le32(total_len);
4091         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4092                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4093         cp->control = cpu_to_le32(control);
4094         memcpy(cp->CDB, cdb, cdb_len);
4095         memcpy(cp->CISS_LUN, scsi3addr, 8);
4096         /* Tag was already set at init time. */
4097         enqueue_cmd_and_start_io(h, c);
4098         return 0;
4099 }
4100
4101 /*
4102  * Queue a command directly to a device behind the controller using the
4103  * I/O accelerator path.
4104  */
4105 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4106         struct CommandList *c)
4107 {
4108         struct scsi_cmnd *cmd = c->scsi_cmd;
4109         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4110
4111         c->phys_disk = dev;
4112
4113         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4114                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4115 }
4116
4117 /*
4118  * Set encryption parameters for the ioaccel2 request
4119  */
4120 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4121         struct CommandList *c, struct io_accel2_cmd *cp)
4122 {
4123         struct scsi_cmnd *cmd = c->scsi_cmd;
4124         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4125         struct raid_map_data *map = &dev->raid_map;
4126         u64 first_block;
4127
4128         /* Are we doing encryption on this device */
4129         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4130                 return;
4131         /* Set the data encryption key index. */
4132         cp->dekindex = map->dekindex;
4133
4134         /* Set the encryption enable flag, encoded into direction field. */
4135         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4136
4137         /* Set encryption tweak values based on logical block address
4138          * If block size is 512, tweak value is LBA.
4139          * For other block sizes, tweak is (LBA * block size)/ 512)
4140          */
4141         switch (cmd->cmnd[0]) {
4142         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4143         case WRITE_6:
4144         case READ_6:
4145                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4146                 break;
4147         case WRITE_10:
4148         case READ_10:
4149         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4150         case WRITE_12:
4151         case READ_12:
4152                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4153                 break;
4154         case WRITE_16:
4155         case READ_16:
4156                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4157                 break;
4158         default:
4159                 dev_err(&h->pdev->dev,
4160                         "ERROR: %s: size (0x%x) not supported for encryption\n",
4161                         __func__, cmd->cmnd[0]);
4162                 BUG();
4163                 break;
4164         }
4165
4166         if (le32_to_cpu(map->volume_blk_size) != 512)
4167                 first_block = first_block *
4168                                 le32_to_cpu(map->volume_blk_size)/512;
4169
4170         cp->tweak_lower = cpu_to_le32(first_block);
4171         cp->tweak_upper = cpu_to_le32(first_block >> 32);
4172 }
4173
4174 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4175         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4176         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4177 {
4178         struct scsi_cmnd *cmd = c->scsi_cmd;
4179         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4180         struct ioaccel2_sg_element *curr_sg;
4181         int use_sg, i;
4182         struct scatterlist *sg;
4183         u64 addr64;
4184         u32 len;
4185         u32 total_len = 0;
4186
4187         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4188
4189         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4190                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4191                 return IO_ACCEL_INELIGIBLE;
4192         }
4193
4194         c->cmd_type = CMD_IOACCEL2;
4195         /* Adjust the DMA address to point to the accelerated command buffer */
4196         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4197                                 (c->cmdindex * sizeof(*cp));
4198         BUG_ON(c->busaddr & 0x0000007F);
4199
4200         memset(cp, 0, sizeof(*cp));
4201         cp->IU_type = IOACCEL2_IU_TYPE;
4202
4203         use_sg = scsi_dma_map(cmd);
4204         if (use_sg < 0) {
4205                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4206                 return use_sg;
4207         }
4208
4209         if (use_sg) {
4210                 curr_sg = cp->sg;
4211                 if (use_sg > h->ioaccel_maxsg) {
4212                         addr64 = le64_to_cpu(
4213                                 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4214                         curr_sg->address = cpu_to_le64(addr64);
4215                         curr_sg->length = 0;
4216                         curr_sg->reserved[0] = 0;
4217                         curr_sg->reserved[1] = 0;
4218                         curr_sg->reserved[2] = 0;
4219                         curr_sg->chain_indicator = 0x80;
4220
4221                         curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4222                 }
4223                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4224                         addr64 = (u64) sg_dma_address(sg);
4225                         len  = sg_dma_len(sg);
4226                         total_len += len;
4227                         curr_sg->address = cpu_to_le64(addr64);
4228                         curr_sg->length = cpu_to_le32(len);
4229                         curr_sg->reserved[0] = 0;
4230                         curr_sg->reserved[1] = 0;
4231                         curr_sg->reserved[2] = 0;
4232                         curr_sg->chain_indicator = 0;
4233                         curr_sg++;
4234                 }
4235
4236                 switch (cmd->sc_data_direction) {
4237                 case DMA_TO_DEVICE:
4238                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4239                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
4240                         break;
4241                 case DMA_FROM_DEVICE:
4242                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4243                         cp->direction |= IOACCEL2_DIR_DATA_IN;
4244                         break;
4245                 case DMA_NONE:
4246                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4247                         cp->direction |= IOACCEL2_DIR_NO_DATA;
4248                         break;
4249                 default:
4250                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4251                                 cmd->sc_data_direction);
4252                         BUG();
4253                         break;
4254                 }
4255         } else {
4256                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4257                 cp->direction |= IOACCEL2_DIR_NO_DATA;
4258         }
4259
4260         /* Set encryption parameters, if necessary */
4261         set_encrypt_ioaccel2(h, c, cp);
4262
4263         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4264         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4265         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4266
4267         cp->data_len = cpu_to_le32(total_len);
4268         cp->err_ptr = cpu_to_le64(c->busaddr +
4269                         offsetof(struct io_accel2_cmd, error_data));
4270         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4271
4272         /* fill in sg elements */
4273         if (use_sg > h->ioaccel_maxsg) {
4274                 cp->sg_count = 1;
4275                 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4276                         atomic_dec(&phys_disk->ioaccel_cmds_out);
4277                         scsi_dma_unmap(cmd);
4278                         return -1;
4279                 }
4280         } else
4281                 cp->sg_count = (u8) use_sg;
4282
4283         enqueue_cmd_and_start_io(h, c);
4284         return 0;
4285 }
4286
4287 /*
4288  * Queue a command to the correct I/O accelerator path.
4289  */
4290 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4291         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4292         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4293 {
4294         /* Try to honor the device's queue depth */
4295         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4296                                         phys_disk->queue_depth) {
4297                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4298                 return IO_ACCEL_INELIGIBLE;
4299         }
4300         if (h->transMethod & CFGTBL_Trans_io_accel1)
4301                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4302                                                 cdb, cdb_len, scsi3addr,
4303                                                 phys_disk);
4304         else
4305                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4306                                                 cdb, cdb_len, scsi3addr,
4307                                                 phys_disk);
4308 }
4309
4310 static void raid_map_helper(struct raid_map_data *map,
4311                 int offload_to_mirror, u32 *map_index, u32 *current_group)
4312 {
4313         if (offload_to_mirror == 0)  {
4314                 /* use physical disk in the first mirrored group. */
4315                 *map_index %= le16_to_cpu(map->data_disks_per_row);
4316                 return;
4317         }
4318         do {
4319                 /* determine mirror group that *map_index indicates */
4320                 *current_group = *map_index /
4321                         le16_to_cpu(map->data_disks_per_row);
4322                 if (offload_to_mirror == *current_group)
4323                         continue;
4324                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4325                         /* select map index from next group */
4326                         *map_index += le16_to_cpu(map->data_disks_per_row);
4327                         (*current_group)++;
4328                 } else {
4329                         /* select map index from first group */
4330                         *map_index %= le16_to_cpu(map->data_disks_per_row);
4331                         *current_group = 0;
4332                 }
4333         } while (offload_to_mirror != *current_group);
4334 }
4335
4336 /*
4337  * Attempt to perform offload RAID mapping for a logical volume I/O.
4338  */
4339 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4340         struct CommandList *c)
4341 {
4342         struct scsi_cmnd *cmd = c->scsi_cmd;
4343         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4344         struct raid_map_data *map = &dev->raid_map;
4345         struct raid_map_disk_data *dd = &map->data[0];
4346         int is_write = 0;
4347         u32 map_index;
4348         u64 first_block, last_block;
4349         u32 block_cnt;
4350         u32 blocks_per_row;
4351         u64 first_row, last_row;
4352         u32 first_row_offset, last_row_offset;
4353         u32 first_column, last_column;
4354         u64 r0_first_row, r0_last_row;
4355         u32 r5or6_blocks_per_row;
4356         u64 r5or6_first_row, r5or6_last_row;
4357         u32 r5or6_first_row_offset, r5or6_last_row_offset;
4358         u32 r5or6_first_column, r5or6_last_column;
4359         u32 total_disks_per_row;
4360         u32 stripesize;
4361         u32 first_group, last_group, current_group;
4362         u32 map_row;
4363         u32 disk_handle;
4364         u64 disk_block;
4365         u32 disk_block_cnt;
4366         u8 cdb[16];
4367         u8 cdb_len;
4368         u16 strip_size;
4369 #if BITS_PER_LONG == 32
4370         u64 tmpdiv;
4371 #endif
4372         int offload_to_mirror;
4373
4374         /* check for valid opcode, get LBA and block count */
4375         switch (cmd->cmnd[0]) {
4376         case WRITE_6:
4377                 is_write = 1;
4378         case READ_6:
4379                 first_block =
4380                         (((u64) cmd->cmnd[2]) << 8) |
4381                         cmd->cmnd[3];
4382                 block_cnt = cmd->cmnd[4];
4383                 if (block_cnt == 0)
4384                         block_cnt = 256;
4385                 break;
4386         case WRITE_10:
4387                 is_write = 1;
4388         case READ_10:
4389                 first_block =
4390                         (((u64) cmd->cmnd[2]) << 24) |
4391                         (((u64) cmd->cmnd[3]) << 16) |
4392                         (((u64) cmd->cmnd[4]) << 8) |
4393                         cmd->cmnd[5];
4394                 block_cnt =
4395                         (((u32) cmd->cmnd[7]) << 8) |
4396                         cmd->cmnd[8];
4397                 break;
4398         case WRITE_12:
4399                 is_write = 1;
4400         case READ_12:
4401                 first_block =
4402                         (((u64) cmd->cmnd[2]) << 24) |
4403                         (((u64) cmd->cmnd[3]) << 16) |
4404                         (((u64) cmd->cmnd[4]) << 8) |
4405                         cmd->cmnd[5];
4406                 block_cnt =
4407                         (((u32) cmd->cmnd[6]) << 24) |
4408                         (((u32) cmd->cmnd[7]) << 16) |
4409                         (((u32) cmd->cmnd[8]) << 8) |
4410                 cmd->cmnd[9];
4411                 break;
4412         case WRITE_16:
4413                 is_write = 1;
4414         case READ_16:
4415                 first_block =
4416                         (((u64) cmd->cmnd[2]) << 56) |
4417                         (((u64) cmd->cmnd[3]) << 48) |
4418                         (((u64) cmd->cmnd[4]) << 40) |
4419                         (((u64) cmd->cmnd[5]) << 32) |
4420                         (((u64) cmd->cmnd[6]) << 24) |
4421                         (((u64) cmd->cmnd[7]) << 16) |
4422                         (((u64) cmd->cmnd[8]) << 8) |
4423                         cmd->cmnd[9];
4424                 block_cnt =
4425                         (((u32) cmd->cmnd[10]) << 24) |
4426                         (((u32) cmd->cmnd[11]) << 16) |
4427                         (((u32) cmd->cmnd[12]) << 8) |
4428                         cmd->cmnd[13];
4429                 break;
4430         default:
4431                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4432         }
4433         last_block = first_block + block_cnt - 1;
4434
4435         /* check for write to non-RAID-0 */
4436         if (is_write && dev->raid_level != 0)
4437                 return IO_ACCEL_INELIGIBLE;
4438
4439         /* check for invalid block or wraparound */
4440         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4441                 last_block < first_block)
4442                 return IO_ACCEL_INELIGIBLE;
4443
4444         /* calculate stripe information for the request */
4445         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4446                                 le16_to_cpu(map->strip_size);
4447         strip_size = le16_to_cpu(map->strip_size);
4448 #if BITS_PER_LONG == 32
4449         tmpdiv = first_block;
4450         (void) do_div(tmpdiv, blocks_per_row);
4451         first_row = tmpdiv;
4452         tmpdiv = last_block;
4453         (void) do_div(tmpdiv, blocks_per_row);
4454         last_row = tmpdiv;
4455         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4456         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4457         tmpdiv = first_row_offset;
4458         (void) do_div(tmpdiv, strip_size);
4459         first_column = tmpdiv;
4460         tmpdiv = last_row_offset;
4461         (void) do_div(tmpdiv, strip_size);
4462         last_column = tmpdiv;
4463 #else
4464         first_row = first_block / blocks_per_row;
4465         last_row = last_block / blocks_per_row;
4466         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4467         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4468         first_column = first_row_offset / strip_size;
4469         last_column = last_row_offset / strip_size;
4470 #endif
4471
4472         /* if this isn't a single row/column then give to the controller */
4473         if ((first_row != last_row) || (first_column != last_column))
4474                 return IO_ACCEL_INELIGIBLE;
4475
4476         /* proceeding with driver mapping */
4477         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4478                                 le16_to_cpu(map->metadata_disks_per_row);
4479         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4480                                 le16_to_cpu(map->row_cnt);
4481         map_index = (map_row * total_disks_per_row) + first_column;
4482
4483         switch (dev->raid_level) {
4484         case HPSA_RAID_0:
4485                 break; /* nothing special to do */
4486         case HPSA_RAID_1:
4487                 /* Handles load balance across RAID 1 members.
4488                  * (2-drive R1 and R10 with even # of drives.)
4489                  * Appropriate for SSDs, not optimal for HDDs
4490                  */
4491                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4492                 if (dev->offload_to_mirror)
4493                         map_index += le16_to_cpu(map->data_disks_per_row);
4494                 dev->offload_to_mirror = !dev->offload_to_mirror;
4495                 break;
4496         case HPSA_RAID_ADM:
4497                 /* Handles N-way mirrors  (R1-ADM)
4498                  * and R10 with # of drives divisible by 3.)
4499                  */
4500                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4501
4502                 offload_to_mirror = dev->offload_to_mirror;
4503                 raid_map_helper(map, offload_to_mirror,
4504                                 &map_index, &current_group);
4505                 /* set mirror group to use next time */
4506                 offload_to_mirror =
4507                         (offload_to_mirror >=
4508                         le16_to_cpu(map->layout_map_count) - 1)
4509                         ? 0 : offload_to_mirror + 1;
4510                 dev->offload_to_mirror = offload_to_mirror;
4511                 /* Avoid direct use of dev->offload_to_mirror within this
4512                  * function since multiple threads might simultaneously
4513                  * increment it beyond the range of dev->layout_map_count -1.
4514                  */
4515                 break;
4516         case HPSA_RAID_5:
4517         case HPSA_RAID_6:
4518                 if (le16_to_cpu(map->layout_map_count) <= 1)
4519                         break;
4520
4521                 /* Verify first and last block are in same RAID group */
4522                 r5or6_blocks_per_row =
4523                         le16_to_cpu(map->strip_size) *
4524                         le16_to_cpu(map->data_disks_per_row);
4525                 BUG_ON(r5or6_blocks_per_row == 0);
4526                 stripesize = r5or6_blocks_per_row *
4527                         le16_to_cpu(map->layout_map_count);
4528 #if BITS_PER_LONG == 32
4529                 tmpdiv = first_block;
4530                 first_group = do_div(tmpdiv, stripesize);
4531                 tmpdiv = first_group;
4532                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4533                 first_group = tmpdiv;
4534                 tmpdiv = last_block;
4535                 last_group = do_div(tmpdiv, stripesize);
4536                 tmpdiv = last_group;
4537                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4538                 last_group = tmpdiv;
4539 #else
4540                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4541                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4542 #endif
4543                 if (first_group != last_group)
4544                         return IO_ACCEL_INELIGIBLE;
4545
4546                 /* Verify request is in a single row of RAID 5/6 */
4547 #if BITS_PER_LONG == 32
4548                 tmpdiv = first_block;
4549                 (void) do_div(tmpdiv, stripesize);
4550                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4551                 tmpdiv = last_block;
4552                 (void) do_div(tmpdiv, stripesize);
4553                 r5or6_last_row = r0_last_row = tmpdiv;
4554 #else
4555                 first_row = r5or6_first_row = r0_first_row =
4556                                                 first_block / stripesize;
4557                 r5or6_last_row = r0_last_row = last_block / stripesize;
4558 #endif
4559                 if (r5or6_first_row != r5or6_last_row)
4560                         return IO_ACCEL_INELIGIBLE;
4561
4562
4563                 /* Verify request is in a single column */
4564 #if BITS_PER_LONG == 32
4565                 tmpdiv = first_block;
4566                 first_row_offset = do_div(tmpdiv, stripesize);
4567                 tmpdiv = first_row_offset;
4568                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4569                 r5or6_first_row_offset = first_row_offset;
4570                 tmpdiv = last_block;
4571                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4572                 tmpdiv = r5or6_last_row_offset;
4573                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4574                 tmpdiv = r5or6_first_row_offset;
4575                 (void) do_div(tmpdiv, map->strip_size);
4576                 first_column = r5or6_first_column = tmpdiv;
4577                 tmpdiv = r5or6_last_row_offset;
4578                 (void) do_div(tmpdiv, map->strip_size);
4579                 r5or6_last_column = tmpdiv;
4580 #else
4581                 first_row_offset = r5or6_first_row_offset =
4582                         (u32)((first_block % stripesize) %
4583                                                 r5or6_blocks_per_row);
4584
4585                 r5or6_last_row_offset =
4586                         (u32)((last_block % stripesize) %
4587                                                 r5or6_blocks_per_row);
4588
4589                 first_column = r5or6_first_column =
4590                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4591                 r5or6_last_column =
4592                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4593 #endif
4594                 if (r5or6_first_column != r5or6_last_column)
4595                         return IO_ACCEL_INELIGIBLE;
4596
4597                 /* Request is eligible */
4598                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4599                         le16_to_cpu(map->row_cnt);
4600
4601                 map_index = (first_group *
4602                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4603                         (map_row * total_disks_per_row) + first_column;
4604                 break;
4605         default:
4606                 return IO_ACCEL_INELIGIBLE;
4607         }
4608
4609         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4610                 return IO_ACCEL_INELIGIBLE;
4611
4612         c->phys_disk = dev->phys_disk[map_index];
4613
4614         disk_handle = dd[map_index].ioaccel_handle;
4615         disk_block = le64_to_cpu(map->disk_starting_blk) +
4616                         first_row * le16_to_cpu(map->strip_size) +
4617                         (first_row_offset - first_column *
4618                         le16_to_cpu(map->strip_size));
4619         disk_block_cnt = block_cnt;
4620
4621         /* handle differing logical/physical block sizes */
4622         if (map->phys_blk_shift) {
4623                 disk_block <<= map->phys_blk_shift;
4624                 disk_block_cnt <<= map->phys_blk_shift;
4625         }
4626         BUG_ON(disk_block_cnt > 0xffff);
4627
4628         /* build the new CDB for the physical disk I/O */
4629         if (disk_block > 0xffffffff) {
4630                 cdb[0] = is_write ? WRITE_16 : READ_16;
4631                 cdb[1] = 0;
4632                 cdb[2] = (u8) (disk_block >> 56);
4633                 cdb[3] = (u8) (disk_block >> 48);
4634                 cdb[4] = (u8) (disk_block >> 40);
4635                 cdb[5] = (u8) (disk_block >> 32);
4636                 cdb[6] = (u8) (disk_block >> 24);
4637                 cdb[7] = (u8) (disk_block >> 16);
4638                 cdb[8] = (u8) (disk_block >> 8);
4639                 cdb[9] = (u8) (disk_block);
4640                 cdb[10] = (u8) (disk_block_cnt >> 24);
4641                 cdb[11] = (u8) (disk_block_cnt >> 16);
4642                 cdb[12] = (u8) (disk_block_cnt >> 8);
4643                 cdb[13] = (u8) (disk_block_cnt);
4644                 cdb[14] = 0;
4645                 cdb[15] = 0;
4646                 cdb_len = 16;
4647         } else {
4648                 cdb[0] = is_write ? WRITE_10 : READ_10;
4649                 cdb[1] = 0;
4650                 cdb[2] = (u8) (disk_block >> 24);
4651                 cdb[3] = (u8) (disk_block >> 16);
4652                 cdb[4] = (u8) (disk_block >> 8);
4653                 cdb[5] = (u8) (disk_block);
4654                 cdb[6] = 0;
4655                 cdb[7] = (u8) (disk_block_cnt >> 8);
4656                 cdb[8] = (u8) (disk_block_cnt);
4657                 cdb[9] = 0;
4658                 cdb_len = 10;
4659         }
4660         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4661                                                 dev->scsi3addr,
4662                                                 dev->phys_disk[map_index]);
4663 }
4664
4665 /*
4666  * Submit commands down the "normal" RAID stack path
4667  * All callers to hpsa_ciss_submit must check lockup_detected
4668  * beforehand, before (opt.) and after calling cmd_alloc
4669  */
4670 static int hpsa_ciss_submit(struct ctlr_info *h,
4671         struct CommandList *c, struct scsi_cmnd *cmd,
4672         unsigned char scsi3addr[])
4673 {
4674         cmd->host_scribble = (unsigned char *) c;
4675         c->cmd_type = CMD_SCSI;
4676         c->scsi_cmd = cmd;
4677         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4678         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4679         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4680
4681         /* Fill in the request block... */
4682
4683         c->Request.Timeout = 0;
4684         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4685         c->Request.CDBLen = cmd->cmd_len;
4686         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4687         switch (cmd->sc_data_direction) {
4688         case DMA_TO_DEVICE:
4689                 c->Request.type_attr_dir =
4690                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4691                 break;
4692         case DMA_FROM_DEVICE:
4693                 c->Request.type_attr_dir =
4694                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4695                 break;
4696         case DMA_NONE:
4697                 c->Request.type_attr_dir =
4698                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4699                 break;
4700         case DMA_BIDIRECTIONAL:
4701                 /* This can happen if a buggy application does a scsi passthru
4702                  * and sets both inlen and outlen to non-zero. ( see
4703                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4704                  */
4705
4706                 c->Request.type_attr_dir =
4707                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4708                 /* This is technically wrong, and hpsa controllers should
4709                  * reject it with CMD_INVALID, which is the most correct
4710                  * response, but non-fibre backends appear to let it
4711                  * slide by, and give the same results as if this field
4712                  * were set correctly.  Either way is acceptable for
4713                  * our purposes here.
4714                  */
4715
4716                 break;
4717
4718         default:
4719                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4720                         cmd->sc_data_direction);
4721                 BUG();
4722                 break;
4723         }
4724
4725         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4726                 hpsa_cmd_resolve_and_free(h, c);
4727                 return SCSI_MLQUEUE_HOST_BUSY;
4728         }
4729         enqueue_cmd_and_start_io(h, c);
4730         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4731         return 0;
4732 }
4733
4734 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4735                                 struct CommandList *c)
4736 {
4737         dma_addr_t cmd_dma_handle, err_dma_handle;
4738
4739         /* Zero out all of commandlist except the last field, refcount */
4740         memset(c, 0, offsetof(struct CommandList, refcount));
4741         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4742         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4743         c->err_info = h->errinfo_pool + index;
4744         memset(c->err_info, 0, sizeof(*c->err_info));
4745         err_dma_handle = h->errinfo_pool_dhandle
4746             + index * sizeof(*c->err_info);
4747         c->cmdindex = index;
4748         c->busaddr = (u32) cmd_dma_handle;
4749         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4750         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4751         c->h = h;
4752         c->scsi_cmd = SCSI_CMD_IDLE;
4753 }
4754
4755 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4756 {
4757         int i;
4758
4759         for (i = 0; i < h->nr_cmds; i++) {
4760                 struct CommandList *c = h->cmd_pool + i;
4761
4762                 hpsa_cmd_init(h, i, c);
4763                 atomic_set(&c->refcount, 0);
4764         }
4765 }
4766
4767 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4768                                 struct CommandList *c)
4769 {
4770         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4771
4772         BUG_ON(c->cmdindex != index);
4773
4774         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4775         memset(c->err_info, 0, sizeof(*c->err_info));
4776         c->busaddr = (u32) cmd_dma_handle;
4777 }
4778
4779 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4780                 struct CommandList *c, struct scsi_cmnd *cmd,
4781                 unsigned char *scsi3addr)
4782 {
4783         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4784         int rc = IO_ACCEL_INELIGIBLE;
4785
4786         cmd->host_scribble = (unsigned char *) c;
4787
4788         if (dev->offload_enabled) {
4789                 hpsa_cmd_init(h, c->cmdindex, c);
4790                 c->cmd_type = CMD_SCSI;
4791                 c->scsi_cmd = cmd;
4792                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4793                 if (rc < 0)     /* scsi_dma_map failed. */
4794                         rc = SCSI_MLQUEUE_HOST_BUSY;
4795         } else if (dev->hba_ioaccel_enabled) {
4796                 hpsa_cmd_init(h, c->cmdindex, c);
4797                 c->cmd_type = CMD_SCSI;
4798                 c->scsi_cmd = cmd;
4799                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4800                 if (rc < 0)     /* scsi_dma_map failed. */
4801                         rc = SCSI_MLQUEUE_HOST_BUSY;
4802         }
4803         return rc;
4804 }
4805
4806 static void hpsa_command_resubmit_worker(struct work_struct *work)
4807 {
4808         struct scsi_cmnd *cmd;
4809         struct hpsa_scsi_dev_t *dev;
4810         struct CommandList *c = container_of(work, struct CommandList, work);
4811
4812         cmd = c->scsi_cmd;
4813         dev = cmd->device->hostdata;
4814         if (!dev) {
4815                 cmd->result = DID_NO_CONNECT << 16;
4816                 return hpsa_cmd_free_and_done(c->h, c, cmd);
4817         }
4818         if (c->reset_pending)
4819                 return hpsa_cmd_resolve_and_free(c->h, c);
4820         if (c->abort_pending)
4821                 return hpsa_cmd_abort_and_free(c->h, c, cmd);
4822         if (c->cmd_type == CMD_IOACCEL2) {
4823                 struct ctlr_info *h = c->h;
4824                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4825                 int rc;
4826
4827                 if (c2->error_data.serv_response ==
4828                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4829                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4830                         if (rc == 0)
4831                                 return;
4832                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4833                                 /*
4834                                  * If we get here, it means dma mapping failed.
4835                                  * Try again via scsi mid layer, which will
4836                                  * then get SCSI_MLQUEUE_HOST_BUSY.
4837                                  */
4838                                 cmd->result = DID_IMM_RETRY << 16;
4839                                 return hpsa_cmd_free_and_done(h, c, cmd);
4840                         }
4841                         /* else, fall thru and resubmit down CISS path */
4842                 }
4843         }
4844         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4845         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4846                 /*
4847                  * If we get here, it means dma mapping failed. Try
4848                  * again via scsi mid layer, which will then get
4849                  * SCSI_MLQUEUE_HOST_BUSY.
4850                  *
4851                  * hpsa_ciss_submit will have already freed c
4852                  * if it encountered a dma mapping failure.
4853                  */
4854                 cmd->result = DID_IMM_RETRY << 16;
4855                 cmd->scsi_done(cmd);
4856         }
4857 }
4858
4859 /* Running in struct Scsi_Host->host_lock less mode */
4860 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4861 {
4862         struct ctlr_info *h;
4863         struct hpsa_scsi_dev_t *dev;
4864         unsigned char scsi3addr[8];
4865         struct CommandList *c;
4866         int rc = 0;
4867
4868         /* Get the ptr to our adapter structure out of cmd->host. */
4869         h = sdev_to_hba(cmd->device);
4870
4871         BUG_ON(cmd->request->tag < 0);
4872
4873         dev = cmd->device->hostdata;
4874         if (!dev) {
4875                 cmd->result = DID_NO_CONNECT << 16;
4876                 cmd->scsi_done(cmd);
4877                 return 0;
4878         }
4879
4880         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4881
4882         if (unlikely(lockup_detected(h))) {
4883                 cmd->result = DID_NO_CONNECT << 16;
4884                 cmd->scsi_done(cmd);
4885                 return 0;
4886         }
4887         c = cmd_tagged_alloc(h, cmd);
4888
4889         /*
4890          * Call alternate submit routine for I/O accelerated commands.
4891          * Retries always go down the normal I/O path.
4892          */
4893         if (likely(cmd->retries == 0 &&
4894                 cmd->request->cmd_type == REQ_TYPE_FS &&
4895                 h->acciopath_status)) {
4896                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
4897                 if (rc == 0)
4898                         return 0;
4899                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4900                         hpsa_cmd_resolve_and_free(h, c);
4901                         return SCSI_MLQUEUE_HOST_BUSY;
4902                 }
4903         }
4904         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4905 }
4906
4907 static void hpsa_scan_complete(struct ctlr_info *h)
4908 {
4909         unsigned long flags;
4910
4911         spin_lock_irqsave(&h->scan_lock, flags);
4912         h->scan_finished = 1;
4913         wake_up_all(&h->scan_wait_queue);
4914         spin_unlock_irqrestore(&h->scan_lock, flags);
4915 }
4916
4917 static void hpsa_scan_start(struct Scsi_Host *sh)
4918 {
4919         struct ctlr_info *h = shost_to_hba(sh);
4920         unsigned long flags;
4921
4922         /*
4923          * Don't let rescans be initiated on a controller known to be locked
4924          * up.  If the controller locks up *during* a rescan, that thread is
4925          * probably hosed, but at least we can prevent new rescan threads from
4926          * piling up on a locked up controller.
4927          */
4928         if (unlikely(lockup_detected(h)))
4929                 return hpsa_scan_complete(h);
4930
4931         /* wait until any scan already in progress is finished. */
4932         while (1) {
4933                 spin_lock_irqsave(&h->scan_lock, flags);
4934                 if (h->scan_finished)
4935                         break;
4936                 spin_unlock_irqrestore(&h->scan_lock, flags);
4937                 wait_event(h->scan_wait_queue, h->scan_finished);
4938                 /* Note: We don't need to worry about a race between this
4939                  * thread and driver unload because the midlayer will
4940                  * have incremented the reference count, so unload won't
4941                  * happen if we're in here.
4942                  */
4943         }
4944         h->scan_finished = 0; /* mark scan as in progress */
4945         spin_unlock_irqrestore(&h->scan_lock, flags);
4946
4947         if (unlikely(lockup_detected(h)))
4948                 return hpsa_scan_complete(h);
4949
4950         hpsa_update_scsi_devices(h);
4951
4952         hpsa_scan_complete(h);
4953 }
4954
4955 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4956 {
4957         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4958
4959         if (!logical_drive)
4960                 return -ENODEV;
4961
4962         if (qdepth < 1)
4963                 qdepth = 1;
4964         else if (qdepth > logical_drive->queue_depth)
4965                 qdepth = logical_drive->queue_depth;
4966
4967         return scsi_change_queue_depth(sdev, qdepth);
4968 }
4969
4970 static int hpsa_scan_finished(struct Scsi_Host *sh,
4971         unsigned long elapsed_time)
4972 {
4973         struct ctlr_info *h = shost_to_hba(sh);
4974         unsigned long flags;
4975         int finished;
4976
4977         spin_lock_irqsave(&h->scan_lock, flags);
4978         finished = h->scan_finished;
4979         spin_unlock_irqrestore(&h->scan_lock, flags);
4980         return finished;
4981 }
4982
4983 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
4984 {
4985         struct Scsi_Host *sh;
4986         int error;
4987
4988         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4989         if (sh == NULL) {
4990                 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
4991                 return -ENOMEM;
4992         }
4993
4994         sh->io_port = 0;
4995         sh->n_io_port = 0;
4996         sh->this_id = -1;
4997         sh->max_channel = 3;
4998         sh->max_cmd_len = MAX_COMMAND_SIZE;
4999         sh->max_lun = HPSA_MAX_LUN;
5000         sh->max_id = HPSA_MAX_LUN;
5001         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5002         sh->cmd_per_lun = sh->can_queue;
5003         sh->sg_tablesize = h->maxsgentries;
5004         sh->hostdata[0] = (unsigned long) h;
5005         sh->irq = h->intr[h->intr_mode];
5006         sh->unique_id = sh->irq;
5007         error = scsi_init_shared_tag_map(sh, sh->can_queue);
5008         if (error) {
5009                 dev_err(&h->pdev->dev,
5010                         "%s: scsi_init_shared_tag_map failed for controller %d\n",
5011                         __func__, h->ctlr);
5012                         scsi_host_put(sh);
5013                         return error;
5014         }
5015         h->scsi_host = sh;
5016         return 0;
5017 }
5018
5019 static int hpsa_scsi_add_host(struct ctlr_info *h)
5020 {
5021         int rv;
5022
5023         rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5024         if (rv) {
5025                 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5026                 return rv;
5027         }
5028         scsi_scan_host(h->scsi_host);
5029         return 0;
5030 }
5031
5032 /*
5033  * The block layer has already gone to the trouble of picking out a unique,
5034  * small-integer tag for this request.  We use an offset from that value as
5035  * an index to select our command block.  (The offset allows us to reserve the
5036  * low-numbered entries for our own uses.)
5037  */
5038 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5039 {
5040         int idx = scmd->request->tag;
5041
5042         if (idx < 0)
5043                 return idx;
5044
5045         /* Offset to leave space for internal cmds. */
5046         return idx += HPSA_NRESERVED_CMDS;
5047 }
5048
5049 /*
5050  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5051  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5052  */
5053 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5054                                 struct CommandList *c, unsigned char lunaddr[],
5055                                 int reply_queue)
5056 {
5057         int rc;
5058
5059         /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5060         (void) fill_cmd(c, TEST_UNIT_READY, h,
5061                         NULL, 0, 0, lunaddr, TYPE_CMD);
5062         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5063         if (rc)
5064                 return rc;
5065         /* no unmap needed here because no data xfer. */
5066
5067         /* Check if the unit is already ready. */
5068         if (c->err_info->CommandStatus == CMD_SUCCESS)
5069                 return 0;
5070
5071         /*
5072          * The first command sent after reset will receive "unit attention" to
5073          * indicate that the LUN has been reset...this is actually what we're
5074          * looking for (but, success is good too).
5075          */
5076         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5077                 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5078                         (c->err_info->SenseInfo[2] == NO_SENSE ||
5079                          c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5080                 return 0;
5081
5082         return 1;
5083 }
5084
5085 /*
5086  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5087  * returns zero when the unit is ready, and non-zero when giving up.
5088  */
5089 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5090                                 struct CommandList *c,
5091                                 unsigned char lunaddr[], int reply_queue)
5092 {
5093         int rc;
5094         int count = 0;
5095         int waittime = 1; /* seconds */
5096
5097         /* Send test unit ready until device ready, or give up. */
5098         for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5099
5100                 /*
5101                  * Wait for a bit.  do this first, because if we send
5102                  * the TUR right away, the reset will just abort it.
5103                  */
5104                 msleep(1000 * waittime);
5105
5106                 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5107                 if (!rc)
5108                         break;
5109
5110                 /* Increase wait time with each try, up to a point. */
5111                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5112                         waittime *= 2;
5113
5114                 dev_warn(&h->pdev->dev,
5115                          "waiting %d secs for device to become ready.\n",
5116                          waittime);
5117         }
5118
5119         return rc;
5120 }
5121
5122 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5123                                            unsigned char lunaddr[],
5124                                            int reply_queue)
5125 {
5126         int first_queue;
5127         int last_queue;
5128         int rq;
5129         int rc = 0;
5130         struct CommandList *c;
5131
5132         c = cmd_alloc(h);
5133
5134         /*
5135          * If no specific reply queue was requested, then send the TUR
5136          * repeatedly, requesting a reply on each reply queue; otherwise execute
5137          * the loop exactly once using only the specified queue.
5138          */
5139         if (reply_queue == DEFAULT_REPLY_QUEUE) {
5140                 first_queue = 0;
5141                 last_queue = h->nreply_queues - 1;
5142         } else {
5143                 first_queue = reply_queue;
5144                 last_queue = reply_queue;
5145         }
5146
5147         for (rq = first_queue; rq <= last_queue; rq++) {
5148                 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5149                 if (rc)
5150                         break;
5151         }
5152
5153         if (rc)
5154                 dev_warn(&h->pdev->dev, "giving up on device.\n");
5155         else
5156                 dev_warn(&h->pdev->dev, "device is ready.\n");
5157
5158         cmd_free(h, c);
5159         return rc;
5160 }
5161
5162 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5163  * complaining.  Doing a host- or bus-reset can't do anything good here.
5164  */
5165 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5166 {
5167         int rc;
5168         struct ctlr_info *h;
5169         struct hpsa_scsi_dev_t *dev;
5170         char msg[48];
5171
5172         /* find the controller to which the command to be aborted was sent */
5173         h = sdev_to_hba(scsicmd->device);
5174         if (h == NULL) /* paranoia */
5175                 return FAILED;
5176
5177         if (lockup_detected(h))
5178                 return FAILED;
5179
5180         dev = scsicmd->device->hostdata;
5181         if (!dev) {
5182                 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5183                 return FAILED;
5184         }
5185
5186         /* if controller locked up, we can guarantee command won't complete */
5187         if (lockup_detected(h)) {
5188                 snprintf(msg, sizeof(msg),
5189                          "cmd %d RESET FAILED, lockup detected",
5190                          hpsa_get_cmd_index(scsicmd));
5191                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5192                 return FAILED;
5193         }
5194
5195         /* this reset request might be the result of a lockup; check */
5196         if (detect_controller_lockup(h)) {
5197                 snprintf(msg, sizeof(msg),
5198                          "cmd %d RESET FAILED, new lockup detected",
5199                          hpsa_get_cmd_index(scsicmd));
5200                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5201                 return FAILED;
5202         }
5203
5204         /* Do not attempt on controller */
5205         if (is_hba_lunid(dev->scsi3addr))
5206                 return SUCCESS;
5207
5208         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
5209
5210         /* send a reset to the SCSI LUN which the command was sent to */
5211         rc = hpsa_do_reset(h, dev, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
5212                            DEFAULT_REPLY_QUEUE);
5213         snprintf(msg, sizeof(msg), "reset %s",
5214                  rc == 0 ? "completed successfully" : "failed");
5215         hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5216         return rc == 0 ? SUCCESS : FAILED;
5217 }
5218
5219 static void swizzle_abort_tag(u8 *tag)
5220 {
5221         u8 original_tag[8];
5222
5223         memcpy(original_tag, tag, 8);
5224         tag[0] = original_tag[3];
5225         tag[1] = original_tag[2];
5226         tag[2] = original_tag[1];
5227         tag[3] = original_tag[0];
5228         tag[4] = original_tag[7];
5229         tag[5] = original_tag[6];
5230         tag[6] = original_tag[5];
5231         tag[7] = original_tag[4];
5232 }
5233
5234 static void hpsa_get_tag(struct ctlr_info *h,
5235         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5236 {
5237         u64 tag;
5238         if (c->cmd_type == CMD_IOACCEL1) {
5239                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5240                         &h->ioaccel_cmd_pool[c->cmdindex];
5241                 tag = le64_to_cpu(cm1->tag);
5242                 *tagupper = cpu_to_le32(tag >> 32);
5243                 *taglower = cpu_to_le32(tag);
5244                 return;
5245         }
5246         if (c->cmd_type == CMD_IOACCEL2) {
5247                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5248                         &h->ioaccel2_cmd_pool[c->cmdindex];
5249                 /* upper tag not used in ioaccel2 mode */
5250                 memset(tagupper, 0, sizeof(*tagupper));
5251                 *taglower = cm2->Tag;
5252                 return;
5253         }
5254         tag = le64_to_cpu(c->Header.tag);
5255         *tagupper = cpu_to_le32(tag >> 32);
5256         *taglower = cpu_to_le32(tag);
5257 }
5258
5259 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5260         struct CommandList *abort, int reply_queue)
5261 {
5262         int rc = IO_OK;
5263         struct CommandList *c;
5264         struct ErrorInfo *ei;
5265         __le32 tagupper, taglower;
5266
5267         c = cmd_alloc(h);
5268
5269         /* fill_cmd can't fail here, no buffer to map */
5270         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5271                 0, 0, scsi3addr, TYPE_MSG);
5272         if (h->needs_abort_tags_swizzled)
5273                 swizzle_abort_tag(&c->Request.CDB[4]);
5274         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5275         hpsa_get_tag(h, abort, &taglower, &tagupper);
5276         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5277                 __func__, tagupper, taglower);
5278         /* no unmap needed here because no data xfer. */
5279
5280         ei = c->err_info;
5281         switch (ei->CommandStatus) {
5282         case CMD_SUCCESS:
5283                 break;
5284         case CMD_TMF_STATUS:
5285                 rc = hpsa_evaluate_tmf_status(h, c);
5286                 break;
5287         case CMD_UNABORTABLE: /* Very common, don't make noise. */
5288                 rc = -1;
5289                 break;
5290         default:
5291                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5292                         __func__, tagupper, taglower);
5293                 hpsa_scsi_interpret_error(h, c);
5294                 rc = -1;
5295                 break;
5296         }
5297         cmd_free(h, c);
5298         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5299                 __func__, tagupper, taglower);
5300         return rc;
5301 }
5302
5303 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5304         struct CommandList *command_to_abort, int reply_queue)
5305 {
5306         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5307         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5308         struct io_accel2_cmd *c2a =
5309                 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5310         struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5311         struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5312
5313         /*
5314          * We're overlaying struct hpsa_tmf_struct on top of something which
5315          * was allocated as a struct io_accel2_cmd, so we better be sure it
5316          * actually fits, and doesn't overrun the error info space.
5317          */
5318         BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5319                         sizeof(struct io_accel2_cmd));
5320         BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5321                         offsetof(struct hpsa_tmf_struct, error_len) +
5322                                 sizeof(ac->error_len));
5323
5324         c->cmd_type = IOACCEL2_TMF;
5325         c->scsi_cmd = SCSI_CMD_BUSY;
5326
5327         /* Adjust the DMA address to point to the accelerated command buffer */
5328         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5329                                 (c->cmdindex * sizeof(struct io_accel2_cmd));
5330         BUG_ON(c->busaddr & 0x0000007F);
5331
5332         memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5333         ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5334         ac->reply_queue = reply_queue;
5335         ac->tmf = IOACCEL2_TMF_ABORT;
5336         ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5337         memset(ac->lun_id, 0, sizeof(ac->lun_id));
5338         ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5339         ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5340         ac->error_ptr = cpu_to_le64(c->busaddr +
5341                         offsetof(struct io_accel2_cmd, error_data));
5342         ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5343 }
5344
5345 /* ioaccel2 path firmware cannot handle abort task requests.
5346  * Change abort requests to physical target reset, and send to the
5347  * address of the physical disk used for the ioaccel 2 command.
5348  * Return 0 on success (IO_OK)
5349  *       -1 on failure
5350  */
5351
5352 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5353         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5354 {
5355         int rc = IO_OK;
5356         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5357         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5358         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5359         unsigned char *psa = &phys_scsi3addr[0];
5360
5361         /* Get a pointer to the hpsa logical device. */
5362         scmd = abort->scsi_cmd;
5363         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5364         if (dev == NULL) {
5365                 dev_warn(&h->pdev->dev,
5366                         "Cannot abort: no device pointer for command.\n");
5367                         return -1; /* not abortable */
5368         }
5369
5370         if (h->raid_offload_debug > 0)
5371                 dev_info(&h->pdev->dev,
5372                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5373                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
5374                         "Reset as abort",
5375                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
5376                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
5377
5378         if (!dev->offload_enabled) {
5379                 dev_warn(&h->pdev->dev,
5380                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
5381                 return -1; /* not abortable */
5382         }
5383
5384         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
5385         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
5386                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
5387                 return -1; /* not abortable */
5388         }
5389
5390         /* send the reset */
5391         if (h->raid_offload_debug > 0)
5392                 dev_info(&h->pdev->dev,
5393                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5394                         psa[0], psa[1], psa[2], psa[3],
5395                         psa[4], psa[5], psa[6], psa[7]);
5396         rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
5397         if (rc != 0) {
5398                 dev_warn(&h->pdev->dev,
5399                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5400                         psa[0], psa[1], psa[2], psa[3],
5401                         psa[4], psa[5], psa[6], psa[7]);
5402                 return rc; /* failed to reset */
5403         }
5404
5405         /* wait for device to recover */
5406         if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
5407                 dev_warn(&h->pdev->dev,
5408                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5409                         psa[0], psa[1], psa[2], psa[3],
5410                         psa[4], psa[5], psa[6], psa[7]);
5411                 return -1;  /* failed to recover */
5412         }
5413
5414         /* device recovered */
5415         dev_info(&h->pdev->dev,
5416                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5417                 psa[0], psa[1], psa[2], psa[3],
5418                 psa[4], psa[5], psa[6], psa[7]);
5419
5420         return rc; /* success */
5421 }
5422
5423 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
5424         struct CommandList *abort, int reply_queue)
5425 {
5426         int rc = IO_OK;
5427         struct CommandList *c;
5428         __le32 taglower, tagupper;
5429         struct hpsa_scsi_dev_t *dev;
5430         struct io_accel2_cmd *c2;
5431
5432         dev = abort->scsi_cmd->device->hostdata;
5433         if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
5434                 return -1;
5435
5436         c = cmd_alloc(h);
5437         setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
5438         c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5439         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5440         hpsa_get_tag(h, abort, &taglower, &tagupper);
5441         dev_dbg(&h->pdev->dev,
5442                 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
5443                 __func__, tagupper, taglower);
5444         /* no unmap needed here because no data xfer. */
5445
5446         dev_dbg(&h->pdev->dev,
5447                 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
5448                 __func__, tagupper, taglower, c2->error_data.serv_response);
5449         switch (c2->error_data.serv_response) {
5450         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
5451         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
5452                 rc = 0;
5453                 break;
5454         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
5455         case IOACCEL2_SERV_RESPONSE_FAILURE:
5456         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
5457                 rc = -1;
5458                 break;
5459         default:
5460                 dev_warn(&h->pdev->dev,
5461                         "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
5462                         __func__, tagupper, taglower,
5463                         c2->error_data.serv_response);
5464                 rc = -1;
5465         }
5466         cmd_free(h, c);
5467         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
5468                 tagupper, taglower);
5469         return rc;
5470 }
5471
5472 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
5473         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5474 {
5475         /*
5476          * ioccelerator mode 2 commands should be aborted via the
5477          * accelerated path, since RAID path is unaware of these commands,
5478          * but not all underlying firmware can handle abort TMF.
5479          * Change abort to physical device reset when abort TMF is unsupported.
5480          */
5481         if (abort->cmd_type == CMD_IOACCEL2) {
5482                 if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)
5483                         return hpsa_send_abort_ioaccel2(h, abort,
5484                                                 reply_queue);
5485                 else
5486                         return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
5487                                                         abort, reply_queue);
5488         }
5489         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
5490 }
5491
5492 /* Find out which reply queue a command was meant to return on */
5493 static int hpsa_extract_reply_queue(struct ctlr_info *h,
5494                                         struct CommandList *c)
5495 {
5496         if (c->cmd_type == CMD_IOACCEL2)
5497                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
5498         return c->Header.ReplyQueue;
5499 }
5500
5501 /*
5502  * Limit concurrency of abort commands to prevent
5503  * over-subscription of commands
5504  */
5505 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
5506 {
5507 #define ABORT_CMD_WAIT_MSECS 5000
5508         return !wait_event_timeout(h->abort_cmd_wait_queue,
5509                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
5510                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
5511 }
5512
5513 /* Send an abort for the specified command.
5514  *      If the device and controller support it,
5515  *              send a task abort request.
5516  */
5517 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
5518 {
5519
5520         int rc;
5521         struct ctlr_info *h;
5522         struct hpsa_scsi_dev_t *dev;
5523         struct CommandList *abort; /* pointer to command to be aborted */
5524         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
5525         char msg[256];          /* For debug messaging. */
5526         int ml = 0;
5527         __le32 tagupper, taglower;
5528         int refcount, reply_queue;
5529
5530         if (sc == NULL)
5531                 return FAILED;
5532
5533         if (sc->device == NULL)
5534                 return FAILED;
5535
5536         /* Find the controller of the command to be aborted */
5537         h = sdev_to_hba(sc->device);
5538         if (h == NULL)
5539                 return FAILED;
5540
5541         /* Find the device of the command to be aborted */
5542         dev = sc->device->hostdata;
5543         if (!dev) {
5544                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
5545                                 msg);
5546                 return FAILED;
5547         }
5548
5549         /* If controller locked up, we can guarantee command won't complete */
5550         if (lockup_detected(h)) {
5551                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5552                                         "ABORT FAILED, lockup detected");
5553                 return FAILED;
5554         }
5555
5556         /* This is a good time to check if controller lockup has occurred */
5557         if (detect_controller_lockup(h)) {
5558                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5559                                         "ABORT FAILED, new lockup detected");
5560                 return FAILED;
5561         }
5562
5563         /* Check that controller supports some kind of task abort */
5564         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5565                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5566                 return FAILED;
5567
5568         memset(msg, 0, sizeof(msg));
5569         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
5570                 h->scsi_host->host_no, sc->device->channel,
5571                 sc->device->id, sc->device->lun,
5572                 "Aborting command", sc);
5573
5574         /* Get SCSI command to be aborted */
5575         abort = (struct CommandList *) sc->host_scribble;
5576         if (abort == NULL) {
5577                 /* This can happen if the command already completed. */
5578                 return SUCCESS;
5579         }
5580         refcount = atomic_inc_return(&abort->refcount);
5581         if (refcount == 1) { /* Command is done already. */
5582                 cmd_free(h, abort);
5583                 return SUCCESS;
5584         }
5585
5586         /* Don't bother trying the abort if we know it won't work. */
5587         if (abort->cmd_type != CMD_IOACCEL2 &&
5588                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5589                 cmd_free(h, abort);
5590                 return FAILED;
5591         }
5592
5593         /*
5594          * Check that we're aborting the right command.
5595          * It's possible the CommandList already completed and got re-used.
5596          */
5597         if (abort->scsi_cmd != sc) {
5598                 cmd_free(h, abort);
5599                 return SUCCESS;
5600         }
5601
5602         abort->abort_pending = true;
5603         hpsa_get_tag(h, abort, &taglower, &tagupper);
5604         reply_queue = hpsa_extract_reply_queue(h, abort);
5605         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5606         as  = abort->scsi_cmd;
5607         if (as != NULL)
5608                 ml += sprintf(msg+ml,
5609                         "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
5610                         as->cmd_len, as->cmnd[0], as->cmnd[1],
5611                         as->serial_number);
5612         dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
5613         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5614
5615         /*
5616          * Command is in flight, or possibly already completed
5617          * by the firmware (but not to the scsi mid layer) but we can't
5618          * distinguish which.  Send the abort down.
5619          */
5620         if (wait_for_available_abort_cmd(h)) {
5621                 dev_warn(&h->pdev->dev,
5622                         "%s FAILED, timeout waiting for an abort command to become available.\n",
5623                         msg);
5624                 cmd_free(h, abort);
5625                 return FAILED;
5626         }
5627         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5628         atomic_inc(&h->abort_cmds_available);
5629         wake_up_all(&h->abort_cmd_wait_queue);
5630         if (rc != 0) {
5631                 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
5632                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5633                                 "FAILED to abort command");
5634                 cmd_free(h, abort);
5635                 return FAILED;
5636         }
5637         dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
5638         wait_event(h->event_sync_wait_queue,
5639                    abort->scsi_cmd != sc || lockup_detected(h));
5640         cmd_free(h, abort);
5641         return !lockup_detected(h) ? SUCCESS : FAILED;
5642 }
5643
5644 /*
5645  * For operations with an associated SCSI command, a command block is allocated
5646  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
5647  * block request tag as an index into a table of entries.  cmd_tagged_free() is
5648  * the complement, although cmd_free() may be called instead.
5649  */
5650 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
5651                                             struct scsi_cmnd *scmd)
5652 {
5653         int idx = hpsa_get_cmd_index(scmd);
5654         struct CommandList *c = h->cmd_pool + idx;
5655
5656         if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
5657                 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
5658                         idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
5659                 /* The index value comes from the block layer, so if it's out of
5660                  * bounds, it's probably not our bug.
5661                  */
5662                 BUG();
5663         }
5664
5665         atomic_inc(&c->refcount);
5666         if (unlikely(!hpsa_is_cmd_idle(c))) {
5667                 /*
5668                  * We expect that the SCSI layer will hand us a unique tag
5669                  * value.  Thus, there should never be a collision here between
5670                  * two requests...because if the selected command isn't idle
5671                  * then someone is going to be very disappointed.
5672                  */
5673                 dev_err(&h->pdev->dev,
5674                         "tag collision (tag=%d) in cmd_tagged_alloc().\n",
5675                         idx);
5676                 if (c->scsi_cmd != NULL)
5677                         scsi_print_command(c->scsi_cmd);
5678                 scsi_print_command(scmd);
5679         }
5680
5681         hpsa_cmd_partial_init(h, idx, c);
5682         return c;
5683 }
5684
5685 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
5686 {
5687         /*
5688          * Release our reference to the block.  We don't need to do anything
5689          * else to free it, because it is accessed by index.  (There's no point
5690          * in checking the result of the decrement, since we cannot guarantee
5691          * that there isn't a concurrent abort which is also accessing it.)
5692          */
5693         (void)atomic_dec(&c->refcount);
5694 }
5695
5696 /*
5697  * For operations that cannot sleep, a command block is allocated at init,
5698  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5699  * which ones are free or in use.  Lock must be held when calling this.
5700  * cmd_free() is the complement.
5701  * This function never gives up and returns NULL.  If it hangs,
5702  * another thread must call cmd_free() to free some tags.
5703  */
5704
5705 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5706 {
5707         struct CommandList *c;
5708         int refcount, i;
5709         int offset = 0;
5710
5711         /*
5712          * There is some *extremely* small but non-zero chance that that
5713          * multiple threads could get in here, and one thread could
5714          * be scanning through the list of bits looking for a free
5715          * one, but the free ones are always behind him, and other
5716          * threads sneak in behind him and eat them before he can
5717          * get to them, so that while there is always a free one, a
5718          * very unlucky thread might be starved anyway, never able to
5719          * beat the other threads.  In reality, this happens so
5720          * infrequently as to be indistinguishable from never.
5721          *
5722          * Note that we start allocating commands before the SCSI host structure
5723          * is initialized.  Since the search starts at bit zero, this
5724          * all works, since we have at least one command structure available;
5725          * however, it means that the structures with the low indexes have to be
5726          * reserved for driver-initiated requests, while requests from the block
5727          * layer will use the higher indexes.
5728          */
5729
5730         for (;;) {
5731                 i = find_next_zero_bit(h->cmd_pool_bits,
5732                                         HPSA_NRESERVED_CMDS,
5733                                         offset);
5734                 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
5735                         offset = 0;
5736                         continue;
5737                 }
5738                 c = h->cmd_pool + i;
5739                 refcount = atomic_inc_return(&c->refcount);
5740                 if (unlikely(refcount > 1)) {
5741                         cmd_free(h, c); /* already in use */
5742                         offset = (i + 1) % HPSA_NRESERVED_CMDS;
5743                         continue;
5744                 }
5745                 set_bit(i & (BITS_PER_LONG - 1),
5746                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5747                 break; /* it's ours now. */
5748         }
5749         hpsa_cmd_partial_init(h, i, c);
5750         return c;
5751 }
5752
5753 /*
5754  * This is the complementary operation to cmd_alloc().  Note, however, in some
5755  * corner cases it may also be used to free blocks allocated by
5756  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
5757  * the clear-bit is harmless.
5758  */
5759 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5760 {
5761         if (atomic_dec_and_test(&c->refcount)) {
5762                 int i;
5763
5764                 i = c - h->cmd_pool;
5765                 clear_bit(i & (BITS_PER_LONG - 1),
5766                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5767         }
5768 }
5769
5770 #ifdef CONFIG_COMPAT
5771
5772 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5773         void __user *arg)
5774 {
5775         IOCTL32_Command_struct __user *arg32 =
5776             (IOCTL32_Command_struct __user *) arg;
5777         IOCTL_Command_struct arg64;
5778         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5779         int err;
5780         u32 cp;
5781
5782         memset(&arg64, 0, sizeof(arg64));
5783         err = 0;
5784         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5785                            sizeof(arg64.LUN_info));
5786         err |= copy_from_user(&arg64.Request, &arg32->Request,
5787                            sizeof(arg64.Request));
5788         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5789                            sizeof(arg64.error_info));
5790         err |= get_user(arg64.buf_size, &arg32->buf_size);
5791         err |= get_user(cp, &arg32->buf);
5792         arg64.buf = compat_ptr(cp);
5793         err |= copy_to_user(p, &arg64, sizeof(arg64));
5794
5795         if (err)
5796                 return -EFAULT;
5797
5798         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5799         if (err)
5800                 return err;
5801         err |= copy_in_user(&arg32->error_info, &p->error_info,
5802                          sizeof(arg32->error_info));
5803         if (err)
5804                 return -EFAULT;
5805         return err;
5806 }
5807
5808 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5809         int cmd, void __user *arg)
5810 {
5811         BIG_IOCTL32_Command_struct __user *arg32 =
5812             (BIG_IOCTL32_Command_struct __user *) arg;
5813         BIG_IOCTL_Command_struct arg64;
5814         BIG_IOCTL_Command_struct __user *p =
5815             compat_alloc_user_space(sizeof(arg64));
5816         int err;
5817         u32 cp;
5818
5819         memset(&arg64, 0, sizeof(arg64));
5820         err = 0;
5821         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5822                            sizeof(arg64.LUN_info));
5823         err |= copy_from_user(&arg64.Request, &arg32->Request,
5824                            sizeof(arg64.Request));
5825         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5826                            sizeof(arg64.error_info));
5827         err |= get_user(arg64.buf_size, &arg32->buf_size);
5828         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5829         err |= get_user(cp, &arg32->buf);
5830         arg64.buf = compat_ptr(cp);
5831         err |= copy_to_user(p, &arg64, sizeof(arg64));
5832
5833         if (err)
5834                 return -EFAULT;
5835
5836         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5837         if (err)
5838                 return err;
5839         err |= copy_in_user(&arg32->error_info, &p->error_info,
5840                          sizeof(arg32->error_info));
5841         if (err)
5842                 return -EFAULT;
5843         return err;
5844 }
5845
5846 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5847 {
5848         switch (cmd) {
5849         case CCISS_GETPCIINFO:
5850         case CCISS_GETINTINFO:
5851         case CCISS_SETINTINFO:
5852         case CCISS_GETNODENAME:
5853         case CCISS_SETNODENAME:
5854         case CCISS_GETHEARTBEAT:
5855         case CCISS_GETBUSTYPES:
5856         case CCISS_GETFIRMVER:
5857         case CCISS_GETDRIVVER:
5858         case CCISS_REVALIDVOLS:
5859         case CCISS_DEREGDISK:
5860         case CCISS_REGNEWDISK:
5861         case CCISS_REGNEWD:
5862         case CCISS_RESCANDISK:
5863         case CCISS_GETLUNINFO:
5864                 return hpsa_ioctl(dev, cmd, arg);
5865
5866         case CCISS_PASSTHRU32:
5867                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5868         case CCISS_BIG_PASSTHRU32:
5869                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5870
5871         default:
5872                 return -ENOIOCTLCMD;
5873         }
5874 }
5875 #endif
5876
5877 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5878 {
5879         struct hpsa_pci_info pciinfo;
5880
5881         if (!argp)
5882                 return -EINVAL;
5883         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5884         pciinfo.bus = h->pdev->bus->number;
5885         pciinfo.dev_fn = h->pdev->devfn;
5886         pciinfo.board_id = h->board_id;
5887         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5888                 return -EFAULT;
5889         return 0;
5890 }
5891
5892 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5893 {
5894         DriverVer_type DriverVer;
5895         unsigned char vmaj, vmin, vsubmin;
5896         int rc;
5897
5898         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5899                 &vmaj, &vmin, &vsubmin);
5900         if (rc != 3) {
5901                 dev_info(&h->pdev->dev, "driver version string '%s' "
5902                         "unrecognized.", HPSA_DRIVER_VERSION);
5903                 vmaj = 0;
5904                 vmin = 0;
5905                 vsubmin = 0;
5906         }
5907         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5908         if (!argp)
5909                 return -EINVAL;
5910         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5911                 return -EFAULT;
5912         return 0;
5913 }
5914
5915 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5916 {
5917         IOCTL_Command_struct iocommand;
5918         struct CommandList *c;
5919         char *buff = NULL;
5920         u64 temp64;
5921         int rc = 0;
5922
5923         if (!argp)
5924                 return -EINVAL;
5925         if (!capable(CAP_SYS_RAWIO))
5926                 return -EPERM;
5927         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5928                 return -EFAULT;
5929         if ((iocommand.buf_size < 1) &&
5930             (iocommand.Request.Type.Direction != XFER_NONE)) {
5931                 return -EINVAL;
5932         }
5933         if (iocommand.buf_size > 0) {
5934                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5935                 if (buff == NULL)
5936                         return -ENOMEM;
5937                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5938                         /* Copy the data into the buffer we created */
5939                         if (copy_from_user(buff, iocommand.buf,
5940                                 iocommand.buf_size)) {
5941                                 rc = -EFAULT;
5942                                 goto out_kfree;
5943                         }
5944                 } else {
5945                         memset(buff, 0, iocommand.buf_size);
5946                 }
5947         }
5948         c = cmd_alloc(h);
5949
5950         /* Fill in the command type */
5951         c->cmd_type = CMD_IOCTL_PEND;
5952         c->scsi_cmd = SCSI_CMD_BUSY;
5953         /* Fill in Command Header */
5954         c->Header.ReplyQueue = 0; /* unused in simple mode */
5955         if (iocommand.buf_size > 0) {   /* buffer to fill */
5956                 c->Header.SGList = 1;
5957                 c->Header.SGTotal = cpu_to_le16(1);
5958         } else  { /* no buffers to fill */
5959                 c->Header.SGList = 0;
5960                 c->Header.SGTotal = cpu_to_le16(0);
5961         }
5962         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
5963
5964         /* Fill in Request block */
5965         memcpy(&c->Request, &iocommand.Request,
5966                 sizeof(c->Request));
5967
5968         /* Fill in the scatter gather information */
5969         if (iocommand.buf_size > 0) {
5970                 temp64 = pci_map_single(h->pdev, buff,
5971                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5972                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
5973                         c->SG[0].Addr = cpu_to_le64(0);
5974                         c->SG[0].Len = cpu_to_le32(0);
5975                         rc = -ENOMEM;
5976                         goto out;
5977                 }
5978                 c->SG[0].Addr = cpu_to_le64(temp64);
5979                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
5980                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
5981         }
5982         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5983         if (iocommand.buf_size > 0)
5984                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5985         check_ioctl_unit_attention(h, c);
5986         if (rc) {
5987                 rc = -EIO;
5988                 goto out;
5989         }
5990
5991         /* Copy the error information out */
5992         memcpy(&iocommand.error_info, c->err_info,
5993                 sizeof(iocommand.error_info));
5994         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5995                 rc = -EFAULT;
5996                 goto out;
5997         }
5998         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5999                 iocommand.buf_size > 0) {
6000                 /* Copy the data out of the buffer we created */
6001                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6002                         rc = -EFAULT;
6003                         goto out;
6004                 }
6005         }
6006 out:
6007         cmd_free(h, c);
6008 out_kfree:
6009         kfree(buff);
6010         return rc;
6011 }
6012
6013 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6014 {
6015         BIG_IOCTL_Command_struct *ioc;
6016         struct CommandList *c;
6017         unsigned char **buff = NULL;
6018         int *buff_size = NULL;
6019         u64 temp64;
6020         BYTE sg_used = 0;
6021         int status = 0;
6022         u32 left;
6023         u32 sz;
6024         BYTE __user *data_ptr;
6025
6026         if (!argp)
6027                 return -EINVAL;
6028         if (!capable(CAP_SYS_RAWIO))
6029                 return -EPERM;
6030         ioc = (BIG_IOCTL_Command_struct *)
6031             kmalloc(sizeof(*ioc), GFP_KERNEL);
6032         if (!ioc) {
6033                 status = -ENOMEM;
6034                 goto cleanup1;
6035         }
6036         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6037                 status = -EFAULT;
6038                 goto cleanup1;
6039         }
6040         if ((ioc->buf_size < 1) &&
6041             (ioc->Request.Type.Direction != XFER_NONE)) {
6042                 status = -EINVAL;
6043                 goto cleanup1;
6044         }
6045         /* Check kmalloc limits  using all SGs */
6046         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6047                 status = -EINVAL;
6048                 goto cleanup1;
6049         }
6050         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6051                 status = -EINVAL;
6052                 goto cleanup1;
6053         }
6054         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6055         if (!buff) {
6056                 status = -ENOMEM;
6057                 goto cleanup1;
6058         }
6059         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6060         if (!buff_size) {
6061                 status = -ENOMEM;
6062                 goto cleanup1;
6063         }
6064         left = ioc->buf_size;
6065         data_ptr = ioc->buf;
6066         while (left) {
6067                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6068                 buff_size[sg_used] = sz;
6069                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6070                 if (buff[sg_used] == NULL) {
6071                         status = -ENOMEM;
6072                         goto cleanup1;
6073                 }
6074                 if (ioc->Request.Type.Direction & XFER_WRITE) {
6075                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6076                                 status = -EFAULT;
6077                                 goto cleanup1;
6078                         }
6079                 } else
6080                         memset(buff[sg_used], 0, sz);
6081                 left -= sz;
6082                 data_ptr += sz;
6083                 sg_used++;
6084         }
6085         c = cmd_alloc(h);
6086
6087         c->cmd_type = CMD_IOCTL_PEND;
6088         c->scsi_cmd = SCSI_CMD_BUSY;
6089         c->Header.ReplyQueue = 0;
6090         c->Header.SGList = (u8) sg_used;
6091         c->Header.SGTotal = cpu_to_le16(sg_used);
6092         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6093         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6094         if (ioc->buf_size > 0) {
6095                 int i;
6096                 for (i = 0; i < sg_used; i++) {
6097                         temp64 = pci_map_single(h->pdev, buff[i],
6098                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
6099                         if (dma_mapping_error(&h->pdev->dev,
6100                                                         (dma_addr_t) temp64)) {
6101                                 c->SG[i].Addr = cpu_to_le64(0);
6102                                 c->SG[i].Len = cpu_to_le32(0);
6103                                 hpsa_pci_unmap(h->pdev, c, i,
6104                                         PCI_DMA_BIDIRECTIONAL);
6105                                 status = -ENOMEM;
6106                                 goto cleanup0;
6107                         }
6108                         c->SG[i].Addr = cpu_to_le64(temp64);
6109                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
6110                         c->SG[i].Ext = cpu_to_le32(0);
6111                 }
6112                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6113         }
6114         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6115         if (sg_used)
6116                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6117         check_ioctl_unit_attention(h, c);
6118         if (status) {
6119                 status = -EIO;
6120                 goto cleanup0;
6121         }
6122
6123         /* Copy the error information out */
6124         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6125         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6126                 status = -EFAULT;
6127                 goto cleanup0;
6128         }
6129         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6130                 int i;
6131
6132                 /* Copy the data out of the buffer we created */
6133                 BYTE __user *ptr = ioc->buf;
6134                 for (i = 0; i < sg_used; i++) {
6135                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
6136                                 status = -EFAULT;
6137                                 goto cleanup0;
6138                         }
6139                         ptr += buff_size[i];
6140                 }
6141         }
6142         status = 0;
6143 cleanup0:
6144         cmd_free(h, c);
6145 cleanup1:
6146         if (buff) {
6147                 int i;
6148
6149                 for (i = 0; i < sg_used; i++)
6150                         kfree(buff[i]);
6151                 kfree(buff);
6152         }
6153         kfree(buff_size);
6154         kfree(ioc);
6155         return status;
6156 }
6157
6158 static void check_ioctl_unit_attention(struct ctlr_info *h,
6159         struct CommandList *c)
6160 {
6161         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6162                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6163                 (void) check_for_unit_attention(h, c);
6164 }
6165
6166 /*
6167  * ioctl
6168  */
6169 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6170 {
6171         struct ctlr_info *h;
6172         void __user *argp = (void __user *)arg;
6173         int rc;
6174
6175         h = sdev_to_hba(dev);
6176
6177         switch (cmd) {
6178         case CCISS_DEREGDISK:
6179         case CCISS_REGNEWDISK:
6180         case CCISS_REGNEWD:
6181                 hpsa_scan_start(h->scsi_host);
6182                 return 0;
6183         case CCISS_GETPCIINFO:
6184                 return hpsa_getpciinfo_ioctl(h, argp);
6185         case CCISS_GETDRIVVER:
6186                 return hpsa_getdrivver_ioctl(h, argp);
6187         case CCISS_PASSTHRU:
6188                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6189                         return -EAGAIN;
6190                 rc = hpsa_passthru_ioctl(h, argp);
6191                 atomic_inc(&h->passthru_cmds_avail);
6192                 return rc;
6193         case CCISS_BIG_PASSTHRU:
6194                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6195                         return -EAGAIN;
6196                 rc = hpsa_big_passthru_ioctl(h, argp);
6197                 atomic_inc(&h->passthru_cmds_avail);
6198                 return rc;
6199         default:
6200                 return -ENOTTY;
6201         }
6202 }
6203
6204 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6205                                 u8 reset_type)
6206 {
6207         struct CommandList *c;
6208
6209         c = cmd_alloc(h);
6210
6211         /* fill_cmd can't fail here, no data buffer to map */
6212         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6213                 RAID_CTLR_LUNID, TYPE_MSG);
6214         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6215         c->waiting = NULL;
6216         enqueue_cmd_and_start_io(h, c);
6217         /* Don't wait for completion, the reset won't complete.  Don't free
6218          * the command either.  This is the last command we will send before
6219          * re-initializing everything, so it doesn't matter and won't leak.
6220          */
6221         return;
6222 }
6223
6224 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6225         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6226         int cmd_type)
6227 {
6228         int pci_dir = XFER_NONE;
6229         u64 tag; /* for commands to be aborted */
6230
6231         c->cmd_type = CMD_IOCTL_PEND;
6232         c->scsi_cmd = SCSI_CMD_BUSY;
6233         c->Header.ReplyQueue = 0;
6234         if (buff != NULL && size > 0) {
6235                 c->Header.SGList = 1;
6236                 c->Header.SGTotal = cpu_to_le16(1);
6237         } else {
6238                 c->Header.SGList = 0;
6239                 c->Header.SGTotal = cpu_to_le16(0);
6240         }
6241         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6242
6243         if (cmd_type == TYPE_CMD) {
6244                 switch (cmd) {
6245                 case HPSA_INQUIRY:
6246                         /* are we trying to read a vital product page */
6247                         if (page_code & VPD_PAGE) {
6248                                 c->Request.CDB[1] = 0x01;
6249                                 c->Request.CDB[2] = (page_code & 0xff);
6250                         }
6251                         c->Request.CDBLen = 6;
6252                         c->Request.type_attr_dir =
6253                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6254                         c->Request.Timeout = 0;
6255                         c->Request.CDB[0] = HPSA_INQUIRY;
6256                         c->Request.CDB[4] = size & 0xFF;
6257                         break;
6258                 case HPSA_REPORT_LOG:
6259                 case HPSA_REPORT_PHYS:
6260                         /* Talking to controller so It's a physical command
6261                            mode = 00 target = 0.  Nothing to write.
6262                          */
6263                         c->Request.CDBLen = 12;
6264                         c->Request.type_attr_dir =
6265                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6266                         c->Request.Timeout = 0;
6267                         c->Request.CDB[0] = cmd;
6268                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6269                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6270                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6271                         c->Request.CDB[9] = size & 0xFF;
6272                         break;
6273                 case HPSA_CACHE_FLUSH:
6274                         c->Request.CDBLen = 12;
6275                         c->Request.type_attr_dir =
6276                                         TYPE_ATTR_DIR(cmd_type,
6277                                                 ATTR_SIMPLE, XFER_WRITE);
6278                         c->Request.Timeout = 0;
6279                         c->Request.CDB[0] = BMIC_WRITE;
6280                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6281                         c->Request.CDB[7] = (size >> 8) & 0xFF;
6282                         c->Request.CDB[8] = size & 0xFF;
6283                         break;
6284                 case TEST_UNIT_READY:
6285                         c->Request.CDBLen = 6;
6286                         c->Request.type_attr_dir =
6287                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6288                         c->Request.Timeout = 0;
6289                         break;
6290                 case HPSA_GET_RAID_MAP:
6291                         c->Request.CDBLen = 12;
6292                         c->Request.type_attr_dir =
6293                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6294                         c->Request.Timeout = 0;
6295                         c->Request.CDB[0] = HPSA_CISS_READ;
6296                         c->Request.CDB[1] = cmd;
6297                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6298                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6299                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6300                         c->Request.CDB[9] = size & 0xFF;
6301                         break;
6302                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6303                         c->Request.CDBLen = 10;
6304                         c->Request.type_attr_dir =
6305                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6306                         c->Request.Timeout = 0;
6307                         c->Request.CDB[0] = BMIC_READ;
6308                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6309                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6310                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6311                         break;
6312                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6313                         c->Request.CDBLen = 10;
6314                         c->Request.type_attr_dir =
6315                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6316                         c->Request.Timeout = 0;
6317                         c->Request.CDB[0] = BMIC_READ;
6318                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6319                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6320                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6321                         break;
6322                 default:
6323                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6324                         BUG();
6325                         return -1;
6326                 }
6327         } else if (cmd_type == TYPE_MSG) {
6328                 switch (cmd) {
6329
6330                 case  HPSA_DEVICE_RESET_MSG:
6331                         c->Request.CDBLen = 16;
6332                         c->Request.type_attr_dir =
6333                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6334                         c->Request.Timeout = 0; /* Don't time out */
6335                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6336                         c->Request.CDB[0] =  cmd;
6337                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6338                         /* If bytes 4-7 are zero, it means reset the */
6339                         /* LunID device */
6340                         c->Request.CDB[4] = 0x00;
6341                         c->Request.CDB[5] = 0x00;
6342                         c->Request.CDB[6] = 0x00;
6343                         c->Request.CDB[7] = 0x00;
6344                         break;
6345                 case  HPSA_ABORT_MSG:
6346                         memcpy(&tag, buff, sizeof(tag));
6347                         dev_dbg(&h->pdev->dev,
6348                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
6349                                 tag, c->Header.tag);
6350                         c->Request.CDBLen = 16;
6351                         c->Request.type_attr_dir =
6352                                         TYPE_ATTR_DIR(cmd_type,
6353                                                 ATTR_SIMPLE, XFER_WRITE);
6354                         c->Request.Timeout = 0; /* Don't time out */
6355                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
6356                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
6357                         c->Request.CDB[2] = 0x00; /* reserved */
6358                         c->Request.CDB[3] = 0x00; /* reserved */
6359                         /* Tag to abort goes in CDB[4]-CDB[11] */
6360                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
6361                         c->Request.CDB[12] = 0x00; /* reserved */
6362                         c->Request.CDB[13] = 0x00; /* reserved */
6363                         c->Request.CDB[14] = 0x00; /* reserved */
6364                         c->Request.CDB[15] = 0x00; /* reserved */
6365                 break;
6366                 default:
6367                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
6368                                 cmd);
6369                         BUG();
6370                 }
6371         } else {
6372                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6373                 BUG();
6374         }
6375
6376         switch (GET_DIR(c->Request.type_attr_dir)) {
6377         case XFER_READ:
6378                 pci_dir = PCI_DMA_FROMDEVICE;
6379                 break;
6380         case XFER_WRITE:
6381                 pci_dir = PCI_DMA_TODEVICE;
6382                 break;
6383         case XFER_NONE:
6384                 pci_dir = PCI_DMA_NONE;
6385                 break;
6386         default:
6387                 pci_dir = PCI_DMA_BIDIRECTIONAL;
6388         }
6389         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6390                 return -1;
6391         return 0;
6392 }
6393
6394 /*
6395  * Map (physical) PCI mem into (virtual) kernel space
6396  */
6397 static void __iomem *remap_pci_mem(ulong base, ulong size)
6398 {
6399         ulong page_base = ((ulong) base) & PAGE_MASK;
6400         ulong page_offs = ((ulong) base) - page_base;
6401         void __iomem *page_remapped = ioremap_nocache(page_base,
6402                 page_offs + size);
6403
6404         return page_remapped ? (page_remapped + page_offs) : NULL;
6405 }
6406
6407 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6408 {
6409         return h->access.command_completed(h, q);
6410 }
6411
6412 static inline bool interrupt_pending(struct ctlr_info *h)
6413 {
6414         return h->access.intr_pending(h);
6415 }
6416
6417 static inline long interrupt_not_for_us(struct ctlr_info *h)
6418 {
6419         return (h->access.intr_pending(h) == 0) ||
6420                 (h->interrupts_enabled == 0);
6421 }
6422
6423 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6424         u32 raw_tag)
6425 {
6426         if (unlikely(tag_index >= h->nr_cmds)) {
6427                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6428                 return 1;
6429         }
6430         return 0;
6431 }
6432
6433 static inline void finish_cmd(struct CommandList *c)
6434 {
6435         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6436         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6437                         || c->cmd_type == CMD_IOACCEL2))
6438                 complete_scsi_command(c);
6439         else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6440                 complete(c->waiting);
6441 }
6442
6443 /* process completion of an indexed ("direct lookup") command */
6444 static inline void process_indexed_cmd(struct ctlr_info *h,
6445         u32 raw_tag)
6446 {
6447         u32 tag_index;
6448         struct CommandList *c;
6449
6450         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6451         if (!bad_tag(h, tag_index, raw_tag)) {
6452                 c = h->cmd_pool + tag_index;
6453                 finish_cmd(c);
6454         }
6455 }
6456
6457 /* Some controllers, like p400, will give us one interrupt
6458  * after a soft reset, even if we turned interrupts off.
6459  * Only need to check for this in the hpsa_xxx_discard_completions
6460  * functions.
6461  */
6462 static int ignore_bogus_interrupt(struct ctlr_info *h)
6463 {
6464         if (likely(!reset_devices))
6465                 return 0;
6466
6467         if (likely(h->interrupts_enabled))
6468                 return 0;
6469
6470         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6471                 "(known firmware bug.)  Ignoring.\n");
6472
6473         return 1;
6474 }
6475
6476 /*
6477  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6478  * Relies on (h-q[x] == x) being true for x such that
6479  * 0 <= x < MAX_REPLY_QUEUES.
6480  */
6481 static struct ctlr_info *queue_to_hba(u8 *queue)
6482 {
6483         return container_of((queue - *queue), struct ctlr_info, q[0]);
6484 }
6485
6486 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6487 {
6488         struct ctlr_info *h = queue_to_hba(queue);
6489         u8 q = *(u8 *) queue;
6490         u32 raw_tag;
6491
6492         if (ignore_bogus_interrupt(h))
6493                 return IRQ_NONE;
6494
6495         if (interrupt_not_for_us(h))
6496                 return IRQ_NONE;
6497         h->last_intr_timestamp = get_jiffies_64();
6498         while (interrupt_pending(h)) {
6499                 raw_tag = get_next_completion(h, q);
6500                 while (raw_tag != FIFO_EMPTY)
6501                         raw_tag = next_command(h, q);
6502         }
6503         return IRQ_HANDLED;
6504 }
6505
6506 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6507 {
6508         struct ctlr_info *h = queue_to_hba(queue);
6509         u32 raw_tag;
6510         u8 q = *(u8 *) queue;
6511
6512         if (ignore_bogus_interrupt(h))
6513                 return IRQ_NONE;
6514
6515         h->last_intr_timestamp = get_jiffies_64();
6516         raw_tag = get_next_completion(h, q);
6517         while (raw_tag != FIFO_EMPTY)
6518                 raw_tag = next_command(h, q);
6519         return IRQ_HANDLED;
6520 }
6521
6522 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6523 {
6524         struct ctlr_info *h = queue_to_hba((u8 *) queue);
6525         u32 raw_tag;
6526         u8 q = *(u8 *) queue;
6527
6528         if (interrupt_not_for_us(h))
6529                 return IRQ_NONE;
6530         h->last_intr_timestamp = get_jiffies_64();
6531         while (interrupt_pending(h)) {
6532                 raw_tag = get_next_completion(h, q);
6533                 while (raw_tag != FIFO_EMPTY) {
6534                         process_indexed_cmd(h, raw_tag);
6535                         raw_tag = next_command(h, q);
6536                 }
6537         }
6538         return IRQ_HANDLED;
6539 }
6540
6541 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6542 {
6543         struct ctlr_info *h = queue_to_hba(queue);
6544         u32 raw_tag;
6545         u8 q = *(u8 *) queue;
6546
6547         h->last_intr_timestamp = get_jiffies_64();
6548         raw_tag = get_next_completion(h, q);
6549         while (raw_tag != FIFO_EMPTY) {
6550                 process_indexed_cmd(h, raw_tag);
6551                 raw_tag = next_command(h, q);
6552         }
6553         return IRQ_HANDLED;
6554 }
6555
6556 /* Send a message CDB to the firmware. Careful, this only works
6557  * in simple mode, not performant mode due to the tag lookup.
6558  * We only ever use this immediately after a controller reset.
6559  */
6560 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6561                         unsigned char type)
6562 {
6563         struct Command {
6564                 struct CommandListHeader CommandHeader;
6565                 struct RequestBlock Request;
6566                 struct ErrDescriptor ErrorDescriptor;
6567         };
6568         struct Command *cmd;
6569         static const size_t cmd_sz = sizeof(*cmd) +
6570                                         sizeof(cmd->ErrorDescriptor);
6571         dma_addr_t paddr64;
6572         __le32 paddr32;
6573         u32 tag;
6574         void __iomem *vaddr;
6575         int i, err;
6576
6577         vaddr = pci_ioremap_bar(pdev, 0);
6578         if (vaddr == NULL)
6579                 return -ENOMEM;
6580
6581         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6582          * CCISS commands, so they must be allocated from the lower 4GiB of
6583          * memory.
6584          */
6585         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6586         if (err) {
6587                 iounmap(vaddr);
6588                 return err;
6589         }
6590
6591         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6592         if (cmd == NULL) {
6593                 iounmap(vaddr);
6594                 return -ENOMEM;
6595         }
6596
6597         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
6598          * although there's no guarantee, we assume that the address is at
6599          * least 4-byte aligned (most likely, it's page-aligned).
6600          */
6601         paddr32 = cpu_to_le32(paddr64);
6602
6603         cmd->CommandHeader.ReplyQueue = 0;
6604         cmd->CommandHeader.SGList = 0;
6605         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6606         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6607         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6608
6609         cmd->Request.CDBLen = 16;
6610         cmd->Request.type_attr_dir =
6611                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6612         cmd->Request.Timeout = 0; /* Don't time out */
6613         cmd->Request.CDB[0] = opcode;
6614         cmd->Request.CDB[1] = type;
6615         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6616         cmd->ErrorDescriptor.Addr =
6617                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6618         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6619
6620         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6621
6622         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6623                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6624                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6625                         break;
6626                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6627         }
6628
6629         iounmap(vaddr);
6630
6631         /* we leak the DMA buffer here ... no choice since the controller could
6632          *  still complete the command.
6633          */
6634         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6635                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6636                         opcode, type);
6637                 return -ETIMEDOUT;
6638         }
6639
6640         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6641
6642         if (tag & HPSA_ERROR_BIT) {
6643                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6644                         opcode, type);
6645                 return -EIO;
6646         }
6647
6648         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6649                 opcode, type);
6650         return 0;
6651 }
6652
6653 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6654
6655 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6656         void __iomem *vaddr, u32 use_doorbell)
6657 {
6658
6659         if (use_doorbell) {
6660                 /* For everything after the P600, the PCI power state method
6661                  * of resetting the controller doesn't work, so we have this
6662                  * other way using the doorbell register.
6663                  */
6664                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6665                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6666
6667                 /* PMC hardware guys tell us we need a 10 second delay after
6668                  * doorbell reset and before any attempt to talk to the board
6669                  * at all to ensure that this actually works and doesn't fall
6670                  * over in some weird corner cases.
6671                  */
6672                 msleep(10000);
6673         } else { /* Try to do it the PCI power state way */
6674
6675                 /* Quoting from the Open CISS Specification: "The Power
6676                  * Management Control/Status Register (CSR) controls the power
6677                  * state of the device.  The normal operating state is D0,
6678                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6679                  * the controller, place the interface device in D3 then to D0,
6680                  * this causes a secondary PCI reset which will reset the
6681                  * controller." */
6682
6683                 int rc = 0;
6684
6685                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6686
6687                 /* enter the D3hot power management state */
6688                 rc = pci_set_power_state(pdev, PCI_D3hot);
6689                 if (rc)
6690                         return rc;
6691
6692                 msleep(500);
6693
6694                 /* enter the D0 power management state */
6695                 rc = pci_set_power_state(pdev, PCI_D0);
6696                 if (rc)
6697                         return rc;
6698
6699                 /*
6700                  * The P600 requires a small delay when changing states.
6701                  * Otherwise we may think the board did not reset and we bail.
6702                  * This for kdump only and is particular to the P600.
6703                  */
6704                 msleep(500);
6705         }
6706         return 0;
6707 }
6708
6709 static void init_driver_version(char *driver_version, int len)
6710 {
6711         memset(driver_version, 0, len);
6712         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6713 }
6714
6715 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6716 {
6717         char *driver_version;
6718         int i, size = sizeof(cfgtable->driver_version);
6719
6720         driver_version = kmalloc(size, GFP_KERNEL);
6721         if (!driver_version)
6722                 return -ENOMEM;
6723
6724         init_driver_version(driver_version, size);
6725         for (i = 0; i < size; i++)
6726                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6727         kfree(driver_version);
6728         return 0;
6729 }
6730
6731 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6732                                           unsigned char *driver_ver)
6733 {
6734         int i;
6735
6736         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6737                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6738 }
6739
6740 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6741 {
6742
6743         char *driver_ver, *old_driver_ver;
6744         int rc, size = sizeof(cfgtable->driver_version);
6745
6746         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6747         if (!old_driver_ver)
6748                 return -ENOMEM;
6749         driver_ver = old_driver_ver + size;
6750
6751         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6752          * should have been changed, otherwise we know the reset failed.
6753          */
6754         init_driver_version(old_driver_ver, size);
6755         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6756         rc = !memcmp(driver_ver, old_driver_ver, size);
6757         kfree(old_driver_ver);
6758         return rc;
6759 }
6760 /* This does a hard reset of the controller using PCI power management
6761  * states or the using the doorbell register.
6762  */
6763 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6764 {
6765         u64 cfg_offset;
6766         u32 cfg_base_addr;
6767         u64 cfg_base_addr_index;
6768         void __iomem *vaddr;
6769         unsigned long paddr;
6770         u32 misc_fw_support;
6771         int rc;
6772         struct CfgTable __iomem *cfgtable;
6773         u32 use_doorbell;
6774         u16 command_register;
6775
6776         /* For controllers as old as the P600, this is very nearly
6777          * the same thing as
6778          *
6779          * pci_save_state(pci_dev);
6780          * pci_set_power_state(pci_dev, PCI_D3hot);
6781          * pci_set_power_state(pci_dev, PCI_D0);
6782          * pci_restore_state(pci_dev);
6783          *
6784          * For controllers newer than the P600, the pci power state
6785          * method of resetting doesn't work so we have another way
6786          * using the doorbell register.
6787          */
6788
6789         if (!ctlr_is_resettable(board_id)) {
6790                 dev_warn(&pdev->dev, "Controller not resettable\n");
6791                 return -ENODEV;
6792         }
6793
6794         /* if controller is soft- but not hard resettable... */
6795         if (!ctlr_is_hard_resettable(board_id))
6796                 return -ENOTSUPP; /* try soft reset later. */
6797
6798         /* Save the PCI command register */
6799         pci_read_config_word(pdev, 4, &command_register);
6800         pci_save_state(pdev);
6801
6802         /* find the first memory BAR, so we can find the cfg table */
6803         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6804         if (rc)
6805                 return rc;
6806         vaddr = remap_pci_mem(paddr, 0x250);
6807         if (!vaddr)
6808                 return -ENOMEM;
6809
6810         /* find cfgtable in order to check if reset via doorbell is supported */
6811         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6812                                         &cfg_base_addr_index, &cfg_offset);
6813         if (rc)
6814                 goto unmap_vaddr;
6815         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6816                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6817         if (!cfgtable) {
6818                 rc = -ENOMEM;
6819                 goto unmap_vaddr;
6820         }
6821         rc = write_driver_ver_to_cfgtable(cfgtable);
6822         if (rc)
6823                 goto unmap_cfgtable;
6824
6825         /* If reset via doorbell register is supported, use that.
6826          * There are two such methods.  Favor the newest method.
6827          */
6828         misc_fw_support = readl(&cfgtable->misc_fw_support);
6829         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6830         if (use_doorbell) {
6831                 use_doorbell = DOORBELL_CTLR_RESET2;
6832         } else {
6833                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6834                 if (use_doorbell) {
6835                         dev_warn(&pdev->dev,
6836                                 "Soft reset not supported. Firmware update is required.\n");
6837                         rc = -ENOTSUPP; /* try soft reset */
6838                         goto unmap_cfgtable;
6839                 }
6840         }
6841
6842         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6843         if (rc)
6844                 goto unmap_cfgtable;
6845
6846         pci_restore_state(pdev);
6847         pci_write_config_word(pdev, 4, command_register);
6848
6849         /* Some devices (notably the HP Smart Array 5i Controller)
6850            need a little pause here */
6851         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6852
6853         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6854         if (rc) {
6855                 dev_warn(&pdev->dev,
6856                         "Failed waiting for board to become ready after hard reset\n");
6857                 goto unmap_cfgtable;
6858         }
6859
6860         rc = controller_reset_failed(vaddr);
6861         if (rc < 0)
6862                 goto unmap_cfgtable;
6863         if (rc) {
6864                 dev_warn(&pdev->dev, "Unable to successfully reset "
6865                         "controller. Will try soft reset.\n");
6866                 rc = -ENOTSUPP;
6867         } else {
6868                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6869         }
6870
6871 unmap_cfgtable:
6872         iounmap(cfgtable);
6873
6874 unmap_vaddr:
6875         iounmap(vaddr);
6876         return rc;
6877 }
6878
6879 /*
6880  *  We cannot read the structure directly, for portability we must use
6881  *   the io functions.
6882  *   This is for debug only.
6883  */
6884 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6885 {
6886 #ifdef HPSA_DEBUG
6887         int i;
6888         char temp_name[17];
6889
6890         dev_info(dev, "Controller Configuration information\n");
6891         dev_info(dev, "------------------------------------\n");
6892         for (i = 0; i < 4; i++)
6893                 temp_name[i] = readb(&(tb->Signature[i]));
6894         temp_name[4] = '\0';
6895         dev_info(dev, "   Signature = %s\n", temp_name);
6896         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6897         dev_info(dev, "   Transport methods supported = 0x%x\n",
6898                readl(&(tb->TransportSupport)));
6899         dev_info(dev, "   Transport methods active = 0x%x\n",
6900                readl(&(tb->TransportActive)));
6901         dev_info(dev, "   Requested transport Method = 0x%x\n",
6902                readl(&(tb->HostWrite.TransportRequest)));
6903         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6904                readl(&(tb->HostWrite.CoalIntDelay)));
6905         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6906                readl(&(tb->HostWrite.CoalIntCount)));
6907         dev_info(dev, "   Max outstanding commands = %d\n",
6908                readl(&(tb->CmdsOutMax)));
6909         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6910         for (i = 0; i < 16; i++)
6911                 temp_name[i] = readb(&(tb->ServerName[i]));
6912         temp_name[16] = '\0';
6913         dev_info(dev, "   Server Name = %s\n", temp_name);
6914         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6915                 readl(&(tb->HeartBeat)));
6916 #endif                          /* HPSA_DEBUG */
6917 }
6918
6919 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6920 {
6921         int i, offset, mem_type, bar_type;
6922
6923         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6924                 return 0;
6925         offset = 0;
6926         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6927                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6928                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6929                         offset += 4;
6930                 else {
6931                         mem_type = pci_resource_flags(pdev, i) &
6932                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6933                         switch (mem_type) {
6934                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6935                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6936                                 offset += 4;    /* 32 bit */
6937                                 break;
6938                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6939                                 offset += 8;
6940                                 break;
6941                         default:        /* reserved in PCI 2.2 */
6942                                 dev_warn(&pdev->dev,
6943                                        "base address is invalid\n");
6944                                 return -1;
6945                                 break;
6946                         }
6947                 }
6948                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6949                         return i + 1;
6950         }
6951         return -1;
6952 }
6953
6954 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
6955 {
6956         if (h->msix_vector) {
6957                 if (h->pdev->msix_enabled)
6958                         pci_disable_msix(h->pdev);
6959                 h->msix_vector = 0;
6960         } else if (h->msi_vector) {
6961                 if (h->pdev->msi_enabled)
6962                         pci_disable_msi(h->pdev);
6963                 h->msi_vector = 0;
6964         }
6965 }
6966
6967 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6968  * controllers that are capable. If not, we use legacy INTx mode.
6969  */
6970 static void hpsa_interrupt_mode(struct ctlr_info *h)
6971 {
6972 #ifdef CONFIG_PCI_MSI
6973         int err, i;
6974         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6975
6976         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6977                 hpsa_msix_entries[i].vector = 0;
6978                 hpsa_msix_entries[i].entry = i;
6979         }
6980
6981         /* Some boards advertise MSI but don't really support it */
6982         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6983             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6984                 goto default_int_mode;
6985         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6986                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6987                 h->msix_vector = MAX_REPLY_QUEUES;
6988                 if (h->msix_vector > num_online_cpus())
6989                         h->msix_vector = num_online_cpus();
6990                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6991                                             1, h->msix_vector);
6992                 if (err < 0) {
6993                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6994                         h->msix_vector = 0;
6995                         goto single_msi_mode;
6996                 } else if (err < h->msix_vector) {
6997                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6998                                "available\n", err);
6999                 }
7000                 h->msix_vector = err;
7001                 for (i = 0; i < h->msix_vector; i++)
7002                         h->intr[i] = hpsa_msix_entries[i].vector;
7003                 return;
7004         }
7005 single_msi_mode:
7006         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7007                 dev_info(&h->pdev->dev, "MSI capable controller\n");
7008                 if (!pci_enable_msi(h->pdev))
7009                         h->msi_vector = 1;
7010                 else
7011                         dev_warn(&h->pdev->dev, "MSI init failed\n");
7012         }
7013 default_int_mode:
7014 #endif                          /* CONFIG_PCI_MSI */
7015         /* if we get here we're going to use the default interrupt mode */
7016         h->intr[h->intr_mode] = h->pdev->irq;
7017 }
7018
7019 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7020 {
7021         int i;
7022         u32 subsystem_vendor_id, subsystem_device_id;
7023
7024         subsystem_vendor_id = pdev->subsystem_vendor;
7025         subsystem_device_id = pdev->subsystem_device;
7026         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7027                     subsystem_vendor_id;
7028
7029         for (i = 0; i < ARRAY_SIZE(products); i++)
7030                 if (*board_id == products[i].board_id)
7031                         return i;
7032
7033         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7034                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7035                 !hpsa_allow_any) {
7036                 dev_warn(&pdev->dev, "unrecognized board ID: "
7037                         "0x%08x, ignoring.\n", *board_id);
7038                         return -ENODEV;
7039         }
7040         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7041 }
7042
7043 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7044                                     unsigned long *memory_bar)
7045 {
7046         int i;
7047
7048         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7049                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7050                         /* addressing mode bits already removed */
7051                         *memory_bar = pci_resource_start(pdev, i);
7052                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7053                                 *memory_bar);
7054                         return 0;
7055                 }
7056         dev_warn(&pdev->dev, "no memory BAR found\n");
7057         return -ENODEV;
7058 }
7059
7060 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7061                                      int wait_for_ready)
7062 {
7063         int i, iterations;
7064         u32 scratchpad;
7065         if (wait_for_ready)
7066                 iterations = HPSA_BOARD_READY_ITERATIONS;
7067         else
7068                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7069
7070         for (i = 0; i < iterations; i++) {
7071                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7072                 if (wait_for_ready) {
7073                         if (scratchpad == HPSA_FIRMWARE_READY)
7074                                 return 0;
7075                 } else {
7076                         if (scratchpad != HPSA_FIRMWARE_READY)
7077                                 return 0;
7078                 }
7079                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7080         }
7081         dev_warn(&pdev->dev, "board not ready, timed out.\n");
7082         return -ENODEV;
7083 }
7084
7085 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7086                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7087                                u64 *cfg_offset)
7088 {
7089         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7090         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7091         *cfg_base_addr &= (u32) 0x0000ffff;
7092         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7093         if (*cfg_base_addr_index == -1) {
7094                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7095                 return -ENODEV;
7096         }
7097         return 0;
7098 }
7099
7100 static void hpsa_free_cfgtables(struct ctlr_info *h)
7101 {
7102         if (h->transtable) {
7103                 iounmap(h->transtable);
7104                 h->transtable = NULL;
7105         }
7106         if (h->cfgtable) {
7107                 iounmap(h->cfgtable);
7108                 h->cfgtable = NULL;
7109         }
7110 }
7111
7112 /* Find and map CISS config table and transfer table
7113 + * several items must be unmapped (freed) later
7114 + * */
7115 static int hpsa_find_cfgtables(struct ctlr_info *h)
7116 {
7117         u64 cfg_offset;
7118         u32 cfg_base_addr;
7119         u64 cfg_base_addr_index;
7120         u32 trans_offset;
7121         int rc;
7122
7123         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7124                 &cfg_base_addr_index, &cfg_offset);
7125         if (rc)
7126                 return rc;
7127         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7128                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7129         if (!h->cfgtable) {
7130                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7131                 return -ENOMEM;
7132         }
7133         rc = write_driver_ver_to_cfgtable(h->cfgtable);
7134         if (rc)
7135                 return rc;
7136         /* Find performant mode table. */
7137         trans_offset = readl(&h->cfgtable->TransMethodOffset);
7138         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7139                                 cfg_base_addr_index)+cfg_offset+trans_offset,
7140                                 sizeof(*h->transtable));
7141         if (!h->transtable) {
7142                 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7143                 hpsa_free_cfgtables(h);
7144                 return -ENOMEM;
7145         }
7146         return 0;
7147 }
7148
7149 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7150 {
7151 #define MIN_MAX_COMMANDS 16
7152         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7153
7154         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7155
7156         /* Limit commands in memory limited kdump scenario. */
7157         if (reset_devices && h->max_commands > 32)
7158                 h->max_commands = 32;
7159
7160         if (h->max_commands < MIN_MAX_COMMANDS) {
7161                 dev_warn(&h->pdev->dev,
7162                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7163                         h->max_commands,
7164                         MIN_MAX_COMMANDS);
7165                 h->max_commands = MIN_MAX_COMMANDS;
7166         }
7167 }
7168
7169 /* If the controller reports that the total max sg entries is greater than 512,
7170  * then we know that chained SG blocks work.  (Original smart arrays did not
7171  * support chained SG blocks and would return zero for max sg entries.)
7172  */
7173 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7174 {
7175         return h->maxsgentries > 512;
7176 }
7177
7178 /* Interrogate the hardware for some limits:
7179  * max commands, max SG elements without chaining, and with chaining,
7180  * SG chain block size, etc.
7181  */
7182 static void hpsa_find_board_params(struct ctlr_info *h)
7183 {
7184         hpsa_get_max_perf_mode_cmds(h);
7185         h->nr_cmds = h->max_commands;
7186         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7187         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7188         if (hpsa_supports_chained_sg_blocks(h)) {
7189                 /* Limit in-command s/g elements to 32 save dma'able memory. */
7190                 h->max_cmd_sg_entries = 32;
7191                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7192                 h->maxsgentries--; /* save one for chain pointer */
7193         } else {
7194                 /*
7195                  * Original smart arrays supported at most 31 s/g entries
7196                  * embedded inline in the command (trying to use more
7197                  * would lock up the controller)
7198                  */
7199                 h->max_cmd_sg_entries = 31;
7200                 h->maxsgentries = 31; /* default to traditional values */
7201                 h->chainsize = 0;
7202         }
7203
7204         /* Find out what task management functions are supported and cache */
7205         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7206         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7207                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7208         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7209                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7210         if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7211                 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7212 }
7213
7214 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7215 {
7216         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7217                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7218                 return false;
7219         }
7220         return true;
7221 }
7222
7223 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7224 {
7225         u32 driver_support;
7226
7227         driver_support = readl(&(h->cfgtable->driver_support));
7228         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7229 #ifdef CONFIG_X86
7230         driver_support |= ENABLE_SCSI_PREFETCH;
7231 #endif
7232         driver_support |= ENABLE_UNIT_ATTN;
7233         writel(driver_support, &(h->cfgtable->driver_support));
7234 }
7235
7236 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
7237  * in a prefetch beyond physical memory.
7238  */
7239 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7240 {
7241         u32 dma_prefetch;
7242
7243         if (h->board_id != 0x3225103C)
7244                 return;
7245         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7246         dma_prefetch |= 0x8000;
7247         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7248 }
7249
7250 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7251 {
7252         int i;
7253         u32 doorbell_value;
7254         unsigned long flags;
7255         /* wait until the clear_event_notify bit 6 is cleared by controller. */
7256         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7257                 spin_lock_irqsave(&h->lock, flags);
7258                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7259                 spin_unlock_irqrestore(&h->lock, flags);
7260                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7261                         goto done;
7262                 /* delay and try again */
7263                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7264         }
7265         return -ENODEV;
7266 done:
7267         return 0;
7268 }
7269
7270 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7271 {
7272         int i;
7273         u32 doorbell_value;
7274         unsigned long flags;
7275
7276         /* under certain very rare conditions, this can take awhile.
7277          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7278          * as we enter this code.)
7279          */
7280         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7281                 if (h->remove_in_progress)
7282                         goto done;
7283                 spin_lock_irqsave(&h->lock, flags);
7284                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7285                 spin_unlock_irqrestore(&h->lock, flags);
7286                 if (!(doorbell_value & CFGTBL_ChangeReq))
7287                         goto done;
7288                 /* delay and try again */
7289                 msleep(MODE_CHANGE_WAIT_INTERVAL);
7290         }
7291         return -ENODEV;
7292 done:
7293         return 0;
7294 }
7295
7296 /* return -ENODEV or other reason on error, 0 on success */
7297 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7298 {
7299         u32 trans_support;
7300
7301         trans_support = readl(&(h->cfgtable->TransportSupport));
7302         if (!(trans_support & SIMPLE_MODE))
7303                 return -ENOTSUPP;
7304
7305         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7306
7307         /* Update the field, and then ring the doorbell */
7308         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7309         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7310         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7311         if (hpsa_wait_for_mode_change_ack(h))
7312                 goto error;
7313         print_cfg_table(&h->pdev->dev, h->cfgtable);
7314         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7315                 goto error;
7316         h->transMethod = CFGTBL_Trans_Simple;
7317         return 0;
7318 error:
7319         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7320         return -ENODEV;
7321 }
7322
7323 /* free items allocated or mapped by hpsa_pci_init */
7324 static void hpsa_free_pci_init(struct ctlr_info *h)
7325 {
7326         hpsa_free_cfgtables(h);                 /* pci_init 4 */
7327         iounmap(h->vaddr);                      /* pci_init 3 */
7328         h->vaddr = NULL;
7329         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
7330         /*
7331          * call pci_disable_device before pci_release_regions per
7332          * Documentation/PCI/pci.txt
7333          */
7334         pci_disable_device(h->pdev);            /* pci_init 1 */
7335         pci_release_regions(h->pdev);           /* pci_init 2 */
7336 }
7337
7338 /* several items must be freed later */
7339 static int hpsa_pci_init(struct ctlr_info *h)
7340 {
7341         int prod_index, err;
7342
7343         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7344         if (prod_index < 0)
7345                 return prod_index;
7346         h->product_name = products[prod_index].product_name;
7347         h->access = *(products[prod_index].access);
7348
7349         h->needs_abort_tags_swizzled =
7350                 ctlr_needs_abort_tags_swizzled(h->board_id);
7351
7352         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7353                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7354
7355         err = pci_enable_device(h->pdev);
7356         if (err) {
7357                 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7358                 pci_disable_device(h->pdev);
7359                 return err;
7360         }
7361
7362         err = pci_request_regions(h->pdev, HPSA);
7363         if (err) {
7364                 dev_err(&h->pdev->dev,
7365                         "failed to obtain PCI resources\n");
7366                 pci_disable_device(h->pdev);
7367                 return err;
7368         }
7369
7370         pci_set_master(h->pdev);
7371
7372         hpsa_interrupt_mode(h);
7373         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7374         if (err)
7375                 goto clean2;    /* intmode+region, pci */
7376         h->vaddr = remap_pci_mem(h->paddr, 0x250);
7377         if (!h->vaddr) {
7378                 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7379                 err = -ENOMEM;
7380                 goto clean2;    /* intmode+region, pci */
7381         }
7382         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7383         if (err)
7384                 goto clean3;    /* vaddr, intmode+region, pci */
7385         err = hpsa_find_cfgtables(h);
7386         if (err)
7387                 goto clean3;    /* vaddr, intmode+region, pci */
7388         hpsa_find_board_params(h);
7389
7390         if (!hpsa_CISS_signature_present(h)) {
7391                 err = -ENODEV;
7392                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7393         }
7394         hpsa_set_driver_support_bits(h);
7395         hpsa_p600_dma_prefetch_quirk(h);
7396         err = hpsa_enter_simple_mode(h);
7397         if (err)
7398                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7399         return 0;
7400
7401 clean4: /* cfgtables, vaddr, intmode+region, pci */
7402         hpsa_free_cfgtables(h);
7403 clean3: /* vaddr, intmode+region, pci */
7404         iounmap(h->vaddr);
7405         h->vaddr = NULL;
7406 clean2: /* intmode+region, pci */
7407         hpsa_disable_interrupt_mode(h);
7408         /*
7409          * call pci_disable_device before pci_release_regions per
7410          * Documentation/PCI/pci.txt
7411          */
7412         pci_disable_device(h->pdev);
7413         pci_release_regions(h->pdev);
7414         return err;
7415 }
7416
7417 static void hpsa_hba_inquiry(struct ctlr_info *h)
7418 {
7419         int rc;
7420
7421 #define HBA_INQUIRY_BYTE_COUNT 64
7422         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7423         if (!h->hba_inquiry_data)
7424                 return;
7425         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7426                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7427         if (rc != 0) {
7428                 kfree(h->hba_inquiry_data);
7429                 h->hba_inquiry_data = NULL;
7430         }
7431 }
7432
7433 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7434 {
7435         int rc, i;
7436         void __iomem *vaddr;
7437
7438         if (!reset_devices)
7439                 return 0;
7440
7441         /* kdump kernel is loading, we don't know in which state is
7442          * the pci interface. The dev->enable_cnt is equal zero
7443          * so we call enable+disable, wait a while and switch it on.
7444          */
7445         rc = pci_enable_device(pdev);
7446         if (rc) {
7447                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7448                 return -ENODEV;
7449         }
7450         pci_disable_device(pdev);
7451         msleep(260);                    /* a randomly chosen number */
7452         rc = pci_enable_device(pdev);
7453         if (rc) {
7454                 dev_warn(&pdev->dev, "failed to enable device.\n");
7455                 return -ENODEV;
7456         }
7457
7458         pci_set_master(pdev);
7459
7460         vaddr = pci_ioremap_bar(pdev, 0);
7461         if (vaddr == NULL) {
7462                 rc = -ENOMEM;
7463                 goto out_disable;
7464         }
7465         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7466         iounmap(vaddr);
7467
7468         /* Reset the controller with a PCI power-cycle or via doorbell */
7469         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7470
7471         /* -ENOTSUPP here means we cannot reset the controller
7472          * but it's already (and still) up and running in
7473          * "performant mode".  Or, it might be 640x, which can't reset
7474          * due to concerns about shared bbwc between 6402/6404 pair.
7475          */
7476         if (rc)
7477                 goto out_disable;
7478
7479         /* Now try to get the controller to respond to a no-op */
7480         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7481         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7482                 if (hpsa_noop(pdev) == 0)
7483                         break;
7484                 else
7485                         dev_warn(&pdev->dev, "no-op failed%s\n",
7486                                         (i < 11 ? "; re-trying" : ""));
7487         }
7488
7489 out_disable:
7490
7491         pci_disable_device(pdev);
7492         return rc;
7493 }
7494
7495 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7496 {
7497         kfree(h->cmd_pool_bits);
7498         h->cmd_pool_bits = NULL;
7499         if (h->cmd_pool) {
7500                 pci_free_consistent(h->pdev,
7501                                 h->nr_cmds * sizeof(struct CommandList),
7502                                 h->cmd_pool,
7503                                 h->cmd_pool_dhandle);
7504                 h->cmd_pool = NULL;
7505                 h->cmd_pool_dhandle = 0;
7506         }
7507         if (h->errinfo_pool) {
7508                 pci_free_consistent(h->pdev,
7509                                 h->nr_cmds * sizeof(struct ErrorInfo),
7510                                 h->errinfo_pool,
7511                                 h->errinfo_pool_dhandle);
7512                 h->errinfo_pool = NULL;
7513                 h->errinfo_pool_dhandle = 0;
7514         }
7515 }
7516
7517 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7518 {
7519         h->cmd_pool_bits = kzalloc(
7520                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7521                 sizeof(unsigned long), GFP_KERNEL);
7522         h->cmd_pool = pci_alloc_consistent(h->pdev,
7523                     h->nr_cmds * sizeof(*h->cmd_pool),
7524                     &(h->cmd_pool_dhandle));
7525         h->errinfo_pool = pci_alloc_consistent(h->pdev,
7526                     h->nr_cmds * sizeof(*h->errinfo_pool),
7527                     &(h->errinfo_pool_dhandle));
7528         if ((h->cmd_pool_bits == NULL)
7529             || (h->cmd_pool == NULL)
7530             || (h->errinfo_pool == NULL)) {
7531                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7532                 goto clean_up;
7533         }
7534         hpsa_preinitialize_commands(h);
7535         return 0;
7536 clean_up:
7537         hpsa_free_cmd_pool(h);
7538         return -ENOMEM;
7539 }
7540
7541 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
7542 {
7543         int i, cpu;
7544
7545         cpu = cpumask_first(cpu_online_mask);
7546         for (i = 0; i < h->msix_vector; i++) {
7547                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
7548                 cpu = cpumask_next(cpu, cpu_online_mask);
7549         }
7550 }
7551
7552 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7553 static void hpsa_free_irqs(struct ctlr_info *h)
7554 {
7555         int i;
7556
7557         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
7558                 /* Single reply queue, only one irq to free */
7559                 i = h->intr_mode;
7560                 irq_set_affinity_hint(h->intr[i], NULL);
7561                 free_irq(h->intr[i], &h->q[i]);
7562                 h->q[i] = 0;
7563                 return;
7564         }
7565
7566         for (i = 0; i < h->msix_vector; i++) {
7567                 irq_set_affinity_hint(h->intr[i], NULL);
7568                 free_irq(h->intr[i], &h->q[i]);
7569                 h->q[i] = 0;
7570         }
7571         for (; i < MAX_REPLY_QUEUES; i++)
7572                 h->q[i] = 0;
7573 }
7574
7575 /* returns 0 on success; cleans up and returns -Enn on error */
7576 static int hpsa_request_irqs(struct ctlr_info *h,
7577         irqreturn_t (*msixhandler)(int, void *),
7578         irqreturn_t (*intxhandler)(int, void *))
7579 {
7580         int rc, i;
7581
7582         /*
7583          * initialize h->q[x] = x so that interrupt handlers know which
7584          * queue to process.
7585          */
7586         for (i = 0; i < MAX_REPLY_QUEUES; i++)
7587                 h->q[i] = (u8) i;
7588
7589         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
7590                 /* If performant mode and MSI-X, use multiple reply queues */
7591                 for (i = 0; i < h->msix_vector; i++) {
7592                         sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7593                         rc = request_irq(h->intr[i], msixhandler,
7594                                         0, h->intrname[i],
7595                                         &h->q[i]);
7596                         if (rc) {
7597                                 int j;
7598
7599                                 dev_err(&h->pdev->dev,
7600                                         "failed to get irq %d for %s\n",
7601                                        h->intr[i], h->devname);
7602                                 for (j = 0; j < i; j++) {
7603                                         free_irq(h->intr[j], &h->q[j]);
7604                                         h->q[j] = 0;
7605                                 }
7606                                 for (; j < MAX_REPLY_QUEUES; j++)
7607                                         h->q[j] = 0;
7608                                 return rc;
7609                         }
7610                 }
7611                 hpsa_irq_affinity_hints(h);
7612         } else {
7613                 /* Use single reply pool */
7614                 if (h->msix_vector > 0 || h->msi_vector) {
7615                         if (h->msix_vector)
7616                                 sprintf(h->intrname[h->intr_mode],
7617                                         "%s-msix", h->devname);
7618                         else
7619                                 sprintf(h->intrname[h->intr_mode],
7620                                         "%s-msi", h->devname);
7621                         rc = request_irq(h->intr[h->intr_mode],
7622                                 msixhandler, 0,
7623                                 h->intrname[h->intr_mode],
7624                                 &h->q[h->intr_mode]);
7625                 } else {
7626                         sprintf(h->intrname[h->intr_mode],
7627                                 "%s-intx", h->devname);
7628                         rc = request_irq(h->intr[h->intr_mode],
7629                                 intxhandler, IRQF_SHARED,
7630                                 h->intrname[h->intr_mode],
7631                                 &h->q[h->intr_mode]);
7632                 }
7633                 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
7634         }
7635         if (rc) {
7636                 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7637                        h->intr[h->intr_mode], h->devname);
7638                 hpsa_free_irqs(h);
7639                 return -ENODEV;
7640         }
7641         return 0;
7642 }
7643
7644 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7645 {
7646         int rc;
7647         hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7648
7649         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7650         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
7651         if (rc) {
7652                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7653                 return rc;
7654         }
7655
7656         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7657         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7658         if (rc) {
7659                 dev_warn(&h->pdev->dev, "Board failed to become ready "
7660                         "after soft reset.\n");
7661                 return rc;
7662         }
7663
7664         return 0;
7665 }
7666
7667 static void hpsa_free_reply_queues(struct ctlr_info *h)
7668 {
7669         int i;
7670
7671         for (i = 0; i < h->nreply_queues; i++) {
7672                 if (!h->reply_queue[i].head)
7673                         continue;
7674                 pci_free_consistent(h->pdev,
7675                                         h->reply_queue_size,
7676                                         h->reply_queue[i].head,
7677                                         h->reply_queue[i].busaddr);
7678                 h->reply_queue[i].head = NULL;
7679                 h->reply_queue[i].busaddr = 0;
7680         }
7681         h->reply_queue_size = 0;
7682 }
7683
7684 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7685 {
7686         hpsa_free_performant_mode(h);           /* init_one 7 */
7687         hpsa_free_sg_chain_blocks(h);           /* init_one 6 */
7688         hpsa_free_cmd_pool(h);                  /* init_one 5 */
7689         hpsa_free_irqs(h);                      /* init_one 4 */
7690         scsi_host_put(h->scsi_host);            /* init_one 3 */
7691         h->scsi_host = NULL;                    /* init_one 3 */
7692         hpsa_free_pci_init(h);                  /* init_one 2_5 */
7693         free_percpu(h->lockup_detected);        /* init_one 2 */
7694         h->lockup_detected = NULL;              /* init_one 2 */
7695         if (h->resubmit_wq) {
7696                 destroy_workqueue(h->resubmit_wq);      /* init_one 1 */
7697                 h->resubmit_wq = NULL;
7698         }
7699         if (h->rescan_ctlr_wq) {
7700                 destroy_workqueue(h->rescan_ctlr_wq);
7701                 h->rescan_ctlr_wq = NULL;
7702         }
7703         kfree(h);                               /* init_one 1 */
7704 }
7705
7706 /* Called when controller lockup detected. */
7707 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7708 {
7709         int i, refcount;
7710         struct CommandList *c;
7711         int failcount = 0;
7712
7713         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7714         for (i = 0; i < h->nr_cmds; i++) {
7715                 c = h->cmd_pool + i;
7716                 refcount = atomic_inc_return(&c->refcount);
7717                 if (refcount > 1) {
7718                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7719                         finish_cmd(c);
7720                         atomic_dec(&h->commands_outstanding);
7721                         failcount++;
7722                 }
7723                 cmd_free(h, c);
7724         }
7725         dev_warn(&h->pdev->dev,
7726                 "failed %d commands in fail_all\n", failcount);
7727 }
7728
7729 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7730 {
7731         int cpu;
7732
7733         for_each_online_cpu(cpu) {
7734                 u32 *lockup_detected;
7735                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7736                 *lockup_detected = value;
7737         }
7738         wmb(); /* be sure the per-cpu variables are out to memory */
7739 }
7740
7741 static void controller_lockup_detected(struct ctlr_info *h)
7742 {
7743         unsigned long flags;
7744         u32 lockup_detected;
7745
7746         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7747         spin_lock_irqsave(&h->lock, flags);
7748         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7749         if (!lockup_detected) {
7750                 /* no heartbeat, but controller gave us a zero. */
7751                 dev_warn(&h->pdev->dev,
7752                         "lockup detected after %d but scratchpad register is zero\n",
7753                         h->heartbeat_sample_interval / HZ);
7754                 lockup_detected = 0xffffffff;
7755         }
7756         set_lockup_detected_for_all_cpus(h, lockup_detected);
7757         spin_unlock_irqrestore(&h->lock, flags);
7758         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7759                         lockup_detected, h->heartbeat_sample_interval / HZ);
7760         pci_disable_device(h->pdev);
7761         fail_all_outstanding_cmds(h);
7762 }
7763
7764 static int detect_controller_lockup(struct ctlr_info *h)
7765 {
7766         u64 now;
7767         u32 heartbeat;
7768         unsigned long flags;
7769
7770         now = get_jiffies_64();
7771         /* If we've received an interrupt recently, we're ok. */
7772         if (time_after64(h->last_intr_timestamp +
7773                                 (h->heartbeat_sample_interval), now))
7774                 return false;
7775
7776         /*
7777          * If we've already checked the heartbeat recently, we're ok.
7778          * This could happen if someone sends us a signal. We
7779          * otherwise don't care about signals in this thread.
7780          */
7781         if (time_after64(h->last_heartbeat_timestamp +
7782                                 (h->heartbeat_sample_interval), now))
7783                 return false;
7784
7785         /* If heartbeat has not changed since we last looked, we're not ok. */
7786         spin_lock_irqsave(&h->lock, flags);
7787         heartbeat = readl(&h->cfgtable->HeartBeat);
7788         spin_unlock_irqrestore(&h->lock, flags);
7789         if (h->last_heartbeat == heartbeat) {
7790                 controller_lockup_detected(h);
7791                 return true;
7792         }
7793
7794         /* We're ok. */
7795         h->last_heartbeat = heartbeat;
7796         h->last_heartbeat_timestamp = now;
7797         return false;
7798 }
7799
7800 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7801 {
7802         int i;
7803         char *event_type;
7804
7805         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7806                 return;
7807
7808         /* Ask the controller to clear the events we're handling. */
7809         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7810                         | CFGTBL_Trans_io_accel2)) &&
7811                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7812                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7813
7814                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7815                         event_type = "state change";
7816                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7817                         event_type = "configuration change";
7818                 /* Stop sending new RAID offload reqs via the IO accelerator */
7819                 scsi_block_requests(h->scsi_host);
7820                 for (i = 0; i < h->ndevices; i++)
7821                         h->dev[i]->offload_enabled = 0;
7822                 hpsa_drain_accel_commands(h);
7823                 /* Set 'accelerator path config change' bit */
7824                 dev_warn(&h->pdev->dev,
7825                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7826                         h->events, event_type);
7827                 writel(h->events, &(h->cfgtable->clear_event_notify));
7828                 /* Set the "clear event notify field update" bit 6 */
7829                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7830                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7831                 hpsa_wait_for_clear_event_notify_ack(h);
7832                 scsi_unblock_requests(h->scsi_host);
7833         } else {
7834                 /* Acknowledge controller notification events. */
7835                 writel(h->events, &(h->cfgtable->clear_event_notify));
7836                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7837                 hpsa_wait_for_clear_event_notify_ack(h);
7838 #if 0
7839                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7840                 hpsa_wait_for_mode_change_ack(h);
7841 #endif
7842         }
7843         return;
7844 }
7845
7846 /* Check a register on the controller to see if there are configuration
7847  * changes (added/changed/removed logical drives, etc.) which mean that
7848  * we should rescan the controller for devices.
7849  * Also check flag for driver-initiated rescan.
7850  */
7851 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7852 {
7853         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7854                 return 0;
7855
7856         h->events = readl(&(h->cfgtable->event_notify));
7857         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7858 }
7859
7860 /*
7861  * Check if any of the offline devices have become ready
7862  */
7863 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7864 {
7865         unsigned long flags;
7866         struct offline_device_entry *d;
7867         struct list_head *this, *tmp;
7868
7869         spin_lock_irqsave(&h->offline_device_lock, flags);
7870         list_for_each_safe(this, tmp, &h->offline_device_list) {
7871                 d = list_entry(this, struct offline_device_entry,
7872                                 offline_list);
7873                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7874                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7875                         spin_lock_irqsave(&h->offline_device_lock, flags);
7876                         list_del(&d->offline_list);
7877                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7878                         return 1;
7879                 }
7880                 spin_lock_irqsave(&h->offline_device_lock, flags);
7881         }
7882         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7883         return 0;
7884 }
7885
7886 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7887 {
7888         unsigned long flags;
7889         struct ctlr_info *h = container_of(to_delayed_work(work),
7890                                         struct ctlr_info, rescan_ctlr_work);
7891
7892
7893         if (h->remove_in_progress)
7894                 return;
7895
7896         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7897                 scsi_host_get(h->scsi_host);
7898                 hpsa_ack_ctlr_events(h);
7899                 hpsa_scan_start(h->scsi_host);
7900                 scsi_host_put(h->scsi_host);
7901         }
7902         spin_lock_irqsave(&h->lock, flags);
7903         if (!h->remove_in_progress)
7904                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7905                                 h->heartbeat_sample_interval);
7906         spin_unlock_irqrestore(&h->lock, flags);
7907 }
7908
7909 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7910 {
7911         unsigned long flags;
7912         struct ctlr_info *h = container_of(to_delayed_work(work),
7913                                         struct ctlr_info, monitor_ctlr_work);
7914
7915         detect_controller_lockup(h);
7916         if (lockup_detected(h))
7917                 return;
7918
7919         spin_lock_irqsave(&h->lock, flags);
7920         if (!h->remove_in_progress)
7921                 schedule_delayed_work(&h->monitor_ctlr_work,
7922                                 h->heartbeat_sample_interval);
7923         spin_unlock_irqrestore(&h->lock, flags);
7924 }
7925
7926 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7927                                                 char *name)
7928 {
7929         struct workqueue_struct *wq = NULL;
7930
7931         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7932         if (!wq)
7933                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7934
7935         return wq;
7936 }
7937
7938 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7939 {
7940         int dac, rc;
7941         struct ctlr_info *h;
7942         int try_soft_reset = 0;
7943         unsigned long flags;
7944         u32 board_id;
7945
7946         if (number_of_controllers == 0)
7947                 printk(KERN_INFO DRIVER_NAME "\n");
7948
7949         rc = hpsa_lookup_board_id(pdev, &board_id);
7950         if (rc < 0) {
7951                 dev_warn(&pdev->dev, "Board ID not found\n");
7952                 return rc;
7953         }
7954
7955         rc = hpsa_init_reset_devices(pdev, board_id);
7956         if (rc) {
7957                 if (rc != -ENOTSUPP)
7958                         return rc;
7959                 /* If the reset fails in a particular way (it has no way to do
7960                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
7961                  * a soft reset once we get the controller configured up to the
7962                  * point that it can accept a command.
7963                  */
7964                 try_soft_reset = 1;
7965                 rc = 0;
7966         }
7967
7968 reinit_after_soft_reset:
7969
7970         /* Command structures must be aligned on a 32-byte boundary because
7971          * the 5 lower bits of the address are used by the hardware. and by
7972          * the driver.  See comments in hpsa.h for more info.
7973          */
7974         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
7975         h = kzalloc(sizeof(*h), GFP_KERNEL);
7976         if (!h) {
7977                 dev_err(&pdev->dev, "Failed to allocate controller head\n");
7978                 return -ENOMEM;
7979         }
7980
7981         h->pdev = pdev;
7982
7983         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7984         INIT_LIST_HEAD(&h->offline_device_list);
7985         spin_lock_init(&h->lock);
7986         spin_lock_init(&h->offline_device_lock);
7987         spin_lock_init(&h->scan_lock);
7988         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
7989         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
7990
7991         /* Allocate and clear per-cpu variable lockup_detected */
7992         h->lockup_detected = alloc_percpu(u32);
7993         if (!h->lockup_detected) {
7994                 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
7995                 rc = -ENOMEM;
7996                 goto clean1;    /* aer/h */
7997         }
7998         set_lockup_detected_for_all_cpus(h, 0);
7999
8000         rc = hpsa_pci_init(h);
8001         if (rc)
8002                 goto clean2;    /* lu, aer/h */
8003
8004         /* relies on h-> settings made by hpsa_pci_init, including
8005          * interrupt_mode h->intr */
8006         rc = hpsa_scsi_host_alloc(h);
8007         if (rc)
8008                 goto clean2_5;  /* pci, lu, aer/h */
8009
8010         sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8011         h->ctlr = number_of_controllers;
8012         number_of_controllers++;
8013
8014         /* configure PCI DMA stuff */
8015         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8016         if (rc == 0) {
8017                 dac = 1;
8018         } else {
8019                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8020                 if (rc == 0) {
8021                         dac = 0;
8022                 } else {
8023                         dev_err(&pdev->dev, "no suitable DMA available\n");
8024                         goto clean3;    /* shost, pci, lu, aer/h */
8025                 }
8026         }
8027
8028         /* make sure the board interrupts are off */
8029         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8030
8031         rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8032         if (rc)
8033                 goto clean3;    /* shost, pci, lu, aer/h */
8034         rc = hpsa_alloc_cmd_pool(h);
8035         if (rc)
8036                 goto clean4;    /* irq, shost, pci, lu, aer/h */
8037         rc = hpsa_alloc_sg_chain_blocks(h);
8038         if (rc)
8039                 goto clean5;    /* cmd, irq, shost, pci, lu, aer/h */
8040         init_waitqueue_head(&h->scan_wait_queue);
8041         init_waitqueue_head(&h->abort_cmd_wait_queue);
8042         init_waitqueue_head(&h->event_sync_wait_queue);
8043         mutex_init(&h->reset_mutex);
8044         h->scan_finished = 1; /* no scan currently in progress */
8045
8046         pci_set_drvdata(pdev, h);
8047         h->ndevices = 0;
8048
8049         spin_lock_init(&h->devlock);
8050         rc = hpsa_put_ctlr_into_performant_mode(h);
8051         if (rc)
8052                 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8053
8054         /* hook into SCSI subsystem */
8055         rc = hpsa_scsi_add_host(h);
8056         if (rc)
8057                 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8058
8059         /* create the resubmit workqueue */
8060         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8061         if (!h->rescan_ctlr_wq) {
8062                 rc = -ENOMEM;
8063                 goto clean7;
8064         }
8065
8066         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8067         if (!h->resubmit_wq) {
8068                 rc = -ENOMEM;
8069                 goto clean7;    /* aer/h */
8070         }
8071
8072         /*
8073          * At this point, the controller is ready to take commands.
8074          * Now, if reset_devices and the hard reset didn't work, try
8075          * the soft reset and see if that works.
8076          */
8077         if (try_soft_reset) {
8078
8079                 /* This is kind of gross.  We may or may not get a completion
8080                  * from the soft reset command, and if we do, then the value
8081                  * from the fifo may or may not be valid.  So, we wait 10 secs
8082                  * after the reset throwing away any completions we get during
8083                  * that time.  Unregister the interrupt handler and register
8084                  * fake ones to scoop up any residual completions.
8085                  */
8086                 spin_lock_irqsave(&h->lock, flags);
8087                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8088                 spin_unlock_irqrestore(&h->lock, flags);
8089                 hpsa_free_irqs(h);
8090                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8091                                         hpsa_intx_discard_completions);
8092                 if (rc) {
8093                         dev_warn(&h->pdev->dev,
8094                                 "Failed to request_irq after soft reset.\n");
8095                         /*
8096                          * cannot goto clean7 or free_irqs will be called
8097                          * again. Instead, do its work
8098                          */
8099                         hpsa_free_performant_mode(h);   /* clean7 */
8100                         hpsa_free_sg_chain_blocks(h);   /* clean6 */
8101                         hpsa_free_cmd_pool(h);          /* clean5 */
8102                         /*
8103                          * skip hpsa_free_irqs(h) clean4 since that
8104                          * was just called before request_irqs failed
8105                          */
8106                         goto clean3;
8107                 }
8108
8109                 rc = hpsa_kdump_soft_reset(h);
8110                 if (rc)
8111                         /* Neither hard nor soft reset worked, we're hosed. */
8112                         goto clean7;
8113
8114                 dev_info(&h->pdev->dev, "Board READY.\n");
8115                 dev_info(&h->pdev->dev,
8116                         "Waiting for stale completions to drain.\n");
8117                 h->access.set_intr_mask(h, HPSA_INTR_ON);
8118                 msleep(10000);
8119                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8120
8121                 rc = controller_reset_failed(h->cfgtable);
8122                 if (rc)
8123                         dev_info(&h->pdev->dev,
8124                                 "Soft reset appears to have failed.\n");
8125
8126                 /* since the controller's reset, we have to go back and re-init
8127                  * everything.  Easiest to just forget what we've done and do it
8128                  * all over again.
8129                  */
8130                 hpsa_undo_allocations_after_kdump_soft_reset(h);
8131                 try_soft_reset = 0;
8132                 if (rc)
8133                         /* don't goto clean, we already unallocated */
8134                         return -ENODEV;
8135
8136                 goto reinit_after_soft_reset;
8137         }
8138
8139         /* Enable Accelerated IO path at driver layer */
8140         h->acciopath_status = 1;
8141
8142
8143         /* Turn the interrupts on so we can service requests */
8144         h->access.set_intr_mask(h, HPSA_INTR_ON);
8145
8146         hpsa_hba_inquiry(h);
8147
8148         /* Monitor the controller for firmware lockups */
8149         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8150         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8151         schedule_delayed_work(&h->monitor_ctlr_work,
8152                                 h->heartbeat_sample_interval);
8153         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8154         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8155                                 h->heartbeat_sample_interval);
8156         return 0;
8157
8158 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8159         hpsa_free_performant_mode(h);
8160         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8161 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8162         hpsa_free_sg_chain_blocks(h);
8163 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8164         hpsa_free_cmd_pool(h);
8165 clean4: /* irq, shost, pci, lu, aer/h */
8166         hpsa_free_irqs(h);
8167 clean3: /* shost, pci, lu, aer/h */
8168         scsi_host_put(h->scsi_host);
8169         h->scsi_host = NULL;
8170 clean2_5: /* pci, lu, aer/h */
8171         hpsa_free_pci_init(h);
8172 clean2: /* lu, aer/h */
8173         if (h->lockup_detected) {
8174                 free_percpu(h->lockup_detected);
8175                 h->lockup_detected = NULL;
8176         }
8177 clean1: /* wq/aer/h */
8178         if (h->resubmit_wq) {
8179                 destroy_workqueue(h->resubmit_wq);
8180                 h->resubmit_wq = NULL;
8181         }
8182         if (h->rescan_ctlr_wq) {
8183                 destroy_workqueue(h->rescan_ctlr_wq);
8184                 h->rescan_ctlr_wq = NULL;
8185         }
8186         kfree(h);
8187         return rc;
8188 }
8189
8190 static void hpsa_flush_cache(struct ctlr_info *h)
8191 {
8192         char *flush_buf;
8193         struct CommandList *c;
8194         int rc;
8195
8196         if (unlikely(lockup_detected(h)))
8197                 return;
8198         flush_buf = kzalloc(4, GFP_KERNEL);
8199         if (!flush_buf)
8200                 return;
8201
8202         c = cmd_alloc(h);
8203
8204         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8205                 RAID_CTLR_LUNID, TYPE_CMD)) {
8206                 goto out;
8207         }
8208         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8209                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
8210         if (rc)
8211                 goto out;
8212         if (c->err_info->CommandStatus != 0)
8213 out:
8214                 dev_warn(&h->pdev->dev,
8215                         "error flushing cache on controller\n");
8216         cmd_free(h, c);
8217         kfree(flush_buf);
8218 }
8219
8220 static void hpsa_shutdown(struct pci_dev *pdev)
8221 {
8222         struct ctlr_info *h;
8223
8224         h = pci_get_drvdata(pdev);
8225         /* Turn board interrupts off  and send the flush cache command
8226          * sendcmd will turn off interrupt, and send the flush...
8227          * To write all data in the battery backed cache to disks
8228          */
8229         hpsa_flush_cache(h);
8230         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8231         hpsa_free_irqs(h);                      /* init_one 4 */
8232         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
8233 }
8234
8235 static void hpsa_free_device_info(struct ctlr_info *h)
8236 {
8237         int i;
8238
8239         for (i = 0; i < h->ndevices; i++) {
8240                 kfree(h->dev[i]);
8241                 h->dev[i] = NULL;
8242         }
8243 }
8244
8245 static void hpsa_remove_one(struct pci_dev *pdev)
8246 {
8247         struct ctlr_info *h;
8248         unsigned long flags;
8249
8250         if (pci_get_drvdata(pdev) == NULL) {
8251                 dev_err(&pdev->dev, "unable to remove device\n");
8252                 return;
8253         }
8254         h = pci_get_drvdata(pdev);
8255
8256         /* Get rid of any controller monitoring work items */
8257         spin_lock_irqsave(&h->lock, flags);
8258         h->remove_in_progress = 1;
8259         spin_unlock_irqrestore(&h->lock, flags);
8260         cancel_delayed_work_sync(&h->monitor_ctlr_work);
8261         cancel_delayed_work_sync(&h->rescan_ctlr_work);
8262         destroy_workqueue(h->rescan_ctlr_wq);
8263         destroy_workqueue(h->resubmit_wq);
8264
8265         /*
8266          * Call before disabling interrupts.
8267          * scsi_remove_host can trigger I/O operations especially
8268          * when multipath is enabled. There can be SYNCHRONIZE CACHE
8269          * operations which cannot complete and will hang the system.
8270          */
8271         if (h->scsi_host)
8272                 scsi_remove_host(h->scsi_host);         /* init_one 8 */
8273         /* includes hpsa_free_irqs - init_one 4 */
8274         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8275         hpsa_shutdown(pdev);
8276
8277         hpsa_free_device_info(h);               /* scan */
8278
8279         kfree(h->hba_inquiry_data);                     /* init_one 10 */
8280         h->hba_inquiry_data = NULL;                     /* init_one 10 */
8281         hpsa_free_ioaccel2_sg_chain_blocks(h);
8282         hpsa_free_performant_mode(h);                   /* init_one 7 */
8283         hpsa_free_sg_chain_blocks(h);                   /* init_one 6 */
8284         hpsa_free_cmd_pool(h);                          /* init_one 5 */
8285
8286         /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8287
8288         scsi_host_put(h->scsi_host);                    /* init_one 3 */
8289         h->scsi_host = NULL;                            /* init_one 3 */
8290
8291         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8292         hpsa_free_pci_init(h);                          /* init_one 2.5 */
8293
8294         free_percpu(h->lockup_detected);                /* init_one 2 */
8295         h->lockup_detected = NULL;                      /* init_one 2 */
8296         /* (void) pci_disable_pcie_error_reporting(pdev); */    /* init_one 1 */
8297         kfree(h);                                       /* init_one 1 */
8298 }
8299
8300 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8301         __attribute__((unused)) pm_message_t state)
8302 {
8303         return -ENOSYS;
8304 }
8305
8306 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8307 {
8308         return -ENOSYS;
8309 }
8310
8311 static struct pci_driver hpsa_pci_driver = {
8312         .name = HPSA,
8313         .probe = hpsa_init_one,
8314         .remove = hpsa_remove_one,
8315         .id_table = hpsa_pci_device_id, /* id_table */
8316         .shutdown = hpsa_shutdown,
8317         .suspend = hpsa_suspend,
8318         .resume = hpsa_resume,
8319 };
8320
8321 /* Fill in bucket_map[], given nsgs (the max number of
8322  * scatter gather elements supported) and bucket[],
8323  * which is an array of 8 integers.  The bucket[] array
8324  * contains 8 different DMA transfer sizes (in 16
8325  * byte increments) which the controller uses to fetch
8326  * commands.  This function fills in bucket_map[], which
8327  * maps a given number of scatter gather elements to one of
8328  * the 8 DMA transfer sizes.  The point of it is to allow the
8329  * controller to only do as much DMA as needed to fetch the
8330  * command, with the DMA transfer size encoded in the lower
8331  * bits of the command address.
8332  */
8333 static void  calc_bucket_map(int bucket[], int num_buckets,
8334         int nsgs, int min_blocks, u32 *bucket_map)
8335 {
8336         int i, j, b, size;
8337
8338         /* Note, bucket_map must have nsgs+1 entries. */
8339         for (i = 0; i <= nsgs; i++) {
8340                 /* Compute size of a command with i SG entries */
8341                 size = i + min_blocks;
8342                 b = num_buckets; /* Assume the biggest bucket */
8343                 /* Find the bucket that is just big enough */
8344                 for (j = 0; j < num_buckets; j++) {
8345                         if (bucket[j] >= size) {
8346                                 b = j;
8347                                 break;
8348                         }
8349                 }
8350                 /* for a command with i SG entries, use bucket b. */
8351                 bucket_map[i] = b;
8352         }
8353 }
8354
8355 /*
8356  * return -ENODEV on err, 0 on success (or no action)
8357  * allocates numerous items that must be freed later
8358  */
8359 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8360 {
8361         int i;
8362         unsigned long register_value;
8363         unsigned long transMethod = CFGTBL_Trans_Performant |
8364                         (trans_support & CFGTBL_Trans_use_short_tags) |
8365                                 CFGTBL_Trans_enable_directed_msix |
8366                         (trans_support & (CFGTBL_Trans_io_accel1 |
8367                                 CFGTBL_Trans_io_accel2));
8368         struct access_method access = SA5_performant_access;
8369
8370         /* This is a bit complicated.  There are 8 registers on
8371          * the controller which we write to to tell it 8 different
8372          * sizes of commands which there may be.  It's a way of
8373          * reducing the DMA done to fetch each command.  Encoded into
8374          * each command's tag are 3 bits which communicate to the controller
8375          * which of the eight sizes that command fits within.  The size of
8376          * each command depends on how many scatter gather entries there are.
8377          * Each SG entry requires 16 bytes.  The eight registers are programmed
8378          * with the number of 16-byte blocks a command of that size requires.
8379          * The smallest command possible requires 5 such 16 byte blocks.
8380          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8381          * blocks.  Note, this only extends to the SG entries contained
8382          * within the command block, and does not extend to chained blocks
8383          * of SG elements.   bft[] contains the eight values we write to
8384          * the registers.  They are not evenly distributed, but have more
8385          * sizes for small commands, and fewer sizes for larger commands.
8386          */
8387         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8388 #define MIN_IOACCEL2_BFT_ENTRY 5
8389 #define HPSA_IOACCEL2_HEADER_SZ 4
8390         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8391                         13, 14, 15, 16, 17, 18, 19,
8392                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8393         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8394         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8395         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8396                                  16 * MIN_IOACCEL2_BFT_ENTRY);
8397         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8398         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8399         /*  5 = 1 s/g entry or 4k
8400          *  6 = 2 s/g entry or 8k
8401          *  8 = 4 s/g entry or 16k
8402          * 10 = 6 s/g entry or 24k
8403          */
8404
8405         /* If the controller supports either ioaccel method then
8406          * we can also use the RAID stack submit path that does not
8407          * perform the superfluous readl() after each command submission.
8408          */
8409         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8410                 access = SA5_performant_access_no_read;
8411
8412         /* Controller spec: zero out this buffer. */
8413         for (i = 0; i < h->nreply_queues; i++)
8414                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8415
8416         bft[7] = SG_ENTRIES_IN_CMD + 4;
8417         calc_bucket_map(bft, ARRAY_SIZE(bft),
8418                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8419         for (i = 0; i < 8; i++)
8420                 writel(bft[i], &h->transtable->BlockFetch[i]);
8421
8422         /* size of controller ring buffer */
8423         writel(h->max_commands, &h->transtable->RepQSize);
8424         writel(h->nreply_queues, &h->transtable->RepQCount);
8425         writel(0, &h->transtable->RepQCtrAddrLow32);
8426         writel(0, &h->transtable->RepQCtrAddrHigh32);
8427
8428         for (i = 0; i < h->nreply_queues; i++) {
8429                 writel(0, &h->transtable->RepQAddr[i].upper);
8430                 writel(h->reply_queue[i].busaddr,
8431                         &h->transtable->RepQAddr[i].lower);
8432         }
8433
8434         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8435         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8436         /*
8437          * enable outbound interrupt coalescing in accelerator mode;
8438          */
8439         if (trans_support & CFGTBL_Trans_io_accel1) {
8440                 access = SA5_ioaccel_mode1_access;
8441                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8442                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8443         } else {
8444                 if (trans_support & CFGTBL_Trans_io_accel2) {
8445                         access = SA5_ioaccel_mode2_access;
8446                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8447                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8448                 }
8449         }
8450         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8451         if (hpsa_wait_for_mode_change_ack(h)) {
8452                 dev_err(&h->pdev->dev,
8453                         "performant mode problem - doorbell timeout\n");
8454                 return -ENODEV;
8455         }
8456         register_value = readl(&(h->cfgtable->TransportActive));
8457         if (!(register_value & CFGTBL_Trans_Performant)) {
8458                 dev_err(&h->pdev->dev,
8459                         "performant mode problem - transport not active\n");
8460                 return -ENODEV;
8461         }
8462         /* Change the access methods to the performant access methods */
8463         h->access = access;
8464         h->transMethod = transMethod;
8465
8466         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8467                 (trans_support & CFGTBL_Trans_io_accel2)))
8468                 return 0;
8469
8470         if (trans_support & CFGTBL_Trans_io_accel1) {
8471                 /* Set up I/O accelerator mode */
8472                 for (i = 0; i < h->nreply_queues; i++) {
8473                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8474                         h->reply_queue[i].current_entry =
8475                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8476                 }
8477                 bft[7] = h->ioaccel_maxsg + 8;
8478                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8479                                 h->ioaccel1_blockFetchTable);
8480
8481                 /* initialize all reply queue entries to unused */
8482                 for (i = 0; i < h->nreply_queues; i++)
8483                         memset(h->reply_queue[i].head,
8484                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8485                                 h->reply_queue_size);
8486
8487                 /* set all the constant fields in the accelerator command
8488                  * frames once at init time to save CPU cycles later.
8489                  */
8490                 for (i = 0; i < h->nr_cmds; i++) {
8491                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8492
8493                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
8494                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
8495                                         (i * sizeof(struct ErrorInfo)));
8496                         cp->err_info_len = sizeof(struct ErrorInfo);
8497                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
8498                         cp->host_context_flags =
8499                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8500                         cp->timeout_sec = 0;
8501                         cp->ReplyQueue = 0;
8502                         cp->tag =
8503                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8504                         cp->host_addr =
8505                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8506                                         (i * sizeof(struct io_accel1_cmd)));
8507                 }
8508         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8509                 u64 cfg_offset, cfg_base_addr_index;
8510                 u32 bft2_offset, cfg_base_addr;
8511                 int rc;
8512
8513                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8514                         &cfg_base_addr_index, &cfg_offset);
8515                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8516                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8517                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8518                                 4, h->ioaccel2_blockFetchTable);
8519                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
8520                 BUILD_BUG_ON(offsetof(struct CfgTable,
8521                                 io_accel_request_size_offset) != 0xb8);
8522                 h->ioaccel2_bft2_regs =
8523                         remap_pci_mem(pci_resource_start(h->pdev,
8524                                         cfg_base_addr_index) +
8525                                         cfg_offset + bft2_offset,
8526                                         ARRAY_SIZE(bft2) *
8527                                         sizeof(*h->ioaccel2_bft2_regs));
8528                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
8529                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
8530         }
8531         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8532         if (hpsa_wait_for_mode_change_ack(h)) {
8533                 dev_err(&h->pdev->dev,
8534                         "performant mode problem - enabling ioaccel mode\n");
8535                 return -ENODEV;
8536         }
8537         return 0;
8538 }
8539
8540 /* Free ioaccel1 mode command blocks and block fetch table */
8541 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8542 {
8543         if (h->ioaccel_cmd_pool) {
8544                 pci_free_consistent(h->pdev,
8545                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8546                         h->ioaccel_cmd_pool,
8547                         h->ioaccel_cmd_pool_dhandle);
8548                 h->ioaccel_cmd_pool = NULL;
8549                 h->ioaccel_cmd_pool_dhandle = 0;
8550         }
8551         kfree(h->ioaccel1_blockFetchTable);
8552         h->ioaccel1_blockFetchTable = NULL;
8553 }
8554
8555 /* Allocate ioaccel1 mode command blocks and block fetch table */
8556 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8557 {
8558         h->ioaccel_maxsg =
8559                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8560         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
8561                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
8562
8563         /* Command structures must be aligned on a 128-byte boundary
8564          * because the 7 lower bits of the address are used by the
8565          * hardware.
8566          */
8567         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
8568                         IOACCEL1_COMMANDLIST_ALIGNMENT);
8569         h->ioaccel_cmd_pool =
8570                 pci_alloc_consistent(h->pdev,
8571                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8572                         &(h->ioaccel_cmd_pool_dhandle));
8573
8574         h->ioaccel1_blockFetchTable =
8575                 kmalloc(((h->ioaccel_maxsg + 1) *
8576                                 sizeof(u32)), GFP_KERNEL);
8577
8578         if ((h->ioaccel_cmd_pool == NULL) ||
8579                 (h->ioaccel1_blockFetchTable == NULL))
8580                 goto clean_up;
8581
8582         memset(h->ioaccel_cmd_pool, 0,
8583                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
8584         return 0;
8585
8586 clean_up:
8587         hpsa_free_ioaccel1_cmd_and_bft(h);
8588         return -ENOMEM;
8589 }
8590
8591 /* Free ioaccel2 mode command blocks and block fetch table */
8592 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8593 {
8594         hpsa_free_ioaccel2_sg_chain_blocks(h);
8595
8596         if (h->ioaccel2_cmd_pool) {
8597                 pci_free_consistent(h->pdev,
8598                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8599                         h->ioaccel2_cmd_pool,
8600                         h->ioaccel2_cmd_pool_dhandle);
8601                 h->ioaccel2_cmd_pool = NULL;
8602                 h->ioaccel2_cmd_pool_dhandle = 0;
8603         }
8604         kfree(h->ioaccel2_blockFetchTable);
8605         h->ioaccel2_blockFetchTable = NULL;
8606 }
8607
8608 /* Allocate ioaccel2 mode command blocks and block fetch table */
8609 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8610 {
8611         int rc;
8612
8613         /* Allocate ioaccel2 mode command blocks and block fetch table */
8614
8615         h->ioaccel_maxsg =
8616                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8617         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
8618                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
8619
8620         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
8621                         IOACCEL2_COMMANDLIST_ALIGNMENT);
8622         h->ioaccel2_cmd_pool =
8623                 pci_alloc_consistent(h->pdev,
8624                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8625                         &(h->ioaccel2_cmd_pool_dhandle));
8626
8627         h->ioaccel2_blockFetchTable =
8628                 kmalloc(((h->ioaccel_maxsg + 1) *
8629                                 sizeof(u32)), GFP_KERNEL);
8630
8631         if ((h->ioaccel2_cmd_pool == NULL) ||
8632                 (h->ioaccel2_blockFetchTable == NULL)) {
8633                 rc = -ENOMEM;
8634                 goto clean_up;
8635         }
8636
8637         rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
8638         if (rc)
8639                 goto clean_up;
8640
8641         memset(h->ioaccel2_cmd_pool, 0,
8642                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
8643         return 0;
8644
8645 clean_up:
8646         hpsa_free_ioaccel2_cmd_and_bft(h);
8647         return rc;
8648 }
8649
8650 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
8651 static void hpsa_free_performant_mode(struct ctlr_info *h)
8652 {
8653         kfree(h->blockFetchTable);
8654         h->blockFetchTable = NULL;
8655         hpsa_free_reply_queues(h);
8656         hpsa_free_ioaccel1_cmd_and_bft(h);
8657         hpsa_free_ioaccel2_cmd_and_bft(h);
8658 }
8659
8660 /* return -ENODEV on error, 0 on success (or no action)
8661  * allocates numerous items that must be freed later
8662  */
8663 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
8664 {
8665         u32 trans_support;
8666         unsigned long transMethod = CFGTBL_Trans_Performant |
8667                                         CFGTBL_Trans_use_short_tags;
8668         int i, rc;
8669
8670         if (hpsa_simple_mode)
8671                 return 0;
8672
8673         trans_support = readl(&(h->cfgtable->TransportSupport));
8674         if (!(trans_support & PERFORMANT_MODE))
8675                 return 0;
8676
8677         /* Check for I/O accelerator mode support */
8678         if (trans_support & CFGTBL_Trans_io_accel1) {
8679                 transMethod |= CFGTBL_Trans_io_accel1 |
8680                                 CFGTBL_Trans_enable_directed_msix;
8681                 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
8682                 if (rc)
8683                         return rc;
8684         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8685                 transMethod |= CFGTBL_Trans_io_accel2 |
8686                                 CFGTBL_Trans_enable_directed_msix;
8687                 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
8688                 if (rc)
8689                         return rc;
8690         }
8691
8692         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
8693         hpsa_get_max_perf_mode_cmds(h);
8694         /* Performant mode ring buffer and supporting data structures */
8695         h->reply_queue_size = h->max_commands * sizeof(u64);
8696
8697         for (i = 0; i < h->nreply_queues; i++) {
8698                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
8699                                                 h->reply_queue_size,
8700                                                 &(h->reply_queue[i].busaddr));
8701                 if (!h->reply_queue[i].head) {
8702                         rc = -ENOMEM;
8703                         goto clean1;    /* rq, ioaccel */
8704                 }
8705                 h->reply_queue[i].size = h->max_commands;
8706                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
8707                 h->reply_queue[i].current_entry = 0;
8708         }
8709
8710         /* Need a block fetch table for performant mode */
8711         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
8712                                 sizeof(u32)), GFP_KERNEL);
8713         if (!h->blockFetchTable) {
8714                 rc = -ENOMEM;
8715                 goto clean1;    /* rq, ioaccel */
8716         }
8717
8718         rc = hpsa_enter_performant_mode(h, trans_support);
8719         if (rc)
8720                 goto clean2;    /* bft, rq, ioaccel */
8721         return 0;
8722
8723 clean2: /* bft, rq, ioaccel */
8724         kfree(h->blockFetchTable);
8725         h->blockFetchTable = NULL;
8726 clean1: /* rq, ioaccel */
8727         hpsa_free_reply_queues(h);
8728         hpsa_free_ioaccel1_cmd_and_bft(h);
8729         hpsa_free_ioaccel2_cmd_and_bft(h);
8730         return rc;
8731 }
8732
8733 static int is_accelerated_cmd(struct CommandList *c)
8734 {
8735         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
8736 }
8737
8738 static void hpsa_drain_accel_commands(struct ctlr_info *h)
8739 {
8740         struct CommandList *c = NULL;
8741         int i, accel_cmds_out;
8742         int refcount;
8743
8744         do { /* wait for all outstanding ioaccel commands to drain out */
8745                 accel_cmds_out = 0;
8746                 for (i = 0; i < h->nr_cmds; i++) {
8747                         c = h->cmd_pool + i;
8748                         refcount = atomic_inc_return(&c->refcount);
8749                         if (refcount > 1) /* Command is allocated */
8750                                 accel_cmds_out += is_accelerated_cmd(c);
8751                         cmd_free(h, c);
8752                 }
8753                 if (accel_cmds_out <= 0)
8754                         break;
8755                 msleep(100);
8756         } while (1);
8757 }
8758
8759 /*
8760  *  This is it.  Register the PCI driver information for the cards we control
8761  *  the OS will call our registered routines when it finds one of our cards.
8762  */
8763 static int __init hpsa_init(void)
8764 {
8765         return pci_register_driver(&hpsa_pci_driver);
8766 }
8767
8768 static void __exit hpsa_cleanup(void)
8769 {
8770         pci_unregister_driver(&hpsa_pci_driver);
8771 }
8772
8773 static void __attribute__((unused)) verify_offsets(void)
8774 {
8775 #define VERIFY_OFFSET(member, offset) \
8776         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
8777
8778         VERIFY_OFFSET(structure_size, 0);
8779         VERIFY_OFFSET(volume_blk_size, 4);
8780         VERIFY_OFFSET(volume_blk_cnt, 8);
8781         VERIFY_OFFSET(phys_blk_shift, 16);
8782         VERIFY_OFFSET(parity_rotation_shift, 17);
8783         VERIFY_OFFSET(strip_size, 18);
8784         VERIFY_OFFSET(disk_starting_blk, 20);
8785         VERIFY_OFFSET(disk_blk_cnt, 28);
8786         VERIFY_OFFSET(data_disks_per_row, 36);
8787         VERIFY_OFFSET(metadata_disks_per_row, 38);
8788         VERIFY_OFFSET(row_cnt, 40);
8789         VERIFY_OFFSET(layout_map_count, 42);
8790         VERIFY_OFFSET(flags, 44);
8791         VERIFY_OFFSET(dekindex, 46);
8792         /* VERIFY_OFFSET(reserved, 48 */
8793         VERIFY_OFFSET(data, 64);
8794
8795 #undef VERIFY_OFFSET
8796
8797 #define VERIFY_OFFSET(member, offset) \
8798         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
8799
8800         VERIFY_OFFSET(IU_type, 0);
8801         VERIFY_OFFSET(direction, 1);
8802         VERIFY_OFFSET(reply_queue, 2);
8803         /* VERIFY_OFFSET(reserved1, 3);  */
8804         VERIFY_OFFSET(scsi_nexus, 4);
8805         VERIFY_OFFSET(Tag, 8);
8806         VERIFY_OFFSET(cdb, 16);
8807         VERIFY_OFFSET(cciss_lun, 32);
8808         VERIFY_OFFSET(data_len, 40);
8809         VERIFY_OFFSET(cmd_priority_task_attr, 44);
8810         VERIFY_OFFSET(sg_count, 45);
8811         /* VERIFY_OFFSET(reserved3 */
8812         VERIFY_OFFSET(err_ptr, 48);
8813         VERIFY_OFFSET(err_len, 56);
8814         /* VERIFY_OFFSET(reserved4  */
8815         VERIFY_OFFSET(sg, 64);
8816
8817 #undef VERIFY_OFFSET
8818
8819 #define VERIFY_OFFSET(member, offset) \
8820         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8821
8822         VERIFY_OFFSET(dev_handle, 0x00);
8823         VERIFY_OFFSET(reserved1, 0x02);
8824         VERIFY_OFFSET(function, 0x03);
8825         VERIFY_OFFSET(reserved2, 0x04);
8826         VERIFY_OFFSET(err_info, 0x0C);
8827         VERIFY_OFFSET(reserved3, 0x10);
8828         VERIFY_OFFSET(err_info_len, 0x12);
8829         VERIFY_OFFSET(reserved4, 0x13);
8830         VERIFY_OFFSET(sgl_offset, 0x14);
8831         VERIFY_OFFSET(reserved5, 0x15);
8832         VERIFY_OFFSET(transfer_len, 0x1C);
8833         VERIFY_OFFSET(reserved6, 0x20);
8834         VERIFY_OFFSET(io_flags, 0x24);
8835         VERIFY_OFFSET(reserved7, 0x26);
8836         VERIFY_OFFSET(LUN, 0x34);
8837         VERIFY_OFFSET(control, 0x3C);
8838         VERIFY_OFFSET(CDB, 0x40);
8839         VERIFY_OFFSET(reserved8, 0x50);
8840         VERIFY_OFFSET(host_context_flags, 0x60);
8841         VERIFY_OFFSET(timeout_sec, 0x62);
8842         VERIFY_OFFSET(ReplyQueue, 0x64);
8843         VERIFY_OFFSET(reserved9, 0x65);
8844         VERIFY_OFFSET(tag, 0x68);
8845         VERIFY_OFFSET(host_addr, 0x70);
8846         VERIFY_OFFSET(CISS_LUN, 0x78);
8847         VERIFY_OFFSET(SG, 0x78 + 8);
8848 #undef VERIFY_OFFSET
8849 }
8850
8851 module_init(hpsa_init);
8852 module_exit(hpsa_cleanup);