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1 /*
2  *    Disk Array driver for HP Smart Array SAS controllers
3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
4  *
5  *    This program is free software; you can redistribute it and/or modify
6  *    it under the terms of the GNU General Public License as published by
7  *    the Free Software Foundation; version 2 of the License.
8  *
9  *    This program is distributed in the hope that it will be useful,
10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
13  *
14  *    You should have received a copy of the GNU General Public License
15  *    along with this program; if not, write to the Free Software
16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  *
18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
19  *
20  */
21
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/pci-aspm.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fs.h>
31 #include <linux/timer.h>
32 #include <linux/init.h>
33 #include <linux/spinlock.h>
34 #include <linux/compat.h>
35 #include <linux/blktrace_api.h>
36 #include <linux/uaccess.h>
37 #include <linux/io.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/completion.h>
40 #include <linux/moduleparam.h>
41 #include <scsi/scsi.h>
42 #include <scsi/scsi_cmnd.h>
43 #include <scsi/scsi_device.h>
44 #include <scsi/scsi_host.h>
45 #include <scsi/scsi_tcq.h>
46 #include <linux/cciss_ioctl.h>
47 #include <linux/string.h>
48 #include <linux/bitmap.h>
49 #include <linux/atomic.h>
50 #include <linux/jiffies.h>
51 #include <linux/percpu.h>
52 #include <asm/div64.h>
53 #include "hpsa_cmd.h"
54 #include "hpsa.h"
55
56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
57 #define HPSA_DRIVER_VERSION "3.4.4-1"
58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
59 #define HPSA "hpsa"
60
61 /* How long to wait (in milliseconds) for board to go into simple mode */
62 #define MAX_CONFIG_WAIT 30000
63 #define MAX_IOCTL_CONFIG_WAIT 1000
64
65 /*define how many times we will try a command because of bus resets */
66 #define MAX_CMD_RETRIES 3
67
68 /* Embedded module documentation macros - see modules.h */
69 MODULE_AUTHOR("Hewlett-Packard Company");
70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71         HPSA_DRIVER_VERSION);
72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73 MODULE_VERSION(HPSA_DRIVER_VERSION);
74 MODULE_LICENSE("GPL");
75
76 static int hpsa_allow_any;
77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78 MODULE_PARM_DESC(hpsa_allow_any,
79                 "Allow hpsa driver to access unknown HP Smart Array hardware");
80 static int hpsa_simple_mode;
81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82 MODULE_PARM_DESC(hpsa_simple_mode,
83         "Use 'simple mode' rather than 'performant mode'");
84
85 /* define the PCI info for the cards we can control */
86 static const struct pci_device_id hpsa_pci_device_id[] = {
87         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
88         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
89         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
90         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1925},
107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
128         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
129         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
130         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
131         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
132         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
133         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
134                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
135         {0,}
136 };
137
138 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
139
140 /*  board_id = Subsystem Device ID & Vendor ID
141  *  product = Marketing Name for the board
142  *  access = Address of the struct of function pointers
143  */
144 static struct board_type products[] = {
145         {0x3241103C, "Smart Array P212", &SA5_access},
146         {0x3243103C, "Smart Array P410", &SA5_access},
147         {0x3245103C, "Smart Array P410i", &SA5_access},
148         {0x3247103C, "Smart Array P411", &SA5_access},
149         {0x3249103C, "Smart Array P812", &SA5_access},
150         {0x324A103C, "Smart Array P712m", &SA5_access},
151         {0x324B103C, "Smart Array P711m", &SA5_access},
152         {0x3350103C, "Smart Array P222", &SA5_access},
153         {0x3351103C, "Smart Array P420", &SA5_access},
154         {0x3352103C, "Smart Array P421", &SA5_access},
155         {0x3353103C, "Smart Array P822", &SA5_access},
156         {0x3354103C, "Smart Array P420i", &SA5_access},
157         {0x3355103C, "Smart Array P220i", &SA5_access},
158         {0x3356103C, "Smart Array P721m", &SA5_access},
159         {0x1921103C, "Smart Array P830i", &SA5_access},
160         {0x1922103C, "Smart Array P430", &SA5_access},
161         {0x1923103C, "Smart Array P431", &SA5_access},
162         {0x1924103C, "Smart Array P830", &SA5_access},
163         {0x1926103C, "Smart Array P731m", &SA5_access},
164         {0x1928103C, "Smart Array P230i", &SA5_access},
165         {0x1929103C, "Smart Array P530", &SA5_access},
166         {0x21BD103C, "Smart Array", &SA5_access},
167         {0x21BE103C, "Smart Array", &SA5_access},
168         {0x21BF103C, "Smart Array", &SA5_access},
169         {0x21C0103C, "Smart Array", &SA5_access},
170         {0x21C1103C, "Smart Array", &SA5_access},
171         {0x21C2103C, "Smart Array", &SA5_access},
172         {0x21C3103C, "Smart Array", &SA5_access},
173         {0x21C4103C, "Smart Array", &SA5_access},
174         {0x21C5103C, "Smart Array", &SA5_access},
175         {0x21C6103C, "Smart Array", &SA5_access},
176         {0x21C7103C, "Smart Array", &SA5_access},
177         {0x21C8103C, "Smart Array", &SA5_access},
178         {0x21C9103C, "Smart Array", &SA5_access},
179         {0x21CA103C, "Smart Array", &SA5_access},
180         {0x21CB103C, "Smart Array", &SA5_access},
181         {0x21CC103C, "Smart Array", &SA5_access},
182         {0x21CD103C, "Smart Array", &SA5_access},
183         {0x21CE103C, "Smart Array", &SA5_access},
184         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
185         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
186         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
187         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
188         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
189         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
190 };
191
192 static int number_of_controllers;
193
194 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
195 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
196 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
197 static void lock_and_start_io(struct ctlr_info *h);
198 static void start_io(struct ctlr_info *h, unsigned long *flags);
199
200 #ifdef CONFIG_COMPAT
201 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
202 #endif
203
204 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
205 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
206 static struct CommandList *cmd_alloc(struct ctlr_info *h);
207 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
208 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
209         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
210         int cmd_type);
211 #define VPD_PAGE (1 << 8)
212
213 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
214 static void hpsa_scan_start(struct Scsi_Host *);
215 static int hpsa_scan_finished(struct Scsi_Host *sh,
216         unsigned long elapsed_time);
217 static int hpsa_change_queue_depth(struct scsi_device *sdev,
218         int qdepth, int reason);
219
220 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
221 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
222 static int hpsa_slave_alloc(struct scsi_device *sdev);
223 static void hpsa_slave_destroy(struct scsi_device *sdev);
224
225 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
226 static int check_for_unit_attention(struct ctlr_info *h,
227         struct CommandList *c);
228 static void check_ioctl_unit_attention(struct ctlr_info *h,
229         struct CommandList *c);
230 /* performant mode helper functions */
231 static void calc_bucket_map(int *bucket, int num_buckets,
232         int nsgs, int min_blocks, int *bucket_map);
233 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
234 static inline u32 next_command(struct ctlr_info *h, u8 q);
235 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
236                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
237                                u64 *cfg_offset);
238 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
239                                     unsigned long *memory_bar);
240 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
241 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
242                                      int wait_for_ready);
243 static inline void finish_cmd(struct CommandList *c);
244 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
245 #define BOARD_NOT_READY 0
246 #define BOARD_READY 1
247 static void hpsa_drain_accel_commands(struct ctlr_info *h);
248 static void hpsa_flush_cache(struct ctlr_info *h);
249 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
250         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
251         u8 *scsi3addr);
252
253 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
254 {
255         unsigned long *priv = shost_priv(sdev->host);
256         return (struct ctlr_info *) *priv;
257 }
258
259 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
260 {
261         unsigned long *priv = shost_priv(sh);
262         return (struct ctlr_info *) *priv;
263 }
264
265 static int check_for_unit_attention(struct ctlr_info *h,
266         struct CommandList *c)
267 {
268         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
269                 return 0;
270
271         switch (c->err_info->SenseInfo[12]) {
272         case STATE_CHANGED:
273                 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
274                         "detected, command retried\n", h->ctlr);
275                 break;
276         case LUN_FAILED:
277                 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
278                         "detected, action required\n", h->ctlr);
279                 break;
280         case REPORT_LUNS_CHANGED:
281                 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
282                         "changed, action required\n", h->ctlr);
283         /*
284          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
285          * target (array) devices.
286          */
287                 break;
288         case POWER_OR_RESET:
289                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
290                         "or device reset detected\n", h->ctlr);
291                 break;
292         case UNIT_ATTENTION_CLEARED:
293                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
294                     "cleared by another initiator\n", h->ctlr);
295                 break;
296         default:
297                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
298                         "unit attention detected\n", h->ctlr);
299                 break;
300         }
301         return 1;
302 }
303
304 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
305 {
306         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
307                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
308                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
309                 return 0;
310         dev_warn(&h->pdev->dev, HPSA "device busy");
311         return 1;
312 }
313
314 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
315                                          struct device_attribute *attr,
316                                          const char *buf, size_t count)
317 {
318         int status, len;
319         struct ctlr_info *h;
320         struct Scsi_Host *shost = class_to_shost(dev);
321         char tmpbuf[10];
322
323         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
324                 return -EACCES;
325         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
326         strncpy(tmpbuf, buf, len);
327         tmpbuf[len] = '\0';
328         if (sscanf(tmpbuf, "%d", &status) != 1)
329                 return -EINVAL;
330         h = shost_to_hba(shost);
331         h->acciopath_status = !!status;
332         dev_warn(&h->pdev->dev,
333                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
334                 h->acciopath_status ? "enabled" : "disabled");
335         return count;
336 }
337
338 static ssize_t host_store_raid_offload_debug(struct device *dev,
339                                          struct device_attribute *attr,
340                                          const char *buf, size_t count)
341 {
342         int debug_level, len;
343         struct ctlr_info *h;
344         struct Scsi_Host *shost = class_to_shost(dev);
345         char tmpbuf[10];
346
347         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
348                 return -EACCES;
349         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
350         strncpy(tmpbuf, buf, len);
351         tmpbuf[len] = '\0';
352         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
353                 return -EINVAL;
354         if (debug_level < 0)
355                 debug_level = 0;
356         h = shost_to_hba(shost);
357         h->raid_offload_debug = debug_level;
358         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
359                 h->raid_offload_debug);
360         return count;
361 }
362
363 static ssize_t host_store_rescan(struct device *dev,
364                                  struct device_attribute *attr,
365                                  const char *buf, size_t count)
366 {
367         struct ctlr_info *h;
368         struct Scsi_Host *shost = class_to_shost(dev);
369         h = shost_to_hba(shost);
370         hpsa_scan_start(h->scsi_host);
371         return count;
372 }
373
374 static ssize_t host_show_firmware_revision(struct device *dev,
375              struct device_attribute *attr, char *buf)
376 {
377         struct ctlr_info *h;
378         struct Scsi_Host *shost = class_to_shost(dev);
379         unsigned char *fwrev;
380
381         h = shost_to_hba(shost);
382         if (!h->hba_inquiry_data)
383                 return 0;
384         fwrev = &h->hba_inquiry_data[32];
385         return snprintf(buf, 20, "%c%c%c%c\n",
386                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
387 }
388
389 static ssize_t host_show_commands_outstanding(struct device *dev,
390              struct device_attribute *attr, char *buf)
391 {
392         struct Scsi_Host *shost = class_to_shost(dev);
393         struct ctlr_info *h = shost_to_hba(shost);
394
395         return snprintf(buf, 20, "%d\n", h->commands_outstanding);
396 }
397
398 static ssize_t host_show_transport_mode(struct device *dev,
399         struct device_attribute *attr, char *buf)
400 {
401         struct ctlr_info *h;
402         struct Scsi_Host *shost = class_to_shost(dev);
403
404         h = shost_to_hba(shost);
405         return snprintf(buf, 20, "%s\n",
406                 h->transMethod & CFGTBL_Trans_Performant ?
407                         "performant" : "simple");
408 }
409
410 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
411         struct device_attribute *attr, char *buf)
412 {
413         struct ctlr_info *h;
414         struct Scsi_Host *shost = class_to_shost(dev);
415
416         h = shost_to_hba(shost);
417         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
418                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
419 }
420
421 /* List of controllers which cannot be hard reset on kexec with reset_devices */
422 static u32 unresettable_controller[] = {
423         0x324a103C, /* Smart Array P712m */
424         0x324b103C, /* SmartArray P711m */
425         0x3223103C, /* Smart Array P800 */
426         0x3234103C, /* Smart Array P400 */
427         0x3235103C, /* Smart Array P400i */
428         0x3211103C, /* Smart Array E200i */
429         0x3212103C, /* Smart Array E200 */
430         0x3213103C, /* Smart Array E200i */
431         0x3214103C, /* Smart Array E200i */
432         0x3215103C, /* Smart Array E200i */
433         0x3237103C, /* Smart Array E500 */
434         0x323D103C, /* Smart Array P700m */
435         0x40800E11, /* Smart Array 5i */
436         0x409C0E11, /* Smart Array 6400 */
437         0x409D0E11, /* Smart Array 6400 EM */
438         0x40700E11, /* Smart Array 5300 */
439         0x40820E11, /* Smart Array 532 */
440         0x40830E11, /* Smart Array 5312 */
441         0x409A0E11, /* Smart Array 641 */
442         0x409B0E11, /* Smart Array 642 */
443         0x40910E11, /* Smart Array 6i */
444 };
445
446 /* List of controllers which cannot even be soft reset */
447 static u32 soft_unresettable_controller[] = {
448         0x40800E11, /* Smart Array 5i */
449         0x40700E11, /* Smart Array 5300 */
450         0x40820E11, /* Smart Array 532 */
451         0x40830E11, /* Smart Array 5312 */
452         0x409A0E11, /* Smart Array 641 */
453         0x409B0E11, /* Smart Array 642 */
454         0x40910E11, /* Smart Array 6i */
455         /* Exclude 640x boards.  These are two pci devices in one slot
456          * which share a battery backed cache module.  One controls the
457          * cache, the other accesses the cache through the one that controls
458          * it.  If we reset the one controlling the cache, the other will
459          * likely not be happy.  Just forbid resetting this conjoined mess.
460          * The 640x isn't really supported by hpsa anyway.
461          */
462         0x409C0E11, /* Smart Array 6400 */
463         0x409D0E11, /* Smart Array 6400 EM */
464 };
465
466 static int ctlr_is_hard_resettable(u32 board_id)
467 {
468         int i;
469
470         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
471                 if (unresettable_controller[i] == board_id)
472                         return 0;
473         return 1;
474 }
475
476 static int ctlr_is_soft_resettable(u32 board_id)
477 {
478         int i;
479
480         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
481                 if (soft_unresettable_controller[i] == board_id)
482                         return 0;
483         return 1;
484 }
485
486 static int ctlr_is_resettable(u32 board_id)
487 {
488         return ctlr_is_hard_resettable(board_id) ||
489                 ctlr_is_soft_resettable(board_id);
490 }
491
492 static ssize_t host_show_resettable(struct device *dev,
493         struct device_attribute *attr, char *buf)
494 {
495         struct ctlr_info *h;
496         struct Scsi_Host *shost = class_to_shost(dev);
497
498         h = shost_to_hba(shost);
499         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
500 }
501
502 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
503 {
504         return (scsi3addr[3] & 0xC0) == 0x40;
505 }
506
507 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
508         "1(ADM)", "UNKNOWN"
509 };
510 #define HPSA_RAID_0     0
511 #define HPSA_RAID_4     1
512 #define HPSA_RAID_1     2       /* also used for RAID 10 */
513 #define HPSA_RAID_5     3       /* also used for RAID 50 */
514 #define HPSA_RAID_51    4
515 #define HPSA_RAID_6     5       /* also used for RAID 60 */
516 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
517 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
518
519 static ssize_t raid_level_show(struct device *dev,
520              struct device_attribute *attr, char *buf)
521 {
522         ssize_t l = 0;
523         unsigned char rlevel;
524         struct ctlr_info *h;
525         struct scsi_device *sdev;
526         struct hpsa_scsi_dev_t *hdev;
527         unsigned long flags;
528
529         sdev = to_scsi_device(dev);
530         h = sdev_to_hba(sdev);
531         spin_lock_irqsave(&h->lock, flags);
532         hdev = sdev->hostdata;
533         if (!hdev) {
534                 spin_unlock_irqrestore(&h->lock, flags);
535                 return -ENODEV;
536         }
537
538         /* Is this even a logical drive? */
539         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
540                 spin_unlock_irqrestore(&h->lock, flags);
541                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
542                 return l;
543         }
544
545         rlevel = hdev->raid_level;
546         spin_unlock_irqrestore(&h->lock, flags);
547         if (rlevel > RAID_UNKNOWN)
548                 rlevel = RAID_UNKNOWN;
549         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
550         return l;
551 }
552
553 static ssize_t lunid_show(struct device *dev,
554              struct device_attribute *attr, char *buf)
555 {
556         struct ctlr_info *h;
557         struct scsi_device *sdev;
558         struct hpsa_scsi_dev_t *hdev;
559         unsigned long flags;
560         unsigned char lunid[8];
561
562         sdev = to_scsi_device(dev);
563         h = sdev_to_hba(sdev);
564         spin_lock_irqsave(&h->lock, flags);
565         hdev = sdev->hostdata;
566         if (!hdev) {
567                 spin_unlock_irqrestore(&h->lock, flags);
568                 return -ENODEV;
569         }
570         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
571         spin_unlock_irqrestore(&h->lock, flags);
572         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
573                 lunid[0], lunid[1], lunid[2], lunid[3],
574                 lunid[4], lunid[5], lunid[6], lunid[7]);
575 }
576
577 static ssize_t unique_id_show(struct device *dev,
578              struct device_attribute *attr, char *buf)
579 {
580         struct ctlr_info *h;
581         struct scsi_device *sdev;
582         struct hpsa_scsi_dev_t *hdev;
583         unsigned long flags;
584         unsigned char sn[16];
585
586         sdev = to_scsi_device(dev);
587         h = sdev_to_hba(sdev);
588         spin_lock_irqsave(&h->lock, flags);
589         hdev = sdev->hostdata;
590         if (!hdev) {
591                 spin_unlock_irqrestore(&h->lock, flags);
592                 return -ENODEV;
593         }
594         memcpy(sn, hdev->device_id, sizeof(sn));
595         spin_unlock_irqrestore(&h->lock, flags);
596         return snprintf(buf, 16 * 2 + 2,
597                         "%02X%02X%02X%02X%02X%02X%02X%02X"
598                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
599                         sn[0], sn[1], sn[2], sn[3],
600                         sn[4], sn[5], sn[6], sn[7],
601                         sn[8], sn[9], sn[10], sn[11],
602                         sn[12], sn[13], sn[14], sn[15]);
603 }
604
605 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
606              struct device_attribute *attr, char *buf)
607 {
608         struct ctlr_info *h;
609         struct scsi_device *sdev;
610         struct hpsa_scsi_dev_t *hdev;
611         unsigned long flags;
612         int offload_enabled;
613
614         sdev = to_scsi_device(dev);
615         h = sdev_to_hba(sdev);
616         spin_lock_irqsave(&h->lock, flags);
617         hdev = sdev->hostdata;
618         if (!hdev) {
619                 spin_unlock_irqrestore(&h->lock, flags);
620                 return -ENODEV;
621         }
622         offload_enabled = hdev->offload_enabled;
623         spin_unlock_irqrestore(&h->lock, flags);
624         return snprintf(buf, 20, "%d\n", offload_enabled);
625 }
626
627 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
628 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
629 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
630 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
631 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
632                         host_show_hp_ssd_smart_path_enabled, NULL);
633 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
634                 host_show_hp_ssd_smart_path_status,
635                 host_store_hp_ssd_smart_path_status);
636 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
637                         host_store_raid_offload_debug);
638 static DEVICE_ATTR(firmware_revision, S_IRUGO,
639         host_show_firmware_revision, NULL);
640 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
641         host_show_commands_outstanding, NULL);
642 static DEVICE_ATTR(transport_mode, S_IRUGO,
643         host_show_transport_mode, NULL);
644 static DEVICE_ATTR(resettable, S_IRUGO,
645         host_show_resettable, NULL);
646
647 static struct device_attribute *hpsa_sdev_attrs[] = {
648         &dev_attr_raid_level,
649         &dev_attr_lunid,
650         &dev_attr_unique_id,
651         &dev_attr_hp_ssd_smart_path_enabled,
652         NULL,
653 };
654
655 static struct device_attribute *hpsa_shost_attrs[] = {
656         &dev_attr_rescan,
657         &dev_attr_firmware_revision,
658         &dev_attr_commands_outstanding,
659         &dev_attr_transport_mode,
660         &dev_attr_resettable,
661         &dev_attr_hp_ssd_smart_path_status,
662         &dev_attr_raid_offload_debug,
663         NULL,
664 };
665
666 static struct scsi_host_template hpsa_driver_template = {
667         .module                 = THIS_MODULE,
668         .name                   = HPSA,
669         .proc_name              = HPSA,
670         .queuecommand           = hpsa_scsi_queue_command,
671         .scan_start             = hpsa_scan_start,
672         .scan_finished          = hpsa_scan_finished,
673         .change_queue_depth     = hpsa_change_queue_depth,
674         .this_id                = -1,
675         .use_clustering         = ENABLE_CLUSTERING,
676         .eh_abort_handler       = hpsa_eh_abort_handler,
677         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
678         .ioctl                  = hpsa_ioctl,
679         .slave_alloc            = hpsa_slave_alloc,
680         .slave_destroy          = hpsa_slave_destroy,
681 #ifdef CONFIG_COMPAT
682         .compat_ioctl           = hpsa_compat_ioctl,
683 #endif
684         .sdev_attrs = hpsa_sdev_attrs,
685         .shost_attrs = hpsa_shost_attrs,
686         .max_sectors = 8192,
687         .no_write_same = 1,
688 };
689
690
691 /* Enqueuing and dequeuing functions for cmdlists. */
692 static inline void addQ(struct list_head *list, struct CommandList *c)
693 {
694         list_add_tail(&c->list, list);
695 }
696
697 static inline u32 next_command(struct ctlr_info *h, u8 q)
698 {
699         u32 a;
700         struct reply_queue_buffer *rq = &h->reply_queue[q];
701         unsigned long flags;
702
703         if (h->transMethod & CFGTBL_Trans_io_accel1)
704                 return h->access.command_completed(h, q);
705
706         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
707                 return h->access.command_completed(h, q);
708
709         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
710                 a = rq->head[rq->current_entry];
711                 rq->current_entry++;
712                 spin_lock_irqsave(&h->lock, flags);
713                 h->commands_outstanding--;
714                 spin_unlock_irqrestore(&h->lock, flags);
715         } else {
716                 a = FIFO_EMPTY;
717         }
718         /* Check for wraparound */
719         if (rq->current_entry == h->max_commands) {
720                 rq->current_entry = 0;
721                 rq->wraparound ^= 1;
722         }
723         return a;
724 }
725
726 /*
727  * There are some special bits in the bus address of the
728  * command that we have to set for the controller to know
729  * how to process the command:
730  *
731  * Normal performant mode:
732  * bit 0: 1 means performant mode, 0 means simple mode.
733  * bits 1-3 = block fetch table entry
734  * bits 4-6 = command type (== 0)
735  *
736  * ioaccel1 mode:
737  * bit 0 = "performant mode" bit.
738  * bits 1-3 = block fetch table entry
739  * bits 4-6 = command type (== 110)
740  * (command type is needed because ioaccel1 mode
741  * commands are submitted through the same register as normal
742  * mode commands, so this is how the controller knows whether
743  * the command is normal mode or ioaccel1 mode.)
744  *
745  * ioaccel2 mode:
746  * bit 0 = "performant mode" bit.
747  * bits 1-4 = block fetch table entry (note extra bit)
748  * bits 4-6 = not needed, because ioaccel2 mode has
749  * a separate special register for submitting commands.
750  */
751
752 /* set_performant_mode: Modify the tag for cciss performant
753  * set bit 0 for pull model, bits 3-1 for block fetch
754  * register number
755  */
756 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
757 {
758         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
759                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
760                 if (likely(h->msix_vector > 0))
761                         c->Header.ReplyQueue =
762                                 raw_smp_processor_id() % h->nreply_queues;
763         }
764 }
765
766 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
767                                                 struct CommandList *c)
768 {
769         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
770
771         /* Tell the controller to post the reply to the queue for this
772          * processor.  This seems to give the best I/O throughput.
773          */
774         cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
775         /* Set the bits in the address sent down to include:
776          *  - performant mode bit (bit 0)
777          *  - pull count (bits 1-3)
778          *  - command type (bits 4-6)
779          */
780         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
781                                         IOACCEL1_BUSADDR_CMDTYPE;
782 }
783
784 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
785                                                 struct CommandList *c)
786 {
787         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
788
789         /* Tell the controller to post the reply to the queue for this
790          * processor.  This seems to give the best I/O throughput.
791          */
792         cp->reply_queue = smp_processor_id() % h->nreply_queues;
793         /* Set the bits in the address sent down to include:
794          *  - performant mode bit not used in ioaccel mode 2
795          *  - pull count (bits 0-3)
796          *  - command type isn't needed for ioaccel2
797          */
798         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
799 }
800
801 static int is_firmware_flash_cmd(u8 *cdb)
802 {
803         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
804 }
805
806 /*
807  * During firmware flash, the heartbeat register may not update as frequently
808  * as it should.  So we dial down lockup detection during firmware flash. and
809  * dial it back up when firmware flash completes.
810  */
811 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
812 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
813 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
814                 struct CommandList *c)
815 {
816         if (!is_firmware_flash_cmd(c->Request.CDB))
817                 return;
818         atomic_inc(&h->firmware_flash_in_progress);
819         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
820 }
821
822 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
823                 struct CommandList *c)
824 {
825         if (is_firmware_flash_cmd(c->Request.CDB) &&
826                 atomic_dec_and_test(&h->firmware_flash_in_progress))
827                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
828 }
829
830 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
831         struct CommandList *c)
832 {
833         unsigned long flags;
834
835         switch (c->cmd_type) {
836         case CMD_IOACCEL1:
837                 set_ioaccel1_performant_mode(h, c);
838                 break;
839         case CMD_IOACCEL2:
840                 set_ioaccel2_performant_mode(h, c);
841                 break;
842         default:
843                 set_performant_mode(h, c);
844         }
845         dial_down_lockup_detection_during_fw_flash(h, c);
846         spin_lock_irqsave(&h->lock, flags);
847         addQ(&h->reqQ, c);
848         h->Qdepth++;
849         start_io(h, &flags);
850         spin_unlock_irqrestore(&h->lock, flags);
851 }
852
853 static inline void removeQ(struct CommandList *c)
854 {
855         if (WARN_ON(list_empty(&c->list)))
856                 return;
857         list_del_init(&c->list);
858 }
859
860 static inline int is_hba_lunid(unsigned char scsi3addr[])
861 {
862         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
863 }
864
865 static inline int is_scsi_rev_5(struct ctlr_info *h)
866 {
867         if (!h->hba_inquiry_data)
868                 return 0;
869         if ((h->hba_inquiry_data[2] & 0x07) == 5)
870                 return 1;
871         return 0;
872 }
873
874 static int hpsa_find_target_lun(struct ctlr_info *h,
875         unsigned char scsi3addr[], int bus, int *target, int *lun)
876 {
877         /* finds an unused bus, target, lun for a new physical device
878          * assumes h->devlock is held
879          */
880         int i, found = 0;
881         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
882
883         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
884
885         for (i = 0; i < h->ndevices; i++) {
886                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
887                         __set_bit(h->dev[i]->target, lun_taken);
888         }
889
890         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
891         if (i < HPSA_MAX_DEVICES) {
892                 /* *bus = 1; */
893                 *target = i;
894                 *lun = 0;
895                 found = 1;
896         }
897         return !found;
898 }
899
900 /* Add an entry into h->dev[] array. */
901 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
902                 struct hpsa_scsi_dev_t *device,
903                 struct hpsa_scsi_dev_t *added[], int *nadded)
904 {
905         /* assumes h->devlock is held */
906         int n = h->ndevices;
907         int i;
908         unsigned char addr1[8], addr2[8];
909         struct hpsa_scsi_dev_t *sd;
910
911         if (n >= HPSA_MAX_DEVICES) {
912                 dev_err(&h->pdev->dev, "too many devices, some will be "
913                         "inaccessible.\n");
914                 return -1;
915         }
916
917         /* physical devices do not have lun or target assigned until now. */
918         if (device->lun != -1)
919                 /* Logical device, lun is already assigned. */
920                 goto lun_assigned;
921
922         /* If this device a non-zero lun of a multi-lun device
923          * byte 4 of the 8-byte LUN addr will contain the logical
924          * unit no, zero otherise.
925          */
926         if (device->scsi3addr[4] == 0) {
927                 /* This is not a non-zero lun of a multi-lun device */
928                 if (hpsa_find_target_lun(h, device->scsi3addr,
929                         device->bus, &device->target, &device->lun) != 0)
930                         return -1;
931                 goto lun_assigned;
932         }
933
934         /* This is a non-zero lun of a multi-lun device.
935          * Search through our list and find the device which
936          * has the same 8 byte LUN address, excepting byte 4.
937          * Assign the same bus and target for this new LUN.
938          * Use the logical unit number from the firmware.
939          */
940         memcpy(addr1, device->scsi3addr, 8);
941         addr1[4] = 0;
942         for (i = 0; i < n; i++) {
943                 sd = h->dev[i];
944                 memcpy(addr2, sd->scsi3addr, 8);
945                 addr2[4] = 0;
946                 /* differ only in byte 4? */
947                 if (memcmp(addr1, addr2, 8) == 0) {
948                         device->bus = sd->bus;
949                         device->target = sd->target;
950                         device->lun = device->scsi3addr[4];
951                         break;
952                 }
953         }
954         if (device->lun == -1) {
955                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
956                         " suspect firmware bug or unsupported hardware "
957                         "configuration.\n");
958                         return -1;
959         }
960
961 lun_assigned:
962
963         h->dev[n] = device;
964         h->ndevices++;
965         added[*nadded] = device;
966         (*nadded)++;
967
968         /* initially, (before registering with scsi layer) we don't
969          * know our hostno and we don't want to print anything first
970          * time anyway (the scsi layer's inquiries will show that info)
971          */
972         /* if (hostno != -1) */
973                 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
974                         scsi_device_type(device->devtype), hostno,
975                         device->bus, device->target, device->lun);
976         return 0;
977 }
978
979 /* Update an entry in h->dev[] array. */
980 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
981         int entry, struct hpsa_scsi_dev_t *new_entry)
982 {
983         /* assumes h->devlock is held */
984         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
985
986         /* Raid level changed. */
987         h->dev[entry]->raid_level = new_entry->raid_level;
988
989         /* Raid offload parameters changed. */
990         h->dev[entry]->offload_config = new_entry->offload_config;
991         h->dev[entry]->offload_enabled = new_entry->offload_enabled;
992         h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
993         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
994         h->dev[entry]->raid_map = new_entry->raid_map;
995
996         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
997                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
998                 new_entry->target, new_entry->lun);
999 }
1000
1001 /* Replace an entry from h->dev[] array. */
1002 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1003         int entry, struct hpsa_scsi_dev_t *new_entry,
1004         struct hpsa_scsi_dev_t *added[], int *nadded,
1005         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1006 {
1007         /* assumes h->devlock is held */
1008         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1009         removed[*nremoved] = h->dev[entry];
1010         (*nremoved)++;
1011
1012         /*
1013          * New physical devices won't have target/lun assigned yet
1014          * so we need to preserve the values in the slot we are replacing.
1015          */
1016         if (new_entry->target == -1) {
1017                 new_entry->target = h->dev[entry]->target;
1018                 new_entry->lun = h->dev[entry]->lun;
1019         }
1020
1021         h->dev[entry] = new_entry;
1022         added[*nadded] = new_entry;
1023         (*nadded)++;
1024         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
1025                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
1026                         new_entry->target, new_entry->lun);
1027 }
1028
1029 /* Remove an entry from h->dev[] array. */
1030 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1031         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1032 {
1033         /* assumes h->devlock is held */
1034         int i;
1035         struct hpsa_scsi_dev_t *sd;
1036
1037         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1038
1039         sd = h->dev[entry];
1040         removed[*nremoved] = h->dev[entry];
1041         (*nremoved)++;
1042
1043         for (i = entry; i < h->ndevices-1; i++)
1044                 h->dev[i] = h->dev[i+1];
1045         h->ndevices--;
1046         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
1047                 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
1048                 sd->lun);
1049 }
1050
1051 #define SCSI3ADDR_EQ(a, b) ( \
1052         (a)[7] == (b)[7] && \
1053         (a)[6] == (b)[6] && \
1054         (a)[5] == (b)[5] && \
1055         (a)[4] == (b)[4] && \
1056         (a)[3] == (b)[3] && \
1057         (a)[2] == (b)[2] && \
1058         (a)[1] == (b)[1] && \
1059         (a)[0] == (b)[0])
1060
1061 static void fixup_botched_add(struct ctlr_info *h,
1062         struct hpsa_scsi_dev_t *added)
1063 {
1064         /* called when scsi_add_device fails in order to re-adjust
1065          * h->dev[] to match the mid layer's view.
1066          */
1067         unsigned long flags;
1068         int i, j;
1069
1070         spin_lock_irqsave(&h->lock, flags);
1071         for (i = 0; i < h->ndevices; i++) {
1072                 if (h->dev[i] == added) {
1073                         for (j = i; j < h->ndevices-1; j++)
1074                                 h->dev[j] = h->dev[j+1];
1075                         h->ndevices--;
1076                         break;
1077                 }
1078         }
1079         spin_unlock_irqrestore(&h->lock, flags);
1080         kfree(added);
1081 }
1082
1083 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1084         struct hpsa_scsi_dev_t *dev2)
1085 {
1086         /* we compare everything except lun and target as these
1087          * are not yet assigned.  Compare parts likely
1088          * to differ first
1089          */
1090         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1091                 sizeof(dev1->scsi3addr)) != 0)
1092                 return 0;
1093         if (memcmp(dev1->device_id, dev2->device_id,
1094                 sizeof(dev1->device_id)) != 0)
1095                 return 0;
1096         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1097                 return 0;
1098         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1099                 return 0;
1100         if (dev1->devtype != dev2->devtype)
1101                 return 0;
1102         if (dev1->bus != dev2->bus)
1103                 return 0;
1104         return 1;
1105 }
1106
1107 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1108         struct hpsa_scsi_dev_t *dev2)
1109 {
1110         /* Device attributes that can change, but don't mean
1111          * that the device is a different device, nor that the OS
1112          * needs to be told anything about the change.
1113          */
1114         if (dev1->raid_level != dev2->raid_level)
1115                 return 1;
1116         if (dev1->offload_config != dev2->offload_config)
1117                 return 1;
1118         if (dev1->offload_enabled != dev2->offload_enabled)
1119                 return 1;
1120         return 0;
1121 }
1122
1123 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1124  * and return needle location in *index.  If scsi3addr matches, but not
1125  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1126  * location in *index.
1127  * In the case of a minor device attribute change, such as RAID level, just
1128  * return DEVICE_UPDATED, along with the updated device's location in index.
1129  * If needle not found, return DEVICE_NOT_FOUND.
1130  */
1131 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1132         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1133         int *index)
1134 {
1135         int i;
1136 #define DEVICE_NOT_FOUND 0
1137 #define DEVICE_CHANGED 1
1138 #define DEVICE_SAME 2
1139 #define DEVICE_UPDATED 3
1140         for (i = 0; i < haystack_size; i++) {
1141                 if (haystack[i] == NULL) /* previously removed. */
1142                         continue;
1143                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1144                         *index = i;
1145                         if (device_is_the_same(needle, haystack[i])) {
1146                                 if (device_updated(needle, haystack[i]))
1147                                         return DEVICE_UPDATED;
1148                                 return DEVICE_SAME;
1149                         } else {
1150                                 /* Keep offline devices offline */
1151                                 if (needle->volume_offline)
1152                                         return DEVICE_NOT_FOUND;
1153                                 return DEVICE_CHANGED;
1154                         }
1155                 }
1156         }
1157         *index = -1;
1158         return DEVICE_NOT_FOUND;
1159 }
1160
1161 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1162                                         unsigned char scsi3addr[])
1163 {
1164         struct offline_device_entry *device;
1165         unsigned long flags;
1166
1167         /* Check to see if device is already on the list */
1168         spin_lock_irqsave(&h->offline_device_lock, flags);
1169         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1170                 if (memcmp(device->scsi3addr, scsi3addr,
1171                         sizeof(device->scsi3addr)) == 0) {
1172                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1173                         return;
1174                 }
1175         }
1176         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1177
1178         /* Device is not on the list, add it. */
1179         device = kmalloc(sizeof(*device), GFP_KERNEL);
1180         if (!device) {
1181                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1182                 return;
1183         }
1184         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1185         spin_lock_irqsave(&h->offline_device_lock, flags);
1186         list_add_tail(&device->offline_list, &h->offline_device_list);
1187         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1188 }
1189
1190 /* Print a message explaining various offline volume states */
1191 static void hpsa_show_volume_status(struct ctlr_info *h,
1192         struct hpsa_scsi_dev_t *sd)
1193 {
1194         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1195                 dev_info(&h->pdev->dev,
1196                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1197                         h->scsi_host->host_no,
1198                         sd->bus, sd->target, sd->lun);
1199         switch (sd->volume_offline) {
1200         case HPSA_LV_OK:
1201                 break;
1202         case HPSA_LV_UNDERGOING_ERASE:
1203                 dev_info(&h->pdev->dev,
1204                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1205                         h->scsi_host->host_no,
1206                         sd->bus, sd->target, sd->lun);
1207                 break;
1208         case HPSA_LV_UNDERGOING_RPI:
1209                 dev_info(&h->pdev->dev,
1210                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1211                         h->scsi_host->host_no,
1212                         sd->bus, sd->target, sd->lun);
1213                 break;
1214         case HPSA_LV_PENDING_RPI:
1215                 dev_info(&h->pdev->dev,
1216                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1217                                 h->scsi_host->host_no,
1218                                 sd->bus, sd->target, sd->lun);
1219                 break;
1220         case HPSA_LV_ENCRYPTED_NO_KEY:
1221                 dev_info(&h->pdev->dev,
1222                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1223                         h->scsi_host->host_no,
1224                         sd->bus, sd->target, sd->lun);
1225                 break;
1226         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1227                 dev_info(&h->pdev->dev,
1228                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1229                         h->scsi_host->host_no,
1230                         sd->bus, sd->target, sd->lun);
1231                 break;
1232         case HPSA_LV_UNDERGOING_ENCRYPTION:
1233                 dev_info(&h->pdev->dev,
1234                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1235                         h->scsi_host->host_no,
1236                         sd->bus, sd->target, sd->lun);
1237                 break;
1238         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1239                 dev_info(&h->pdev->dev,
1240                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1241                         h->scsi_host->host_no,
1242                         sd->bus, sd->target, sd->lun);
1243                 break;
1244         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1245                 dev_info(&h->pdev->dev,
1246                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1247                         h->scsi_host->host_no,
1248                         sd->bus, sd->target, sd->lun);
1249                 break;
1250         case HPSA_LV_PENDING_ENCRYPTION:
1251                 dev_info(&h->pdev->dev,
1252                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1253                         h->scsi_host->host_no,
1254                         sd->bus, sd->target, sd->lun);
1255                 break;
1256         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1257                 dev_info(&h->pdev->dev,
1258                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1259                         h->scsi_host->host_no,
1260                         sd->bus, sd->target, sd->lun);
1261                 break;
1262         }
1263 }
1264
1265 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1266         struct hpsa_scsi_dev_t *sd[], int nsds)
1267 {
1268         /* sd contains scsi3 addresses and devtypes, and inquiry
1269          * data.  This function takes what's in sd to be the current
1270          * reality and updates h->dev[] to reflect that reality.
1271          */
1272         int i, entry, device_change, changes = 0;
1273         struct hpsa_scsi_dev_t *csd;
1274         unsigned long flags;
1275         struct hpsa_scsi_dev_t **added, **removed;
1276         int nadded, nremoved;
1277         struct Scsi_Host *sh = NULL;
1278
1279         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1280         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1281
1282         if (!added || !removed) {
1283                 dev_warn(&h->pdev->dev, "out of memory in "
1284                         "adjust_hpsa_scsi_table\n");
1285                 goto free_and_out;
1286         }
1287
1288         spin_lock_irqsave(&h->devlock, flags);
1289
1290         /* find any devices in h->dev[] that are not in
1291          * sd[] and remove them from h->dev[], and for any
1292          * devices which have changed, remove the old device
1293          * info and add the new device info.
1294          * If minor device attributes change, just update
1295          * the existing device structure.
1296          */
1297         i = 0;
1298         nremoved = 0;
1299         nadded = 0;
1300         while (i < h->ndevices) {
1301                 csd = h->dev[i];
1302                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1303                 if (device_change == DEVICE_NOT_FOUND) {
1304                         changes++;
1305                         hpsa_scsi_remove_entry(h, hostno, i,
1306                                 removed, &nremoved);
1307                         continue; /* remove ^^^, hence i not incremented */
1308                 } else if (device_change == DEVICE_CHANGED) {
1309                         changes++;
1310                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1311                                 added, &nadded, removed, &nremoved);
1312                         /* Set it to NULL to prevent it from being freed
1313                          * at the bottom of hpsa_update_scsi_devices()
1314                          */
1315                         sd[entry] = NULL;
1316                 } else if (device_change == DEVICE_UPDATED) {
1317                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1318                 }
1319                 i++;
1320         }
1321
1322         /* Now, make sure every device listed in sd[] is also
1323          * listed in h->dev[], adding them if they aren't found
1324          */
1325
1326         for (i = 0; i < nsds; i++) {
1327                 if (!sd[i]) /* if already added above. */
1328                         continue;
1329
1330                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1331                  * as the SCSI mid-layer does not handle such devices well.
1332                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1333                  * at 160Hz, and prevents the system from coming up.
1334                  */
1335                 if (sd[i]->volume_offline) {
1336                         hpsa_show_volume_status(h, sd[i]);
1337                         dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n",
1338                                 h->scsi_host->host_no,
1339                                 sd[i]->bus, sd[i]->target, sd[i]->lun);
1340                         continue;
1341                 }
1342
1343                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1344                                         h->ndevices, &entry);
1345                 if (device_change == DEVICE_NOT_FOUND) {
1346                         changes++;
1347                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1348                                 added, &nadded) != 0)
1349                                 break;
1350                         sd[i] = NULL; /* prevent from being freed later. */
1351                 } else if (device_change == DEVICE_CHANGED) {
1352                         /* should never happen... */
1353                         changes++;
1354                         dev_warn(&h->pdev->dev,
1355                                 "device unexpectedly changed.\n");
1356                         /* but if it does happen, we just ignore that device */
1357                 }
1358         }
1359         spin_unlock_irqrestore(&h->devlock, flags);
1360
1361         /* Monitor devices which are in one of several NOT READY states to be
1362          * brought online later. This must be done without holding h->devlock,
1363          * so don't touch h->dev[]
1364          */
1365         for (i = 0; i < nsds; i++) {
1366                 if (!sd[i]) /* if already added above. */
1367                         continue;
1368                 if (sd[i]->volume_offline)
1369                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1370         }
1371
1372         /* Don't notify scsi mid layer of any changes the first time through
1373          * (or if there are no changes) scsi_scan_host will do it later the
1374          * first time through.
1375          */
1376         if (hostno == -1 || !changes)
1377                 goto free_and_out;
1378
1379         sh = h->scsi_host;
1380         /* Notify scsi mid layer of any removed devices */
1381         for (i = 0; i < nremoved; i++) {
1382                 struct scsi_device *sdev =
1383                         scsi_device_lookup(sh, removed[i]->bus,
1384                                 removed[i]->target, removed[i]->lun);
1385                 if (sdev != NULL) {
1386                         scsi_remove_device(sdev);
1387                         scsi_device_put(sdev);
1388                 } else {
1389                         /* We don't expect to get here.
1390                          * future cmds to this device will get selection
1391                          * timeout as if the device was gone.
1392                          */
1393                         dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1394                                 " for removal.", hostno, removed[i]->bus,
1395                                 removed[i]->target, removed[i]->lun);
1396                 }
1397                 kfree(removed[i]);
1398                 removed[i] = NULL;
1399         }
1400
1401         /* Notify scsi mid layer of any added devices */
1402         for (i = 0; i < nadded; i++) {
1403                 if (scsi_add_device(sh, added[i]->bus,
1404                         added[i]->target, added[i]->lun) == 0)
1405                         continue;
1406                 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1407                         "device not added.\n", hostno, added[i]->bus,
1408                         added[i]->target, added[i]->lun);
1409                 /* now we have to remove it from h->dev,
1410                  * since it didn't get added to scsi mid layer
1411                  */
1412                 fixup_botched_add(h, added[i]);
1413         }
1414
1415 free_and_out:
1416         kfree(added);
1417         kfree(removed);
1418 }
1419
1420 /*
1421  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1422  * Assume's h->devlock is held.
1423  */
1424 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1425         int bus, int target, int lun)
1426 {
1427         int i;
1428         struct hpsa_scsi_dev_t *sd;
1429
1430         for (i = 0; i < h->ndevices; i++) {
1431                 sd = h->dev[i];
1432                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1433                         return sd;
1434         }
1435         return NULL;
1436 }
1437
1438 /* link sdev->hostdata to our per-device structure. */
1439 static int hpsa_slave_alloc(struct scsi_device *sdev)
1440 {
1441         struct hpsa_scsi_dev_t *sd;
1442         unsigned long flags;
1443         struct ctlr_info *h;
1444
1445         h = sdev_to_hba(sdev);
1446         spin_lock_irqsave(&h->devlock, flags);
1447         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1448                 sdev_id(sdev), sdev->lun);
1449         if (sd != NULL)
1450                 sdev->hostdata = sd;
1451         spin_unlock_irqrestore(&h->devlock, flags);
1452         return 0;
1453 }
1454
1455 static void hpsa_slave_destroy(struct scsi_device *sdev)
1456 {
1457         /* nothing to do. */
1458 }
1459
1460 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1461 {
1462         int i;
1463
1464         if (!h->cmd_sg_list)
1465                 return;
1466         for (i = 0; i < h->nr_cmds; i++) {
1467                 kfree(h->cmd_sg_list[i]);
1468                 h->cmd_sg_list[i] = NULL;
1469         }
1470         kfree(h->cmd_sg_list);
1471         h->cmd_sg_list = NULL;
1472 }
1473
1474 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1475 {
1476         int i;
1477
1478         if (h->chainsize <= 0)
1479                 return 0;
1480
1481         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1482                                 GFP_KERNEL);
1483         if (!h->cmd_sg_list)
1484                 return -ENOMEM;
1485         for (i = 0; i < h->nr_cmds; i++) {
1486                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1487                                                 h->chainsize, GFP_KERNEL);
1488                 if (!h->cmd_sg_list[i])
1489                         goto clean;
1490         }
1491         return 0;
1492
1493 clean:
1494         hpsa_free_sg_chain_blocks(h);
1495         return -ENOMEM;
1496 }
1497
1498 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1499         struct CommandList *c)
1500 {
1501         struct SGDescriptor *chain_sg, *chain_block;
1502         u64 temp64;
1503
1504         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1505         chain_block = h->cmd_sg_list[c->cmdindex];
1506         chain_sg->Ext = HPSA_SG_CHAIN;
1507         chain_sg->Len = sizeof(*chain_sg) *
1508                 (c->Header.SGTotal - h->max_cmd_sg_entries);
1509         temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1510                                 PCI_DMA_TODEVICE);
1511         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1512                 /* prevent subsequent unmapping */
1513                 chain_sg->Addr.lower = 0;
1514                 chain_sg->Addr.upper = 0;
1515                 return -1;
1516         }
1517         chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1518         chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1519         return 0;
1520 }
1521
1522 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1523         struct CommandList *c)
1524 {
1525         struct SGDescriptor *chain_sg;
1526         union u64bit temp64;
1527
1528         if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1529                 return;
1530
1531         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1532         temp64.val32.lower = chain_sg->Addr.lower;
1533         temp64.val32.upper = chain_sg->Addr.upper;
1534         pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1535 }
1536
1537
1538 /* Decode the various types of errors on ioaccel2 path.
1539  * Return 1 for any error that should generate a RAID path retry.
1540  * Return 0 for errors that don't require a RAID path retry.
1541  */
1542 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1543                                         struct CommandList *c,
1544                                         struct scsi_cmnd *cmd,
1545                                         struct io_accel2_cmd *c2)
1546 {
1547         int data_len;
1548         int retry = 0;
1549
1550         switch (c2->error_data.serv_response) {
1551         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1552                 switch (c2->error_data.status) {
1553                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1554                         break;
1555                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1556                         dev_warn(&h->pdev->dev,
1557                                 "%s: task complete with check condition.\n",
1558                                 "HP SSD Smart Path");
1559                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1560                         if (c2->error_data.data_present !=
1561                                         IOACCEL2_SENSE_DATA_PRESENT) {
1562                                 memset(cmd->sense_buffer, 0,
1563                                         SCSI_SENSE_BUFFERSIZE);
1564                                 break;
1565                         }
1566                         /* copy the sense data */
1567                         data_len = c2->error_data.sense_data_len;
1568                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1569                                 data_len = SCSI_SENSE_BUFFERSIZE;
1570                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1571                                 data_len =
1572                                         sizeof(c2->error_data.sense_data_buff);
1573                         memcpy(cmd->sense_buffer,
1574                                 c2->error_data.sense_data_buff, data_len);
1575                         retry = 1;
1576                         break;
1577                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1578                         dev_warn(&h->pdev->dev,
1579                                 "%s: task complete with BUSY status.\n",
1580                                 "HP SSD Smart Path");
1581                         retry = 1;
1582                         break;
1583                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1584                         dev_warn(&h->pdev->dev,
1585                                 "%s: task complete with reservation conflict.\n",
1586                                 "HP SSD Smart Path");
1587                         retry = 1;
1588                         break;
1589                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1590                         /* Make scsi midlayer do unlimited retries */
1591                         cmd->result = DID_IMM_RETRY << 16;
1592                         break;
1593                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1594                         dev_warn(&h->pdev->dev,
1595                                 "%s: task complete with aborted status.\n",
1596                                 "HP SSD Smart Path");
1597                         retry = 1;
1598                         break;
1599                 default:
1600                         dev_warn(&h->pdev->dev,
1601                                 "%s: task complete with unrecognized status: 0x%02x\n",
1602                                 "HP SSD Smart Path", c2->error_data.status);
1603                         retry = 1;
1604                         break;
1605                 }
1606                 break;
1607         case IOACCEL2_SERV_RESPONSE_FAILURE:
1608                 /* don't expect to get here. */
1609                 dev_warn(&h->pdev->dev,
1610                         "unexpected delivery or target failure, status = 0x%02x\n",
1611                         c2->error_data.status);
1612                 retry = 1;
1613                 break;
1614         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1615                 break;
1616         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1617                 break;
1618         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1619                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1620                 retry = 1;
1621                 break;
1622         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1623                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1624                 break;
1625         default:
1626                 dev_warn(&h->pdev->dev,
1627                         "%s: Unrecognized server response: 0x%02x\n",
1628                         "HP SSD Smart Path",
1629                         c2->error_data.serv_response);
1630                 retry = 1;
1631                 break;
1632         }
1633
1634         return retry;   /* retry on raid path? */
1635 }
1636
1637 static void process_ioaccel2_completion(struct ctlr_info *h,
1638                 struct CommandList *c, struct scsi_cmnd *cmd,
1639                 struct hpsa_scsi_dev_t *dev)
1640 {
1641         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1642         int raid_retry = 0;
1643
1644         /* check for good status */
1645         if (likely(c2->error_data.serv_response == 0 &&
1646                         c2->error_data.status == 0)) {
1647                 cmd_free(h, c);
1648                 cmd->scsi_done(cmd);
1649                 return;
1650         }
1651
1652         /* Any RAID offload error results in retry which will use
1653          * the normal I/O path so the controller can handle whatever's
1654          * wrong.
1655          */
1656         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1657                 c2->error_data.serv_response ==
1658                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1659                 dev->offload_enabled = 0;
1660                 h->drv_req_rescan = 1;  /* schedule controller for a rescan */
1661                 cmd->result = DID_SOFT_ERROR << 16;
1662                 cmd_free(h, c);
1663                 cmd->scsi_done(cmd);
1664                 return;
1665         }
1666         raid_retry = handle_ioaccel_mode2_error(h, c, cmd, c2);
1667         /* If error found, disable Smart Path, schedule a rescan,
1668          * and force a retry on the standard path.
1669          */
1670         if (raid_retry) {
1671                 dev_warn(&h->pdev->dev, "%s: Retrying on standard path.\n",
1672                         "HP SSD Smart Path");
1673                 dev->offload_enabled = 0; /* Disable Smart Path */
1674                 h->drv_req_rescan = 1;    /* schedule controller rescan */
1675                 cmd->result = DID_SOFT_ERROR << 16;
1676         }
1677         cmd_free(h, c);
1678         cmd->scsi_done(cmd);
1679 }
1680
1681 static void complete_scsi_command(struct CommandList *cp)
1682 {
1683         struct scsi_cmnd *cmd;
1684         struct ctlr_info *h;
1685         struct ErrorInfo *ei;
1686         struct hpsa_scsi_dev_t *dev;
1687
1688         unsigned char sense_key;
1689         unsigned char asc;      /* additional sense code */
1690         unsigned char ascq;     /* additional sense code qualifier */
1691         unsigned long sense_data_size;
1692
1693         ei = cp->err_info;
1694         cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1695         h = cp->h;
1696         dev = cmd->device->hostdata;
1697
1698         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1699         if ((cp->cmd_type == CMD_SCSI) &&
1700                 (cp->Header.SGTotal > h->max_cmd_sg_entries))
1701                 hpsa_unmap_sg_chain_block(h, cp);
1702
1703         cmd->result = (DID_OK << 16);           /* host byte */
1704         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1705
1706         if (cp->cmd_type == CMD_IOACCEL2)
1707                 return process_ioaccel2_completion(h, cp, cmd, dev);
1708
1709         cmd->result |= ei->ScsiStatus;
1710
1711         /* copy the sense data whether we need to or not. */
1712         if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1713                 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1714         else
1715                 sense_data_size = sizeof(ei->SenseInfo);
1716         if (ei->SenseLen < sense_data_size)
1717                 sense_data_size = ei->SenseLen;
1718
1719         memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1720         scsi_set_resid(cmd, ei->ResidualCnt);
1721
1722         if (ei->CommandStatus == 0) {
1723                 cmd_free(h, cp);
1724                 cmd->scsi_done(cmd);
1725                 return;
1726         }
1727
1728         /* For I/O accelerator commands, copy over some fields to the normal
1729          * CISS header used below for error handling.
1730          */
1731         if (cp->cmd_type == CMD_IOACCEL1) {
1732                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1733                 cp->Header.SGList = cp->Header.SGTotal = scsi_sg_count(cmd);
1734                 cp->Request.CDBLen = c->io_flags & IOACCEL1_IOFLAGS_CDBLEN_MASK;
1735                 cp->Header.Tag.lower = c->Tag.lower;
1736                 cp->Header.Tag.upper = c->Tag.upper;
1737                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
1738                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
1739
1740                 /* Any RAID offload error results in retry which will use
1741                  * the normal I/O path so the controller can handle whatever's
1742                  * wrong.
1743                  */
1744                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
1745                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
1746                                 dev->offload_enabled = 0;
1747                         cmd->result = DID_SOFT_ERROR << 16;
1748                         cmd_free(h, cp);
1749                         cmd->scsi_done(cmd);
1750                         return;
1751                 }
1752         }
1753
1754         /* an error has occurred */
1755         switch (ei->CommandStatus) {
1756
1757         case CMD_TARGET_STATUS:
1758                 if (ei->ScsiStatus) {
1759                         /* Get sense key */
1760                         sense_key = 0xf & ei->SenseInfo[2];
1761                         /* Get additional sense code */
1762                         asc = ei->SenseInfo[12];
1763                         /* Get addition sense code qualifier */
1764                         ascq = ei->SenseInfo[13];
1765                 }
1766
1767                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1768                         if (check_for_unit_attention(h, cp))
1769                                 break;
1770                         if (sense_key == ILLEGAL_REQUEST) {
1771                                 /*
1772                                  * SCSI REPORT_LUNS is commonly unsupported on
1773                                  * Smart Array.  Suppress noisy complaint.
1774                                  */
1775                                 if (cp->Request.CDB[0] == REPORT_LUNS)
1776                                         break;
1777
1778                                 /* If ASC/ASCQ indicate Logical Unit
1779                                  * Not Supported condition,
1780                                  */
1781                                 if ((asc == 0x25) && (ascq == 0x0)) {
1782                                         dev_warn(&h->pdev->dev, "cp %p "
1783                                                 "has check condition\n", cp);
1784                                         break;
1785                                 }
1786                         }
1787
1788                         if (sense_key == NOT_READY) {
1789                                 /* If Sense is Not Ready, Logical Unit
1790                                  * Not ready, Manual Intervention
1791                                  * required
1792                                  */
1793                                 if ((asc == 0x04) && (ascq == 0x03)) {
1794                                         dev_warn(&h->pdev->dev, "cp %p "
1795                                                 "has check condition: unit "
1796                                                 "not ready, manual "
1797                                                 "intervention required\n", cp);
1798                                         break;
1799                                 }
1800                         }
1801                         if (sense_key == ABORTED_COMMAND) {
1802                                 /* Aborted command is retryable */
1803                                 dev_warn(&h->pdev->dev, "cp %p "
1804                                         "has check condition: aborted command: "
1805                                         "ASC: 0x%x, ASCQ: 0x%x\n",
1806                                         cp, asc, ascq);
1807                                 cmd->result |= DID_SOFT_ERROR << 16;
1808                                 break;
1809                         }
1810                         /* Must be some other type of check condition */
1811                         dev_dbg(&h->pdev->dev, "cp %p has check condition: "
1812                                         "unknown type: "
1813                                         "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1814                                         "Returning result: 0x%x, "
1815                                         "cmd=[%02x %02x %02x %02x %02x "
1816                                         "%02x %02x %02x %02x %02x %02x "
1817                                         "%02x %02x %02x %02x %02x]\n",
1818                                         cp, sense_key, asc, ascq,
1819                                         cmd->result,
1820                                         cmd->cmnd[0], cmd->cmnd[1],
1821                                         cmd->cmnd[2], cmd->cmnd[3],
1822                                         cmd->cmnd[4], cmd->cmnd[5],
1823                                         cmd->cmnd[6], cmd->cmnd[7],
1824                                         cmd->cmnd[8], cmd->cmnd[9],
1825                                         cmd->cmnd[10], cmd->cmnd[11],
1826                                         cmd->cmnd[12], cmd->cmnd[13],
1827                                         cmd->cmnd[14], cmd->cmnd[15]);
1828                         break;
1829                 }
1830
1831
1832                 /* Problem was not a check condition
1833                  * Pass it up to the upper layers...
1834                  */
1835                 if (ei->ScsiStatus) {
1836                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1837                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1838                                 "Returning result: 0x%x\n",
1839                                 cp, ei->ScsiStatus,
1840                                 sense_key, asc, ascq,
1841                                 cmd->result);
1842                 } else {  /* scsi status is zero??? How??? */
1843                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1844                                 "Returning no connection.\n", cp),
1845
1846                         /* Ordinarily, this case should never happen,
1847                          * but there is a bug in some released firmware
1848                          * revisions that allows it to happen if, for
1849                          * example, a 4100 backplane loses power and
1850                          * the tape drive is in it.  We assume that
1851                          * it's a fatal error of some kind because we
1852                          * can't show that it wasn't. We will make it
1853                          * look like selection timeout since that is
1854                          * the most common reason for this to occur,
1855                          * and it's severe enough.
1856                          */
1857
1858                         cmd->result = DID_NO_CONNECT << 16;
1859                 }
1860                 break;
1861
1862         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1863                 break;
1864         case CMD_DATA_OVERRUN:
1865                 dev_warn(&h->pdev->dev, "cp %p has"
1866                         " completed with data overrun "
1867                         "reported\n", cp);
1868                 break;
1869         case CMD_INVALID: {
1870                 /* print_bytes(cp, sizeof(*cp), 1, 0);
1871                 print_cmd(cp); */
1872                 /* We get CMD_INVALID if you address a non-existent device
1873                  * instead of a selection timeout (no response).  You will
1874                  * see this if you yank out a drive, then try to access it.
1875                  * This is kind of a shame because it means that any other
1876                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
1877                  * missing target. */
1878                 cmd->result = DID_NO_CONNECT << 16;
1879         }
1880                 break;
1881         case CMD_PROTOCOL_ERR:
1882                 cmd->result = DID_ERROR << 16;
1883                 dev_warn(&h->pdev->dev, "cp %p has "
1884                         "protocol error\n", cp);
1885                 break;
1886         case CMD_HARDWARE_ERR:
1887                 cmd->result = DID_ERROR << 16;
1888                 dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp);
1889                 break;
1890         case CMD_CONNECTION_LOST:
1891                 cmd->result = DID_ERROR << 16;
1892                 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1893                 break;
1894         case CMD_ABORTED:
1895                 cmd->result = DID_ABORT << 16;
1896                 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1897                                 cp, ei->ScsiStatus);
1898                 break;
1899         case CMD_ABORT_FAILED:
1900                 cmd->result = DID_ERROR << 16;
1901                 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1902                 break;
1903         case CMD_UNSOLICITED_ABORT:
1904                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1905                 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1906                         "abort\n", cp);
1907                 break;
1908         case CMD_TIMEOUT:
1909                 cmd->result = DID_TIME_OUT << 16;
1910                 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1911                 break;
1912         case CMD_UNABORTABLE:
1913                 cmd->result = DID_ERROR << 16;
1914                 dev_warn(&h->pdev->dev, "Command unabortable\n");
1915                 break;
1916         case CMD_IOACCEL_DISABLED:
1917                 /* This only handles the direct pass-through case since RAID
1918                  * offload is handled above.  Just attempt a retry.
1919                  */
1920                 cmd->result = DID_SOFT_ERROR << 16;
1921                 dev_warn(&h->pdev->dev,
1922                                 "cp %p had HP SSD Smart Path error\n", cp);
1923                 break;
1924         default:
1925                 cmd->result = DID_ERROR << 16;
1926                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1927                                 cp, ei->CommandStatus);
1928         }
1929         cmd_free(h, cp);
1930         cmd->scsi_done(cmd);
1931 }
1932
1933 static void hpsa_pci_unmap(struct pci_dev *pdev,
1934         struct CommandList *c, int sg_used, int data_direction)
1935 {
1936         int i;
1937         union u64bit addr64;
1938
1939         for (i = 0; i < sg_used; i++) {
1940                 addr64.val32.lower = c->SG[i].Addr.lower;
1941                 addr64.val32.upper = c->SG[i].Addr.upper;
1942                 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1943                         data_direction);
1944         }
1945 }
1946
1947 static int hpsa_map_one(struct pci_dev *pdev,
1948                 struct CommandList *cp,
1949                 unsigned char *buf,
1950                 size_t buflen,
1951                 int data_direction)
1952 {
1953         u64 addr64;
1954
1955         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1956                 cp->Header.SGList = 0;
1957                 cp->Header.SGTotal = 0;
1958                 return 0;
1959         }
1960
1961         addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1962         if (dma_mapping_error(&pdev->dev, addr64)) {
1963                 /* Prevent subsequent unmap of something never mapped */
1964                 cp->Header.SGList = 0;
1965                 cp->Header.SGTotal = 0;
1966                 return -1;
1967         }
1968         cp->SG[0].Addr.lower =
1969           (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1970         cp->SG[0].Addr.upper =
1971           (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1972         cp->SG[0].Len = buflen;
1973         cp->SG[0].Ext = HPSA_SG_LAST; /* we are not chaining */
1974         cp->Header.SGList = (u8) 1;   /* no. SGs contig in this cmd */
1975         cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1976         return 0;
1977 }
1978
1979 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1980         struct CommandList *c)
1981 {
1982         DECLARE_COMPLETION_ONSTACK(wait);
1983
1984         c->waiting = &wait;
1985         enqueue_cmd_and_start_io(h, c);
1986         wait_for_completion(&wait);
1987 }
1988
1989 static u32 lockup_detected(struct ctlr_info *h)
1990 {
1991         int cpu;
1992         u32 rc, *lockup_detected;
1993
1994         cpu = get_cpu();
1995         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
1996         rc = *lockup_detected;
1997         put_cpu();
1998         return rc;
1999 }
2000
2001 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
2002         struct CommandList *c)
2003 {
2004         /* If controller lockup detected, fake a hardware error. */
2005         if (unlikely(lockup_detected(h)))
2006                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
2007         else
2008                 hpsa_scsi_do_simple_cmd_core(h, c);
2009 }
2010
2011 #define MAX_DRIVER_CMD_RETRIES 25
2012 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2013         struct CommandList *c, int data_direction)
2014 {
2015         int backoff_time = 10, retry_count = 0;
2016
2017         do {
2018                 memset(c->err_info, 0, sizeof(*c->err_info));
2019                 hpsa_scsi_do_simple_cmd_core(h, c);
2020                 retry_count++;
2021                 if (retry_count > 3) {
2022                         msleep(backoff_time);
2023                         if (backoff_time < 1000)
2024                                 backoff_time *= 2;
2025                 }
2026         } while ((check_for_unit_attention(h, c) ||
2027                         check_for_busy(h, c)) &&
2028                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2029         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2030 }
2031
2032 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2033                                 struct CommandList *c)
2034 {
2035         const u8 *cdb = c->Request.CDB;
2036         const u8 *lun = c->Header.LUN.LunAddrBytes;
2037
2038         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2039         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2040                 txt, lun[0], lun[1], lun[2], lun[3],
2041                 lun[4], lun[5], lun[6], lun[7],
2042                 cdb[0], cdb[1], cdb[2], cdb[3],
2043                 cdb[4], cdb[5], cdb[6], cdb[7],
2044                 cdb[8], cdb[9], cdb[10], cdb[11],
2045                 cdb[12], cdb[13], cdb[14], cdb[15]);
2046 }
2047
2048 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2049                         struct CommandList *cp)
2050 {
2051         const struct ErrorInfo *ei = cp->err_info;
2052         struct device *d = &cp->h->pdev->dev;
2053         const u8 *sd = ei->SenseInfo;
2054
2055         switch (ei->CommandStatus) {
2056         case CMD_TARGET_STATUS:
2057                 hpsa_print_cmd(h, "SCSI status", cp);
2058                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2059                         dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n",
2060                                 sd[2] & 0x0f, sd[12], sd[13]);
2061                 else
2062                         dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus);
2063                 if (ei->ScsiStatus == 0)
2064                         dev_warn(d, "SCSI status is abnormally zero.  "
2065                         "(probably indicates selection timeout "
2066                         "reported incorrectly due to a known "
2067                         "firmware bug, circa July, 2001.)\n");
2068                 break;
2069         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2070                 break;
2071         case CMD_DATA_OVERRUN:
2072                 hpsa_print_cmd(h, "overrun condition", cp);
2073                 break;
2074         case CMD_INVALID: {
2075                 /* controller unfortunately reports SCSI passthru's
2076                  * to non-existent targets as invalid commands.
2077                  */
2078                 hpsa_print_cmd(h, "invalid command", cp);
2079                 dev_warn(d, "probably means device no longer present\n");
2080                 }
2081                 break;
2082         case CMD_PROTOCOL_ERR:
2083                 hpsa_print_cmd(h, "protocol error", cp);
2084                 break;
2085         case CMD_HARDWARE_ERR:
2086                 hpsa_print_cmd(h, "hardware error", cp);
2087                 break;
2088         case CMD_CONNECTION_LOST:
2089                 hpsa_print_cmd(h, "connection lost", cp);
2090                 break;
2091         case CMD_ABORTED:
2092                 hpsa_print_cmd(h, "aborted", cp);
2093                 break;
2094         case CMD_ABORT_FAILED:
2095                 hpsa_print_cmd(h, "abort failed", cp);
2096                 break;
2097         case CMD_UNSOLICITED_ABORT:
2098                 hpsa_print_cmd(h, "unsolicited abort", cp);
2099                 break;
2100         case CMD_TIMEOUT:
2101                 hpsa_print_cmd(h, "timed out", cp);
2102                 break;
2103         case CMD_UNABORTABLE:
2104                 hpsa_print_cmd(h, "unabortable", cp);
2105                 break;
2106         default:
2107                 hpsa_print_cmd(h, "unknown status", cp);
2108                 dev_warn(d, "Unknown command status %x\n",
2109                                 ei->CommandStatus);
2110         }
2111 }
2112
2113 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2114                         u16 page, unsigned char *buf,
2115                         unsigned char bufsize)
2116 {
2117         int rc = IO_OK;
2118         struct CommandList *c;
2119         struct ErrorInfo *ei;
2120
2121         c = cmd_special_alloc(h);
2122
2123         if (c == NULL) {                        /* trouble... */
2124                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2125                 return -ENOMEM;
2126         }
2127
2128         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2129                         page, scsi3addr, TYPE_CMD)) {
2130                 rc = -1;
2131                 goto out;
2132         }
2133         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2134         ei = c->err_info;
2135         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2136                 hpsa_scsi_interpret_error(h, c);
2137                 rc = -1;
2138         }
2139 out:
2140         cmd_special_free(h, c);
2141         return rc;
2142 }
2143
2144 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2145                 unsigned char *scsi3addr, unsigned char page,
2146                 struct bmic_controller_parameters *buf, size_t bufsize)
2147 {
2148         int rc = IO_OK;
2149         struct CommandList *c;
2150         struct ErrorInfo *ei;
2151
2152         c = cmd_special_alloc(h);
2153
2154         if (c == NULL) {                        /* trouble... */
2155                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2156                 return -ENOMEM;
2157         }
2158
2159         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2160                         page, scsi3addr, TYPE_CMD)) {
2161                 rc = -1;
2162                 goto out;
2163         }
2164         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2165         ei = c->err_info;
2166         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2167                 hpsa_scsi_interpret_error(h, c);
2168                 rc = -1;
2169         }
2170 out:
2171         cmd_special_free(h, c);
2172         return rc;
2173         }
2174
2175 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2176         u8 reset_type)
2177 {
2178         int rc = IO_OK;
2179         struct CommandList *c;
2180         struct ErrorInfo *ei;
2181
2182         c = cmd_special_alloc(h);
2183
2184         if (c == NULL) {                        /* trouble... */
2185                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2186                 return -ENOMEM;
2187         }
2188
2189         /* fill_cmd can't fail here, no data buffer to map. */
2190         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2191                         scsi3addr, TYPE_MSG);
2192         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2193         hpsa_scsi_do_simple_cmd_core(h, c);
2194         /* no unmap needed here because no data xfer. */
2195
2196         ei = c->err_info;
2197         if (ei->CommandStatus != 0) {
2198                 hpsa_scsi_interpret_error(h, c);
2199                 rc = -1;
2200         }
2201         cmd_special_free(h, c);
2202         return rc;
2203 }
2204
2205 static void hpsa_get_raid_level(struct ctlr_info *h,
2206         unsigned char *scsi3addr, unsigned char *raid_level)
2207 {
2208         int rc;
2209         unsigned char *buf;
2210
2211         *raid_level = RAID_UNKNOWN;
2212         buf = kzalloc(64, GFP_KERNEL);
2213         if (!buf)
2214                 return;
2215         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2216         if (rc == 0)
2217                 *raid_level = buf[8];
2218         if (*raid_level > RAID_UNKNOWN)
2219                 *raid_level = RAID_UNKNOWN;
2220         kfree(buf);
2221         return;
2222 }
2223
2224 #define HPSA_MAP_DEBUG
2225 #ifdef HPSA_MAP_DEBUG
2226 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2227                                 struct raid_map_data *map_buff)
2228 {
2229         struct raid_map_disk_data *dd = &map_buff->data[0];
2230         int map, row, col;
2231         u16 map_cnt, row_cnt, disks_per_row;
2232
2233         if (rc != 0)
2234                 return;
2235
2236         /* Show details only if debugging has been activated. */
2237         if (h->raid_offload_debug < 2)
2238                 return;
2239
2240         dev_info(&h->pdev->dev, "structure_size = %u\n",
2241                                 le32_to_cpu(map_buff->structure_size));
2242         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2243                         le32_to_cpu(map_buff->volume_blk_size));
2244         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2245                         le64_to_cpu(map_buff->volume_blk_cnt));
2246         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2247                         map_buff->phys_blk_shift);
2248         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2249                         map_buff->parity_rotation_shift);
2250         dev_info(&h->pdev->dev, "strip_size = %u\n",
2251                         le16_to_cpu(map_buff->strip_size));
2252         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2253                         le64_to_cpu(map_buff->disk_starting_blk));
2254         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2255                         le64_to_cpu(map_buff->disk_blk_cnt));
2256         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2257                         le16_to_cpu(map_buff->data_disks_per_row));
2258         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2259                         le16_to_cpu(map_buff->metadata_disks_per_row));
2260         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2261                         le16_to_cpu(map_buff->row_cnt));
2262         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2263                         le16_to_cpu(map_buff->layout_map_count));
2264         dev_info(&h->pdev->dev, "flags = %u\n",
2265                         le16_to_cpu(map_buff->flags));
2266         if (map_buff->flags & RAID_MAP_FLAG_ENCRYPT_ON)
2267                 dev_info(&h->pdev->dev, "encrypytion = ON\n");
2268         else
2269                 dev_info(&h->pdev->dev, "encrypytion = OFF\n");
2270         dev_info(&h->pdev->dev, "dekindex = %u\n",
2271                         le16_to_cpu(map_buff->dekindex));
2272
2273         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2274         for (map = 0; map < map_cnt; map++) {
2275                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2276                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2277                 for (row = 0; row < row_cnt; row++) {
2278                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2279                         disks_per_row =
2280                                 le16_to_cpu(map_buff->data_disks_per_row);
2281                         for (col = 0; col < disks_per_row; col++, dd++)
2282                                 dev_info(&h->pdev->dev,
2283                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2284                                         col, dd->ioaccel_handle,
2285                                         dd->xor_mult[0], dd->xor_mult[1]);
2286                         disks_per_row =
2287                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2288                         for (col = 0; col < disks_per_row; col++, dd++)
2289                                 dev_info(&h->pdev->dev,
2290                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2291                                         col, dd->ioaccel_handle,
2292                                         dd->xor_mult[0], dd->xor_mult[1]);
2293                 }
2294         }
2295 }
2296 #else
2297 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2298                         __attribute__((unused)) int rc,
2299                         __attribute__((unused)) struct raid_map_data *map_buff)
2300 {
2301 }
2302 #endif
2303
2304 static int hpsa_get_raid_map(struct ctlr_info *h,
2305         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2306 {
2307         int rc = 0;
2308         struct CommandList *c;
2309         struct ErrorInfo *ei;
2310
2311         c = cmd_special_alloc(h);
2312         if (c == NULL) {
2313                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2314                 return -ENOMEM;
2315         }
2316         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2317                         sizeof(this_device->raid_map), 0,
2318                         scsi3addr, TYPE_CMD)) {
2319                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2320                 cmd_special_free(h, c);
2321                 return -ENOMEM;
2322         }
2323         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2324         ei = c->err_info;
2325         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2326                 hpsa_scsi_interpret_error(h, c);
2327                 cmd_special_free(h, c);
2328                 return -1;
2329         }
2330         cmd_special_free(h, c);
2331
2332         /* @todo in the future, dynamically allocate RAID map memory */
2333         if (le32_to_cpu(this_device->raid_map.structure_size) >
2334                                 sizeof(this_device->raid_map)) {
2335                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2336                 rc = -1;
2337         }
2338         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2339         return rc;
2340 }
2341
2342 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2343         unsigned char scsi3addr[], u8 page)
2344 {
2345         int rc;
2346         int i;
2347         int pages;
2348         unsigned char *buf, bufsize;
2349
2350         buf = kzalloc(256, GFP_KERNEL);
2351         if (!buf)
2352                 return 0;
2353
2354         /* Get the size of the page list first */
2355         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2356                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2357                                 buf, HPSA_VPD_HEADER_SZ);
2358         if (rc != 0)
2359                 goto exit_unsupported;
2360         pages = buf[3];
2361         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2362                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2363         else
2364                 bufsize = 255;
2365
2366         /* Get the whole VPD page list */
2367         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2368                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2369                                 buf, bufsize);
2370         if (rc != 0)
2371                 goto exit_unsupported;
2372
2373         pages = buf[3];
2374         for (i = 1; i <= pages; i++)
2375                 if (buf[3 + i] == page)
2376                         goto exit_supported;
2377 exit_unsupported:
2378         kfree(buf);
2379         return 0;
2380 exit_supported:
2381         kfree(buf);
2382         return 1;
2383 }
2384
2385 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2386         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2387 {
2388         int rc;
2389         unsigned char *buf;
2390         u8 ioaccel_status;
2391
2392         this_device->offload_config = 0;
2393         this_device->offload_enabled = 0;
2394
2395         buf = kzalloc(64, GFP_KERNEL);
2396         if (!buf)
2397                 return;
2398         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2399                 goto out;
2400         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2401                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2402         if (rc != 0)
2403                 goto out;
2404
2405 #define IOACCEL_STATUS_BYTE 4
2406 #define OFFLOAD_CONFIGURED_BIT 0x01
2407 #define OFFLOAD_ENABLED_BIT 0x02
2408         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2409         this_device->offload_config =
2410                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2411         if (this_device->offload_config) {
2412                 this_device->offload_enabled =
2413                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2414                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2415                         this_device->offload_enabled = 0;
2416         }
2417 out:
2418         kfree(buf);
2419         return;
2420 }
2421
2422 /* Get the device id from inquiry page 0x83 */
2423 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2424         unsigned char *device_id, int buflen)
2425 {
2426         int rc;
2427         unsigned char *buf;
2428
2429         if (buflen > 16)
2430                 buflen = 16;
2431         buf = kzalloc(64, GFP_KERNEL);
2432         if (!buf)
2433                 return -ENOMEM;
2434         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2435         if (rc == 0)
2436                 memcpy(device_id, &buf[8], buflen);
2437         kfree(buf);
2438         return rc != 0;
2439 }
2440
2441 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2442                 struct ReportLUNdata *buf, int bufsize,
2443                 int extended_response)
2444 {
2445         int rc = IO_OK;
2446         struct CommandList *c;
2447         unsigned char scsi3addr[8];
2448         struct ErrorInfo *ei;
2449
2450         c = cmd_special_alloc(h);
2451         if (c == NULL) {                        /* trouble... */
2452                 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2453                 return -1;
2454         }
2455         /* address the controller */
2456         memset(scsi3addr, 0, sizeof(scsi3addr));
2457         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2458                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2459                 rc = -1;
2460                 goto out;
2461         }
2462         if (extended_response)
2463                 c->Request.CDB[1] = extended_response;
2464         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2465         ei = c->err_info;
2466         if (ei->CommandStatus != 0 &&
2467             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2468                 hpsa_scsi_interpret_error(h, c);
2469                 rc = -1;
2470         } else {
2471                 if (buf->extended_response_flag != extended_response) {
2472                         dev_err(&h->pdev->dev,
2473                                 "report luns requested format %u, got %u\n",
2474                                 extended_response,
2475                                 buf->extended_response_flag);
2476                         rc = -1;
2477                 }
2478         }
2479 out:
2480         cmd_special_free(h, c);
2481         return rc;
2482 }
2483
2484 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2485                 struct ReportLUNdata *buf,
2486                 int bufsize, int extended_response)
2487 {
2488         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
2489 }
2490
2491 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2492                 struct ReportLUNdata *buf, int bufsize)
2493 {
2494         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2495 }
2496
2497 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2498         int bus, int target, int lun)
2499 {
2500         device->bus = bus;
2501         device->target = target;
2502         device->lun = lun;
2503 }
2504
2505 /* Use VPD inquiry to get details of volume status */
2506 static int hpsa_get_volume_status(struct ctlr_info *h,
2507                                         unsigned char scsi3addr[])
2508 {
2509         int rc;
2510         int status;
2511         int size;
2512         unsigned char *buf;
2513
2514         buf = kzalloc(64, GFP_KERNEL);
2515         if (!buf)
2516                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2517
2518         /* Does controller have VPD for logical volume status? */
2519         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2520                 goto exit_failed;
2521
2522         /* Get the size of the VPD return buffer */
2523         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2524                                         buf, HPSA_VPD_HEADER_SZ);
2525         if (rc != 0)
2526                 goto exit_failed;
2527         size = buf[3];
2528
2529         /* Now get the whole VPD buffer */
2530         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2531                                         buf, size + HPSA_VPD_HEADER_SZ);
2532         if (rc != 0)
2533                 goto exit_failed;
2534         status = buf[4]; /* status byte */
2535
2536         kfree(buf);
2537         return status;
2538 exit_failed:
2539         kfree(buf);
2540         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2541 }
2542
2543 /* Determine offline status of a volume.
2544  * Return either:
2545  *  0 (not offline)
2546  * -1 (offline for unknown reasons)
2547  *  # (integer code indicating one of several NOT READY states
2548  *     describing why a volume is to be kept offline)
2549  */
2550 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
2551                                         unsigned char scsi3addr[])
2552 {
2553         struct CommandList *c;
2554         unsigned char *sense, sense_key, asc, ascq;
2555         int ldstat = 0;
2556         u16 cmd_status;
2557         u8 scsi_status;
2558 #define ASC_LUN_NOT_READY 0x04
2559 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2560 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2561
2562         c = cmd_alloc(h);
2563         if (!c)
2564                 return 0;
2565         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2566         hpsa_scsi_do_simple_cmd_core(h, c);
2567         sense = c->err_info->SenseInfo;
2568         sense_key = sense[2];
2569         asc = sense[12];
2570         ascq = sense[13];
2571         cmd_status = c->err_info->CommandStatus;
2572         scsi_status = c->err_info->ScsiStatus;
2573         cmd_free(h, c);
2574         /* Is the volume 'not ready'? */
2575         if (cmd_status != CMD_TARGET_STATUS ||
2576                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2577                 sense_key != NOT_READY ||
2578                 asc != ASC_LUN_NOT_READY)  {
2579                 return 0;
2580         }
2581
2582         /* Determine the reason for not ready state */
2583         ldstat = hpsa_get_volume_status(h, scsi3addr);
2584
2585         /* Keep volume offline in certain cases: */
2586         switch (ldstat) {
2587         case HPSA_LV_UNDERGOING_ERASE:
2588         case HPSA_LV_UNDERGOING_RPI:
2589         case HPSA_LV_PENDING_RPI:
2590         case HPSA_LV_ENCRYPTED_NO_KEY:
2591         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2592         case HPSA_LV_UNDERGOING_ENCRYPTION:
2593         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2594         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2595                 return ldstat;
2596         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2597                 /* If VPD status page isn't available,
2598                  * use ASC/ASCQ to determine state
2599                  */
2600                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2601                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2602                         return ldstat;
2603                 break;
2604         default:
2605                 break;
2606         }
2607         return 0;
2608 }
2609
2610 static int hpsa_update_device_info(struct ctlr_info *h,
2611         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2612         unsigned char *is_OBDR_device)
2613 {
2614
2615 #define OBDR_SIG_OFFSET 43
2616 #define OBDR_TAPE_SIG "$DR-10"
2617 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2618 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2619
2620         unsigned char *inq_buff;
2621         unsigned char *obdr_sig;
2622
2623         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2624         if (!inq_buff)
2625                 goto bail_out;
2626
2627         /* Do an inquiry to the device to see what it is. */
2628         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2629                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2630                 /* Inquiry failed (msg printed already) */
2631                 dev_err(&h->pdev->dev,
2632                         "hpsa_update_device_info: inquiry failed\n");
2633                 goto bail_out;
2634         }
2635
2636         this_device->devtype = (inq_buff[0] & 0x1f);
2637         memcpy(this_device->scsi3addr, scsi3addr, 8);
2638         memcpy(this_device->vendor, &inq_buff[8],
2639                 sizeof(this_device->vendor));
2640         memcpy(this_device->model, &inq_buff[16],
2641                 sizeof(this_device->model));
2642         memset(this_device->device_id, 0,
2643                 sizeof(this_device->device_id));
2644         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2645                 sizeof(this_device->device_id));
2646
2647         if (this_device->devtype == TYPE_DISK &&
2648                 is_logical_dev_addr_mode(scsi3addr)) {
2649                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2650                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2651                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2652                 this_device->volume_offline =
2653                         hpsa_volume_offline(h, scsi3addr);
2654         } else {
2655                 this_device->raid_level = RAID_UNKNOWN;
2656                 this_device->offload_config = 0;
2657                 this_device->offload_enabled = 0;
2658                 this_device->volume_offline = 0;
2659         }
2660
2661         if (is_OBDR_device) {
2662                 /* See if this is a One-Button-Disaster-Recovery device
2663                  * by looking for "$DR-10" at offset 43 in inquiry data.
2664                  */
2665                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
2666                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
2667                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
2668                                                 OBDR_SIG_LEN) == 0);
2669         }
2670
2671         kfree(inq_buff);
2672         return 0;
2673
2674 bail_out:
2675         kfree(inq_buff);
2676         return 1;
2677 }
2678
2679 static unsigned char *ext_target_model[] = {
2680         "MSA2012",
2681         "MSA2024",
2682         "MSA2312",
2683         "MSA2324",
2684         "P2000 G3 SAS",
2685         "MSA 2040 SAS",
2686         NULL,
2687 };
2688
2689 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
2690 {
2691         int i;
2692
2693         for (i = 0; ext_target_model[i]; i++)
2694                 if (strncmp(device->model, ext_target_model[i],
2695                         strlen(ext_target_model[i])) == 0)
2696                         return 1;
2697         return 0;
2698 }
2699
2700 /* Helper function to assign bus, target, lun mapping of devices.
2701  * Puts non-external target logical volumes on bus 0, external target logical
2702  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
2703  * Logical drive target and lun are assigned at this time, but
2704  * physical device lun and target assignment are deferred (assigned
2705  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
2706  */
2707 static void figure_bus_target_lun(struct ctlr_info *h,
2708         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
2709 {
2710         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
2711
2712         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
2713                 /* physical device, target and lun filled in later */
2714                 if (is_hba_lunid(lunaddrbytes))
2715                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
2716                 else
2717                         /* defer target, lun assignment for physical devices */
2718                         hpsa_set_bus_target_lun(device, 2, -1, -1);
2719                 return;
2720         }
2721         /* It's a logical device */
2722         if (is_ext_target(h, device)) {
2723                 /* external target way, put logicals on bus 1
2724                  * and match target/lun numbers box
2725                  * reports, other smart array, bus 0, target 0, match lunid
2726                  */
2727                 hpsa_set_bus_target_lun(device,
2728                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
2729                 return;
2730         }
2731         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
2732 }
2733
2734 /*
2735  * If there is no lun 0 on a target, linux won't find any devices.
2736  * For the external targets (arrays), we have to manually detect the enclosure
2737  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
2738  * it for some reason.  *tmpdevice is the target we're adding,
2739  * this_device is a pointer into the current element of currentsd[]
2740  * that we're building up in update_scsi_devices(), below.
2741  * lunzerobits is a bitmap that tracks which targets already have a
2742  * lun 0 assigned.
2743  * Returns 1 if an enclosure was added, 0 if not.
2744  */
2745 static int add_ext_target_dev(struct ctlr_info *h,
2746         struct hpsa_scsi_dev_t *tmpdevice,
2747         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
2748         unsigned long lunzerobits[], int *n_ext_target_devs)
2749 {
2750         unsigned char scsi3addr[8];
2751
2752         if (test_bit(tmpdevice->target, lunzerobits))
2753                 return 0; /* There is already a lun 0 on this target. */
2754
2755         if (!is_logical_dev_addr_mode(lunaddrbytes))
2756                 return 0; /* It's the logical targets that may lack lun 0. */
2757
2758         if (!is_ext_target(h, tmpdevice))
2759                 return 0; /* Only external target devices have this problem. */
2760
2761         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
2762                 return 0;
2763
2764         memset(scsi3addr, 0, 8);
2765         scsi3addr[3] = tmpdevice->target;
2766         if (is_hba_lunid(scsi3addr))
2767                 return 0; /* Don't add the RAID controller here. */
2768
2769         if (is_scsi_rev_5(h))
2770                 return 0; /* p1210m doesn't need to do this. */
2771
2772         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
2773                 dev_warn(&h->pdev->dev, "Maximum number of external "
2774                         "target devices exceeded.  Check your hardware "
2775                         "configuration.");
2776                 return 0;
2777         }
2778
2779         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
2780                 return 0;
2781         (*n_ext_target_devs)++;
2782         hpsa_set_bus_target_lun(this_device,
2783                                 tmpdevice->bus, tmpdevice->target, 0);
2784         set_bit(tmpdevice->target, lunzerobits);
2785         return 1;
2786 }
2787
2788 /*
2789  * Get address of physical disk used for an ioaccel2 mode command:
2790  *      1. Extract ioaccel2 handle from the command.
2791  *      2. Find a matching ioaccel2 handle from list of physical disks.
2792  *      3. Return:
2793  *              1 and set scsi3addr to address of matching physical
2794  *              0 if no matching physical disk was found.
2795  */
2796 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
2797         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
2798 {
2799         struct ReportExtendedLUNdata *physicals = NULL;
2800         int responsesize = 24;  /* size of physical extended response */
2801         int extended = 2;       /* flag forces reporting 'other dev info'. */
2802         int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize;
2803         u32 nphysicals = 0;     /* number of reported physical devs */
2804         int found = 0;          /* found match (1) or not (0) */
2805         u32 find;               /* handle we need to match */
2806         int i;
2807         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
2808         struct hpsa_scsi_dev_t *d; /* device of request being aborted */
2809         struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */
2810         u32 it_nexus;           /* 4 byte device handle for the ioaccel2 cmd */
2811         u32 scsi_nexus;         /* 4 byte device handle for the ioaccel2 cmd */
2812
2813         if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2)
2814                 return 0; /* no match */
2815
2816         /* point to the ioaccel2 device handle */
2817         c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
2818         if (c2a == NULL)
2819                 return 0; /* no match */
2820
2821         scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd;
2822         if (scmd == NULL)
2823                 return 0; /* no match */
2824
2825         d = scmd->device->hostdata;
2826         if (d == NULL)
2827                 return 0; /* no match */
2828
2829         it_nexus = cpu_to_le32((u32) d->ioaccel_handle);
2830         scsi_nexus = cpu_to_le32((u32) c2a->scsi_nexus);
2831         find = c2a->scsi_nexus;
2832
2833         if (h->raid_offload_debug > 0)
2834                 dev_info(&h->pdev->dev,
2835                         "%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
2836                         __func__, scsi_nexus,
2837                         d->device_id[0], d->device_id[1], d->device_id[2],
2838                         d->device_id[3], d->device_id[4], d->device_id[5],
2839                         d->device_id[6], d->device_id[7], d->device_id[8],
2840                         d->device_id[9], d->device_id[10], d->device_id[11],
2841                         d->device_id[12], d->device_id[13], d->device_id[14],
2842                         d->device_id[15]);
2843
2844         /* Get the list of physical devices */
2845         physicals = kzalloc(reportsize, GFP_KERNEL);
2846         if (physicals == NULL)
2847                 return 0;
2848         if (hpsa_scsi_do_report_phys_luns(h, (struct ReportLUNdata *) physicals,
2849                 reportsize, extended)) {
2850                 dev_err(&h->pdev->dev,
2851                         "Can't lookup %s device handle: report physical LUNs failed.\n",
2852                         "HP SSD Smart Path");
2853                 kfree(physicals);
2854                 return 0;
2855         }
2856         nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) /
2857                                                         responsesize;
2858
2859         /* find ioaccel2 handle in list of physicals: */
2860         for (i = 0; i < nphysicals; i++) {
2861                 struct ext_report_lun_entry *entry = &physicals->LUN[i];
2862
2863                 /* handle is in bytes 28-31 of each lun */
2864                 if (entry->ioaccel_handle != find)
2865                         continue; /* didn't match */
2866                 found = 1;
2867                 memcpy(scsi3addr, entry->lunid, 8);
2868                 if (h->raid_offload_debug > 0)
2869                         dev_info(&h->pdev->dev,
2870                                 "%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n",
2871                                 __func__, find,
2872                                 entry->ioaccel_handle, scsi3addr);
2873                 break; /* found it */
2874         }
2875
2876         kfree(physicals);
2877         if (found)
2878                 return 1;
2879         else
2880                 return 0;
2881
2882 }
2883 /*
2884  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
2885  * logdev.  The number of luns in physdev and logdev are returned in
2886  * *nphysicals and *nlogicals, respectively.
2887  * Returns 0 on success, -1 otherwise.
2888  */
2889 static int hpsa_gather_lun_info(struct ctlr_info *h,
2890         int reportlunsize,
2891         struct ReportLUNdata *physdev, u32 *nphysicals, int *physical_mode,
2892         struct ReportLUNdata *logdev, u32 *nlogicals)
2893 {
2894         int physical_entry_size = 8;
2895
2896         *physical_mode = 0;
2897
2898         /* For I/O accelerator mode we need to read physical device handles */
2899         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
2900                 h->transMethod & CFGTBL_Trans_io_accel2) {
2901                 *physical_mode = HPSA_REPORT_PHYS_EXTENDED;
2902                 physical_entry_size = 24;
2903         }
2904         if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize,
2905                                                         *physical_mode)) {
2906                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
2907                 return -1;
2908         }
2909         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) /
2910                                                         physical_entry_size;
2911         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
2912                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
2913                         "  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2914                         *nphysicals - HPSA_MAX_PHYS_LUN);
2915                 *nphysicals = HPSA_MAX_PHYS_LUN;
2916         }
2917         if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
2918                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
2919                 return -1;
2920         }
2921         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
2922         /* Reject Logicals in excess of our max capability. */
2923         if (*nlogicals > HPSA_MAX_LUN) {
2924                 dev_warn(&h->pdev->dev,
2925                         "maximum logical LUNs (%d) exceeded.  "
2926                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
2927                         *nlogicals - HPSA_MAX_LUN);
2928                         *nlogicals = HPSA_MAX_LUN;
2929         }
2930         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
2931                 dev_warn(&h->pdev->dev,
2932                         "maximum logical + physical LUNs (%d) exceeded. "
2933                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2934                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
2935                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
2936         }
2937         return 0;
2938 }
2939
2940 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
2941         int nphysicals, int nlogicals,
2942         struct ReportExtendedLUNdata *physdev_list,
2943         struct ReportLUNdata *logdev_list)
2944 {
2945         /* Helper function, figure out where the LUN ID info is coming from
2946          * given index i, lists of physical and logical devices, where in
2947          * the list the raid controller is supposed to appear (first or last)
2948          */
2949
2950         int logicals_start = nphysicals + (raid_ctlr_position == 0);
2951         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
2952
2953         if (i == raid_ctlr_position)
2954                 return RAID_CTLR_LUNID;
2955
2956         if (i < logicals_start)
2957                 return &physdev_list->LUN[i -
2958                                 (raid_ctlr_position == 0)].lunid[0];
2959
2960         if (i < last_device)
2961                 return &logdev_list->LUN[i - nphysicals -
2962                         (raid_ctlr_position == 0)][0];
2963         BUG();
2964         return NULL;
2965 }
2966
2967 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
2968 {
2969         int rc;
2970         int hba_mode_enabled;
2971         struct bmic_controller_parameters *ctlr_params;
2972         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
2973                 GFP_KERNEL);
2974
2975         if (!ctlr_params)
2976                 return -ENOMEM;
2977         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
2978                 sizeof(struct bmic_controller_parameters));
2979         if (rc) {
2980                 kfree(ctlr_params);
2981                 return rc;
2982         }
2983
2984         hba_mode_enabled =
2985                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
2986         kfree(ctlr_params);
2987         return hba_mode_enabled;
2988 }
2989
2990 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
2991 {
2992         /* the idea here is we could get notified
2993          * that some devices have changed, so we do a report
2994          * physical luns and report logical luns cmd, and adjust
2995          * our list of devices accordingly.
2996          *
2997          * The scsi3addr's of devices won't change so long as the
2998          * adapter is not reset.  That means we can rescan and
2999          * tell which devices we already know about, vs. new
3000          * devices, vs.  disappearing devices.
3001          */
3002         struct ReportExtendedLUNdata *physdev_list = NULL;
3003         struct ReportLUNdata *logdev_list = NULL;
3004         u32 nphysicals = 0;
3005         u32 nlogicals = 0;
3006         int physical_mode = 0;
3007         u32 ndev_allocated = 0;
3008         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3009         int ncurrent = 0;
3010         int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 24;
3011         int i, n_ext_target_devs, ndevs_to_allocate;
3012         int raid_ctlr_position;
3013         int rescan_hba_mode;
3014         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3015
3016         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3017         physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
3018         logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
3019         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3020
3021         if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
3022                 dev_err(&h->pdev->dev, "out of memory\n");
3023                 goto out;
3024         }
3025         memset(lunzerobits, 0, sizeof(lunzerobits));
3026
3027         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3028         if (rescan_hba_mode < 0)
3029                 goto out;
3030
3031         if (!h->hba_mode_enabled && rescan_hba_mode)
3032                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3033         else if (h->hba_mode_enabled && !rescan_hba_mode)
3034                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3035
3036         h->hba_mode_enabled = rescan_hba_mode;
3037
3038         if (hpsa_gather_lun_info(h, reportlunsize,
3039                         (struct ReportLUNdata *) physdev_list, &nphysicals,
3040                         &physical_mode, logdev_list, &nlogicals))
3041                 goto out;
3042
3043         /* We might see up to the maximum number of logical and physical disks
3044          * plus external target devices, and a device for the local RAID
3045          * controller.
3046          */
3047         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3048
3049         /* Allocate the per device structures */
3050         for (i = 0; i < ndevs_to_allocate; i++) {
3051                 if (i >= HPSA_MAX_DEVICES) {
3052                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3053                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3054                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3055                         break;
3056                 }
3057
3058                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3059                 if (!currentsd[i]) {
3060                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3061                                 __FILE__, __LINE__);
3062                         goto out;
3063                 }
3064                 ndev_allocated++;
3065         }
3066
3067         if (is_scsi_rev_5(h))
3068                 raid_ctlr_position = 0;
3069         else
3070                 raid_ctlr_position = nphysicals + nlogicals;
3071
3072         /* adjust our table of devices */
3073         n_ext_target_devs = 0;
3074         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3075                 u8 *lunaddrbytes, is_OBDR = 0;
3076
3077                 /* Figure out where the LUN ID info is coming from */
3078                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3079                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3080                 /* skip masked physical devices. */
3081                 if (lunaddrbytes[3] & 0xC0 &&
3082                         i < nphysicals + (raid_ctlr_position == 0))
3083                         continue;
3084
3085                 /* Get device type, vendor, model, device id */
3086                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3087                                                         &is_OBDR))
3088                         continue; /* skip it if we can't talk to it. */
3089                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3090                 this_device = currentsd[ncurrent];
3091
3092                 /*
3093                  * For external target devices, we have to insert a LUN 0 which
3094                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3095                  * is nonetheless an enclosure device there.  We have to
3096                  * present that otherwise linux won't find anything if
3097                  * there is no lun 0.
3098                  */
3099                 if (add_ext_target_dev(h, tmpdevice, this_device,
3100                                 lunaddrbytes, lunzerobits,
3101                                 &n_ext_target_devs)) {
3102                         ncurrent++;
3103                         this_device = currentsd[ncurrent];
3104                 }
3105
3106                 *this_device = *tmpdevice;
3107
3108                 switch (this_device->devtype) {
3109                 case TYPE_ROM:
3110                         /* We don't *really* support actual CD-ROM devices,
3111                          * just "One Button Disaster Recovery" tape drive
3112                          * which temporarily pretends to be a CD-ROM drive.
3113                          * So we check that the device is really an OBDR tape
3114                          * device by checking for "$DR-10" in bytes 43-48 of
3115                          * the inquiry data.
3116                          */
3117                         if (is_OBDR)
3118                                 ncurrent++;
3119                         break;
3120                 case TYPE_DISK:
3121                         if (h->hba_mode_enabled) {
3122                                 /* never use raid mapper in HBA mode */
3123                                 this_device->offload_enabled = 0;
3124                                 ncurrent++;
3125                                 break;
3126                         } else if (h->acciopath_status) {
3127                                 if (i >= nphysicals) {
3128                                         ncurrent++;
3129                                         break;
3130                                 }
3131                         } else {
3132                                 if (i < nphysicals)
3133                                         break;
3134                                 ncurrent++;
3135                                 break;
3136                         }
3137                         if (physical_mode == HPSA_REPORT_PHYS_EXTENDED) {
3138                                 memcpy(&this_device->ioaccel_handle,
3139                                         &lunaddrbytes[20],
3140                                         sizeof(this_device->ioaccel_handle));
3141                                 ncurrent++;
3142                         }
3143                         break;
3144                 case TYPE_TAPE:
3145                 case TYPE_MEDIUM_CHANGER:
3146                         ncurrent++;
3147                         break;
3148                 case TYPE_RAID:
3149                         /* Only present the Smartarray HBA as a RAID controller.
3150                          * If it's a RAID controller other than the HBA itself
3151                          * (an external RAID controller, MSA500 or similar)
3152                          * don't present it.
3153                          */
3154                         if (!is_hba_lunid(lunaddrbytes))
3155                                 break;
3156                         ncurrent++;
3157                         break;
3158                 default:
3159                         break;
3160                 }
3161                 if (ncurrent >= HPSA_MAX_DEVICES)
3162                         break;
3163         }
3164         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3165 out:
3166         kfree(tmpdevice);
3167         for (i = 0; i < ndev_allocated; i++)
3168                 kfree(currentsd[i]);
3169         kfree(currentsd);
3170         kfree(physdev_list);
3171         kfree(logdev_list);
3172 }
3173
3174 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3175  * dma mapping  and fills in the scatter gather entries of the
3176  * hpsa command, cp.
3177  */
3178 static int hpsa_scatter_gather(struct ctlr_info *h,
3179                 struct CommandList *cp,
3180                 struct scsi_cmnd *cmd)
3181 {
3182         unsigned int len;
3183         struct scatterlist *sg;
3184         u64 addr64;
3185         int use_sg, i, sg_index, chained;
3186         struct SGDescriptor *curr_sg;
3187
3188         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3189
3190         use_sg = scsi_dma_map(cmd);
3191         if (use_sg < 0)
3192                 return use_sg;
3193
3194         if (!use_sg)
3195                 goto sglist_finished;
3196
3197         curr_sg = cp->SG;
3198         chained = 0;
3199         sg_index = 0;
3200         scsi_for_each_sg(cmd, sg, use_sg, i) {
3201                 if (i == h->max_cmd_sg_entries - 1 &&
3202                         use_sg > h->max_cmd_sg_entries) {
3203                         chained = 1;
3204                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3205                         sg_index = 0;
3206                 }
3207                 addr64 = (u64) sg_dma_address(sg);
3208                 len  = sg_dma_len(sg);
3209                 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
3210                 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
3211                 curr_sg->Len = len;
3212                 curr_sg->Ext = (i < scsi_sg_count(cmd) - 1) ? 0 : HPSA_SG_LAST;
3213                 curr_sg++;
3214         }
3215
3216         if (use_sg + chained > h->maxSG)
3217                 h->maxSG = use_sg + chained;
3218
3219         if (chained) {
3220                 cp->Header.SGList = h->max_cmd_sg_entries;
3221                 cp->Header.SGTotal = (u16) (use_sg + 1);
3222                 if (hpsa_map_sg_chain_block(h, cp)) {
3223                         scsi_dma_unmap(cmd);
3224                         return -1;
3225                 }
3226                 return 0;
3227         }
3228
3229 sglist_finished:
3230
3231         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3232         cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
3233         return 0;
3234 }
3235
3236 #define IO_ACCEL_INELIGIBLE (1)
3237 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3238 {
3239         int is_write = 0;
3240         u32 block;
3241         u32 block_cnt;
3242
3243         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3244         switch (cdb[0]) {
3245         case WRITE_6:
3246         case WRITE_12:
3247                 is_write = 1;
3248         case READ_6:
3249         case READ_12:
3250                 if (*cdb_len == 6) {
3251                         block = (((u32) cdb[2]) << 8) | cdb[3];
3252                         block_cnt = cdb[4];
3253                 } else {
3254                         BUG_ON(*cdb_len != 12);
3255                         block = (((u32) cdb[2]) << 24) |
3256                                 (((u32) cdb[3]) << 16) |
3257                                 (((u32) cdb[4]) << 8) |
3258                                 cdb[5];
3259                         block_cnt =
3260                                 (((u32) cdb[6]) << 24) |
3261                                 (((u32) cdb[7]) << 16) |
3262                                 (((u32) cdb[8]) << 8) |
3263                                 cdb[9];
3264                 }
3265                 if (block_cnt > 0xffff)
3266                         return IO_ACCEL_INELIGIBLE;
3267
3268                 cdb[0] = is_write ? WRITE_10 : READ_10;
3269                 cdb[1] = 0;
3270                 cdb[2] = (u8) (block >> 24);
3271                 cdb[3] = (u8) (block >> 16);
3272                 cdb[4] = (u8) (block >> 8);
3273                 cdb[5] = (u8) (block);
3274                 cdb[6] = 0;
3275                 cdb[7] = (u8) (block_cnt >> 8);
3276                 cdb[8] = (u8) (block_cnt);
3277                 cdb[9] = 0;
3278                 *cdb_len = 10;
3279                 break;
3280         }
3281         return 0;
3282 }
3283
3284 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3285         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3286         u8 *scsi3addr)
3287 {
3288         struct scsi_cmnd *cmd = c->scsi_cmd;
3289         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3290         unsigned int len;
3291         unsigned int total_len = 0;
3292         struct scatterlist *sg;
3293         u64 addr64;
3294         int use_sg, i;
3295         struct SGDescriptor *curr_sg;
3296         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3297
3298         /* TODO: implement chaining support */
3299         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3300                 return IO_ACCEL_INELIGIBLE;
3301
3302         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3303
3304         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3305                 return IO_ACCEL_INELIGIBLE;
3306
3307         c->cmd_type = CMD_IOACCEL1;
3308
3309         /* Adjust the DMA address to point to the accelerated command buffer */
3310         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3311                                 (c->cmdindex * sizeof(*cp));
3312         BUG_ON(c->busaddr & 0x0000007F);
3313
3314         use_sg = scsi_dma_map(cmd);
3315         if (use_sg < 0)
3316                 return use_sg;
3317
3318         if (use_sg) {
3319                 curr_sg = cp->SG;
3320                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3321                         addr64 = (u64) sg_dma_address(sg);
3322                         len  = sg_dma_len(sg);
3323                         total_len += len;
3324                         curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
3325                         curr_sg->Addr.upper =
3326                                 (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
3327                         curr_sg->Len = len;
3328
3329                         if (i == (scsi_sg_count(cmd) - 1))
3330                                 curr_sg->Ext = HPSA_SG_LAST;
3331                         else
3332                                 curr_sg->Ext = 0;  /* we are not chaining */
3333                         curr_sg++;
3334                 }
3335
3336                 switch (cmd->sc_data_direction) {
3337                 case DMA_TO_DEVICE:
3338                         control |= IOACCEL1_CONTROL_DATA_OUT;
3339                         break;
3340                 case DMA_FROM_DEVICE:
3341                         control |= IOACCEL1_CONTROL_DATA_IN;
3342                         break;
3343                 case DMA_NONE:
3344                         control |= IOACCEL1_CONTROL_NODATAXFER;
3345                         break;
3346                 default:
3347                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3348                         cmd->sc_data_direction);
3349                         BUG();
3350                         break;
3351                 }
3352         } else {
3353                 control |= IOACCEL1_CONTROL_NODATAXFER;
3354         }
3355
3356         c->Header.SGList = use_sg;
3357         /* Fill out the command structure to submit */
3358         cp->dev_handle = ioaccel_handle & 0xFFFF;
3359         cp->transfer_len = total_len;
3360         cp->io_flags = IOACCEL1_IOFLAGS_IO_REQ |
3361                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK);
3362         cp->control = control;
3363         memcpy(cp->CDB, cdb, cdb_len);
3364         memcpy(cp->CISS_LUN, scsi3addr, 8);
3365         /* Tag was already set at init time. */
3366         enqueue_cmd_and_start_io(h, c);
3367         return 0;
3368 }
3369
3370 /*
3371  * Queue a command directly to a device behind the controller using the
3372  * I/O accelerator path.
3373  */
3374 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3375         struct CommandList *c)
3376 {
3377         struct scsi_cmnd *cmd = c->scsi_cmd;
3378         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3379
3380         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3381                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr);
3382 }
3383
3384 /*
3385  * Set encryption parameters for the ioaccel2 request
3386  */
3387 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3388         struct CommandList *c, struct io_accel2_cmd *cp)
3389 {
3390         struct scsi_cmnd *cmd = c->scsi_cmd;
3391         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3392         struct raid_map_data *map = &dev->raid_map;
3393         u64 first_block;
3394
3395         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3396
3397         /* Are we doing encryption on this device */
3398         if (!(map->flags & RAID_MAP_FLAG_ENCRYPT_ON))
3399                 return;
3400         /* Set the data encryption key index. */
3401         cp->dekindex = map->dekindex;
3402
3403         /* Set the encryption enable flag, encoded into direction field. */
3404         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3405
3406         /* Set encryption tweak values based on logical block address
3407          * If block size is 512, tweak value is LBA.
3408          * For other block sizes, tweak is (LBA * block size)/ 512)
3409          */
3410         switch (cmd->cmnd[0]) {
3411         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3412         case WRITE_6:
3413         case READ_6:
3414                 if (map->volume_blk_size == 512) {
3415                         cp->tweak_lower =
3416                                 (((u32) cmd->cmnd[2]) << 8) |
3417                                         cmd->cmnd[3];
3418                         cp->tweak_upper = 0;
3419                 } else {
3420                         first_block =
3421                                 (((u64) cmd->cmnd[2]) << 8) |
3422                                         cmd->cmnd[3];
3423                         first_block = (first_block * map->volume_blk_size)/512;
3424                         cp->tweak_lower = (u32)first_block;
3425                         cp->tweak_upper = (u32)(first_block >> 32);
3426                 }
3427                 break;
3428         case WRITE_10:
3429         case READ_10:
3430                 if (map->volume_blk_size == 512) {
3431                         cp->tweak_lower =
3432                                 (((u32) cmd->cmnd[2]) << 24) |
3433                                 (((u32) cmd->cmnd[3]) << 16) |
3434                                 (((u32) cmd->cmnd[4]) << 8) |
3435                                         cmd->cmnd[5];
3436                         cp->tweak_upper = 0;
3437                 } else {
3438                         first_block =
3439                                 (((u64) cmd->cmnd[2]) << 24) |
3440                                 (((u64) cmd->cmnd[3]) << 16) |
3441                                 (((u64) cmd->cmnd[4]) << 8) |
3442                                         cmd->cmnd[5];
3443                         first_block = (first_block * map->volume_blk_size)/512;
3444                         cp->tweak_lower = (u32)first_block;
3445                         cp->tweak_upper = (u32)(first_block >> 32);
3446                 }
3447                 break;
3448         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3449         case WRITE_12:
3450         case READ_12:
3451                 if (map->volume_blk_size == 512) {
3452                         cp->tweak_lower =
3453                                 (((u32) cmd->cmnd[2]) << 24) |
3454                                 (((u32) cmd->cmnd[3]) << 16) |
3455                                 (((u32) cmd->cmnd[4]) << 8) |
3456                                         cmd->cmnd[5];
3457                         cp->tweak_upper = 0;
3458                 } else {
3459                         first_block =
3460                                 (((u64) cmd->cmnd[2]) << 24) |
3461                                 (((u64) cmd->cmnd[3]) << 16) |
3462                                 (((u64) cmd->cmnd[4]) << 8) |
3463                                         cmd->cmnd[5];
3464                         first_block = (first_block * map->volume_blk_size)/512;
3465                         cp->tweak_lower = (u32)first_block;
3466                         cp->tweak_upper = (u32)(first_block >> 32);
3467                 }
3468                 break;
3469         case WRITE_16:
3470         case READ_16:
3471                 if (map->volume_blk_size == 512) {
3472                         cp->tweak_lower =
3473                                 (((u32) cmd->cmnd[6]) << 24) |
3474                                 (((u32) cmd->cmnd[7]) << 16) |
3475                                 (((u32) cmd->cmnd[8]) << 8) |
3476                                         cmd->cmnd[9];
3477                         cp->tweak_upper =
3478                                 (((u32) cmd->cmnd[2]) << 24) |
3479                                 (((u32) cmd->cmnd[3]) << 16) |
3480                                 (((u32) cmd->cmnd[4]) << 8) |
3481                                         cmd->cmnd[5];
3482                 } else {
3483                         first_block =
3484                                 (((u64) cmd->cmnd[2]) << 56) |
3485                                 (((u64) cmd->cmnd[3]) << 48) |
3486                                 (((u64) cmd->cmnd[4]) << 40) |
3487                                 (((u64) cmd->cmnd[5]) << 32) |
3488                                 (((u64) cmd->cmnd[6]) << 24) |
3489                                 (((u64) cmd->cmnd[7]) << 16) |
3490                                 (((u64) cmd->cmnd[8]) << 8) |
3491                                         cmd->cmnd[9];
3492                         first_block = (first_block * map->volume_blk_size)/512;
3493                         cp->tweak_lower = (u32)first_block;
3494                         cp->tweak_upper = (u32)(first_block >> 32);
3495                 }
3496                 break;
3497         default:
3498                 dev_err(&h->pdev->dev,
3499                         "ERROR: %s: IOACCEL request CDB size not supported for encryption\n",
3500                         __func__);
3501                 BUG();
3502                 break;
3503         }
3504 }
3505
3506 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3507         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3508         u8 *scsi3addr)
3509 {
3510         struct scsi_cmnd *cmd = c->scsi_cmd;
3511         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3512         struct ioaccel2_sg_element *curr_sg;
3513         int use_sg, i;
3514         struct scatterlist *sg;
3515         u64 addr64;
3516         u32 len;
3517         u32 total_len = 0;
3518
3519         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3520                 return IO_ACCEL_INELIGIBLE;
3521
3522         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3523                 return IO_ACCEL_INELIGIBLE;
3524         c->cmd_type = CMD_IOACCEL2;
3525         /* Adjust the DMA address to point to the accelerated command buffer */
3526         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3527                                 (c->cmdindex * sizeof(*cp));
3528         BUG_ON(c->busaddr & 0x0000007F);
3529
3530         memset(cp, 0, sizeof(*cp));
3531         cp->IU_type = IOACCEL2_IU_TYPE;
3532
3533         use_sg = scsi_dma_map(cmd);
3534         if (use_sg < 0)
3535                 return use_sg;
3536
3537         if (use_sg) {
3538                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3539                 curr_sg = cp->sg;
3540                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3541                         addr64 = (u64) sg_dma_address(sg);
3542                         len  = sg_dma_len(sg);
3543                         total_len += len;
3544                         curr_sg->address = cpu_to_le64(addr64);
3545                         curr_sg->length = cpu_to_le32(len);
3546                         curr_sg->reserved[0] = 0;
3547                         curr_sg->reserved[1] = 0;
3548                         curr_sg->reserved[2] = 0;
3549                         curr_sg->chain_indicator = 0;
3550                         curr_sg++;
3551                 }
3552
3553                 switch (cmd->sc_data_direction) {
3554                 case DMA_TO_DEVICE:
3555                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3556                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3557                         break;
3558                 case DMA_FROM_DEVICE:
3559                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3560                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3561                         break;
3562                 case DMA_NONE:
3563                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3564                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3565                         break;
3566                 default:
3567                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3568                                 cmd->sc_data_direction);
3569                         BUG();
3570                         break;
3571                 }
3572         } else {
3573                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3574                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3575         }
3576
3577         /* Set encryption parameters, if necessary */
3578         set_encrypt_ioaccel2(h, c, cp);
3579
3580         cp->scsi_nexus = ioaccel_handle;
3581         cp->Tag = (c->cmdindex << DIRECT_LOOKUP_SHIFT) |
3582                                 DIRECT_LOOKUP_BIT;
3583         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3584
3585         /* fill in sg elements */
3586         cp->sg_count = (u8) use_sg;
3587
3588         cp->data_len = cpu_to_le32(total_len);
3589         cp->err_ptr = cpu_to_le64(c->busaddr +
3590                         offsetof(struct io_accel2_cmd, error_data));
3591         cp->err_len = cpu_to_le32((u32) sizeof(cp->error_data));
3592
3593         enqueue_cmd_and_start_io(h, c);
3594         return 0;
3595 }
3596
3597 /*
3598  * Queue a command to the correct I/O accelerator path.
3599  */
3600 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3601         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3602         u8 *scsi3addr)
3603 {
3604         if (h->transMethod & CFGTBL_Trans_io_accel1)
3605                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3606                                                 cdb, cdb_len, scsi3addr);
3607         else
3608                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3609                                                 cdb, cdb_len, scsi3addr);
3610 }
3611
3612 static void raid_map_helper(struct raid_map_data *map,
3613                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3614 {
3615         if (offload_to_mirror == 0)  {
3616                 /* use physical disk in the first mirrored group. */
3617                 *map_index %= map->data_disks_per_row;
3618                 return;
3619         }
3620         do {
3621                 /* determine mirror group that *map_index indicates */
3622                 *current_group = *map_index / map->data_disks_per_row;
3623                 if (offload_to_mirror == *current_group)
3624                         continue;
3625                 if (*current_group < (map->layout_map_count - 1)) {
3626                         /* select map index from next group */
3627                         *map_index += map->data_disks_per_row;
3628                         (*current_group)++;
3629                 } else {
3630                         /* select map index from first group */
3631                         *map_index %= map->data_disks_per_row;
3632                         *current_group = 0;
3633                 }
3634         } while (offload_to_mirror != *current_group);
3635 }
3636
3637 /*
3638  * Attempt to perform offload RAID mapping for a logical volume I/O.
3639  */
3640 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3641         struct CommandList *c)
3642 {
3643         struct scsi_cmnd *cmd = c->scsi_cmd;
3644         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3645         struct raid_map_data *map = &dev->raid_map;
3646         struct raid_map_disk_data *dd = &map->data[0];
3647         int is_write = 0;
3648         u32 map_index;
3649         u64 first_block, last_block;
3650         u32 block_cnt;
3651         u32 blocks_per_row;
3652         u64 first_row, last_row;
3653         u32 first_row_offset, last_row_offset;
3654         u32 first_column, last_column;
3655         u64 r0_first_row, r0_last_row;
3656         u32 r5or6_blocks_per_row;
3657         u64 r5or6_first_row, r5or6_last_row;
3658         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3659         u32 r5or6_first_column, r5or6_last_column;
3660         u32 total_disks_per_row;
3661         u32 stripesize;
3662         u32 first_group, last_group, current_group;
3663         u32 map_row;
3664         u32 disk_handle;
3665         u64 disk_block;
3666         u32 disk_block_cnt;
3667         u8 cdb[16];
3668         u8 cdb_len;
3669 #if BITS_PER_LONG == 32
3670         u64 tmpdiv;
3671 #endif
3672         int offload_to_mirror;
3673
3674         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3675
3676         /* check for valid opcode, get LBA and block count */
3677         switch (cmd->cmnd[0]) {
3678         case WRITE_6:
3679                 is_write = 1;
3680         case READ_6:
3681                 first_block =
3682                         (((u64) cmd->cmnd[2]) << 8) |
3683                         cmd->cmnd[3];
3684                 block_cnt = cmd->cmnd[4];
3685                 break;
3686         case WRITE_10:
3687                 is_write = 1;
3688         case READ_10:
3689                 first_block =
3690                         (((u64) cmd->cmnd[2]) << 24) |
3691                         (((u64) cmd->cmnd[3]) << 16) |
3692                         (((u64) cmd->cmnd[4]) << 8) |
3693                         cmd->cmnd[5];
3694                 block_cnt =
3695                         (((u32) cmd->cmnd[7]) << 8) |
3696                         cmd->cmnd[8];
3697                 break;
3698         case WRITE_12:
3699                 is_write = 1;
3700         case READ_12:
3701                 first_block =
3702                         (((u64) cmd->cmnd[2]) << 24) |
3703                         (((u64) cmd->cmnd[3]) << 16) |
3704                         (((u64) cmd->cmnd[4]) << 8) |
3705                         cmd->cmnd[5];
3706                 block_cnt =
3707                         (((u32) cmd->cmnd[6]) << 24) |
3708                         (((u32) cmd->cmnd[7]) << 16) |
3709                         (((u32) cmd->cmnd[8]) << 8) |
3710                 cmd->cmnd[9];
3711                 break;
3712         case WRITE_16:
3713                 is_write = 1;
3714         case READ_16:
3715                 first_block =
3716                         (((u64) cmd->cmnd[2]) << 56) |
3717                         (((u64) cmd->cmnd[3]) << 48) |
3718                         (((u64) cmd->cmnd[4]) << 40) |
3719                         (((u64) cmd->cmnd[5]) << 32) |
3720                         (((u64) cmd->cmnd[6]) << 24) |
3721                         (((u64) cmd->cmnd[7]) << 16) |
3722                         (((u64) cmd->cmnd[8]) << 8) |
3723                         cmd->cmnd[9];
3724                 block_cnt =
3725                         (((u32) cmd->cmnd[10]) << 24) |
3726                         (((u32) cmd->cmnd[11]) << 16) |
3727                         (((u32) cmd->cmnd[12]) << 8) |
3728                         cmd->cmnd[13];
3729                 break;
3730         default:
3731                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
3732         }
3733         BUG_ON(block_cnt == 0);
3734         last_block = first_block + block_cnt - 1;
3735
3736         /* check for write to non-RAID-0 */
3737         if (is_write && dev->raid_level != 0)
3738                 return IO_ACCEL_INELIGIBLE;
3739
3740         /* check for invalid block or wraparound */
3741         if (last_block >= map->volume_blk_cnt || last_block < first_block)
3742                 return IO_ACCEL_INELIGIBLE;
3743
3744         /* calculate stripe information for the request */
3745         blocks_per_row = map->data_disks_per_row * map->strip_size;
3746 #if BITS_PER_LONG == 32
3747         tmpdiv = first_block;
3748         (void) do_div(tmpdiv, blocks_per_row);
3749         first_row = tmpdiv;
3750         tmpdiv = last_block;
3751         (void) do_div(tmpdiv, blocks_per_row);
3752         last_row = tmpdiv;
3753         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3754         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3755         tmpdiv = first_row_offset;
3756         (void) do_div(tmpdiv,  map->strip_size);
3757         first_column = tmpdiv;
3758         tmpdiv = last_row_offset;
3759         (void) do_div(tmpdiv, map->strip_size);
3760         last_column = tmpdiv;
3761 #else
3762         first_row = first_block / blocks_per_row;
3763         last_row = last_block / blocks_per_row;
3764         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3765         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3766         first_column = first_row_offset / map->strip_size;
3767         last_column = last_row_offset / map->strip_size;
3768 #endif
3769
3770         /* if this isn't a single row/column then give to the controller */
3771         if ((first_row != last_row) || (first_column != last_column))
3772                 return IO_ACCEL_INELIGIBLE;
3773
3774         /* proceeding with driver mapping */
3775         total_disks_per_row = map->data_disks_per_row +
3776                                 map->metadata_disks_per_row;
3777         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3778                                 map->row_cnt;
3779         map_index = (map_row * total_disks_per_row) + first_column;
3780
3781         switch (dev->raid_level) {
3782         case HPSA_RAID_0:
3783                 break; /* nothing special to do */
3784         case HPSA_RAID_1:
3785                 /* Handles load balance across RAID 1 members.
3786                  * (2-drive R1 and R10 with even # of drives.)
3787                  * Appropriate for SSDs, not optimal for HDDs
3788                  */
3789                 BUG_ON(map->layout_map_count != 2);
3790                 if (dev->offload_to_mirror)
3791                         map_index += map->data_disks_per_row;
3792                 dev->offload_to_mirror = !dev->offload_to_mirror;
3793                 break;
3794         case HPSA_RAID_ADM:
3795                 /* Handles N-way mirrors  (R1-ADM)
3796                  * and R10 with # of drives divisible by 3.)
3797                  */
3798                 BUG_ON(map->layout_map_count != 3);
3799
3800                 offload_to_mirror = dev->offload_to_mirror;
3801                 raid_map_helper(map, offload_to_mirror,
3802                                 &map_index, &current_group);
3803                 /* set mirror group to use next time */
3804                 offload_to_mirror =
3805                         (offload_to_mirror >= map->layout_map_count - 1)
3806                         ? 0 : offload_to_mirror + 1;
3807                 /* FIXME: remove after debug/dev */
3808                 BUG_ON(offload_to_mirror >= map->layout_map_count);
3809                 dev_warn(&h->pdev->dev,
3810                         "DEBUG: Using physical disk map index %d from mirror group %d\n",
3811                         map_index, offload_to_mirror);
3812                 dev->offload_to_mirror = offload_to_mirror;
3813                 /* Avoid direct use of dev->offload_to_mirror within this
3814                  * function since multiple threads might simultaneously
3815                  * increment it beyond the range of dev->layout_map_count -1.
3816                  */
3817                 break;
3818         case HPSA_RAID_5:
3819         case HPSA_RAID_6:
3820                 if (map->layout_map_count <= 1)
3821                         break;
3822
3823                 /* Verify first and last block are in same RAID group */
3824                 r5or6_blocks_per_row =
3825                         map->strip_size * map->data_disks_per_row;
3826                 BUG_ON(r5or6_blocks_per_row == 0);
3827                 stripesize = r5or6_blocks_per_row * map->layout_map_count;
3828 #if BITS_PER_LONG == 32
3829                 tmpdiv = first_block;
3830                 first_group = do_div(tmpdiv, stripesize);
3831                 tmpdiv = first_group;
3832                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3833                 first_group = tmpdiv;
3834                 tmpdiv = last_block;
3835                 last_group = do_div(tmpdiv, stripesize);
3836                 tmpdiv = last_group;
3837                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3838                 last_group = tmpdiv;
3839 #else
3840                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
3841                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
3842 #endif
3843                 if (first_group != last_group)
3844                         return IO_ACCEL_INELIGIBLE;
3845
3846                 /* Verify request is in a single row of RAID 5/6 */
3847 #if BITS_PER_LONG == 32
3848                 tmpdiv = first_block;
3849                 (void) do_div(tmpdiv, stripesize);
3850                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
3851                 tmpdiv = last_block;
3852                 (void) do_div(tmpdiv, stripesize);
3853                 r5or6_last_row = r0_last_row = tmpdiv;
3854 #else
3855                 first_row = r5or6_first_row = r0_first_row =
3856                                                 first_block / stripesize;
3857                 r5or6_last_row = r0_last_row = last_block / stripesize;
3858 #endif
3859                 if (r5or6_first_row != r5or6_last_row)
3860                         return IO_ACCEL_INELIGIBLE;
3861
3862
3863                 /* Verify request is in a single column */
3864 #if BITS_PER_LONG == 32
3865                 tmpdiv = first_block;
3866                 first_row_offset = do_div(tmpdiv, stripesize);
3867                 tmpdiv = first_row_offset;
3868                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
3869                 r5or6_first_row_offset = first_row_offset;
3870                 tmpdiv = last_block;
3871                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
3872                 tmpdiv = r5or6_last_row_offset;
3873                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
3874                 tmpdiv = r5or6_first_row_offset;
3875                 (void) do_div(tmpdiv, map->strip_size);
3876                 first_column = r5or6_first_column = tmpdiv;
3877                 tmpdiv = r5or6_last_row_offset;
3878                 (void) do_div(tmpdiv, map->strip_size);
3879                 r5or6_last_column = tmpdiv;
3880 #else
3881                 first_row_offset = r5or6_first_row_offset =
3882                         (u32)((first_block % stripesize) %
3883                                                 r5or6_blocks_per_row);
3884
3885                 r5or6_last_row_offset =
3886                         (u32)((last_block % stripesize) %
3887                                                 r5or6_blocks_per_row);
3888
3889                 first_column = r5or6_first_column =
3890                         r5or6_first_row_offset / map->strip_size;
3891                 r5or6_last_column =
3892                         r5or6_last_row_offset / map->strip_size;
3893 #endif
3894                 if (r5or6_first_column != r5or6_last_column)
3895                         return IO_ACCEL_INELIGIBLE;
3896
3897                 /* Request is eligible */
3898                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3899                         map->row_cnt;
3900
3901                 map_index = (first_group *
3902                         (map->row_cnt * total_disks_per_row)) +
3903                         (map_row * total_disks_per_row) + first_column;
3904                 break;
3905         default:
3906                 return IO_ACCEL_INELIGIBLE;
3907         }
3908
3909         disk_handle = dd[map_index].ioaccel_handle;
3910         disk_block = map->disk_starting_blk + (first_row * map->strip_size) +
3911                         (first_row_offset - (first_column * map->strip_size));
3912         disk_block_cnt = block_cnt;
3913
3914         /* handle differing logical/physical block sizes */
3915         if (map->phys_blk_shift) {
3916                 disk_block <<= map->phys_blk_shift;
3917                 disk_block_cnt <<= map->phys_blk_shift;
3918         }
3919         BUG_ON(disk_block_cnt > 0xffff);
3920
3921         /* build the new CDB for the physical disk I/O */
3922         if (disk_block > 0xffffffff) {
3923                 cdb[0] = is_write ? WRITE_16 : READ_16;
3924                 cdb[1] = 0;
3925                 cdb[2] = (u8) (disk_block >> 56);
3926                 cdb[3] = (u8) (disk_block >> 48);
3927                 cdb[4] = (u8) (disk_block >> 40);
3928                 cdb[5] = (u8) (disk_block >> 32);
3929                 cdb[6] = (u8) (disk_block >> 24);
3930                 cdb[7] = (u8) (disk_block >> 16);
3931                 cdb[8] = (u8) (disk_block >> 8);
3932                 cdb[9] = (u8) (disk_block);
3933                 cdb[10] = (u8) (disk_block_cnt >> 24);
3934                 cdb[11] = (u8) (disk_block_cnt >> 16);
3935                 cdb[12] = (u8) (disk_block_cnt >> 8);
3936                 cdb[13] = (u8) (disk_block_cnt);
3937                 cdb[14] = 0;
3938                 cdb[15] = 0;
3939                 cdb_len = 16;
3940         } else {
3941                 cdb[0] = is_write ? WRITE_10 : READ_10;
3942                 cdb[1] = 0;
3943                 cdb[2] = (u8) (disk_block >> 24);
3944                 cdb[3] = (u8) (disk_block >> 16);
3945                 cdb[4] = (u8) (disk_block >> 8);
3946                 cdb[5] = (u8) (disk_block);
3947                 cdb[6] = 0;
3948                 cdb[7] = (u8) (disk_block_cnt >> 8);
3949                 cdb[8] = (u8) (disk_block_cnt);
3950                 cdb[9] = 0;
3951                 cdb_len = 10;
3952         }
3953         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
3954                                                 dev->scsi3addr);
3955 }
3956
3957 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
3958         void (*done)(struct scsi_cmnd *))
3959 {
3960         struct ctlr_info *h;
3961         struct hpsa_scsi_dev_t *dev;
3962         unsigned char scsi3addr[8];
3963         struct CommandList *c;
3964         int rc = 0;
3965
3966         /* Get the ptr to our adapter structure out of cmd->host. */
3967         h = sdev_to_hba(cmd->device);
3968         dev = cmd->device->hostdata;
3969         if (!dev) {
3970                 cmd->result = DID_NO_CONNECT << 16;
3971                 done(cmd);
3972                 return 0;
3973         }
3974         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
3975
3976         if (unlikely(lockup_detected(h))) {
3977                 cmd->result = DID_ERROR << 16;
3978                 done(cmd);
3979                 return 0;
3980         }
3981         c = cmd_alloc(h);
3982         if (c == NULL) {                        /* trouble... */
3983                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
3984                 return SCSI_MLQUEUE_HOST_BUSY;
3985         }
3986
3987         /* Fill in the command list header */
3988
3989         cmd->scsi_done = done;    /* save this for use by completion code */
3990
3991         /* save c in case we have to abort it  */
3992         cmd->host_scribble = (unsigned char *) c;
3993
3994         c->cmd_type = CMD_SCSI;
3995         c->scsi_cmd = cmd;
3996
3997         /* Call alternate submit routine for I/O accelerated commands.
3998          * Retries always go down the normal I/O path.
3999          */
4000         if (likely(cmd->retries == 0 &&
4001                 cmd->request->cmd_type == REQ_TYPE_FS &&
4002                 h->acciopath_status)) {
4003                 if (dev->offload_enabled) {
4004                         rc = hpsa_scsi_ioaccel_raid_map(h, c);
4005                         if (rc == 0)
4006                                 return 0; /* Sent on ioaccel path */
4007                         if (rc < 0) {   /* scsi_dma_map failed. */
4008                                 cmd_free(h, c);
4009                                 return SCSI_MLQUEUE_HOST_BUSY;
4010                         }
4011                 } else if (dev->ioaccel_handle) {
4012                         rc = hpsa_scsi_ioaccel_direct_map(h, c);
4013                         if (rc == 0)
4014                                 return 0; /* Sent on direct map path */
4015                         if (rc < 0) {   /* scsi_dma_map failed. */
4016                                 cmd_free(h, c);
4017                                 return SCSI_MLQUEUE_HOST_BUSY;
4018                         }
4019                 }
4020         }
4021
4022         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4023         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4024         c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
4025         c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
4026
4027         /* Fill in the request block... */
4028
4029         c->Request.Timeout = 0;
4030         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4031         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4032         c->Request.CDBLen = cmd->cmd_len;
4033         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4034         c->Request.Type.Type = TYPE_CMD;
4035         c->Request.Type.Attribute = ATTR_SIMPLE;
4036         switch (cmd->sc_data_direction) {
4037         case DMA_TO_DEVICE:
4038                 c->Request.Type.Direction = XFER_WRITE;
4039                 break;
4040         case DMA_FROM_DEVICE:
4041                 c->Request.Type.Direction = XFER_READ;
4042                 break;
4043         case DMA_NONE:
4044                 c->Request.Type.Direction = XFER_NONE;
4045                 break;
4046         case DMA_BIDIRECTIONAL:
4047                 /* This can happen if a buggy application does a scsi passthru
4048                  * and sets both inlen and outlen to non-zero. ( see
4049                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4050                  */
4051
4052                 c->Request.Type.Direction = XFER_RSVD;
4053                 /* This is technically wrong, and hpsa controllers should
4054                  * reject it with CMD_INVALID, which is the most correct
4055                  * response, but non-fibre backends appear to let it
4056                  * slide by, and give the same results as if this field
4057                  * were set correctly.  Either way is acceptable for
4058                  * our purposes here.
4059                  */
4060
4061                 break;
4062
4063         default:
4064                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4065                         cmd->sc_data_direction);
4066                 BUG();
4067                 break;
4068         }
4069
4070         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4071                 cmd_free(h, c);
4072                 return SCSI_MLQUEUE_HOST_BUSY;
4073         }
4074         enqueue_cmd_and_start_io(h, c);
4075         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4076         return 0;
4077 }
4078
4079 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
4080
4081 static int do_not_scan_if_controller_locked_up(struct ctlr_info *h)
4082 {
4083         unsigned long flags;
4084
4085         /*
4086          * Don't let rescans be initiated on a controller known
4087          * to be locked up.  If the controller locks up *during*
4088          * a rescan, that thread is probably hosed, but at least
4089          * we can prevent new rescan threads from piling up on a
4090          * locked up controller.
4091          */
4092         if (unlikely(lockup_detected(h))) {
4093                 spin_lock_irqsave(&h->scan_lock, flags);
4094                 h->scan_finished = 1;
4095                 wake_up_all(&h->scan_wait_queue);
4096                 spin_unlock_irqrestore(&h->scan_lock, flags);
4097                 return 1;
4098         }
4099         return 0;
4100 }
4101
4102 static void hpsa_scan_start(struct Scsi_Host *sh)
4103 {
4104         struct ctlr_info *h = shost_to_hba(sh);
4105         unsigned long flags;
4106
4107         if (do_not_scan_if_controller_locked_up(h))
4108                 return;
4109
4110         /* wait until any scan already in progress is finished. */
4111         while (1) {
4112                 spin_lock_irqsave(&h->scan_lock, flags);
4113                 if (h->scan_finished)
4114                         break;
4115                 spin_unlock_irqrestore(&h->scan_lock, flags);
4116                 wait_event(h->scan_wait_queue, h->scan_finished);
4117                 /* Note: We don't need to worry about a race between this
4118                  * thread and driver unload because the midlayer will
4119                  * have incremented the reference count, so unload won't
4120                  * happen if we're in here.
4121                  */
4122         }
4123         h->scan_finished = 0; /* mark scan as in progress */
4124         spin_unlock_irqrestore(&h->scan_lock, flags);
4125
4126         if (do_not_scan_if_controller_locked_up(h))
4127                 return;
4128
4129         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4130
4131         spin_lock_irqsave(&h->scan_lock, flags);
4132         h->scan_finished = 1; /* mark scan as finished. */
4133         wake_up_all(&h->scan_wait_queue);
4134         spin_unlock_irqrestore(&h->scan_lock, flags);
4135 }
4136
4137 static int hpsa_scan_finished(struct Scsi_Host *sh,
4138         unsigned long elapsed_time)
4139 {
4140         struct ctlr_info *h = shost_to_hba(sh);
4141         unsigned long flags;
4142         int finished;
4143
4144         spin_lock_irqsave(&h->scan_lock, flags);
4145         finished = h->scan_finished;
4146         spin_unlock_irqrestore(&h->scan_lock, flags);
4147         return finished;
4148 }
4149
4150 static int hpsa_change_queue_depth(struct scsi_device *sdev,
4151         int qdepth, int reason)
4152 {
4153         struct ctlr_info *h = sdev_to_hba(sdev);
4154
4155         if (reason != SCSI_QDEPTH_DEFAULT)
4156                 return -ENOTSUPP;
4157
4158         if (qdepth < 1)
4159                 qdepth = 1;
4160         else
4161                 if (qdepth > h->nr_cmds)
4162                         qdepth = h->nr_cmds;
4163         scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
4164         return sdev->queue_depth;
4165 }
4166
4167 static void hpsa_unregister_scsi(struct ctlr_info *h)
4168 {
4169         /* we are being forcibly unloaded, and may not refuse. */
4170         scsi_remove_host(h->scsi_host);
4171         scsi_host_put(h->scsi_host);
4172         h->scsi_host = NULL;
4173 }
4174
4175 static int hpsa_register_scsi(struct ctlr_info *h)
4176 {
4177         struct Scsi_Host *sh;
4178         int error;
4179
4180         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4181         if (sh == NULL)
4182                 goto fail;
4183
4184         sh->io_port = 0;
4185         sh->n_io_port = 0;
4186         sh->this_id = -1;
4187         sh->max_channel = 3;
4188         sh->max_cmd_len = MAX_COMMAND_SIZE;
4189         sh->max_lun = HPSA_MAX_LUN;
4190         sh->max_id = HPSA_MAX_LUN;
4191         sh->can_queue = h->nr_cmds;
4192         if (h->hba_mode_enabled)
4193                 sh->cmd_per_lun = 7;
4194         else
4195                 sh->cmd_per_lun = h->nr_cmds;
4196         sh->sg_tablesize = h->maxsgentries;
4197         h->scsi_host = sh;
4198         sh->hostdata[0] = (unsigned long) h;
4199         sh->irq = h->intr[h->intr_mode];
4200         sh->unique_id = sh->irq;
4201         error = scsi_add_host(sh, &h->pdev->dev);
4202         if (error)
4203                 goto fail_host_put;
4204         scsi_scan_host(sh);
4205         return 0;
4206
4207  fail_host_put:
4208         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4209                 " failed for controller %d\n", __func__, h->ctlr);
4210         scsi_host_put(sh);
4211         return error;
4212  fail:
4213         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4214                 " failed for controller %d\n", __func__, h->ctlr);
4215         return -ENOMEM;
4216 }
4217
4218 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4219         unsigned char lunaddr[])
4220 {
4221         int rc;
4222         int count = 0;
4223         int waittime = 1; /* seconds */
4224         struct CommandList *c;
4225
4226         c = cmd_special_alloc(h);
4227         if (!c) {
4228                 dev_warn(&h->pdev->dev, "out of memory in "
4229                         "wait_for_device_to_become_ready.\n");
4230                 return IO_ERROR;
4231         }
4232
4233         /* Send test unit ready until device ready, or give up. */
4234         while (count < HPSA_TUR_RETRY_LIMIT) {
4235
4236                 /* Wait for a bit.  do this first, because if we send
4237                  * the TUR right away, the reset will just abort it.
4238                  */
4239                 msleep(1000 * waittime);
4240                 count++;
4241                 rc = 0; /* Device ready. */
4242
4243                 /* Increase wait time with each try, up to a point. */
4244                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4245                         waittime = waittime * 2;
4246
4247                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4248                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4249                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4250                 hpsa_scsi_do_simple_cmd_core(h, c);
4251                 /* no unmap needed here because no data xfer. */
4252
4253                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4254                         break;
4255
4256                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4257                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4258                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4259                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4260                         break;
4261
4262                 dev_warn(&h->pdev->dev, "waiting %d secs "
4263                         "for device to become ready.\n", waittime);
4264                 rc = 1; /* device not ready. */
4265         }
4266
4267         if (rc)
4268                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4269         else
4270                 dev_warn(&h->pdev->dev, "device is ready.\n");
4271
4272         cmd_special_free(h, c);
4273         return rc;
4274 }
4275
4276 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4277  * complaining.  Doing a host- or bus-reset can't do anything good here.
4278  */
4279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4280 {
4281         int rc;
4282         struct ctlr_info *h;
4283         struct hpsa_scsi_dev_t *dev;
4284
4285         /* find the controller to which the command to be aborted was sent */
4286         h = sdev_to_hba(scsicmd->device);
4287         if (h == NULL) /* paranoia */
4288                 return FAILED;
4289         dev = scsicmd->device->hostdata;
4290         if (!dev) {
4291                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4292                         "device lookup failed.\n");
4293                 return FAILED;
4294         }
4295         dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
4296                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4297         /* send a reset to the SCSI LUN which the command was sent to */
4298         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN);
4299         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4300                 return SUCCESS;
4301
4302         dev_warn(&h->pdev->dev, "resetting device failed.\n");
4303         return FAILED;
4304 }
4305
4306 static void swizzle_abort_tag(u8 *tag)
4307 {
4308         u8 original_tag[8];
4309
4310         memcpy(original_tag, tag, 8);
4311         tag[0] = original_tag[3];
4312         tag[1] = original_tag[2];
4313         tag[2] = original_tag[1];
4314         tag[3] = original_tag[0];
4315         tag[4] = original_tag[7];
4316         tag[5] = original_tag[6];
4317         tag[6] = original_tag[5];
4318         tag[7] = original_tag[4];
4319 }
4320
4321 static void hpsa_get_tag(struct ctlr_info *h,
4322         struct CommandList *c, u32 *taglower, u32 *tagupper)
4323 {
4324         if (c->cmd_type == CMD_IOACCEL1) {
4325                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4326                         &h->ioaccel_cmd_pool[c->cmdindex];
4327                 *tagupper = cm1->Tag.upper;
4328                 *taglower = cm1->Tag.lower;
4329                 return;
4330         }
4331         if (c->cmd_type == CMD_IOACCEL2) {
4332                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4333                         &h->ioaccel2_cmd_pool[c->cmdindex];
4334                 /* upper tag not used in ioaccel2 mode */
4335                 memset(tagupper, 0, sizeof(*tagupper));
4336                 *taglower = cm2->Tag;
4337                 return;
4338         }
4339         *tagupper = c->Header.Tag.upper;
4340         *taglower = c->Header.Tag.lower;
4341 }
4342
4343
4344 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4345         struct CommandList *abort, int swizzle)
4346 {
4347         int rc = IO_OK;
4348         struct CommandList *c;
4349         struct ErrorInfo *ei;
4350         u32 tagupper, taglower;
4351
4352         c = cmd_special_alloc(h);
4353         if (c == NULL) {        /* trouble... */
4354                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4355                 return -ENOMEM;
4356         }
4357
4358         /* fill_cmd can't fail here, no buffer to map */
4359         (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
4360                 0, 0, scsi3addr, TYPE_MSG);
4361         if (swizzle)
4362                 swizzle_abort_tag(&c->Request.CDB[4]);
4363         hpsa_scsi_do_simple_cmd_core(h, c);
4364         hpsa_get_tag(h, abort, &taglower, &tagupper);
4365         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
4366                 __func__, tagupper, taglower);
4367         /* no unmap needed here because no data xfer. */
4368
4369         ei = c->err_info;
4370         switch (ei->CommandStatus) {
4371         case CMD_SUCCESS:
4372                 break;
4373         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4374                 rc = -1;
4375                 break;
4376         default:
4377                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4378                         __func__, tagupper, taglower);
4379                 hpsa_scsi_interpret_error(h, c);
4380                 rc = -1;
4381                 break;
4382         }
4383         cmd_special_free(h, c);
4384         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4385                 __func__, tagupper, taglower);
4386         return rc;
4387 }
4388
4389 /*
4390  * hpsa_find_cmd_in_queue
4391  *
4392  * Used to determine whether a command (find) is still present
4393  * in queue_head.   Optionally excludes the last element of queue_head.
4394  *
4395  * This is used to avoid unnecessary aborts.  Commands in h->reqQ have
4396  * not yet been submitted, and so can be aborted by the driver without
4397  * sending an abort to the hardware.
4398  *
4399  * Returns pointer to command if found in queue, NULL otherwise.
4400  */
4401 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
4402                         struct scsi_cmnd *find, struct list_head *queue_head)
4403 {
4404         unsigned long flags;
4405         struct CommandList *c = NULL;   /* ptr into cmpQ */
4406
4407         if (!find)
4408                 return 0;
4409         spin_lock_irqsave(&h->lock, flags);
4410         list_for_each_entry(c, queue_head, list) {
4411                 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
4412                         continue;
4413                 if (c->scsi_cmd == find) {
4414                         spin_unlock_irqrestore(&h->lock, flags);
4415                         return c;
4416                 }
4417         }
4418         spin_unlock_irqrestore(&h->lock, flags);
4419         return NULL;
4420 }
4421
4422 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
4423                                         u8 *tag, struct list_head *queue_head)
4424 {
4425         unsigned long flags;
4426         struct CommandList *c;
4427
4428         spin_lock_irqsave(&h->lock, flags);
4429         list_for_each_entry(c, queue_head, list) {
4430                 if (memcmp(&c->Header.Tag, tag, 8) != 0)
4431                         continue;
4432                 spin_unlock_irqrestore(&h->lock, flags);
4433                 return c;
4434         }
4435         spin_unlock_irqrestore(&h->lock, flags);
4436         return NULL;
4437 }
4438
4439 /* ioaccel2 path firmware cannot handle abort task requests.
4440  * Change abort requests to physical target reset, and send to the
4441  * address of the physical disk used for the ioaccel 2 command.
4442  * Return 0 on success (IO_OK)
4443  *       -1 on failure
4444  */
4445
4446 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4447         unsigned char *scsi3addr, struct CommandList *abort)
4448 {
4449         int rc = IO_OK;
4450         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4451         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4452         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4453         unsigned char *psa = &phys_scsi3addr[0];
4454
4455         /* Get a pointer to the hpsa logical device. */
4456         scmd = (struct scsi_cmnd *) abort->scsi_cmd;
4457         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4458         if (dev == NULL) {
4459                 dev_warn(&h->pdev->dev,
4460                         "Cannot abort: no device pointer for command.\n");
4461                         return -1; /* not abortable */
4462         }
4463
4464         if (h->raid_offload_debug > 0)
4465                 dev_info(&h->pdev->dev,
4466                         "Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4467                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4468                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4469                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4470
4471         if (!dev->offload_enabled) {
4472                 dev_warn(&h->pdev->dev,
4473                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4474                 return -1; /* not abortable */
4475         }
4476
4477         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4478         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4479                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4480                 return -1; /* not abortable */
4481         }
4482
4483         /* send the reset */
4484         if (h->raid_offload_debug > 0)
4485                 dev_info(&h->pdev->dev,
4486                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4487                         psa[0], psa[1], psa[2], psa[3],
4488                         psa[4], psa[5], psa[6], psa[7]);
4489         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET);
4490         if (rc != 0) {
4491                 dev_warn(&h->pdev->dev,
4492                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4493                         psa[0], psa[1], psa[2], psa[3],
4494                         psa[4], psa[5], psa[6], psa[7]);
4495                 return rc; /* failed to reset */
4496         }
4497
4498         /* wait for device to recover */
4499         if (wait_for_device_to_become_ready(h, psa) != 0) {
4500                 dev_warn(&h->pdev->dev,
4501                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4502                         psa[0], psa[1], psa[2], psa[3],
4503                         psa[4], psa[5], psa[6], psa[7]);
4504                 return -1;  /* failed to recover */
4505         }
4506
4507         /* device recovered */
4508         dev_info(&h->pdev->dev,
4509                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4510                 psa[0], psa[1], psa[2], psa[3],
4511                 psa[4], psa[5], psa[6], psa[7]);
4512
4513         return rc; /* success */
4514 }
4515
4516 /* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
4517  * tell which kind we're dealing with, so we send the abort both ways.  There
4518  * shouldn't be any collisions between swizzled and unswizzled tags due to the
4519  * way we construct our tags but we check anyway in case the assumptions which
4520  * make this true someday become false.
4521  */
4522 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4523         unsigned char *scsi3addr, struct CommandList *abort)
4524 {
4525         u8 swizzled_tag[8];
4526         struct CommandList *c;
4527         int rc = 0, rc2 = 0;
4528
4529         /* ioccelerator mode 2 commands should be aborted via the
4530          * accelerated path, since RAID path is unaware of these commands,
4531          * but underlying firmware can't handle abort TMF.
4532          * Change abort to physical device reset.
4533          */
4534         if (abort->cmd_type == CMD_IOACCEL2)
4535                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort);
4536
4537         /* we do not expect to find the swizzled tag in our queue, but
4538          * check anyway just to be sure the assumptions which make this
4539          * the case haven't become wrong.
4540          */
4541         memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
4542         swizzle_abort_tag(swizzled_tag);
4543         c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
4544         if (c != NULL) {
4545                 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
4546                 return hpsa_send_abort(h, scsi3addr, abort, 0);
4547         }
4548         rc = hpsa_send_abort(h, scsi3addr, abort, 0);
4549
4550         /* if the command is still in our queue, we can't conclude that it was
4551          * aborted (it might have just completed normally) but in any case
4552          * we don't need to try to abort it another way.
4553          */
4554         c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
4555         if (c)
4556                 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
4557         return rc && rc2;
4558 }
4559
4560 /* Send an abort for the specified command.
4561  *      If the device and controller support it,
4562  *              send a task abort request.
4563  */
4564 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4565 {
4566
4567         int i, rc;
4568         struct ctlr_info *h;
4569         struct hpsa_scsi_dev_t *dev;
4570         struct CommandList *abort; /* pointer to command to be aborted */
4571         struct CommandList *found;
4572         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4573         char msg[256];          /* For debug messaging. */
4574         int ml = 0;
4575         u32 tagupper, taglower;
4576
4577         /* Find the controller of the command to be aborted */
4578         h = sdev_to_hba(sc->device);
4579         if (WARN(h == NULL,
4580                         "ABORT REQUEST FAILED, Controller lookup failed.\n"))
4581                 return FAILED;
4582
4583         /* Check that controller supports some kind of task abort */
4584         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
4585                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
4586                 return FAILED;
4587
4588         memset(msg, 0, sizeof(msg));
4589         ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
4590                 h->scsi_host->host_no, sc->device->channel,
4591                 sc->device->id, sc->device->lun);
4592
4593         /* Find the device of the command to be aborted */
4594         dev = sc->device->hostdata;
4595         if (!dev) {
4596                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4597                                 msg);
4598                 return FAILED;
4599         }
4600
4601         /* Get SCSI command to be aborted */
4602         abort = (struct CommandList *) sc->host_scribble;
4603         if (abort == NULL) {
4604                 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
4605                                 msg);
4606                 return FAILED;
4607         }
4608         hpsa_get_tag(h, abort, &taglower, &tagupper);
4609         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
4610         as  = (struct scsi_cmnd *) abort->scsi_cmd;
4611         if (as != NULL)
4612                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
4613                         as->cmnd[0], as->serial_number);
4614         dev_dbg(&h->pdev->dev, "%s\n", msg);
4615         dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
4616                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4617
4618         /* Search reqQ to See if command is queued but not submitted,
4619          * if so, complete the command with aborted status and remove
4620          * it from the reqQ.
4621          */
4622         found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
4623         if (found) {
4624                 found->err_info->CommandStatus = CMD_ABORTED;
4625                 finish_cmd(found);
4626                 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
4627                                 msg);
4628                 return SUCCESS;
4629         }
4630
4631         /* not in reqQ, if also not in cmpQ, must have already completed */
4632         found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4633         if (!found)  {
4634                 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
4635                                 msg);
4636                 return SUCCESS;
4637         }
4638
4639         /*
4640          * Command is in flight, or possibly already completed
4641          * by the firmware (but not to the scsi mid layer) but we can't
4642          * distinguish which.  Send the abort down.
4643          */
4644         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
4645         if (rc != 0) {
4646                 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
4647                 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
4648                         h->scsi_host->host_no,
4649                         dev->bus, dev->target, dev->lun);
4650                 return FAILED;
4651         }
4652         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
4653
4654         /* If the abort(s) above completed and actually aborted the
4655          * command, then the command to be aborted should already be
4656          * completed.  If not, wait around a bit more to see if they
4657          * manage to complete normally.
4658          */
4659 #define ABORT_COMPLETE_WAIT_SECS 30
4660         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
4661                 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4662                 if (!found)
4663                         return SUCCESS;
4664                 msleep(100);
4665         }
4666         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
4667                 msg, ABORT_COMPLETE_WAIT_SECS);
4668         return FAILED;
4669 }
4670
4671
4672 /*
4673  * For operations that cannot sleep, a command block is allocated at init,
4674  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
4675  * which ones are free or in use.  Lock must be held when calling this.
4676  * cmd_free() is the complement.
4677  */
4678 static struct CommandList *cmd_alloc(struct ctlr_info *h)
4679 {
4680         struct CommandList *c;
4681         int i;
4682         union u64bit temp64;
4683         dma_addr_t cmd_dma_handle, err_dma_handle;
4684         unsigned long flags;
4685
4686         spin_lock_irqsave(&h->lock, flags);
4687         do {
4688                 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
4689                 if (i == h->nr_cmds) {
4690                         spin_unlock_irqrestore(&h->lock, flags);
4691                         return NULL;
4692                 }
4693         } while (test_and_set_bit
4694                  (i & (BITS_PER_LONG - 1),
4695                   h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
4696         spin_unlock_irqrestore(&h->lock, flags);
4697
4698         c = h->cmd_pool + i;
4699         memset(c, 0, sizeof(*c));
4700         cmd_dma_handle = h->cmd_pool_dhandle
4701             + i * sizeof(*c);
4702         c->err_info = h->errinfo_pool + i;
4703         memset(c->err_info, 0, sizeof(*c->err_info));
4704         err_dma_handle = h->errinfo_pool_dhandle
4705             + i * sizeof(*c->err_info);
4706
4707         c->cmdindex = i;
4708
4709         INIT_LIST_HEAD(&c->list);
4710         c->busaddr = (u32) cmd_dma_handle;
4711         temp64.val = (u64) err_dma_handle;
4712         c->ErrDesc.Addr.lower = temp64.val32.lower;
4713         c->ErrDesc.Addr.upper = temp64.val32.upper;
4714         c->ErrDesc.Len = sizeof(*c->err_info);
4715
4716         c->h = h;
4717         return c;
4718 }
4719
4720 /* For operations that can wait for kmalloc to possibly sleep,
4721  * this routine can be called. Lock need not be held to call
4722  * cmd_special_alloc. cmd_special_free() is the complement.
4723  */
4724 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
4725 {
4726         struct CommandList *c;
4727         union u64bit temp64;
4728         dma_addr_t cmd_dma_handle, err_dma_handle;
4729
4730         c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
4731         if (c == NULL)
4732                 return NULL;
4733         memset(c, 0, sizeof(*c));
4734
4735         c->cmd_type = CMD_SCSI;
4736         c->cmdindex = -1;
4737
4738         c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
4739                     &err_dma_handle);
4740
4741         if (c->err_info == NULL) {
4742                 pci_free_consistent(h->pdev,
4743                         sizeof(*c), c, cmd_dma_handle);
4744                 return NULL;
4745         }
4746         memset(c->err_info, 0, sizeof(*c->err_info));
4747
4748         INIT_LIST_HEAD(&c->list);
4749         c->busaddr = (u32) cmd_dma_handle;
4750         temp64.val = (u64) err_dma_handle;
4751         c->ErrDesc.Addr.lower = temp64.val32.lower;
4752         c->ErrDesc.Addr.upper = temp64.val32.upper;
4753         c->ErrDesc.Len = sizeof(*c->err_info);
4754
4755         c->h = h;
4756         return c;
4757 }
4758
4759 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
4760 {
4761         int i;
4762         unsigned long flags;
4763
4764         i = c - h->cmd_pool;
4765         spin_lock_irqsave(&h->lock, flags);
4766         clear_bit(i & (BITS_PER_LONG - 1),
4767                   h->cmd_pool_bits + (i / BITS_PER_LONG));
4768         spin_unlock_irqrestore(&h->lock, flags);
4769 }
4770
4771 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
4772 {
4773         union u64bit temp64;
4774
4775         temp64.val32.lower = c->ErrDesc.Addr.lower;
4776         temp64.val32.upper = c->ErrDesc.Addr.upper;
4777         pci_free_consistent(h->pdev, sizeof(*c->err_info),
4778                             c->err_info, (dma_addr_t) temp64.val);
4779         pci_free_consistent(h->pdev, sizeof(*c),
4780                             c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
4781 }
4782
4783 #ifdef CONFIG_COMPAT
4784
4785 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
4786 {
4787         IOCTL32_Command_struct __user *arg32 =
4788             (IOCTL32_Command_struct __user *) arg;
4789         IOCTL_Command_struct arg64;
4790         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
4791         int err;
4792         u32 cp;
4793
4794         memset(&arg64, 0, sizeof(arg64));
4795         err = 0;
4796         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4797                            sizeof(arg64.LUN_info));
4798         err |= copy_from_user(&arg64.Request, &arg32->Request,
4799                            sizeof(arg64.Request));
4800         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4801                            sizeof(arg64.error_info));
4802         err |= get_user(arg64.buf_size, &arg32->buf_size);
4803         err |= get_user(cp, &arg32->buf);
4804         arg64.buf = compat_ptr(cp);
4805         err |= copy_to_user(p, &arg64, sizeof(arg64));
4806
4807         if (err)
4808                 return -EFAULT;
4809
4810         err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
4811         if (err)
4812                 return err;
4813         err |= copy_in_user(&arg32->error_info, &p->error_info,
4814                          sizeof(arg32->error_info));
4815         if (err)
4816                 return -EFAULT;
4817         return err;
4818 }
4819
4820 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
4821         int cmd, void *arg)
4822 {
4823         BIG_IOCTL32_Command_struct __user *arg32 =
4824             (BIG_IOCTL32_Command_struct __user *) arg;
4825         BIG_IOCTL_Command_struct arg64;
4826         BIG_IOCTL_Command_struct __user *p =
4827             compat_alloc_user_space(sizeof(arg64));
4828         int err;
4829         u32 cp;
4830
4831         memset(&arg64, 0, sizeof(arg64));
4832         err = 0;
4833         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4834                            sizeof(arg64.LUN_info));
4835         err |= copy_from_user(&arg64.Request, &arg32->Request,
4836                            sizeof(arg64.Request));
4837         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4838                            sizeof(arg64.error_info));
4839         err |= get_user(arg64.buf_size, &arg32->buf_size);
4840         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
4841         err |= get_user(cp, &arg32->buf);
4842         arg64.buf = compat_ptr(cp);
4843         err |= copy_to_user(p, &arg64, sizeof(arg64));
4844
4845         if (err)
4846                 return -EFAULT;
4847
4848         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
4849         if (err)
4850                 return err;
4851         err |= copy_in_user(&arg32->error_info, &p->error_info,
4852                          sizeof(arg32->error_info));
4853         if (err)
4854                 return -EFAULT;
4855         return err;
4856 }
4857
4858 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
4859 {
4860         switch (cmd) {
4861         case CCISS_GETPCIINFO:
4862         case CCISS_GETINTINFO:
4863         case CCISS_SETINTINFO:
4864         case CCISS_GETNODENAME:
4865         case CCISS_SETNODENAME:
4866         case CCISS_GETHEARTBEAT:
4867         case CCISS_GETBUSTYPES:
4868         case CCISS_GETFIRMVER:
4869         case CCISS_GETDRIVVER:
4870         case CCISS_REVALIDVOLS:
4871         case CCISS_DEREGDISK:
4872         case CCISS_REGNEWDISK:
4873         case CCISS_REGNEWD:
4874         case CCISS_RESCANDISK:
4875         case CCISS_GETLUNINFO:
4876                 return hpsa_ioctl(dev, cmd, arg);
4877
4878         case CCISS_PASSTHRU32:
4879                 return hpsa_ioctl32_passthru(dev, cmd, arg);
4880         case CCISS_BIG_PASSTHRU32:
4881                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
4882
4883         default:
4884                 return -ENOIOCTLCMD;
4885         }
4886 }
4887 #endif
4888
4889 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
4890 {
4891         struct hpsa_pci_info pciinfo;
4892
4893         if (!argp)
4894                 return -EINVAL;
4895         pciinfo.domain = pci_domain_nr(h->pdev->bus);
4896         pciinfo.bus = h->pdev->bus->number;
4897         pciinfo.dev_fn = h->pdev->devfn;
4898         pciinfo.board_id = h->board_id;
4899         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
4900                 return -EFAULT;
4901         return 0;
4902 }
4903
4904 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
4905 {
4906         DriverVer_type DriverVer;
4907         unsigned char vmaj, vmin, vsubmin;
4908         int rc;
4909
4910         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
4911                 &vmaj, &vmin, &vsubmin);
4912         if (rc != 3) {
4913                 dev_info(&h->pdev->dev, "driver version string '%s' "
4914                         "unrecognized.", HPSA_DRIVER_VERSION);
4915                 vmaj = 0;
4916                 vmin = 0;
4917                 vsubmin = 0;
4918         }
4919         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
4920         if (!argp)
4921                 return -EINVAL;
4922         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
4923                 return -EFAULT;
4924         return 0;
4925 }
4926
4927 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4928 {
4929         IOCTL_Command_struct iocommand;
4930         struct CommandList *c;
4931         char *buff = NULL;
4932         union u64bit temp64;
4933         int rc = 0;
4934
4935         if (!argp)
4936                 return -EINVAL;
4937         if (!capable(CAP_SYS_RAWIO))
4938                 return -EPERM;
4939         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
4940                 return -EFAULT;
4941         if ((iocommand.buf_size < 1) &&
4942             (iocommand.Request.Type.Direction != XFER_NONE)) {
4943                 return -EINVAL;
4944         }
4945         if (iocommand.buf_size > 0) {
4946                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
4947                 if (buff == NULL)
4948                         return -EFAULT;
4949                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
4950                         /* Copy the data into the buffer we created */
4951                         if (copy_from_user(buff, iocommand.buf,
4952                                 iocommand.buf_size)) {
4953                                 rc = -EFAULT;
4954                                 goto out_kfree;
4955                         }
4956                 } else {
4957                         memset(buff, 0, iocommand.buf_size);
4958                 }
4959         }
4960         c = cmd_special_alloc(h);
4961         if (c == NULL) {
4962                 rc = -ENOMEM;
4963                 goto out_kfree;
4964         }
4965         /* Fill in the command type */
4966         c->cmd_type = CMD_IOCTL_PEND;
4967         /* Fill in Command Header */
4968         c->Header.ReplyQueue = 0; /* unused in simple mode */
4969         if (iocommand.buf_size > 0) {   /* buffer to fill */
4970                 c->Header.SGList = 1;
4971                 c->Header.SGTotal = 1;
4972         } else  { /* no buffers to fill */
4973                 c->Header.SGList = 0;
4974                 c->Header.SGTotal = 0;
4975         }
4976         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
4977         /* use the kernel address the cmd block for tag */
4978         c->Header.Tag.lower = c->busaddr;
4979
4980         /* Fill in Request block */
4981         memcpy(&c->Request, &iocommand.Request,
4982                 sizeof(c->Request));
4983
4984         /* Fill in the scatter gather information */
4985         if (iocommand.buf_size > 0) {
4986                 temp64.val = pci_map_single(h->pdev, buff,
4987                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
4988                 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
4989                         c->SG[0].Addr.lower = 0;
4990                         c->SG[0].Addr.upper = 0;
4991                         c->SG[0].Len = 0;
4992                         rc = -ENOMEM;
4993                         goto out;
4994                 }
4995                 c->SG[0].Addr.lower = temp64.val32.lower;
4996                 c->SG[0].Addr.upper = temp64.val32.upper;
4997                 c->SG[0].Len = iocommand.buf_size;
4998                 c->SG[0].Ext = HPSA_SG_LAST; /* we are not chaining*/
4999         }
5000         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5001         if (iocommand.buf_size > 0)
5002                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5003         check_ioctl_unit_attention(h, c);
5004
5005         /* Copy the error information out */
5006         memcpy(&iocommand.error_info, c->err_info,
5007                 sizeof(iocommand.error_info));
5008         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5009                 rc = -EFAULT;
5010                 goto out;
5011         }
5012         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5013                 iocommand.buf_size > 0) {
5014                 /* Copy the data out of the buffer we created */
5015                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5016                         rc = -EFAULT;
5017                         goto out;
5018                 }
5019         }
5020 out:
5021         cmd_special_free(h, c);
5022 out_kfree:
5023         kfree(buff);
5024         return rc;
5025 }
5026
5027 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5028 {
5029         BIG_IOCTL_Command_struct *ioc;
5030         struct CommandList *c;
5031         unsigned char **buff = NULL;
5032         int *buff_size = NULL;
5033         union u64bit temp64;
5034         BYTE sg_used = 0;
5035         int status = 0;
5036         int i;
5037         u32 left;
5038         u32 sz;
5039         BYTE __user *data_ptr;
5040
5041         if (!argp)
5042                 return -EINVAL;
5043         if (!capable(CAP_SYS_RAWIO))
5044                 return -EPERM;
5045         ioc = (BIG_IOCTL_Command_struct *)
5046             kmalloc(sizeof(*ioc), GFP_KERNEL);
5047         if (!ioc) {
5048                 status = -ENOMEM;
5049                 goto cleanup1;
5050         }
5051         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5052                 status = -EFAULT;
5053                 goto cleanup1;
5054         }
5055         if ((ioc->buf_size < 1) &&
5056             (ioc->Request.Type.Direction != XFER_NONE)) {
5057                 status = -EINVAL;
5058                 goto cleanup1;
5059         }
5060         /* Check kmalloc limits  using all SGs */
5061         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5062                 status = -EINVAL;
5063                 goto cleanup1;
5064         }
5065         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5066                 status = -EINVAL;
5067                 goto cleanup1;
5068         }
5069         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5070         if (!buff) {
5071                 status = -ENOMEM;
5072                 goto cleanup1;
5073         }
5074         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5075         if (!buff_size) {
5076                 status = -ENOMEM;
5077                 goto cleanup1;
5078         }
5079         left = ioc->buf_size;
5080         data_ptr = ioc->buf;
5081         while (left) {
5082                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5083                 buff_size[sg_used] = sz;
5084                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5085                 if (buff[sg_used] == NULL) {
5086                         status = -ENOMEM;
5087                         goto cleanup1;
5088                 }
5089                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5090                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5091                                 status = -ENOMEM;
5092                                 goto cleanup1;
5093                         }
5094                 } else
5095                         memset(buff[sg_used], 0, sz);
5096                 left -= sz;
5097                 data_ptr += sz;
5098                 sg_used++;
5099         }
5100         c = cmd_special_alloc(h);
5101         if (c == NULL) {
5102                 status = -ENOMEM;
5103                 goto cleanup1;
5104         }
5105         c->cmd_type = CMD_IOCTL_PEND;
5106         c->Header.ReplyQueue = 0;
5107         c->Header.SGList = c->Header.SGTotal = sg_used;
5108         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5109         c->Header.Tag.lower = c->busaddr;
5110         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5111         if (ioc->buf_size > 0) {
5112                 int i;
5113                 for (i = 0; i < sg_used; i++) {
5114                         temp64.val = pci_map_single(h->pdev, buff[i],
5115                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5116                         if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
5117                                 c->SG[i].Addr.lower = 0;
5118                                 c->SG[i].Addr.upper = 0;
5119                                 c->SG[i].Len = 0;
5120                                 hpsa_pci_unmap(h->pdev, c, i,
5121                                         PCI_DMA_BIDIRECTIONAL);
5122                                 status = -ENOMEM;
5123                                 goto cleanup0;
5124                         }
5125                         c->SG[i].Addr.lower = temp64.val32.lower;
5126                         c->SG[i].Addr.upper = temp64.val32.upper;
5127                         c->SG[i].Len = buff_size[i];
5128                         c->SG[i].Ext = i < sg_used - 1 ? 0 : HPSA_SG_LAST;
5129                 }
5130         }
5131         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5132         if (sg_used)
5133                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5134         check_ioctl_unit_attention(h, c);
5135         /* Copy the error information out */
5136         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5137         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5138                 status = -EFAULT;
5139                 goto cleanup0;
5140         }
5141         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5142                 /* Copy the data out of the buffer we created */
5143                 BYTE __user *ptr = ioc->buf;
5144                 for (i = 0; i < sg_used; i++) {
5145                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5146                                 status = -EFAULT;
5147                                 goto cleanup0;
5148                         }
5149                         ptr += buff_size[i];
5150                 }
5151         }
5152         status = 0;
5153 cleanup0:
5154         cmd_special_free(h, c);
5155 cleanup1:
5156         if (buff) {
5157                 for (i = 0; i < sg_used; i++)
5158                         kfree(buff[i]);
5159                 kfree(buff);
5160         }
5161         kfree(buff_size);
5162         kfree(ioc);
5163         return status;
5164 }
5165
5166 static void check_ioctl_unit_attention(struct ctlr_info *h,
5167         struct CommandList *c)
5168 {
5169         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5170                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5171                 (void) check_for_unit_attention(h, c);
5172 }
5173
5174 static int increment_passthru_count(struct ctlr_info *h)
5175 {
5176         unsigned long flags;
5177
5178         spin_lock_irqsave(&h->passthru_count_lock, flags);
5179         if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
5180                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5181                 return -1;
5182         }
5183         h->passthru_count++;
5184         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5185         return 0;
5186 }
5187
5188 static void decrement_passthru_count(struct ctlr_info *h)
5189 {
5190         unsigned long flags;
5191
5192         spin_lock_irqsave(&h->passthru_count_lock, flags);
5193         if (h->passthru_count <= 0) {
5194                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5195                 /* not expecting to get here. */
5196                 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
5197                 return;
5198         }
5199         h->passthru_count--;
5200         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5201 }
5202
5203 /*
5204  * ioctl
5205  */
5206 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
5207 {
5208         struct ctlr_info *h;
5209         void __user *argp = (void __user *)arg;
5210         int rc;
5211
5212         h = sdev_to_hba(dev);
5213
5214         switch (cmd) {
5215         case CCISS_DEREGDISK:
5216         case CCISS_REGNEWDISK:
5217         case CCISS_REGNEWD:
5218                 hpsa_scan_start(h->scsi_host);
5219                 return 0;
5220         case CCISS_GETPCIINFO:
5221                 return hpsa_getpciinfo_ioctl(h, argp);
5222         case CCISS_GETDRIVVER:
5223                 return hpsa_getdrivver_ioctl(h, argp);
5224         case CCISS_PASSTHRU:
5225                 if (increment_passthru_count(h))
5226                         return -EAGAIN;
5227                 rc = hpsa_passthru_ioctl(h, argp);
5228                 decrement_passthru_count(h);
5229                 return rc;
5230         case CCISS_BIG_PASSTHRU:
5231                 if (increment_passthru_count(h))
5232                         return -EAGAIN;
5233                 rc = hpsa_big_passthru_ioctl(h, argp);
5234                 decrement_passthru_count(h);
5235                 return rc;
5236         default:
5237                 return -ENOTTY;
5238         }
5239 }
5240
5241 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5242                                 u8 reset_type)
5243 {
5244         struct CommandList *c;
5245
5246         c = cmd_alloc(h);
5247         if (!c)
5248                 return -ENOMEM;
5249         /* fill_cmd can't fail here, no data buffer to map */
5250         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5251                 RAID_CTLR_LUNID, TYPE_MSG);
5252         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5253         c->waiting = NULL;
5254         enqueue_cmd_and_start_io(h, c);
5255         /* Don't wait for completion, the reset won't complete.  Don't free
5256          * the command either.  This is the last command we will send before
5257          * re-initializing everything, so it doesn't matter and won't leak.
5258          */
5259         return 0;
5260 }
5261
5262 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5263         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5264         int cmd_type)
5265 {
5266         int pci_dir = XFER_NONE;
5267         struct CommandList *a; /* for commands to be aborted */
5268
5269         c->cmd_type = CMD_IOCTL_PEND;
5270         c->Header.ReplyQueue = 0;
5271         if (buff != NULL && size > 0) {
5272                 c->Header.SGList = 1;
5273                 c->Header.SGTotal = 1;
5274         } else {
5275                 c->Header.SGList = 0;
5276                 c->Header.SGTotal = 0;
5277         }
5278         c->Header.Tag.lower = c->busaddr;
5279         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5280
5281         c->Request.Type.Type = cmd_type;
5282         if (cmd_type == TYPE_CMD) {
5283                 switch (cmd) {
5284                 case HPSA_INQUIRY:
5285                         /* are we trying to read a vital product page */
5286                         if (page_code & VPD_PAGE) {
5287                                 c->Request.CDB[1] = 0x01;
5288                                 c->Request.CDB[2] = (page_code & 0xff);
5289                         }
5290                         c->Request.CDBLen = 6;
5291                         c->Request.Type.Attribute = ATTR_SIMPLE;
5292                         c->Request.Type.Direction = XFER_READ;
5293                         c->Request.Timeout = 0;
5294                         c->Request.CDB[0] = HPSA_INQUIRY;
5295                         c->Request.CDB[4] = size & 0xFF;
5296                         break;
5297                 case HPSA_REPORT_LOG:
5298                 case HPSA_REPORT_PHYS:
5299                         /* Talking to controller so It's a physical command
5300                            mode = 00 target = 0.  Nothing to write.
5301                          */
5302                         c->Request.CDBLen = 12;
5303                         c->Request.Type.Attribute = ATTR_SIMPLE;
5304                         c->Request.Type.Direction = XFER_READ;
5305                         c->Request.Timeout = 0;
5306                         c->Request.CDB[0] = cmd;
5307                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5308                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5309                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5310                         c->Request.CDB[9] = size & 0xFF;
5311                         break;
5312                 case HPSA_CACHE_FLUSH:
5313                         c->Request.CDBLen = 12;
5314                         c->Request.Type.Attribute = ATTR_SIMPLE;
5315                         c->Request.Type.Direction = XFER_WRITE;
5316                         c->Request.Timeout = 0;
5317                         c->Request.CDB[0] = BMIC_WRITE;
5318                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5319                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5320                         c->Request.CDB[8] = size & 0xFF;
5321                         break;
5322                 case TEST_UNIT_READY:
5323                         c->Request.CDBLen = 6;
5324                         c->Request.Type.Attribute = ATTR_SIMPLE;
5325                         c->Request.Type.Direction = XFER_NONE;
5326                         c->Request.Timeout = 0;
5327                         break;
5328                 case HPSA_GET_RAID_MAP:
5329                         c->Request.CDBLen = 12;
5330                         c->Request.Type.Attribute = ATTR_SIMPLE;
5331                         c->Request.Type.Direction = XFER_READ;
5332                         c->Request.Timeout = 0;
5333                         c->Request.CDB[0] = HPSA_CISS_READ;
5334                         c->Request.CDB[1] = cmd;
5335                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5336                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5337                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5338                         c->Request.CDB[9] = size & 0xFF;
5339                         break;
5340                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5341                         c->Request.CDBLen = 10;
5342                         c->Request.Type.Attribute = ATTR_SIMPLE;
5343                         c->Request.Type.Direction = XFER_READ;
5344                         c->Request.Timeout = 0;
5345                         c->Request.CDB[0] = BMIC_READ;
5346                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5347                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5348                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5349                         break;
5350                 default:
5351                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5352                         BUG();
5353                         return -1;
5354                 }
5355         } else if (cmd_type == TYPE_MSG) {
5356                 switch (cmd) {
5357
5358                 case  HPSA_DEVICE_RESET_MSG:
5359                         c->Request.CDBLen = 16;
5360                         c->Request.Type.Type =  1; /* It is a MSG not a CMD */
5361                         c->Request.Type.Attribute = ATTR_SIMPLE;
5362                         c->Request.Type.Direction = XFER_NONE;
5363                         c->Request.Timeout = 0; /* Don't time out */
5364                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5365                         c->Request.CDB[0] =  cmd;
5366                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5367                         /* If bytes 4-7 are zero, it means reset the */
5368                         /* LunID device */
5369                         c->Request.CDB[4] = 0x00;
5370                         c->Request.CDB[5] = 0x00;
5371                         c->Request.CDB[6] = 0x00;
5372                         c->Request.CDB[7] = 0x00;
5373                         break;
5374                 case  HPSA_ABORT_MSG:
5375                         a = buff;       /* point to command to be aborted */
5376                         dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
5377                                 a->Header.Tag.upper, a->Header.Tag.lower,
5378                                 c->Header.Tag.upper, c->Header.Tag.lower);
5379                         c->Request.CDBLen = 16;
5380                         c->Request.Type.Type = TYPE_MSG;
5381                         c->Request.Type.Attribute = ATTR_SIMPLE;
5382                         c->Request.Type.Direction = XFER_WRITE;
5383                         c->Request.Timeout = 0; /* Don't time out */
5384                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5385                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5386                         c->Request.CDB[2] = 0x00; /* reserved */
5387                         c->Request.CDB[3] = 0x00; /* reserved */
5388                         /* Tag to abort goes in CDB[4]-CDB[11] */
5389                         c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
5390                         c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
5391                         c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
5392                         c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
5393                         c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
5394                         c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
5395                         c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
5396                         c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
5397                         c->Request.CDB[12] = 0x00; /* reserved */
5398                         c->Request.CDB[13] = 0x00; /* reserved */
5399                         c->Request.CDB[14] = 0x00; /* reserved */
5400                         c->Request.CDB[15] = 0x00; /* reserved */
5401                 break;
5402                 default:
5403                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5404                                 cmd);
5405                         BUG();
5406                 }
5407         } else {
5408                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5409                 BUG();
5410         }
5411
5412         switch (c->Request.Type.Direction) {
5413         case XFER_READ:
5414                 pci_dir = PCI_DMA_FROMDEVICE;
5415                 break;
5416         case XFER_WRITE:
5417                 pci_dir = PCI_DMA_TODEVICE;
5418                 break;
5419         case XFER_NONE:
5420                 pci_dir = PCI_DMA_NONE;
5421                 break;
5422         default:
5423                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5424         }
5425         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5426                 return -1;
5427         return 0;
5428 }
5429
5430 /*
5431  * Map (physical) PCI mem into (virtual) kernel space
5432  */
5433 static void __iomem *remap_pci_mem(ulong base, ulong size)
5434 {
5435         ulong page_base = ((ulong) base) & PAGE_MASK;
5436         ulong page_offs = ((ulong) base) - page_base;
5437         void __iomem *page_remapped = ioremap_nocache(page_base,
5438                 page_offs + size);
5439
5440         return page_remapped ? (page_remapped + page_offs) : NULL;
5441 }
5442
5443 /* Takes cmds off the submission queue and sends them to the hardware,
5444  * then puts them on the queue of cmds waiting for completion.
5445  * Assumes h->lock is held
5446  */
5447 static void start_io(struct ctlr_info *h, unsigned long *flags)
5448 {
5449         struct CommandList *c;
5450
5451         while (!list_empty(&h->reqQ)) {
5452                 c = list_entry(h->reqQ.next, struct CommandList, list);
5453                 /* can't do anything if fifo is full */
5454                 if ((h->access.fifo_full(h))) {
5455                         h->fifo_recently_full = 1;
5456                         dev_warn(&h->pdev->dev, "fifo full\n");
5457                         break;
5458                 }
5459                 h->fifo_recently_full = 0;
5460
5461                 /* Get the first entry from the Request Q */
5462                 removeQ(c);
5463                 h->Qdepth--;
5464
5465                 /* Put job onto the completed Q */
5466                 addQ(&h->cmpQ, c);
5467
5468                 /* Must increment commands_outstanding before unlocking
5469                  * and submitting to avoid race checking for fifo full
5470                  * condition.
5471                  */
5472                 h->commands_outstanding++;
5473
5474                 /* Tell the controller execute command */
5475                 spin_unlock_irqrestore(&h->lock, *flags);
5476                 h->access.submit_command(h, c);
5477                 spin_lock_irqsave(&h->lock, *flags);
5478         }
5479 }
5480
5481 static void lock_and_start_io(struct ctlr_info *h)
5482 {
5483         unsigned long flags;
5484
5485         spin_lock_irqsave(&h->lock, flags);
5486         start_io(h, &flags);
5487         spin_unlock_irqrestore(&h->lock, flags);
5488 }
5489
5490 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5491 {
5492         return h->access.command_completed(h, q);
5493 }
5494
5495 static inline bool interrupt_pending(struct ctlr_info *h)
5496 {
5497         return h->access.intr_pending(h);
5498 }
5499
5500 static inline long interrupt_not_for_us(struct ctlr_info *h)
5501 {
5502         return (h->access.intr_pending(h) == 0) ||
5503                 (h->interrupts_enabled == 0);
5504 }
5505
5506 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5507         u32 raw_tag)
5508 {
5509         if (unlikely(tag_index >= h->nr_cmds)) {
5510                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5511                 return 1;
5512         }
5513         return 0;
5514 }
5515
5516 static inline void finish_cmd(struct CommandList *c)
5517 {
5518         unsigned long flags;
5519         int io_may_be_stalled = 0;
5520         struct ctlr_info *h = c->h;
5521
5522         spin_lock_irqsave(&h->lock, flags);
5523         removeQ(c);
5524
5525         /*
5526          * Check for possibly stalled i/o.
5527          *
5528          * If a fifo_full condition is encountered, requests will back up
5529          * in h->reqQ.  This queue is only emptied out by start_io which is
5530          * only called when a new i/o request comes in.  If no i/o's are
5531          * forthcoming, the i/o's in h->reqQ can get stuck.  So we call
5532          * start_io from here if we detect such a danger.
5533          *
5534          * Normally, we shouldn't hit this case, but pounding on the
5535          * CCISS_PASSTHRU ioctl can provoke it.  Only call start_io if
5536          * commands_outstanding is low.  We want to avoid calling
5537          * start_io from in here as much as possible, and esp. don't
5538          * want to get in a cycle where we call start_io every time
5539          * through here.
5540          */
5541         if (unlikely(h->fifo_recently_full) &&
5542                 h->commands_outstanding < 5)
5543                 io_may_be_stalled = 1;
5544
5545         spin_unlock_irqrestore(&h->lock, flags);
5546
5547         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5548         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5549                         || c->cmd_type == CMD_IOACCEL2))
5550                 complete_scsi_command(c);
5551         else if (c->cmd_type == CMD_IOCTL_PEND)
5552                 complete(c->waiting);
5553         if (unlikely(io_may_be_stalled))
5554                 lock_and_start_io(h);
5555 }
5556
5557 static inline u32 hpsa_tag_contains_index(u32 tag)
5558 {
5559         return tag & DIRECT_LOOKUP_BIT;
5560 }
5561
5562 static inline u32 hpsa_tag_to_index(u32 tag)
5563 {
5564         return tag >> DIRECT_LOOKUP_SHIFT;
5565 }
5566
5567
5568 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5569 {
5570 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5571 #define HPSA_SIMPLE_ERROR_BITS 0x03
5572         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5573                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5574         return tag & ~HPSA_PERF_ERROR_BITS;
5575 }
5576
5577 /* process completion of an indexed ("direct lookup") command */
5578 static inline void process_indexed_cmd(struct ctlr_info *h,
5579         u32 raw_tag)
5580 {
5581         u32 tag_index;
5582         struct CommandList *c;
5583
5584         tag_index = hpsa_tag_to_index(raw_tag);
5585         if (!bad_tag(h, tag_index, raw_tag)) {
5586                 c = h->cmd_pool + tag_index;
5587                 finish_cmd(c);
5588         }
5589 }
5590
5591 /* process completion of a non-indexed command */
5592 static inline void process_nonindexed_cmd(struct ctlr_info *h,
5593         u32 raw_tag)
5594 {
5595         u32 tag;
5596         struct CommandList *c = NULL;
5597         unsigned long flags;
5598
5599         tag = hpsa_tag_discard_error_bits(h, raw_tag);
5600         spin_lock_irqsave(&h->lock, flags);
5601         list_for_each_entry(c, &h->cmpQ, list) {
5602                 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
5603                         spin_unlock_irqrestore(&h->lock, flags);
5604                         finish_cmd(c);
5605                         return;
5606                 }
5607         }
5608         spin_unlock_irqrestore(&h->lock, flags);
5609         bad_tag(h, h->nr_cmds + 1, raw_tag);
5610 }
5611
5612 /* Some controllers, like p400, will give us one interrupt
5613  * after a soft reset, even if we turned interrupts off.
5614  * Only need to check for this in the hpsa_xxx_discard_completions
5615  * functions.
5616  */
5617 static int ignore_bogus_interrupt(struct ctlr_info *h)
5618 {
5619         if (likely(!reset_devices))
5620                 return 0;
5621
5622         if (likely(h->interrupts_enabled))
5623                 return 0;
5624
5625         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5626                 "(known firmware bug.)  Ignoring.\n");
5627
5628         return 1;
5629 }
5630
5631 /*
5632  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5633  * Relies on (h-q[x] == x) being true for x such that
5634  * 0 <= x < MAX_REPLY_QUEUES.
5635  */
5636 static struct ctlr_info *queue_to_hba(u8 *queue)
5637 {
5638         return container_of((queue - *queue), struct ctlr_info, q[0]);
5639 }
5640
5641 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5642 {
5643         struct ctlr_info *h = queue_to_hba(queue);
5644         u8 q = *(u8 *) queue;
5645         u32 raw_tag;
5646
5647         if (ignore_bogus_interrupt(h))
5648                 return IRQ_NONE;
5649
5650         if (interrupt_not_for_us(h))
5651                 return IRQ_NONE;
5652         h->last_intr_timestamp = get_jiffies_64();
5653         while (interrupt_pending(h)) {
5654                 raw_tag = get_next_completion(h, q);
5655                 while (raw_tag != FIFO_EMPTY)
5656                         raw_tag = next_command(h, q);
5657         }
5658         return IRQ_HANDLED;
5659 }
5660
5661 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5662 {
5663         struct ctlr_info *h = queue_to_hba(queue);
5664         u32 raw_tag;
5665         u8 q = *(u8 *) queue;
5666
5667         if (ignore_bogus_interrupt(h))
5668                 return IRQ_NONE;
5669
5670         h->last_intr_timestamp = get_jiffies_64();
5671         raw_tag = get_next_completion(h, q);
5672         while (raw_tag != FIFO_EMPTY)
5673                 raw_tag = next_command(h, q);
5674         return IRQ_HANDLED;
5675 }
5676
5677 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5678 {
5679         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5680         u32 raw_tag;
5681         u8 q = *(u8 *) queue;
5682
5683         if (interrupt_not_for_us(h))
5684                 return IRQ_NONE;
5685         h->last_intr_timestamp = get_jiffies_64();
5686         while (interrupt_pending(h)) {
5687                 raw_tag = get_next_completion(h, q);
5688                 while (raw_tag != FIFO_EMPTY) {
5689                         if (likely(hpsa_tag_contains_index(raw_tag)))
5690                                 process_indexed_cmd(h, raw_tag);
5691                         else
5692                                 process_nonindexed_cmd(h, raw_tag);
5693                         raw_tag = next_command(h, q);
5694                 }
5695         }
5696         return IRQ_HANDLED;
5697 }
5698
5699 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5700 {
5701         struct ctlr_info *h = queue_to_hba(queue);
5702         u32 raw_tag;
5703         u8 q = *(u8 *) queue;
5704
5705         h->last_intr_timestamp = get_jiffies_64();
5706         raw_tag = get_next_completion(h, q);
5707         while (raw_tag != FIFO_EMPTY) {
5708                 if (likely(hpsa_tag_contains_index(raw_tag)))
5709                         process_indexed_cmd(h, raw_tag);
5710                 else
5711                         process_nonindexed_cmd(h, raw_tag);
5712                 raw_tag = next_command(h, q);
5713         }
5714         return IRQ_HANDLED;
5715 }
5716
5717 /* Send a message CDB to the firmware. Careful, this only works
5718  * in simple mode, not performant mode due to the tag lookup.
5719  * We only ever use this immediately after a controller reset.
5720  */
5721 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5722                         unsigned char type)
5723 {
5724         struct Command {
5725                 struct CommandListHeader CommandHeader;
5726                 struct RequestBlock Request;
5727                 struct ErrDescriptor ErrorDescriptor;
5728         };
5729         struct Command *cmd;
5730         static const size_t cmd_sz = sizeof(*cmd) +
5731                                         sizeof(cmd->ErrorDescriptor);
5732         dma_addr_t paddr64;
5733         uint32_t paddr32, tag;
5734         void __iomem *vaddr;
5735         int i, err;
5736
5737         vaddr = pci_ioremap_bar(pdev, 0);
5738         if (vaddr == NULL)
5739                 return -ENOMEM;
5740
5741         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5742          * CCISS commands, so they must be allocated from the lower 4GiB of
5743          * memory.
5744          */
5745         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5746         if (err) {
5747                 iounmap(vaddr);
5748                 return -ENOMEM;
5749         }
5750
5751         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5752         if (cmd == NULL) {
5753                 iounmap(vaddr);
5754                 return -ENOMEM;
5755         }
5756
5757         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5758          * although there's no guarantee, we assume that the address is at
5759          * least 4-byte aligned (most likely, it's page-aligned).
5760          */
5761         paddr32 = paddr64;
5762
5763         cmd->CommandHeader.ReplyQueue = 0;
5764         cmd->CommandHeader.SGList = 0;
5765         cmd->CommandHeader.SGTotal = 0;
5766         cmd->CommandHeader.Tag.lower = paddr32;
5767         cmd->CommandHeader.Tag.upper = 0;
5768         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
5769
5770         cmd->Request.CDBLen = 16;
5771         cmd->Request.Type.Type = TYPE_MSG;
5772         cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
5773         cmd->Request.Type.Direction = XFER_NONE;
5774         cmd->Request.Timeout = 0; /* Don't time out */
5775         cmd->Request.CDB[0] = opcode;
5776         cmd->Request.CDB[1] = type;
5777         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5778         cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
5779         cmd->ErrorDescriptor.Addr.upper = 0;
5780         cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
5781
5782         writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
5783
5784         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
5785                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
5786                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
5787                         break;
5788                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
5789         }
5790
5791         iounmap(vaddr);
5792
5793         /* we leak the DMA buffer here ... no choice since the controller could
5794          *  still complete the command.
5795          */
5796         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
5797                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
5798                         opcode, type);
5799                 return -ETIMEDOUT;
5800         }
5801
5802         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
5803
5804         if (tag & HPSA_ERROR_BIT) {
5805                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
5806                         opcode, type);
5807                 return -EIO;
5808         }
5809
5810         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
5811                 opcode, type);
5812         return 0;
5813 }
5814
5815 #define hpsa_noop(p) hpsa_message(p, 3, 0)
5816
5817 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
5818         void * __iomem vaddr, u32 use_doorbell)
5819 {
5820         u16 pmcsr;
5821         int pos;
5822
5823         if (use_doorbell) {
5824                 /* For everything after the P600, the PCI power state method
5825                  * of resetting the controller doesn't work, so we have this
5826                  * other way using the doorbell register.
5827                  */
5828                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
5829                 writel(use_doorbell, vaddr + SA5_DOORBELL);
5830
5831                 /* PMC hardware guys tell us we need a 10 second delay after
5832                  * doorbell reset and before any attempt to talk to the board
5833                  * at all to ensure that this actually works and doesn't fall
5834                  * over in some weird corner cases.
5835                  */
5836                 msleep(10000);
5837         } else { /* Try to do it the PCI power state way */
5838
5839                 /* Quoting from the Open CISS Specification: "The Power
5840                  * Management Control/Status Register (CSR) controls the power
5841                  * state of the device.  The normal operating state is D0,
5842                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
5843                  * the controller, place the interface device in D3 then to D0,
5844                  * this causes a secondary PCI reset which will reset the
5845                  * controller." */
5846
5847                 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
5848                 if (pos == 0) {
5849                         dev_err(&pdev->dev,
5850                                 "hpsa_reset_controller: "
5851                                 "PCI PM not supported\n");
5852                         return -ENODEV;
5853                 }
5854                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
5855                 /* enter the D3hot power management state */
5856                 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
5857                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5858                 pmcsr |= PCI_D3hot;
5859                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5860
5861                 msleep(500);
5862
5863                 /* enter the D0 power management state */
5864                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5865                 pmcsr |= PCI_D0;
5866                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5867
5868                 /*
5869                  * The P600 requires a small delay when changing states.
5870                  * Otherwise we may think the board did not reset and we bail.
5871                  * This for kdump only and is particular to the P600.
5872                  */
5873                 msleep(500);
5874         }
5875         return 0;
5876 }
5877
5878 static void init_driver_version(char *driver_version, int len)
5879 {
5880         memset(driver_version, 0, len);
5881         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
5882 }
5883
5884 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
5885 {
5886         char *driver_version;
5887         int i, size = sizeof(cfgtable->driver_version);
5888
5889         driver_version = kmalloc(size, GFP_KERNEL);
5890         if (!driver_version)
5891                 return -ENOMEM;
5892
5893         init_driver_version(driver_version, size);
5894         for (i = 0; i < size; i++)
5895                 writeb(driver_version[i], &cfgtable->driver_version[i]);
5896         kfree(driver_version);
5897         return 0;
5898 }
5899
5900 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
5901                                           unsigned char *driver_ver)
5902 {
5903         int i;
5904
5905         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
5906                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
5907 }
5908
5909 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
5910 {
5911
5912         char *driver_ver, *old_driver_ver;
5913         int rc, size = sizeof(cfgtable->driver_version);
5914
5915         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
5916         if (!old_driver_ver)
5917                 return -ENOMEM;
5918         driver_ver = old_driver_ver + size;
5919
5920         /* After a reset, the 32 bytes of "driver version" in the cfgtable
5921          * should have been changed, otherwise we know the reset failed.
5922          */
5923         init_driver_version(old_driver_ver, size);
5924         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
5925         rc = !memcmp(driver_ver, old_driver_ver, size);
5926         kfree(old_driver_ver);
5927         return rc;
5928 }
5929 /* This does a hard reset of the controller using PCI power management
5930  * states or the using the doorbell register.
5931  */
5932 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
5933 {
5934         u64 cfg_offset;
5935         u32 cfg_base_addr;
5936         u64 cfg_base_addr_index;
5937         void __iomem *vaddr;
5938         unsigned long paddr;
5939         u32 misc_fw_support;
5940         int rc;
5941         struct CfgTable __iomem *cfgtable;
5942         u32 use_doorbell;
5943         u32 board_id;
5944         u16 command_register;
5945
5946         /* For controllers as old as the P600, this is very nearly
5947          * the same thing as
5948          *
5949          * pci_save_state(pci_dev);
5950          * pci_set_power_state(pci_dev, PCI_D3hot);
5951          * pci_set_power_state(pci_dev, PCI_D0);
5952          * pci_restore_state(pci_dev);
5953          *
5954          * For controllers newer than the P600, the pci power state
5955          * method of resetting doesn't work so we have another way
5956          * using the doorbell register.
5957          */
5958
5959         rc = hpsa_lookup_board_id(pdev, &board_id);
5960         if (rc < 0 || !ctlr_is_resettable(board_id)) {
5961                 dev_warn(&pdev->dev, "Not resetting device.\n");
5962                 return -ENODEV;
5963         }
5964
5965         /* if controller is soft- but not hard resettable... */
5966         if (!ctlr_is_hard_resettable(board_id))
5967                 return -ENOTSUPP; /* try soft reset later. */
5968
5969         /* Save the PCI command register */
5970         pci_read_config_word(pdev, 4, &command_register);
5971         /* Turn the board off.  This is so that later pci_restore_state()
5972          * won't turn the board on before the rest of config space is ready.
5973          */
5974         pci_disable_device(pdev);
5975         pci_save_state(pdev);
5976
5977         /* find the first memory BAR, so we can find the cfg table */
5978         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
5979         if (rc)
5980                 return rc;
5981         vaddr = remap_pci_mem(paddr, 0x250);
5982         if (!vaddr)
5983                 return -ENOMEM;
5984
5985         /* find cfgtable in order to check if reset via doorbell is supported */
5986         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
5987                                         &cfg_base_addr_index, &cfg_offset);
5988         if (rc)
5989                 goto unmap_vaddr;
5990         cfgtable = remap_pci_mem(pci_resource_start(pdev,
5991                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
5992         if (!cfgtable) {
5993                 rc = -ENOMEM;
5994                 goto unmap_vaddr;
5995         }
5996         rc = write_driver_ver_to_cfgtable(cfgtable);
5997         if (rc)
5998                 goto unmap_vaddr;
5999
6000         /* If reset via doorbell register is supported, use that.
6001          * There are two such methods.  Favor the newest method.
6002          */
6003         misc_fw_support = readl(&cfgtable->misc_fw_support);
6004         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6005         if (use_doorbell) {
6006                 use_doorbell = DOORBELL_CTLR_RESET2;
6007         } else {
6008                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6009                 if (use_doorbell) {
6010                         dev_warn(&pdev->dev, "Soft reset not supported. "
6011                                 "Firmware update is required.\n");
6012                         rc = -ENOTSUPP; /* try soft reset */
6013                         goto unmap_cfgtable;
6014                 }
6015         }
6016
6017         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6018         if (rc)
6019                 goto unmap_cfgtable;
6020
6021         pci_restore_state(pdev);
6022         rc = pci_enable_device(pdev);
6023         if (rc) {
6024                 dev_warn(&pdev->dev, "failed to enable device.\n");
6025                 goto unmap_cfgtable;
6026         }
6027         pci_write_config_word(pdev, 4, command_register);
6028
6029         /* Some devices (notably the HP Smart Array 5i Controller)
6030            need a little pause here */
6031         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6032
6033         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6034         if (rc) {
6035                 dev_warn(&pdev->dev,
6036                         "failed waiting for board to become ready "
6037                         "after hard reset\n");
6038                 goto unmap_cfgtable;
6039         }
6040
6041         rc = controller_reset_failed(vaddr);
6042         if (rc < 0)
6043                 goto unmap_cfgtable;
6044         if (rc) {
6045                 dev_warn(&pdev->dev, "Unable to successfully reset "
6046                         "controller. Will try soft reset.\n");
6047                 rc = -ENOTSUPP;
6048         } else {
6049                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6050         }
6051
6052 unmap_cfgtable:
6053         iounmap(cfgtable);
6054
6055 unmap_vaddr:
6056         iounmap(vaddr);
6057         return rc;
6058 }
6059
6060 /*
6061  *  We cannot read the structure directly, for portability we must use
6062  *   the io functions.
6063  *   This is for debug only.
6064  */
6065 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
6066 {
6067 #ifdef HPSA_DEBUG
6068         int i;
6069         char temp_name[17];
6070
6071         dev_info(dev, "Controller Configuration information\n");
6072         dev_info(dev, "------------------------------------\n");
6073         for (i = 0; i < 4; i++)
6074                 temp_name[i] = readb(&(tb->Signature[i]));
6075         temp_name[4] = '\0';
6076         dev_info(dev, "   Signature = %s\n", temp_name);
6077         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6078         dev_info(dev, "   Transport methods supported = 0x%x\n",
6079                readl(&(tb->TransportSupport)));
6080         dev_info(dev, "   Transport methods active = 0x%x\n",
6081                readl(&(tb->TransportActive)));
6082         dev_info(dev, "   Requested transport Method = 0x%x\n",
6083                readl(&(tb->HostWrite.TransportRequest)));
6084         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6085                readl(&(tb->HostWrite.CoalIntDelay)));
6086         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6087                readl(&(tb->HostWrite.CoalIntCount)));
6088         dev_info(dev, "   Max outstanding commands = 0x%d\n",
6089                readl(&(tb->CmdsOutMax)));
6090         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6091         for (i = 0; i < 16; i++)
6092                 temp_name[i] = readb(&(tb->ServerName[i]));
6093         temp_name[16] = '\0';
6094         dev_info(dev, "   Server Name = %s\n", temp_name);
6095         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6096                 readl(&(tb->HeartBeat)));
6097 #endif                          /* HPSA_DEBUG */
6098 }
6099
6100 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6101 {
6102         int i, offset, mem_type, bar_type;
6103
6104         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6105                 return 0;
6106         offset = 0;
6107         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6108                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6109                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6110                         offset += 4;
6111                 else {
6112                         mem_type = pci_resource_flags(pdev, i) &
6113                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6114                         switch (mem_type) {
6115                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6116                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6117                                 offset += 4;    /* 32 bit */
6118                                 break;
6119                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6120                                 offset += 8;
6121                                 break;
6122                         default:        /* reserved in PCI 2.2 */
6123                                 dev_warn(&pdev->dev,
6124                                        "base address is invalid\n");
6125                                 return -1;
6126                                 break;
6127                         }
6128                 }
6129                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6130                         return i + 1;
6131         }
6132         return -1;
6133 }
6134
6135 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6136  * controllers that are capable. If not, we use IO-APIC mode.
6137  */
6138
6139 static void hpsa_interrupt_mode(struct ctlr_info *h)
6140 {
6141 #ifdef CONFIG_PCI_MSI
6142         int err, i;
6143         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6144
6145         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6146                 hpsa_msix_entries[i].vector = 0;
6147                 hpsa_msix_entries[i].entry = i;
6148         }
6149
6150         /* Some boards advertise MSI but don't really support it */
6151         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6152             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6153                 goto default_int_mode;
6154         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6155                 dev_info(&h->pdev->dev, "MSIX\n");
6156                 h->msix_vector = MAX_REPLY_QUEUES;
6157                 if (h->msix_vector > num_online_cpus())
6158                         h->msix_vector = num_online_cpus();
6159                 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
6160                                       h->msix_vector);
6161                 if (err > 0) {
6162                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6163                                "available\n", err);
6164                         h->msix_vector = err;
6165                         err = pci_enable_msix(h->pdev, hpsa_msix_entries,
6166                                               h->msix_vector);
6167                 }
6168                 if (!err) {
6169                         for (i = 0; i < h->msix_vector; i++)
6170                                 h->intr[i] = hpsa_msix_entries[i].vector;
6171                         return;
6172                 } else {
6173                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
6174                                err);
6175                         h->msix_vector = 0;
6176                         goto default_int_mode;
6177                 }
6178         }
6179         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6180                 dev_info(&h->pdev->dev, "MSI\n");
6181                 if (!pci_enable_msi(h->pdev))
6182                         h->msi_vector = 1;
6183                 else
6184                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6185         }
6186 default_int_mode:
6187 #endif                          /* CONFIG_PCI_MSI */
6188         /* if we get here we're going to use the default interrupt mode */
6189         h->intr[h->intr_mode] = h->pdev->irq;
6190 }
6191
6192 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6193 {
6194         int i;
6195         u32 subsystem_vendor_id, subsystem_device_id;
6196
6197         subsystem_vendor_id = pdev->subsystem_vendor;
6198         subsystem_device_id = pdev->subsystem_device;
6199         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6200                     subsystem_vendor_id;
6201
6202         for (i = 0; i < ARRAY_SIZE(products); i++)
6203                 if (*board_id == products[i].board_id)
6204                         return i;
6205
6206         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6207                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6208                 !hpsa_allow_any) {
6209                 dev_warn(&pdev->dev, "unrecognized board ID: "
6210                         "0x%08x, ignoring.\n", *board_id);
6211                         return -ENODEV;
6212         }
6213         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6214 }
6215
6216 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6217                                     unsigned long *memory_bar)
6218 {
6219         int i;
6220
6221         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6222                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6223                         /* addressing mode bits already removed */
6224                         *memory_bar = pci_resource_start(pdev, i);
6225                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6226                                 *memory_bar);
6227                         return 0;
6228                 }
6229         dev_warn(&pdev->dev, "no memory BAR found\n");
6230         return -ENODEV;
6231 }
6232
6233 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6234                                      int wait_for_ready)
6235 {
6236         int i, iterations;
6237         u32 scratchpad;
6238         if (wait_for_ready)
6239                 iterations = HPSA_BOARD_READY_ITERATIONS;
6240         else
6241                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6242
6243         for (i = 0; i < iterations; i++) {
6244                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6245                 if (wait_for_ready) {
6246                         if (scratchpad == HPSA_FIRMWARE_READY)
6247                                 return 0;
6248                 } else {
6249                         if (scratchpad != HPSA_FIRMWARE_READY)
6250                                 return 0;
6251                 }
6252                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6253         }
6254         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6255         return -ENODEV;
6256 }
6257
6258 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6259                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6260                                u64 *cfg_offset)
6261 {
6262         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6263         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6264         *cfg_base_addr &= (u32) 0x0000ffff;
6265         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6266         if (*cfg_base_addr_index == -1) {
6267                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6268                 return -ENODEV;
6269         }
6270         return 0;
6271 }
6272
6273 static int hpsa_find_cfgtables(struct ctlr_info *h)
6274 {
6275         u64 cfg_offset;
6276         u32 cfg_base_addr;
6277         u64 cfg_base_addr_index;
6278         u32 trans_offset;
6279         int rc;
6280
6281         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6282                 &cfg_base_addr_index, &cfg_offset);
6283         if (rc)
6284                 return rc;
6285         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6286                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6287         if (!h->cfgtable)
6288                 return -ENOMEM;
6289         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6290         if (rc)
6291                 return rc;
6292         /* Find performant mode table. */
6293         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6294         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6295                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6296                                 sizeof(*h->transtable));
6297         if (!h->transtable)
6298                 return -ENOMEM;
6299         return 0;
6300 }
6301
6302 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6303 {
6304         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
6305
6306         /* Limit commands in memory limited kdump scenario. */
6307         if (reset_devices && h->max_commands > 32)
6308                 h->max_commands = 32;
6309
6310         if (h->max_commands < 16) {
6311                 dev_warn(&h->pdev->dev, "Controller reports "
6312                         "max supported commands of %d, an obvious lie. "
6313                         "Using 16.  Ensure that firmware is up to date.\n",
6314                         h->max_commands);
6315                 h->max_commands = 16;
6316         }
6317 }
6318
6319 /* Interrogate the hardware for some limits:
6320  * max commands, max SG elements without chaining, and with chaining,
6321  * SG chain block size, etc.
6322  */
6323 static void hpsa_find_board_params(struct ctlr_info *h)
6324 {
6325         hpsa_get_max_perf_mode_cmds(h);
6326         h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
6327         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6328         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6329         /*
6330          * Limit in-command s/g elements to 32 save dma'able memory.
6331          * Howvever spec says if 0, use 31
6332          */
6333         h->max_cmd_sg_entries = 31;
6334         if (h->maxsgentries > 512) {
6335                 h->max_cmd_sg_entries = 32;
6336                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
6337                 h->maxsgentries--; /* save one for chain pointer */
6338         } else {
6339                 h->maxsgentries = 31; /* default to traditional values */
6340                 h->chainsize = 0;
6341         }
6342
6343         /* Find out what task management functions are supported and cache */
6344         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6345         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6346                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6347         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6348                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6349 }
6350
6351 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6352 {
6353         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6354                 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
6355                 return false;
6356         }
6357         return true;
6358 }
6359
6360 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6361 {
6362         u32 driver_support;
6363
6364 #ifdef CONFIG_X86
6365         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6366         driver_support = readl(&(h->cfgtable->driver_support));
6367         driver_support |= ENABLE_SCSI_PREFETCH;
6368 #endif
6369         driver_support |= ENABLE_UNIT_ATTN;
6370         writel(driver_support, &(h->cfgtable->driver_support));
6371 }
6372
6373 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6374  * in a prefetch beyond physical memory.
6375  */
6376 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6377 {
6378         u32 dma_prefetch;
6379
6380         if (h->board_id != 0x3225103C)
6381                 return;
6382         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6383         dma_prefetch |= 0x8000;
6384         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6385 }
6386
6387 static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6388 {
6389         int i;
6390         u32 doorbell_value;
6391         unsigned long flags;
6392         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6393         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6394                 spin_lock_irqsave(&h->lock, flags);
6395                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6396                 spin_unlock_irqrestore(&h->lock, flags);
6397                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6398                         break;
6399                 /* delay and try again */
6400                 msleep(20);
6401         }
6402 }
6403
6404 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6405 {
6406         int i;
6407         u32 doorbell_value;
6408         unsigned long flags;
6409
6410         /* under certain very rare conditions, this can take awhile.
6411          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6412          * as we enter this code.)
6413          */
6414         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6415                 spin_lock_irqsave(&h->lock, flags);
6416                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6417                 spin_unlock_irqrestore(&h->lock, flags);
6418                 if (!(doorbell_value & CFGTBL_ChangeReq))
6419                         break;
6420                 /* delay and try again */
6421                 usleep_range(10000, 20000);
6422         }
6423 }
6424
6425 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6426 {
6427         u32 trans_support;
6428
6429         trans_support = readl(&(h->cfgtable->TransportSupport));
6430         if (!(trans_support & SIMPLE_MODE))
6431                 return -ENOTSUPP;
6432
6433         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6434
6435         /* Update the field, and then ring the doorbell */
6436         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6437         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6438         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6439         hpsa_wait_for_mode_change_ack(h);
6440         print_cfg_table(&h->pdev->dev, h->cfgtable);
6441         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6442                 goto error;
6443         h->transMethod = CFGTBL_Trans_Simple;
6444         return 0;
6445 error:
6446         dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
6447         return -ENODEV;
6448 }
6449
6450 static int hpsa_pci_init(struct ctlr_info *h)
6451 {
6452         int prod_index, err;
6453
6454         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6455         if (prod_index < 0)
6456                 return -ENODEV;
6457         h->product_name = products[prod_index].product_name;
6458         h->access = *(products[prod_index].access);
6459
6460         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6461                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6462
6463         err = pci_enable_device(h->pdev);
6464         if (err) {
6465                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6466                 return err;
6467         }
6468
6469         /* Enable bus mastering (pci_disable_device may disable this) */
6470         pci_set_master(h->pdev);
6471
6472         err = pci_request_regions(h->pdev, HPSA);
6473         if (err) {
6474                 dev_err(&h->pdev->dev,
6475                         "cannot obtain PCI resources, aborting\n");
6476                 return err;
6477         }
6478         hpsa_interrupt_mode(h);
6479         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6480         if (err)
6481                 goto err_out_free_res;
6482         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6483         if (!h->vaddr) {
6484                 err = -ENOMEM;
6485                 goto err_out_free_res;
6486         }
6487         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6488         if (err)
6489                 goto err_out_free_res;
6490         err = hpsa_find_cfgtables(h);
6491         if (err)
6492                 goto err_out_free_res;
6493         hpsa_find_board_params(h);
6494
6495         if (!hpsa_CISS_signature_present(h)) {
6496                 err = -ENODEV;
6497                 goto err_out_free_res;
6498         }
6499         hpsa_set_driver_support_bits(h);
6500         hpsa_p600_dma_prefetch_quirk(h);
6501         err = hpsa_enter_simple_mode(h);
6502         if (err)
6503                 goto err_out_free_res;
6504         return 0;
6505
6506 err_out_free_res:
6507         if (h->transtable)
6508                 iounmap(h->transtable);
6509         if (h->cfgtable)
6510                 iounmap(h->cfgtable);
6511         if (h->vaddr)
6512                 iounmap(h->vaddr);
6513         pci_disable_device(h->pdev);
6514         pci_release_regions(h->pdev);
6515         return err;
6516 }
6517
6518 static void hpsa_hba_inquiry(struct ctlr_info *h)
6519 {
6520         int rc;
6521
6522 #define HBA_INQUIRY_BYTE_COUNT 64
6523         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6524         if (!h->hba_inquiry_data)
6525                 return;
6526         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6527                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6528         if (rc != 0) {
6529                 kfree(h->hba_inquiry_data);
6530                 h->hba_inquiry_data = NULL;
6531         }
6532 }
6533
6534 static int hpsa_init_reset_devices(struct pci_dev *pdev)
6535 {
6536         int rc, i;
6537
6538         if (!reset_devices)
6539                 return 0;
6540
6541         /* Reset the controller with a PCI power-cycle or via doorbell */
6542         rc = hpsa_kdump_hard_reset_controller(pdev);
6543
6544         /* -ENOTSUPP here means we cannot reset the controller
6545          * but it's already (and still) up and running in
6546          * "performant mode".  Or, it might be 640x, which can't reset
6547          * due to concerns about shared bbwc between 6402/6404 pair.
6548          */
6549         if (rc == -ENOTSUPP)
6550                 return rc; /* just try to do the kdump anyhow. */
6551         if (rc)
6552                 return -ENODEV;
6553
6554         /* Now try to get the controller to respond to a no-op */
6555         dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
6556         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6557                 if (hpsa_noop(pdev) == 0)
6558                         break;
6559                 else
6560                         dev_warn(&pdev->dev, "no-op failed%s\n",
6561                                         (i < 11 ? "; re-trying" : ""));
6562         }
6563         return 0;
6564 }
6565
6566 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
6567 {
6568         h->cmd_pool_bits = kzalloc(
6569                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6570                 sizeof(unsigned long), GFP_KERNEL);
6571         h->cmd_pool = pci_alloc_consistent(h->pdev,
6572                     h->nr_cmds * sizeof(*h->cmd_pool),
6573                     &(h->cmd_pool_dhandle));
6574         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6575                     h->nr_cmds * sizeof(*h->errinfo_pool),
6576                     &(h->errinfo_pool_dhandle));
6577         if ((h->cmd_pool_bits == NULL)
6578             || (h->cmd_pool == NULL)
6579             || (h->errinfo_pool == NULL)) {
6580                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6581                 return -ENOMEM;
6582         }
6583         return 0;
6584 }
6585
6586 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6587 {
6588         kfree(h->cmd_pool_bits);
6589         if (h->cmd_pool)
6590                 pci_free_consistent(h->pdev,
6591                             h->nr_cmds * sizeof(struct CommandList),
6592                             h->cmd_pool, h->cmd_pool_dhandle);
6593         if (h->ioaccel2_cmd_pool)
6594                 pci_free_consistent(h->pdev,
6595                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6596                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6597         if (h->errinfo_pool)
6598                 pci_free_consistent(h->pdev,
6599                             h->nr_cmds * sizeof(struct ErrorInfo),
6600                             h->errinfo_pool,
6601                             h->errinfo_pool_dhandle);
6602         if (h->ioaccel_cmd_pool)
6603                 pci_free_consistent(h->pdev,
6604                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6605                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6606 }
6607
6608 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6609 {
6610         int i, cpu, rc;
6611
6612         cpu = cpumask_first(cpu_online_mask);
6613         for (i = 0; i < h->msix_vector; i++) {
6614                 rc = irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6615                 cpu = cpumask_next(cpu, cpu_online_mask);
6616         }
6617 }
6618
6619 static int hpsa_request_irq(struct ctlr_info *h,
6620         irqreturn_t (*msixhandler)(int, void *),
6621         irqreturn_t (*intxhandler)(int, void *))
6622 {
6623         int rc, i;
6624
6625         /*
6626          * initialize h->q[x] = x so that interrupt handlers know which
6627          * queue to process.
6628          */
6629         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6630                 h->q[i] = (u8) i;
6631
6632         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6633                 /* If performant mode and MSI-X, use multiple reply queues */
6634                 for (i = 0; i < h->msix_vector; i++)
6635                         rc = request_irq(h->intr[i], msixhandler,
6636                                         0, h->devname,
6637                                         &h->q[i]);
6638                 hpsa_irq_affinity_hints(h);
6639         } else {
6640                 /* Use single reply pool */
6641                 if (h->msix_vector > 0 || h->msi_vector) {
6642                         rc = request_irq(h->intr[h->intr_mode],
6643                                 msixhandler, 0, h->devname,
6644                                 &h->q[h->intr_mode]);
6645                 } else {
6646                         rc = request_irq(h->intr[h->intr_mode],
6647                                 intxhandler, IRQF_SHARED, h->devname,
6648                                 &h->q[h->intr_mode]);
6649                 }
6650         }
6651         if (rc) {
6652                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6653                        h->intr[h->intr_mode], h->devname);
6654                 return -ENODEV;
6655         }
6656         return 0;
6657 }
6658
6659 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6660 {
6661         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6662                 HPSA_RESET_TYPE_CONTROLLER)) {
6663                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6664                 return -EIO;
6665         }
6666
6667         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6668         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6669                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6670                 return -1;
6671         }
6672
6673         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6674         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6675                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6676                         "after soft reset.\n");
6677                 return -1;
6678         }
6679
6680         return 0;
6681 }
6682
6683 static void free_irqs(struct ctlr_info *h)
6684 {
6685         int i;
6686
6687         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6688                 /* Single reply queue, only one irq to free */
6689                 i = h->intr_mode;
6690                 irq_set_affinity_hint(h->intr[i], NULL);
6691                 free_irq(h->intr[i], &h->q[i]);
6692                 return;
6693         }
6694
6695         for (i = 0; i < h->msix_vector; i++) {
6696                 irq_set_affinity_hint(h->intr[i], NULL);
6697                 free_irq(h->intr[i], &h->q[i]);
6698         }
6699 }
6700
6701 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6702 {
6703         free_irqs(h);
6704 #ifdef CONFIG_PCI_MSI
6705         if (h->msix_vector) {
6706                 if (h->pdev->msix_enabled)
6707                         pci_disable_msix(h->pdev);
6708         } else if (h->msi_vector) {
6709                 if (h->pdev->msi_enabled)
6710                         pci_disable_msi(h->pdev);
6711         }
6712 #endif /* CONFIG_PCI_MSI */
6713 }
6714
6715 static void hpsa_free_reply_queues(struct ctlr_info *h)
6716 {
6717         int i;
6718
6719         for (i = 0; i < h->nreply_queues; i++) {
6720                 if (!h->reply_queue[i].head)
6721                         continue;
6722                 pci_free_consistent(h->pdev, h->reply_queue_size,
6723                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
6724                 h->reply_queue[i].head = NULL;
6725                 h->reply_queue[i].busaddr = 0;
6726         }
6727 }
6728
6729 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
6730 {
6731         hpsa_free_irqs_and_disable_msix(h);
6732         hpsa_free_sg_chain_blocks(h);
6733         hpsa_free_cmd_pool(h);
6734         kfree(h->ioaccel1_blockFetchTable);
6735         kfree(h->blockFetchTable);
6736         hpsa_free_reply_queues(h);
6737         if (h->vaddr)
6738                 iounmap(h->vaddr);
6739         if (h->transtable)
6740                 iounmap(h->transtable);
6741         if (h->cfgtable)
6742                 iounmap(h->cfgtable);
6743         pci_release_regions(h->pdev);
6744         kfree(h);
6745 }
6746
6747 /* Called when controller lockup detected. */
6748 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
6749 {
6750         struct CommandList *c = NULL;
6751
6752         assert_spin_locked(&h->lock);
6753         /* Mark all outstanding commands as failed and complete them. */
6754         while (!list_empty(list)) {
6755                 c = list_entry(list->next, struct CommandList, list);
6756                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
6757                 finish_cmd(c);
6758         }
6759 }
6760
6761 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
6762 {
6763         int i, cpu;
6764
6765         cpu = cpumask_first(cpu_online_mask);
6766         for (i = 0; i < num_online_cpus(); i++) {
6767                 u32 *lockup_detected;
6768                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
6769                 *lockup_detected = value;
6770                 cpu = cpumask_next(cpu, cpu_online_mask);
6771         }
6772         wmb(); /* be sure the per-cpu variables are out to memory */
6773 }
6774
6775 static void controller_lockup_detected(struct ctlr_info *h)
6776 {
6777         unsigned long flags;
6778         u32 lockup_detected;
6779
6780         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6781         spin_lock_irqsave(&h->lock, flags);
6782         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
6783         if (!lockup_detected) {
6784                 /* no heartbeat, but controller gave us a zero. */
6785                 dev_warn(&h->pdev->dev,
6786                         "lockup detected but scratchpad register is zero\n");
6787                 lockup_detected = 0xffffffff;
6788         }
6789         set_lockup_detected_for_all_cpus(h, lockup_detected);
6790         spin_unlock_irqrestore(&h->lock, flags);
6791         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
6792                         lockup_detected);
6793         pci_disable_device(h->pdev);
6794         spin_lock_irqsave(&h->lock, flags);
6795         fail_all_cmds_on_list(h, &h->cmpQ);
6796         fail_all_cmds_on_list(h, &h->reqQ);
6797         spin_unlock_irqrestore(&h->lock, flags);
6798 }
6799
6800 static void detect_controller_lockup(struct ctlr_info *h)
6801 {
6802         u64 now;
6803         u32 heartbeat;
6804         unsigned long flags;
6805
6806         now = get_jiffies_64();
6807         /* If we've received an interrupt recently, we're ok. */
6808         if (time_after64(h->last_intr_timestamp +
6809                                 (h->heartbeat_sample_interval), now))
6810                 return;
6811
6812         /*
6813          * If we've already checked the heartbeat recently, we're ok.
6814          * This could happen if someone sends us a signal. We
6815          * otherwise don't care about signals in this thread.
6816          */
6817         if (time_after64(h->last_heartbeat_timestamp +
6818                                 (h->heartbeat_sample_interval), now))
6819                 return;
6820
6821         /* If heartbeat has not changed since we last looked, we're not ok. */
6822         spin_lock_irqsave(&h->lock, flags);
6823         heartbeat = readl(&h->cfgtable->HeartBeat);
6824         spin_unlock_irqrestore(&h->lock, flags);
6825         if (h->last_heartbeat == heartbeat) {
6826                 controller_lockup_detected(h);
6827                 return;
6828         }
6829
6830         /* We're ok. */
6831         h->last_heartbeat = heartbeat;
6832         h->last_heartbeat_timestamp = now;
6833 }
6834
6835 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
6836 {
6837         int i;
6838         char *event_type;
6839
6840         /* Clear the driver-requested rescan flag */
6841         h->drv_req_rescan = 0;
6842
6843         /* Ask the controller to clear the events we're handling. */
6844         if ((h->transMethod & (CFGTBL_Trans_io_accel1
6845                         | CFGTBL_Trans_io_accel2)) &&
6846                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
6847                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
6848
6849                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
6850                         event_type = "state change";
6851                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
6852                         event_type = "configuration change";
6853                 /* Stop sending new RAID offload reqs via the IO accelerator */
6854                 scsi_block_requests(h->scsi_host);
6855                 for (i = 0; i < h->ndevices; i++)
6856                         h->dev[i]->offload_enabled = 0;
6857                 hpsa_drain_accel_commands(h);
6858                 /* Set 'accelerator path config change' bit */
6859                 dev_warn(&h->pdev->dev,
6860                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
6861                         h->events, event_type);
6862                 writel(h->events, &(h->cfgtable->clear_event_notify));
6863                 /* Set the "clear event notify field update" bit 6 */
6864                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6865                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
6866                 hpsa_wait_for_clear_event_notify_ack(h);
6867                 scsi_unblock_requests(h->scsi_host);
6868         } else {
6869                 /* Acknowledge controller notification events. */
6870                 writel(h->events, &(h->cfgtable->clear_event_notify));
6871                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6872                 hpsa_wait_for_clear_event_notify_ack(h);
6873 #if 0
6874                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6875                 hpsa_wait_for_mode_change_ack(h);
6876 #endif
6877         }
6878         return;
6879 }
6880
6881 /* Check a register on the controller to see if there are configuration
6882  * changes (added/changed/removed logical drives, etc.) which mean that
6883  * we should rescan the controller for devices.
6884  * Also check flag for driver-initiated rescan.
6885  */
6886 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
6887 {
6888         if (h->drv_req_rescan)
6889                 return 1;
6890
6891         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6892                 return 0;
6893
6894         h->events = readl(&(h->cfgtable->event_notify));
6895         return h->events & RESCAN_REQUIRED_EVENT_BITS;
6896 }
6897
6898 /*
6899  * Check if any of the offline devices have become ready
6900  */
6901 static int hpsa_offline_devices_ready(struct ctlr_info *h)
6902 {
6903         unsigned long flags;
6904         struct offline_device_entry *d;
6905         struct list_head *this, *tmp;
6906
6907         spin_lock_irqsave(&h->offline_device_lock, flags);
6908         list_for_each_safe(this, tmp, &h->offline_device_list) {
6909                 d = list_entry(this, struct offline_device_entry,
6910                                 offline_list);
6911                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
6912                 if (!hpsa_volume_offline(h, d->scsi3addr))
6913                         return 1;
6914                 spin_lock_irqsave(&h->offline_device_lock, flags);
6915         }
6916         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6917         return 0;
6918 }
6919
6920
6921 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
6922 {
6923         unsigned long flags;
6924         struct ctlr_info *h = container_of(to_delayed_work(work),
6925                                         struct ctlr_info, monitor_ctlr_work);
6926         detect_controller_lockup(h);
6927         if (lockup_detected(h))
6928                 return;
6929
6930         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
6931                 scsi_host_get(h->scsi_host);
6932                 h->drv_req_rescan = 0;
6933                 hpsa_ack_ctlr_events(h);
6934                 hpsa_scan_start(h->scsi_host);
6935                 scsi_host_put(h->scsi_host);
6936         }
6937
6938         spin_lock_irqsave(&h->lock, flags);
6939         if (h->remove_in_progress) {
6940                 spin_unlock_irqrestore(&h->lock, flags);
6941                 return;
6942         }
6943         schedule_delayed_work(&h->monitor_ctlr_work,
6944                                 h->heartbeat_sample_interval);
6945         spin_unlock_irqrestore(&h->lock, flags);
6946 }
6947
6948 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6949 {
6950         int dac, rc;
6951         struct ctlr_info *h;
6952         int try_soft_reset = 0;
6953         unsigned long flags;
6954
6955         if (number_of_controllers == 0)
6956                 printk(KERN_INFO DRIVER_NAME "\n");
6957
6958         rc = hpsa_init_reset_devices(pdev);
6959         if (rc) {
6960                 if (rc != -ENOTSUPP)
6961                         return rc;
6962                 /* If the reset fails in a particular way (it has no way to do
6963                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
6964                  * a soft reset once we get the controller configured up to the
6965                  * point that it can accept a command.
6966                  */
6967                 try_soft_reset = 1;
6968                 rc = 0;
6969         }
6970
6971 reinit_after_soft_reset:
6972
6973         /* Command structures must be aligned on a 32-byte boundary because
6974          * the 5 lower bits of the address are used by the hardware. and by
6975          * the driver.  See comments in hpsa.h for more info.
6976          */
6977         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
6978         h = kzalloc(sizeof(*h), GFP_KERNEL);
6979         if (!h)
6980                 return -ENOMEM;
6981
6982         h->pdev = pdev;
6983         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
6984         INIT_LIST_HEAD(&h->cmpQ);
6985         INIT_LIST_HEAD(&h->reqQ);
6986         INIT_LIST_HEAD(&h->offline_device_list);
6987         spin_lock_init(&h->lock);
6988         spin_lock_init(&h->offline_device_lock);
6989         spin_lock_init(&h->scan_lock);
6990         spin_lock_init(&h->passthru_count_lock);
6991
6992         /* Allocate and clear per-cpu variable lockup_detected */
6993         h->lockup_detected = alloc_percpu(u32);
6994         if (!h->lockup_detected)
6995                 goto clean1;
6996         set_lockup_detected_for_all_cpus(h, 0);
6997
6998         rc = hpsa_pci_init(h);
6999         if (rc != 0)
7000                 goto clean1;
7001
7002         sprintf(h->devname, HPSA "%d", number_of_controllers);
7003         h->ctlr = number_of_controllers;
7004         number_of_controllers++;
7005
7006         /* configure PCI DMA stuff */
7007         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
7008         if (rc == 0) {
7009                 dac = 1;
7010         } else {
7011                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
7012                 if (rc == 0) {
7013                         dac = 0;
7014                 } else {
7015                         dev_err(&pdev->dev, "no suitable DMA available\n");
7016                         goto clean1;
7017                 }
7018         }
7019
7020         /* make sure the board interrupts are off */
7021         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7022
7023         if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7024                 goto clean2;
7025         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
7026                h->devname, pdev->device,
7027                h->intr[h->intr_mode], dac ? "" : " not");
7028         if (hpsa_allocate_cmd_pool(h))
7029                 goto clean4;
7030         if (hpsa_allocate_sg_chain_blocks(h))
7031                 goto clean4;
7032         init_waitqueue_head(&h->scan_wait_queue);
7033         h->scan_finished = 1; /* no scan currently in progress */
7034
7035         pci_set_drvdata(pdev, h);
7036         h->ndevices = 0;
7037         h->hba_mode_enabled = 0;
7038         h->scsi_host = NULL;
7039         spin_lock_init(&h->devlock);
7040         hpsa_put_ctlr_into_performant_mode(h);
7041
7042         /* At this point, the controller is ready to take commands.
7043          * Now, if reset_devices and the hard reset didn't work, try
7044          * the soft reset and see if that works.
7045          */
7046         if (try_soft_reset) {
7047
7048                 /* This is kind of gross.  We may or may not get a completion
7049                  * from the soft reset command, and if we do, then the value
7050                  * from the fifo may or may not be valid.  So, we wait 10 secs
7051                  * after the reset throwing away any completions we get during
7052                  * that time.  Unregister the interrupt handler and register
7053                  * fake ones to scoop up any residual completions.
7054                  */
7055                 spin_lock_irqsave(&h->lock, flags);
7056                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7057                 spin_unlock_irqrestore(&h->lock, flags);
7058                 free_irqs(h);
7059                 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
7060                                         hpsa_intx_discard_completions);
7061                 if (rc) {
7062                         dev_warn(&h->pdev->dev, "Failed to request_irq after "
7063                                 "soft reset.\n");
7064                         goto clean4;
7065                 }
7066
7067                 rc = hpsa_kdump_soft_reset(h);
7068                 if (rc)
7069                         /* Neither hard nor soft reset worked, we're hosed. */
7070                         goto clean4;
7071
7072                 dev_info(&h->pdev->dev, "Board READY.\n");
7073                 dev_info(&h->pdev->dev,
7074                         "Waiting for stale completions to drain.\n");
7075                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7076                 msleep(10000);
7077                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7078
7079                 rc = controller_reset_failed(h->cfgtable);
7080                 if (rc)
7081                         dev_info(&h->pdev->dev,
7082                                 "Soft reset appears to have failed.\n");
7083
7084                 /* since the controller's reset, we have to go back and re-init
7085                  * everything.  Easiest to just forget what we've done and do it
7086                  * all over again.
7087                  */
7088                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7089                 try_soft_reset = 0;
7090                 if (rc)
7091                         /* don't go to clean4, we already unallocated */
7092                         return -ENODEV;
7093
7094                 goto reinit_after_soft_reset;
7095         }
7096
7097                 /* Enable Accelerated IO path at driver layer */
7098                 h->acciopath_status = 1;
7099
7100         h->drv_req_rescan = 0;
7101
7102         /* Turn the interrupts on so we can service requests */
7103         h->access.set_intr_mask(h, HPSA_INTR_ON);
7104
7105         hpsa_hba_inquiry(h);
7106         hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
7107
7108         /* Monitor the controller for firmware lockups */
7109         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7110         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7111         schedule_delayed_work(&h->monitor_ctlr_work,
7112                                 h->heartbeat_sample_interval);
7113         return 0;
7114
7115 clean4:
7116         hpsa_free_sg_chain_blocks(h);
7117         hpsa_free_cmd_pool(h);
7118         free_irqs(h);
7119 clean2:
7120 clean1:
7121         if (h->lockup_detected)
7122                 free_percpu(h->lockup_detected);
7123         kfree(h);
7124         return rc;
7125 }
7126
7127 static void hpsa_flush_cache(struct ctlr_info *h)
7128 {
7129         char *flush_buf;
7130         struct CommandList *c;
7131
7132         /* Don't bother trying to flush the cache if locked up */
7133         if (unlikely(lockup_detected(h)))
7134                 return;
7135         flush_buf = kzalloc(4, GFP_KERNEL);
7136         if (!flush_buf)
7137                 return;
7138
7139         c = cmd_special_alloc(h);
7140         if (!c) {
7141                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
7142                 goto out_of_memory;
7143         }
7144         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7145                 RAID_CTLR_LUNID, TYPE_CMD)) {
7146                 goto out;
7147         }
7148         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
7149         if (c->err_info->CommandStatus != 0)
7150 out:
7151                 dev_warn(&h->pdev->dev,
7152                         "error flushing cache on controller\n");
7153         cmd_special_free(h, c);
7154 out_of_memory:
7155         kfree(flush_buf);
7156 }
7157
7158 static void hpsa_shutdown(struct pci_dev *pdev)
7159 {
7160         struct ctlr_info *h;
7161
7162         h = pci_get_drvdata(pdev);
7163         /* Turn board interrupts off  and send the flush cache command
7164          * sendcmd will turn off interrupt, and send the flush...
7165          * To write all data in the battery backed cache to disks
7166          */
7167         hpsa_flush_cache(h);
7168         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7169         hpsa_free_irqs_and_disable_msix(h);
7170 }
7171
7172 static void hpsa_free_device_info(struct ctlr_info *h)
7173 {
7174         int i;
7175
7176         for (i = 0; i < h->ndevices; i++)
7177                 kfree(h->dev[i]);
7178 }
7179
7180 static void hpsa_remove_one(struct pci_dev *pdev)
7181 {
7182         struct ctlr_info *h;
7183         unsigned long flags;
7184
7185         if (pci_get_drvdata(pdev) == NULL) {
7186                 dev_err(&pdev->dev, "unable to remove device\n");
7187                 return;
7188         }
7189         h = pci_get_drvdata(pdev);
7190
7191         /* Get rid of any controller monitoring work items */
7192         spin_lock_irqsave(&h->lock, flags);
7193         h->remove_in_progress = 1;
7194         cancel_delayed_work(&h->monitor_ctlr_work);
7195         spin_unlock_irqrestore(&h->lock, flags);
7196
7197         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7198         hpsa_shutdown(pdev);
7199         iounmap(h->vaddr);
7200         iounmap(h->transtable);
7201         iounmap(h->cfgtable);
7202         hpsa_free_device_info(h);
7203         hpsa_free_sg_chain_blocks(h);
7204         pci_free_consistent(h->pdev,
7205                 h->nr_cmds * sizeof(struct CommandList),
7206                 h->cmd_pool, h->cmd_pool_dhandle);
7207         pci_free_consistent(h->pdev,
7208                 h->nr_cmds * sizeof(struct ErrorInfo),
7209                 h->errinfo_pool, h->errinfo_pool_dhandle);
7210         hpsa_free_reply_queues(h);
7211         kfree(h->cmd_pool_bits);
7212         kfree(h->blockFetchTable);
7213         kfree(h->ioaccel1_blockFetchTable);
7214         kfree(h->ioaccel2_blockFetchTable);
7215         kfree(h->hba_inquiry_data);
7216         pci_disable_device(pdev);
7217         pci_release_regions(pdev);
7218         free_percpu(h->lockup_detected);
7219         kfree(h);
7220 }
7221
7222 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7223         __attribute__((unused)) pm_message_t state)
7224 {
7225         return -ENOSYS;
7226 }
7227
7228 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7229 {
7230         return -ENOSYS;
7231 }
7232
7233 static struct pci_driver hpsa_pci_driver = {
7234         .name = HPSA,
7235         .probe = hpsa_init_one,
7236         .remove = hpsa_remove_one,
7237         .id_table = hpsa_pci_device_id, /* id_table */
7238         .shutdown = hpsa_shutdown,
7239         .suspend = hpsa_suspend,
7240         .resume = hpsa_resume,
7241 };
7242
7243 /* Fill in bucket_map[], given nsgs (the max number of
7244  * scatter gather elements supported) and bucket[],
7245  * which is an array of 8 integers.  The bucket[] array
7246  * contains 8 different DMA transfer sizes (in 16
7247  * byte increments) which the controller uses to fetch
7248  * commands.  This function fills in bucket_map[], which
7249  * maps a given number of scatter gather elements to one of
7250  * the 8 DMA transfer sizes.  The point of it is to allow the
7251  * controller to only do as much DMA as needed to fetch the
7252  * command, with the DMA transfer size encoded in the lower
7253  * bits of the command address.
7254  */
7255 static void  calc_bucket_map(int bucket[], int num_buckets,
7256         int nsgs, int min_blocks, int *bucket_map)
7257 {
7258         int i, j, b, size;
7259
7260         /* Note, bucket_map must have nsgs+1 entries. */
7261         for (i = 0; i <= nsgs; i++) {
7262                 /* Compute size of a command with i SG entries */
7263                 size = i + min_blocks;
7264                 b = num_buckets; /* Assume the biggest bucket */
7265                 /* Find the bucket that is just big enough */
7266                 for (j = 0; j < num_buckets; j++) {
7267                         if (bucket[j] >= size) {
7268                                 b = j;
7269                                 break;
7270                         }
7271                 }
7272                 /* for a command with i SG entries, use bucket b. */
7273                 bucket_map[i] = b;
7274         }
7275 }
7276
7277 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7278 {
7279         int i;
7280         unsigned long register_value;
7281         unsigned long transMethod = CFGTBL_Trans_Performant |
7282                         (trans_support & CFGTBL_Trans_use_short_tags) |
7283                                 CFGTBL_Trans_enable_directed_msix |
7284                         (trans_support & (CFGTBL_Trans_io_accel1 |
7285                                 CFGTBL_Trans_io_accel2));
7286         struct access_method access = SA5_performant_access;
7287
7288         /* This is a bit complicated.  There are 8 registers on
7289          * the controller which we write to to tell it 8 different
7290          * sizes of commands which there may be.  It's a way of
7291          * reducing the DMA done to fetch each command.  Encoded into
7292          * each command's tag are 3 bits which communicate to the controller
7293          * which of the eight sizes that command fits within.  The size of
7294          * each command depends on how many scatter gather entries there are.
7295          * Each SG entry requires 16 bytes.  The eight registers are programmed
7296          * with the number of 16-byte blocks a command of that size requires.
7297          * The smallest command possible requires 5 such 16 byte blocks.
7298          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7299          * blocks.  Note, this only extends to the SG entries contained
7300          * within the command block, and does not extend to chained blocks
7301          * of SG elements.   bft[] contains the eight values we write to
7302          * the registers.  They are not evenly distributed, but have more
7303          * sizes for small commands, and fewer sizes for larger commands.
7304          */
7305         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7306 #define MIN_IOACCEL2_BFT_ENTRY 5
7307 #define HPSA_IOACCEL2_HEADER_SZ 4
7308         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7309                         13, 14, 15, 16, 17, 18, 19,
7310                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7311         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7312         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7313         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7314                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7315         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7316         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7317         /*  5 = 1 s/g entry or 4k
7318          *  6 = 2 s/g entry or 8k
7319          *  8 = 4 s/g entry or 16k
7320          * 10 = 6 s/g entry or 24k
7321          */
7322
7323         /* If the controller supports either ioaccel method then
7324          * we can also use the RAID stack submit path that does not
7325          * perform the superfluous readl() after each command submission.
7326          */
7327         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7328                 access = SA5_performant_access_no_read;
7329
7330         /* Controller spec: zero out this buffer. */
7331         for (i = 0; i < h->nreply_queues; i++)
7332                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7333
7334         bft[7] = SG_ENTRIES_IN_CMD + 4;
7335         calc_bucket_map(bft, ARRAY_SIZE(bft),
7336                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7337         for (i = 0; i < 8; i++)
7338                 writel(bft[i], &h->transtable->BlockFetch[i]);
7339
7340         /* size of controller ring buffer */
7341         writel(h->max_commands, &h->transtable->RepQSize);
7342         writel(h->nreply_queues, &h->transtable->RepQCount);
7343         writel(0, &h->transtable->RepQCtrAddrLow32);
7344         writel(0, &h->transtable->RepQCtrAddrHigh32);
7345
7346         for (i = 0; i < h->nreply_queues; i++) {
7347                 writel(0, &h->transtable->RepQAddr[i].upper);
7348                 writel(h->reply_queue[i].busaddr,
7349                         &h->transtable->RepQAddr[i].lower);
7350         }
7351
7352         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7353         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7354         /*
7355          * enable outbound interrupt coalescing in accelerator mode;
7356          */
7357         if (trans_support & CFGTBL_Trans_io_accel1) {
7358                 access = SA5_ioaccel_mode1_access;
7359                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7360                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7361         } else {
7362                 if (trans_support & CFGTBL_Trans_io_accel2) {
7363                         access = SA5_ioaccel_mode2_access;
7364                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7365                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7366                 }
7367         }
7368         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7369         hpsa_wait_for_mode_change_ack(h);
7370         register_value = readl(&(h->cfgtable->TransportActive));
7371         if (!(register_value & CFGTBL_Trans_Performant)) {
7372                 dev_warn(&h->pdev->dev, "unable to get board into"
7373                                         " performant mode\n");
7374                 return;
7375         }
7376         /* Change the access methods to the performant access methods */
7377         h->access = access;
7378         h->transMethod = transMethod;
7379
7380         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7381                 (trans_support & CFGTBL_Trans_io_accel2)))
7382                 return;
7383
7384         if (trans_support & CFGTBL_Trans_io_accel1) {
7385                 /* Set up I/O accelerator mode */
7386                 for (i = 0; i < h->nreply_queues; i++) {
7387                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7388                         h->reply_queue[i].current_entry =
7389                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7390                 }
7391                 bft[7] = h->ioaccel_maxsg + 8;
7392                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7393                                 h->ioaccel1_blockFetchTable);
7394
7395                 /* initialize all reply queue entries to unused */
7396                 for (i = 0; i < h->nreply_queues; i++)
7397                         memset(h->reply_queue[i].head,
7398                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7399                                 h->reply_queue_size);
7400
7401                 /* set all the constant fields in the accelerator command
7402                  * frames once at init time to save CPU cycles later.
7403                  */
7404                 for (i = 0; i < h->nr_cmds; i++) {
7405                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7406
7407                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7408                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7409                                         (i * sizeof(struct ErrorInfo)));
7410                         cp->err_info_len = sizeof(struct ErrorInfo);
7411                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7412                         cp->host_context_flags = IOACCEL1_HCFLAGS_CISS_FORMAT;
7413                         cp->timeout_sec = 0;
7414                         cp->ReplyQueue = 0;
7415                         cp->Tag.lower = (i << DIRECT_LOOKUP_SHIFT) |
7416                                                 DIRECT_LOOKUP_BIT;
7417                         cp->Tag.upper = 0;
7418                         cp->host_addr.lower =
7419                                 (u32) (h->ioaccel_cmd_pool_dhandle +
7420                                         (i * sizeof(struct io_accel1_cmd)));
7421                         cp->host_addr.upper = 0;
7422                 }
7423         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7424                 u64 cfg_offset, cfg_base_addr_index;
7425                 u32 bft2_offset, cfg_base_addr;
7426                 int rc;
7427
7428                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7429                         &cfg_base_addr_index, &cfg_offset);
7430                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7431                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7432                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7433                                 4, h->ioaccel2_blockFetchTable);
7434                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7435                 BUILD_BUG_ON(offsetof(struct CfgTable,
7436                                 io_accel_request_size_offset) != 0xb8);
7437                 h->ioaccel2_bft2_regs =
7438                         remap_pci_mem(pci_resource_start(h->pdev,
7439                                         cfg_base_addr_index) +
7440                                         cfg_offset + bft2_offset,
7441                                         ARRAY_SIZE(bft2) *
7442                                         sizeof(*h->ioaccel2_bft2_regs));
7443                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7444                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7445         }
7446         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7447         hpsa_wait_for_mode_change_ack(h);
7448 }
7449
7450 static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
7451 {
7452         h->ioaccel_maxsg =
7453                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7454         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7455                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7456
7457         /* Command structures must be aligned on a 128-byte boundary
7458          * because the 7 lower bits of the address are used by the
7459          * hardware.
7460          */
7461         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7462                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7463         h->ioaccel_cmd_pool =
7464                 pci_alloc_consistent(h->pdev,
7465                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7466                         &(h->ioaccel_cmd_pool_dhandle));
7467
7468         h->ioaccel1_blockFetchTable =
7469                 kmalloc(((h->ioaccel_maxsg + 1) *
7470                                 sizeof(u32)), GFP_KERNEL);
7471
7472         if ((h->ioaccel_cmd_pool == NULL) ||
7473                 (h->ioaccel1_blockFetchTable == NULL))
7474                 goto clean_up;
7475
7476         memset(h->ioaccel_cmd_pool, 0,
7477                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7478         return 0;
7479
7480 clean_up:
7481         if (h->ioaccel_cmd_pool)
7482                 pci_free_consistent(h->pdev,
7483                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7484                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7485         kfree(h->ioaccel1_blockFetchTable);
7486         return 1;
7487 }
7488
7489 static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
7490 {
7491         /* Allocate ioaccel2 mode command blocks and block fetch table */
7492
7493         h->ioaccel_maxsg =
7494                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7495         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7496                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7497
7498         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7499                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7500         h->ioaccel2_cmd_pool =
7501                 pci_alloc_consistent(h->pdev,
7502                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7503                         &(h->ioaccel2_cmd_pool_dhandle));
7504
7505         h->ioaccel2_blockFetchTable =
7506                 kmalloc(((h->ioaccel_maxsg + 1) *
7507                                 sizeof(u32)), GFP_KERNEL);
7508
7509         if ((h->ioaccel2_cmd_pool == NULL) ||
7510                 (h->ioaccel2_blockFetchTable == NULL))
7511                 goto clean_up;
7512
7513         memset(h->ioaccel2_cmd_pool, 0,
7514                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7515         return 0;
7516
7517 clean_up:
7518         if (h->ioaccel2_cmd_pool)
7519                 pci_free_consistent(h->pdev,
7520                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7521                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7522         kfree(h->ioaccel2_blockFetchTable);
7523         return 1;
7524 }
7525
7526 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7527 {
7528         u32 trans_support;
7529         unsigned long transMethod = CFGTBL_Trans_Performant |
7530                                         CFGTBL_Trans_use_short_tags;
7531         int i;
7532
7533         if (hpsa_simple_mode)
7534                 return;
7535
7536         trans_support = readl(&(h->cfgtable->TransportSupport));
7537         if (!(trans_support & PERFORMANT_MODE))
7538                 return;
7539
7540         /* Check for I/O accelerator mode support */
7541         if (trans_support & CFGTBL_Trans_io_accel1) {
7542                 transMethod |= CFGTBL_Trans_io_accel1 |
7543                                 CFGTBL_Trans_enable_directed_msix;
7544                 if (hpsa_alloc_ioaccel_cmd_and_bft(h))
7545                         goto clean_up;
7546         } else {
7547                 if (trans_support & CFGTBL_Trans_io_accel2) {
7548                                 transMethod |= CFGTBL_Trans_io_accel2 |
7549                                 CFGTBL_Trans_enable_directed_msix;
7550                 if (ioaccel2_alloc_cmds_and_bft(h))
7551                         goto clean_up;
7552                 }
7553         }
7554
7555         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7556         hpsa_get_max_perf_mode_cmds(h);
7557         /* Performant mode ring buffer and supporting data structures */
7558         h->reply_queue_size = h->max_commands * sizeof(u64);
7559
7560         for (i = 0; i < h->nreply_queues; i++) {
7561                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7562                                                 h->reply_queue_size,
7563                                                 &(h->reply_queue[i].busaddr));
7564                 if (!h->reply_queue[i].head)
7565                         goto clean_up;
7566                 h->reply_queue[i].size = h->max_commands;
7567                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7568                 h->reply_queue[i].current_entry = 0;
7569         }
7570
7571         /* Need a block fetch table for performant mode */
7572         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7573                                 sizeof(u32)), GFP_KERNEL);
7574         if (!h->blockFetchTable)
7575                 goto clean_up;
7576
7577         hpsa_enter_performant_mode(h, trans_support);
7578         return;
7579
7580 clean_up:
7581         hpsa_free_reply_queues(h);
7582         kfree(h->blockFetchTable);
7583 }
7584
7585 static int is_accelerated_cmd(struct CommandList *c)
7586 {
7587         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7588 }
7589
7590 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7591 {
7592         struct CommandList *c = NULL;
7593         unsigned long flags;
7594         int accel_cmds_out;
7595
7596         do { /* wait for all outstanding commands to drain out */
7597                 accel_cmds_out = 0;
7598                 spin_lock_irqsave(&h->lock, flags);
7599                 list_for_each_entry(c, &h->cmpQ, list)
7600                         accel_cmds_out += is_accelerated_cmd(c);
7601                 list_for_each_entry(c, &h->reqQ, list)
7602                         accel_cmds_out += is_accelerated_cmd(c);
7603                 spin_unlock_irqrestore(&h->lock, flags);
7604                 if (accel_cmds_out <= 0)
7605                         break;
7606                 msleep(100);
7607         } while (1);
7608 }
7609
7610 /*
7611  *  This is it.  Register the PCI driver information for the cards we control
7612  *  the OS will call our registered routines when it finds one of our cards.
7613  */
7614 static int __init hpsa_init(void)
7615 {
7616         return pci_register_driver(&hpsa_pci_driver);
7617 }
7618
7619 static void __exit hpsa_cleanup(void)
7620 {
7621         pci_unregister_driver(&hpsa_pci_driver);
7622 }
7623
7624 static void __attribute__((unused)) verify_offsets(void)
7625 {
7626 #define VERIFY_OFFSET(member, offset) \
7627         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
7628
7629         VERIFY_OFFSET(structure_size, 0);
7630         VERIFY_OFFSET(volume_blk_size, 4);
7631         VERIFY_OFFSET(volume_blk_cnt, 8);
7632         VERIFY_OFFSET(phys_blk_shift, 16);
7633         VERIFY_OFFSET(parity_rotation_shift, 17);
7634         VERIFY_OFFSET(strip_size, 18);
7635         VERIFY_OFFSET(disk_starting_blk, 20);
7636         VERIFY_OFFSET(disk_blk_cnt, 28);
7637         VERIFY_OFFSET(data_disks_per_row, 36);
7638         VERIFY_OFFSET(metadata_disks_per_row, 38);
7639         VERIFY_OFFSET(row_cnt, 40);
7640         VERIFY_OFFSET(layout_map_count, 42);
7641         VERIFY_OFFSET(flags, 44);
7642         VERIFY_OFFSET(dekindex, 46);
7643         /* VERIFY_OFFSET(reserved, 48 */
7644         VERIFY_OFFSET(data, 64);
7645
7646 #undef VERIFY_OFFSET
7647
7648 #define VERIFY_OFFSET(member, offset) \
7649         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
7650
7651         VERIFY_OFFSET(IU_type, 0);
7652         VERIFY_OFFSET(direction, 1);
7653         VERIFY_OFFSET(reply_queue, 2);
7654         /* VERIFY_OFFSET(reserved1, 3);  */
7655         VERIFY_OFFSET(scsi_nexus, 4);
7656         VERIFY_OFFSET(Tag, 8);
7657         VERIFY_OFFSET(cdb, 16);
7658         VERIFY_OFFSET(cciss_lun, 32);
7659         VERIFY_OFFSET(data_len, 40);
7660         VERIFY_OFFSET(cmd_priority_task_attr, 44);
7661         VERIFY_OFFSET(sg_count, 45);
7662         /* VERIFY_OFFSET(reserved3 */
7663         VERIFY_OFFSET(err_ptr, 48);
7664         VERIFY_OFFSET(err_len, 56);
7665         /* VERIFY_OFFSET(reserved4  */
7666         VERIFY_OFFSET(sg, 64);
7667
7668 #undef VERIFY_OFFSET
7669
7670 #define VERIFY_OFFSET(member, offset) \
7671         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
7672
7673         VERIFY_OFFSET(dev_handle, 0x00);
7674         VERIFY_OFFSET(reserved1, 0x02);
7675         VERIFY_OFFSET(function, 0x03);
7676         VERIFY_OFFSET(reserved2, 0x04);
7677         VERIFY_OFFSET(err_info, 0x0C);
7678         VERIFY_OFFSET(reserved3, 0x10);
7679         VERIFY_OFFSET(err_info_len, 0x12);
7680         VERIFY_OFFSET(reserved4, 0x13);
7681         VERIFY_OFFSET(sgl_offset, 0x14);
7682         VERIFY_OFFSET(reserved5, 0x15);
7683         VERIFY_OFFSET(transfer_len, 0x1C);
7684         VERIFY_OFFSET(reserved6, 0x20);
7685         VERIFY_OFFSET(io_flags, 0x24);
7686         VERIFY_OFFSET(reserved7, 0x26);
7687         VERIFY_OFFSET(LUN, 0x34);
7688         VERIFY_OFFSET(control, 0x3C);
7689         VERIFY_OFFSET(CDB, 0x40);
7690         VERIFY_OFFSET(reserved8, 0x50);
7691         VERIFY_OFFSET(host_context_flags, 0x60);
7692         VERIFY_OFFSET(timeout_sec, 0x62);
7693         VERIFY_OFFSET(ReplyQueue, 0x64);
7694         VERIFY_OFFSET(reserved9, 0x65);
7695         VERIFY_OFFSET(Tag, 0x68);
7696         VERIFY_OFFSET(host_addr, 0x70);
7697         VERIFY_OFFSET(CISS_LUN, 0x78);
7698         VERIFY_OFFSET(SG, 0x78 + 8);
7699 #undef VERIFY_OFFSET
7700 }
7701
7702 module_init(hpsa_init);
7703 module_exit(hpsa_cleanup);