drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <linux/cciss_ioctl.h>
  47 #include <linux/string.h>
  48 #include <linux/bitmap.h>
  49 #include <linux/atomic.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/percpu-defs.h>
  52 #include <linux/percpu.h>
  53 #include <asm/unaligned.h>
  54 #include <asm/div64.h>
  55 #include "hpsa_cmd.h"
  56 #include "hpsa.h"
  57
  58 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  59 #define HPSA_DRIVER_VERSION "3.4.4-1"
  60 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  61 #define HPSA "hpsa"
  62
  63 /* How long to wait (in milliseconds) for board to go into simple mode */
  64 #define MAX_CONFIG_WAIT 30000
  65 #define MAX_IOCTL_CONFIG_WAIT 1000
  66
  67 /*define how many times we will try a command because of bus resets */
  68 #define MAX_CMD_RETRIES 3
  69
  70 /* Embedded module documentation macros - see modules.h */
  71 MODULE_AUTHOR("Hewlett-Packard Company");
  72 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  73         HPSA_DRIVER_VERSION);
  74 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  75 MODULE_VERSION(HPSA_DRIVER_VERSION);
  76 MODULE_LICENSE("GPL");
  77
  78 static int hpsa_allow_any;
  79 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  80 MODULE_PARM_DESC(hpsa_allow_any,
  81                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  82 static int hpsa_simple_mode;
  83 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  84 MODULE_PARM_DESC(hpsa_simple_mode,
  85         "Use 'simple mode' rather than 'performant mode'");
  86
  87 /* define the PCI info for the cards we can control */
  88 static const struct pci_device_id hpsa_pci_device_id[] = {
  89         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  90         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 129         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 130         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 131         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 132         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 133         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 134         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 135                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 136         {0,}
 137 };
 138
 139 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 140
 141 /*  board_id = Subsystem Device ID & Vendor ID
 142  *  product = Marketing Name for the board
 143  *  access = Address of the struct of function pointers
 144  */
 145 static struct board_type products[] = {
 146         {0x3241103C, "Smart Array P212", &SA5_access},
 147         {0x3243103C, "Smart Array P410", &SA5_access},
 148         {0x3245103C, "Smart Array P410i", &SA5_access},
 149         {0x3247103C, "Smart Array P411", &SA5_access},
 150         {0x3249103C, "Smart Array P812", &SA5_access},
 151         {0x324A103C, "Smart Array P712m", &SA5_access},
 152         {0x324B103C, "Smart Array P711m", &SA5_access},
 153         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 154         {0x3350103C, "Smart Array P222", &SA5_access},
 155         {0x3351103C, "Smart Array P420", &SA5_access},
 156         {0x3352103C, "Smart Array P421", &SA5_access},
 157         {0x3353103C, "Smart Array P822", &SA5_access},
 158         {0x3354103C, "Smart Array P420i", &SA5_access},
 159         {0x3355103C, "Smart Array P220i", &SA5_access},
 160         {0x3356103C, "Smart Array P721m", &SA5_access},
 161         {0x1921103C, "Smart Array P830i", &SA5_access},
 162         {0x1922103C, "Smart Array P430", &SA5_access},
 163         {0x1923103C, "Smart Array P431", &SA5_access},
 164         {0x1924103C, "Smart Array P830", &SA5_access},
 165         {0x1926103C, "Smart Array P731m", &SA5_access},
 166         {0x1928103C, "Smart Array P230i", &SA5_access},
 167         {0x1929103C, "Smart Array P530", &SA5_access},
 168         {0x21BD103C, "Smart Array", &SA5_access},
 169         {0x21BE103C, "Smart Array", &SA5_access},
 170         {0x21BF103C, "Smart Array", &SA5_access},
 171         {0x21C0103C, "Smart Array", &SA5_access},
 172         {0x21C1103C, "Smart Array", &SA5_access},
 173         {0x21C2103C, "Smart Array", &SA5_access},
 174         {0x21C3103C, "Smart Array", &SA5_access},
 175         {0x21C4103C, "Smart Array", &SA5_access},
 176         {0x21C5103C, "Smart Array", &SA5_access},
 177         {0x21C6103C, "Smart Array", &SA5_access},
 178         {0x21C7103C, "Smart Array", &SA5_access},
 179         {0x21C8103C, "Smart Array", &SA5_access},
 180         {0x21C9103C, "Smart Array", &SA5_access},
 181         {0x21CA103C, "Smart Array", &SA5_access},
 182         {0x21CB103C, "Smart Array", &SA5_access},
 183         {0x21CC103C, "Smart Array", &SA5_access},
 184         {0x21CD103C, "Smart Array", &SA5_access},
 185         {0x21CE103C, "Smart Array", &SA5_access},
 186         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 187         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 188         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 189         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 190         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 191         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 192 };
 193
 194 static int number_of_controllers;
 195
 196 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 197 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 198 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 199
 200 #ifdef CONFIG_COMPAT
 201 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 202         void __user *arg);
 203 #endif
 204
 205 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 206 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 207 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 208         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 209         int cmd_type);
 210 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 211 #define VPD_PAGE (1 << 8)
 212
 213 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 214 static void hpsa_scan_start(struct Scsi_Host *);
 215 static int hpsa_scan_finished(struct Scsi_Host *sh,
 216         unsigned long elapsed_time);
 217 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 218
 219 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 220 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 221 static int hpsa_slave_alloc(struct scsi_device *sdev);
 222 static void hpsa_slave_destroy(struct scsi_device *sdev);
 223
 224 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 225 static int check_for_unit_attention(struct ctlr_info *h,
 226         struct CommandList *c);
 227 static void check_ioctl_unit_attention(struct ctlr_info *h,
 228         struct CommandList *c);
 229 /* performant mode helper functions */
 230 static void calc_bucket_map(int *bucket, int num_buckets,
 231         int nsgs, int min_blocks, u32 *bucket_map);
 232 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 233 static inline u32 next_command(struct ctlr_info *h, u8 q);
 234 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 235                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 236                                u64 *cfg_offset);
 237 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 238                                     unsigned long *memory_bar);
 239 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 240 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 241                                      int wait_for_ready);
 242 static inline void finish_cmd(struct CommandList *c);
 243 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 244 #define BOARD_NOT_READY 0
 245 #define BOARD_READY 1
 246 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 247 static void hpsa_flush_cache(struct ctlr_info *h);
 248 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 249         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 250         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 251 static void hpsa_command_resubmit_worker(struct work_struct *work);
 252
 253 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 254 {
 255         unsigned long *priv = shost_priv(sdev->host);
 256         return (struct ctlr_info *) *priv;
 257 }
 258
 259 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 260 {
 261         unsigned long *priv = shost_priv(sh);
 262         return (struct ctlr_info *) *priv;
 263 }
 264
 265 static int check_for_unit_attention(struct ctlr_info *h,
 266         struct CommandList *c)
 267 {
 268         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
 269                 return 0;
 270
 271         switch (c->err_info->SenseInfo[12]) {
 272         case STATE_CHANGED:
 273                 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
 274                         "detected, command retried\n", h->ctlr);
 275                 break;
 276         case LUN_FAILED:
 277                 dev_warn(&h->pdev->dev,
 278                         HPSA "%d: LUN failure detected\n", h->ctlr);
 279                 break;
 280         case REPORT_LUNS_CHANGED:
 281                 dev_warn(&h->pdev->dev,
 282                         HPSA "%d: report LUN data changed\n", h->ctlr);
 283         /*
 284          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 285          * target (array) devices.
 286          */
 287                 break;
 288         case POWER_OR_RESET:
 289                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 290                         "or device reset detected\n", h->ctlr);
 291                 break;
 292         case UNIT_ATTENTION_CLEARED:
 293                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 294                     "cleared by another initiator\n", h->ctlr);
 295                 break;
 296         default:
 297                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 298                         "unit attention detected\n", h->ctlr);
 299                 break;
 300         }
 301         return 1;
 302 }
 303
 304 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 305 {
 306         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 307                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 308                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 309                 return 0;
 310         dev_warn(&h->pdev->dev, HPSA "device busy");
 311         return 1;
 312 }
 313
 314 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 315                                          struct device_attribute *attr,
 316                                          const char *buf, size_t count)
 317 {
 318         int status, len;
 319         struct ctlr_info *h;
 320         struct Scsi_Host *shost = class_to_shost(dev);
 321         char tmpbuf[10];
 322
 323         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 324                 return -EACCES;
 325         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 326         strncpy(tmpbuf, buf, len);
 327         tmpbuf[len] = '\0';
 328         if (sscanf(tmpbuf, "%d", &status) != 1)
 329                 return -EINVAL;
 330         h = shost_to_hba(shost);
 331         h->acciopath_status = !!status;
 332         dev_warn(&h->pdev->dev,
 333                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 334                 h->acciopath_status ? "enabled" : "disabled");
 335         return count;
 336 }
 337
 338 static ssize_t host_store_raid_offload_debug(struct device *dev,
 339                                          struct device_attribute *attr,
 340                                          const char *buf, size_t count)
 341 {
 342         int debug_level, len;
 343         struct ctlr_info *h;
 344         struct Scsi_Host *shost = class_to_shost(dev);
 345         char tmpbuf[10];
 346
 347         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 348                 return -EACCES;
 349         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 350         strncpy(tmpbuf, buf, len);
 351         tmpbuf[len] = '\0';
 352         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 353                 return -EINVAL;
 354         if (debug_level < 0)
 355                 debug_level = 0;
 356         h = shost_to_hba(shost);
 357         h->raid_offload_debug = debug_level;
 358         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 359                 h->raid_offload_debug);
 360         return count;
 361 }
 362
 363 static ssize_t host_store_rescan(struct device *dev,
 364                                  struct device_attribute *attr,
 365                                  const char *buf, size_t count)
 366 {
 367         struct ctlr_info *h;
 368         struct Scsi_Host *shost = class_to_shost(dev);
 369         h = shost_to_hba(shost);
 370         hpsa_scan_start(h->scsi_host);
 371         return count;
 372 }
 373
 374 static ssize_t host_show_firmware_revision(struct device *dev,
 375              struct device_attribute *attr, char *buf)
 376 {
 377         struct ctlr_info *h;
 378         struct Scsi_Host *shost = class_to_shost(dev);
 379         unsigned char *fwrev;
 380
 381         h = shost_to_hba(shost);
 382         if (!h->hba_inquiry_data)
 383                 return 0;
 384         fwrev = &h->hba_inquiry_data[32];
 385         return snprintf(buf, 20, "%c%c%c%c\n",
 386                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 387 }
 388
 389 static ssize_t host_show_commands_outstanding(struct device *dev,
 390              struct device_attribute *attr, char *buf)
 391 {
 392         struct Scsi_Host *shost = class_to_shost(dev);
 393         struct ctlr_info *h = shost_to_hba(shost);
 394
 395         return snprintf(buf, 20, "%d\n",
 396                         atomic_read(&h->commands_outstanding));
 397 }
 398
 399 static ssize_t host_show_transport_mode(struct device *dev,
 400         struct device_attribute *attr, char *buf)
 401 {
 402         struct ctlr_info *h;
 403         struct Scsi_Host *shost = class_to_shost(dev);
 404
 405         h = shost_to_hba(shost);
 406         return snprintf(buf, 20, "%s\n",
 407                 h->transMethod & CFGTBL_Trans_Performant ?
 408                         "performant" : "simple");
 409 }
 410
 411 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 412         struct device_attribute *attr, char *buf)
 413 {
 414         struct ctlr_info *h;
 415         struct Scsi_Host *shost = class_to_shost(dev);
 416
 417         h = shost_to_hba(shost);
 418         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 419                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 420 }
 421
 422 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 423 static u32 unresettable_controller[] = {
 424         0x324a103C, /* Smart Array P712m */
 425         0x324b103C, /* SmartArray P711m */
 426         0x3223103C, /* Smart Array P800 */
 427         0x3234103C, /* Smart Array P400 */
 428         0x3235103C, /* Smart Array P400i */
 429         0x3211103C, /* Smart Array E200i */
 430         0x3212103C, /* Smart Array E200 */
 431         0x3213103C, /* Smart Array E200i */
 432         0x3214103C, /* Smart Array E200i */
 433         0x3215103C, /* Smart Array E200i */
 434         0x3237103C, /* Smart Array E500 */
 435         0x323D103C, /* Smart Array P700m */
 436         0x40800E11, /* Smart Array 5i */
 437         0x409C0E11, /* Smart Array 6400 */
 438         0x409D0E11, /* Smart Array 6400 EM */
 439         0x40700E11, /* Smart Array 5300 */
 440         0x40820E11, /* Smart Array 532 */
 441         0x40830E11, /* Smart Array 5312 */
 442         0x409A0E11, /* Smart Array 641 */
 443         0x409B0E11, /* Smart Array 642 */
 444         0x40910E11, /* Smart Array 6i */
 445 };
 446
 447 /* List of controllers which cannot even be soft reset */
 448 static u32 soft_unresettable_controller[] = {
 449         0x40800E11, /* Smart Array 5i */
 450         0x40700E11, /* Smart Array 5300 */
 451         0x40820E11, /* Smart Array 532 */
 452         0x40830E11, /* Smart Array 5312 */
 453         0x409A0E11, /* Smart Array 641 */
 454         0x409B0E11, /* Smart Array 642 */
 455         0x40910E11, /* Smart Array 6i */
 456         /* Exclude 640x boards.  These are two pci devices in one slot
 457          * which share a battery backed cache module.  One controls the
 458          * cache, the other accesses the cache through the one that controls
 459          * it.  If we reset the one controlling the cache, the other will
 460          * likely not be happy.  Just forbid resetting this conjoined mess.
 461          * The 640x isn't really supported by hpsa anyway.
 462          */
 463         0x409C0E11, /* Smart Array 6400 */
 464         0x409D0E11, /* Smart Array 6400 EM */
 465 };
 466
 467 static int ctlr_is_hard_resettable(u32 board_id)
 468 {
 469         int i;
 470
 471         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
 472                 if (unresettable_controller[i] == board_id)
 473                         return 0;
 474         return 1;
 475 }
 476
 477 static int ctlr_is_soft_resettable(u32 board_id)
 478 {
 479         int i;
 480
 481         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
 482                 if (soft_unresettable_controller[i] == board_id)
 483                         return 0;
 484         return 1;
 485 }
 486
 487 static int ctlr_is_resettable(u32 board_id)
 488 {
 489         return ctlr_is_hard_resettable(board_id) ||
 490                 ctlr_is_soft_resettable(board_id);
 491 }
 492
 493 static ssize_t host_show_resettable(struct device *dev,
 494         struct device_attribute *attr, char *buf)
 495 {
 496         struct ctlr_info *h;
 497         struct Scsi_Host *shost = class_to_shost(dev);
 498
 499         h = shost_to_hba(shost);
 500         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 501 }
 502
 503 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 504 {
 505         return (scsi3addr[3] & 0xC0) == 0x40;
 506 }
 507
 508 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 509         "1(+0)ADM", "UNKNOWN"
 510 };
 511 #define HPSA_RAID_0     0
 512 #define HPSA_RAID_4     1
 513 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 514 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 515 #define HPSA_RAID_51    4
 516 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 517 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 518 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 519
 520 static ssize_t raid_level_show(struct device *dev,
 521              struct device_attribute *attr, char *buf)
 522 {
 523         ssize_t l = 0;
 524         unsigned char rlevel;
 525         struct ctlr_info *h;
 526         struct scsi_device *sdev;
 527         struct hpsa_scsi_dev_t *hdev;
 528         unsigned long flags;
 529
 530         sdev = to_scsi_device(dev);
 531         h = sdev_to_hba(sdev);
 532         spin_lock_irqsave(&h->lock, flags);
 533         hdev = sdev->hostdata;
 534         if (!hdev) {
 535                 spin_unlock_irqrestore(&h->lock, flags);
 536                 return -ENODEV;
 537         }
 538
 539         /* Is this even a logical drive? */
 540         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 541                 spin_unlock_irqrestore(&h->lock, flags);
 542                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 543                 return l;
 544         }
 545
 546         rlevel = hdev->raid_level;
 547         spin_unlock_irqrestore(&h->lock, flags);
 548         if (rlevel > RAID_UNKNOWN)
 549                 rlevel = RAID_UNKNOWN;
 550         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 551         return l;
 552 }
 553
 554 static ssize_t lunid_show(struct device *dev,
 555              struct device_attribute *attr, char *buf)
 556 {
 557         struct ctlr_info *h;
 558         struct scsi_device *sdev;
 559         struct hpsa_scsi_dev_t *hdev;
 560         unsigned long flags;
 561         unsigned char lunid[8];
 562
 563         sdev = to_scsi_device(dev);
 564         h = sdev_to_hba(sdev);
 565         spin_lock_irqsave(&h->lock, flags);
 566         hdev = sdev->hostdata;
 567         if (!hdev) {
 568                 spin_unlock_irqrestore(&h->lock, flags);
 569                 return -ENODEV;
 570         }
 571         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 572         spin_unlock_irqrestore(&h->lock, flags);
 573         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 574                 lunid[0], lunid[1], lunid[2], lunid[3],
 575                 lunid[4], lunid[5], lunid[6], lunid[7]);
 576 }
 577
 578 static ssize_t unique_id_show(struct device *dev,
 579              struct device_attribute *attr, char *buf)
 580 {
 581         struct ctlr_info *h;
 582         struct scsi_device *sdev;
 583         struct hpsa_scsi_dev_t *hdev;
 584         unsigned long flags;
 585         unsigned char sn[16];
 586
 587         sdev = to_scsi_device(dev);
 588         h = sdev_to_hba(sdev);
 589         spin_lock_irqsave(&h->lock, flags);
 590         hdev = sdev->hostdata;
 591         if (!hdev) {
 592                 spin_unlock_irqrestore(&h->lock, flags);
 593                 return -ENODEV;
 594         }
 595         memcpy(sn, hdev->device_id, sizeof(sn));
 596         spin_unlock_irqrestore(&h->lock, flags);
 597         return snprintf(buf, 16 * 2 + 2,
 598                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 599                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 600                         sn[0], sn[1], sn[2], sn[3],
 601                         sn[4], sn[5], sn[6], sn[7],
 602                         sn[8], sn[9], sn[10], sn[11],
 603                         sn[12], sn[13], sn[14], sn[15]);
 604 }
 605
 606 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 607              struct device_attribute *attr, char *buf)
 608 {
 609         struct ctlr_info *h;
 610         struct scsi_device *sdev;
 611         struct hpsa_scsi_dev_t *hdev;
 612         unsigned long flags;
 613         int offload_enabled;
 614
 615         sdev = to_scsi_device(dev);
 616         h = sdev_to_hba(sdev);
 617         spin_lock_irqsave(&h->lock, flags);
 618         hdev = sdev->hostdata;
 619         if (!hdev) {
 620                 spin_unlock_irqrestore(&h->lock, flags);
 621                 return -ENODEV;
 622         }
 623         offload_enabled = hdev->offload_enabled;
 624         spin_unlock_irqrestore(&h->lock, flags);
 625         return snprintf(buf, 20, "%d\n", offload_enabled);
 626 }
 627
 628 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 629 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 630 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 631 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 632 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 633                         host_show_hp_ssd_smart_path_enabled, NULL);
 634 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 635                 host_show_hp_ssd_smart_path_status,
 636                 host_store_hp_ssd_smart_path_status);
 637 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 638                         host_store_raid_offload_debug);
 639 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 640         host_show_firmware_revision, NULL);
 641 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 642         host_show_commands_outstanding, NULL);
 643 static DEVICE_ATTR(transport_mode, S_IRUGO,
 644         host_show_transport_mode, NULL);
 645 static DEVICE_ATTR(resettable, S_IRUGO,
 646         host_show_resettable, NULL);
 647
 648 static struct device_attribute *hpsa_sdev_attrs[] = {
 649         &dev_attr_raid_level,
 650         &dev_attr_lunid,
 651         &dev_attr_unique_id,
 652         &dev_attr_hp_ssd_smart_path_enabled,
 653         NULL,
 654 };
 655
 656 static struct device_attribute *hpsa_shost_attrs[] = {
 657         &dev_attr_rescan,
 658         &dev_attr_firmware_revision,
 659         &dev_attr_commands_outstanding,
 660         &dev_attr_transport_mode,
 661         &dev_attr_resettable,
 662         &dev_attr_hp_ssd_smart_path_status,
 663         &dev_attr_raid_offload_debug,
 664         NULL,
 665 };
 666
 667 static struct scsi_host_template hpsa_driver_template = {
 668         .module                 = THIS_MODULE,
 669         .name                   = HPSA,
 670         .proc_name              = HPSA,
 671         .queuecommand           = hpsa_scsi_queue_command,
 672         .scan_start             = hpsa_scan_start,
 673         .scan_finished          = hpsa_scan_finished,
 674         .change_queue_depth     = hpsa_change_queue_depth,
 675         .this_id                = -1,
 676         .use_clustering         = ENABLE_CLUSTERING,
 677         .eh_abort_handler       = hpsa_eh_abort_handler,
 678         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 679         .ioctl                  = hpsa_ioctl,
 680         .slave_alloc            = hpsa_slave_alloc,
 681         .slave_destroy          = hpsa_slave_destroy,
 682 #ifdef CONFIG_COMPAT
 683         .compat_ioctl           = hpsa_compat_ioctl,
 684 #endif
 685         .sdev_attrs = hpsa_sdev_attrs,
 686         .shost_attrs = hpsa_shost_attrs,
 687         .max_sectors = 8192,
 688         .no_write_same = 1,
 689 };
 690
 691 static inline u32 next_command(struct ctlr_info *h, u8 q)
 692 {
 693         u32 a;
 694         struct reply_queue_buffer *rq = &h->reply_queue[q];
 695
 696         if (h->transMethod & CFGTBL_Trans_io_accel1)
 697                 return h->access.command_completed(h, q);
 698
 699         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 700                 return h->access.command_completed(h, q);
 701
 702         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 703                 a = rq->head[rq->current_entry];
 704                 rq->current_entry++;
 705                 atomic_dec(&h->commands_outstanding);
 706         } else {
 707                 a = FIFO_EMPTY;
 708         }
 709         /* Check for wraparound */
 710         if (rq->current_entry == h->max_commands) {
 711                 rq->current_entry = 0;
 712                 rq->wraparound ^= 1;
 713         }
 714         return a;
 715 }
 716
 717 /*
 718  * There are some special bits in the bus address of the
 719  * command that we have to set for the controller to know
 720  * how to process the command:
 721  *
 722  * Normal performant mode:
 723  * bit 0: 1 means performant mode, 0 means simple mode.
 724  * bits 1-3 = block fetch table entry
 725  * bits 4-6 = command type (== 0)
 726  *
 727  * ioaccel1 mode:
 728  * bit 0 = "performant mode" bit.
 729  * bits 1-3 = block fetch table entry
 730  * bits 4-6 = command type (== 110)
 731  * (command type is needed because ioaccel1 mode
 732  * commands are submitted through the same register as normal
 733  * mode commands, so this is how the controller knows whether
 734  * the command is normal mode or ioaccel1 mode.)
 735  *
 736  * ioaccel2 mode:
 737  * bit 0 = "performant mode" bit.
 738  * bits 1-4 = block fetch table entry (note extra bit)
 739  * bits 4-6 = not needed, because ioaccel2 mode has
 740  * a separate special register for submitting commands.
 741  */
 742
 743 /* set_performant_mode: Modify the tag for cciss performant
 744  * set bit 0 for pull model, bits 3-1 for block fetch
 745  * register number
 746  */
 747 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
 748 {
 749         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 750                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 751                 if (likely(h->msix_vector > 0))
 752                         c->Header.ReplyQueue =
 753                                 raw_smp_processor_id() % h->nreply_queues;
 754         }
 755 }
 756
 757 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 758                                                 struct CommandList *c)
 759 {
 760         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 761
 762         /* Tell the controller to post the reply to the queue for this
 763          * processor.  This seems to give the best I/O throughput.
 764          */
 765         cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 766         /* Set the bits in the address sent down to include:
 767          *  - performant mode bit (bit 0)
 768          *  - pull count (bits 1-3)
 769          *  - command type (bits 4-6)
 770          */
 771         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 772                                         IOACCEL1_BUSADDR_CMDTYPE;
 773 }
 774
 775 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 776                                                 struct CommandList *c)
 777 {
 778         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 779
 780         /* Tell the controller to post the reply to the queue for this
 781          * processor.  This seems to give the best I/O throughput.
 782          */
 783         cp->reply_queue = smp_processor_id() % h->nreply_queues;
 784         /* Set the bits in the address sent down to include:
 785          *  - performant mode bit not used in ioaccel mode 2
 786          *  - pull count (bits 0-3)
 787          *  - command type isn't needed for ioaccel2
 788          */
 789         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 790 }
 791
 792 static int is_firmware_flash_cmd(u8 *cdb)
 793 {
 794         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 795 }
 796
 797 /*
 798  * During firmware flash, the heartbeat register may not update as frequently
 799  * as it should.  So we dial down lockup detection during firmware flash. and
 800  * dial it back up when firmware flash completes.
 801  */
 802 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 803 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 804 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 805                 struct CommandList *c)
 806 {
 807         if (!is_firmware_flash_cmd(c->Request.CDB))
 808                 return;
 809         atomic_inc(&h->firmware_flash_in_progress);
 810         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 811 }
 812
 813 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 814                 struct CommandList *c)
 815 {
 816         if (is_firmware_flash_cmd(c->Request.CDB) &&
 817                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 818                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 819 }
 820
 821 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 822         struct CommandList *c)
 823 {
 824         switch (c->cmd_type) {
 825         case CMD_IOACCEL1:
 826                 set_ioaccel1_performant_mode(h, c);
 827                 break;
 828         case CMD_IOACCEL2:
 829                 set_ioaccel2_performant_mode(h, c);
 830                 break;
 831         default:
 832                 set_performant_mode(h, c);
 833         }
 834         dial_down_lockup_detection_during_fw_flash(h, c);
 835         atomic_inc(&h->commands_outstanding);
 836         h->access.submit_command(h, c);
 837 }
 838
 839 static inline int is_hba_lunid(unsigned char scsi3addr[])
 840 {
 841         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 842 }
 843
 844 static inline int is_scsi_rev_5(struct ctlr_info *h)
 845 {
 846         if (!h->hba_inquiry_data)
 847                 return 0;
 848         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 849                 return 1;
 850         return 0;
 851 }
 852
 853 static int hpsa_find_target_lun(struct ctlr_info *h,
 854         unsigned char scsi3addr[], int bus, int *target, int *lun)
 855 {
 856         /* finds an unused bus, target, lun for a new physical device
 857          * assumes h->devlock is held
 858          */
 859         int i, found = 0;
 860         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 861
 862         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 863
 864         for (i = 0; i < h->ndevices; i++) {
 865                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 866                         __set_bit(h->dev[i]->target, lun_taken);
 867         }
 868
 869         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 870         if (i < HPSA_MAX_DEVICES) {
 871                 /* *bus = 1; */
 872                 *target = i;
 873                 *lun = 0;
 874                 found = 1;
 875         }
 876         return !found;
 877 }
 878
 879 /* Add an entry into h->dev[] array. */
 880 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
 881                 struct hpsa_scsi_dev_t *device,
 882                 struct hpsa_scsi_dev_t *added[], int *nadded)
 883 {
 884         /* assumes h->devlock is held */
 885         int n = h->ndevices;
 886         int i;
 887         unsigned char addr1[8], addr2[8];
 888         struct hpsa_scsi_dev_t *sd;
 889
 890         if (n >= HPSA_MAX_DEVICES) {
 891                 dev_err(&h->pdev->dev, "too many devices, some will be "
 892                         "inaccessible.\n");
 893                 return -1;
 894         }
 895
 896         /* physical devices do not have lun or target assigned until now. */
 897         if (device->lun != -1)
 898                 /* Logical device, lun is already assigned. */
 899                 goto lun_assigned;
 900
 901         /* If this device a non-zero lun of a multi-lun device
 902          * byte 4 of the 8-byte LUN addr will contain the logical
 903          * unit no, zero otherwise.
 904          */
 905         if (device->scsi3addr[4] == 0) {
 906                 /* This is not a non-zero lun of a multi-lun device */
 907                 if (hpsa_find_target_lun(h, device->scsi3addr,
 908                         device->bus, &device->target, &device->lun) != 0)
 909                         return -1;
 910                 goto lun_assigned;
 911         }
 912
 913         /* This is a non-zero lun of a multi-lun device.
 914          * Search through our list and find the device which
 915          * has the same 8 byte LUN address, excepting byte 4.
 916          * Assign the same bus and target for this new LUN.
 917          * Use the logical unit number from the firmware.
 918          */
 919         memcpy(addr1, device->scsi3addr, 8);
 920         addr1[4] = 0;
 921         for (i = 0; i < n; i++) {
 922                 sd = h->dev[i];
 923                 memcpy(addr2, sd->scsi3addr, 8);
 924                 addr2[4] = 0;
 925                 /* differ only in byte 4? */
 926                 if (memcmp(addr1, addr2, 8) == 0) {
 927                         device->bus = sd->bus;
 928                         device->target = sd->target;
 929                         device->lun = device->scsi3addr[4];
 930                         break;
 931                 }
 932         }
 933         if (device->lun == -1) {
 934                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
 935                         " suspect firmware bug or unsupported hardware "
 936                         "configuration.\n");
 937                         return -1;
 938         }
 939
 940 lun_assigned:
 941
 942         h->dev[n] = device;
 943         h->ndevices++;
 944         added[*nadded] = device;
 945         (*nadded)++;
 946
 947         /* initially, (before registering with scsi layer) we don't
 948          * know our hostno and we don't want to print anything first
 949          * time anyway (the scsi layer's inquiries will show that info)
 950          */
 951         /* if (hostno != -1) */
 952                 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
 953                         scsi_device_type(device->devtype), hostno,
 954                         device->bus, device->target, device->lun);
 955         return 0;
 956 }
 957
 958 /* Update an entry in h->dev[] array. */
 959 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
 960         int entry, struct hpsa_scsi_dev_t *new_entry)
 961 {
 962         /* assumes h->devlock is held */
 963         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
 964
 965         /* Raid level changed. */
 966         h->dev[entry]->raid_level = new_entry->raid_level;
 967
 968         /* Raid offload parameters changed.  Careful about the ordering. */
 969         if (new_entry->offload_config && new_entry->offload_enabled) {
 970                 /*
 971                  * if drive is newly offload_enabled, we want to copy the
 972                  * raid map data first.  If previously offload_enabled and
 973                  * offload_config were set, raid map data had better be
 974                  * the same as it was before.  if raid map data is changed
 975                  * then it had better be the case that
 976                  * h->dev[entry]->offload_enabled is currently 0.
 977                  */
 978                 h->dev[entry]->raid_map = new_entry->raid_map;
 979                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
 980                 wmb(); /* ensure raid map updated prior to ->offload_enabled */
 981         }
 982         h->dev[entry]->offload_config = new_entry->offload_config;
 983         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
 984         h->dev[entry]->offload_enabled = new_entry->offload_enabled;
 985         h->dev[entry]->queue_depth = new_entry->queue_depth;
 986
 987         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
 988                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
 989                 new_entry->target, new_entry->lun);
 990 }
 991
 992 /* Replace an entry from h->dev[] array. */
 993 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
 994         int entry, struct hpsa_scsi_dev_t *new_entry,
 995         struct hpsa_scsi_dev_t *added[], int *nadded,
 996         struct hpsa_scsi_dev_t *removed[], int *nremoved)
 997 {
 998         /* assumes h->devlock is held */
 999         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1000         removed[*nremoved] = h->dev[entry];
1001         (*nremoved)++;
1002
1003         /*
1004          * New physical devices won't have target/lun assigned yet
1005          * so we need to preserve the values in the slot we are replacing.
1006          */
1007         if (new_entry->target == -1) {
1008                 new_entry->target = h->dev[entry]->target;
1009                 new_entry->lun = h->dev[entry]->lun;
1010         }
1011
1012         h->dev[entry] = new_entry;
1013         added[*nadded] = new_entry;
1014         (*nadded)++;
1015         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
1016                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
1017                         new_entry->target, new_entry->lun);
1018 }
1019
1020 /* Remove an entry from h->dev[] array. */
1021 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1022         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1023 {
1024         /* assumes h->devlock is held */
1025         int i;
1026         struct hpsa_scsi_dev_t *sd;
1027
1028         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1029
1030         sd = h->dev[entry];
1031         removed[*nremoved] = h->dev[entry];
1032         (*nremoved)++;
1033
1034         for (i = entry; i < h->ndevices-1; i++)
1035                 h->dev[i] = h->dev[i+1];
1036         h->ndevices--;
1037         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
1038                 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
1039                 sd->lun);
1040 }
1041
1042 #define SCSI3ADDR_EQ(a, b) ( \
1043         (a)[7] == (b)[7] && \
1044         (a)[6] == (b)[6] && \
1045         (a)[5] == (b)[5] && \
1046         (a)[4] == (b)[4] && \
1047         (a)[3] == (b)[3] && \
1048         (a)[2] == (b)[2] && \
1049         (a)[1] == (b)[1] && \
1050         (a)[0] == (b)[0])
1051
1052 static void fixup_botched_add(struct ctlr_info *h,
1053         struct hpsa_scsi_dev_t *added)
1054 {
1055         /* called when scsi_add_device fails in order to re-adjust
1056          * h->dev[] to match the mid layer's view.
1057          */
1058         unsigned long flags;
1059         int i, j;
1060
1061         spin_lock_irqsave(&h->lock, flags);
1062         for (i = 0; i < h->ndevices; i++) {
1063                 if (h->dev[i] == added) {
1064                         for (j = i; j < h->ndevices-1; j++)
1065                                 h->dev[j] = h->dev[j+1];
1066                         h->ndevices--;
1067                         break;
1068                 }
1069         }
1070         spin_unlock_irqrestore(&h->lock, flags);
1071         kfree(added);
1072 }
1073
1074 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1075         struct hpsa_scsi_dev_t *dev2)
1076 {
1077         /* we compare everything except lun and target as these
1078          * are not yet assigned.  Compare parts likely
1079          * to differ first
1080          */
1081         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1082                 sizeof(dev1->scsi3addr)) != 0)
1083                 return 0;
1084         if (memcmp(dev1->device_id, dev2->device_id,
1085                 sizeof(dev1->device_id)) != 0)
1086                 return 0;
1087         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1088                 return 0;
1089         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1090                 return 0;
1091         if (dev1->devtype != dev2->devtype)
1092                 return 0;
1093         if (dev1->bus != dev2->bus)
1094                 return 0;
1095         return 1;
1096 }
1097
1098 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1099         struct hpsa_scsi_dev_t *dev2)
1100 {
1101         /* Device attributes that can change, but don't mean
1102          * that the device is a different device, nor that the OS
1103          * needs to be told anything about the change.
1104          */
1105         if (dev1->raid_level != dev2->raid_level)
1106                 return 1;
1107         if (dev1->offload_config != dev2->offload_config)
1108                 return 1;
1109         if (dev1->offload_enabled != dev2->offload_enabled)
1110                 return 1;
1111         if (dev1->queue_depth != dev2->queue_depth)
1112                 return 1;
1113         return 0;
1114 }
1115
1116 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1117  * and return needle location in *index.  If scsi3addr matches, but not
1118  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1119  * location in *index.
1120  * In the case of a minor device attribute change, such as RAID level, just
1121  * return DEVICE_UPDATED, along with the updated device's location in index.
1122  * If needle not found, return DEVICE_NOT_FOUND.
1123  */
1124 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1125         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1126         int *index)
1127 {
1128         int i;
1129 #define DEVICE_NOT_FOUND 0
1130 #define DEVICE_CHANGED 1
1131 #define DEVICE_SAME 2
1132 #define DEVICE_UPDATED 3
1133         for (i = 0; i < haystack_size; i++) {
1134                 if (haystack[i] == NULL) /* previously removed. */
1135                         continue;
1136                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1137                         *index = i;
1138                         if (device_is_the_same(needle, haystack[i])) {
1139                                 if (device_updated(needle, haystack[i]))
1140                                         return DEVICE_UPDATED;
1141                                 return DEVICE_SAME;
1142                         } else {
1143                                 /* Keep offline devices offline */
1144                                 if (needle->volume_offline)
1145                                         return DEVICE_NOT_FOUND;
1146                                 return DEVICE_CHANGED;
1147                         }
1148                 }
1149         }
1150         *index = -1;
1151         return DEVICE_NOT_FOUND;
1152 }
1153
1154 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1155                                         unsigned char scsi3addr[])
1156 {
1157         struct offline_device_entry *device;
1158         unsigned long flags;
1159
1160         /* Check to see if device is already on the list */
1161         spin_lock_irqsave(&h->offline_device_lock, flags);
1162         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1163                 if (memcmp(device->scsi3addr, scsi3addr,
1164                         sizeof(device->scsi3addr)) == 0) {
1165                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1166                         return;
1167                 }
1168         }
1169         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1170
1171         /* Device is not on the list, add it. */
1172         device = kmalloc(sizeof(*device), GFP_KERNEL);
1173         if (!device) {
1174                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1175                 return;
1176         }
1177         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1178         spin_lock_irqsave(&h->offline_device_lock, flags);
1179         list_add_tail(&device->offline_list, &h->offline_device_list);
1180         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1181 }
1182
1183 /* Print a message explaining various offline volume states */
1184 static void hpsa_show_volume_status(struct ctlr_info *h,
1185         struct hpsa_scsi_dev_t *sd)
1186 {
1187         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1188                 dev_info(&h->pdev->dev,
1189                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1190                         h->scsi_host->host_no,
1191                         sd->bus, sd->target, sd->lun);
1192         switch (sd->volume_offline) {
1193         case HPSA_LV_OK:
1194                 break;
1195         case HPSA_LV_UNDERGOING_ERASE:
1196                 dev_info(&h->pdev->dev,
1197                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1198                         h->scsi_host->host_no,
1199                         sd->bus, sd->target, sd->lun);
1200                 break;
1201         case HPSA_LV_UNDERGOING_RPI:
1202                 dev_info(&h->pdev->dev,
1203                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1204                         h->scsi_host->host_no,
1205                         sd->bus, sd->target, sd->lun);
1206                 break;
1207         case HPSA_LV_PENDING_RPI:
1208                 dev_info(&h->pdev->dev,
1209                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1210                                 h->scsi_host->host_no,
1211                                 sd->bus, sd->target, sd->lun);
1212                 break;
1213         case HPSA_LV_ENCRYPTED_NO_KEY:
1214                 dev_info(&h->pdev->dev,
1215                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1216                         h->scsi_host->host_no,
1217                         sd->bus, sd->target, sd->lun);
1218                 break;
1219         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1220                 dev_info(&h->pdev->dev,
1221                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1222                         h->scsi_host->host_no,
1223                         sd->bus, sd->target, sd->lun);
1224                 break;
1225         case HPSA_LV_UNDERGOING_ENCRYPTION:
1226                 dev_info(&h->pdev->dev,
1227                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1228                         h->scsi_host->host_no,
1229                         sd->bus, sd->target, sd->lun);
1230                 break;
1231         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1232                 dev_info(&h->pdev->dev,
1233                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1234                         h->scsi_host->host_no,
1235                         sd->bus, sd->target, sd->lun);
1236                 break;
1237         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1238                 dev_info(&h->pdev->dev,
1239                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1240                         h->scsi_host->host_no,
1241                         sd->bus, sd->target, sd->lun);
1242                 break;
1243         case HPSA_LV_PENDING_ENCRYPTION:
1244                 dev_info(&h->pdev->dev,
1245                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1246                         h->scsi_host->host_no,
1247                         sd->bus, sd->target, sd->lun);
1248                 break;
1249         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1250                 dev_info(&h->pdev->dev,
1251                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1252                         h->scsi_host->host_no,
1253                         sd->bus, sd->target, sd->lun);
1254                 break;
1255         }
1256 }
1257
1258 /*
1259  * Figure the list of physical drive pointers for a logical drive with
1260  * raid offload configured.
1261  */
1262 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1263                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1264                                 struct hpsa_scsi_dev_t *logical_drive)
1265 {
1266         struct raid_map_data *map = &logical_drive->raid_map;
1267         struct raid_map_disk_data *dd = &map->data[0];
1268         int i, j;
1269         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1270                                 le16_to_cpu(map->metadata_disks_per_row);
1271         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1272                                 le16_to_cpu(map->layout_map_count) *
1273                                 total_disks_per_row;
1274         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1275                                 total_disks_per_row;
1276         int qdepth;
1277
1278         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1279                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1280
1281         qdepth = 0;
1282         for (i = 0; i < nraid_map_entries; i++) {
1283                 logical_drive->phys_disk[i] = NULL;
1284                 if (!logical_drive->offload_config)
1285                         continue;
1286                 for (j = 0; j < ndevices; j++) {
1287                         if (dev[j]->devtype != TYPE_DISK)
1288                                 continue;
1289                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1290                                 continue;
1291                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1292                                 continue;
1293
1294                         logical_drive->phys_disk[i] = dev[j];
1295                         if (i < nphys_disk)
1296                                 qdepth = min(h->nr_cmds, qdepth +
1297                                     logical_drive->phys_disk[i]->queue_depth);
1298                         break;
1299                 }
1300
1301                 /*
1302                  * This can happen if a physical drive is removed and
1303                  * the logical drive is degraded.  In that case, the RAID
1304                  * map data will refer to a physical disk which isn't actually
1305                  * present.  And in that case offload_enabled should already
1306                  * be 0, but we'll turn it off here just in case
1307                  */
1308                 if (!logical_drive->phys_disk[i]) {
1309                         logical_drive->offload_enabled = 0;
1310                         logical_drive->queue_depth = h->nr_cmds;
1311                 }
1312         }
1313         if (nraid_map_entries)
1314                 /*
1315                  * This is correct for reads, too high for full stripe writes,
1316                  * way too high for partial stripe writes
1317                  */
1318                 logical_drive->queue_depth = qdepth;
1319         else
1320                 logical_drive->queue_depth = h->nr_cmds;
1321 }
1322
1323 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1324                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1325 {
1326         int i;
1327
1328         for (i = 0; i < ndevices; i++) {
1329                 if (dev[i]->devtype != TYPE_DISK)
1330                         continue;
1331                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1332                         continue;
1333                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1334         }
1335 }
1336
1337 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1338         struct hpsa_scsi_dev_t *sd[], int nsds)
1339 {
1340         /* sd contains scsi3 addresses and devtypes, and inquiry
1341          * data.  This function takes what's in sd to be the current
1342          * reality and updates h->dev[] to reflect that reality.
1343          */
1344         int i, entry, device_change, changes = 0;
1345         struct hpsa_scsi_dev_t *csd;
1346         unsigned long flags;
1347         struct hpsa_scsi_dev_t **added, **removed;
1348         int nadded, nremoved;
1349         struct Scsi_Host *sh = NULL;
1350
1351         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1352         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1353
1354         if (!added || !removed) {
1355                 dev_warn(&h->pdev->dev, "out of memory in "
1356                         "adjust_hpsa_scsi_table\n");
1357                 goto free_and_out;
1358         }
1359
1360         spin_lock_irqsave(&h->devlock, flags);
1361
1362         /* find any devices in h->dev[] that are not in
1363          * sd[] and remove them from h->dev[], and for any
1364          * devices which have changed, remove the old device
1365          * info and add the new device info.
1366          * If minor device attributes change, just update
1367          * the existing device structure.
1368          */
1369         i = 0;
1370         nremoved = 0;
1371         nadded = 0;
1372         while (i < h->ndevices) {
1373                 csd = h->dev[i];
1374                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1375                 if (device_change == DEVICE_NOT_FOUND) {
1376                         changes++;
1377                         hpsa_scsi_remove_entry(h, hostno, i,
1378                                 removed, &nremoved);
1379                         continue; /* remove ^^^, hence i not incremented */
1380                 } else if (device_change == DEVICE_CHANGED) {
1381                         changes++;
1382                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1383                                 added, &nadded, removed, &nremoved);
1384                         /* Set it to NULL to prevent it from being freed
1385                          * at the bottom of hpsa_update_scsi_devices()
1386                          */
1387                         sd[entry] = NULL;
1388                 } else if (device_change == DEVICE_UPDATED) {
1389                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1390                 }
1391                 i++;
1392         }
1393
1394         /* Now, make sure every device listed in sd[] is also
1395          * listed in h->dev[], adding them if they aren't found
1396          */
1397
1398         for (i = 0; i < nsds; i++) {
1399                 if (!sd[i]) /* if already added above. */
1400                         continue;
1401
1402                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1403                  * as the SCSI mid-layer does not handle such devices well.
1404                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1405                  * at 160Hz, and prevents the system from coming up.
1406                  */
1407                 if (sd[i]->volume_offline) {
1408                         hpsa_show_volume_status(h, sd[i]);
1409                         dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n",
1410                                 h->scsi_host->host_no,
1411                                 sd[i]->bus, sd[i]->target, sd[i]->lun);
1412                         continue;
1413                 }
1414
1415                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1416                                         h->ndevices, &entry);
1417                 if (device_change == DEVICE_NOT_FOUND) {
1418                         changes++;
1419                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1420                                 added, &nadded) != 0)
1421                                 break;
1422                         sd[i] = NULL; /* prevent from being freed later. */
1423                 } else if (device_change == DEVICE_CHANGED) {
1424                         /* should never happen... */
1425                         changes++;
1426                         dev_warn(&h->pdev->dev,
1427                                 "device unexpectedly changed.\n");
1428                         /* but if it does happen, we just ignore that device */
1429                 }
1430         }
1431         spin_unlock_irqrestore(&h->devlock, flags);
1432
1433         /* Monitor devices which are in one of several NOT READY states to be
1434          * brought online later. This must be done without holding h->devlock,
1435          * so don't touch h->dev[]
1436          */
1437         for (i = 0; i < nsds; i++) {
1438                 if (!sd[i]) /* if already added above. */
1439                         continue;
1440                 if (sd[i]->volume_offline)
1441                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1442         }
1443
1444         /* Don't notify scsi mid layer of any changes the first time through
1445          * (or if there are no changes) scsi_scan_host will do it later the
1446          * first time through.
1447          */
1448         if (hostno == -1 || !changes)
1449                 goto free_and_out;
1450
1451         sh = h->scsi_host;
1452         /* Notify scsi mid layer of any removed devices */
1453         for (i = 0; i < nremoved; i++) {
1454                 struct scsi_device *sdev =
1455                         scsi_device_lookup(sh, removed[i]->bus,
1456                                 removed[i]->target, removed[i]->lun);
1457                 if (sdev != NULL) {
1458                         scsi_remove_device(sdev);
1459                         scsi_device_put(sdev);
1460                 } else {
1461                         /* We don't expect to get here.
1462                          * future cmds to this device will get selection
1463                          * timeout as if the device was gone.
1464                          */
1465                         dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1466                                 " for removal.", hostno, removed[i]->bus,
1467                                 removed[i]->target, removed[i]->lun);
1468                 }
1469                 kfree(removed[i]);
1470                 removed[i] = NULL;
1471         }
1472
1473         /* Notify scsi mid layer of any added devices */
1474         for (i = 0; i < nadded; i++) {
1475                 if (scsi_add_device(sh, added[i]->bus,
1476                         added[i]->target, added[i]->lun) == 0)
1477                         continue;
1478                 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1479                         "device not added.\n", hostno, added[i]->bus,
1480                         added[i]->target, added[i]->lun);
1481                 /* now we have to remove it from h->dev,
1482                  * since it didn't get added to scsi mid layer
1483                  */
1484                 fixup_botched_add(h, added[i]);
1485         }
1486
1487 free_and_out:
1488         kfree(added);
1489         kfree(removed);
1490 }
1491
1492 /*
1493  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1494  * Assume's h->devlock is held.
1495  */
1496 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1497         int bus, int target, int lun)
1498 {
1499         int i;
1500         struct hpsa_scsi_dev_t *sd;
1501
1502         for (i = 0; i < h->ndevices; i++) {
1503                 sd = h->dev[i];
1504                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1505                         return sd;
1506         }
1507         return NULL;
1508 }
1509
1510 /* link sdev->hostdata to our per-device structure. */
1511 static int hpsa_slave_alloc(struct scsi_device *sdev)
1512 {
1513         struct hpsa_scsi_dev_t *sd;
1514         unsigned long flags;
1515         struct ctlr_info *h;
1516
1517         h = sdev_to_hba(sdev);
1518         spin_lock_irqsave(&h->devlock, flags);
1519         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1520                 sdev_id(sdev), sdev->lun);
1521         if (sd != NULL) {
1522                 sdev->hostdata = sd;
1523                 if (sd->queue_depth)
1524                         scsi_change_queue_depth(sdev, sd->queue_depth);
1525                 atomic_set(&sd->ioaccel_cmds_out, 0);
1526         }
1527         spin_unlock_irqrestore(&h->devlock, flags);
1528         return 0;
1529 }
1530
1531 static void hpsa_slave_destroy(struct scsi_device *sdev)
1532 {
1533         /* nothing to do. */
1534 }
1535
1536 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1537 {
1538         int i;
1539
1540         if (!h->cmd_sg_list)
1541                 return;
1542         for (i = 0; i < h->nr_cmds; i++) {
1543                 kfree(h->cmd_sg_list[i]);
1544                 h->cmd_sg_list[i] = NULL;
1545         }
1546         kfree(h->cmd_sg_list);
1547         h->cmd_sg_list = NULL;
1548 }
1549
1550 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1551 {
1552         int i;
1553
1554         if (h->chainsize <= 0)
1555                 return 0;
1556
1557         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1558                                 GFP_KERNEL);
1559         if (!h->cmd_sg_list) {
1560                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1561                 return -ENOMEM;
1562         }
1563         for (i = 0; i < h->nr_cmds; i++) {
1564                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1565                                                 h->chainsize, GFP_KERNEL);
1566                 if (!h->cmd_sg_list[i]) {
1567                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1568                         goto clean;
1569                 }
1570         }
1571         return 0;
1572
1573 clean:
1574         hpsa_free_sg_chain_blocks(h);
1575         return -ENOMEM;
1576 }
1577
1578 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1579         struct CommandList *c)
1580 {
1581         struct SGDescriptor *chain_sg, *chain_block;
1582         u64 temp64;
1583         u32 chain_len;
1584
1585         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1586         chain_block = h->cmd_sg_list[c->cmdindex];
1587         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1588         chain_len = sizeof(*chain_sg) *
1589                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1590         chain_sg->Len = cpu_to_le32(chain_len);
1591         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1592                                 PCI_DMA_TODEVICE);
1593         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1594                 /* prevent subsequent unmapping */
1595                 chain_sg->Addr = cpu_to_le64(0);
1596                 return -1;
1597         }
1598         chain_sg->Addr = cpu_to_le64(temp64);
1599         return 0;
1600 }
1601
1602 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1603         struct CommandList *c)
1604 {
1605         struct SGDescriptor *chain_sg;
1606
1607         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1608                 return;
1609
1610         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1611         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
1612                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1613 }
1614
1615
1616 /* Decode the various types of errors on ioaccel2 path.
1617  * Return 1 for any error that should generate a RAID path retry.
1618  * Return 0 for errors that don't require a RAID path retry.
1619  */
1620 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1621                                         struct CommandList *c,
1622                                         struct scsi_cmnd *cmd,
1623                                         struct io_accel2_cmd *c2)
1624 {
1625         int data_len;
1626         int retry = 0;
1627
1628         switch (c2->error_data.serv_response) {
1629         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1630                 switch (c2->error_data.status) {
1631                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1632                         break;
1633                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1634                         dev_warn(&h->pdev->dev,
1635                                 "%s: task complete with check condition.\n",
1636                                 "HP SSD Smart Path");
1637                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1638                         if (c2->error_data.data_present !=
1639                                         IOACCEL2_SENSE_DATA_PRESENT) {
1640                                 memset(cmd->sense_buffer, 0,
1641                                         SCSI_SENSE_BUFFERSIZE);
1642                                 break;
1643                         }
1644                         /* copy the sense data */
1645                         data_len = c2->error_data.sense_data_len;
1646                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1647                                 data_len = SCSI_SENSE_BUFFERSIZE;
1648                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1649                                 data_len =
1650                                         sizeof(c2->error_data.sense_data_buff);
1651                         memcpy(cmd->sense_buffer,
1652                                 c2->error_data.sense_data_buff, data_len);
1653                         retry = 1;
1654                         break;
1655                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1656                         dev_warn(&h->pdev->dev,
1657                                 "%s: task complete with BUSY status.\n",
1658                                 "HP SSD Smart Path");
1659                         retry = 1;
1660                         break;
1661                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1662                         dev_warn(&h->pdev->dev,
1663                                 "%s: task complete with reservation conflict.\n",
1664                                 "HP SSD Smart Path");
1665                         retry = 1;
1666                         break;
1667                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1668                         /* Make scsi midlayer do unlimited retries */
1669                         cmd->result = DID_IMM_RETRY << 16;
1670                         break;
1671                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1672                         dev_warn(&h->pdev->dev,
1673                                 "%s: task complete with aborted status.\n",
1674                                 "HP SSD Smart Path");
1675                         retry = 1;
1676                         break;
1677                 default:
1678                         dev_warn(&h->pdev->dev,
1679                                 "%s: task complete with unrecognized status: 0x%02x\n",
1680                                 "HP SSD Smart Path", c2->error_data.status);
1681                         retry = 1;
1682                         break;
1683                 }
1684                 break;
1685         case IOACCEL2_SERV_RESPONSE_FAILURE:
1686                 /* don't expect to get here. */
1687                 dev_warn(&h->pdev->dev,
1688                         "unexpected delivery or target failure, status = 0x%02x\n",
1689                         c2->error_data.status);
1690                 retry = 1;
1691                 break;
1692         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1693                 break;
1694         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1695                 break;
1696         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1697                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1698                 retry = 1;
1699                 break;
1700         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1701                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1702                 break;
1703         default:
1704                 dev_warn(&h->pdev->dev,
1705                         "%s: Unrecognized server response: 0x%02x\n",
1706                         "HP SSD Smart Path",
1707                         c2->error_data.serv_response);
1708                 retry = 1;
1709                 break;
1710         }
1711
1712         return retry;   /* retry on raid path? */
1713 }
1714
1715 static void process_ioaccel2_completion(struct ctlr_info *h,
1716                 struct CommandList *c, struct scsi_cmnd *cmd,
1717                 struct hpsa_scsi_dev_t *dev)
1718 {
1719         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1720
1721         /* check for good status */
1722         if (likely(c2->error_data.serv_response == 0 &&
1723                         c2->error_data.status == 0)) {
1724                 cmd_free(h, c);
1725                 cmd->scsi_done(cmd);
1726                 return;
1727         }
1728
1729         /* Any RAID offload error results in retry which will use
1730          * the normal I/O path so the controller can handle whatever's
1731          * wrong.
1732          */
1733         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1734                 c2->error_data.serv_response ==
1735                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1736                 if (c2->error_data.status ==
1737                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
1738                         dev->offload_enabled = 0;
1739                 goto retry_cmd;
1740         }
1741
1742         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
1743                 goto retry_cmd;
1744
1745         cmd_free(h, c);
1746         cmd->scsi_done(cmd);
1747         return;
1748
1749 retry_cmd:
1750         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
1751         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
1752 }
1753
1754 static void complete_scsi_command(struct CommandList *cp)
1755 {
1756         struct scsi_cmnd *cmd;
1757         struct ctlr_info *h;
1758         struct ErrorInfo *ei;
1759         struct hpsa_scsi_dev_t *dev;
1760
1761         unsigned char sense_key;
1762         unsigned char asc;      /* additional sense code */
1763         unsigned char ascq;     /* additional sense code qualifier */
1764         unsigned long sense_data_size;
1765
1766         ei = cp->err_info;
1767         cmd = cp->scsi_cmd;
1768         h = cp->h;
1769         dev = cmd->device->hostdata;
1770
1771         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1772         if ((cp->cmd_type == CMD_SCSI) &&
1773                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
1774                 hpsa_unmap_sg_chain_block(h, cp);
1775
1776         cmd->result = (DID_OK << 16);           /* host byte */
1777         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1778
1779         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
1780                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1781
1782         if (cp->cmd_type == CMD_IOACCEL2)
1783                 return process_ioaccel2_completion(h, cp, cmd, dev);
1784
1785         cmd->result |= ei->ScsiStatus;
1786
1787         scsi_set_resid(cmd, ei->ResidualCnt);
1788         if (ei->CommandStatus == 0) {
1789                 if (cp->cmd_type == CMD_IOACCEL1)
1790                         atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1791                 cmd_free(h, cp);
1792                 cmd->scsi_done(cmd);
1793                 return;
1794         }
1795
1796         /* copy the sense data */
1797         if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1798                 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1799         else
1800                 sense_data_size = sizeof(ei->SenseInfo);
1801         if (ei->SenseLen < sense_data_size)
1802                 sense_data_size = ei->SenseLen;
1803
1804         memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1805
1806         /* For I/O accelerator commands, copy over some fields to the normal
1807          * CISS header used below for error handling.
1808          */
1809         if (cp->cmd_type == CMD_IOACCEL1) {
1810                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1811                 cp->Header.SGList = scsi_sg_count(cmd);
1812                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
1813                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
1814                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
1815                 cp->Header.tag = c->tag;
1816                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
1817                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
1818
1819                 /* Any RAID offload error results in retry which will use
1820                  * the normal I/O path so the controller can handle whatever's
1821                  * wrong.
1822                  */
1823                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
1824                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
1825                                 dev->offload_enabled = 0;
1826                         INIT_WORK(&cp->work, hpsa_command_resubmit_worker);
1827                         queue_work_on(raw_smp_processor_id(),
1828                                         h->resubmit_wq, &cp->work);
1829                         return;
1830                 }
1831         }
1832
1833         /* an error has occurred */
1834         switch (ei->CommandStatus) {
1835
1836         case CMD_TARGET_STATUS:
1837                 if (ei->ScsiStatus) {
1838                         /* Get sense key */
1839                         sense_key = 0xf & ei->SenseInfo[2];
1840                         /* Get additional sense code */
1841                         asc = ei->SenseInfo[12];
1842                         /* Get addition sense code qualifier */
1843                         ascq = ei->SenseInfo[13];
1844                 }
1845                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1846                         if (sense_key == ABORTED_COMMAND) {
1847                                 cmd->result |= DID_SOFT_ERROR << 16;
1848                                 break;
1849                         }
1850                         break;
1851                 }
1852                 /* Problem was not a check condition
1853                  * Pass it up to the upper layers...
1854                  */
1855                 if (ei->ScsiStatus) {
1856                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1857                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1858                                 "Returning result: 0x%x\n",
1859                                 cp, ei->ScsiStatus,
1860                                 sense_key, asc, ascq,
1861                                 cmd->result);
1862                 } else {  /* scsi status is zero??? How??? */
1863                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1864                                 "Returning no connection.\n", cp),
1865
1866                         /* Ordinarily, this case should never happen,
1867                          * but there is a bug in some released firmware
1868                          * revisions that allows it to happen if, for
1869                          * example, a 4100 backplane loses power and
1870                          * the tape drive is in it.  We assume that
1871                          * it's a fatal error of some kind because we
1872                          * can't show that it wasn't. We will make it
1873                          * look like selection timeout since that is
1874                          * the most common reason for this to occur,
1875                          * and it's severe enough.
1876                          */
1877
1878                         cmd->result = DID_NO_CONNECT << 16;
1879                 }
1880                 break;
1881
1882         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1883                 break;
1884         case CMD_DATA_OVERRUN:
1885                 dev_warn(&h->pdev->dev,
1886                         "CDB %16phN data overrun\n", cp->Request.CDB);
1887                 break;
1888         case CMD_INVALID: {
1889                 /* print_bytes(cp, sizeof(*cp), 1, 0);
1890                 print_cmd(cp); */
1891                 /* We get CMD_INVALID if you address a non-existent device
1892                  * instead of a selection timeout (no response).  You will
1893                  * see this if you yank out a drive, then try to access it.
1894                  * This is kind of a shame because it means that any other
1895                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
1896                  * missing target. */
1897                 cmd->result = DID_NO_CONNECT << 16;
1898         }
1899                 break;
1900         case CMD_PROTOCOL_ERR:
1901                 cmd->result = DID_ERROR << 16;
1902                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
1903                                 cp->Request.CDB);
1904                 break;
1905         case CMD_HARDWARE_ERR:
1906                 cmd->result = DID_ERROR << 16;
1907                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
1908                         cp->Request.CDB);
1909                 break;
1910         case CMD_CONNECTION_LOST:
1911                 cmd->result = DID_ERROR << 16;
1912                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
1913                         cp->Request.CDB);
1914                 break;
1915         case CMD_ABORTED:
1916                 cmd->result = DID_ABORT << 16;
1917                 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
1918                                 cp->Request.CDB, ei->ScsiStatus);
1919                 break;
1920         case CMD_ABORT_FAILED:
1921                 cmd->result = DID_ERROR << 16;
1922                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
1923                         cp->Request.CDB);
1924                 break;
1925         case CMD_UNSOLICITED_ABORT:
1926                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1927                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
1928                         cp->Request.CDB);
1929                 break;
1930         case CMD_TIMEOUT:
1931                 cmd->result = DID_TIME_OUT << 16;
1932                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
1933                         cp->Request.CDB);
1934                 break;
1935         case CMD_UNABORTABLE:
1936                 cmd->result = DID_ERROR << 16;
1937                 dev_warn(&h->pdev->dev, "Command unabortable\n");
1938                 break;
1939         case CMD_IOACCEL_DISABLED:
1940                 /* This only handles the direct pass-through case since RAID
1941                  * offload is handled above.  Just attempt a retry.
1942                  */
1943                 cmd->result = DID_SOFT_ERROR << 16;
1944                 dev_warn(&h->pdev->dev,
1945                                 "cp %p had HP SSD Smart Path error\n", cp);
1946                 break;
1947         default:
1948                 cmd->result = DID_ERROR << 16;
1949                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1950                                 cp, ei->CommandStatus);
1951         }
1952         cmd_free(h, cp);
1953         cmd->scsi_done(cmd);
1954 }
1955
1956 static void hpsa_pci_unmap(struct pci_dev *pdev,
1957         struct CommandList *c, int sg_used, int data_direction)
1958 {
1959         int i;
1960
1961         for (i = 0; i < sg_used; i++)
1962                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
1963                                 le32_to_cpu(c->SG[i].Len),
1964                                 data_direction);
1965 }
1966
1967 static int hpsa_map_one(struct pci_dev *pdev,
1968                 struct CommandList *cp,
1969                 unsigned char *buf,
1970                 size_t buflen,
1971                 int data_direction)
1972 {
1973         u64 addr64;
1974
1975         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1976                 cp->Header.SGList = 0;
1977                 cp->Header.SGTotal = cpu_to_le16(0);
1978                 return 0;
1979         }
1980
1981         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
1982         if (dma_mapping_error(&pdev->dev, addr64)) {
1983                 /* Prevent subsequent unmap of something never mapped */
1984                 cp->Header.SGList = 0;
1985                 cp->Header.SGTotal = cpu_to_le16(0);
1986                 return -1;
1987         }
1988         cp->SG[0].Addr = cpu_to_le64(addr64);
1989         cp->SG[0].Len = cpu_to_le32(buflen);
1990         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
1991         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
1992         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
1993         return 0;
1994 }
1995
1996 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1997         struct CommandList *c)
1998 {
1999         DECLARE_COMPLETION_ONSTACK(wait);
2000
2001         c->waiting = &wait;
2002         enqueue_cmd_and_start_io(h, c);
2003         wait_for_completion(&wait);
2004 }
2005
2006 static u32 lockup_detected(struct ctlr_info *h)
2007 {
2008         int cpu;
2009         u32 rc, *lockup_detected;
2010
2011         cpu = get_cpu();
2012         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2013         rc = *lockup_detected;
2014         put_cpu();
2015         return rc;
2016 }
2017
2018 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
2019         struct CommandList *c)
2020 {
2021         /* If controller lockup detected, fake a hardware error. */
2022         if (unlikely(lockup_detected(h)))
2023                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
2024         else
2025                 hpsa_scsi_do_simple_cmd_core(h, c);
2026 }
2027
2028 #define MAX_DRIVER_CMD_RETRIES 25
2029 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2030         struct CommandList *c, int data_direction)
2031 {
2032         int backoff_time = 10, retry_count = 0;
2033
2034         do {
2035                 memset(c->err_info, 0, sizeof(*c->err_info));
2036                 hpsa_scsi_do_simple_cmd_core(h, c);
2037                 retry_count++;
2038                 if (retry_count > 3) {
2039                         msleep(backoff_time);
2040                         if (backoff_time < 1000)
2041                                 backoff_time *= 2;
2042                 }
2043         } while ((check_for_unit_attention(h, c) ||
2044                         check_for_busy(h, c)) &&
2045                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2046         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2047 }
2048
2049 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2050                                 struct CommandList *c)
2051 {
2052         const u8 *cdb = c->Request.CDB;
2053         const u8 *lun = c->Header.LUN.LunAddrBytes;
2054
2055         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2056         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2057                 txt, lun[0], lun[1], lun[2], lun[3],
2058                 lun[4], lun[5], lun[6], lun[7],
2059                 cdb[0], cdb[1], cdb[2], cdb[3],
2060                 cdb[4], cdb[5], cdb[6], cdb[7],
2061                 cdb[8], cdb[9], cdb[10], cdb[11],
2062                 cdb[12], cdb[13], cdb[14], cdb[15]);
2063 }
2064
2065 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2066                         struct CommandList *cp)
2067 {
2068         const struct ErrorInfo *ei = cp->err_info;
2069         struct device *d = &cp->h->pdev->dev;
2070         const u8 *sd = ei->SenseInfo;
2071
2072         switch (ei->CommandStatus) {
2073         case CMD_TARGET_STATUS:
2074                 hpsa_print_cmd(h, "SCSI status", cp);
2075                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2076                         dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n",
2077                                 sd[2] & 0x0f, sd[12], sd[13]);
2078                 else
2079                         dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus);
2080                 if (ei->ScsiStatus == 0)
2081                         dev_warn(d, "SCSI status is abnormally zero.  "
2082                         "(probably indicates selection timeout "
2083                         "reported incorrectly due to a known "
2084                         "firmware bug, circa July, 2001.)\n");
2085                 break;
2086         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2087                 break;
2088         case CMD_DATA_OVERRUN:
2089                 hpsa_print_cmd(h, "overrun condition", cp);
2090                 break;
2091         case CMD_INVALID: {
2092                 /* controller unfortunately reports SCSI passthru's
2093                  * to non-existent targets as invalid commands.
2094                  */
2095                 hpsa_print_cmd(h, "invalid command", cp);
2096                 dev_warn(d, "probably means device no longer present\n");
2097                 }
2098                 break;
2099         case CMD_PROTOCOL_ERR:
2100                 hpsa_print_cmd(h, "protocol error", cp);
2101                 break;
2102         case CMD_HARDWARE_ERR:
2103                 hpsa_print_cmd(h, "hardware error", cp);
2104                 break;
2105         case CMD_CONNECTION_LOST:
2106                 hpsa_print_cmd(h, "connection lost", cp);
2107                 break;
2108         case CMD_ABORTED:
2109                 hpsa_print_cmd(h, "aborted", cp);
2110                 break;
2111         case CMD_ABORT_FAILED:
2112                 hpsa_print_cmd(h, "abort failed", cp);
2113                 break;
2114         case CMD_UNSOLICITED_ABORT:
2115                 hpsa_print_cmd(h, "unsolicited abort", cp);
2116                 break;
2117         case CMD_TIMEOUT:
2118                 hpsa_print_cmd(h, "timed out", cp);
2119                 break;
2120         case CMD_UNABORTABLE:
2121                 hpsa_print_cmd(h, "unabortable", cp);
2122                 break;
2123         default:
2124                 hpsa_print_cmd(h, "unknown status", cp);
2125                 dev_warn(d, "Unknown command status %x\n",
2126                                 ei->CommandStatus);
2127         }
2128 }
2129
2130 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2131                         u16 page, unsigned char *buf,
2132                         unsigned char bufsize)
2133 {
2134         int rc = IO_OK;
2135         struct CommandList *c;
2136         struct ErrorInfo *ei;
2137
2138         c = cmd_alloc(h);
2139
2140         if (c == NULL) {
2141                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2142                 return -ENOMEM;
2143         }
2144
2145         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2146                         page, scsi3addr, TYPE_CMD)) {
2147                 rc = -1;
2148                 goto out;
2149         }
2150         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2151         ei = c->err_info;
2152         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2153                 hpsa_scsi_interpret_error(h, c);
2154                 rc = -1;
2155         }
2156 out:
2157         cmd_free(h, c);
2158         return rc;
2159 }
2160
2161 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2162                 unsigned char *scsi3addr, unsigned char page,
2163                 struct bmic_controller_parameters *buf, size_t bufsize)
2164 {
2165         int rc = IO_OK;
2166         struct CommandList *c;
2167         struct ErrorInfo *ei;
2168
2169         c = cmd_alloc(h);
2170         if (c == NULL) {                        /* trouble... */
2171                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2172                 return -ENOMEM;
2173         }
2174
2175         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2176                         page, scsi3addr, TYPE_CMD)) {
2177                 rc = -1;
2178                 goto out;
2179         }
2180         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2181         ei = c->err_info;
2182         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2183                 hpsa_scsi_interpret_error(h, c);
2184                 rc = -1;
2185         }
2186 out:
2187         cmd_free(h, c);
2188         return rc;
2189         }
2190
2191 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2192         u8 reset_type)
2193 {
2194         int rc = IO_OK;
2195         struct CommandList *c;
2196         struct ErrorInfo *ei;
2197
2198         c = cmd_alloc(h);
2199
2200         if (c == NULL) {                        /* trouble... */
2201                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2202                 return -ENOMEM;
2203         }
2204
2205         /* fill_cmd can't fail here, no data buffer to map. */
2206         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2207                         scsi3addr, TYPE_MSG);
2208         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2209         hpsa_scsi_do_simple_cmd_core(h, c);
2210         /* no unmap needed here because no data xfer. */
2211
2212         ei = c->err_info;
2213         if (ei->CommandStatus != 0) {
2214                 hpsa_scsi_interpret_error(h, c);
2215                 rc = -1;
2216         }
2217         cmd_free(h, c);
2218         return rc;
2219 }
2220
2221 static void hpsa_get_raid_level(struct ctlr_info *h,
2222         unsigned char *scsi3addr, unsigned char *raid_level)
2223 {
2224         int rc;
2225         unsigned char *buf;
2226
2227         *raid_level = RAID_UNKNOWN;
2228         buf = kzalloc(64, GFP_KERNEL);
2229         if (!buf)
2230                 return;
2231         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2232         if (rc == 0)
2233                 *raid_level = buf[8];
2234         if (*raid_level > RAID_UNKNOWN)
2235                 *raid_level = RAID_UNKNOWN;
2236         kfree(buf);
2237         return;
2238 }
2239
2240 #define HPSA_MAP_DEBUG
2241 #ifdef HPSA_MAP_DEBUG
2242 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2243                                 struct raid_map_data *map_buff)
2244 {
2245         struct raid_map_disk_data *dd = &map_buff->data[0];
2246         int map, row, col;
2247         u16 map_cnt, row_cnt, disks_per_row;
2248
2249         if (rc != 0)
2250                 return;
2251
2252         /* Show details only if debugging has been activated. */
2253         if (h->raid_offload_debug < 2)
2254                 return;
2255
2256         dev_info(&h->pdev->dev, "structure_size = %u\n",
2257                                 le32_to_cpu(map_buff->structure_size));
2258         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2259                         le32_to_cpu(map_buff->volume_blk_size));
2260         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2261                         le64_to_cpu(map_buff->volume_blk_cnt));
2262         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2263                         map_buff->phys_blk_shift);
2264         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2265                         map_buff->parity_rotation_shift);
2266         dev_info(&h->pdev->dev, "strip_size = %u\n",
2267                         le16_to_cpu(map_buff->strip_size));
2268         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2269                         le64_to_cpu(map_buff->disk_starting_blk));
2270         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2271                         le64_to_cpu(map_buff->disk_blk_cnt));
2272         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2273                         le16_to_cpu(map_buff->data_disks_per_row));
2274         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2275                         le16_to_cpu(map_buff->metadata_disks_per_row));
2276         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2277                         le16_to_cpu(map_buff->row_cnt));
2278         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2279                         le16_to_cpu(map_buff->layout_map_count));
2280         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2281                         le16_to_cpu(map_buff->flags));
2282         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2283                         le16_to_cpu(map_buff->flags) &
2284                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2285         dev_info(&h->pdev->dev, "dekindex = %u\n",
2286                         le16_to_cpu(map_buff->dekindex));
2287         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2288         for (map = 0; map < map_cnt; map++) {
2289                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2290                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2291                 for (row = 0; row < row_cnt; row++) {
2292                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2293                         disks_per_row =
2294                                 le16_to_cpu(map_buff->data_disks_per_row);
2295                         for (col = 0; col < disks_per_row; col++, dd++)
2296                                 dev_info(&h->pdev->dev,
2297                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2298                                         col, dd->ioaccel_handle,
2299                                         dd->xor_mult[0], dd->xor_mult[1]);
2300                         disks_per_row =
2301                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2302                         for (col = 0; col < disks_per_row; col++, dd++)
2303                                 dev_info(&h->pdev->dev,
2304                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2305                                         col, dd->ioaccel_handle,
2306                                         dd->xor_mult[0], dd->xor_mult[1]);
2307                 }
2308         }
2309 }
2310 #else
2311 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2312                         __attribute__((unused)) int rc,
2313                         __attribute__((unused)) struct raid_map_data *map_buff)
2314 {
2315 }
2316 #endif
2317
2318 static int hpsa_get_raid_map(struct ctlr_info *h,
2319         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2320 {
2321         int rc = 0;
2322         struct CommandList *c;
2323         struct ErrorInfo *ei;
2324
2325         c = cmd_alloc(h);
2326         if (c == NULL) {
2327                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2328                 return -ENOMEM;
2329         }
2330         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2331                         sizeof(this_device->raid_map), 0,
2332                         scsi3addr, TYPE_CMD)) {
2333                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2334                 cmd_free(h, c);
2335                 return -ENOMEM;
2336         }
2337         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2338         ei = c->err_info;
2339         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2340                 hpsa_scsi_interpret_error(h, c);
2341                 cmd_free(h, c);
2342                 return -1;
2343         }
2344         cmd_free(h, c);
2345
2346         /* @todo in the future, dynamically allocate RAID map memory */
2347         if (le32_to_cpu(this_device->raid_map.structure_size) >
2348                                 sizeof(this_device->raid_map)) {
2349                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2350                 rc = -1;
2351         }
2352         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2353         return rc;
2354 }
2355
2356 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
2357                 unsigned char scsi3addr[], u16 bmic_device_index,
2358                 struct bmic_identify_physical_device *buf, size_t bufsize)
2359 {
2360         int rc = IO_OK;
2361         struct CommandList *c;
2362         struct ErrorInfo *ei;
2363
2364         c = cmd_alloc(h);
2365         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
2366                 0, RAID_CTLR_LUNID, TYPE_CMD);
2367         if (rc)
2368                 goto out;
2369
2370         c->Request.CDB[2] = bmic_device_index & 0xff;
2371         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
2372
2373         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2374         ei = c->err_info;
2375         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2376                 hpsa_scsi_interpret_error(h, c);
2377                 rc = -1;
2378         }
2379 out:
2380         cmd_free(h, c);
2381         return rc;
2382 }
2383
2384 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2385         unsigned char scsi3addr[], u8 page)
2386 {
2387         int rc;
2388         int i;
2389         int pages;
2390         unsigned char *buf, bufsize;
2391
2392         buf = kzalloc(256, GFP_KERNEL);
2393         if (!buf)
2394                 return 0;
2395
2396         /* Get the size of the page list first */
2397         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2398                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2399                                 buf, HPSA_VPD_HEADER_SZ);
2400         if (rc != 0)
2401                 goto exit_unsupported;
2402         pages = buf[3];
2403         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2404                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2405         else
2406                 bufsize = 255;
2407
2408         /* Get the whole VPD page list */
2409         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2410                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2411                                 buf, bufsize);
2412         if (rc != 0)
2413                 goto exit_unsupported;
2414
2415         pages = buf[3];
2416         for (i = 1; i <= pages; i++)
2417                 if (buf[3 + i] == page)
2418                         goto exit_supported;
2419 exit_unsupported:
2420         kfree(buf);
2421         return 0;
2422 exit_supported:
2423         kfree(buf);
2424         return 1;
2425 }
2426
2427 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2428         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2429 {
2430         int rc;
2431         unsigned char *buf;
2432         u8 ioaccel_status;
2433
2434         this_device->offload_config = 0;
2435         this_device->offload_enabled = 0;
2436
2437         buf = kzalloc(64, GFP_KERNEL);
2438         if (!buf)
2439                 return;
2440         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2441                 goto out;
2442         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2443                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2444         if (rc != 0)
2445                 goto out;
2446
2447 #define IOACCEL_STATUS_BYTE 4
2448 #define OFFLOAD_CONFIGURED_BIT 0x01
2449 #define OFFLOAD_ENABLED_BIT 0x02
2450         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2451         this_device->offload_config =
2452                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2453         if (this_device->offload_config) {
2454                 this_device->offload_enabled =
2455                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2456                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2457                         this_device->offload_enabled = 0;
2458         }
2459 out:
2460         kfree(buf);
2461         return;
2462 }
2463
2464 /* Get the device id from inquiry page 0x83 */
2465 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2466         unsigned char *device_id, int buflen)
2467 {
2468         int rc;
2469         unsigned char *buf;
2470
2471         if (buflen > 16)
2472                 buflen = 16;
2473         buf = kzalloc(64, GFP_KERNEL);
2474         if (!buf)
2475                 return -ENOMEM;
2476         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2477         if (rc == 0)
2478                 memcpy(device_id, &buf[8], buflen);
2479         kfree(buf);
2480         return rc != 0;
2481 }
2482
2483 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2484                 void *buf, int bufsize,
2485                 int extended_response)
2486 {
2487         int rc = IO_OK;
2488         struct CommandList *c;
2489         unsigned char scsi3addr[8];
2490         struct ErrorInfo *ei;
2491
2492         c = cmd_alloc(h);
2493         if (c == NULL) {                        /* trouble... */
2494                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2495                 return -1;
2496         }
2497         /* address the controller */
2498         memset(scsi3addr, 0, sizeof(scsi3addr));
2499         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2500                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2501                 rc = -1;
2502                 goto out;
2503         }
2504         if (extended_response)
2505                 c->Request.CDB[1] = extended_response;
2506         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2507         ei = c->err_info;
2508         if (ei->CommandStatus != 0 &&
2509             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2510                 hpsa_scsi_interpret_error(h, c);
2511                 rc = -1;
2512         } else {
2513                 struct ReportLUNdata *rld = buf;
2514
2515                 if (rld->extended_response_flag != extended_response) {
2516                         dev_err(&h->pdev->dev,
2517                                 "report luns requested format %u, got %u\n",
2518                                 extended_response,
2519                                 rld->extended_response_flag);
2520                         rc = -1;
2521                 }
2522         }
2523 out:
2524         cmd_free(h, c);
2525         return rc;
2526 }
2527
2528 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2529                 struct ReportExtendedLUNdata *buf, int bufsize)
2530 {
2531         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
2532                                                 HPSA_REPORT_PHYS_EXTENDED);
2533 }
2534
2535 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2536                 struct ReportLUNdata *buf, int bufsize)
2537 {
2538         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2539 }
2540
2541 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2542         int bus, int target, int lun)
2543 {
2544         device->bus = bus;
2545         device->target = target;
2546         device->lun = lun;
2547 }
2548
2549 /* Use VPD inquiry to get details of volume status */
2550 static int hpsa_get_volume_status(struct ctlr_info *h,
2551                                         unsigned char scsi3addr[])
2552 {
2553         int rc;
2554         int status;
2555         int size;
2556         unsigned char *buf;
2557
2558         buf = kzalloc(64, GFP_KERNEL);
2559         if (!buf)
2560                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2561
2562         /* Does controller have VPD for logical volume status? */
2563         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2564                 goto exit_failed;
2565
2566         /* Get the size of the VPD return buffer */
2567         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2568                                         buf, HPSA_VPD_HEADER_SZ);
2569         if (rc != 0)
2570                 goto exit_failed;
2571         size = buf[3];
2572
2573         /* Now get the whole VPD buffer */
2574         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2575                                         buf, size + HPSA_VPD_HEADER_SZ);
2576         if (rc != 0)
2577                 goto exit_failed;
2578         status = buf[4]; /* status byte */
2579
2580         kfree(buf);
2581         return status;
2582 exit_failed:
2583         kfree(buf);
2584         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2585 }
2586
2587 /* Determine offline status of a volume.
2588  * Return either:
2589  *  0 (not offline)
2590  *  0xff (offline for unknown reasons)
2591  *  # (integer code indicating one of several NOT READY states
2592  *     describing why a volume is to be kept offline)
2593  */
2594 static int hpsa_volume_offline(struct ctlr_info *h,
2595                                         unsigned char scsi3addr[])
2596 {
2597         struct CommandList *c;
2598         unsigned char *sense, sense_key, asc, ascq;
2599         int ldstat = 0;
2600         u16 cmd_status;
2601         u8 scsi_status;
2602 #define ASC_LUN_NOT_READY 0x04
2603 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2604 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2605
2606         c = cmd_alloc(h);
2607         if (!c)
2608                 return 0;
2609         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2610         hpsa_scsi_do_simple_cmd_core(h, c);
2611         sense = c->err_info->SenseInfo;
2612         sense_key = sense[2];
2613         asc = sense[12];
2614         ascq = sense[13];
2615         cmd_status = c->err_info->CommandStatus;
2616         scsi_status = c->err_info->ScsiStatus;
2617         cmd_free(h, c);
2618         /* Is the volume 'not ready'? */
2619         if (cmd_status != CMD_TARGET_STATUS ||
2620                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2621                 sense_key != NOT_READY ||
2622                 asc != ASC_LUN_NOT_READY)  {
2623                 return 0;
2624         }
2625
2626         /* Determine the reason for not ready state */
2627         ldstat = hpsa_get_volume_status(h, scsi3addr);
2628
2629         /* Keep volume offline in certain cases: */
2630         switch (ldstat) {
2631         case HPSA_LV_UNDERGOING_ERASE:
2632         case HPSA_LV_UNDERGOING_RPI:
2633         case HPSA_LV_PENDING_RPI:
2634         case HPSA_LV_ENCRYPTED_NO_KEY:
2635         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2636         case HPSA_LV_UNDERGOING_ENCRYPTION:
2637         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2638         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2639                 return ldstat;
2640         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2641                 /* If VPD status page isn't available,
2642                  * use ASC/ASCQ to determine state
2643                  */
2644                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2645                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2646                         return ldstat;
2647                 break;
2648         default:
2649                 break;
2650         }
2651         return 0;
2652 }
2653
2654 static int hpsa_update_device_info(struct ctlr_info *h,
2655         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2656         unsigned char *is_OBDR_device)
2657 {
2658
2659 #define OBDR_SIG_OFFSET 43
2660 #define OBDR_TAPE_SIG "$DR-10"
2661 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2662 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2663
2664         unsigned char *inq_buff;
2665         unsigned char *obdr_sig;
2666
2667         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2668         if (!inq_buff)
2669                 goto bail_out;
2670
2671         /* Do an inquiry to the device to see what it is. */
2672         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2673                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2674                 /* Inquiry failed (msg printed already) */
2675                 dev_err(&h->pdev->dev,
2676                         "hpsa_update_device_info: inquiry failed\n");
2677                 goto bail_out;
2678         }
2679
2680         this_device->devtype = (inq_buff[0] & 0x1f);
2681         memcpy(this_device->scsi3addr, scsi3addr, 8);
2682         memcpy(this_device->vendor, &inq_buff[8],
2683                 sizeof(this_device->vendor));
2684         memcpy(this_device->model, &inq_buff[16],
2685                 sizeof(this_device->model));
2686         memset(this_device->device_id, 0,
2687                 sizeof(this_device->device_id));
2688         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2689                 sizeof(this_device->device_id));
2690
2691         if (this_device->devtype == TYPE_DISK &&
2692                 is_logical_dev_addr_mode(scsi3addr)) {
2693                 int volume_offline;
2694
2695                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2696                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2697                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2698                 volume_offline = hpsa_volume_offline(h, scsi3addr);
2699                 if (volume_offline < 0 || volume_offline > 0xff)
2700                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
2701                 this_device->volume_offline = volume_offline & 0xff;
2702         } else {
2703                 this_device->raid_level = RAID_UNKNOWN;
2704                 this_device->offload_config = 0;
2705                 this_device->offload_enabled = 0;
2706                 this_device->volume_offline = 0;
2707                 this_device->queue_depth = h->nr_cmds;
2708         }
2709
2710         if (is_OBDR_device) {
2711                 /* See if this is a One-Button-Disaster-Recovery device
2712                  * by looking for "$DR-10" at offset 43 in inquiry data.
2713                  */
2714                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
2715                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
2716                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
2717                                                 OBDR_SIG_LEN) == 0);
2718         }
2719
2720         kfree(inq_buff);
2721         return 0;
2722
2723 bail_out:
2724         kfree(inq_buff);
2725         return 1;
2726 }
2727
2728 static unsigned char *ext_target_model[] = {
2729         "MSA2012",
2730         "MSA2024",
2731         "MSA2312",
2732         "MSA2324",
2733         "P2000 G3 SAS",
2734         "MSA 2040 SAS",
2735         NULL,
2736 };
2737
2738 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
2739 {
2740         int i;
2741
2742         for (i = 0; ext_target_model[i]; i++)
2743                 if (strncmp(device->model, ext_target_model[i],
2744                         strlen(ext_target_model[i])) == 0)
2745                         return 1;
2746         return 0;
2747 }
2748
2749 /* Helper function to assign bus, target, lun mapping of devices.
2750  * Puts non-external target logical volumes on bus 0, external target logical
2751  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
2752  * Logical drive target and lun are assigned at this time, but
2753  * physical device lun and target assignment are deferred (assigned
2754  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
2755  */
2756 static void figure_bus_target_lun(struct ctlr_info *h,
2757         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
2758 {
2759         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
2760
2761         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
2762                 /* physical device, target and lun filled in later */
2763                 if (is_hba_lunid(lunaddrbytes))
2764                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
2765                 else
2766                         /* defer target, lun assignment for physical devices */
2767                         hpsa_set_bus_target_lun(device, 2, -1, -1);
2768                 return;
2769         }
2770         /* It's a logical device */
2771         if (is_ext_target(h, device)) {
2772                 /* external target way, put logicals on bus 1
2773                  * and match target/lun numbers box
2774                  * reports, other smart array, bus 0, target 0, match lunid
2775                  */
2776                 hpsa_set_bus_target_lun(device,
2777                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
2778                 return;
2779         }
2780         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
2781 }
2782
2783 /*
2784  * If there is no lun 0 on a target, linux won't find any devices.
2785  * For the external targets (arrays), we have to manually detect the enclosure
2786  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
2787  * it for some reason.  *tmpdevice is the target we're adding,
2788  * this_device is a pointer into the current element of currentsd[]
2789  * that we're building up in update_scsi_devices(), below.
2790  * lunzerobits is a bitmap that tracks which targets already have a
2791  * lun 0 assigned.
2792  * Returns 1 if an enclosure was added, 0 if not.
2793  */
2794 static int add_ext_target_dev(struct ctlr_info *h,
2795         struct hpsa_scsi_dev_t *tmpdevice,
2796         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
2797         unsigned long lunzerobits[], int *n_ext_target_devs)
2798 {
2799         unsigned char scsi3addr[8];
2800
2801         if (test_bit(tmpdevice->target, lunzerobits))
2802                 return 0; /* There is already a lun 0 on this target. */
2803
2804         if (!is_logical_dev_addr_mode(lunaddrbytes))
2805                 return 0; /* It's the logical targets that may lack lun 0. */
2806
2807         if (!is_ext_target(h, tmpdevice))
2808                 return 0; /* Only external target devices have this problem. */
2809
2810         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
2811                 return 0;
2812
2813         memset(scsi3addr, 0, 8);
2814         scsi3addr[3] = tmpdevice->target;
2815         if (is_hba_lunid(scsi3addr))
2816                 return 0; /* Don't add the RAID controller here. */
2817
2818         if (is_scsi_rev_5(h))
2819                 return 0; /* p1210m doesn't need to do this. */
2820
2821         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
2822                 dev_warn(&h->pdev->dev, "Maximum number of external "
2823                         "target devices exceeded.  Check your hardware "
2824                         "configuration.");
2825                 return 0;
2826         }
2827
2828         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
2829                 return 0;
2830         (*n_ext_target_devs)++;
2831         hpsa_set_bus_target_lun(this_device,
2832                                 tmpdevice->bus, tmpdevice->target, 0);
2833         set_bit(tmpdevice->target, lunzerobits);
2834         return 1;
2835 }
2836
2837 /*
2838  * Get address of physical disk used for an ioaccel2 mode command:
2839  *      1. Extract ioaccel2 handle from the command.
2840  *      2. Find a matching ioaccel2 handle from list of physical disks.
2841  *      3. Return:
2842  *              1 and set scsi3addr to address of matching physical
2843  *              0 if no matching physical disk was found.
2844  */
2845 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
2846         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
2847 {
2848         struct ReportExtendedLUNdata *physicals = NULL;
2849         int responsesize = 24;  /* size of physical extended response */
2850         int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize;
2851         u32 nphysicals = 0;     /* number of reported physical devs */
2852         int found = 0;          /* found match (1) or not (0) */
2853         u32 find;               /* handle we need to match */
2854         int i;
2855         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
2856         struct hpsa_scsi_dev_t *d; /* device of request being aborted */
2857         struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */
2858         __le32 it_nexus;        /* 4 byte device handle for the ioaccel2 cmd */
2859         __le32 scsi_nexus;      /* 4 byte device handle for the ioaccel2 cmd */
2860
2861         if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2)
2862                 return 0; /* no match */
2863
2864         /* point to the ioaccel2 device handle */
2865         c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
2866         if (c2a == NULL)
2867                 return 0; /* no match */
2868
2869         scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd;
2870         if (scmd == NULL)
2871                 return 0; /* no match */
2872
2873         d = scmd->device->hostdata;
2874         if (d == NULL)
2875                 return 0; /* no match */
2876
2877         it_nexus = cpu_to_le32(d->ioaccel_handle);
2878         scsi_nexus = c2a->scsi_nexus;
2879         find = le32_to_cpu(c2a->scsi_nexus);
2880
2881         if (h->raid_offload_debug > 0)
2882                 dev_info(&h->pdev->dev,
2883                         "%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
2884                         __func__, scsi_nexus,
2885                         d->device_id[0], d->device_id[1], d->device_id[2],
2886                         d->device_id[3], d->device_id[4], d->device_id[5],
2887                         d->device_id[6], d->device_id[7], d->device_id[8],
2888                         d->device_id[9], d->device_id[10], d->device_id[11],
2889                         d->device_id[12], d->device_id[13], d->device_id[14],
2890                         d->device_id[15]);
2891
2892         /* Get the list of physical devices */
2893         physicals = kzalloc(reportsize, GFP_KERNEL);
2894         if (physicals == NULL)
2895                 return 0;
2896         if (hpsa_scsi_do_report_phys_luns(h, physicals, reportsize)) {
2897                 dev_err(&h->pdev->dev,
2898                         "Can't lookup %s device handle: report physical LUNs failed.\n",
2899                         "HP SSD Smart Path");
2900                 kfree(physicals);
2901                 return 0;
2902         }
2903         nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) /
2904                                                         responsesize;
2905
2906         /* find ioaccel2 handle in list of physicals: */
2907         for (i = 0; i < nphysicals; i++) {
2908                 struct ext_report_lun_entry *entry = &physicals->LUN[i];
2909
2910                 /* handle is in bytes 28-31 of each lun */
2911                 if (entry->ioaccel_handle != find)
2912                         continue; /* didn't match */
2913                 found = 1;
2914                 memcpy(scsi3addr, entry->lunid, 8);
2915                 if (h->raid_offload_debug > 0)
2916                         dev_info(&h->pdev->dev,
2917                                 "%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n",
2918                                 __func__, find,
2919                                 entry->ioaccel_handle, scsi3addr);
2920                 break; /* found it */
2921         }
2922
2923         kfree(physicals);
2924         if (found)
2925                 return 1;
2926         else
2927                 return 0;
2928
2929 }
2930 /*
2931  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
2932  * logdev.  The number of luns in physdev and logdev are returned in
2933  * *nphysicals and *nlogicals, respectively.
2934  * Returns 0 on success, -1 otherwise.
2935  */
2936 static int hpsa_gather_lun_info(struct ctlr_info *h,
2937         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
2938         struct ReportLUNdata *logdev, u32 *nlogicals)
2939 {
2940         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
2941                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
2942                 return -1;
2943         }
2944         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
2945         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
2946                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
2947                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
2948                 *nphysicals = HPSA_MAX_PHYS_LUN;
2949         }
2950         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
2951                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
2952                 return -1;
2953         }
2954         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
2955         /* Reject Logicals in excess of our max capability. */
2956         if (*nlogicals > HPSA_MAX_LUN) {
2957                 dev_warn(&h->pdev->dev,
2958                         "maximum logical LUNs (%d) exceeded.  "
2959                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
2960                         *nlogicals - HPSA_MAX_LUN);
2961                         *nlogicals = HPSA_MAX_LUN;
2962         }
2963         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
2964                 dev_warn(&h->pdev->dev,
2965                         "maximum logical + physical LUNs (%d) exceeded. "
2966                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2967                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
2968                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
2969         }
2970         return 0;
2971 }
2972
2973 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
2974         int i, int nphysicals, int nlogicals,
2975         struct ReportExtendedLUNdata *physdev_list,
2976         struct ReportLUNdata *logdev_list)
2977 {
2978         /* Helper function, figure out where the LUN ID info is coming from
2979          * given index i, lists of physical and logical devices, where in
2980          * the list the raid controller is supposed to appear (first or last)
2981          */
2982
2983         int logicals_start = nphysicals + (raid_ctlr_position == 0);
2984         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
2985
2986         if (i == raid_ctlr_position)
2987                 return RAID_CTLR_LUNID;
2988
2989         if (i < logicals_start)
2990                 return &physdev_list->LUN[i -
2991                                 (raid_ctlr_position == 0)].lunid[0];
2992
2993         if (i < last_device)
2994                 return &logdev_list->LUN[i - nphysicals -
2995                         (raid_ctlr_position == 0)][0];
2996         BUG();
2997         return NULL;
2998 }
2999
3000 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
3001 {
3002         int rc;
3003         int hba_mode_enabled;
3004         struct bmic_controller_parameters *ctlr_params;
3005         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
3006                 GFP_KERNEL);
3007
3008         if (!ctlr_params)
3009                 return -ENOMEM;
3010         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
3011                 sizeof(struct bmic_controller_parameters));
3012         if (rc) {
3013                 kfree(ctlr_params);
3014                 return rc;
3015         }
3016
3017         hba_mode_enabled =
3018                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
3019         kfree(ctlr_params);
3020         return hba_mode_enabled;
3021 }
3022
3023 /* get physical drive ioaccel handle and queue depth */
3024 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3025                 struct hpsa_scsi_dev_t *dev,
3026                 u8 *lunaddrbytes,
3027                 struct bmic_identify_physical_device *id_phys)
3028 {
3029         int rc;
3030         struct ext_report_lun_entry *rle =
3031                 (struct ext_report_lun_entry *) lunaddrbytes;
3032
3033         dev->ioaccel_handle = rle->ioaccel_handle;
3034         memset(id_phys, 0, sizeof(*id_phys));
3035         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3036                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3037                         sizeof(*id_phys));
3038         if (!rc)
3039                 /* Reserve space for FW operations */
3040 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3041 #define DRIVE_QUEUE_DEPTH 7
3042                 dev->queue_depth =
3043                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3044                                 DRIVE_CMDS_RESERVED_FOR_FW;
3045         else
3046                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3047         atomic_set(&dev->ioaccel_cmds_out, 0);
3048 }
3049
3050 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
3051 {
3052         /* the idea here is we could get notified
3053          * that some devices have changed, so we do a report
3054          * physical luns and report logical luns cmd, and adjust
3055          * our list of devices accordingly.
3056          *
3057          * The scsi3addr's of devices won't change so long as the
3058          * adapter is not reset.  That means we can rescan and
3059          * tell which devices we already know about, vs. new
3060          * devices, vs.  disappearing devices.
3061          */
3062         struct ReportExtendedLUNdata *physdev_list = NULL;
3063         struct ReportLUNdata *logdev_list = NULL;
3064         struct bmic_identify_physical_device *id_phys = NULL;
3065         u32 nphysicals = 0;
3066         u32 nlogicals = 0;
3067         u32 ndev_allocated = 0;
3068         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3069         int ncurrent = 0;
3070         int i, n_ext_target_devs, ndevs_to_allocate;
3071         int raid_ctlr_position;
3072         int rescan_hba_mode;
3073         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3074
3075         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3076         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3077         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3078         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3079         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3080
3081         if (!currentsd || !physdev_list || !logdev_list ||
3082                 !tmpdevice || !id_phys) {
3083                 dev_err(&h->pdev->dev, "out of memory\n");
3084                 goto out;
3085         }
3086         memset(lunzerobits, 0, sizeof(lunzerobits));
3087
3088         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3089         if (rescan_hba_mode < 0)
3090                 goto out;
3091
3092         if (!h->hba_mode_enabled && rescan_hba_mode)
3093                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3094         else if (h->hba_mode_enabled && !rescan_hba_mode)
3095                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3096
3097         h->hba_mode_enabled = rescan_hba_mode;
3098
3099         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3100                         logdev_list, &nlogicals))
3101                 goto out;
3102
3103         /* We might see up to the maximum number of logical and physical disks
3104          * plus external target devices, and a device for the local RAID
3105          * controller.
3106          */
3107         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3108
3109         /* Allocate the per device structures */
3110         for (i = 0; i < ndevs_to_allocate; i++) {
3111                 if (i >= HPSA_MAX_DEVICES) {
3112                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3113                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3114                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3115                         break;
3116                 }
3117
3118                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3119                 if (!currentsd[i]) {
3120                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3121                                 __FILE__, __LINE__);
3122                         goto out;
3123                 }
3124                 ndev_allocated++;
3125         }
3126
3127         if (is_scsi_rev_5(h))
3128                 raid_ctlr_position = 0;
3129         else
3130                 raid_ctlr_position = nphysicals + nlogicals;
3131
3132         /* adjust our table of devices */
3133         n_ext_target_devs = 0;
3134         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3135                 u8 *lunaddrbytes, is_OBDR = 0;
3136
3137                 /* Figure out where the LUN ID info is coming from */
3138                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3139                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3140                 /* skip masked physical devices. */
3141                 if (lunaddrbytes[3] & 0xC0 &&
3142                         i < nphysicals + (raid_ctlr_position == 0))
3143                         continue;
3144
3145                 /* Get device type, vendor, model, device id */
3146                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3147                                                         &is_OBDR))
3148                         continue; /* skip it if we can't talk to it. */
3149                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3150                 this_device = currentsd[ncurrent];
3151
3152                 /*
3153                  * For external target devices, we have to insert a LUN 0 which
3154                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3155                  * is nonetheless an enclosure device there.  We have to
3156                  * present that otherwise linux won't find anything if
3157                  * there is no lun 0.
3158                  */
3159                 if (add_ext_target_dev(h, tmpdevice, this_device,
3160                                 lunaddrbytes, lunzerobits,
3161                                 &n_ext_target_devs)) {
3162                         ncurrent++;
3163                         this_device = currentsd[ncurrent];
3164                 }
3165
3166                 *this_device = *tmpdevice;
3167
3168                 switch (this_device->devtype) {
3169                 case TYPE_ROM:
3170                         /* We don't *really* support actual CD-ROM devices,
3171                          * just "One Button Disaster Recovery" tape drive
3172                          * which temporarily pretends to be a CD-ROM drive.
3173                          * So we check that the device is really an OBDR tape
3174                          * device by checking for "$DR-10" in bytes 43-48 of
3175                          * the inquiry data.
3176                          */
3177                         if (is_OBDR)
3178                                 ncurrent++;
3179                         break;
3180                 case TYPE_DISK:
3181                         if (h->hba_mode_enabled) {
3182                                 /* never use raid mapper in HBA mode */
3183                                 this_device->offload_enabled = 0;
3184                                 ncurrent++;
3185                                 break;
3186                         } else if (h->acciopath_status) {
3187                                 if (i >= nphysicals) {
3188                                         ncurrent++;
3189                                         break;
3190                                 }
3191                         } else {
3192                                 if (i < nphysicals)
3193                                         break;
3194                                 ncurrent++;
3195                                 break;
3196                         }
3197                         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
3198                                 h->transMethod & CFGTBL_Trans_io_accel2) {
3199                                 hpsa_get_ioaccel_drive_info(h, this_device,
3200                                                         lunaddrbytes, id_phys);
3201                                 atomic_set(&this_device->ioaccel_cmds_out, 0);
3202                                 ncurrent++;
3203                         }
3204                         break;
3205                 case TYPE_TAPE:
3206                 case TYPE_MEDIUM_CHANGER:
3207                         ncurrent++;
3208                         break;
3209                 case TYPE_RAID:
3210                         /* Only present the Smartarray HBA as a RAID controller.
3211                          * If it's a RAID controller other than the HBA itself
3212                          * (an external RAID controller, MSA500 or similar)
3213                          * don't present it.
3214                          */
3215                         if (!is_hba_lunid(lunaddrbytes))
3216                                 break;
3217                         ncurrent++;
3218                         break;
3219                 default:
3220                         break;
3221                 }
3222                 if (ncurrent >= HPSA_MAX_DEVICES)
3223                         break;
3224         }
3225         hpsa_update_log_drive_phys_drive_ptrs(h, currentsd, ncurrent);
3226         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3227 out:
3228         kfree(tmpdevice);
3229         for (i = 0; i < ndev_allocated; i++)
3230                 kfree(currentsd[i]);
3231         kfree(currentsd);
3232         kfree(physdev_list);
3233         kfree(logdev_list);
3234         kfree(id_phys);
3235 }
3236
3237 /*
3238  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3239  * dma mapping  and fills in the scatter gather entries of the
3240  * hpsa command, cp.
3241  */
3242 static int hpsa_scatter_gather(struct ctlr_info *h,
3243                 struct CommandList *cp,
3244                 struct scsi_cmnd *cmd)
3245 {
3246         unsigned int len;
3247         struct scatterlist *sg;
3248         u64 addr64;
3249         int use_sg, i, sg_index, chained;
3250         struct SGDescriptor *curr_sg;
3251
3252         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3253
3254         use_sg = scsi_dma_map(cmd);
3255         if (use_sg < 0)
3256                 return use_sg;
3257
3258         if (!use_sg)
3259                 goto sglist_finished;
3260
3261         curr_sg = cp->SG;
3262         chained = 0;
3263         sg_index = 0;
3264         scsi_for_each_sg(cmd, sg, use_sg, i) {
3265                 if (i == h->max_cmd_sg_entries - 1 &&
3266                         use_sg > h->max_cmd_sg_entries) {
3267                         chained = 1;
3268                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3269                         sg_index = 0;
3270                 }
3271                 addr64 = (u64) sg_dma_address(sg);
3272                 len  = sg_dma_len(sg);
3273                 curr_sg->Addr = cpu_to_le64(addr64);
3274                 curr_sg->Len = cpu_to_le32(len);
3275                 curr_sg->Ext = cpu_to_le32(0);
3276                 curr_sg++;
3277         }
3278         (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3279
3280         if (use_sg + chained > h->maxSG)
3281                 h->maxSG = use_sg + chained;
3282
3283         if (chained) {
3284                 cp->Header.SGList = h->max_cmd_sg_entries;
3285                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3286                 if (hpsa_map_sg_chain_block(h, cp)) {
3287                         scsi_dma_unmap(cmd);
3288                         return -1;
3289                 }
3290                 return 0;
3291         }
3292
3293 sglist_finished:
3294
3295         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3296         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3297         return 0;
3298 }
3299
3300 #define IO_ACCEL_INELIGIBLE (1)
3301 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3302 {
3303         int is_write = 0;
3304         u32 block;
3305         u32 block_cnt;
3306
3307         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3308         switch (cdb[0]) {
3309         case WRITE_6:
3310         case WRITE_12:
3311                 is_write = 1;
3312         case READ_6:
3313         case READ_12:
3314                 if (*cdb_len == 6) {
3315                         block = (((u32) cdb[2]) << 8) | cdb[3];
3316                         block_cnt = cdb[4];
3317                 } else {
3318                         BUG_ON(*cdb_len != 12);
3319                         block = (((u32) cdb[2]) << 24) |
3320                                 (((u32) cdb[3]) << 16) |
3321                                 (((u32) cdb[4]) << 8) |
3322                                 cdb[5];
3323                         block_cnt =
3324                                 (((u32) cdb[6]) << 24) |
3325                                 (((u32) cdb[7]) << 16) |
3326                                 (((u32) cdb[8]) << 8) |
3327                                 cdb[9];
3328                 }
3329                 if (block_cnt > 0xffff)
3330                         return IO_ACCEL_INELIGIBLE;
3331
3332                 cdb[0] = is_write ? WRITE_10 : READ_10;
3333                 cdb[1] = 0;
3334                 cdb[2] = (u8) (block >> 24);
3335                 cdb[3] = (u8) (block >> 16);
3336                 cdb[4] = (u8) (block >> 8);
3337                 cdb[5] = (u8) (block);
3338                 cdb[6] = 0;
3339                 cdb[7] = (u8) (block_cnt >> 8);
3340                 cdb[8] = (u8) (block_cnt);
3341                 cdb[9] = 0;
3342                 *cdb_len = 10;
3343                 break;
3344         }
3345         return 0;
3346 }
3347
3348 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3349         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3350         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3351 {
3352         struct scsi_cmnd *cmd = c->scsi_cmd;
3353         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3354         unsigned int len;
3355         unsigned int total_len = 0;
3356         struct scatterlist *sg;
3357         u64 addr64;
3358         int use_sg, i;
3359         struct SGDescriptor *curr_sg;
3360         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3361
3362         /* TODO: implement chaining support */
3363         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3364                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3365                 return IO_ACCEL_INELIGIBLE;
3366         }
3367
3368         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3369
3370         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3371                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3372                 return IO_ACCEL_INELIGIBLE;
3373         }
3374
3375         c->cmd_type = CMD_IOACCEL1;
3376
3377         /* Adjust the DMA address to point to the accelerated command buffer */
3378         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3379                                 (c->cmdindex * sizeof(*cp));
3380         BUG_ON(c->busaddr & 0x0000007F);
3381
3382         use_sg = scsi_dma_map(cmd);
3383         if (use_sg < 0) {
3384                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3385                 return use_sg;
3386         }
3387
3388         if (use_sg) {
3389                 curr_sg = cp->SG;
3390                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3391                         addr64 = (u64) sg_dma_address(sg);
3392                         len  = sg_dma_len(sg);
3393                         total_len += len;
3394                         curr_sg->Addr = cpu_to_le64(addr64);
3395                         curr_sg->Len = cpu_to_le32(len);
3396                         curr_sg->Ext = cpu_to_le32(0);
3397                         curr_sg++;
3398                 }
3399                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3400
3401                 switch (cmd->sc_data_direction) {
3402                 case DMA_TO_DEVICE:
3403                         control |= IOACCEL1_CONTROL_DATA_OUT;
3404                         break;
3405                 case DMA_FROM_DEVICE:
3406                         control |= IOACCEL1_CONTROL_DATA_IN;
3407                         break;
3408                 case DMA_NONE:
3409                         control |= IOACCEL1_CONTROL_NODATAXFER;
3410                         break;
3411                 default:
3412                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3413                         cmd->sc_data_direction);
3414                         BUG();
3415                         break;
3416                 }
3417         } else {
3418                 control |= IOACCEL1_CONTROL_NODATAXFER;
3419         }
3420
3421         c->Header.SGList = use_sg;
3422         /* Fill out the command structure to submit */
3423         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
3424         cp->transfer_len = cpu_to_le32(total_len);
3425         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
3426                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
3427         cp->control = cpu_to_le32(control);
3428         memcpy(cp->CDB, cdb, cdb_len);
3429         memcpy(cp->CISS_LUN, scsi3addr, 8);
3430         /* Tag was already set at init time. */
3431         enqueue_cmd_and_start_io(h, c);
3432         return 0;
3433 }
3434
3435 /*
3436  * Queue a command directly to a device behind the controller using the
3437  * I/O accelerator path.
3438  */
3439 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3440         struct CommandList *c)
3441 {
3442         struct scsi_cmnd *cmd = c->scsi_cmd;
3443         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3444
3445         c->phys_disk = dev;
3446
3447         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3448                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
3449 }
3450
3451 /*
3452  * Set encryption parameters for the ioaccel2 request
3453  */
3454 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3455         struct CommandList *c, struct io_accel2_cmd *cp)
3456 {
3457         struct scsi_cmnd *cmd = c->scsi_cmd;
3458         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3459         struct raid_map_data *map = &dev->raid_map;
3460         u64 first_block;
3461
3462         /* Are we doing encryption on this device */
3463         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3464                 return;
3465         /* Set the data encryption key index. */
3466         cp->dekindex = map->dekindex;
3467
3468         /* Set the encryption enable flag, encoded into direction field. */
3469         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3470
3471         /* Set encryption tweak values based on logical block address
3472          * If block size is 512, tweak value is LBA.
3473          * For other block sizes, tweak is (LBA * block size)/ 512)
3474          */
3475         switch (cmd->cmnd[0]) {
3476         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3477         case WRITE_6:
3478         case READ_6:
3479                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
3480                 break;
3481         case WRITE_10:
3482         case READ_10:
3483         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3484         case WRITE_12:
3485         case READ_12:
3486                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
3487                 break;
3488         case WRITE_16:
3489         case READ_16:
3490                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
3491                 break;
3492         default:
3493                 dev_err(&h->pdev->dev,
3494                         "ERROR: %s: size (0x%x) not supported for encryption\n",
3495                         __func__, cmd->cmnd[0]);
3496                 BUG();
3497                 break;
3498         }
3499
3500         if (le32_to_cpu(map->volume_blk_size) != 512)
3501                 first_block = first_block *
3502                                 le32_to_cpu(map->volume_blk_size)/512;
3503
3504         cp->tweak_lower = cpu_to_le32(first_block);
3505         cp->tweak_upper = cpu_to_le32(first_block >> 32);
3506 }
3507
3508 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3509         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3510         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3511 {
3512         struct scsi_cmnd *cmd = c->scsi_cmd;
3513         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3514         struct ioaccel2_sg_element *curr_sg;
3515         int use_sg, i;
3516         struct scatterlist *sg;
3517         u64 addr64;
3518         u32 len;
3519         u32 total_len = 0;
3520
3521         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3522                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3523                 return IO_ACCEL_INELIGIBLE;
3524         }
3525
3526         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3527                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3528                 return IO_ACCEL_INELIGIBLE;
3529         }
3530
3531         c->cmd_type = CMD_IOACCEL2;
3532         /* Adjust the DMA address to point to the accelerated command buffer */
3533         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3534                                 (c->cmdindex * sizeof(*cp));
3535         BUG_ON(c->busaddr & 0x0000007F);
3536
3537         memset(cp, 0, sizeof(*cp));
3538         cp->IU_type = IOACCEL2_IU_TYPE;
3539
3540         use_sg = scsi_dma_map(cmd);
3541         if (use_sg < 0) {
3542                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3543                 return use_sg;
3544         }
3545
3546         if (use_sg) {
3547                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3548                 curr_sg = cp->sg;
3549                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3550                         addr64 = (u64) sg_dma_address(sg);
3551                         len  = sg_dma_len(sg);
3552                         total_len += len;
3553                         curr_sg->address = cpu_to_le64(addr64);
3554                         curr_sg->length = cpu_to_le32(len);
3555                         curr_sg->reserved[0] = 0;
3556                         curr_sg->reserved[1] = 0;
3557                         curr_sg->reserved[2] = 0;
3558                         curr_sg->chain_indicator = 0;
3559                         curr_sg++;
3560                 }
3561
3562                 switch (cmd->sc_data_direction) {
3563                 case DMA_TO_DEVICE:
3564                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3565                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3566                         break;
3567                 case DMA_FROM_DEVICE:
3568                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3569                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3570                         break;
3571                 case DMA_NONE:
3572                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3573                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3574                         break;
3575                 default:
3576                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3577                                 cmd->sc_data_direction);
3578                         BUG();
3579                         break;
3580                 }
3581         } else {
3582                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3583                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3584         }
3585
3586         /* Set encryption parameters, if necessary */
3587         set_encrypt_ioaccel2(h, c, cp);
3588
3589         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
3590         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
3591         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3592
3593         /* fill in sg elements */
3594         cp->sg_count = (u8) use_sg;
3595
3596         cp->data_len = cpu_to_le32(total_len);
3597         cp->err_ptr = cpu_to_le64(c->busaddr +
3598                         offsetof(struct io_accel2_cmd, error_data));
3599         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3600
3601         enqueue_cmd_and_start_io(h, c);
3602         return 0;
3603 }
3604
3605 /*
3606  * Queue a command to the correct I/O accelerator path.
3607  */
3608 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3609         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3610         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3611 {
3612         /* Try to honor the device's queue depth */
3613         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
3614                                         phys_disk->queue_depth) {
3615                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3616                 return IO_ACCEL_INELIGIBLE;
3617         }
3618         if (h->transMethod & CFGTBL_Trans_io_accel1)
3619                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3620                                                 cdb, cdb_len, scsi3addr,
3621                                                 phys_disk);
3622         else
3623                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3624                                                 cdb, cdb_len, scsi3addr,
3625                                                 phys_disk);
3626 }
3627
3628 static void raid_map_helper(struct raid_map_data *map,
3629                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3630 {
3631         if (offload_to_mirror == 0)  {
3632                 /* use physical disk in the first mirrored group. */
3633                 *map_index %= le16_to_cpu(map->data_disks_per_row);
3634                 return;
3635         }
3636         do {
3637                 /* determine mirror group that *map_index indicates */
3638                 *current_group = *map_index /
3639                         le16_to_cpu(map->data_disks_per_row);
3640                 if (offload_to_mirror == *current_group)
3641                         continue;
3642                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
3643                         /* select map index from next group */
3644                         *map_index += le16_to_cpu(map->data_disks_per_row);
3645                         (*current_group)++;
3646                 } else {
3647                         /* select map index from first group */
3648                         *map_index %= le16_to_cpu(map->data_disks_per_row);
3649                         *current_group = 0;
3650                 }
3651         } while (offload_to_mirror != *current_group);
3652 }
3653
3654 /*
3655  * Attempt to perform offload RAID mapping for a logical volume I/O.
3656  */
3657 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3658         struct CommandList *c)
3659 {
3660         struct scsi_cmnd *cmd = c->scsi_cmd;
3661         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3662         struct raid_map_data *map = &dev->raid_map;
3663         struct raid_map_disk_data *dd = &map->data[0];
3664         int is_write = 0;
3665         u32 map_index;
3666         u64 first_block, last_block;
3667         u32 block_cnt;
3668         u32 blocks_per_row;
3669         u64 first_row, last_row;
3670         u32 first_row_offset, last_row_offset;
3671         u32 first_column, last_column;
3672         u64 r0_first_row, r0_last_row;
3673         u32 r5or6_blocks_per_row;
3674         u64 r5or6_first_row, r5or6_last_row;
3675         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3676         u32 r5or6_first_column, r5or6_last_column;
3677         u32 total_disks_per_row;
3678         u32 stripesize;
3679         u32 first_group, last_group, current_group;
3680         u32 map_row;
3681         u32 disk_handle;
3682         u64 disk_block;
3683         u32 disk_block_cnt;
3684         u8 cdb[16];
3685         u8 cdb_len;
3686         u16 strip_size;
3687 #if BITS_PER_LONG == 32
3688         u64 tmpdiv;
3689 #endif
3690         int offload_to_mirror;
3691
3692         /* check for valid opcode, get LBA and block count */
3693         switch (cmd->cmnd[0]) {
3694         case WRITE_6:
3695                 is_write = 1;
3696         case READ_6:
3697                 first_block =
3698                         (((u64) cmd->cmnd[2]) << 8) |
3699                         cmd->cmnd[3];
3700                 block_cnt = cmd->cmnd[4];
3701                 if (block_cnt == 0)
3702                         block_cnt = 256;
3703                 break;
3704         case WRITE_10:
3705                 is_write = 1;
3706         case READ_10:
3707                 first_block =
3708                         (((u64) cmd->cmnd[2]) << 24) |
3709                         (((u64) cmd->cmnd[3]) << 16) |
3710                         (((u64) cmd->cmnd[4]) << 8) |
3711                         cmd->cmnd[5];
3712                 block_cnt =
3713                         (((u32) cmd->cmnd[7]) << 8) |
3714                         cmd->cmnd[8];
3715                 break;
3716         case WRITE_12:
3717                 is_write = 1;
3718         case READ_12:
3719                 first_block =
3720                         (((u64) cmd->cmnd[2]) << 24) |
3721                         (((u64) cmd->cmnd[3]) << 16) |
3722                         (((u64) cmd->cmnd[4]) << 8) |
3723                         cmd->cmnd[5];
3724                 block_cnt =
3725                         (((u32) cmd->cmnd[6]) << 24) |
3726                         (((u32) cmd->cmnd[7]) << 16) |
3727                         (((u32) cmd->cmnd[8]) << 8) |
3728                 cmd->cmnd[9];
3729                 break;
3730         case WRITE_16:
3731                 is_write = 1;
3732         case READ_16:
3733                 first_block =
3734                         (((u64) cmd->cmnd[2]) << 56) |
3735                         (((u64) cmd->cmnd[3]) << 48) |
3736                         (((u64) cmd->cmnd[4]) << 40) |
3737                         (((u64) cmd->cmnd[5]) << 32) |
3738                         (((u64) cmd->cmnd[6]) << 24) |
3739                         (((u64) cmd->cmnd[7]) << 16) |
3740                         (((u64) cmd->cmnd[8]) << 8) |
3741                         cmd->cmnd[9];
3742                 block_cnt =
3743                         (((u32) cmd->cmnd[10]) << 24) |
3744                         (((u32) cmd->cmnd[11]) << 16) |
3745                         (((u32) cmd->cmnd[12]) << 8) |
3746                         cmd->cmnd[13];
3747                 break;
3748         default:
3749                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
3750         }
3751         last_block = first_block + block_cnt - 1;
3752
3753         /* check for write to non-RAID-0 */
3754         if (is_write && dev->raid_level != 0)
3755                 return IO_ACCEL_INELIGIBLE;
3756
3757         /* check for invalid block or wraparound */
3758         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
3759                 last_block < first_block)
3760                 return IO_ACCEL_INELIGIBLE;
3761
3762         /* calculate stripe information for the request */
3763         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
3764                                 le16_to_cpu(map->strip_size);
3765         strip_size = le16_to_cpu(map->strip_size);
3766 #if BITS_PER_LONG == 32
3767         tmpdiv = first_block;
3768         (void) do_div(tmpdiv, blocks_per_row);
3769         first_row = tmpdiv;
3770         tmpdiv = last_block;
3771         (void) do_div(tmpdiv, blocks_per_row);
3772         last_row = tmpdiv;
3773         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3774         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3775         tmpdiv = first_row_offset;
3776         (void) do_div(tmpdiv, strip_size);
3777         first_column = tmpdiv;
3778         tmpdiv = last_row_offset;
3779         (void) do_div(tmpdiv, strip_size);
3780         last_column = tmpdiv;
3781 #else
3782         first_row = first_block / blocks_per_row;
3783         last_row = last_block / blocks_per_row;
3784         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3785         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3786         first_column = first_row_offset / strip_size;
3787         last_column = last_row_offset / strip_size;
3788 #endif
3789
3790         /* if this isn't a single row/column then give to the controller */
3791         if ((first_row != last_row) || (first_column != last_column))
3792                 return IO_ACCEL_INELIGIBLE;
3793
3794         /* proceeding with driver mapping */
3795         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
3796                                 le16_to_cpu(map->metadata_disks_per_row);
3797         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3798                                 le16_to_cpu(map->row_cnt);
3799         map_index = (map_row * total_disks_per_row) + first_column;
3800
3801         switch (dev->raid_level) {
3802         case HPSA_RAID_0:
3803                 break; /* nothing special to do */
3804         case HPSA_RAID_1:
3805                 /* Handles load balance across RAID 1 members.
3806                  * (2-drive R1 and R10 with even # of drives.)
3807                  * Appropriate for SSDs, not optimal for HDDs
3808                  */
3809                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
3810                 if (dev->offload_to_mirror)
3811                         map_index += le16_to_cpu(map->data_disks_per_row);
3812                 dev->offload_to_mirror = !dev->offload_to_mirror;
3813                 break;
3814         case HPSA_RAID_ADM:
3815                 /* Handles N-way mirrors  (R1-ADM)
3816                  * and R10 with # of drives divisible by 3.)
3817                  */
3818                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
3819
3820                 offload_to_mirror = dev->offload_to_mirror;
3821                 raid_map_helper(map, offload_to_mirror,
3822                                 &map_index, &current_group);
3823                 /* set mirror group to use next time */
3824                 offload_to_mirror =
3825                         (offload_to_mirror >=
3826                         le16_to_cpu(map->layout_map_count) - 1)
3827                         ? 0 : offload_to_mirror + 1;
3828                 dev->offload_to_mirror = offload_to_mirror;
3829                 /* Avoid direct use of dev->offload_to_mirror within this
3830                  * function since multiple threads might simultaneously
3831                  * increment it beyond the range of dev->layout_map_count -1.
3832                  */
3833                 break;
3834         case HPSA_RAID_5:
3835         case HPSA_RAID_6:
3836                 if (le16_to_cpu(map->layout_map_count) <= 1)
3837                         break;
3838
3839                 /* Verify first and last block are in same RAID group */
3840                 r5or6_blocks_per_row =
3841                         le16_to_cpu(map->strip_size) *
3842                         le16_to_cpu(map->data_disks_per_row);
3843                 BUG_ON(r5or6_blocks_per_row == 0);
3844                 stripesize = r5or6_blocks_per_row *
3845                         le16_to_cpu(map->layout_map_count);
3846 #if BITS_PER_LONG == 32
3847                 tmpdiv = first_block;
3848                 first_group = do_div(tmpdiv, stripesize);
3849                 tmpdiv = first_group;
3850                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3851                 first_group = tmpdiv;
3852                 tmpdiv = last_block;
3853                 last_group = do_div(tmpdiv, stripesize);
3854                 tmpdiv = last_group;
3855                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3856                 last_group = tmpdiv;
3857 #else
3858                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
3859                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
3860 #endif
3861                 if (first_group != last_group)
3862                         return IO_ACCEL_INELIGIBLE;
3863
3864                 /* Verify request is in a single row of RAID 5/6 */
3865 #if BITS_PER_LONG == 32
3866                 tmpdiv = first_block;
3867                 (void) do_div(tmpdiv, stripesize);
3868                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
3869                 tmpdiv = last_block;
3870                 (void) do_div(tmpdiv, stripesize);
3871                 r5or6_last_row = r0_last_row = tmpdiv;
3872 #else
3873                 first_row = r5or6_first_row = r0_first_row =
3874                                                 first_block / stripesize;
3875                 r5or6_last_row = r0_last_row = last_block / stripesize;
3876 #endif
3877                 if (r5or6_first_row != r5or6_last_row)
3878                         return IO_ACCEL_INELIGIBLE;
3879
3880
3881                 /* Verify request is in a single column */
3882 #if BITS_PER_LONG == 32
3883                 tmpdiv = first_block;
3884                 first_row_offset = do_div(tmpdiv, stripesize);
3885                 tmpdiv = first_row_offset;
3886                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
3887                 r5or6_first_row_offset = first_row_offset;
3888                 tmpdiv = last_block;
3889                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
3890                 tmpdiv = r5or6_last_row_offset;
3891                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
3892                 tmpdiv = r5or6_first_row_offset;
3893                 (void) do_div(tmpdiv, map->strip_size);
3894                 first_column = r5or6_first_column = tmpdiv;
3895                 tmpdiv = r5or6_last_row_offset;
3896                 (void) do_div(tmpdiv, map->strip_size);
3897                 r5or6_last_column = tmpdiv;
3898 #else
3899                 first_row_offset = r5or6_first_row_offset =
3900                         (u32)((first_block % stripesize) %
3901                                                 r5or6_blocks_per_row);
3902
3903                 r5or6_last_row_offset =
3904                         (u32)((last_block % stripesize) %
3905                                                 r5or6_blocks_per_row);
3906
3907                 first_column = r5or6_first_column =
3908                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
3909                 r5or6_last_column =
3910                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
3911 #endif
3912                 if (r5or6_first_column != r5or6_last_column)
3913                         return IO_ACCEL_INELIGIBLE;
3914
3915                 /* Request is eligible */
3916                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3917                         le16_to_cpu(map->row_cnt);
3918
3919                 map_index = (first_group *
3920                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
3921                         (map_row * total_disks_per_row) + first_column;
3922                 break;
3923         default:
3924                 return IO_ACCEL_INELIGIBLE;
3925         }
3926
3927         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
3928                 return IO_ACCEL_INELIGIBLE;
3929
3930         c->phys_disk = dev->phys_disk[map_index];
3931
3932         disk_handle = dd[map_index].ioaccel_handle;
3933         disk_block = le64_to_cpu(map->disk_starting_blk) +
3934                         first_row * le16_to_cpu(map->strip_size) +
3935                         (first_row_offset - first_column *
3936                         le16_to_cpu(map->strip_size));
3937         disk_block_cnt = block_cnt;
3938
3939         /* handle differing logical/physical block sizes */
3940         if (map->phys_blk_shift) {
3941                 disk_block <<= map->phys_blk_shift;
3942                 disk_block_cnt <<= map->phys_blk_shift;
3943         }
3944         BUG_ON(disk_block_cnt > 0xffff);
3945
3946         /* build the new CDB for the physical disk I/O */
3947         if (disk_block > 0xffffffff) {
3948                 cdb[0] = is_write ? WRITE_16 : READ_16;
3949                 cdb[1] = 0;
3950                 cdb[2] = (u8) (disk_block >> 56);
3951                 cdb[3] = (u8) (disk_block >> 48);
3952                 cdb[4] = (u8) (disk_block >> 40);
3953                 cdb[5] = (u8) (disk_block >> 32);
3954                 cdb[6] = (u8) (disk_block >> 24);
3955                 cdb[7] = (u8) (disk_block >> 16);
3956                 cdb[8] = (u8) (disk_block >> 8);
3957                 cdb[9] = (u8) (disk_block);
3958                 cdb[10] = (u8) (disk_block_cnt >> 24);
3959                 cdb[11] = (u8) (disk_block_cnt >> 16);
3960                 cdb[12] = (u8) (disk_block_cnt >> 8);
3961                 cdb[13] = (u8) (disk_block_cnt);
3962                 cdb[14] = 0;
3963                 cdb[15] = 0;
3964                 cdb_len = 16;
3965         } else {
3966                 cdb[0] = is_write ? WRITE_10 : READ_10;
3967                 cdb[1] = 0;
3968                 cdb[2] = (u8) (disk_block >> 24);
3969                 cdb[3] = (u8) (disk_block >> 16);
3970                 cdb[4] = (u8) (disk_block >> 8);
3971                 cdb[5] = (u8) (disk_block);
3972                 cdb[6] = 0;
3973                 cdb[7] = (u8) (disk_block_cnt >> 8);
3974                 cdb[8] = (u8) (disk_block_cnt);
3975                 cdb[9] = 0;
3976                 cdb_len = 10;
3977         }
3978         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
3979                                                 dev->scsi3addr,
3980                                                 dev->phys_disk[map_index]);
3981 }
3982
3983 /* Submit commands down the "normal" RAID stack path */
3984 static int hpsa_ciss_submit(struct ctlr_info *h,
3985         struct CommandList *c, struct scsi_cmnd *cmd,
3986         unsigned char scsi3addr[])
3987 {
3988         cmd->host_scribble = (unsigned char *) c;
3989         c->cmd_type = CMD_SCSI;
3990         c->scsi_cmd = cmd;
3991         c->Header.ReplyQueue = 0;  /* unused in simple mode */
3992         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
3993         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
3994
3995         /* Fill in the request block... */
3996
3997         c->Request.Timeout = 0;
3998         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
3999         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4000         c->Request.CDBLen = cmd->cmd_len;
4001         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4002         switch (cmd->sc_data_direction) {
4003         case DMA_TO_DEVICE:
4004                 c->Request.type_attr_dir =
4005                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4006                 break;
4007         case DMA_FROM_DEVICE:
4008                 c->Request.type_attr_dir =
4009                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4010                 break;
4011         case DMA_NONE:
4012                 c->Request.type_attr_dir =
4013                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4014                 break;
4015         case DMA_BIDIRECTIONAL:
4016                 /* This can happen if a buggy application does a scsi passthru
4017                  * and sets both inlen and outlen to non-zero. ( see
4018                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4019                  */
4020
4021                 c->Request.type_attr_dir =
4022                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4023                 /* This is technically wrong, and hpsa controllers should
4024                  * reject it with CMD_INVALID, which is the most correct
4025                  * response, but non-fibre backends appear to let it
4026                  * slide by, and give the same results as if this field
4027                  * were set correctly.  Either way is acceptable for
4028                  * our purposes here.
4029                  */
4030
4031                 break;
4032
4033         default:
4034                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4035                         cmd->sc_data_direction);
4036                 BUG();
4037                 break;
4038         }
4039
4040         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4041                 cmd_free(h, c);
4042                 return SCSI_MLQUEUE_HOST_BUSY;
4043         }
4044         enqueue_cmd_and_start_io(h, c);
4045         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4046         return 0;
4047 }
4048
4049 static void hpsa_command_resubmit_worker(struct work_struct *work)
4050 {
4051         struct scsi_cmnd *cmd;
4052         struct hpsa_scsi_dev_t *dev;
4053         struct CommandList *c =
4054                         container_of(work, struct CommandList, work);
4055
4056         cmd = c->scsi_cmd;
4057         dev = cmd->device->hostdata;
4058         if (!dev) {
4059                 cmd->result = DID_NO_CONNECT << 16;
4060                 cmd->scsi_done(cmd);
4061                 return;
4062         }
4063         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4064                 /*
4065                  * If we get here, it means dma mapping failed. Try
4066                  * again via scsi mid layer, which will then get
4067                  * SCSI_MLQUEUE_HOST_BUSY.
4068                  */
4069                 cmd->result = DID_IMM_RETRY << 16;
4070                 cmd->scsi_done(cmd);
4071         }
4072 }
4073
4074 /* Running in struct Scsi_Host->host_lock less mode */
4075 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4076 {
4077         struct ctlr_info *h;
4078         struct hpsa_scsi_dev_t *dev;
4079         unsigned char scsi3addr[8];
4080         struct CommandList *c;
4081         int rc = 0;
4082
4083         /* Get the ptr to our adapter structure out of cmd->host. */
4084         h = sdev_to_hba(cmd->device);
4085         dev = cmd->device->hostdata;
4086         if (!dev) {
4087                 cmd->result = DID_NO_CONNECT << 16;
4088                 cmd->scsi_done(cmd);
4089                 return 0;
4090         }
4091         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4092
4093         if (unlikely(lockup_detected(h))) {
4094                 cmd->result = DID_ERROR << 16;
4095                 cmd->scsi_done(cmd);
4096                 return 0;
4097         }
4098         c = cmd_alloc(h);
4099         if (c == NULL) {                        /* trouble... */
4100                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4101                 return SCSI_MLQUEUE_HOST_BUSY;
4102         }
4103         if (unlikely(lockup_detected(h))) {
4104                 cmd->result = DID_ERROR << 16;
4105                 cmd_free(h, c);
4106                 cmd->scsi_done(cmd);
4107                 return 0;
4108         }
4109
4110         /*
4111          * Call alternate submit routine for I/O accelerated commands.
4112          * Retries always go down the normal I/O path.
4113          */
4114         if (likely(cmd->retries == 0 &&
4115                 cmd->request->cmd_type == REQ_TYPE_FS &&
4116                 h->acciopath_status)) {
4117
4118                 cmd->host_scribble = (unsigned char *) c;
4119                 c->cmd_type = CMD_SCSI;
4120                 c->scsi_cmd = cmd;
4121
4122                 if (dev->offload_enabled) {
4123                         rc = hpsa_scsi_ioaccel_raid_map(h, c);
4124                         if (rc == 0)
4125                                 return 0; /* Sent on ioaccel path */
4126                         if (rc < 0) {   /* scsi_dma_map failed. */
4127                                 cmd_free(h, c);
4128                                 return SCSI_MLQUEUE_HOST_BUSY;
4129                         }
4130                 } else if (dev->ioaccel_handle) {
4131                         rc = hpsa_scsi_ioaccel_direct_map(h, c);
4132                         if (rc == 0)
4133                                 return 0; /* Sent on direct map path */
4134                         if (rc < 0) {   /* scsi_dma_map failed. */
4135                                 cmd_free(h, c);
4136                                 return SCSI_MLQUEUE_HOST_BUSY;
4137                         }
4138                 }
4139         }
4140         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4141 }
4142
4143 static int do_not_scan_if_controller_locked_up(struct ctlr_info *h)
4144 {
4145         unsigned long flags;
4146
4147         /*
4148          * Don't let rescans be initiated on a controller known
4149          * to be locked up.  If the controller locks up *during*
4150          * a rescan, that thread is probably hosed, but at least
4151          * we can prevent new rescan threads from piling up on a
4152          * locked up controller.
4153          */
4154         if (unlikely(lockup_detected(h))) {
4155                 spin_lock_irqsave(&h->scan_lock, flags);
4156                 h->scan_finished = 1;
4157                 wake_up_all(&h->scan_wait_queue);
4158                 spin_unlock_irqrestore(&h->scan_lock, flags);
4159                 return 1;
4160         }
4161         return 0;
4162 }
4163
4164 static void hpsa_scan_start(struct Scsi_Host *sh)
4165 {
4166         struct ctlr_info *h = shost_to_hba(sh);
4167         unsigned long flags;
4168
4169         if (do_not_scan_if_controller_locked_up(h))
4170                 return;
4171
4172         /* wait until any scan already in progress is finished. */
4173         while (1) {
4174                 spin_lock_irqsave(&h->scan_lock, flags);
4175                 if (h->scan_finished)
4176                         break;
4177                 spin_unlock_irqrestore(&h->scan_lock, flags);
4178                 wait_event(h->scan_wait_queue, h->scan_finished);
4179                 /* Note: We don't need to worry about a race between this
4180                  * thread and driver unload because the midlayer will
4181                  * have incremented the reference count, so unload won't
4182                  * happen if we're in here.
4183                  */
4184         }
4185         h->scan_finished = 0; /* mark scan as in progress */
4186         spin_unlock_irqrestore(&h->scan_lock, flags);
4187
4188         if (do_not_scan_if_controller_locked_up(h))
4189                 return;
4190
4191         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4192
4193         spin_lock_irqsave(&h->scan_lock, flags);
4194         h->scan_finished = 1; /* mark scan as finished. */
4195         wake_up_all(&h->scan_wait_queue);
4196         spin_unlock_irqrestore(&h->scan_lock, flags);
4197 }
4198
4199 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4200 {
4201         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4202
4203         if (!logical_drive)
4204                 return -ENODEV;
4205
4206         if (qdepth < 1)
4207                 qdepth = 1;
4208         else if (qdepth > logical_drive->queue_depth)
4209                 qdepth = logical_drive->queue_depth;
4210
4211         return scsi_change_queue_depth(sdev, qdepth);
4212 }
4213
4214 static int hpsa_scan_finished(struct Scsi_Host *sh,
4215         unsigned long elapsed_time)
4216 {
4217         struct ctlr_info *h = shost_to_hba(sh);
4218         unsigned long flags;
4219         int finished;
4220
4221         spin_lock_irqsave(&h->scan_lock, flags);
4222         finished = h->scan_finished;
4223         spin_unlock_irqrestore(&h->scan_lock, flags);
4224         return finished;
4225 }
4226
4227 static void hpsa_unregister_scsi(struct ctlr_info *h)
4228 {
4229         /* we are being forcibly unloaded, and may not refuse. */
4230         scsi_remove_host(h->scsi_host);
4231         scsi_host_put(h->scsi_host);
4232         h->scsi_host = NULL;
4233 }
4234
4235 static int hpsa_register_scsi(struct ctlr_info *h)
4236 {
4237         struct Scsi_Host *sh;
4238         int error;
4239
4240         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4241         if (sh == NULL)
4242                 goto fail;
4243
4244         sh->io_port = 0;
4245         sh->n_io_port = 0;
4246         sh->this_id = -1;
4247         sh->max_channel = 3;
4248         sh->max_cmd_len = MAX_COMMAND_SIZE;
4249         sh->max_lun = HPSA_MAX_LUN;
4250         sh->max_id = HPSA_MAX_LUN;
4251         sh->can_queue = h->nr_cmds -
4252                         HPSA_CMDS_RESERVED_FOR_ABORTS -
4253                         HPSA_CMDS_RESERVED_FOR_DRIVER -
4254                         HPSA_MAX_CONCURRENT_PASSTHRUS;
4255         sh->cmd_per_lun = sh->can_queue;
4256         sh->sg_tablesize = h->maxsgentries;
4257         h->scsi_host = sh;
4258         sh->hostdata[0] = (unsigned long) h;
4259         sh->irq = h->intr[h->intr_mode];
4260         sh->unique_id = sh->irq;
4261         error = scsi_add_host(sh, &h->pdev->dev);
4262         if (error)
4263                 goto fail_host_put;
4264         scsi_scan_host(sh);
4265         return 0;
4266
4267  fail_host_put:
4268         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4269                 " failed for controller %d\n", __func__, h->ctlr);
4270         scsi_host_put(sh);
4271         return error;
4272  fail:
4273         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4274                 " failed for controller %d\n", __func__, h->ctlr);
4275         return -ENOMEM;
4276 }
4277
4278 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4279         unsigned char lunaddr[])
4280 {
4281         int rc;
4282         int count = 0;
4283         int waittime = 1; /* seconds */
4284         struct CommandList *c;
4285
4286         c = cmd_alloc(h);
4287         if (!c) {
4288                 dev_warn(&h->pdev->dev, "out of memory in "
4289                         "wait_for_device_to_become_ready.\n");
4290                 return IO_ERROR;
4291         }
4292
4293         /* Send test unit ready until device ready, or give up. */
4294         while (count < HPSA_TUR_RETRY_LIMIT) {
4295
4296                 /* Wait for a bit.  do this first, because if we send
4297                  * the TUR right away, the reset will just abort it.
4298                  */
4299                 msleep(1000 * waittime);
4300                 count++;
4301                 rc = 0; /* Device ready. */
4302
4303                 /* Increase wait time with each try, up to a point. */
4304                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4305                         waittime = waittime * 2;
4306
4307                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4308                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4309                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4310                 hpsa_scsi_do_simple_cmd_core(h, c);
4311                 /* no unmap needed here because no data xfer. */
4312
4313                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4314                         break;
4315
4316                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4317                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4318                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4319                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4320                         break;
4321
4322                 dev_warn(&h->pdev->dev, "waiting %d secs "
4323                         "for device to become ready.\n", waittime);
4324                 rc = 1; /* device not ready. */
4325         }
4326
4327         if (rc)
4328                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4329         else
4330                 dev_warn(&h->pdev->dev, "device is ready.\n");
4331
4332         cmd_free(h, c);
4333         return rc;
4334 }
4335
4336 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4337  * complaining.  Doing a host- or bus-reset can't do anything good here.
4338  */
4339 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4340 {
4341         int rc;
4342         struct ctlr_info *h;
4343         struct hpsa_scsi_dev_t *dev;
4344
4345         /* find the controller to which the command to be aborted was sent */
4346         h = sdev_to_hba(scsicmd->device);
4347         if (h == NULL) /* paranoia */
4348                 return FAILED;
4349
4350         if (lockup_detected(h))
4351                 return FAILED;
4352
4353         dev = scsicmd->device->hostdata;
4354         if (!dev) {
4355                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4356                         "device lookup failed.\n");
4357                 return FAILED;
4358         }
4359         dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
4360                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4361         /* send a reset to the SCSI LUN which the command was sent to */
4362         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN);
4363         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4364                 return SUCCESS;
4365
4366         dev_warn(&h->pdev->dev, "resetting device failed.\n");
4367         return FAILED;
4368 }
4369
4370 static void swizzle_abort_tag(u8 *tag)
4371 {
4372         u8 original_tag[8];
4373
4374         memcpy(original_tag, tag, 8);
4375         tag[0] = original_tag[3];
4376         tag[1] = original_tag[2];
4377         tag[2] = original_tag[1];
4378         tag[3] = original_tag[0];
4379         tag[4] = original_tag[7];
4380         tag[5] = original_tag[6];
4381         tag[6] = original_tag[5];
4382         tag[7] = original_tag[4];
4383 }
4384
4385 static void hpsa_get_tag(struct ctlr_info *h,
4386         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4387 {
4388         u64 tag;
4389         if (c->cmd_type == CMD_IOACCEL1) {
4390                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4391                         &h->ioaccel_cmd_pool[c->cmdindex];
4392                 tag = le64_to_cpu(cm1->tag);
4393                 *tagupper = cpu_to_le32(tag >> 32);
4394                 *taglower = cpu_to_le32(tag);
4395                 return;
4396         }
4397         if (c->cmd_type == CMD_IOACCEL2) {
4398                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4399                         &h->ioaccel2_cmd_pool[c->cmdindex];
4400                 /* upper tag not used in ioaccel2 mode */
4401                 memset(tagupper, 0, sizeof(*tagupper));
4402                 *taglower = cm2->Tag;
4403                 return;
4404         }
4405         tag = le64_to_cpu(c->Header.tag);
4406         *tagupper = cpu_to_le32(tag >> 32);
4407         *taglower = cpu_to_le32(tag);
4408 }
4409
4410 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4411         struct CommandList *abort, int swizzle)
4412 {
4413         int rc = IO_OK;
4414         struct CommandList *c;
4415         struct ErrorInfo *ei;
4416         __le32 tagupper, taglower;
4417
4418         c = cmd_alloc(h);
4419         if (c == NULL) {        /* trouble... */
4420                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4421                 return -ENOMEM;
4422         }
4423
4424         /* fill_cmd can't fail here, no buffer to map */
4425         (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
4426                 0, 0, scsi3addr, TYPE_MSG);
4427         if (swizzle)
4428                 swizzle_abort_tag(&c->Request.CDB[4]);
4429         hpsa_scsi_do_simple_cmd_core(h, c);
4430         hpsa_get_tag(h, abort, &taglower, &tagupper);
4431         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
4432                 __func__, tagupper, taglower);
4433         /* no unmap needed here because no data xfer. */
4434
4435         ei = c->err_info;
4436         switch (ei->CommandStatus) {
4437         case CMD_SUCCESS:
4438                 break;
4439         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4440                 rc = -1;
4441                 break;
4442         default:
4443                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4444                         __func__, tagupper, taglower);
4445                 hpsa_scsi_interpret_error(h, c);
4446                 rc = -1;
4447                 break;
4448         }
4449         cmd_free(h, c);
4450         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4451                 __func__, tagupper, taglower);
4452         return rc;
4453 }
4454
4455 /* ioaccel2 path firmware cannot handle abort task requests.
4456  * Change abort requests to physical target reset, and send to the
4457  * address of the physical disk used for the ioaccel 2 command.
4458  * Return 0 on success (IO_OK)
4459  *       -1 on failure
4460  */
4461
4462 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4463         unsigned char *scsi3addr, struct CommandList *abort)
4464 {
4465         int rc = IO_OK;
4466         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4467         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4468         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4469         unsigned char *psa = &phys_scsi3addr[0];
4470
4471         /* Get a pointer to the hpsa logical device. */
4472         scmd = abort->scsi_cmd;
4473         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4474         if (dev == NULL) {
4475                 dev_warn(&h->pdev->dev,
4476                         "Cannot abort: no device pointer for command.\n");
4477                         return -1; /* not abortable */
4478         }
4479
4480         if (h->raid_offload_debug > 0)
4481                 dev_info(&h->pdev->dev,
4482                         "Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4483                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4484                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4485                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4486
4487         if (!dev->offload_enabled) {
4488                 dev_warn(&h->pdev->dev,
4489                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4490                 return -1; /* not abortable */
4491         }
4492
4493         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4494         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4495                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4496                 return -1; /* not abortable */
4497         }
4498
4499         /* send the reset */
4500         if (h->raid_offload_debug > 0)
4501                 dev_info(&h->pdev->dev,
4502                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4503                         psa[0], psa[1], psa[2], psa[3],
4504                         psa[4], psa[5], psa[6], psa[7]);
4505         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET);
4506         if (rc != 0) {
4507                 dev_warn(&h->pdev->dev,
4508                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4509                         psa[0], psa[1], psa[2], psa[3],
4510                         psa[4], psa[5], psa[6], psa[7]);
4511                 return rc; /* failed to reset */
4512         }
4513
4514         /* wait for device to recover */
4515         if (wait_for_device_to_become_ready(h, psa) != 0) {
4516                 dev_warn(&h->pdev->dev,
4517                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4518                         psa[0], psa[1], psa[2], psa[3],
4519                         psa[4], psa[5], psa[6], psa[7]);
4520                 return -1;  /* failed to recover */
4521         }
4522
4523         /* device recovered */
4524         dev_info(&h->pdev->dev,
4525                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4526                 psa[0], psa[1], psa[2], psa[3],
4527                 psa[4], psa[5], psa[6], psa[7]);
4528
4529         return rc; /* success */
4530 }
4531
4532 /* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
4533  * tell which kind we're dealing with, so we send the abort both ways.  There
4534  * shouldn't be any collisions between swizzled and unswizzled tags due to the
4535  * way we construct our tags but we check anyway in case the assumptions which
4536  * make this true someday become false.
4537  */
4538 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4539         unsigned char *scsi3addr, struct CommandList *abort)
4540 {
4541         /* ioccelerator mode 2 commands should be aborted via the
4542          * accelerated path, since RAID path is unaware of these commands,
4543          * but underlying firmware can't handle abort TMF.
4544          * Change abort to physical device reset.
4545          */
4546         if (abort->cmd_type == CMD_IOACCEL2)
4547                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort);
4548
4549         return hpsa_send_abort(h, scsi3addr, abort, 0) &&
4550                         hpsa_send_abort(h, scsi3addr, abort, 1);
4551 }
4552
4553 /* Send an abort for the specified command.
4554  *      If the device and controller support it,
4555  *              send a task abort request.
4556  */
4557 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4558 {
4559
4560         int i, rc;
4561         struct ctlr_info *h;
4562         struct hpsa_scsi_dev_t *dev;
4563         struct CommandList *abort; /* pointer to command to be aborted */
4564         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4565         char msg[256];          /* For debug messaging. */
4566         int ml = 0;
4567         __le32 tagupper, taglower;
4568         int refcount;
4569
4570         /* Find the controller of the command to be aborted */
4571         h = sdev_to_hba(sc->device);
4572         if (WARN(h == NULL,
4573                         "ABORT REQUEST FAILED, Controller lookup failed.\n"))
4574                 return FAILED;
4575
4576         if (lockup_detected(h))
4577                 return FAILED;
4578
4579         /* Check that controller supports some kind of task abort */
4580         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
4581                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
4582                 return FAILED;
4583
4584         memset(msg, 0, sizeof(msg));
4585         ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%llu ",
4586                 h->scsi_host->host_no, sc->device->channel,
4587                 sc->device->id, sc->device->lun);
4588
4589         /* Find the device of the command to be aborted */
4590         dev = sc->device->hostdata;
4591         if (!dev) {
4592                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4593                                 msg);
4594                 return FAILED;
4595         }
4596
4597         /* Get SCSI command to be aborted */
4598         abort = (struct CommandList *) sc->host_scribble;
4599         if (abort == NULL) {
4600                 /* This can happen if the command already completed. */
4601                 return SUCCESS;
4602         }
4603         refcount = atomic_inc_return(&abort->refcount);
4604         if (refcount == 1) { /* Command is done already. */
4605                 cmd_free(h, abort);
4606                 return SUCCESS;
4607         }
4608         hpsa_get_tag(h, abort, &taglower, &tagupper);
4609         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
4610         as  = abort->scsi_cmd;
4611         if (as != NULL)
4612                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
4613                         as->cmnd[0], as->serial_number);
4614         dev_dbg(&h->pdev->dev, "%s\n", msg);
4615         dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
4616                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4617         /*
4618          * Command is in flight, or possibly already completed
4619          * by the firmware (but not to the scsi mid layer) but we can't
4620          * distinguish which.  Send the abort down.
4621          */
4622         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
4623         if (rc != 0) {
4624                 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
4625                 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
4626                         h->scsi_host->host_no,
4627                         dev->bus, dev->target, dev->lun);
4628                 cmd_free(h, abort);
4629                 return FAILED;
4630         }
4631         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
4632
4633         /* If the abort(s) above completed and actually aborted the
4634          * command, then the command to be aborted should already be
4635          * completed.  If not, wait around a bit more to see if they
4636          * manage to complete normally.
4637          */
4638 #define ABORT_COMPLETE_WAIT_SECS 30
4639         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
4640                 refcount = atomic_read(&abort->refcount);
4641                 if (refcount < 2) {
4642                         cmd_free(h, abort);
4643                         return SUCCESS;
4644                 } else {
4645                         msleep(100);
4646                 }
4647         }
4648         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
4649                 msg, ABORT_COMPLETE_WAIT_SECS);
4650         cmd_free(h, abort);
4651         return FAILED;
4652 }
4653
4654 /*
4655  * For operations that cannot sleep, a command block is allocated at init,
4656  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
4657  * which ones are free or in use.  Lock must be held when calling this.
4658  * cmd_free() is the complement.
4659  */
4660
4661 static struct CommandList *cmd_alloc(struct ctlr_info *h)
4662 {
4663         struct CommandList *c;
4664         int i;
4665         union u64bit temp64;
4666         dma_addr_t cmd_dma_handle, err_dma_handle;
4667         int refcount;
4668         unsigned long offset;
4669
4670         /*
4671          * There is some *extremely* small but non-zero chance that that
4672          * multiple threads could get in here, and one thread could
4673          * be scanning through the list of bits looking for a free
4674          * one, but the free ones are always behind him, and other
4675          * threads sneak in behind him and eat them before he can
4676          * get to them, so that while there is always a free one, a
4677          * very unlucky thread might be starved anyway, never able to
4678          * beat the other threads.  In reality, this happens so
4679          * infrequently as to be indistinguishable from never.
4680          */
4681
4682         offset = h->last_allocation; /* benignly racy */
4683         for (;;) {
4684                 i = find_next_zero_bit(h->cmd_pool_bits, h->nr_cmds, offset);
4685                 if (unlikely(i == h->nr_cmds)) {
4686                         offset = 0;
4687                         continue;
4688                 }
4689                 c = h->cmd_pool + i;
4690                 refcount = atomic_inc_return(&c->refcount);
4691                 if (unlikely(refcount > 1)) {
4692                         cmd_free(h, c); /* already in use */
4693                         offset = (i + 1) % h->nr_cmds;
4694                         continue;
4695                 }
4696                 set_bit(i & (BITS_PER_LONG - 1),
4697                         h->cmd_pool_bits + (i / BITS_PER_LONG));
4698                 break; /* it's ours now. */
4699         }
4700         h->last_allocation = i; /* benignly racy */
4701
4702         /* Zero out all of commandlist except the last field, refcount */
4703         memset(c, 0, offsetof(struct CommandList, refcount));
4704         c->Header.tag = cpu_to_le64((u64) (i << DIRECT_LOOKUP_SHIFT));
4705         cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(*c);
4706         c->err_info = h->errinfo_pool + i;
4707         memset(c->err_info, 0, sizeof(*c->err_info));
4708         err_dma_handle = h->errinfo_pool_dhandle
4709             + i * sizeof(*c->err_info);
4710
4711         c->cmdindex = i;
4712
4713         c->busaddr = (u32) cmd_dma_handle;
4714         temp64.val = (u64) err_dma_handle;
4715         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4716         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4717
4718         c->h = h;
4719         return c;
4720 }
4721
4722 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
4723 {
4724         if (atomic_dec_and_test(&c->refcount)) {
4725                 int i;
4726
4727                 i = c - h->cmd_pool;
4728                 clear_bit(i & (BITS_PER_LONG - 1),
4729                           h->cmd_pool_bits + (i / BITS_PER_LONG));
4730         }
4731 }
4732
4733 #ifdef CONFIG_COMPAT
4734
4735 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
4736         void __user *arg)
4737 {
4738         IOCTL32_Command_struct __user *arg32 =
4739             (IOCTL32_Command_struct __user *) arg;
4740         IOCTL_Command_struct arg64;
4741         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
4742         int err;
4743         u32 cp;
4744
4745         memset(&arg64, 0, sizeof(arg64));
4746         err = 0;
4747         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4748                            sizeof(arg64.LUN_info));
4749         err |= copy_from_user(&arg64.Request, &arg32->Request,
4750                            sizeof(arg64.Request));
4751         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4752                            sizeof(arg64.error_info));
4753         err |= get_user(arg64.buf_size, &arg32->buf_size);
4754         err |= get_user(cp, &arg32->buf);
4755         arg64.buf = compat_ptr(cp);
4756         err |= copy_to_user(p, &arg64, sizeof(arg64));
4757
4758         if (err)
4759                 return -EFAULT;
4760
4761         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
4762         if (err)
4763                 return err;
4764         err |= copy_in_user(&arg32->error_info, &p->error_info,
4765                          sizeof(arg32->error_info));
4766         if (err)
4767                 return -EFAULT;
4768         return err;
4769 }
4770
4771 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
4772         int cmd, void __user *arg)
4773 {
4774         BIG_IOCTL32_Command_struct __user *arg32 =
4775             (BIG_IOCTL32_Command_struct __user *) arg;
4776         BIG_IOCTL_Command_struct arg64;
4777         BIG_IOCTL_Command_struct __user *p =
4778             compat_alloc_user_space(sizeof(arg64));
4779         int err;
4780         u32 cp;
4781
4782         memset(&arg64, 0, sizeof(arg64));
4783         err = 0;
4784         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4785                            sizeof(arg64.LUN_info));
4786         err |= copy_from_user(&arg64.Request, &arg32->Request,
4787                            sizeof(arg64.Request));
4788         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4789                            sizeof(arg64.error_info));
4790         err |= get_user(arg64.buf_size, &arg32->buf_size);
4791         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
4792         err |= get_user(cp, &arg32->buf);
4793         arg64.buf = compat_ptr(cp);
4794         err |= copy_to_user(p, &arg64, sizeof(arg64));
4795
4796         if (err)
4797                 return -EFAULT;
4798
4799         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
4800         if (err)
4801                 return err;
4802         err |= copy_in_user(&arg32->error_info, &p->error_info,
4803                          sizeof(arg32->error_info));
4804         if (err)
4805                 return -EFAULT;
4806         return err;
4807 }
4808
4809 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
4810 {
4811         switch (cmd) {
4812         case CCISS_GETPCIINFO:
4813         case CCISS_GETINTINFO:
4814         case CCISS_SETINTINFO:
4815         case CCISS_GETNODENAME:
4816         case CCISS_SETNODENAME:
4817         case CCISS_GETHEARTBEAT:
4818         case CCISS_GETBUSTYPES:
4819         case CCISS_GETFIRMVER:
4820         case CCISS_GETDRIVVER:
4821         case CCISS_REVALIDVOLS:
4822         case CCISS_DEREGDISK:
4823         case CCISS_REGNEWDISK:
4824         case CCISS_REGNEWD:
4825         case CCISS_RESCANDISK:
4826         case CCISS_GETLUNINFO:
4827                 return hpsa_ioctl(dev, cmd, arg);
4828
4829         case CCISS_PASSTHRU32:
4830                 return hpsa_ioctl32_passthru(dev, cmd, arg);
4831         case CCISS_BIG_PASSTHRU32:
4832                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
4833
4834         default:
4835                 return -ENOIOCTLCMD;
4836         }
4837 }
4838 #endif
4839
4840 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
4841 {
4842         struct hpsa_pci_info pciinfo;
4843
4844         if (!argp)
4845                 return -EINVAL;
4846         pciinfo.domain = pci_domain_nr(h->pdev->bus);
4847         pciinfo.bus = h->pdev->bus->number;
4848         pciinfo.dev_fn = h->pdev->devfn;
4849         pciinfo.board_id = h->board_id;
4850         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
4851                 return -EFAULT;
4852         return 0;
4853 }
4854
4855 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
4856 {
4857         DriverVer_type DriverVer;
4858         unsigned char vmaj, vmin, vsubmin;
4859         int rc;
4860
4861         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
4862                 &vmaj, &vmin, &vsubmin);
4863         if (rc != 3) {
4864                 dev_info(&h->pdev->dev, "driver version string '%s' "
4865                         "unrecognized.", HPSA_DRIVER_VERSION);
4866                 vmaj = 0;
4867                 vmin = 0;
4868                 vsubmin = 0;
4869         }
4870         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
4871         if (!argp)
4872                 return -EINVAL;
4873         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
4874                 return -EFAULT;
4875         return 0;
4876 }
4877
4878 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4879 {
4880         IOCTL_Command_struct iocommand;
4881         struct CommandList *c;
4882         char *buff = NULL;
4883         u64 temp64;
4884         int rc = 0;
4885
4886         if (!argp)
4887                 return -EINVAL;
4888         if (!capable(CAP_SYS_RAWIO))
4889                 return -EPERM;
4890         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
4891                 return -EFAULT;
4892         if ((iocommand.buf_size < 1) &&
4893             (iocommand.Request.Type.Direction != XFER_NONE)) {
4894                 return -EINVAL;
4895         }
4896         if (iocommand.buf_size > 0) {
4897                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
4898                 if (buff == NULL)
4899                         return -EFAULT;
4900                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
4901                         /* Copy the data into the buffer we created */
4902                         if (copy_from_user(buff, iocommand.buf,
4903                                 iocommand.buf_size)) {
4904                                 rc = -EFAULT;
4905                                 goto out_kfree;
4906                         }
4907                 } else {
4908                         memset(buff, 0, iocommand.buf_size);
4909                 }
4910         }
4911         c = cmd_alloc(h);
4912         if (c == NULL) {
4913                 rc = -ENOMEM;
4914                 goto out_kfree;
4915         }
4916         /* Fill in the command type */
4917         c->cmd_type = CMD_IOCTL_PEND;
4918         /* Fill in Command Header */
4919         c->Header.ReplyQueue = 0; /* unused in simple mode */
4920         if (iocommand.buf_size > 0) {   /* buffer to fill */
4921                 c->Header.SGList = 1;
4922                 c->Header.SGTotal = cpu_to_le16(1);
4923         } else  { /* no buffers to fill */
4924                 c->Header.SGList = 0;
4925                 c->Header.SGTotal = cpu_to_le16(0);
4926         }
4927         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
4928
4929         /* Fill in Request block */
4930         memcpy(&c->Request, &iocommand.Request,
4931                 sizeof(c->Request));
4932
4933         /* Fill in the scatter gather information */
4934         if (iocommand.buf_size > 0) {
4935                 temp64 = pci_map_single(h->pdev, buff,
4936                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
4937                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
4938                         c->SG[0].Addr = cpu_to_le64(0);
4939                         c->SG[0].Len = cpu_to_le32(0);
4940                         rc = -ENOMEM;
4941                         goto out;
4942                 }
4943                 c->SG[0].Addr = cpu_to_le64(temp64);
4944                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
4945                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
4946         }
4947         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
4948         if (iocommand.buf_size > 0)
4949                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
4950         check_ioctl_unit_attention(h, c);
4951
4952         /* Copy the error information out */
4953         memcpy(&iocommand.error_info, c->err_info,
4954                 sizeof(iocommand.error_info));
4955         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
4956                 rc = -EFAULT;
4957                 goto out;
4958         }
4959         if ((iocommand.Request.Type.Direction & XFER_READ) &&
4960                 iocommand.buf_size > 0) {
4961                 /* Copy the data out of the buffer we created */
4962                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
4963                         rc = -EFAULT;
4964                         goto out;
4965                 }
4966         }
4967 out:
4968         cmd_free(h, c);
4969 out_kfree:
4970         kfree(buff);
4971         return rc;
4972 }
4973
4974 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4975 {
4976         BIG_IOCTL_Command_struct *ioc;
4977         struct CommandList *c;
4978         unsigned char **buff = NULL;
4979         int *buff_size = NULL;
4980         u64 temp64;
4981         BYTE sg_used = 0;
4982         int status = 0;
4983         u32 left;
4984         u32 sz;
4985         BYTE __user *data_ptr;
4986
4987         if (!argp)
4988                 return -EINVAL;
4989         if (!capable(CAP_SYS_RAWIO))
4990                 return -EPERM;
4991         ioc = (BIG_IOCTL_Command_struct *)
4992             kmalloc(sizeof(*ioc), GFP_KERNEL);
4993         if (!ioc) {
4994                 status = -ENOMEM;
4995                 goto cleanup1;
4996         }
4997         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
4998                 status = -EFAULT;
4999                 goto cleanup1;
5000         }
5001         if ((ioc->buf_size < 1) &&
5002             (ioc->Request.Type.Direction != XFER_NONE)) {
5003                 status = -EINVAL;
5004                 goto cleanup1;
5005         }
5006         /* Check kmalloc limits  using all SGs */
5007         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5008                 status = -EINVAL;
5009                 goto cleanup1;
5010         }
5011         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5012                 status = -EINVAL;
5013                 goto cleanup1;
5014         }
5015         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5016         if (!buff) {
5017                 status = -ENOMEM;
5018                 goto cleanup1;
5019         }
5020         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5021         if (!buff_size) {
5022                 status = -ENOMEM;
5023                 goto cleanup1;
5024         }
5025         left = ioc->buf_size;
5026         data_ptr = ioc->buf;
5027         while (left) {
5028                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5029                 buff_size[sg_used] = sz;
5030                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5031                 if (buff[sg_used] == NULL) {
5032                         status = -ENOMEM;
5033                         goto cleanup1;
5034                 }
5035                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5036                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5037                                 status = -EFAULT;
5038                                 goto cleanup1;
5039                         }
5040                 } else
5041                         memset(buff[sg_used], 0, sz);
5042                 left -= sz;
5043                 data_ptr += sz;
5044                 sg_used++;
5045         }
5046         c = cmd_alloc(h);
5047         if (c == NULL) {
5048                 status = -ENOMEM;
5049                 goto cleanup1;
5050         }
5051         c->cmd_type = CMD_IOCTL_PEND;
5052         c->Header.ReplyQueue = 0;
5053         c->Header.SGList = (u8) sg_used;
5054         c->Header.SGTotal = cpu_to_le16(sg_used);
5055         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5056         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5057         if (ioc->buf_size > 0) {
5058                 int i;
5059                 for (i = 0; i < sg_used; i++) {
5060                         temp64 = pci_map_single(h->pdev, buff[i],
5061                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5062                         if (dma_mapping_error(&h->pdev->dev,
5063                                                         (dma_addr_t) temp64)) {
5064                                 c->SG[i].Addr = cpu_to_le64(0);
5065                                 c->SG[i].Len = cpu_to_le32(0);
5066                                 hpsa_pci_unmap(h->pdev, c, i,
5067                                         PCI_DMA_BIDIRECTIONAL);
5068                                 status = -ENOMEM;
5069                                 goto cleanup0;
5070                         }
5071                         c->SG[i].Addr = cpu_to_le64(temp64);
5072                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
5073                         c->SG[i].Ext = cpu_to_le32(0);
5074                 }
5075                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5076         }
5077         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5078         if (sg_used)
5079                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5080         check_ioctl_unit_attention(h, c);
5081         /* Copy the error information out */
5082         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5083         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5084                 status = -EFAULT;
5085                 goto cleanup0;
5086         }
5087         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5088                 int i;
5089
5090                 /* Copy the data out of the buffer we created */
5091                 BYTE __user *ptr = ioc->buf;
5092                 for (i = 0; i < sg_used; i++) {
5093                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5094                                 status = -EFAULT;
5095                                 goto cleanup0;
5096                         }
5097                         ptr += buff_size[i];
5098                 }
5099         }
5100         status = 0;
5101 cleanup0:
5102         cmd_free(h, c);
5103 cleanup1:
5104         if (buff) {
5105                 int i;
5106
5107                 for (i = 0; i < sg_used; i++)
5108                         kfree(buff[i]);
5109                 kfree(buff);
5110         }
5111         kfree(buff_size);
5112         kfree(ioc);
5113         return status;
5114 }
5115
5116 static void check_ioctl_unit_attention(struct ctlr_info *h,
5117         struct CommandList *c)
5118 {
5119         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5120                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5121                 (void) check_for_unit_attention(h, c);
5122 }
5123
5124 /*
5125  * ioctl
5126  */
5127 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5128 {
5129         struct ctlr_info *h;
5130         void __user *argp = (void __user *)arg;
5131         int rc;
5132
5133         h = sdev_to_hba(dev);
5134
5135         switch (cmd) {
5136         case CCISS_DEREGDISK:
5137         case CCISS_REGNEWDISK:
5138         case CCISS_REGNEWD:
5139                 hpsa_scan_start(h->scsi_host);
5140                 return 0;
5141         case CCISS_GETPCIINFO:
5142                 return hpsa_getpciinfo_ioctl(h, argp);
5143         case CCISS_GETDRIVVER:
5144                 return hpsa_getdrivver_ioctl(h, argp);
5145         case CCISS_PASSTHRU:
5146                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5147                         return -EAGAIN;
5148                 rc = hpsa_passthru_ioctl(h, argp);
5149                 atomic_inc(&h->passthru_cmds_avail);
5150                 return rc;
5151         case CCISS_BIG_PASSTHRU:
5152                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5153                         return -EAGAIN;
5154                 rc = hpsa_big_passthru_ioctl(h, argp);
5155                 atomic_inc(&h->passthru_cmds_avail);
5156                 return rc;
5157         default:
5158                 return -ENOTTY;
5159         }
5160 }
5161
5162 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5163                                 u8 reset_type)
5164 {
5165         struct CommandList *c;
5166
5167         c = cmd_alloc(h);
5168         if (!c)
5169                 return -ENOMEM;
5170         /* fill_cmd can't fail here, no data buffer to map */
5171         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5172                 RAID_CTLR_LUNID, TYPE_MSG);
5173         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5174         c->waiting = NULL;
5175         enqueue_cmd_and_start_io(h, c);
5176         /* Don't wait for completion, the reset won't complete.  Don't free
5177          * the command either.  This is the last command we will send before
5178          * re-initializing everything, so it doesn't matter and won't leak.
5179          */
5180         return 0;
5181 }
5182
5183 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5184         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5185         int cmd_type)
5186 {
5187         int pci_dir = XFER_NONE;
5188         struct CommandList *a; /* for commands to be aborted */
5189
5190         c->cmd_type = CMD_IOCTL_PEND;
5191         c->Header.ReplyQueue = 0;
5192         if (buff != NULL && size > 0) {
5193                 c->Header.SGList = 1;
5194                 c->Header.SGTotal = cpu_to_le16(1);
5195         } else {
5196                 c->Header.SGList = 0;
5197                 c->Header.SGTotal = cpu_to_le16(0);
5198         }
5199         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5200
5201         if (cmd_type == TYPE_CMD) {
5202                 switch (cmd) {
5203                 case HPSA_INQUIRY:
5204                         /* are we trying to read a vital product page */
5205                         if (page_code & VPD_PAGE) {
5206                                 c->Request.CDB[1] = 0x01;
5207                                 c->Request.CDB[2] = (page_code & 0xff);
5208                         }
5209                         c->Request.CDBLen = 6;
5210                         c->Request.type_attr_dir =
5211                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5212                         c->Request.Timeout = 0;
5213                         c->Request.CDB[0] = HPSA_INQUIRY;
5214                         c->Request.CDB[4] = size & 0xFF;
5215                         break;
5216                 case HPSA_REPORT_LOG:
5217                 case HPSA_REPORT_PHYS:
5218                         /* Talking to controller so It's a physical command
5219                            mode = 00 target = 0.  Nothing to write.
5220                          */
5221                         c->Request.CDBLen = 12;
5222                         c->Request.type_attr_dir =
5223                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5224                         c->Request.Timeout = 0;
5225                         c->Request.CDB[0] = cmd;
5226                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5227                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5228                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5229                         c->Request.CDB[9] = size & 0xFF;
5230                         break;
5231                 case HPSA_CACHE_FLUSH:
5232                         c->Request.CDBLen = 12;
5233                         c->Request.type_attr_dir =
5234                                         TYPE_ATTR_DIR(cmd_type,
5235                                                 ATTR_SIMPLE, XFER_WRITE);
5236                         c->Request.Timeout = 0;
5237                         c->Request.CDB[0] = BMIC_WRITE;
5238                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5239                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5240                         c->Request.CDB[8] = size & 0xFF;
5241                         break;
5242                 case TEST_UNIT_READY:
5243                         c->Request.CDBLen = 6;
5244                         c->Request.type_attr_dir =
5245                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5246                         c->Request.Timeout = 0;
5247                         break;
5248                 case HPSA_GET_RAID_MAP:
5249                         c->Request.CDBLen = 12;
5250                         c->Request.type_attr_dir =
5251                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5252                         c->Request.Timeout = 0;
5253                         c->Request.CDB[0] = HPSA_CISS_READ;
5254                         c->Request.CDB[1] = cmd;
5255                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5256                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5257                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5258                         c->Request.CDB[9] = size & 0xFF;
5259                         break;
5260                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5261                         c->Request.CDBLen = 10;
5262                         c->Request.type_attr_dir =
5263                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5264                         c->Request.Timeout = 0;
5265                         c->Request.CDB[0] = BMIC_READ;
5266                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5267                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5268                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5269                         break;
5270                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
5271                         c->Request.CDBLen = 10;
5272                         c->Request.type_attr_dir =
5273                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5274                         c->Request.Timeout = 0;
5275                         c->Request.CDB[0] = BMIC_READ;
5276                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
5277                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5278                         c->Request.CDB[8] = (size >> 8) & 0XFF;
5279                         break;
5280                 default:
5281                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5282                         BUG();
5283                         return -1;
5284                 }
5285         } else if (cmd_type == TYPE_MSG) {
5286                 switch (cmd) {
5287
5288                 case  HPSA_DEVICE_RESET_MSG:
5289                         c->Request.CDBLen = 16;
5290                         c->Request.type_attr_dir =
5291                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5292                         c->Request.Timeout = 0; /* Don't time out */
5293                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5294                         c->Request.CDB[0] =  cmd;
5295                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5296                         /* If bytes 4-7 are zero, it means reset the */
5297                         /* LunID device */
5298                         c->Request.CDB[4] = 0x00;
5299                         c->Request.CDB[5] = 0x00;
5300                         c->Request.CDB[6] = 0x00;
5301                         c->Request.CDB[7] = 0x00;
5302                         break;
5303                 case  HPSA_ABORT_MSG:
5304                         a = buff;       /* point to command to be aborted */
5305                         dev_dbg(&h->pdev->dev,
5306                                 "Abort Tag:0x%016llx request Tag:0x%016llx",
5307                                 a->Header.tag, c->Header.tag);
5308                         c->Request.CDBLen = 16;
5309                         c->Request.type_attr_dir =
5310                                         TYPE_ATTR_DIR(cmd_type,
5311                                                 ATTR_SIMPLE, XFER_WRITE);
5312                         c->Request.Timeout = 0; /* Don't time out */
5313                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5314                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5315                         c->Request.CDB[2] = 0x00; /* reserved */
5316                         c->Request.CDB[3] = 0x00; /* reserved */
5317                         /* Tag to abort goes in CDB[4]-CDB[11] */
5318                         memcpy(&c->Request.CDB[4], &a->Header.tag,
5319                                 sizeof(a->Header.tag));
5320                         c->Request.CDB[12] = 0x00; /* reserved */
5321                         c->Request.CDB[13] = 0x00; /* reserved */
5322                         c->Request.CDB[14] = 0x00; /* reserved */
5323                         c->Request.CDB[15] = 0x00; /* reserved */
5324                 break;
5325                 default:
5326                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5327                                 cmd);
5328                         BUG();
5329                 }
5330         } else {
5331                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5332                 BUG();
5333         }
5334
5335         switch (GET_DIR(c->Request.type_attr_dir)) {
5336         case XFER_READ:
5337                 pci_dir = PCI_DMA_FROMDEVICE;
5338                 break;
5339         case XFER_WRITE:
5340                 pci_dir = PCI_DMA_TODEVICE;
5341                 break;
5342         case XFER_NONE:
5343                 pci_dir = PCI_DMA_NONE;
5344                 break;
5345         default:
5346                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5347         }
5348         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5349                 return -1;
5350         return 0;
5351 }
5352
5353 /*
5354  * Map (physical) PCI mem into (virtual) kernel space
5355  */
5356 static void __iomem *remap_pci_mem(ulong base, ulong size)
5357 {
5358         ulong page_base = ((ulong) base) & PAGE_MASK;
5359         ulong page_offs = ((ulong) base) - page_base;
5360         void __iomem *page_remapped = ioremap_nocache(page_base,
5361                 page_offs + size);
5362
5363         return page_remapped ? (page_remapped + page_offs) : NULL;
5364 }
5365
5366 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5367 {
5368         return h->access.command_completed(h, q);
5369 }
5370
5371 static inline bool interrupt_pending(struct ctlr_info *h)
5372 {
5373         return h->access.intr_pending(h);
5374 }
5375
5376 static inline long interrupt_not_for_us(struct ctlr_info *h)
5377 {
5378         return (h->access.intr_pending(h) == 0) ||
5379                 (h->interrupts_enabled == 0);
5380 }
5381
5382 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5383         u32 raw_tag)
5384 {
5385         if (unlikely(tag_index >= h->nr_cmds)) {
5386                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5387                 return 1;
5388         }
5389         return 0;
5390 }
5391
5392 static inline void finish_cmd(struct CommandList *c)
5393 {
5394         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5395         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5396                         || c->cmd_type == CMD_IOACCEL2))
5397                 complete_scsi_command(c);
5398         else if (c->cmd_type == CMD_IOCTL_PEND)
5399                 complete(c->waiting);
5400 }
5401
5402
5403 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5404 {
5405 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5406 #define HPSA_SIMPLE_ERROR_BITS 0x03
5407         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5408                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5409         return tag & ~HPSA_PERF_ERROR_BITS;
5410 }
5411
5412 /* process completion of an indexed ("direct lookup") command */
5413 static inline void process_indexed_cmd(struct ctlr_info *h,
5414         u32 raw_tag)
5415 {
5416         u32 tag_index;
5417         struct CommandList *c;
5418
5419         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
5420         if (!bad_tag(h, tag_index, raw_tag)) {
5421                 c = h->cmd_pool + tag_index;
5422                 finish_cmd(c);
5423         }
5424 }
5425
5426 /* Some controllers, like p400, will give us one interrupt
5427  * after a soft reset, even if we turned interrupts off.
5428  * Only need to check for this in the hpsa_xxx_discard_completions
5429  * functions.
5430  */
5431 static int ignore_bogus_interrupt(struct ctlr_info *h)
5432 {
5433         if (likely(!reset_devices))
5434                 return 0;
5435
5436         if (likely(h->interrupts_enabled))
5437                 return 0;
5438
5439         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5440                 "(known firmware bug.)  Ignoring.\n");
5441
5442         return 1;
5443 }
5444
5445 /*
5446  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5447  * Relies on (h-q[x] == x) being true for x such that
5448  * 0 <= x < MAX_REPLY_QUEUES.
5449  */
5450 static struct ctlr_info *queue_to_hba(u8 *queue)
5451 {
5452         return container_of((queue - *queue), struct ctlr_info, q[0]);
5453 }
5454
5455 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5456 {
5457         struct ctlr_info *h = queue_to_hba(queue);
5458         u8 q = *(u8 *) queue;
5459         u32 raw_tag;
5460
5461         if (ignore_bogus_interrupt(h))
5462                 return IRQ_NONE;
5463
5464         if (interrupt_not_for_us(h))
5465                 return IRQ_NONE;
5466         h->last_intr_timestamp = get_jiffies_64();
5467         while (interrupt_pending(h)) {
5468                 raw_tag = get_next_completion(h, q);
5469                 while (raw_tag != FIFO_EMPTY)
5470                         raw_tag = next_command(h, q);
5471         }
5472         return IRQ_HANDLED;
5473 }
5474
5475 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5476 {
5477         struct ctlr_info *h = queue_to_hba(queue);
5478         u32 raw_tag;
5479         u8 q = *(u8 *) queue;
5480
5481         if (ignore_bogus_interrupt(h))
5482                 return IRQ_NONE;
5483
5484         h->last_intr_timestamp = get_jiffies_64();
5485         raw_tag = get_next_completion(h, q);
5486         while (raw_tag != FIFO_EMPTY)
5487                 raw_tag = next_command(h, q);
5488         return IRQ_HANDLED;
5489 }
5490
5491 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5492 {
5493         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5494         u32 raw_tag;
5495         u8 q = *(u8 *) queue;
5496
5497         if (interrupt_not_for_us(h))
5498                 return IRQ_NONE;
5499         h->last_intr_timestamp = get_jiffies_64();
5500         while (interrupt_pending(h)) {
5501                 raw_tag = get_next_completion(h, q);
5502                 while (raw_tag != FIFO_EMPTY) {
5503                         process_indexed_cmd(h, raw_tag);
5504                         raw_tag = next_command(h, q);
5505                 }
5506         }
5507         return IRQ_HANDLED;
5508 }
5509
5510 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5511 {
5512         struct ctlr_info *h = queue_to_hba(queue);
5513         u32 raw_tag;
5514         u8 q = *(u8 *) queue;
5515
5516         h->last_intr_timestamp = get_jiffies_64();
5517         raw_tag = get_next_completion(h, q);
5518         while (raw_tag != FIFO_EMPTY) {
5519                 process_indexed_cmd(h, raw_tag);
5520                 raw_tag = next_command(h, q);
5521         }
5522         return IRQ_HANDLED;
5523 }
5524
5525 /* Send a message CDB to the firmware. Careful, this only works
5526  * in simple mode, not performant mode due to the tag lookup.
5527  * We only ever use this immediately after a controller reset.
5528  */
5529 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5530                         unsigned char type)
5531 {
5532         struct Command {
5533                 struct CommandListHeader CommandHeader;
5534                 struct RequestBlock Request;
5535                 struct ErrDescriptor ErrorDescriptor;
5536         };
5537         struct Command *cmd;
5538         static const size_t cmd_sz = sizeof(*cmd) +
5539                                         sizeof(cmd->ErrorDescriptor);
5540         dma_addr_t paddr64;
5541         __le32 paddr32;
5542         u32 tag;
5543         void __iomem *vaddr;
5544         int i, err;
5545
5546         vaddr = pci_ioremap_bar(pdev, 0);
5547         if (vaddr == NULL)
5548                 return -ENOMEM;
5549
5550         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5551          * CCISS commands, so they must be allocated from the lower 4GiB of
5552          * memory.
5553          */
5554         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5555         if (err) {
5556                 iounmap(vaddr);
5557                 return err;
5558         }
5559
5560         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5561         if (cmd == NULL) {
5562                 iounmap(vaddr);
5563                 return -ENOMEM;
5564         }
5565
5566         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5567          * although there's no guarantee, we assume that the address is at
5568          * least 4-byte aligned (most likely, it's page-aligned).
5569          */
5570         paddr32 = cpu_to_le32(paddr64);
5571
5572         cmd->CommandHeader.ReplyQueue = 0;
5573         cmd->CommandHeader.SGList = 0;
5574         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
5575         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
5576         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
5577
5578         cmd->Request.CDBLen = 16;
5579         cmd->Request.type_attr_dir =
5580                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
5581         cmd->Request.Timeout = 0; /* Don't time out */
5582         cmd->Request.CDB[0] = opcode;
5583         cmd->Request.CDB[1] = type;
5584         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5585         cmd->ErrorDescriptor.Addr =
5586                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
5587         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
5588
5589         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
5590
5591         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
5592                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
5593                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
5594                         break;
5595                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
5596         }
5597
5598         iounmap(vaddr);
5599
5600         /* we leak the DMA buffer here ... no choice since the controller could
5601          *  still complete the command.
5602          */
5603         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
5604                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
5605                         opcode, type);
5606                 return -ETIMEDOUT;
5607         }
5608
5609         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
5610
5611         if (tag & HPSA_ERROR_BIT) {
5612                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
5613                         opcode, type);
5614                 return -EIO;
5615         }
5616
5617         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
5618                 opcode, type);
5619         return 0;
5620 }
5621
5622 #define hpsa_noop(p) hpsa_message(p, 3, 0)
5623
5624 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
5625         void __iomem *vaddr, u32 use_doorbell)
5626 {
5627
5628         if (use_doorbell) {
5629                 /* For everything after the P600, the PCI power state method
5630                  * of resetting the controller doesn't work, so we have this
5631                  * other way using the doorbell register.
5632                  */
5633                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
5634                 writel(use_doorbell, vaddr + SA5_DOORBELL);
5635
5636                 /* PMC hardware guys tell us we need a 10 second delay after
5637                  * doorbell reset and before any attempt to talk to the board
5638                  * at all to ensure that this actually works and doesn't fall
5639                  * over in some weird corner cases.
5640                  */
5641                 msleep(10000);
5642         } else { /* Try to do it the PCI power state way */
5643
5644                 /* Quoting from the Open CISS Specification: "The Power
5645                  * Management Control/Status Register (CSR) controls the power
5646                  * state of the device.  The normal operating state is D0,
5647                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
5648                  * the controller, place the interface device in D3 then to D0,
5649                  * this causes a secondary PCI reset which will reset the
5650                  * controller." */
5651
5652                 int rc = 0;
5653
5654                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
5655
5656                 /* enter the D3hot power management state */
5657                 rc = pci_set_power_state(pdev, PCI_D3hot);
5658                 if (rc)
5659                         return rc;
5660
5661                 msleep(500);
5662
5663                 /* enter the D0 power management state */
5664                 rc = pci_set_power_state(pdev, PCI_D0);
5665                 if (rc)
5666                         return rc;
5667
5668                 /*
5669                  * The P600 requires a small delay when changing states.
5670                  * Otherwise we may think the board did not reset and we bail.
5671                  * This for kdump only and is particular to the P600.
5672                  */
5673                 msleep(500);
5674         }
5675         return 0;
5676 }
5677
5678 static void init_driver_version(char *driver_version, int len)
5679 {
5680         memset(driver_version, 0, len);
5681         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
5682 }
5683
5684 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
5685 {
5686         char *driver_version;
5687         int i, size = sizeof(cfgtable->driver_version);
5688
5689         driver_version = kmalloc(size, GFP_KERNEL);
5690         if (!driver_version)
5691                 return -ENOMEM;
5692
5693         init_driver_version(driver_version, size);
5694         for (i = 0; i < size; i++)
5695                 writeb(driver_version[i], &cfgtable->driver_version[i]);
5696         kfree(driver_version);
5697         return 0;
5698 }
5699
5700 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
5701                                           unsigned char *driver_ver)
5702 {
5703         int i;
5704
5705         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
5706                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
5707 }
5708
5709 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
5710 {
5711
5712         char *driver_ver, *old_driver_ver;
5713         int rc, size = sizeof(cfgtable->driver_version);
5714
5715         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
5716         if (!old_driver_ver)
5717                 return -ENOMEM;
5718         driver_ver = old_driver_ver + size;
5719
5720         /* After a reset, the 32 bytes of "driver version" in the cfgtable
5721          * should have been changed, otherwise we know the reset failed.
5722          */
5723         init_driver_version(old_driver_ver, size);
5724         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
5725         rc = !memcmp(driver_ver, old_driver_ver, size);
5726         kfree(old_driver_ver);
5727         return rc;
5728 }
5729 /* This does a hard reset of the controller using PCI power management
5730  * states or the using the doorbell register.
5731  */
5732 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
5733 {
5734         u64 cfg_offset;
5735         u32 cfg_base_addr;
5736         u64 cfg_base_addr_index;
5737         void __iomem *vaddr;
5738         unsigned long paddr;
5739         u32 misc_fw_support;
5740         int rc;
5741         struct CfgTable __iomem *cfgtable;
5742         u32 use_doorbell;
5743         u32 board_id;
5744         u16 command_register;
5745
5746         /* For controllers as old as the P600, this is very nearly
5747          * the same thing as
5748          *
5749          * pci_save_state(pci_dev);
5750          * pci_set_power_state(pci_dev, PCI_D3hot);
5751          * pci_set_power_state(pci_dev, PCI_D0);
5752          * pci_restore_state(pci_dev);
5753          *
5754          * For controllers newer than the P600, the pci power state
5755          * method of resetting doesn't work so we have another way
5756          * using the doorbell register.
5757          */
5758
5759         rc = hpsa_lookup_board_id(pdev, &board_id);
5760         if (rc < 0) {
5761                 dev_warn(&pdev->dev, "Board ID not found\n");
5762                 return rc;
5763         }
5764         if (!ctlr_is_resettable(board_id)) {
5765                 dev_warn(&pdev->dev, "Controller not resettable\n");
5766                 return -ENODEV;
5767         }
5768
5769         /* if controller is soft- but not hard resettable... */
5770         if (!ctlr_is_hard_resettable(board_id))
5771                 return -ENOTSUPP; /* try soft reset later. */
5772
5773         /* Save the PCI command register */
5774         pci_read_config_word(pdev, 4, &command_register);
5775         pci_save_state(pdev);
5776
5777         /* find the first memory BAR, so we can find the cfg table */
5778         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
5779         if (rc)
5780                 return rc;
5781         vaddr = remap_pci_mem(paddr, 0x250);
5782         if (!vaddr)
5783                 return -ENOMEM;
5784
5785         /* find cfgtable in order to check if reset via doorbell is supported */
5786         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
5787                                         &cfg_base_addr_index, &cfg_offset);
5788         if (rc)
5789                 goto unmap_vaddr;
5790         cfgtable = remap_pci_mem(pci_resource_start(pdev,
5791                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
5792         if (!cfgtable) {
5793                 rc = -ENOMEM;
5794                 goto unmap_vaddr;
5795         }
5796         rc = write_driver_ver_to_cfgtable(cfgtable);
5797         if (rc)
5798                 goto unmap_cfgtable;
5799
5800         /* If reset via doorbell register is supported, use that.
5801          * There are two such methods.  Favor the newest method.
5802          */
5803         misc_fw_support = readl(&cfgtable->misc_fw_support);
5804         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
5805         if (use_doorbell) {
5806                 use_doorbell = DOORBELL_CTLR_RESET2;
5807         } else {
5808                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
5809                 if (use_doorbell) {
5810                         dev_warn(&pdev->dev,
5811                                 "Soft reset not supported. Firmware update is required.\n");
5812                         rc = -ENOTSUPP; /* try soft reset */
5813                         goto unmap_cfgtable;
5814                 }
5815         }
5816
5817         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
5818         if (rc)
5819                 goto unmap_cfgtable;
5820
5821         pci_restore_state(pdev);
5822         pci_write_config_word(pdev, 4, command_register);
5823
5824         /* Some devices (notably the HP Smart Array 5i Controller)
5825            need a little pause here */
5826         msleep(HPSA_POST_RESET_PAUSE_MSECS);
5827
5828         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
5829         if (rc) {
5830                 dev_warn(&pdev->dev,
5831                         "Failed waiting for board to become ready after hard reset\n");
5832                 goto unmap_cfgtable;
5833         }
5834
5835         rc = controller_reset_failed(vaddr);
5836         if (rc < 0)
5837                 goto unmap_cfgtable;
5838         if (rc) {
5839                 dev_warn(&pdev->dev, "Unable to successfully reset "
5840                         "controller. Will try soft reset.\n");
5841                 rc = -ENOTSUPP;
5842         } else {
5843                 dev_info(&pdev->dev, "board ready after hard reset.\n");
5844         }
5845
5846 unmap_cfgtable:
5847         iounmap(cfgtable);
5848
5849 unmap_vaddr:
5850         iounmap(vaddr);
5851         return rc;
5852 }
5853
5854 /*
5855  *  We cannot read the structure directly, for portability we must use
5856  *   the io functions.
5857  *   This is for debug only.
5858  */
5859 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
5860 {
5861 #ifdef HPSA_DEBUG
5862         int i;
5863         char temp_name[17];
5864
5865         dev_info(dev, "Controller Configuration information\n");
5866         dev_info(dev, "------------------------------------\n");
5867         for (i = 0; i < 4; i++)
5868                 temp_name[i] = readb(&(tb->Signature[i]));
5869         temp_name[4] = '\0';
5870         dev_info(dev, "   Signature = %s\n", temp_name);
5871         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
5872         dev_info(dev, "   Transport methods supported = 0x%x\n",
5873                readl(&(tb->TransportSupport)));
5874         dev_info(dev, "   Transport methods active = 0x%x\n",
5875                readl(&(tb->TransportActive)));
5876         dev_info(dev, "   Requested transport Method = 0x%x\n",
5877                readl(&(tb->HostWrite.TransportRequest)));
5878         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
5879                readl(&(tb->HostWrite.CoalIntDelay)));
5880         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
5881                readl(&(tb->HostWrite.CoalIntCount)));
5882         dev_info(dev, "   Max outstanding commands = %d\n",
5883                readl(&(tb->CmdsOutMax)));
5884         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
5885         for (i = 0; i < 16; i++)
5886                 temp_name[i] = readb(&(tb->ServerName[i]));
5887         temp_name[16] = '\0';
5888         dev_info(dev, "   Server Name = %s\n", temp_name);
5889         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
5890                 readl(&(tb->HeartBeat)));
5891 #endif                          /* HPSA_DEBUG */
5892 }
5893
5894 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
5895 {
5896         int i, offset, mem_type, bar_type;
5897
5898         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
5899                 return 0;
5900         offset = 0;
5901         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
5902                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
5903                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
5904                         offset += 4;
5905                 else {
5906                         mem_type = pci_resource_flags(pdev, i) &
5907                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
5908                         switch (mem_type) {
5909                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
5910                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
5911                                 offset += 4;    /* 32 bit */
5912                                 break;
5913                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
5914                                 offset += 8;
5915                                 break;
5916                         default:        /* reserved in PCI 2.2 */
5917                                 dev_warn(&pdev->dev,
5918                                        "base address is invalid\n");
5919                                 return -1;
5920                                 break;
5921                         }
5922                 }
5923                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
5924                         return i + 1;
5925         }
5926         return -1;
5927 }
5928
5929 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
5930  * controllers that are capable. If not, we use legacy INTx mode.
5931  */
5932
5933 static void hpsa_interrupt_mode(struct ctlr_info *h)
5934 {
5935 #ifdef CONFIG_PCI_MSI
5936         int err, i;
5937         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
5938
5939         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
5940                 hpsa_msix_entries[i].vector = 0;
5941                 hpsa_msix_entries[i].entry = i;
5942         }
5943
5944         /* Some boards advertise MSI but don't really support it */
5945         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
5946             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
5947                 goto default_int_mode;
5948         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
5949                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
5950                 h->msix_vector = MAX_REPLY_QUEUES;
5951                 if (h->msix_vector > num_online_cpus())
5952                         h->msix_vector = num_online_cpus();
5953                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
5954                                             1, h->msix_vector);
5955                 if (err < 0) {
5956                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
5957                         h->msix_vector = 0;
5958                         goto single_msi_mode;
5959                 } else if (err < h->msix_vector) {
5960                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
5961                                "available\n", err);
5962                 }
5963                 h->msix_vector = err;
5964                 for (i = 0; i < h->msix_vector; i++)
5965                         h->intr[i] = hpsa_msix_entries[i].vector;
5966                 return;
5967         }
5968 single_msi_mode:
5969         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
5970                 dev_info(&h->pdev->dev, "MSI capable controller\n");
5971                 if (!pci_enable_msi(h->pdev))
5972                         h->msi_vector = 1;
5973                 else
5974                         dev_warn(&h->pdev->dev, "MSI init failed\n");
5975         }
5976 default_int_mode:
5977 #endif                          /* CONFIG_PCI_MSI */
5978         /* if we get here we're going to use the default interrupt mode */
5979         h->intr[h->intr_mode] = h->pdev->irq;
5980 }
5981
5982 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
5983 {
5984         int i;
5985         u32 subsystem_vendor_id, subsystem_device_id;
5986
5987         subsystem_vendor_id = pdev->subsystem_vendor;
5988         subsystem_device_id = pdev->subsystem_device;
5989         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
5990                     subsystem_vendor_id;
5991
5992         for (i = 0; i < ARRAY_SIZE(products); i++)
5993                 if (*board_id == products[i].board_id)
5994                         return i;
5995
5996         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
5997                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
5998                 !hpsa_allow_any) {
5999                 dev_warn(&pdev->dev, "unrecognized board ID: "
6000                         "0x%08x, ignoring.\n", *board_id);
6001                         return -ENODEV;
6002         }
6003         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6004 }
6005
6006 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6007                                     unsigned long *memory_bar)
6008 {
6009         int i;
6010
6011         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6012                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6013                         /* addressing mode bits already removed */
6014                         *memory_bar = pci_resource_start(pdev, i);
6015                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6016                                 *memory_bar);
6017                         return 0;
6018                 }
6019         dev_warn(&pdev->dev, "no memory BAR found\n");
6020         return -ENODEV;
6021 }
6022
6023 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6024                                      int wait_for_ready)
6025 {
6026         int i, iterations;
6027         u32 scratchpad;
6028         if (wait_for_ready)
6029                 iterations = HPSA_BOARD_READY_ITERATIONS;
6030         else
6031                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6032
6033         for (i = 0; i < iterations; i++) {
6034                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6035                 if (wait_for_ready) {
6036                         if (scratchpad == HPSA_FIRMWARE_READY)
6037                                 return 0;
6038                 } else {
6039                         if (scratchpad != HPSA_FIRMWARE_READY)
6040                                 return 0;
6041                 }
6042                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6043         }
6044         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6045         return -ENODEV;
6046 }
6047
6048 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6049                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6050                                u64 *cfg_offset)
6051 {
6052         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6053         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6054         *cfg_base_addr &= (u32) 0x0000ffff;
6055         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6056         if (*cfg_base_addr_index == -1) {
6057                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6058                 return -ENODEV;
6059         }
6060         return 0;
6061 }
6062
6063 static int hpsa_find_cfgtables(struct ctlr_info *h)
6064 {
6065         u64 cfg_offset;
6066         u32 cfg_base_addr;
6067         u64 cfg_base_addr_index;
6068         u32 trans_offset;
6069         int rc;
6070
6071         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6072                 &cfg_base_addr_index, &cfg_offset);
6073         if (rc)
6074                 return rc;
6075         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6076                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6077         if (!h->cfgtable) {
6078                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6079                 return -ENOMEM;
6080         }
6081         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6082         if (rc)
6083                 return rc;
6084         /* Find performant mode table. */
6085         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6086         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6087                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6088                                 sizeof(*h->transtable));
6089         if (!h->transtable)
6090                 return -ENOMEM;
6091         return 0;
6092 }
6093
6094 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6095 {
6096         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
6097
6098         /* Limit commands in memory limited kdump scenario. */
6099         if (reset_devices && h->max_commands > 32)
6100                 h->max_commands = 32;
6101
6102         if (h->max_commands < 16) {
6103                 dev_warn(&h->pdev->dev, "Controller reports "
6104                         "max supported commands of %d, an obvious lie. "
6105                         "Using 16.  Ensure that firmware is up to date.\n",
6106                         h->max_commands);
6107                 h->max_commands = 16;
6108         }
6109 }
6110
6111 /* If the controller reports that the total max sg entries is greater than 512,
6112  * then we know that chained SG blocks work.  (Original smart arrays did not
6113  * support chained SG blocks and would return zero for max sg entries.)
6114  */
6115 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
6116 {
6117         return h->maxsgentries > 512;
6118 }
6119
6120 /* Interrogate the hardware for some limits:
6121  * max commands, max SG elements without chaining, and with chaining,
6122  * SG chain block size, etc.
6123  */
6124 static void hpsa_find_board_params(struct ctlr_info *h)
6125 {
6126         hpsa_get_max_perf_mode_cmds(h);
6127         h->nr_cmds = h->max_commands;
6128         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6129         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6130         if (hpsa_supports_chained_sg_blocks(h)) {
6131                 /* Limit in-command s/g elements to 32 save dma'able memory. */
6132                 h->max_cmd_sg_entries = 32;
6133                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6134                 h->maxsgentries--; /* save one for chain pointer */
6135         } else {
6136                 /*
6137                  * Original smart arrays supported at most 31 s/g entries
6138                  * embedded inline in the command (trying to use more
6139                  * would lock up the controller)
6140                  */
6141                 h->max_cmd_sg_entries = 31;
6142                 h->maxsgentries = 31; /* default to traditional values */
6143                 h->chainsize = 0;
6144         }
6145
6146         /* Find out what task management functions are supported and cache */
6147         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6148         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6149                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6150         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6151                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6152 }
6153
6154 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6155 {
6156         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6157                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6158                 return false;
6159         }
6160         return true;
6161 }
6162
6163 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6164 {
6165         u32 driver_support;
6166
6167         driver_support = readl(&(h->cfgtable->driver_support));
6168         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6169 #ifdef CONFIG_X86
6170         driver_support |= ENABLE_SCSI_PREFETCH;
6171 #endif
6172         driver_support |= ENABLE_UNIT_ATTN;
6173         writel(driver_support, &(h->cfgtable->driver_support));
6174 }
6175
6176 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6177  * in a prefetch beyond physical memory.
6178  */
6179 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6180 {
6181         u32 dma_prefetch;
6182
6183         if (h->board_id != 0x3225103C)
6184                 return;
6185         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6186         dma_prefetch |= 0x8000;
6187         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6188 }
6189
6190 static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6191 {
6192         int i;
6193         u32 doorbell_value;
6194         unsigned long flags;
6195         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6196         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6197                 spin_lock_irqsave(&h->lock, flags);
6198                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6199                 spin_unlock_irqrestore(&h->lock, flags);
6200                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6201                         break;
6202                 /* delay and try again */
6203                 msleep(20);
6204         }
6205 }
6206
6207 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6208 {
6209         int i;
6210         u32 doorbell_value;
6211         unsigned long flags;
6212
6213         /* under certain very rare conditions, this can take awhile.
6214          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6215          * as we enter this code.)
6216          */
6217         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6218                 spin_lock_irqsave(&h->lock, flags);
6219                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6220                 spin_unlock_irqrestore(&h->lock, flags);
6221                 if (!(doorbell_value & CFGTBL_ChangeReq))
6222                         break;
6223                 /* delay and try again */
6224                 usleep_range(10000, 20000);
6225         }
6226 }
6227
6228 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6229 {
6230         u32 trans_support;
6231
6232         trans_support = readl(&(h->cfgtable->TransportSupport));
6233         if (!(trans_support & SIMPLE_MODE))
6234                 return -ENOTSUPP;
6235
6236         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6237
6238         /* Update the field, and then ring the doorbell */
6239         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6240         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6241         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6242         hpsa_wait_for_mode_change_ack(h);
6243         print_cfg_table(&h->pdev->dev, h->cfgtable);
6244         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6245                 goto error;
6246         h->transMethod = CFGTBL_Trans_Simple;
6247         return 0;
6248 error:
6249         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
6250         return -ENODEV;
6251 }
6252
6253 static int hpsa_pci_init(struct ctlr_info *h)
6254 {
6255         int prod_index, err;
6256
6257         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6258         if (prod_index < 0)
6259                 return prod_index;
6260         h->product_name = products[prod_index].product_name;
6261         h->access = *(products[prod_index].access);
6262
6263         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6264                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6265
6266         err = pci_enable_device(h->pdev);
6267         if (err) {
6268                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6269                 return err;
6270         }
6271
6272         err = pci_request_regions(h->pdev, HPSA);
6273         if (err) {
6274                 dev_err(&h->pdev->dev,
6275                         "cannot obtain PCI resources, aborting\n");
6276                 return err;
6277         }
6278
6279         pci_set_master(h->pdev);
6280
6281         hpsa_interrupt_mode(h);
6282         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6283         if (err)
6284                 goto err_out_free_res;
6285         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6286         if (!h->vaddr) {
6287                 err = -ENOMEM;
6288                 goto err_out_free_res;
6289         }
6290         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6291         if (err)
6292                 goto err_out_free_res;
6293         err = hpsa_find_cfgtables(h);
6294         if (err)
6295                 goto err_out_free_res;
6296         hpsa_find_board_params(h);
6297
6298         if (!hpsa_CISS_signature_present(h)) {
6299                 err = -ENODEV;
6300                 goto err_out_free_res;
6301         }
6302         hpsa_set_driver_support_bits(h);
6303         hpsa_p600_dma_prefetch_quirk(h);
6304         err = hpsa_enter_simple_mode(h);
6305         if (err)
6306                 goto err_out_free_res;
6307         return 0;
6308
6309 err_out_free_res:
6310         if (h->transtable)
6311                 iounmap(h->transtable);
6312         if (h->cfgtable)
6313                 iounmap(h->cfgtable);
6314         if (h->vaddr)
6315                 iounmap(h->vaddr);
6316         pci_disable_device(h->pdev);
6317         pci_release_regions(h->pdev);
6318         return err;
6319 }
6320
6321 static void hpsa_hba_inquiry(struct ctlr_info *h)
6322 {
6323         int rc;
6324
6325 #define HBA_INQUIRY_BYTE_COUNT 64
6326         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6327         if (!h->hba_inquiry_data)
6328                 return;
6329         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6330                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6331         if (rc != 0) {
6332                 kfree(h->hba_inquiry_data);
6333                 h->hba_inquiry_data = NULL;
6334         }
6335 }
6336
6337 static int hpsa_init_reset_devices(struct pci_dev *pdev)
6338 {
6339         int rc, i;
6340         void __iomem *vaddr;
6341
6342         if (!reset_devices)
6343                 return 0;
6344
6345         /* kdump kernel is loading, we don't know in which state is
6346          * the pci interface. The dev->enable_cnt is equal zero
6347          * so we call enable+disable, wait a while and switch it on.
6348          */
6349         rc = pci_enable_device(pdev);
6350         if (rc) {
6351                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6352                 return -ENODEV;
6353         }
6354         pci_disable_device(pdev);
6355         msleep(260);                    /* a randomly chosen number */
6356         rc = pci_enable_device(pdev);
6357         if (rc) {
6358                 dev_warn(&pdev->dev, "failed to enable device.\n");
6359                 return -ENODEV;
6360         }
6361
6362         pci_set_master(pdev);
6363
6364         vaddr = pci_ioremap_bar(pdev, 0);
6365         if (vaddr == NULL) {
6366                 rc = -ENOMEM;
6367                 goto out_disable;
6368         }
6369         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
6370         iounmap(vaddr);
6371
6372         /* Reset the controller with a PCI power-cycle or via doorbell */
6373         rc = hpsa_kdump_hard_reset_controller(pdev);
6374
6375         /* -ENOTSUPP here means we cannot reset the controller
6376          * but it's already (and still) up and running in
6377          * "performant mode".  Or, it might be 640x, which can't reset
6378          * due to concerns about shared bbwc between 6402/6404 pair.
6379          */
6380         if (rc)
6381                 goto out_disable;
6382
6383         /* Now try to get the controller to respond to a no-op */
6384         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
6385         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6386                 if (hpsa_noop(pdev) == 0)
6387                         break;
6388                 else
6389                         dev_warn(&pdev->dev, "no-op failed%s\n",
6390                                         (i < 11 ? "; re-trying" : ""));
6391         }
6392
6393 out_disable:
6394
6395         pci_disable_device(pdev);
6396         return rc;
6397 }
6398
6399 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
6400 {
6401         h->cmd_pool_bits = kzalloc(
6402                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6403                 sizeof(unsigned long), GFP_KERNEL);
6404         h->cmd_pool = pci_alloc_consistent(h->pdev,
6405                     h->nr_cmds * sizeof(*h->cmd_pool),
6406                     &(h->cmd_pool_dhandle));
6407         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6408                     h->nr_cmds * sizeof(*h->errinfo_pool),
6409                     &(h->errinfo_pool_dhandle));
6410         if ((h->cmd_pool_bits == NULL)
6411             || (h->cmd_pool == NULL)
6412             || (h->errinfo_pool == NULL)) {
6413                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6414                 goto clean_up;
6415         }
6416         return 0;
6417 clean_up:
6418         hpsa_free_cmd_pool(h);
6419         return -ENOMEM;
6420 }
6421
6422 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6423 {
6424         kfree(h->cmd_pool_bits);
6425         if (h->cmd_pool)
6426                 pci_free_consistent(h->pdev,
6427                             h->nr_cmds * sizeof(struct CommandList),
6428                             h->cmd_pool, h->cmd_pool_dhandle);
6429         if (h->ioaccel2_cmd_pool)
6430                 pci_free_consistent(h->pdev,
6431                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6432                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6433         if (h->errinfo_pool)
6434                 pci_free_consistent(h->pdev,
6435                             h->nr_cmds * sizeof(struct ErrorInfo),
6436                             h->errinfo_pool,
6437                             h->errinfo_pool_dhandle);
6438         if (h->ioaccel_cmd_pool)
6439                 pci_free_consistent(h->pdev,
6440                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6441                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6442 }
6443
6444 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6445 {
6446         int i, cpu;
6447
6448         cpu = cpumask_first(cpu_online_mask);
6449         for (i = 0; i < h->msix_vector; i++) {
6450                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6451                 cpu = cpumask_next(cpu, cpu_online_mask);
6452         }
6453 }
6454
6455 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
6456 static void hpsa_free_irqs(struct ctlr_info *h)
6457 {
6458         int i;
6459
6460         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6461                 /* Single reply queue, only one irq to free */
6462                 i = h->intr_mode;
6463                 irq_set_affinity_hint(h->intr[i], NULL);
6464                 free_irq(h->intr[i], &h->q[i]);
6465                 return;
6466         }
6467
6468         for (i = 0; i < h->msix_vector; i++) {
6469                 irq_set_affinity_hint(h->intr[i], NULL);
6470                 free_irq(h->intr[i], &h->q[i]);
6471         }
6472         for (; i < MAX_REPLY_QUEUES; i++)
6473                 h->q[i] = 0;
6474 }
6475
6476 /* returns 0 on success; cleans up and returns -Enn on error */
6477 static int hpsa_request_irqs(struct ctlr_info *h,
6478         irqreturn_t (*msixhandler)(int, void *),
6479         irqreturn_t (*intxhandler)(int, void *))
6480 {
6481         int rc, i;
6482
6483         /*
6484          * initialize h->q[x] = x so that interrupt handlers know which
6485          * queue to process.
6486          */
6487         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6488                 h->q[i] = (u8) i;
6489
6490         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6491                 /* If performant mode and MSI-X, use multiple reply queues */
6492                 for (i = 0; i < h->msix_vector; i++) {
6493                         rc = request_irq(h->intr[i], msixhandler,
6494                                         0, h->devname,
6495                                         &h->q[i]);
6496                         if (rc) {
6497                                 int j;
6498
6499                                 dev_err(&h->pdev->dev,
6500                                         "failed to get irq %d for %s\n",
6501                                        h->intr[i], h->devname);
6502                                 for (j = 0; j < i; j++) {
6503                                         free_irq(h->intr[j], &h->q[j]);
6504                                         h->q[j] = 0;
6505                                 }
6506                                 for (; j < MAX_REPLY_QUEUES; j++)
6507                                         h->q[j] = 0;
6508                                 return rc;
6509                         }
6510                 }
6511                 hpsa_irq_affinity_hints(h);
6512         } else {
6513                 /* Use single reply pool */
6514                 if (h->msix_vector > 0 || h->msi_vector) {
6515                         rc = request_irq(h->intr[h->intr_mode],
6516                                 msixhandler, 0, h->devname,
6517                                 &h->q[h->intr_mode]);
6518                 } else {
6519                         rc = request_irq(h->intr[h->intr_mode],
6520                                 intxhandler, IRQF_SHARED, h->devname,
6521                                 &h->q[h->intr_mode]);
6522                 }
6523         }
6524         if (rc) {
6525                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6526                        h->intr[h->intr_mode], h->devname);
6527                 return -ENODEV;
6528         }
6529         return 0;
6530 }
6531
6532 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6533 {
6534         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6535                 HPSA_RESET_TYPE_CONTROLLER)) {
6536                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6537                 return -EIO;
6538         }
6539
6540         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6541         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6542                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6543                 return -1;
6544         }
6545
6546         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6547         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6548                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6549                         "after soft reset.\n");
6550                 return -1;
6551         }
6552
6553         return 0;
6554 }
6555
6556 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6557 {
6558         hpsa_free_irqs(h);
6559 #ifdef CONFIG_PCI_MSI
6560         if (h->msix_vector) {
6561                 if (h->pdev->msix_enabled)
6562                         pci_disable_msix(h->pdev);
6563         } else if (h->msi_vector) {
6564                 if (h->pdev->msi_enabled)
6565                         pci_disable_msi(h->pdev);
6566         }
6567 #endif /* CONFIG_PCI_MSI */
6568 }
6569
6570 static void hpsa_free_reply_queues(struct ctlr_info *h)
6571 {
6572         int i;
6573
6574         for (i = 0; i < h->nreply_queues; i++) {
6575                 if (!h->reply_queue[i].head)
6576                         continue;
6577                 pci_free_consistent(h->pdev, h->reply_queue_size,
6578                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
6579                 h->reply_queue[i].head = NULL;
6580                 h->reply_queue[i].busaddr = 0;
6581         }
6582 }
6583
6584 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
6585 {
6586         hpsa_free_irqs_and_disable_msix(h);
6587         hpsa_free_sg_chain_blocks(h);
6588         hpsa_free_cmd_pool(h);
6589         kfree(h->ioaccel1_blockFetchTable);
6590         kfree(h->blockFetchTable);
6591         hpsa_free_reply_queues(h);
6592         if (h->vaddr)
6593                 iounmap(h->vaddr);
6594         if (h->transtable)
6595                 iounmap(h->transtable);
6596         if (h->cfgtable)
6597                 iounmap(h->cfgtable);
6598         pci_disable_device(h->pdev);
6599         pci_release_regions(h->pdev);
6600         kfree(h);
6601 }
6602
6603 /* Called when controller lockup detected. */
6604 static void fail_all_outstanding_cmds(struct ctlr_info *h)
6605 {
6606         int i, refcount;
6607         struct CommandList *c;
6608
6609         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
6610         for (i = 0; i < h->nr_cmds; i++) {
6611                 c = h->cmd_pool + i;
6612                 refcount = atomic_inc_return(&c->refcount);
6613                 if (refcount > 1) {
6614                         c->err_info->CommandStatus = CMD_HARDWARE_ERR;
6615                         finish_cmd(c);
6616                 }
6617                 cmd_free(h, c);
6618         }
6619 }
6620
6621 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
6622 {
6623         int i, cpu;
6624
6625         cpu = cpumask_first(cpu_online_mask);
6626         for (i = 0; i < num_online_cpus(); i++) {
6627                 u32 *lockup_detected;
6628                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
6629                 *lockup_detected = value;
6630                 cpu = cpumask_next(cpu, cpu_online_mask);
6631         }
6632         wmb(); /* be sure the per-cpu variables are out to memory */
6633 }
6634
6635 static void controller_lockup_detected(struct ctlr_info *h)
6636 {
6637         unsigned long flags;
6638         u32 lockup_detected;
6639
6640         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6641         spin_lock_irqsave(&h->lock, flags);
6642         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
6643         if (!lockup_detected) {
6644                 /* no heartbeat, but controller gave us a zero. */
6645                 dev_warn(&h->pdev->dev,
6646                         "lockup detected but scratchpad register is zero\n");
6647                 lockup_detected = 0xffffffff;
6648         }
6649         set_lockup_detected_for_all_cpus(h, lockup_detected);
6650         spin_unlock_irqrestore(&h->lock, flags);
6651         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
6652                         lockup_detected);
6653         pci_disable_device(h->pdev);
6654         fail_all_outstanding_cmds(h);
6655 }
6656
6657 static void detect_controller_lockup(struct ctlr_info *h)
6658 {
6659         u64 now;
6660         u32 heartbeat;
6661         unsigned long flags;
6662
6663         now = get_jiffies_64();
6664         /* If we've received an interrupt recently, we're ok. */
6665         if (time_after64(h->last_intr_timestamp +
6666                                 (h->heartbeat_sample_interval), now))
6667                 return;
6668
6669         /*
6670          * If we've already checked the heartbeat recently, we're ok.
6671          * This could happen if someone sends us a signal. We
6672          * otherwise don't care about signals in this thread.
6673          */
6674         if (time_after64(h->last_heartbeat_timestamp +
6675                                 (h->heartbeat_sample_interval), now))
6676                 return;
6677
6678         /* If heartbeat has not changed since we last looked, we're not ok. */
6679         spin_lock_irqsave(&h->lock, flags);
6680         heartbeat = readl(&h->cfgtable->HeartBeat);
6681         spin_unlock_irqrestore(&h->lock, flags);
6682         if (h->last_heartbeat == heartbeat) {
6683                 controller_lockup_detected(h);
6684                 return;
6685         }
6686
6687         /* We're ok. */
6688         h->last_heartbeat = heartbeat;
6689         h->last_heartbeat_timestamp = now;
6690 }
6691
6692 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
6693 {
6694         int i;
6695         char *event_type;
6696
6697         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6698                 return;
6699
6700         /* Ask the controller to clear the events we're handling. */
6701         if ((h->transMethod & (CFGTBL_Trans_io_accel1
6702                         | CFGTBL_Trans_io_accel2)) &&
6703                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
6704                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
6705
6706                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
6707                         event_type = "state change";
6708                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
6709                         event_type = "configuration change";
6710                 /* Stop sending new RAID offload reqs via the IO accelerator */
6711                 scsi_block_requests(h->scsi_host);
6712                 for (i = 0; i < h->ndevices; i++)
6713                         h->dev[i]->offload_enabled = 0;
6714                 hpsa_drain_accel_commands(h);
6715                 /* Set 'accelerator path config change' bit */
6716                 dev_warn(&h->pdev->dev,
6717                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
6718                         h->events, event_type);
6719                 writel(h->events, &(h->cfgtable->clear_event_notify));
6720                 /* Set the "clear event notify field update" bit 6 */
6721                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6722                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
6723                 hpsa_wait_for_clear_event_notify_ack(h);
6724                 scsi_unblock_requests(h->scsi_host);
6725         } else {
6726                 /* Acknowledge controller notification events. */
6727                 writel(h->events, &(h->cfgtable->clear_event_notify));
6728                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6729                 hpsa_wait_for_clear_event_notify_ack(h);
6730 #if 0
6731                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6732                 hpsa_wait_for_mode_change_ack(h);
6733 #endif
6734         }
6735         return;
6736 }
6737
6738 /* Check a register on the controller to see if there are configuration
6739  * changes (added/changed/removed logical drives, etc.) which mean that
6740  * we should rescan the controller for devices.
6741  * Also check flag for driver-initiated rescan.
6742  */
6743 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
6744 {
6745         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6746                 return 0;
6747
6748         h->events = readl(&(h->cfgtable->event_notify));
6749         return h->events & RESCAN_REQUIRED_EVENT_BITS;
6750 }
6751
6752 /*
6753  * Check if any of the offline devices have become ready
6754  */
6755 static int hpsa_offline_devices_ready(struct ctlr_info *h)
6756 {
6757         unsigned long flags;
6758         struct offline_device_entry *d;
6759         struct list_head *this, *tmp;
6760
6761         spin_lock_irqsave(&h->offline_device_lock, flags);
6762         list_for_each_safe(this, tmp, &h->offline_device_list) {
6763                 d = list_entry(this, struct offline_device_entry,
6764                                 offline_list);
6765                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
6766                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
6767                         spin_lock_irqsave(&h->offline_device_lock, flags);
6768                         list_del(&d->offline_list);
6769                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6770                         return 1;
6771                 }
6772                 spin_lock_irqsave(&h->offline_device_lock, flags);
6773         }
6774         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6775         return 0;
6776 }
6777
6778
6779 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
6780 {
6781         unsigned long flags;
6782         struct ctlr_info *h = container_of(to_delayed_work(work),
6783                                         struct ctlr_info, monitor_ctlr_work);
6784         detect_controller_lockup(h);
6785         if (lockup_detected(h))
6786                 return;
6787
6788         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
6789                 scsi_host_get(h->scsi_host);
6790                 hpsa_ack_ctlr_events(h);
6791                 hpsa_scan_start(h->scsi_host);
6792                 scsi_host_put(h->scsi_host);
6793         }
6794
6795         spin_lock_irqsave(&h->lock, flags);
6796         if (h->remove_in_progress) {
6797                 spin_unlock_irqrestore(&h->lock, flags);
6798                 return;
6799         }
6800         schedule_delayed_work(&h->monitor_ctlr_work,
6801                                 h->heartbeat_sample_interval);
6802         spin_unlock_irqrestore(&h->lock, flags);
6803 }
6804
6805 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6806 {
6807         int dac, rc;
6808         struct ctlr_info *h;
6809         int try_soft_reset = 0;
6810         unsigned long flags;
6811
6812         if (number_of_controllers == 0)
6813                 printk(KERN_INFO DRIVER_NAME "\n");
6814
6815         rc = hpsa_init_reset_devices(pdev);
6816         if (rc) {
6817                 if (rc != -ENOTSUPP)
6818                         return rc;
6819                 /* If the reset fails in a particular way (it has no way to do
6820                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
6821                  * a soft reset once we get the controller configured up to the
6822                  * point that it can accept a command.
6823                  */
6824                 try_soft_reset = 1;
6825                 rc = 0;
6826         }
6827
6828 reinit_after_soft_reset:
6829
6830         /* Command structures must be aligned on a 32-byte boundary because
6831          * the 5 lower bits of the address are used by the hardware. and by
6832          * the driver.  See comments in hpsa.h for more info.
6833          */
6834         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
6835         h = kzalloc(sizeof(*h), GFP_KERNEL);
6836         if (!h)
6837                 return -ENOMEM;
6838
6839         h->pdev = pdev;
6840         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
6841         INIT_LIST_HEAD(&h->offline_device_list);
6842         spin_lock_init(&h->lock);
6843         spin_lock_init(&h->offline_device_lock);
6844         spin_lock_init(&h->scan_lock);
6845         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
6846
6847         h->resubmit_wq = alloc_workqueue("hpsa", WQ_MEM_RECLAIM, 0);
6848         if (!h->resubmit_wq) {
6849                 dev_err(&h->pdev->dev, "Failed to allocate work queue\n");
6850                 rc = -ENOMEM;
6851                 goto clean1;
6852         }
6853         /* Allocate and clear per-cpu variable lockup_detected */
6854         h->lockup_detected = alloc_percpu(u32);
6855         if (!h->lockup_detected) {
6856                 rc = -ENOMEM;
6857                 goto clean1;
6858         }
6859         set_lockup_detected_for_all_cpus(h, 0);
6860
6861         rc = hpsa_pci_init(h);
6862         if (rc != 0)
6863                 goto clean1;
6864
6865         sprintf(h->devname, HPSA "%d", number_of_controllers);
6866         h->ctlr = number_of_controllers;
6867         number_of_controllers++;
6868
6869         /* configure PCI DMA stuff */
6870         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6871         if (rc == 0) {
6872                 dac = 1;
6873         } else {
6874                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6875                 if (rc == 0) {
6876                         dac = 0;
6877                 } else {
6878                         dev_err(&pdev->dev, "no suitable DMA available\n");
6879                         goto clean1;
6880                 }
6881         }
6882
6883         /* make sure the board interrupts are off */
6884         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6885
6886         if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
6887                 goto clean2;
6888         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
6889                h->devname, pdev->device,
6890                h->intr[h->intr_mode], dac ? "" : " not");
6891         rc = hpsa_allocate_cmd_pool(h);
6892         if (rc)
6893                 goto clean2_and_free_irqs;
6894         if (hpsa_allocate_sg_chain_blocks(h))
6895                 goto clean4;
6896         init_waitqueue_head(&h->scan_wait_queue);
6897         h->scan_finished = 1; /* no scan currently in progress */
6898
6899         pci_set_drvdata(pdev, h);
6900         h->ndevices = 0;
6901         h->hba_mode_enabled = 0;
6902         h->scsi_host = NULL;
6903         spin_lock_init(&h->devlock);
6904         hpsa_put_ctlr_into_performant_mode(h);
6905
6906         /* At this point, the controller is ready to take commands.
6907          * Now, if reset_devices and the hard reset didn't work, try
6908          * the soft reset and see if that works.
6909          */
6910         if (try_soft_reset) {
6911
6912                 /* This is kind of gross.  We may or may not get a completion
6913                  * from the soft reset command, and if we do, then the value
6914                  * from the fifo may or may not be valid.  So, we wait 10 secs
6915                  * after the reset throwing away any completions we get during
6916                  * that time.  Unregister the interrupt handler and register
6917                  * fake ones to scoop up any residual completions.
6918                  */
6919                 spin_lock_irqsave(&h->lock, flags);
6920                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
6921                 spin_unlock_irqrestore(&h->lock, flags);
6922                 hpsa_free_irqs(h);
6923                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
6924                                         hpsa_intx_discard_completions);
6925                 if (rc) {
6926                         dev_warn(&h->pdev->dev,
6927                                 "Failed to request_irq after soft reset.\n");
6928                         goto clean4;
6929                 }
6930
6931                 rc = hpsa_kdump_soft_reset(h);
6932                 if (rc)
6933                         /* Neither hard nor soft reset worked, we're hosed. */
6934                         goto clean4;
6935
6936                 dev_info(&h->pdev->dev, "Board READY.\n");
6937                 dev_info(&h->pdev->dev,
6938                         "Waiting for stale completions to drain.\n");
6939                 h->access.set_intr_mask(h, HPSA_INTR_ON);
6940                 msleep(10000);
6941                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
6942
6943                 rc = controller_reset_failed(h->cfgtable);
6944                 if (rc)
6945                         dev_info(&h->pdev->dev,
6946                                 "Soft reset appears to have failed.\n");
6947
6948                 /* since the controller's reset, we have to go back and re-init
6949                  * everything.  Easiest to just forget what we've done and do it
6950                  * all over again.
6951                  */
6952                 hpsa_undo_allocations_after_kdump_soft_reset(h);
6953                 try_soft_reset = 0;
6954                 if (rc)
6955                         /* don't go to clean4, we already unallocated */
6956                         return -ENODEV;
6957
6958                 goto reinit_after_soft_reset;
6959         }
6960
6961                 /* Enable Accelerated IO path at driver layer */
6962                 h->acciopath_status = 1;
6963
6964
6965         /* Turn the interrupts on so we can service requests */
6966         h->access.set_intr_mask(h, HPSA_INTR_ON);
6967
6968         hpsa_hba_inquiry(h);
6969         hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
6970
6971         /* Monitor the controller for firmware lockups */
6972         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
6973         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
6974         schedule_delayed_work(&h->monitor_ctlr_work,
6975                                 h->heartbeat_sample_interval);
6976         return 0;
6977
6978 clean4:
6979         hpsa_free_sg_chain_blocks(h);
6980         hpsa_free_cmd_pool(h);
6981 clean2_and_free_irqs:
6982         hpsa_free_irqs(h);
6983 clean2:
6984 clean1:
6985         if (h->resubmit_wq)
6986                 destroy_workqueue(h->resubmit_wq);
6987         if (h->lockup_detected)
6988                 free_percpu(h->lockup_detected);
6989         kfree(h);
6990         return rc;
6991 }
6992
6993 static void hpsa_flush_cache(struct ctlr_info *h)
6994 {
6995         char *flush_buf;
6996         struct CommandList *c;
6997
6998         /* Don't bother trying to flush the cache if locked up */
6999         if (unlikely(lockup_detected(h)))
7000                 return;
7001         flush_buf = kzalloc(4, GFP_KERNEL);
7002         if (!flush_buf)
7003                 return;
7004
7005         c = cmd_alloc(h);
7006         if (!c) {
7007                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
7008                 goto out_of_memory;
7009         }
7010         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7011                 RAID_CTLR_LUNID, TYPE_CMD)) {
7012                 goto out;
7013         }
7014         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
7015         if (c->err_info->CommandStatus != 0)
7016 out:
7017                 dev_warn(&h->pdev->dev,
7018                         "error flushing cache on controller\n");
7019         cmd_free(h, c);
7020 out_of_memory:
7021         kfree(flush_buf);
7022 }
7023
7024 static void hpsa_shutdown(struct pci_dev *pdev)
7025 {
7026         struct ctlr_info *h;
7027
7028         h = pci_get_drvdata(pdev);
7029         /* Turn board interrupts off  and send the flush cache command
7030          * sendcmd will turn off interrupt, and send the flush...
7031          * To write all data in the battery backed cache to disks
7032          */
7033         hpsa_flush_cache(h);
7034         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7035         hpsa_free_irqs_and_disable_msix(h);
7036 }
7037
7038 static void hpsa_free_device_info(struct ctlr_info *h)
7039 {
7040         int i;
7041
7042         for (i = 0; i < h->ndevices; i++)
7043                 kfree(h->dev[i]);
7044 }
7045
7046 static void hpsa_remove_one(struct pci_dev *pdev)
7047 {
7048         struct ctlr_info *h;
7049         unsigned long flags;
7050
7051         if (pci_get_drvdata(pdev) == NULL) {
7052                 dev_err(&pdev->dev, "unable to remove device\n");
7053                 return;
7054         }
7055         h = pci_get_drvdata(pdev);
7056
7057         /* Get rid of any controller monitoring work items */
7058         spin_lock_irqsave(&h->lock, flags);
7059         h->remove_in_progress = 1;
7060         cancel_delayed_work(&h->monitor_ctlr_work);
7061         spin_unlock_irqrestore(&h->lock, flags);
7062         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7063         hpsa_shutdown(pdev);
7064         destroy_workqueue(h->resubmit_wq);
7065         iounmap(h->vaddr);
7066         iounmap(h->transtable);
7067         iounmap(h->cfgtable);
7068         hpsa_free_device_info(h);
7069         hpsa_free_sg_chain_blocks(h);
7070         pci_free_consistent(h->pdev,
7071                 h->nr_cmds * sizeof(struct CommandList),
7072                 h->cmd_pool, h->cmd_pool_dhandle);
7073         pci_free_consistent(h->pdev,
7074                 h->nr_cmds * sizeof(struct ErrorInfo),
7075                 h->errinfo_pool, h->errinfo_pool_dhandle);
7076         hpsa_free_reply_queues(h);
7077         kfree(h->cmd_pool_bits);
7078         kfree(h->blockFetchTable);
7079         kfree(h->ioaccel1_blockFetchTable);
7080         kfree(h->ioaccel2_blockFetchTable);
7081         kfree(h->hba_inquiry_data);
7082         pci_disable_device(pdev);
7083         pci_release_regions(pdev);
7084         free_percpu(h->lockup_detected);
7085         kfree(h);
7086 }
7087
7088 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7089         __attribute__((unused)) pm_message_t state)
7090 {
7091         return -ENOSYS;
7092 }
7093
7094 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7095 {
7096         return -ENOSYS;
7097 }
7098
7099 static struct pci_driver hpsa_pci_driver = {
7100         .name = HPSA,
7101         .probe = hpsa_init_one,
7102         .remove = hpsa_remove_one,
7103         .id_table = hpsa_pci_device_id, /* id_table */
7104         .shutdown = hpsa_shutdown,
7105         .suspend = hpsa_suspend,
7106         .resume = hpsa_resume,
7107 };
7108
7109 /* Fill in bucket_map[], given nsgs (the max number of
7110  * scatter gather elements supported) and bucket[],
7111  * which is an array of 8 integers.  The bucket[] array
7112  * contains 8 different DMA transfer sizes (in 16
7113  * byte increments) which the controller uses to fetch
7114  * commands.  This function fills in bucket_map[], which
7115  * maps a given number of scatter gather elements to one of
7116  * the 8 DMA transfer sizes.  The point of it is to allow the
7117  * controller to only do as much DMA as needed to fetch the
7118  * command, with the DMA transfer size encoded in the lower
7119  * bits of the command address.
7120  */
7121 static void  calc_bucket_map(int bucket[], int num_buckets,
7122         int nsgs, int min_blocks, u32 *bucket_map)
7123 {
7124         int i, j, b, size;
7125
7126         /* Note, bucket_map must have nsgs+1 entries. */
7127         for (i = 0; i <= nsgs; i++) {
7128                 /* Compute size of a command with i SG entries */
7129                 size = i + min_blocks;
7130                 b = num_buckets; /* Assume the biggest bucket */
7131                 /* Find the bucket that is just big enough */
7132                 for (j = 0; j < num_buckets; j++) {
7133                         if (bucket[j] >= size) {
7134                                 b = j;
7135                                 break;
7136                         }
7137                 }
7138                 /* for a command with i SG entries, use bucket b. */
7139                 bucket_map[i] = b;
7140         }
7141 }
7142
7143 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7144 {
7145         int i;
7146         unsigned long register_value;
7147         unsigned long transMethod = CFGTBL_Trans_Performant |
7148                         (trans_support & CFGTBL_Trans_use_short_tags) |
7149                                 CFGTBL_Trans_enable_directed_msix |
7150                         (trans_support & (CFGTBL_Trans_io_accel1 |
7151                                 CFGTBL_Trans_io_accel2));
7152         struct access_method access = SA5_performant_access;
7153
7154         /* This is a bit complicated.  There are 8 registers on
7155          * the controller which we write to to tell it 8 different
7156          * sizes of commands which there may be.  It's a way of
7157          * reducing the DMA done to fetch each command.  Encoded into
7158          * each command's tag are 3 bits which communicate to the controller
7159          * which of the eight sizes that command fits within.  The size of
7160          * each command depends on how many scatter gather entries there are.
7161          * Each SG entry requires 16 bytes.  The eight registers are programmed
7162          * with the number of 16-byte blocks a command of that size requires.
7163          * The smallest command possible requires 5 such 16 byte blocks.
7164          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7165          * blocks.  Note, this only extends to the SG entries contained
7166          * within the command block, and does not extend to chained blocks
7167          * of SG elements.   bft[] contains the eight values we write to
7168          * the registers.  They are not evenly distributed, but have more
7169          * sizes for small commands, and fewer sizes for larger commands.
7170          */
7171         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7172 #define MIN_IOACCEL2_BFT_ENTRY 5
7173 #define HPSA_IOACCEL2_HEADER_SZ 4
7174         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7175                         13, 14, 15, 16, 17, 18, 19,
7176                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7177         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7178         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7179         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7180                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7181         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7182         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7183         /*  5 = 1 s/g entry or 4k
7184          *  6 = 2 s/g entry or 8k
7185          *  8 = 4 s/g entry or 16k
7186          * 10 = 6 s/g entry or 24k
7187          */
7188
7189         /* If the controller supports either ioaccel method then
7190          * we can also use the RAID stack submit path that does not
7191          * perform the superfluous readl() after each command submission.
7192          */
7193         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7194                 access = SA5_performant_access_no_read;
7195
7196         /* Controller spec: zero out this buffer. */
7197         for (i = 0; i < h->nreply_queues; i++)
7198                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7199
7200         bft[7] = SG_ENTRIES_IN_CMD + 4;
7201         calc_bucket_map(bft, ARRAY_SIZE(bft),
7202                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7203         for (i = 0; i < 8; i++)
7204                 writel(bft[i], &h->transtable->BlockFetch[i]);
7205
7206         /* size of controller ring buffer */
7207         writel(h->max_commands, &h->transtable->RepQSize);
7208         writel(h->nreply_queues, &h->transtable->RepQCount);
7209         writel(0, &h->transtable->RepQCtrAddrLow32);
7210         writel(0, &h->transtable->RepQCtrAddrHigh32);
7211
7212         for (i = 0; i < h->nreply_queues; i++) {
7213                 writel(0, &h->transtable->RepQAddr[i].upper);
7214                 writel(h->reply_queue[i].busaddr,
7215                         &h->transtable->RepQAddr[i].lower);
7216         }
7217
7218         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7219         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7220         /*
7221          * enable outbound interrupt coalescing in accelerator mode;
7222          */
7223         if (trans_support & CFGTBL_Trans_io_accel1) {
7224                 access = SA5_ioaccel_mode1_access;
7225                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7226                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7227         } else {
7228                 if (trans_support & CFGTBL_Trans_io_accel2) {
7229                         access = SA5_ioaccel_mode2_access;
7230                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7231                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7232                 }
7233         }
7234         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7235         hpsa_wait_for_mode_change_ack(h);
7236         register_value = readl(&(h->cfgtable->TransportActive));
7237         if (!(register_value & CFGTBL_Trans_Performant)) {
7238                 dev_err(&h->pdev->dev,
7239                         "performant mode problem - transport not active\n");
7240                 return;
7241         }
7242         /* Change the access methods to the performant access methods */
7243         h->access = access;
7244         h->transMethod = transMethod;
7245
7246         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7247                 (trans_support & CFGTBL_Trans_io_accel2)))
7248                 return;
7249
7250         if (trans_support & CFGTBL_Trans_io_accel1) {
7251                 /* Set up I/O accelerator mode */
7252                 for (i = 0; i < h->nreply_queues; i++) {
7253                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7254                         h->reply_queue[i].current_entry =
7255                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7256                 }
7257                 bft[7] = h->ioaccel_maxsg + 8;
7258                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7259                                 h->ioaccel1_blockFetchTable);
7260
7261                 /* initialize all reply queue entries to unused */
7262                 for (i = 0; i < h->nreply_queues; i++)
7263                         memset(h->reply_queue[i].head,
7264                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7265                                 h->reply_queue_size);
7266
7267                 /* set all the constant fields in the accelerator command
7268                  * frames once at init time to save CPU cycles later.
7269                  */
7270                 for (i = 0; i < h->nr_cmds; i++) {
7271                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7272
7273                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7274                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7275                                         (i * sizeof(struct ErrorInfo)));
7276                         cp->err_info_len = sizeof(struct ErrorInfo);
7277                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7278                         cp->host_context_flags =
7279                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
7280                         cp->timeout_sec = 0;
7281                         cp->ReplyQueue = 0;
7282                         cp->tag =
7283                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
7284                         cp->host_addr =
7285                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7286                                         (i * sizeof(struct io_accel1_cmd)));
7287                 }
7288         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7289                 u64 cfg_offset, cfg_base_addr_index;
7290                 u32 bft2_offset, cfg_base_addr;
7291                 int rc;
7292
7293                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7294                         &cfg_base_addr_index, &cfg_offset);
7295                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7296                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7297                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7298                                 4, h->ioaccel2_blockFetchTable);
7299                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7300                 BUILD_BUG_ON(offsetof(struct CfgTable,
7301                                 io_accel_request_size_offset) != 0xb8);
7302                 h->ioaccel2_bft2_regs =
7303                         remap_pci_mem(pci_resource_start(h->pdev,
7304                                         cfg_base_addr_index) +
7305                                         cfg_offset + bft2_offset,
7306                                         ARRAY_SIZE(bft2) *
7307                                         sizeof(*h->ioaccel2_bft2_regs));
7308                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7309                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7310         }
7311         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7312         hpsa_wait_for_mode_change_ack(h);
7313 }
7314
7315 static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
7316 {
7317         h->ioaccel_maxsg =
7318                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7319         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7320                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7321
7322         /* Command structures must be aligned on a 128-byte boundary
7323          * because the 7 lower bits of the address are used by the
7324          * hardware.
7325          */
7326         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7327                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7328         h->ioaccel_cmd_pool =
7329                 pci_alloc_consistent(h->pdev,
7330                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7331                         &(h->ioaccel_cmd_pool_dhandle));
7332
7333         h->ioaccel1_blockFetchTable =
7334                 kmalloc(((h->ioaccel_maxsg + 1) *
7335                                 sizeof(u32)), GFP_KERNEL);
7336
7337         if ((h->ioaccel_cmd_pool == NULL) ||
7338                 (h->ioaccel1_blockFetchTable == NULL))
7339                 goto clean_up;
7340
7341         memset(h->ioaccel_cmd_pool, 0,
7342                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7343         return 0;
7344
7345 clean_up:
7346         if (h->ioaccel_cmd_pool)
7347                 pci_free_consistent(h->pdev,
7348                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7349                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7350         kfree(h->ioaccel1_blockFetchTable);
7351         return 1;
7352 }
7353
7354 static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
7355 {
7356         /* Allocate ioaccel2 mode command blocks and block fetch table */
7357
7358         h->ioaccel_maxsg =
7359                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7360         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7361                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7362
7363         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7364                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7365         h->ioaccel2_cmd_pool =
7366                 pci_alloc_consistent(h->pdev,
7367                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7368                         &(h->ioaccel2_cmd_pool_dhandle));
7369
7370         h->ioaccel2_blockFetchTable =
7371                 kmalloc(((h->ioaccel_maxsg + 1) *
7372                                 sizeof(u32)), GFP_KERNEL);
7373
7374         if ((h->ioaccel2_cmd_pool == NULL) ||
7375                 (h->ioaccel2_blockFetchTable == NULL))
7376                 goto clean_up;
7377
7378         memset(h->ioaccel2_cmd_pool, 0,
7379                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7380         return 0;
7381
7382 clean_up:
7383         if (h->ioaccel2_cmd_pool)
7384                 pci_free_consistent(h->pdev,
7385                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7386                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7387         kfree(h->ioaccel2_blockFetchTable);
7388         return 1;
7389 }
7390
7391 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7392 {
7393         u32 trans_support;
7394         unsigned long transMethod = CFGTBL_Trans_Performant |
7395                                         CFGTBL_Trans_use_short_tags;
7396         int i;
7397
7398         if (hpsa_simple_mode)
7399                 return;
7400
7401         trans_support = readl(&(h->cfgtable->TransportSupport));
7402         if (!(trans_support & PERFORMANT_MODE))
7403                 return;
7404
7405         /* Check for I/O accelerator mode support */
7406         if (trans_support & CFGTBL_Trans_io_accel1) {
7407                 transMethod |= CFGTBL_Trans_io_accel1 |
7408                                 CFGTBL_Trans_enable_directed_msix;
7409                 if (hpsa_alloc_ioaccel_cmd_and_bft(h))
7410                         goto clean_up;
7411         } else {
7412                 if (trans_support & CFGTBL_Trans_io_accel2) {
7413                                 transMethod |= CFGTBL_Trans_io_accel2 |
7414                                 CFGTBL_Trans_enable_directed_msix;
7415                 if (ioaccel2_alloc_cmds_and_bft(h))
7416                         goto clean_up;
7417                 }
7418         }
7419
7420         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7421         hpsa_get_max_perf_mode_cmds(h);
7422         /* Performant mode ring buffer and supporting data structures */
7423         h->reply_queue_size = h->max_commands * sizeof(u64);
7424
7425         for (i = 0; i < h->nreply_queues; i++) {
7426                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7427                                                 h->reply_queue_size,
7428                                                 &(h->reply_queue[i].busaddr));
7429                 if (!h->reply_queue[i].head)
7430                         goto clean_up;
7431                 h->reply_queue[i].size = h->max_commands;
7432                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7433                 h->reply_queue[i].current_entry = 0;
7434         }
7435
7436         /* Need a block fetch table for performant mode */
7437         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7438                                 sizeof(u32)), GFP_KERNEL);
7439         if (!h->blockFetchTable)
7440                 goto clean_up;
7441
7442         hpsa_enter_performant_mode(h, trans_support);
7443         return;
7444
7445 clean_up:
7446         hpsa_free_reply_queues(h);
7447         kfree(h->blockFetchTable);
7448 }
7449
7450 static int is_accelerated_cmd(struct CommandList *c)
7451 {
7452         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7453 }
7454
7455 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7456 {
7457         struct CommandList *c = NULL;
7458         int i, accel_cmds_out;
7459         int refcount;
7460
7461         do { /* wait for all outstanding ioaccel commands to drain out */
7462                 accel_cmds_out = 0;
7463                 for (i = 0; i < h->nr_cmds; i++) {
7464                         c = h->cmd_pool + i;
7465                         refcount = atomic_inc_return(&c->refcount);
7466                         if (refcount > 1) /* Command is allocated */
7467                                 accel_cmds_out += is_accelerated_cmd(c);
7468                         cmd_free(h, c);
7469                 }
7470                 if (accel_cmds_out <= 0)
7471                         break;
7472                 msleep(100);
7473         } while (1);
7474 }
7475
7476 /*
7477  *  This is it.  Register the PCI driver information for the cards we control
7478  *  the OS will call our registered routines when it finds one of our cards.
7479  */
7480 static int __init hpsa_init(void)
7481 {
7482         return pci_register_driver(&hpsa_pci_driver);
7483 }
7484
7485 static void __exit hpsa_cleanup(void)
7486 {
7487         pci_unregister_driver(&hpsa_pci_driver);
7488 }
7489
7490 static void __attribute__((unused)) verify_offsets(void)
7491 {
7492 #define VERIFY_OFFSET(member, offset) \
7493         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
7494
7495         VERIFY_OFFSET(structure_size, 0);
7496         VERIFY_OFFSET(volume_blk_size, 4);
7497         VERIFY_OFFSET(volume_blk_cnt, 8);
7498         VERIFY_OFFSET(phys_blk_shift, 16);
7499         VERIFY_OFFSET(parity_rotation_shift, 17);
7500         VERIFY_OFFSET(strip_size, 18);
7501         VERIFY_OFFSET(disk_starting_blk, 20);
7502         VERIFY_OFFSET(disk_blk_cnt, 28);
7503         VERIFY_OFFSET(data_disks_per_row, 36);
7504         VERIFY_OFFSET(metadata_disks_per_row, 38);
7505         VERIFY_OFFSET(row_cnt, 40);
7506         VERIFY_OFFSET(layout_map_count, 42);
7507         VERIFY_OFFSET(flags, 44);
7508         VERIFY_OFFSET(dekindex, 46);
7509         /* VERIFY_OFFSET(reserved, 48 */
7510         VERIFY_OFFSET(data, 64);
7511
7512 #undef VERIFY_OFFSET
7513
7514 #define VERIFY_OFFSET(member, offset) \
7515         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
7516
7517         VERIFY_OFFSET(IU_type, 0);
7518         VERIFY_OFFSET(direction, 1);
7519         VERIFY_OFFSET(reply_queue, 2);
7520         /* VERIFY_OFFSET(reserved1, 3);  */
7521         VERIFY_OFFSET(scsi_nexus, 4);
7522         VERIFY_OFFSET(Tag, 8);
7523         VERIFY_OFFSET(cdb, 16);
7524         VERIFY_OFFSET(cciss_lun, 32);
7525         VERIFY_OFFSET(data_len, 40);
7526         VERIFY_OFFSET(cmd_priority_task_attr, 44);
7527         VERIFY_OFFSET(sg_count, 45);
7528         /* VERIFY_OFFSET(reserved3 */
7529         VERIFY_OFFSET(err_ptr, 48);
7530         VERIFY_OFFSET(err_len, 56);
7531         /* VERIFY_OFFSET(reserved4  */
7532         VERIFY_OFFSET(sg, 64);
7533
7534 #undef VERIFY_OFFSET
7535
7536 #define VERIFY_OFFSET(member, offset) \
7537         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
7538
7539         VERIFY_OFFSET(dev_handle, 0x00);
7540         VERIFY_OFFSET(reserved1, 0x02);
7541         VERIFY_OFFSET(function, 0x03);
7542         VERIFY_OFFSET(reserved2, 0x04);
7543         VERIFY_OFFSET(err_info, 0x0C);
7544         VERIFY_OFFSET(reserved3, 0x10);
7545         VERIFY_OFFSET(err_info_len, 0x12);
7546         VERIFY_OFFSET(reserved4, 0x13);
7547         VERIFY_OFFSET(sgl_offset, 0x14);
7548         VERIFY_OFFSET(reserved5, 0x15);
7549         VERIFY_OFFSET(transfer_len, 0x1C);
7550         VERIFY_OFFSET(reserved6, 0x20);
7551         VERIFY_OFFSET(io_flags, 0x24);
7552         VERIFY_OFFSET(reserved7, 0x26);
7553         VERIFY_OFFSET(LUN, 0x34);
7554         VERIFY_OFFSET(control, 0x3C);
7555         VERIFY_OFFSET(CDB, 0x40);
7556         VERIFY_OFFSET(reserved8, 0x50);
7557         VERIFY_OFFSET(host_context_flags, 0x60);
7558         VERIFY_OFFSET(timeout_sec, 0x62);
7559         VERIFY_OFFSET(ReplyQueue, 0x64);
7560         VERIFY_OFFSET(reserved9, 0x65);
7561         VERIFY_OFFSET(tag, 0x68);
7562         VERIFY_OFFSET(host_addr, 0x70);
7563         VERIFY_OFFSET(CISS_LUN, 0x78);
7564         VERIFY_OFFSET(SG, 0x78 + 8);
7565 #undef VERIFY_OFFSET
7566 }
7567
7568 module_init(hpsa_init);
7569 module_exit(hpsa_cleanup);