2 * ipr.h -- driver for IBM Power Linux RAID adapters
4 * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
6 * Copyright (C) 2003, 2004 IBM Corporation
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
23 * that broke 64bit platforms.
29 #include <linux/types.h>
30 #include <linux/completion.h>
31 #include <linux/libata.h>
32 #include <linux/list.h>
33 #include <linux/kref.h>
34 #include <scsi/scsi.h>
35 #include <scsi/scsi_cmnd.h>
40 #define IPR_DRIVER_VERSION "2.2.0"
41 #define IPR_DRIVER_DATE "(September 25, 2006)"
44 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
45 * ops per device for devices not running tagged command queuing.
46 * This can be adjusted at runtime through sysfs device attributes.
48 #define IPR_MAX_CMD_PER_LUN 6
49 #define IPR_MAX_CMD_PER_ATA_LUN 1
52 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
53 * ops the mid-layer can send to the adapter.
55 #define IPR_NUM_BASE_CMD_BLKS 100
57 #define PCI_DEVICE_ID_IBM_OBSIDIAN_E 0x0339
59 #define IPR_SUBS_DEV_ID_2780 0x0264
60 #define IPR_SUBS_DEV_ID_5702 0x0266
61 #define IPR_SUBS_DEV_ID_5703 0x0278
62 #define IPR_SUBS_DEV_ID_572E 0x028D
63 #define IPR_SUBS_DEV_ID_573E 0x02D3
64 #define IPR_SUBS_DEV_ID_573D 0x02D4
65 #define IPR_SUBS_DEV_ID_571A 0x02C0
66 #define IPR_SUBS_DEV_ID_571B 0x02BE
67 #define IPR_SUBS_DEV_ID_571E 0x02BF
68 #define IPR_SUBS_DEV_ID_571F 0x02D5
69 #define IPR_SUBS_DEV_ID_572A 0x02C1
70 #define IPR_SUBS_DEV_ID_572B 0x02C2
71 #define IPR_SUBS_DEV_ID_572F 0x02C3
72 #define IPR_SUBS_DEV_ID_575B 0x030D
73 #define IPR_SUBS_DEV_ID_575C 0x0338
74 #define IPR_SUBS_DEV_ID_57B7 0x0360
75 #define IPR_SUBS_DEV_ID_57B8 0x02C2
77 #define IPR_NAME "ipr"
82 #define IPR_RC_JOB_CONTINUE 1
83 #define IPR_RC_JOB_RETURN 2
88 #define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
89 #define IPR_IOASC_SYNC_REQUIRED 0x023f0000
90 #define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
91 #define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
92 #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500
93 #define IPR_IOASC_IOASC_MASK 0xFFFFFF00
94 #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF
95 #define IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT 0x05240000
96 #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000
97 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA 0x05258100
98 #define IPR_IOASA_IR_DUAL_IOA_DISABLED 0x052C8000
99 #define IPR_IOASC_BUS_WAS_RESET 0x06290000
100 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
101 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
103 #define IPR_FIRST_DRIVER_IOASC 0x10000000
104 #define IPR_IOASC_IOA_WAS_RESET 0x10000001
105 #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002
107 #define IPR_NUM_LOG_HCAMS 2
108 #define IPR_NUM_CFG_CHG_HCAMS 2
109 #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
110 #define IPR_MAX_NUM_TARGETS_PER_BUS 256
111 #define IPR_MAX_NUM_LUNS_PER_TARGET 256
112 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8
113 #define IPR_VSET_BUS 0xff
114 #define IPR_IOA_BUS 0xff
115 #define IPR_IOA_TARGET 0xff
116 #define IPR_IOA_LUN 0xff
117 #define IPR_MAX_NUM_BUSES 16
118 #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES
120 #define IPR_NUM_RESET_RELOAD_RETRIES 3
122 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
123 #define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
124 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
126 #define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS
127 #define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
128 IPR_NUM_INTERNAL_CMD_BLKS)
130 #define IPR_MAX_PHYSICAL_DEVS 192
132 #define IPR_MAX_SGLIST 64
133 #define IPR_IOA_MAX_SECTORS 32767
134 #define IPR_VSET_MAX_SECTORS 512
135 #define IPR_MAX_CDB_LEN 16
137 #define IPR_DEFAULT_BUS_WIDTH 16
138 #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
139 #define IPR_U160_SCSI_RATE ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
140 #define IPR_U320_SCSI_RATE ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
141 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
143 #define IPR_IOA_RES_HANDLE 0xffffffff
144 #define IPR_INVALID_RES_HANDLE 0
145 #define IPR_IOA_RES_ADDR 0x00ffffff
150 #define IPR_QUERY_RSRC_STATE 0xC2
151 #define IPR_RESET_DEVICE 0xC3
152 #define IPR_RESET_TYPE_SELECT 0x80
153 #define IPR_LUN_RESET 0x40
154 #define IPR_TARGET_RESET 0x20
155 #define IPR_BUS_RESET 0x10
156 #define IPR_ATA_PHY_RESET 0x80
157 #define IPR_ID_HOST_RR_Q 0xC4
158 #define IPR_QUERY_IOA_CONFIG 0xC5
159 #define IPR_CANCEL_ALL_REQUESTS 0xCE
160 #define IPR_HOST_CONTROLLED_ASYNC 0xCF
161 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01
162 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02
163 #define IPR_SET_SUPPORTED_DEVICES 0xFB
164 #define IPR_IOA_SHUTDOWN 0xF7
165 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05
170 #define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
171 #define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
172 #define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
173 #define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
174 #define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
175 #define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
176 #define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
177 #define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
178 #define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
179 #define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
180 #define IPR_OPERATIONAL_TIMEOUT (5 * 60)
181 #define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
182 #define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
183 #define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
184 #define IPR_DUMP_TIMEOUT (15 * HZ)
189 #define IPR_VENDOR_ID_LEN 8
190 #define IPR_PROD_ID_LEN 16
191 #define IPR_SERIAL_NUM_LEN 8
196 #define IPR_FMT2_MBX_ADDR_MASK 0x0fffffff
197 #define IPR_FMT2_MBX_BAR_SEL_MASK 0xf0000000
198 #define IPR_FMT2_MKR_BAR_SEL_SHIFT 28
199 #define IPR_GET_FMT2_BAR_SEL(mbx) \
200 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
201 #define IPR_SDT_FMT2_BAR0_SEL 0x0
202 #define IPR_SDT_FMT2_BAR1_SEL 0x1
203 #define IPR_SDT_FMT2_BAR2_SEL 0x2
204 #define IPR_SDT_FMT2_BAR3_SEL 0x3
205 #define IPR_SDT_FMT2_BAR4_SEL 0x4
206 #define IPR_SDT_FMT2_BAR5_SEL 0x5
207 #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8
208 #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2
209 #define IPR_DOORBELL 0x82800000
210 #define IPR_RUNTIME_RESET 0x40000000
212 #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0)
213 #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3)
214 #define IPR_PCII_IOA_UNIT_CHECKED (0x80000000 >> 4)
215 #define IPR_PCII_NO_HOST_RRQ (0x80000000 >> 5)
216 #define IPR_PCII_CRITICAL_OPERATION (0x80000000 >> 6)
217 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE (0x80000000 >> 7)
218 #define IPR_PCII_IOARRIN_LOST (0x80000000 >> 27)
219 #define IPR_PCII_MMIO_ERROR (0x80000000 >> 28)
220 #define IPR_PCII_PROC_ERR_STATE (0x80000000 >> 29)
221 #define IPR_PCII_HRRQ_UPDATED (0x80000000 >> 30)
222 #define IPR_PCII_CORE_ISSUED_RST_REQ (0x80000000 >> 31)
224 #define IPR_PCII_ERROR_INTERRUPTS \
225 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
226 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
228 #define IPR_PCII_OPER_INTERRUPTS \
229 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
231 #define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
232 #define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
234 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
235 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
240 #define IPR_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024)
241 #define IPR_NUM_SDT_ENTRIES 511
242 #define IPR_MAX_NUM_DUMP_PAGES ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
247 #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST
250 * Adapter interface types
253 struct ipr_res_addr {
258 #define IPR_GET_PHYS_LOC(res_addr) \
259 (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
260 }__attribute__((packed, aligned (4)));
262 struct ipr_std_inq_vpids {
263 u8 vendor_id[IPR_VENDOR_ID_LEN];
264 u8 product_id[IPR_PROD_ID_LEN];
265 }__attribute__((packed));
268 struct ipr_std_inq_vpids vpids;
269 u8 sn[IPR_SERIAL_NUM_LEN];
270 }__attribute__((packed));
275 }__attribute__((packed));
277 struct ipr_std_inq_data {
278 u8 peri_qual_dev_type;
279 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
280 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
282 u8 removeable_medium_rsvd;
283 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
285 #define IPR_IS_DASD_DEVICE(std_inq) \
286 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
287 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
289 #define IPR_IS_SES_DEVICE(std_inq) \
290 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
299 struct ipr_std_inq_vpids vpids;
301 u8 ros_rsvd_ram_rsvd[4];
303 u8 serial_num[IPR_SERIAL_NUM_LEN];
304 }__attribute__ ((packed));
306 struct ipr_config_table_entry {
308 #define IPR_PROTO_SATA 0x02
309 #define IPR_PROTO_SATA_ATAPI 0x03
310 #define IPR_PROTO_SAS_STP 0x06
311 #define IPR_PROTO_SAS_STP_ATAPI 0x07
314 #define IPR_IS_IOA_RESOURCE 0x80
315 #define IPR_IS_ARRAY_MEMBER 0x20
316 #define IPR_IS_HOT_SPARE 0x10
319 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
320 #define IPR_SUBTYPE_AF_DASD 0
321 #define IPR_SUBTYPE_GENERIC_SCSI 1
322 #define IPR_SUBTYPE_VOLUME_SET 2
323 #define IPR_SUBTYPE_GENERIC_ATA 4
325 #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4)
326 #define IPR_QUEUE_FROZEN_MODEL 0
327 #define IPR_QUEUE_NACA_MODEL 1
329 struct ipr_res_addr res_addr;
332 struct ipr_std_inq_data std_inq_data;
333 }__attribute__ ((packed, aligned (4)));
335 struct ipr_config_table_hdr {
338 #define IPR_UCODE_DOWNLOAD_REQ 0x10
340 }__attribute__((packed, aligned (4)));
342 struct ipr_config_table {
343 struct ipr_config_table_hdr hdr;
344 struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
345 }__attribute__((packed, aligned (4)));
347 struct ipr_hostrcb_cfg_ch_not {
348 struct ipr_config_table_entry cfgte;
350 }__attribute__((packed, aligned (4)));
352 struct ipr_supported_device {
356 struct ipr_std_inq_vpids vpids;
358 }__attribute__((packed, aligned (4)));
360 /* Command packet structure */
362 __be16 reserved; /* Reserved by IOA */
364 #define IPR_RQTYPE_SCSICDB 0x00
365 #define IPR_RQTYPE_IOACMD 0x01
366 #define IPR_RQTYPE_HCAM 0x02
367 #define IPR_RQTYPE_ATA_PASSTHRU 0x04
372 #define IPR_FLAGS_HI_WRITE_NOT_READ 0x80
373 #define IPR_FLAGS_HI_NO_ULEN_CHK 0x20
374 #define IPR_FLAGS_HI_SYNC_OVERRIDE 0x10
375 #define IPR_FLAGS_HI_SYNC_COMPLETE 0x08
376 #define IPR_FLAGS_HI_NO_LINK_DESC 0x04
379 #define IPR_FLAGS_LO_ALIGNED_BFR 0x20
380 #define IPR_FLAGS_LO_DELAY_AFTER_RST 0x10
381 #define IPR_FLAGS_LO_UNTAGGED_TASK 0x00
382 #define IPR_FLAGS_LO_SIMPLE_TASK 0x02
383 #define IPR_FLAGS_LO_ORDERED_TASK 0x04
384 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK 0x06
385 #define IPR_FLAGS_LO_ACA_TASK 0x08
389 }__attribute__ ((packed, aligned(4)));
391 struct ipr_ioarcb_ata_regs {
393 #define IPR_ATA_FLAG_PACKET_CMD 0x80
394 #define IPR_ATA_FLAG_XFER_TYPE_DMA 0x40
395 #define IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION 0x20
413 }__attribute__ ((packed, aligned(4)));
415 struct ipr_ioarcb_add_data {
417 struct ipr_ioarcb_ata_regs regs;
418 __be32 add_cmd_parms[10];
420 }__attribute__ ((packed, aligned(4)));
422 /* IOA Request Control Block 128 bytes */
424 __be32 ioarcb_host_pci_addr;
427 __be32 host_response_handle;
432 __be32 write_data_transfer_length;
433 __be32 read_data_transfer_length;
434 __be32 write_ioadl_addr;
435 __be32 write_ioadl_len;
436 __be32 read_ioadl_addr;
437 __be32 read_ioadl_len;
439 __be32 ioasa_host_pci_addr;
443 struct ipr_cmd_pkt cmd_pkt;
445 __be32 add_cmd_parms_len;
446 struct ipr_ioarcb_add_data add_data;
447 }__attribute__((packed, aligned (4)));
449 struct ipr_ioadl_desc {
450 __be32 flags_and_data_len;
451 #define IPR_IOADL_FLAGS_MASK 0xff000000
452 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
453 #define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
454 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
455 #define IPR_IOADL_FLAGS_READ 0x48000000
456 #define IPR_IOADL_FLAGS_READ_LAST 0x49000000
457 #define IPR_IOADL_FLAGS_WRITE 0x68000000
458 #define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
459 #define IPR_IOADL_FLAGS_LAST 0x01000000
462 }__attribute__((packed, aligned (8)));
464 struct ipr_ioasa_vset {
465 __be32 failing_lba_hi;
466 __be32 failing_lba_lo;
468 }__attribute__((packed, aligned (4)));
470 struct ipr_ioasa_af_dasd {
473 }__attribute__((packed, aligned (4)));
475 struct ipr_ioasa_gpdd {
480 }__attribute__((packed, aligned (4)));
482 struct ipr_ioasa_gata {
484 u8 nsect; /* Interrupt reason */
490 u8 alt_status; /* ATA CTL */
495 }__attribute__((packed, aligned (4)));
497 struct ipr_auto_sense {
498 __be16 auto_sense_len;
500 __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
505 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
506 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
507 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
508 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
510 __be16 ret_stat_len; /* Length of the returned IOASA */
512 __be16 avail_stat_len; /* Total Length of status available. */
514 __be32 residual_data_len; /* number of bytes in the host data */
515 /* buffers that were not used by the IOARCB command. */
518 #define IPR_NO_ILID 0
519 #define IPR_DRIVER_ILID 0xffffffff
523 __be32 fd_phys_locator;
525 __be32 fd_res_handle;
527 __be32 ioasc_specific; /* status code specific field */
528 #define IPR_ADDITIONAL_STATUS_FMT 0x80000000
529 #define IPR_AUTOSENSE_VALID 0x40000000
530 #define IPR_ATA_DEVICE_WAS_RESET 0x20000000
531 #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
532 #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
533 #define IPR_FIELD_POINTER_MASK 0x0000ffff
536 struct ipr_ioasa_vset vset;
537 struct ipr_ioasa_af_dasd dasd;
538 struct ipr_ioasa_gpdd gpdd;
539 struct ipr_ioasa_gata gata;
542 struct ipr_auto_sense auto_sense;
543 }__attribute__((packed, aligned (4)));
545 struct ipr_mode_parm_hdr {
548 u8 device_spec_parms;
550 }__attribute__((packed));
552 struct ipr_mode_pages {
553 struct ipr_mode_parm_hdr hdr;
554 u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
555 }__attribute__((packed));
557 struct ipr_mode_page_hdr {
559 #define IPR_MODE_PAGE_PS 0x80
560 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
562 }__attribute__ ((packed));
564 struct ipr_dev_bus_entry {
565 struct ipr_res_addr res_addr;
567 #define IPR_SCSI_ATTR_ENABLE_QAS 0x80
568 #define IPR_SCSI_ATTR_DISABLE_QAS 0x40
569 #define IPR_SCSI_ATTR_QAS_MASK 0xC0
570 #define IPR_SCSI_ATTR_ENABLE_TM 0x20
571 #define IPR_SCSI_ATTR_NO_TERM_PWR 0x10
572 #define IPR_SCSI_ATTR_TM_SUPPORTED 0x08
573 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED 0x04
577 u8 extended_reset_delay;
578 #define IPR_EXTENDED_RESET_DELAY 7
580 __be32 max_xfer_rate;
585 }__attribute__((packed, aligned (4)));
587 struct ipr_mode_page28 {
588 struct ipr_mode_page_hdr hdr;
591 struct ipr_dev_bus_entry bus[0];
592 }__attribute__((packed));
595 struct ipr_std_inq_data std_inq_data;
596 u8 ascii_part_num[12];
598 u8 ascii_plant_code[4];
599 }__attribute__((packed));
601 struct ipr_inquiry_page3 {
602 u8 peri_qual_dev_type;
614 }__attribute__((packed));
616 #define IPR_INQUIRY_PAGE0_ENTRIES 20
617 struct ipr_inquiry_page0 {
618 u8 peri_qual_dev_type;
622 u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
623 }__attribute__((packed));
625 struct ipr_hostrcb_device_data_entry {
627 struct ipr_res_addr dev_res_addr;
628 struct ipr_vpd new_vpd;
629 struct ipr_vpd ioa_last_with_dev_vpd;
630 struct ipr_vpd cfc_last_with_dev_vpd;
632 }__attribute__((packed, aligned (4)));
634 struct ipr_hostrcb_device_data_entry_enhanced {
635 struct ipr_ext_vpd vpd;
637 struct ipr_res_addr dev_res_addr;
638 struct ipr_ext_vpd new_vpd;
640 struct ipr_ext_vpd ioa_last_with_dev_vpd;
641 struct ipr_ext_vpd cfc_last_with_dev_vpd;
642 }__attribute__((packed, aligned (4)));
644 struct ipr_hostrcb_array_data_entry {
646 struct ipr_res_addr expected_dev_res_addr;
647 struct ipr_res_addr dev_res_addr;
648 }__attribute__((packed, aligned (4)));
650 struct ipr_hostrcb_array_data_entry_enhanced {
651 struct ipr_ext_vpd vpd;
653 struct ipr_res_addr expected_dev_res_addr;
654 struct ipr_res_addr dev_res_addr;
655 }__attribute__((packed, aligned (4)));
657 struct ipr_hostrcb_type_ff_error {
658 __be32 ioa_data[502];
659 }__attribute__((packed, aligned (4)));
661 struct ipr_hostrcb_type_01_error {
665 __be32 ioa_data[236];
666 }__attribute__((packed, aligned (4)));
668 struct ipr_hostrcb_type_02_error {
669 struct ipr_vpd ioa_vpd;
670 struct ipr_vpd cfc_vpd;
671 struct ipr_vpd ioa_last_attached_to_cfc_vpd;
672 struct ipr_vpd cfc_last_attached_to_ioa_vpd;
674 }__attribute__((packed, aligned (4)));
676 struct ipr_hostrcb_type_12_error {
677 struct ipr_ext_vpd ioa_vpd;
678 struct ipr_ext_vpd cfc_vpd;
679 struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
680 struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
682 }__attribute__((packed, aligned (4)));
684 struct ipr_hostrcb_type_03_error {
685 struct ipr_vpd ioa_vpd;
686 struct ipr_vpd cfc_vpd;
687 __be32 errors_detected;
688 __be32 errors_logged;
690 struct ipr_hostrcb_device_data_entry dev[3];
691 }__attribute__((packed, aligned (4)));
693 struct ipr_hostrcb_type_13_error {
694 struct ipr_ext_vpd ioa_vpd;
695 struct ipr_ext_vpd cfc_vpd;
696 __be32 errors_detected;
697 __be32 errors_logged;
698 struct ipr_hostrcb_device_data_entry_enhanced dev[3];
699 }__attribute__((packed, aligned (4)));
701 struct ipr_hostrcb_type_04_error {
702 struct ipr_vpd ioa_vpd;
703 struct ipr_vpd cfc_vpd;
705 struct ipr_hostrcb_array_data_entry array_member[10];
706 __be32 exposed_mode_adn;
708 struct ipr_vpd incomp_dev_vpd;
710 struct ipr_hostrcb_array_data_entry array_member2[8];
711 struct ipr_res_addr last_func_vset_res_addr;
712 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
713 u8 protection_level[8];
714 }__attribute__((packed, aligned (4)));
716 struct ipr_hostrcb_type_14_error {
717 struct ipr_ext_vpd ioa_vpd;
718 struct ipr_ext_vpd cfc_vpd;
719 __be32 exposed_mode_adn;
721 struct ipr_res_addr last_func_vset_res_addr;
722 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
723 u8 protection_level[8];
725 struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
726 }__attribute__((packed, aligned (4)));
728 struct ipr_hostrcb_type_07_error {
729 u8 failure_reason[64];
732 }__attribute__((packed, aligned (4)));
734 struct ipr_hostrcb_type_17_error {
735 u8 failure_reason[64];
736 struct ipr_ext_vpd vpd;
738 }__attribute__((packed, aligned (4)));
740 struct ipr_hostrcb_error {
741 __be32 failing_dev_ioasc;
742 struct ipr_res_addr failing_dev_res_addr;
743 __be32 failing_dev_res_handle;
746 struct ipr_hostrcb_type_ff_error type_ff_error;
747 struct ipr_hostrcb_type_01_error type_01_error;
748 struct ipr_hostrcb_type_02_error type_02_error;
749 struct ipr_hostrcb_type_03_error type_03_error;
750 struct ipr_hostrcb_type_04_error type_04_error;
751 struct ipr_hostrcb_type_07_error type_07_error;
752 struct ipr_hostrcb_type_12_error type_12_error;
753 struct ipr_hostrcb_type_13_error type_13_error;
754 struct ipr_hostrcb_type_14_error type_14_error;
755 struct ipr_hostrcb_type_17_error type_17_error;
757 }__attribute__((packed, aligned (4)));
759 struct ipr_hostrcb_raw {
760 __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
761 }__attribute__((packed, aligned (4)));
765 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE 0xE1
766 #define IPR_HOST_RCB_OP_CODE_LOG_DATA 0xE2
769 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED 0x00
770 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY 0x01
771 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY 0x02
772 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY 0x10
773 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY 0x11
775 u8 notifications_lost;
776 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST 0
777 #define IPR_HOST_RCB_NOTIFICATIONS_LOST 0x80
780 #define IPR_HOSTRCB_INTERNAL_OPER 0x80
781 #define IPR_HOSTRCB_ERR_RESP_SENT 0x40
784 #define IPR_HOST_RCB_OVERLAY_ID_1 0x01
785 #define IPR_HOST_RCB_OVERLAY_ID_2 0x02
786 #define IPR_HOST_RCB_OVERLAY_ID_3 0x03
787 #define IPR_HOST_RCB_OVERLAY_ID_4 0x04
788 #define IPR_HOST_RCB_OVERLAY_ID_6 0x06
789 #define IPR_HOST_RCB_OVERLAY_ID_7 0x07
790 #define IPR_HOST_RCB_OVERLAY_ID_12 0x12
791 #define IPR_HOST_RCB_OVERLAY_ID_13 0x13
792 #define IPR_HOST_RCB_OVERLAY_ID_14 0x14
793 #define IPR_HOST_RCB_OVERLAY_ID_16 0x16
794 #define IPR_HOST_RCB_OVERLAY_ID_17 0x17
795 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
799 __be32 time_since_last_ioa_reset;
804 struct ipr_hostrcb_error error;
805 struct ipr_hostrcb_cfg_ch_not ccn;
806 struct ipr_hostrcb_raw raw;
808 }__attribute__((packed, aligned (4)));
811 struct ipr_hcam hcam;
812 dma_addr_t hostrcb_dma;
813 struct list_head queue;
816 /* IPR smart dump table structures */
817 struct ipr_sdt_entry {
818 __be32 bar_str_offset;
824 #define IPR_SDT_ENDIAN 0x80
825 #define IPR_SDT_VALID_ENTRY 0x20
829 }__attribute__((packed, aligned (4)));
831 struct ipr_sdt_header {
834 __be32 num_entries_used;
836 }__attribute__((packed, aligned (4)));
839 struct ipr_sdt_header hdr;
840 struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
841 }__attribute__((packed, aligned (4)));
844 struct ipr_sdt_header hdr;
845 struct ipr_sdt_entry entry[1];
846 }__attribute__((packed, aligned (4)));
851 struct ipr_bus_attributes {
859 struct ipr_sata_port {
860 struct ipr_ioa_cfg *ioa_cfg;
862 struct ipr_resource_entry *res;
863 struct ipr_ioasa_gata ioasa;
866 struct ipr_resource_entry {
867 struct ipr_config_table_entry cfgte;
868 u8 needs_sync_complete:1;
872 u8 resetting_device:1;
874 struct scsi_device *sdev;
875 struct ipr_sata_port *sata_port;
876 struct list_head queue;
879 struct ipr_resource_hdr {
884 struct ipr_resource_table {
885 struct ipr_resource_hdr hdr;
886 struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
889 struct ipr_misc_cbs {
890 struct ipr_ioa_vpd ioa_vpd;
891 struct ipr_inquiry_page0 page0_data;
892 struct ipr_inquiry_page3 page3_data;
893 struct ipr_mode_pages mode_pages;
894 struct ipr_supported_device supp_dev;
897 struct ipr_interrupt_offsets {
898 unsigned long set_interrupt_mask_reg;
899 unsigned long clr_interrupt_mask_reg;
900 unsigned long sense_interrupt_mask_reg;
901 unsigned long clr_interrupt_reg;
903 unsigned long sense_interrupt_reg;
904 unsigned long ioarrin_reg;
905 unsigned long sense_uproc_interrupt_reg;
906 unsigned long set_uproc_interrupt_reg;
907 unsigned long clr_uproc_interrupt_reg;
910 struct ipr_interrupts {
911 void __iomem *set_interrupt_mask_reg;
912 void __iomem *clr_interrupt_mask_reg;
913 void __iomem *sense_interrupt_mask_reg;
914 void __iomem *clr_interrupt_reg;
916 void __iomem *sense_interrupt_reg;
917 void __iomem *ioarrin_reg;
918 void __iomem *sense_uproc_interrupt_reg;
919 void __iomem *set_uproc_interrupt_reg;
920 void __iomem *clr_uproc_interrupt_reg;
923 struct ipr_chip_cfg_t {
926 struct ipr_interrupt_offsets regs;
932 const struct ipr_chip_cfg_t *cfg;
935 enum ipr_shutdown_type {
936 IPR_SHUTDOWN_NORMAL = 0x00,
937 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
938 IPR_SHUTDOWN_ABBREV = 0x80,
939 IPR_SHUTDOWN_NONE = 0x100
942 struct ipr_trace_entry {
948 #define IPR_TRACE_START 0x00
949 #define IPR_TRACE_FINISH 0xff
965 struct scatterlist scatterlist[1];
976 enum ipr_cache_state {
983 /* Per-controller data */
986 #define IPR_EYECATCHER "iprcfg"
988 struct list_head queue;
990 u8 allow_interrupts:1;
991 u8 in_reset_reload:1;
992 u8 in_ioa_bringdown:1;
993 u8 ioa_unit_checked:1;
997 u8 allow_ml_add_del:1;
998 u8 needs_hard_reset:1;
1000 enum ipr_cache_state cache_state;
1001 u16 type; /* CCIN of the card */
1004 #define IPR_MAX_LOG_LEVEL 4
1005 #define IPR_DEFAULT_LOG_LEVEL 2
1007 #define IPR_NUM_TRACE_INDEX_BITS 8
1008 #define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
1009 #define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
1010 char trace_start[8];
1011 #define IPR_TRACE_START_LABEL "trace"
1012 struct ipr_trace_entry *trace;
1013 u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
1016 * Queue for free command blocks
1018 char ipr_free_label[8];
1019 #define IPR_FREEQ_LABEL "free-q"
1020 struct list_head free_q;
1023 * Queue for command blocks outstanding to the adapter
1025 char ipr_pending_label[8];
1026 #define IPR_PENDQ_LABEL "pend-q"
1027 struct list_head pending_q;
1029 char cfg_table_start[8];
1030 #define IPR_CFG_TBL_START "cfg"
1031 struct ipr_config_table *cfg_table;
1032 dma_addr_t cfg_table_dma;
1034 char resource_table_label[8];
1035 #define IPR_RES_TABLE_LABEL "res_tbl"
1036 struct ipr_resource_entry *res_entries;
1037 struct list_head free_res_q;
1038 struct list_head used_res_q;
1040 char ipr_hcam_label[8];
1041 #define IPR_HCAM_LABEL "hcams"
1042 struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
1043 dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
1044 struct list_head hostrcb_free_q;
1045 struct list_head hostrcb_pending_q;
1048 dma_addr_t host_rrq_dma;
1049 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
1050 #define IPR_HRRQ_RESP_BIT_SET 0x00000002
1051 #define IPR_HRRQ_TOGGLE_BIT 0x00000001
1052 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
1053 volatile __be32 *hrrq_start;
1054 volatile __be32 *hrrq_end;
1055 volatile __be32 *hrrq_curr;
1056 volatile u32 toggle_bit;
1058 struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
1060 const struct ipr_chip_cfg_t *chip_cfg;
1062 void __iomem *hdw_dma_regs; /* iomapped PCI memory space */
1063 unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
1064 void __iomem *ioa_mailbox;
1065 struct ipr_interrupts regs;
1067 u16 saved_pcix_cmd_reg;
1073 struct Scsi_Host *host;
1074 struct pci_dev *pdev;
1075 struct ipr_sglist *ucode_sglist;
1076 u8 saved_mode_page_len;
1078 struct work_struct work_q;
1080 wait_queue_head_t reset_wait_q;
1082 struct ipr_dump *dump;
1083 enum ipr_sdt_state sdt_state;
1085 struct ipr_misc_cbs *vpd_cbs;
1086 dma_addr_t vpd_cbs_dma;
1088 struct pci_pool *ipr_cmd_pool;
1090 struct ipr_cmnd *reset_cmd;
1092 struct ata_host ata_host;
1093 char ipr_cmd_label[8];
1094 #define IPR_CMD_LABEL "ipr_cmnd"
1095 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1096 u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1100 struct ipr_ioarcb ioarcb;
1101 struct ipr_ioasa ioasa;
1102 struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1103 struct list_head queue;
1104 struct scsi_cmnd *scsi_cmd;
1105 struct ata_queued_cmd *qc;
1106 struct completion completion;
1107 struct timer_list timer;
1108 void (*done) (struct ipr_cmnd *);
1109 int (*job_step) (struct ipr_cmnd *);
1110 int (*job_step_failed) (struct ipr_cmnd *);
1112 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1113 dma_addr_t sense_buffer_dma;
1114 unsigned short dma_use_sg;
1115 dma_addr_t dma_handle;
1116 struct ipr_cmnd *sibling;
1118 enum ipr_shutdown_type shutdown_type;
1119 struct ipr_hostrcb *hostrcb;
1120 unsigned long time_left;
1121 unsigned long scratch;
1122 struct ipr_resource_entry *res;
1123 struct scsi_device *sdev;
1126 struct ipr_ioa_cfg *ioa_cfg;
1129 struct ipr_ses_table_entry {
1130 char product_id[17];
1131 char compare_product_id_byte[17];
1132 u32 max_bus_speed_limit; /* MB/sec limit for this backplane */
1135 struct ipr_dump_header {
1137 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
1140 u32 first_entry_offset;
1142 #define IPR_DUMP_STATUS_SUCCESS 0
1143 #define IPR_DUMP_STATUS_QUAL_SUCCESS 2
1144 #define IPR_DUMP_STATUS_FAILED 0xffffffff
1146 #define IPR_DUMP_OS_LINUX 0x4C4E5558
1148 #define IPR_DUMP_DRIVER_NAME 0x49505232
1149 }__attribute__((packed, aligned (4)));
1151 struct ipr_dump_entry_header {
1153 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
1158 #define IPR_DUMP_DATA_TYPE_ASCII 0x41534349
1159 #define IPR_DUMP_DATA_TYPE_BINARY 0x42494E41
1161 #define IPR_DUMP_IOA_DUMP_ID 0x494F4131
1162 #define IPR_DUMP_LOCATION_ID 0x4C4F4341
1163 #define IPR_DUMP_TRACE_ID 0x54524143
1164 #define IPR_DUMP_DRIVER_VERSION_ID 0x44525652
1165 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1166 #define IPR_DUMP_IOA_CTRL_BLK 0x494F4342
1167 #define IPR_DUMP_PEND_OPS 0x414F5053
1169 }__attribute__((packed, aligned (4)));
1171 struct ipr_dump_location_entry {
1172 struct ipr_dump_entry_header hdr;
1173 u8 location[BUS_ID_SIZE];
1174 }__attribute__((packed));
1176 struct ipr_dump_trace_entry {
1177 struct ipr_dump_entry_header hdr;
1178 u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1179 }__attribute__((packed, aligned (4)));
1181 struct ipr_dump_version_entry {
1182 struct ipr_dump_entry_header hdr;
1183 u8 version[sizeof(IPR_DRIVER_VERSION)];
1186 struct ipr_dump_ioa_type_entry {
1187 struct ipr_dump_entry_header hdr;
1192 struct ipr_driver_dump {
1193 struct ipr_dump_header hdr;
1194 struct ipr_dump_version_entry version_entry;
1195 struct ipr_dump_location_entry location_entry;
1196 struct ipr_dump_ioa_type_entry ioa_type_entry;
1197 struct ipr_dump_trace_entry trace_entry;
1198 }__attribute__((packed));
1200 struct ipr_ioa_dump {
1201 struct ipr_dump_entry_header hdr;
1203 __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1205 u32 next_page_index;
1208 #define IPR_SDT_FMT2 2
1209 #define IPR_SDT_UNKNOWN 3
1210 }__attribute__((packed, aligned (4)));
1214 struct ipr_ioa_cfg *ioa_cfg;
1215 struct ipr_driver_dump driver_dump;
1216 struct ipr_ioa_dump ioa_dump;
1219 struct ipr_error_table_t {
1226 struct ipr_software_inq_lid_info {
1228 __be32 timestamp[3];
1229 }__attribute__((packed, aligned (4)));
1231 struct ipr_ucode_image_header {
1232 __be32 header_length;
1233 __be32 lid_table_offset;
1236 u8 minor_release[2];
1238 char eyecatcher[16];
1240 struct ipr_software_inq_lid_info lid[1];
1241 }__attribute__((packed, aligned (4)));
1246 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1248 #ifdef CONFIG_SCSI_IPR_TRACE
1249 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1250 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1252 #define ipr_create_trace_file(kobj, attr) 0
1253 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1256 #ifdef CONFIG_SCSI_IPR_DUMP
1257 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1258 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1260 #define ipr_create_dump_file(kobj, attr) 0
1261 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1265 * Error logging macros
1267 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1268 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1269 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1271 #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \
1272 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \
1273 (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__)
1275 #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \
1276 ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__)
1278 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1279 ipr_ra_err(ioa_cfg, (res)->cfgte.res_addr, fmt, ##__VA_ARGS__)
1281 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...) \
1283 if ((res).bus >= IPR_MAX_NUM_BUSES) { \
1284 ipr_err(fmt": unknown\n", ##__VA_ARGS__); \
1286 ipr_err(fmt": %d:%d:%d:%d\n", \
1287 ##__VA_ARGS__, (ioa_cfg)->host->host_no, \
1288 (res).bus, (res).target, (res).lun); \
1292 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1293 __FILE__, __FUNCTION__, __LINE__)
1295 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1296 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1298 #define ipr_err_separator \
1299 ipr_err("----------------------------------------------------------\n")
1307 * ipr_is_ioa_resource - Determine if a resource is the IOA
1308 * @res: resource entry struct
1311 * 1 if IOA / 0 if not IOA
1313 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1315 return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1319 * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1320 * @res: resource entry struct
1323 * 1 if AF DASD / 0 if not AF DASD
1325 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1327 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1328 !ipr_is_ioa_resource(res) &&
1329 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1336 * ipr_is_vset_device - Determine if a resource is a VSET
1337 * @res: resource entry struct
1340 * 1 if VSET / 0 if not VSET
1342 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1344 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1345 !ipr_is_ioa_resource(res) &&
1346 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1353 * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1354 * @res: resource entry struct
1357 * 1 if GSCSI / 0 if not GSCSI
1359 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1361 if (!ipr_is_ioa_resource(res) &&
1362 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1369 * ipr_is_scsi_disk - Determine if a resource is a SCSI disk
1370 * @res: resource entry struct
1373 * 1 if SCSI disk / 0 if not SCSI disk
1375 static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res)
1377 if (ipr_is_af_dasd_device(res) ||
1378 (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data)))
1385 * ipr_is_gata - Determine if a resource is a generic ATA resource
1386 * @res: resource entry struct
1389 * 1 if GATA / 0 if not GATA
1391 static inline int ipr_is_gata(struct ipr_resource_entry *res)
1393 if (!ipr_is_ioa_resource(res) &&
1394 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_ATA)
1401 * ipr_is_naca_model - Determine if a resource is using NACA queueing model
1402 * @res: resource entry struct
1405 * 1 if NACA queueing model / 0 if not NACA queueing model
1407 static inline int ipr_is_naca_model(struct ipr_resource_entry *res)
1409 if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL)
1415 * ipr_is_device - Determine if resource address is that of a device
1416 * @res_addr: resource address struct
1419 * 1 if AF / 0 if not AF
1421 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1423 if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1424 (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1)))
1431 * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1432 * @sdt_word: SDT address
1435 * 1 if format 2 / 0 if not
1437 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1439 u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1442 case IPR_SDT_FMT2_BAR0_SEL:
1443 case IPR_SDT_FMT2_BAR1_SEL:
1444 case IPR_SDT_FMT2_BAR2_SEL:
1445 case IPR_SDT_FMT2_BAR3_SEL:
1446 case IPR_SDT_FMT2_BAR4_SEL:
1447 case IPR_SDT_FMT2_BAR5_SEL:
1448 case IPR_SDT_FMT2_EXP_ROM_SEL: