drivers/scsi/isci/host.c

   1 /*
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  * redistributing this file, you may do so under either license.
   4  *
   5  * GPL LICENSE SUMMARY
   6  *
   7  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * BSD LICENSE
  25  *
  26  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27  * All rights reserved.
  28  *
  29  * Redistribution and use in source and binary forms, with or without
  30  * modification, are permitted provided that the following conditions
  31  * are met:
  32  *
  33  *   * Redistributions of source code must retain the above copyright
  34  *     notice, this list of conditions and the following disclaimer.
  35  *   * Redistributions in binary form must reproduce the above copyright
  36  *     notice, this list of conditions and the following disclaimer in
  37  *     the documentation and/or other materials provided with the
  38  *     distribution.
  39  *   * Neither the name of Intel Corporation nor the names of its
  40  *     contributors may be used to endorse or promote products derived
  41  *     from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54  */
  55 #include <linux/circ_buf.h>
  56 #include <linux/device.h>
  57 #include <scsi/sas.h>
  58 #include "host.h"
  59 #include "isci.h"
  60 #include "port.h"
  61 #include "host.h"
  62 #include "probe_roms.h"
  63 #include "remote_device.h"
  64 #include "request.h"
  65 #include "scu_completion_codes.h"
  66 #include "scu_event_codes.h"
  67 #include "registers.h"
  68 #include "scu_remote_node_context.h"
  69 #include "scu_task_context.h"
  70 #include "scu_unsolicited_frame.h"
  71
  72 #define SCU_CONTEXT_RAM_INIT_STALL_TIME      200
  73
  74 #define smu_max_ports(dcc_value) \
  75         (\
  76                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
  77                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
  78         )
  79
  80 #define smu_max_task_contexts(dcc_value)        \
  81         (\
  82                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
  83                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
  84         )
  85
  86 #define smu_max_rncs(dcc_value) \
  87         (\
  88                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
  89                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
  90         )
  91
  92 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT      100
  93
  94 /**
  95  *
  96  *
  97  * The number of milliseconds to wait while a given phy is consuming power
  98  * before allowing another set of phys to consume power. Ultimately, this will
  99  * be specified by OEM parameter.
 100  */
 101 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
 102
 103 /**
 104  * NORMALIZE_PUT_POINTER() -
 105  *
 106  * This macro will normalize the completion queue put pointer so its value can
 107  * be used as an array inde
 108  */
 109 #define NORMALIZE_PUT_POINTER(x) \
 110         ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
 111
 112
 113 /**
 114  * NORMALIZE_EVENT_POINTER() -
 115  *
 116  * This macro will normalize the completion queue event entry so its value can
 117  * be used as an index.
 118  */
 119 #define NORMALIZE_EVENT_POINTER(x) \
 120         (\
 121                 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
 122                 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
 123         )
 124
 125 /**
 126  * NORMALIZE_GET_POINTER() -
 127  *
 128  * This macro will normalize the completion queue get pointer so its value can
 129  * be used as an index into an array
 130  */
 131 #define NORMALIZE_GET_POINTER(x) \
 132         ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
 133
 134 /**
 135  * NORMALIZE_GET_POINTER_CYCLE_BIT() -
 136  *
 137  * This macro will normalize the completion queue cycle pointer so it matches
 138  * the completion queue cycle bit
 139  */
 140 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
 141         ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
 142
 143 /**
 144  * COMPLETION_QUEUE_CYCLE_BIT() -
 145  *
 146  * This macro will return the cycle bit of the completion queue entry
 147  */
 148 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
 149
 150 /* Init the state machine and call the state entry function (if any) */
 151 void sci_init_sm(struct sci_base_state_machine *sm,
 152                  const struct sci_base_state *state_table, u32 initial_state)
 153 {
 154         sci_state_transition_t handler;
 155
 156         sm->initial_state_id    = initial_state;
 157         sm->previous_state_id   = initial_state;
 158         sm->current_state_id    = initial_state;
 159         sm->state_table         = state_table;
 160
 161         handler = sm->state_table[initial_state].enter_state;
 162         if (handler)
 163                 handler(sm);
 164 }
 165
 166 /* Call the state exit fn, update the current state, call the state entry fn */
 167 void sci_change_state(struct sci_base_state_machine *sm, u32 next_state)
 168 {
 169         sci_state_transition_t handler;
 170
 171         handler = sm->state_table[sm->current_state_id].exit_state;
 172         if (handler)
 173                 handler(sm);
 174
 175         sm->previous_state_id = sm->current_state_id;
 176         sm->current_state_id = next_state;
 177
 178         handler = sm->state_table[sm->current_state_id].enter_state;
 179         if (handler)
 180                 handler(sm);
 181 }
 182
 183 static bool scic_sds_controller_completion_queue_has_entries(
 184         struct scic_sds_controller *scic)
 185 {
 186         u32 get_value = scic->completion_queue_get;
 187         u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
 188
 189         if (NORMALIZE_GET_POINTER_CYCLE_BIT(get_value) ==
 190             COMPLETION_QUEUE_CYCLE_BIT(scic->completion_queue[get_index]))
 191                 return true;
 192
 193         return false;
 194 }
 195
 196 static bool scic_sds_controller_isr(struct scic_sds_controller *scic)
 197 {
 198         if (scic_sds_controller_completion_queue_has_entries(scic)) {
 199                 return true;
 200         } else {
 201                 /*
 202                  * we have a spurious interrupt it could be that we have already
 203                  * emptied the completion queue from a previous interrupt */
 204                 writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
 205
 206                 /*
 207                  * There is a race in the hardware that could cause us not to be notified
 208                  * of an interrupt completion if we do not take this step.  We will mask
 209                  * then unmask the interrupts so if there is another interrupt pending
 210                  * the clearing of the interrupt source we get the next interrupt message. */
 211                 writel(0xFF000000, &scic->smu_registers->interrupt_mask);
 212                 writel(0, &scic->smu_registers->interrupt_mask);
 213         }
 214
 215         return false;
 216 }
 217
 218 irqreturn_t isci_msix_isr(int vec, void *data)
 219 {
 220         struct isci_host *ihost = data;
 221
 222         if (scic_sds_controller_isr(&ihost->sci))
 223                 tasklet_schedule(&ihost->completion_tasklet);
 224
 225         return IRQ_HANDLED;
 226 }
 227
 228 static bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
 229 {
 230         u32 interrupt_status;
 231
 232         interrupt_status =
 233                 readl(&scic->smu_registers->interrupt_status);
 234         interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
 235
 236         if (interrupt_status != 0) {
 237                 /*
 238                  * There is an error interrupt pending so let it through and handle
 239                  * in the callback */
 240                 return true;
 241         }
 242
 243         /*
 244          * There is a race in the hardware that could cause us not to be notified
 245          * of an interrupt completion if we do not take this step.  We will mask
 246          * then unmask the error interrupts so if there was another interrupt
 247          * pending we will be notified.
 248          * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
 249         writel(0xff, &scic->smu_registers->interrupt_mask);
 250         writel(0, &scic->smu_registers->interrupt_mask);
 251
 252         return false;
 253 }
 254
 255 static void scic_sds_controller_task_completion(struct scic_sds_controller *scic,
 256                                                 u32 completion_entry)
 257 {
 258         u32 index;
 259         struct scic_sds_request *sci_req;
 260
 261         index = SCU_GET_COMPLETION_INDEX(completion_entry);
 262         sci_req = scic->io_request_table[index];
 263
 264         /* Make sure that we really want to process this IO request */
 265         if (sci_req && sci_req->io_tag != SCI_CONTROLLER_INVALID_IO_TAG &&
 266             ISCI_TAG_SEQ(sci_req->io_tag) == scic->io_request_sequence[index])
 267                 /* Yep this is a valid io request pass it along to the io request handler */
 268                 scic_sds_io_request_tc_completion(sci_req, completion_entry);
 269 }
 270
 271 static void scic_sds_controller_sdma_completion(struct scic_sds_controller *scic,
 272                                                 u32 completion_entry)
 273 {
 274         u32 index;
 275         struct scic_sds_request *io_request;
 276         struct scic_sds_remote_device *device;
 277
 278         index = SCU_GET_COMPLETION_INDEX(completion_entry);
 279
 280         switch (scu_get_command_request_type(completion_entry)) {
 281         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
 282         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
 283                 io_request = scic->io_request_table[index];
 284                 dev_warn(scic_to_dev(scic),
 285                          "%s: SCIC SDS Completion type SDMA %x for io request "
 286                          "%p\n",
 287                          __func__,
 288                          completion_entry,
 289                          io_request);
 290                 /* @todo For a post TC operation we need to fail the IO
 291                  * request
 292                  */
 293                 break;
 294
 295         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
 296         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
 297         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
 298                 device = scic->device_table[index];
 299                 dev_warn(scic_to_dev(scic),
 300                          "%s: SCIC SDS Completion type SDMA %x for remote "
 301                          "device %p\n",
 302                          __func__,
 303                          completion_entry,
 304                          device);
 305                 /* @todo For a port RNC operation we need to fail the
 306                  * device
 307                  */
 308                 break;
 309
 310         default:
 311                 dev_warn(scic_to_dev(scic),
 312                          "%s: SCIC SDS Completion unknown SDMA completion "
 313                          "type %x\n",
 314                          __func__,
 315                          completion_entry);
 316                 break;
 317
 318         }
 319 }
 320
 321 static void scic_sds_controller_unsolicited_frame(struct scic_sds_controller *scic,
 322                                                   u32 completion_entry)
 323 {
 324         u32 index;
 325         u32 frame_index;
 326
 327         struct isci_host *ihost = scic_to_ihost(scic);
 328         struct scu_unsolicited_frame_header *frame_header;
 329         struct scic_sds_phy *phy;
 330         struct scic_sds_remote_device *device;
 331
 332         enum sci_status result = SCI_FAILURE;
 333
 334         frame_index = SCU_GET_FRAME_INDEX(completion_entry);
 335
 336         frame_header = scic->uf_control.buffers.array[frame_index].header;
 337         scic->uf_control.buffers.array[frame_index].state = UNSOLICITED_FRAME_IN_USE;
 338
 339         if (SCU_GET_FRAME_ERROR(completion_entry)) {
 340                 /*
 341                  * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
 342                  * /       this cause a problem? We expect the phy initialization will
 343                  * /       fail if there is an error in the frame. */
 344                 scic_sds_controller_release_frame(scic, frame_index);
 345                 return;
 346         }
 347
 348         if (frame_header->is_address_frame) {
 349                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
 350                 phy = &ihost->phys[index].sci;
 351                 result = scic_sds_phy_frame_handler(phy, frame_index);
 352         } else {
 353
 354                 index = SCU_GET_COMPLETION_INDEX(completion_entry);
 355
 356                 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
 357                         /*
 358                          * This is a signature fis or a frame from a direct attached SATA
 359                          * device that has not yet been created.  In either case forwared
 360                          * the frame to the PE and let it take care of the frame data. */
 361                         index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
 362                         phy = &ihost->phys[index].sci;
 363                         result = scic_sds_phy_frame_handler(phy, frame_index);
 364                 } else {
 365                         if (index < scic->remote_node_entries)
 366                                 device = scic->device_table[index];
 367                         else
 368                                 device = NULL;
 369
 370                         if (device != NULL)
 371                                 result = scic_sds_remote_device_frame_handler(device, frame_index);
 372                         else
 373                                 scic_sds_controller_release_frame(scic, frame_index);
 374                 }
 375         }
 376
 377         if (result != SCI_SUCCESS) {
 378                 /*
 379                  * / @todo Is there any reason to report some additional error message
 380                  * /       when we get this failure notifiction? */
 381         }
 382 }
 383
 384 static void scic_sds_controller_event_completion(struct scic_sds_controller *scic,
 385                                                  u32 completion_entry)
 386 {
 387         struct isci_host *ihost = scic_to_ihost(scic);
 388         struct scic_sds_request *io_request;
 389         struct scic_sds_remote_device *device;
 390         struct scic_sds_phy *phy;
 391         u32 index;
 392
 393         index = SCU_GET_COMPLETION_INDEX(completion_entry);
 394
 395         switch (scu_get_event_type(completion_entry)) {
 396         case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
 397                 /* / @todo The driver did something wrong and we need to fix the condtion. */
 398                 dev_err(scic_to_dev(scic),
 399                         "%s: SCIC Controller 0x%p received SMU command error "
 400                         "0x%x\n",
 401                         __func__,
 402                         scic,
 403                         completion_entry);
 404                 break;
 405
 406         case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
 407         case SCU_EVENT_TYPE_SMU_ERROR:
 408         case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
 409                 /*
 410                  * / @todo This is a hardware failure and its likely that we want to
 411                  * /       reset the controller. */
 412                 dev_err(scic_to_dev(scic),
 413                         "%s: SCIC Controller 0x%p received fatal controller "
 414                         "event  0x%x\n",
 415                         __func__,
 416                         scic,
 417                         completion_entry);
 418                 break;
 419
 420         case SCU_EVENT_TYPE_TRANSPORT_ERROR:
 421                 io_request = scic->io_request_table[index];
 422                 scic_sds_io_request_event_handler(io_request, completion_entry);
 423                 break;
 424
 425         case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
 426                 switch (scu_get_event_specifier(completion_entry)) {
 427                 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
 428                 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
 429                         io_request = scic->io_request_table[index];
 430                         if (io_request != NULL)
 431                                 scic_sds_io_request_event_handler(io_request, completion_entry);
 432                         else
 433                                 dev_warn(scic_to_dev(scic),
 434                                          "%s: SCIC Controller 0x%p received "
 435                                          "event 0x%x for io request object "
 436                                          "that doesnt exist.\n",
 437                                          __func__,
 438                                          scic,
 439                                          completion_entry);
 440
 441                         break;
 442
 443                 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
 444                         device = scic->device_table[index];
 445                         if (device != NULL)
 446                                 scic_sds_remote_device_event_handler(device, completion_entry);
 447                         else
 448                                 dev_warn(scic_to_dev(scic),
 449                                          "%s: SCIC Controller 0x%p received "
 450                                          "event 0x%x for remote device object "
 451                                          "that doesnt exist.\n",
 452                                          __func__,
 453                                          scic,
 454                                          completion_entry);
 455
 456                         break;
 457                 }
 458                 break;
 459
 460         case SCU_EVENT_TYPE_BROADCAST_CHANGE:
 461         /*
 462          * direct the broadcast change event to the phy first and then let
 463          * the phy redirect the broadcast change to the port object */
 464         case SCU_EVENT_TYPE_ERR_CNT_EVENT:
 465         /*
 466          * direct error counter event to the phy object since that is where
 467          * we get the event notification.  This is a type 4 event. */
 468         case SCU_EVENT_TYPE_OSSP_EVENT:
 469                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
 470                 phy = &ihost->phys[index].sci;
 471                 scic_sds_phy_event_handler(phy, completion_entry);
 472                 break;
 473
 474         case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
 475         case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
 476         case SCU_EVENT_TYPE_RNC_OPS_MISC:
 477                 if (index < scic->remote_node_entries) {
 478                         device = scic->device_table[index];
 479
 480                         if (device != NULL)
 481                                 scic_sds_remote_device_event_handler(device, completion_entry);
 482                 } else
 483                         dev_err(scic_to_dev(scic),
 484                                 "%s: SCIC Controller 0x%p received event 0x%x "
 485                                 "for remote device object 0x%0x that doesnt "
 486                                 "exist.\n",
 487                                 __func__,
 488                                 scic,
 489                                 completion_entry,
 490                                 index);
 491
 492                 break;
 493
 494         default:
 495                 dev_warn(scic_to_dev(scic),
 496                          "%s: SCIC Controller received unknown event code %x\n",
 497                          __func__,
 498                          completion_entry);
 499                 break;
 500         }
 501 }
 502
 503 static void scic_sds_controller_process_completions(struct scic_sds_controller *scic)
 504 {
 505         u32 completion_count = 0;
 506         u32 completion_entry;
 507         u32 get_index;
 508         u32 get_cycle;
 509         u32 event_get;
 510         u32 event_cycle;
 511
 512         dev_dbg(scic_to_dev(scic),
 513                 "%s: completion queue begining get:0x%08x\n",
 514                 __func__,
 515                 scic->completion_queue_get);
 516
 517         /* Get the component parts of the completion queue */
 518         get_index = NORMALIZE_GET_POINTER(scic->completion_queue_get);
 519         get_cycle = SMU_CQGR_CYCLE_BIT & scic->completion_queue_get;
 520
 521         event_get = NORMALIZE_EVENT_POINTER(scic->completion_queue_get);
 522         event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & scic->completion_queue_get;
 523
 524         while (
 525                 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
 526                 == COMPLETION_QUEUE_CYCLE_BIT(scic->completion_queue[get_index])
 527                 ) {
 528                 completion_count++;
 529
 530                 completion_entry = scic->completion_queue[get_index];
 531
 532                 /* increment the get pointer and check for rollover to toggle the cycle bit */
 533                 get_cycle ^= ((get_index+1) & SCU_MAX_COMPLETION_QUEUE_ENTRIES) <<
 534                              (SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT - SCU_MAX_COMPLETION_QUEUE_SHIFT);
 535                 get_index = (get_index+1) & (SCU_MAX_COMPLETION_QUEUE_ENTRIES-1);
 536
 537                 dev_dbg(scic_to_dev(scic),
 538                         "%s: completion queue entry:0x%08x\n",
 539                         __func__,
 540                         completion_entry);
 541
 542                 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
 543                 case SCU_COMPLETION_TYPE_TASK:
 544                         scic_sds_controller_task_completion(scic, completion_entry);
 545                         break;
 546
 547                 case SCU_COMPLETION_TYPE_SDMA:
 548                         scic_sds_controller_sdma_completion(scic, completion_entry);
 549                         break;
 550
 551                 case SCU_COMPLETION_TYPE_UFI:
 552                         scic_sds_controller_unsolicited_frame(scic, completion_entry);
 553                         break;
 554
 555                 case SCU_COMPLETION_TYPE_EVENT:
 556                 case SCU_COMPLETION_TYPE_NOTIFY: {
 557                         event_cycle ^= ((event_get+1) & SCU_MAX_EVENTS) <<
 558                                        (SMU_COMPLETION_QUEUE_GET_EVENT_CYCLE_BIT_SHIFT - SCU_MAX_EVENTS_SHIFT);
 559                         event_get = (event_get+1) & (SCU_MAX_EVENTS-1);
 560
 561                         scic_sds_controller_event_completion(scic, completion_entry);
 562                         break;
 563                 }
 564                 default:
 565                         dev_warn(scic_to_dev(scic),
 566                                  "%s: SCIC Controller received unknown "
 567                                  "completion type %x\n",
 568                                  __func__,
 569                                  completion_entry);
 570                         break;
 571                 }
 572         }
 573
 574         /* Update the get register if we completed one or more entries */
 575         if (completion_count > 0) {
 576                 scic->completion_queue_get =
 577                         SMU_CQGR_GEN_BIT(ENABLE) |
 578                         SMU_CQGR_GEN_BIT(EVENT_ENABLE) |
 579                         event_cycle |
 580                         SMU_CQGR_GEN_VAL(EVENT_POINTER, event_get) |
 581                         get_cycle |
 582                         SMU_CQGR_GEN_VAL(POINTER, get_index);
 583
 584                 writel(scic->completion_queue_get,
 585                        &scic->smu_registers->completion_queue_get);
 586
 587         }
 588
 589         dev_dbg(scic_to_dev(scic),
 590                 "%s: completion queue ending get:0x%08x\n",
 591                 __func__,
 592                 scic->completion_queue_get);
 593
 594 }
 595
 596 static void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
 597 {
 598         u32 interrupt_status;
 599
 600         interrupt_status =
 601                 readl(&scic->smu_registers->interrupt_status);
 602
 603         if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
 604             scic_sds_controller_completion_queue_has_entries(scic)) {
 605
 606                 scic_sds_controller_process_completions(scic);
 607                 writel(SMU_ISR_QUEUE_SUSPEND, &scic->smu_registers->interrupt_status);
 608         } else {
 609                 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
 610                         interrupt_status);
 611
 612                 sci_change_state(&scic->sm, SCIC_FAILED);
 613
 614                 return;
 615         }
 616
 617         /* If we dont process any completions I am not sure that we want to do this.
 618          * We are in the middle of a hardware fault and should probably be reset.
 619          */
 620         writel(0, &scic->smu_registers->interrupt_mask);
 621 }
 622
 623 irqreturn_t isci_intx_isr(int vec, void *data)
 624 {
 625         irqreturn_t ret = IRQ_NONE;
 626         struct isci_host *ihost = data;
 627         struct scic_sds_controller *scic = &ihost->sci;
 628
 629         if (scic_sds_controller_isr(scic)) {
 630                 writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
 631                 tasklet_schedule(&ihost->completion_tasklet);
 632                 ret = IRQ_HANDLED;
 633         } else if (scic_sds_controller_error_isr(scic)) {
 634                 spin_lock(&ihost->scic_lock);
 635                 scic_sds_controller_error_handler(scic);
 636                 spin_unlock(&ihost->scic_lock);
 637                 ret = IRQ_HANDLED;
 638         }
 639
 640         return ret;
 641 }
 642
 643 irqreturn_t isci_error_isr(int vec, void *data)
 644 {
 645         struct isci_host *ihost = data;
 646
 647         if (scic_sds_controller_error_isr(&ihost->sci))
 648                 scic_sds_controller_error_handler(&ihost->sci);
 649
 650         return IRQ_HANDLED;
 651 }
 652
 653 /**
 654  * isci_host_start_complete() - This function is called by the core library,
 655  *    through the ISCI Module, to indicate controller start status.
 656  * @isci_host: This parameter specifies the ISCI host object
 657  * @completion_status: This parameter specifies the completion status from the
 658  *    core library.
 659  *
 660  */
 661 static void isci_host_start_complete(struct isci_host *ihost, enum sci_status completion_status)
 662 {
 663         if (completion_status != SCI_SUCCESS)
 664                 dev_info(&ihost->pdev->dev,
 665                         "controller start timed out, continuing...\n");
 666         isci_host_change_state(ihost, isci_ready);
 667         clear_bit(IHOST_START_PENDING, &ihost->flags);
 668         wake_up(&ihost->eventq);
 669 }
 670
 671 int isci_host_scan_finished(struct Scsi_Host *shost, unsigned long time)
 672 {
 673         struct isci_host *ihost = SHOST_TO_SAS_HA(shost)->lldd_ha;
 674
 675         if (test_bit(IHOST_START_PENDING, &ihost->flags))
 676                 return 0;
 677
 678         /* todo: use sas_flush_discovery once it is upstream */
 679         scsi_flush_work(shost);
 680
 681         scsi_flush_work(shost);
 682
 683         dev_dbg(&ihost->pdev->dev,
 684                 "%s: ihost->status = %d, time = %ld\n",
 685                  __func__, isci_host_get_state(ihost), time);
 686
 687         return 1;
 688
 689 }
 690
 691 /**
 692  * scic_controller_get_suggested_start_timeout() - This method returns the
 693  *    suggested scic_controller_start() timeout amount.  The user is free to
 694  *    use any timeout value, but this method provides the suggested minimum
 695  *    start timeout value.  The returned value is based upon empirical
 696  *    information determined as a result of interoperability testing.
 697  * @controller: the handle to the controller object for which to return the
 698  *    suggested start timeout.
 699  *
 700  * This method returns the number of milliseconds for the suggested start
 701  * operation timeout.
 702  */
 703 static u32 scic_controller_get_suggested_start_timeout(
 704         struct scic_sds_controller *sc)
 705 {
 706         /* Validate the user supplied parameters. */
 707         if (sc == NULL)
 708                 return 0;
 709
 710         /*
 711          * The suggested minimum timeout value for a controller start operation:
 712          *
 713          *     Signature FIS Timeout
 714          *   + Phy Start Timeout
 715          *   + Number of Phy Spin Up Intervals
 716          *   ---------------------------------
 717          *   Number of milliseconds for the controller start operation.
 718          *
 719          * NOTE: The number of phy spin up intervals will be equivalent
 720          *       to the number of phys divided by the number phys allowed
 721          *       per interval - 1 (once OEM parameters are supported).
 722          *       Currently we assume only 1 phy per interval. */
 723
 724         return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
 725                 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
 726                 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
 727 }
 728
 729 static void scic_controller_enable_interrupts(
 730         struct scic_sds_controller *scic)
 731 {
 732         BUG_ON(scic->smu_registers == NULL);
 733         writel(0, &scic->smu_registers->interrupt_mask);
 734 }
 735
 736 void scic_controller_disable_interrupts(
 737         struct scic_sds_controller *scic)
 738 {
 739         BUG_ON(scic->smu_registers == NULL);
 740         writel(0xffffffff, &scic->smu_registers->interrupt_mask);
 741 }
 742
 743 static void scic_sds_controller_enable_port_task_scheduler(
 744         struct scic_sds_controller *scic)
 745 {
 746         u32 port_task_scheduler_value;
 747
 748         port_task_scheduler_value =
 749                 readl(&scic->scu_registers->peg0.ptsg.control);
 750         port_task_scheduler_value |=
 751                 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) |
 752                  SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
 753         writel(port_task_scheduler_value,
 754                &scic->scu_registers->peg0.ptsg.control);
 755 }
 756
 757 static void scic_sds_controller_assign_task_entries(struct scic_sds_controller *scic)
 758 {
 759         u32 task_assignment;
 760
 761         /*
 762          * Assign all the TCs to function 0
 763          * TODO: Do we actually need to read this register to write it back?
 764          */
 765
 766         task_assignment =
 767                 readl(&scic->smu_registers->task_context_assignment[0]);
 768
 769         task_assignment |= (SMU_TCA_GEN_VAL(STARTING, 0)) |
 770                 (SMU_TCA_GEN_VAL(ENDING,  scic->task_context_entries - 1)) |
 771                 (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE));
 772
 773         writel(task_assignment,
 774                 &scic->smu_registers->task_context_assignment[0]);
 775
 776 }
 777
 778 static void scic_sds_controller_initialize_completion_queue(struct scic_sds_controller *scic)
 779 {
 780         u32 index;
 781         u32 completion_queue_control_value;
 782         u32 completion_queue_get_value;
 783         u32 completion_queue_put_value;
 784
 785         scic->completion_queue_get = 0;
 786
 787         completion_queue_control_value =
 788                 (SMU_CQC_QUEUE_LIMIT_SET(SCU_MAX_COMPLETION_QUEUE_ENTRIES - 1) |
 789                  SMU_CQC_EVENT_LIMIT_SET(SCU_MAX_EVENTS - 1));
 790
 791         writel(completion_queue_control_value,
 792                &scic->smu_registers->completion_queue_control);
 793
 794
 795         /* Set the completion queue get pointer and enable the queue */
 796         completion_queue_get_value = (
 797                 (SMU_CQGR_GEN_VAL(POINTER, 0))
 798                 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
 799                 | (SMU_CQGR_GEN_BIT(ENABLE))
 800                 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
 801                 );
 802
 803         writel(completion_queue_get_value,
 804                &scic->smu_registers->completion_queue_get);
 805
 806         /* Set the completion queue put pointer */
 807         completion_queue_put_value = (
 808                 (SMU_CQPR_GEN_VAL(POINTER, 0))
 809                 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
 810                 );
 811
 812         writel(completion_queue_put_value,
 813                &scic->smu_registers->completion_queue_put);
 814
 815         /* Initialize the cycle bit of the completion queue entries */
 816         for (index = 0; index < SCU_MAX_COMPLETION_QUEUE_ENTRIES; index++) {
 817                 /*
 818                  * If get.cycle_bit != completion_queue.cycle_bit
 819                  * its not a valid completion queue entry
 820                  * so at system start all entries are invalid */
 821                 scic->completion_queue[index] = 0x80000000;
 822         }
 823 }
 824
 825 static void scic_sds_controller_initialize_unsolicited_frame_queue(struct scic_sds_controller *scic)
 826 {
 827         u32 frame_queue_control_value;
 828         u32 frame_queue_get_value;
 829         u32 frame_queue_put_value;
 830
 831         /* Write the queue size */
 832         frame_queue_control_value =
 833                 SCU_UFQC_GEN_VAL(QUEUE_SIZE, SCU_MAX_UNSOLICITED_FRAMES);
 834
 835         writel(frame_queue_control_value,
 836                &scic->scu_registers->sdma.unsolicited_frame_queue_control);
 837
 838         /* Setup the get pointer for the unsolicited frame queue */
 839         frame_queue_get_value = (
 840                 SCU_UFQGP_GEN_VAL(POINTER, 0)
 841                 |  SCU_UFQGP_GEN_BIT(ENABLE_BIT)
 842                 );
 843
 844         writel(frame_queue_get_value,
 845                &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
 846         /* Setup the put pointer for the unsolicited frame queue */
 847         frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
 848         writel(frame_queue_put_value,
 849                &scic->scu_registers->sdma.unsolicited_frame_put_pointer);
 850 }
 851
 852 /**
 853  * This method will attempt to transition into the ready state for the
 854  *    controller and indicate that the controller start operation has completed
 855  *    if all criteria are met.
 856  * @scic: This parameter indicates the controller object for which
 857  *    to transition to ready.
 858  * @status: This parameter indicates the status value to be pass into the call
 859  *    to scic_cb_controller_start_complete().
 860  *
 861  * none.
 862  */
 863 static void scic_sds_controller_transition_to_ready(
 864         struct scic_sds_controller *scic,
 865         enum sci_status status)
 866 {
 867         struct isci_host *ihost = scic_to_ihost(scic);
 868
 869         if (scic->sm.current_state_id == SCIC_STARTING) {
 870                 /*
 871                  * We move into the ready state, because some of the phys/ports
 872                  * may be up and operational.
 873                  */
 874                 sci_change_state(&scic->sm, SCIC_READY);
 875
 876                 isci_host_start_complete(ihost, status);
 877         }
 878 }
 879
 880 static bool is_phy_starting(struct scic_sds_phy *sci_phy)
 881 {
 882         enum scic_sds_phy_states state;
 883
 884         state = sci_phy->sm.current_state_id;
 885         switch (state) {
 886         case SCI_PHY_STARTING:
 887         case SCI_PHY_SUB_INITIAL:
 888         case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN:
 889         case SCI_PHY_SUB_AWAIT_IAF_UF:
 890         case SCI_PHY_SUB_AWAIT_SAS_POWER:
 891         case SCI_PHY_SUB_AWAIT_SATA_POWER:
 892         case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:
 893         case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN:
 894         case SCI_PHY_SUB_AWAIT_SIG_FIS_UF:
 895         case SCI_PHY_SUB_FINAL:
 896                 return true;
 897         default:
 898                 return false;
 899         }
 900 }
 901
 902 /**
 903  * scic_sds_controller_start_next_phy - start phy
 904  * @scic: controller
 905  *
 906  * If all the phys have been started, then attempt to transition the
 907  * controller to the READY state and inform the user
 908  * (scic_cb_controller_start_complete()).
 909  */
 910 static enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_controller *scic)
 911 {
 912         struct isci_host *ihost = scic_to_ihost(scic);
 913         struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
 914         struct scic_sds_phy *sci_phy;
 915         enum sci_status status;
 916
 917         status = SCI_SUCCESS;
 918
 919         if (scic->phy_startup_timer_pending)
 920                 return status;
 921
 922         if (scic->next_phy_to_start >= SCI_MAX_PHYS) {
 923                 bool is_controller_start_complete = true;
 924                 u32 state;
 925                 u8 index;
 926
 927                 for (index = 0; index < SCI_MAX_PHYS; index++) {
 928                         sci_phy = &ihost->phys[index].sci;
 929                         state = sci_phy->sm.current_state_id;
 930
 931                         if (!phy_get_non_dummy_port(sci_phy))
 932                                 continue;
 933
 934                         /* The controller start operation is complete iff:
 935                          * - all links have been given an opportunity to start
 936                          * - have no indication of a connected device
 937                          * - have an indication of a connected device and it has
 938                          *   finished the link training process.
 939                          */
 940                         if ((sci_phy->is_in_link_training == false && state == SCI_PHY_INITIAL) ||
 941                             (sci_phy->is_in_link_training == false && state == SCI_PHY_STOPPED) ||
 942                             (sci_phy->is_in_link_training == true && is_phy_starting(sci_phy))) {
 943                                 is_controller_start_complete = false;
 944                                 break;
 945                         }
 946                 }
 947
 948                 /*
 949                  * The controller has successfully finished the start process.
 950                  * Inform the SCI Core user and transition to the READY state. */
 951                 if (is_controller_start_complete == true) {
 952                         scic_sds_controller_transition_to_ready(scic, SCI_SUCCESS);
 953                         sci_del_timer(&scic->phy_timer);
 954                         scic->phy_startup_timer_pending = false;
 955                 }
 956         } else {
 957                 sci_phy = &ihost->phys[scic->next_phy_to_start].sci;
 958
 959                 if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
 960                         if (phy_get_non_dummy_port(sci_phy) == NULL) {
 961                                 scic->next_phy_to_start++;
 962
 963                                 /* Caution recursion ahead be forwarned
 964                                  *
 965                                  * The PHY was never added to a PORT in MPC mode
 966                                  * so start the next phy in sequence This phy
 967                                  * will never go link up and will not draw power
 968                                  * the OEM parameters either configured the phy
 969                                  * incorrectly for the PORT or it was never
 970                                  * assigned to a PORT
 971                                  */
 972                                 return scic_sds_controller_start_next_phy(scic);
 973                         }
 974                 }
 975
 976                 status = scic_sds_phy_start(sci_phy);
 977
 978                 if (status == SCI_SUCCESS) {
 979                         sci_mod_timer(&scic->phy_timer,
 980                                       SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT);
 981                         scic->phy_startup_timer_pending = true;
 982                 } else {
 983                         dev_warn(scic_to_dev(scic),
 984                                  "%s: Controller stop operation failed "
 985                                  "to stop phy %d because of status "
 986                                  "%d.\n",
 987                                  __func__,
 988                                  ihost->phys[scic->next_phy_to_start].sci.phy_index,
 989                                  status);
 990                 }
 991
 992                 scic->next_phy_to_start++;
 993         }
 994
 995         return status;
 996 }
 997
 998 static void phy_startup_timeout(unsigned long data)
 999 {
1000         struct sci_timer *tmr = (struct sci_timer *)data;
1001         struct scic_sds_controller *scic = container_of(tmr, typeof(*scic), phy_timer);
1002         struct isci_host *ihost = scic_to_ihost(scic);
1003         unsigned long flags;
1004         enum sci_status status;
1005
1006         spin_lock_irqsave(&ihost->scic_lock, flags);
1007
1008         if (tmr->cancel)
1009                 goto done;
1010
1011         scic->phy_startup_timer_pending = false;
1012
1013         do {
1014                 status = scic_sds_controller_start_next_phy(scic);
1015         } while (status != SCI_SUCCESS);
1016
1017 done:
1018         spin_unlock_irqrestore(&ihost->scic_lock, flags);
1019 }
1020
1021 static void isci_tci_free(struct isci_host *ihost, u16 tci)
1022 {
1023         u16 tail = ihost->tci_tail & (SCI_MAX_IO_REQUESTS-1);
1024
1025         ihost->tci_pool[tail] = tci;
1026         ihost->tci_tail = tail + 1;
1027 }
1028
1029 static u16 isci_tci_alloc(struct isci_host *ihost)
1030 {
1031         u16 head = ihost->tci_head & (SCI_MAX_IO_REQUESTS-1);
1032         u16 tci = ihost->tci_pool[head];
1033
1034         ihost->tci_head = head + 1;
1035         return tci;
1036 }
1037
1038 static u16 isci_tci_active(struct isci_host *ihost)
1039 {
1040         return CIRC_CNT(ihost->tci_head, ihost->tci_tail, SCI_MAX_IO_REQUESTS);
1041 }
1042
1043 static u16 isci_tci_space(struct isci_host *ihost)
1044 {
1045         return CIRC_SPACE(ihost->tci_head, ihost->tci_tail, SCI_MAX_IO_REQUESTS);
1046 }
1047
1048 static enum sci_status scic_controller_start(struct scic_sds_controller *scic,
1049                                              u32 timeout)
1050 {
1051         struct isci_host *ihost = scic_to_ihost(scic);
1052         enum sci_status result;
1053         u16 index;
1054
1055         if (scic->sm.current_state_id != SCIC_INITIALIZED) {
1056                 dev_warn(scic_to_dev(scic),
1057                          "SCIC Controller start operation requested in "
1058                          "invalid state\n");
1059                 return SCI_FAILURE_INVALID_STATE;
1060         }
1061
1062         /* Build the TCi free pool */
1063         BUILD_BUG_ON(SCI_MAX_IO_REQUESTS > 1 << sizeof(ihost->tci_pool[0]) * 8);
1064         ihost->tci_head = 0;
1065         ihost->tci_tail = 0;
1066         for (index = 0; index < scic->task_context_entries; index++)
1067                 isci_tci_free(ihost, index);
1068
1069         /* Build the RNi free pool */
1070         scic_sds_remote_node_table_initialize(
1071                         &scic->available_remote_nodes,
1072                         scic->remote_node_entries);
1073
1074         /*
1075          * Before anything else lets make sure we will not be
1076          * interrupted by the hardware.
1077          */
1078         scic_controller_disable_interrupts(scic);
1079
1080         /* Enable the port task scheduler */
1081         scic_sds_controller_enable_port_task_scheduler(scic);
1082
1083         /* Assign all the task entries to scic physical function */
1084         scic_sds_controller_assign_task_entries(scic);
1085
1086         /* Now initialize the completion queue */
1087         scic_sds_controller_initialize_completion_queue(scic);
1088
1089         /* Initialize the unsolicited frame queue for use */
1090         scic_sds_controller_initialize_unsolicited_frame_queue(scic);
1091
1092         /* Start all of the ports on this controller */
1093         for (index = 0; index < scic->logical_port_entries; index++) {
1094                 struct scic_sds_port *sci_port = &ihost->ports[index].sci;
1095
1096                 result = scic_sds_port_start(sci_port);
1097                 if (result)
1098                         return result;
1099         }
1100
1101         scic_sds_controller_start_next_phy(scic);
1102
1103         sci_mod_timer(&scic->timer, timeout);
1104
1105         sci_change_state(&scic->sm, SCIC_STARTING);
1106
1107         return SCI_SUCCESS;
1108 }
1109
1110 void isci_host_scan_start(struct Scsi_Host *shost)
1111 {
1112         struct isci_host *ihost = SHOST_TO_SAS_HA(shost)->lldd_ha;
1113         unsigned long tmo = scic_controller_get_suggested_start_timeout(&ihost->sci);
1114
1115         set_bit(IHOST_START_PENDING, &ihost->flags);
1116
1117         spin_lock_irq(&ihost->scic_lock);
1118         scic_controller_start(&ihost->sci, tmo);
1119         scic_controller_enable_interrupts(&ihost->sci);
1120         spin_unlock_irq(&ihost->scic_lock);
1121 }
1122
1123 static void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status)
1124 {
1125         isci_host_change_state(ihost, isci_stopped);
1126         scic_controller_disable_interrupts(&ihost->sci);
1127         clear_bit(IHOST_STOP_PENDING, &ihost->flags);
1128         wake_up(&ihost->eventq);
1129 }
1130
1131 static void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1132 {
1133         /* Empty out the completion queue */
1134         if (scic_sds_controller_completion_queue_has_entries(scic))
1135                 scic_sds_controller_process_completions(scic);
1136
1137         /* Clear the interrupt and enable all interrupts again */
1138         writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
1139         /* Could we write the value of SMU_ISR_COMPLETION? */
1140         writel(0xFF000000, &scic->smu_registers->interrupt_mask);
1141         writel(0, &scic->smu_registers->interrupt_mask);
1142 }
1143
1144 /**
1145  * isci_host_completion_routine() - This function is the delayed service
1146  *    routine that calls the sci core library's completion handler. It's
1147  *    scheduled as a tasklet from the interrupt service routine when interrupts
1148  *    in use, or set as the timeout function in polled mode.
1149  * @data: This parameter specifies the ISCI host object
1150  *
1151  */
1152 static void isci_host_completion_routine(unsigned long data)
1153 {
1154         struct isci_host *isci_host = (struct isci_host *)data;
1155         struct list_head    completed_request_list;
1156         struct list_head    errored_request_list;
1157         struct list_head    *current_position;
1158         struct list_head    *next_position;
1159         struct isci_request *request;
1160         struct isci_request *next_request;
1161         struct sas_task     *task;
1162
1163         INIT_LIST_HEAD(&completed_request_list);
1164         INIT_LIST_HEAD(&errored_request_list);
1165
1166         spin_lock_irq(&isci_host->scic_lock);
1167
1168         scic_sds_controller_completion_handler(&isci_host->sci);
1169
1170         /* Take the lists of completed I/Os from the host. */
1171
1172         list_splice_init(&isci_host->requests_to_complete,
1173                          &completed_request_list);
1174
1175         /* Take the list of errored I/Os from the host. */
1176         list_splice_init(&isci_host->requests_to_errorback,
1177                          &errored_request_list);
1178
1179         spin_unlock_irq(&isci_host->scic_lock);
1180
1181         /* Process any completions in the lists. */
1182         list_for_each_safe(current_position, next_position,
1183                            &completed_request_list) {
1184
1185                 request = list_entry(current_position, struct isci_request,
1186                                      completed_node);
1187                 task = isci_request_access_task(request);
1188
1189                 /* Normal notification (task_done) */
1190                 dev_dbg(&isci_host->pdev->dev,
1191                         "%s: Normal - request/task = %p/%p\n",
1192                         __func__,
1193                         request,
1194                         task);
1195
1196                 /* Return the task to libsas */
1197                 if (task != NULL) {
1198
1199                         task->lldd_task = NULL;
1200                         if (!(task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1201
1202                                 /* If the task is already in the abort path,
1203                                 * the task_done callback cannot be called.
1204                                 */
1205                                 task->task_done(task);
1206                         }
1207                 }
1208                 /* Free the request object. */
1209                 isci_request_free(isci_host, request);
1210         }
1211         list_for_each_entry_safe(request, next_request, &errored_request_list,
1212                                  completed_node) {
1213
1214                 task = isci_request_access_task(request);
1215
1216                 /* Use sas_task_abort */
1217                 dev_warn(&isci_host->pdev->dev,
1218                          "%s: Error - request/task = %p/%p\n",
1219                          __func__,
1220                          request,
1221                          task);
1222
1223                 if (task != NULL) {
1224
1225                         /* Put the task into the abort path if it's not there
1226                          * already.
1227                          */
1228                         if (!(task->task_state_flags & SAS_TASK_STATE_ABORTED))
1229                                 sas_task_abort(task);
1230
1231                 } else {
1232                         /* This is a case where the request has completed with a
1233                          * status such that it needed further target servicing,
1234                          * but the sas_task reference has already been removed
1235                          * from the request.  Since it was errored, it was not
1236                          * being aborted, so there is nothing to do except free
1237                          * it.
1238                          */
1239
1240                         spin_lock_irq(&isci_host->scic_lock);
1241                         /* Remove the request from the remote device's list
1242                         * of pending requests.
1243                         */
1244                         list_del_init(&request->dev_node);
1245                         spin_unlock_irq(&isci_host->scic_lock);
1246
1247                         /* Free the request object. */
1248                         isci_request_free(isci_host, request);
1249                 }
1250         }
1251
1252 }
1253
1254 /**
1255  * scic_controller_stop() - This method will stop an individual controller
1256  *    object.This method will invoke the associated user callback upon
1257  *    completion.  The completion callback is called when the following
1258  *    conditions are met: -# the method return status is SCI_SUCCESS. -# the
1259  *    controller has been quiesced. This method will ensure that all IO
1260  *    requests are quiesced, phys are stopped, and all additional operation by
1261  *    the hardware is halted.
1262  * @controller: the handle to the controller object to stop.
1263  * @timeout: This parameter specifies the number of milliseconds in which the
1264  *    stop operation should complete.
1265  *
1266  * The controller must be in the STARTED or STOPPED state. Indicate if the
1267  * controller stop method succeeded or failed in some way. SCI_SUCCESS if the
1268  * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the
1269  * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the
1270  * controller is not either in the STARTED or STOPPED states.
1271  */
1272 static enum sci_status scic_controller_stop(struct scic_sds_controller *scic,
1273                                             u32 timeout)
1274 {
1275         if (scic->sm.current_state_id != SCIC_READY) {
1276                 dev_warn(scic_to_dev(scic),
1277                          "SCIC Controller stop operation requested in "
1278                          "invalid state\n");
1279                 return SCI_FAILURE_INVALID_STATE;
1280         }
1281
1282         sci_mod_timer(&scic->timer, timeout);
1283         sci_change_state(&scic->sm, SCIC_STOPPING);
1284         return SCI_SUCCESS;
1285 }
1286
1287 /**
1288  * scic_controller_reset() - This method will reset the supplied core
1289  *    controller regardless of the state of said controller.  This operation is
1290  *    considered destructive.  In other words, all current operations are wiped
1291  *    out.  No IO completions for outstanding devices occur.  Outstanding IO
1292  *    requests are not aborted or completed at the actual remote device.
1293  * @controller: the handle to the controller object to reset.
1294  *
1295  * Indicate if the controller reset method succeeded or failed in some way.
1296  * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if
1297  * the controller reset operation is unable to complete.
1298  */
1299 static enum sci_status scic_controller_reset(struct scic_sds_controller *scic)
1300 {
1301         switch (scic->sm.current_state_id) {
1302         case SCIC_RESET:
1303         case SCIC_READY:
1304         case SCIC_STOPPED:
1305         case SCIC_FAILED:
1306                 /*
1307                  * The reset operation is not a graceful cleanup, just
1308                  * perform the state transition.
1309                  */
1310                 sci_change_state(&scic->sm, SCIC_RESETTING);
1311                 return SCI_SUCCESS;
1312         default:
1313                 dev_warn(scic_to_dev(scic),
1314                          "SCIC Controller reset operation requested in "
1315                          "invalid state\n");
1316                 return SCI_FAILURE_INVALID_STATE;
1317         }
1318 }
1319
1320 void isci_host_deinit(struct isci_host *ihost)
1321 {
1322         int i;
1323
1324         isci_host_change_state(ihost, isci_stopping);
1325         for (i = 0; i < SCI_MAX_PORTS; i++) {
1326                 struct isci_port *iport = &ihost->ports[i];
1327                 struct isci_remote_device *idev, *d;
1328
1329                 list_for_each_entry_safe(idev, d, &iport->remote_dev_list, node) {
1330                         if (test_bit(IDEV_ALLOCATED, &idev->flags))
1331                                 isci_remote_device_stop(ihost, idev);
1332                 }
1333         }
1334
1335         set_bit(IHOST_STOP_PENDING, &ihost->flags);
1336
1337         spin_lock_irq(&ihost->scic_lock);
1338         scic_controller_stop(&ihost->sci, SCIC_CONTROLLER_STOP_TIMEOUT);
1339         spin_unlock_irq(&ihost->scic_lock);
1340
1341         wait_for_stop(ihost);
1342         scic_controller_reset(&ihost->sci);
1343
1344         /* Cancel any/all outstanding port timers */
1345         for (i = 0; i < ihost->sci.logical_port_entries; i++) {
1346                 struct scic_sds_port *sci_port = &ihost->ports[i].sci;
1347                 del_timer_sync(&sci_port->timer.timer);
1348         }
1349
1350         /* Cancel any/all outstanding phy timers */
1351         for (i = 0; i < SCI_MAX_PHYS; i++) {
1352                 struct scic_sds_phy *sci_phy = &ihost->phys[i].sci;
1353                 del_timer_sync(&sci_phy->sata_timer.timer);
1354         }
1355
1356         del_timer_sync(&ihost->sci.port_agent.timer.timer);
1357
1358         del_timer_sync(&ihost->sci.power_control.timer.timer);
1359
1360         del_timer_sync(&ihost->sci.timer.timer);
1361
1362         del_timer_sync(&ihost->sci.phy_timer.timer);
1363 }
1364
1365 static void __iomem *scu_base(struct isci_host *isci_host)
1366 {
1367         struct pci_dev *pdev = isci_host->pdev;
1368         int id = isci_host->id;
1369
1370         return pcim_iomap_table(pdev)[SCI_SCU_BAR * 2] + SCI_SCU_BAR_SIZE * id;
1371 }
1372
1373 static void __iomem *smu_base(struct isci_host *isci_host)
1374 {
1375         struct pci_dev *pdev = isci_host->pdev;
1376         int id = isci_host->id;
1377
1378         return pcim_iomap_table(pdev)[SCI_SMU_BAR * 2] + SCI_SMU_BAR_SIZE * id;
1379 }
1380
1381 static void isci_user_parameters_get(
1382                 struct isci_host *isci_host,
1383                 union scic_user_parameters *scic_user_params)
1384 {
1385         struct scic_sds_user_parameters *u = &scic_user_params->sds1;
1386         int i;
1387
1388         for (i = 0; i < SCI_MAX_PHYS; i++) {
1389                 struct sci_phy_user_params *u_phy = &u->phys[i];
1390
1391                 u_phy->max_speed_generation = phy_gen;
1392
1393                 /* we are not exporting these for now */
1394                 u_phy->align_insertion_frequency = 0x7f;
1395                 u_phy->in_connection_align_insertion_frequency = 0xff;
1396                 u_phy->notify_enable_spin_up_insertion_frequency = 0x33;
1397         }
1398
1399         u->stp_inactivity_timeout = stp_inactive_to;
1400         u->ssp_inactivity_timeout = ssp_inactive_to;
1401         u->stp_max_occupancy_timeout = stp_max_occ_to;
1402         u->ssp_max_occupancy_timeout = ssp_max_occ_to;
1403         u->no_outbound_task_timeout = no_outbound_task_to;
1404         u->max_number_concurrent_device_spin_up = max_concurr_spinup;
1405 }
1406
1407 static void scic_sds_controller_initial_state_enter(struct sci_base_state_machine *sm)
1408 {
1409         struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm);
1410
1411         sci_change_state(&scic->sm, SCIC_RESET);
1412 }
1413
1414 static inline void scic_sds_controller_starting_state_exit(struct sci_base_state_machine *sm)
1415 {
1416         struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm);
1417
1418         sci_del_timer(&scic->timer);
1419 }
1420
1421 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
1422 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
1423 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US                    2700000
1424 #define INTERRUPT_COALESCE_NUMBER_MAX                        256
1425 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN                7
1426 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX                28
1427
1428 /**
1429  * scic_controller_set_interrupt_coalescence() - This method allows the user to
1430  *    configure the interrupt coalescence.
1431  * @controller: This parameter represents the handle to the controller object
1432  *    for which its interrupt coalesce register is overridden.
1433  * @coalesce_number: Used to control the number of entries in the Completion
1434  *    Queue before an interrupt is generated. If the number of entries exceed
1435  *    this number, an interrupt will be generated. The valid range of the input
1436  *    is [0, 256]. A setting of 0 results in coalescing being disabled.
1437  * @coalesce_timeout: Timeout value in microseconds. The valid range of the
1438  *    input is [0, 2700000] . A setting of 0 is allowed and results in no
1439  *    interrupt coalescing timeout.
1440  *
1441  * Indicate if the user successfully set the interrupt coalesce parameters.
1442  * SCI_SUCCESS The user successfully updated the interrutp coalescence.
1443  * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range.
1444  */
1445 static enum sci_status scic_controller_set_interrupt_coalescence(
1446         struct scic_sds_controller *scic_controller,
1447         u32 coalesce_number,
1448         u32 coalesce_timeout)
1449 {
1450         u8 timeout_encode = 0;
1451         u32 min = 0;
1452         u32 max = 0;
1453
1454         /* Check if the input parameters fall in the range. */
1455         if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
1456                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1457
1458         /*
1459          *  Defined encoding for interrupt coalescing timeout:
1460          *              Value   Min      Max     Units
1461          *              -----   ---      ---     -----
1462          *              0       -        -       Disabled
1463          *              1       13.3     20.0    ns
1464          *              2       26.7     40.0
1465          *              3       53.3     80.0
1466          *              4       106.7    160.0
1467          *              5       213.3    320.0
1468          *              6       426.7    640.0
1469          *              7       853.3    1280.0
1470          *              8       1.7      2.6     us
1471          *              9       3.4      5.1
1472          *              10      6.8      10.2
1473          *              11      13.7     20.5
1474          *              12      27.3     41.0
1475          *              13      54.6     81.9
1476          *              14      109.2    163.8
1477          *              15      218.5    327.7
1478          *              16      436.9    655.4
1479          *              17      873.8    1310.7
1480          *              18      1.7      2.6     ms
1481          *              19      3.5      5.2
1482          *              20      7.0      10.5
1483          *              21      14.0     21.0
1484          *              22      28.0     41.9
1485          *              23      55.9     83.9
1486          *              24      111.8    167.8
1487          *              25      223.7    335.5
1488          *              26      447.4    671.1
1489          *              27      894.8    1342.2
1490          *              28      1.8      2.7     s
1491          *              Others Undefined */
1492
1493         /*
1494          * Use the table above to decide the encode of interrupt coalescing timeout
1495          * value for register writing. */
1496         if (coalesce_timeout == 0)
1497                 timeout_encode = 0;
1498         else{
1499                 /* make the timeout value in unit of (10 ns). */
1500                 coalesce_timeout = coalesce_timeout * 100;
1501                 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
1502                 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
1503
1504                 /* get the encode of timeout for register writing. */
1505                 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
1506                       timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
1507                       timeout_encode++) {
1508                         if (min <= coalesce_timeout &&  max > coalesce_timeout)
1509                                 break;
1510                         else if (coalesce_timeout >= max && coalesce_timeout < min * 2
1511                                  && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
1512                                 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
1513                                         break;
1514                                 else{
1515                                         timeout_encode++;
1516                                         break;
1517                                 }
1518                         } else {
1519                                 max = max * 2;
1520                                 min = min * 2;
1521                         }
1522                 }
1523
1524                 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
1525                         /* the value is out of range. */
1526                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1527         }
1528
1529         writel(SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
1530                SMU_ICC_GEN_VAL(TIMER, timeout_encode),
1531                &scic_controller->smu_registers->interrupt_coalesce_control);
1532
1533
1534         scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
1535         scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
1536
1537         return SCI_SUCCESS;
1538 }
1539
1540
1541 static void scic_sds_controller_ready_state_enter(struct sci_base_state_machine *sm)
1542 {
1543         struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm);
1544
1545         /* set the default interrupt coalescence number and timeout value. */
1546         scic_controller_set_interrupt_coalescence(scic, 0x10, 250);
1547 }
1548
1549 static void scic_sds_controller_ready_state_exit(struct sci_base_state_machine *sm)
1550 {
1551         struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm);
1552
1553         /* disable interrupt coalescence. */
1554         scic_controller_set_interrupt_coalescence(scic, 0, 0);
1555 }
1556
1557 static enum sci_status scic_sds_controller_stop_phys(struct scic_sds_controller *scic)
1558 {
1559         u32 index;
1560         enum sci_status status;
1561         enum sci_status phy_status;
1562         struct isci_host *ihost = scic_to_ihost(scic);
1563
1564         status = SCI_SUCCESS;
1565
1566         for (index = 0; index < SCI_MAX_PHYS; index++) {
1567                 phy_status = scic_sds_phy_stop(&ihost->phys[index].sci);
1568
1569                 if (phy_status != SCI_SUCCESS &&
1570                     phy_status != SCI_FAILURE_INVALID_STATE) {
1571                         status = SCI_FAILURE;
1572
1573                         dev_warn(scic_to_dev(scic),
1574                                  "%s: Controller stop operation failed to stop "
1575                                  "phy %d because of status %d.\n",
1576                                  __func__,
1577                                  ihost->phys[index].sci.phy_index, phy_status);
1578                 }
1579         }
1580
1581         return status;
1582 }
1583
1584 static enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
1585 {
1586         u32 index;
1587         enum sci_status port_status;
1588         enum sci_status status = SCI_SUCCESS;
1589         struct isci_host *ihost = scic_to_ihost(scic);
1590
1591         for (index = 0; index < scic->logical_port_entries; index++) {
1592                 struct scic_sds_port *sci_port = &ihost->ports[index].sci;
1593
1594                 port_status = scic_sds_port_stop(sci_port);
1595
1596                 if ((port_status != SCI_SUCCESS) &&
1597                     (port_status != SCI_FAILURE_INVALID_STATE)) {
1598                         status = SCI_FAILURE;
1599
1600                         dev_warn(scic_to_dev(scic),
1601                                  "%s: Controller stop operation failed to "
1602                                  "stop port %d because of status %d.\n",
1603                                  __func__,
1604                                  sci_port->logical_port_index,
1605                                  port_status);
1606                 }
1607         }
1608
1609         return status;
1610 }
1611
1612 static enum sci_status scic_sds_controller_stop_devices(struct scic_sds_controller *scic)
1613 {
1614         u32 index;
1615         enum sci_status status;
1616         enum sci_status device_status;
1617
1618         status = SCI_SUCCESS;
1619
1620         for (index = 0; index < scic->remote_node_entries; index++) {
1621                 if (scic->device_table[index] != NULL) {
1622                         /* / @todo What timeout value do we want to provide to this request? */
1623                         device_status = scic_remote_device_stop(scic->device_table[index], 0);
1624
1625                         if ((device_status != SCI_SUCCESS) &&
1626                             (device_status != SCI_FAILURE_INVALID_STATE)) {
1627                                 dev_warn(scic_to_dev(scic),
1628                                          "%s: Controller stop operation failed "
1629                                          "to stop device 0x%p because of "
1630                                          "status %d.\n",
1631                                          __func__,
1632                                          scic->device_table[index], device_status);
1633                         }
1634                 }
1635         }
1636
1637         return status;
1638 }
1639
1640 static void scic_sds_controller_stopping_state_enter(struct sci_base_state_machine *sm)
1641 {
1642         struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm);
1643
1644         /* Stop all of the components for this controller */
1645         scic_sds_controller_stop_phys(scic);
1646         scic_sds_controller_stop_ports(scic);
1647         scic_sds_controller_stop_devices(scic);
1648 }
1649
1650 static void scic_sds_controller_stopping_state_exit(struct sci_base_state_machine *sm)
1651 {
1652         struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm);
1653
1654         sci_del_timer(&scic->timer);
1655 }
1656
1657
1658 /**
1659  * scic_sds_controller_reset_hardware() -
1660  *
1661  * This method will reset the controller hardware.
1662  */
1663 static void scic_sds_controller_reset_hardware(struct scic_sds_controller *scic)
1664 {
1665         /* Disable interrupts so we dont take any spurious interrupts */
1666         scic_controller_disable_interrupts(scic);
1667
1668         /* Reset the SCU */
1669         writel(0xFFFFFFFF, &scic->smu_registers->soft_reset_control);
1670
1671         /* Delay for 1ms to before clearing the CQP and UFQPR. */
1672         udelay(1000);
1673
1674         /* The write to the CQGR clears the CQP */
1675         writel(0x00000000, &scic->smu_registers->completion_queue_get);
1676
1677         /* The write to the UFQGP clears the UFQPR */
1678         writel(0, &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
1679 }
1680
1681 static void scic_sds_controller_resetting_state_enter(struct sci_base_state_machine *sm)
1682 {
1683         struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm);
1684
1685         scic_sds_controller_reset_hardware(scic);
1686         sci_change_state(&scic->sm, SCIC_RESET);
1687 }
1688
1689 static const struct sci_base_state scic_sds_controller_state_table[] = {
1690         [SCIC_INITIAL] = {
1691                 .enter_state = scic_sds_controller_initial_state_enter,
1692         },
1693         [SCIC_RESET] = {},
1694         [SCIC_INITIALIZING] = {},
1695         [SCIC_INITIALIZED] = {},
1696         [SCIC_STARTING] = {
1697                 .exit_state  = scic_sds_controller_starting_state_exit,
1698         },
1699         [SCIC_READY] = {
1700                 .enter_state = scic_sds_controller_ready_state_enter,
1701                 .exit_state  = scic_sds_controller_ready_state_exit,
1702         },
1703         [SCIC_RESETTING] = {
1704                 .enter_state = scic_sds_controller_resetting_state_enter,
1705         },
1706         [SCIC_STOPPING] = {
1707                 .enter_state = scic_sds_controller_stopping_state_enter,
1708                 .exit_state = scic_sds_controller_stopping_state_exit,
1709         },
1710         [SCIC_STOPPED] = {},
1711         [SCIC_FAILED] = {}
1712 };
1713
1714 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
1715 {
1716         /* these defaults are overridden by the platform / firmware */
1717         struct isci_host *ihost = scic_to_ihost(scic);
1718         u16 index;
1719
1720         /* Default to APC mode. */
1721         scic->oem_parameters.sds1.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
1722
1723         /* Default to APC mode. */
1724         scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up = 1;
1725
1726         /* Default to no SSC operation. */
1727         scic->oem_parameters.sds1.controller.do_enable_ssc = false;
1728
1729         /* Initialize all of the port parameter information to narrow ports. */
1730         for (index = 0; index < SCI_MAX_PORTS; index++) {
1731                 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
1732         }
1733
1734         /* Initialize all of the phy parameter information. */
1735         for (index = 0; index < SCI_MAX_PHYS; index++) {
1736                 /* Default to 6G (i.e. Gen 3) for now. */
1737                 scic->user_parameters.sds1.phys[index].max_speed_generation = 3;
1738
1739                 /* the frequencies cannot be 0 */
1740                 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
1741                 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
1742                 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
1743
1744                 /*
1745                  * Previous Vitesse based expanders had a arbitration issue that
1746                  * is worked around by having the upper 32-bits of SAS address
1747                  * with a value greater then the Vitesse company identifier.
1748                  * Hence, usage of 0x5FCFFFFF. */
1749                 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x1 + ihost->id;
1750                 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
1751         }
1752
1753         scic->user_parameters.sds1.stp_inactivity_timeout = 5;
1754         scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
1755         scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
1756         scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
1757         scic->user_parameters.sds1.no_outbound_task_timeout = 20;
1758 }
1759
1760 static void controller_timeout(unsigned long data)
1761 {
1762         struct sci_timer *tmr = (struct sci_timer *)data;
1763         struct scic_sds_controller *scic = container_of(tmr, typeof(*scic), timer);
1764         struct isci_host *ihost = scic_to_ihost(scic);
1765         struct sci_base_state_machine *sm = &scic->sm;
1766         unsigned long flags;
1767
1768         spin_lock_irqsave(&ihost->scic_lock, flags);
1769
1770         if (tmr->cancel)
1771                 goto done;
1772
1773         if (sm->current_state_id == SCIC_STARTING)
1774                 scic_sds_controller_transition_to_ready(scic, SCI_FAILURE_TIMEOUT);
1775         else if (sm->current_state_id == SCIC_STOPPING) {
1776                 sci_change_state(sm, SCIC_FAILED);
1777                 isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT);
1778         } else  /* / @todo Now what do we want to do in this case? */
1779                 dev_err(scic_to_dev(scic),
1780                         "%s: Controller timer fired when controller was not "
1781                         "in a state being timed.\n",
1782                         __func__);
1783
1784 done:
1785         spin_unlock_irqrestore(&ihost->scic_lock, flags);
1786 }
1787
1788 /**
1789  * scic_controller_construct() - This method will attempt to construct a
1790  *    controller object utilizing the supplied parameter information.
1791  * @c: This parameter specifies the controller to be constructed.
1792  * @scu_base: mapped base address of the scu registers
1793  * @smu_base: mapped base address of the smu registers
1794  *
1795  * Indicate if the controller was successfully constructed or if it failed in
1796  * some way. SCI_SUCCESS This value is returned if the controller was
1797  * successfully constructed. SCI_WARNING_TIMER_CONFLICT This value is returned
1798  * if the interrupt coalescence timer may cause SAS compliance issues for SMP
1799  * Target mode response processing. SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE
1800  * This value is returned if the controller does not support the supplied type.
1801  * SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION This value is returned if the
1802  * controller does not support the supplied initialization data version.
1803  */
1804 static enum sci_status scic_controller_construct(struct scic_sds_controller *scic,
1805                                           void __iomem *scu_base,
1806                                           void __iomem *smu_base)
1807 {
1808         struct isci_host *ihost = scic_to_ihost(scic);
1809         u8 i;
1810
1811         sci_init_sm(&scic->sm, scic_sds_controller_state_table, SCIC_INITIAL);
1812
1813         scic->scu_registers = scu_base;
1814         scic->smu_registers = smu_base;
1815
1816         scic_sds_port_configuration_agent_construct(&scic->port_agent);
1817
1818         /* Construct the ports for this controller */
1819         for (i = 0; i < SCI_MAX_PORTS; i++)
1820                 scic_sds_port_construct(&ihost->ports[i].sci, i, scic);
1821         scic_sds_port_construct(&ihost->ports[i].sci, SCIC_SDS_DUMMY_PORT, scic);
1822
1823         /* Construct the phys for this controller */
1824         for (i = 0; i < SCI_MAX_PHYS; i++) {
1825                 /* Add all the PHYs to the dummy port */
1826                 scic_sds_phy_construct(&ihost->phys[i].sci,
1827                                        &ihost->ports[SCI_MAX_PORTS].sci, i);
1828         }
1829
1830         scic->invalid_phy_mask = 0;
1831
1832         sci_init_timer(&scic->timer, controller_timeout);
1833
1834         /* Initialize the User and OEM parameters to default values. */
1835         scic_sds_controller_set_default_config_parameters(scic);
1836
1837         return scic_controller_reset(scic);
1838 }
1839
1840 int scic_oem_parameters_validate(struct scic_sds_oem_params *oem)
1841 {
1842         int i;
1843
1844         for (i = 0; i < SCI_MAX_PORTS; i++)
1845                 if (oem->ports[i].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX)
1846                         return -EINVAL;
1847
1848         for (i = 0; i < SCI_MAX_PHYS; i++)
1849                 if (oem->phys[i].sas_address.high == 0 &&
1850                     oem->phys[i].sas_address.low == 0)
1851                         return -EINVAL;
1852
1853         if (oem->controller.mode_type == SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE) {
1854                 for (i = 0; i < SCI_MAX_PHYS; i++)
1855                         if (oem->ports[i].phy_mask != 0)
1856                                 return -EINVAL;
1857         } else if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
1858                 u8 phy_mask = 0;
1859
1860                 for (i = 0; i < SCI_MAX_PHYS; i++)
1861                         phy_mask |= oem->ports[i].phy_mask;
1862
1863                 if (phy_mask == 0)
1864                         return -EINVAL;
1865         } else
1866                 return -EINVAL;
1867
1868         if (oem->controller.max_concurrent_dev_spin_up > MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT)
1869                 return -EINVAL;
1870
1871         return 0;
1872 }
1873
1874 static enum sci_status scic_oem_parameters_set(struct scic_sds_controller *scic,
1875                                         union scic_oem_parameters *scic_parms)
1876 {
1877         u32 state = scic->sm.current_state_id;
1878
1879         if (state == SCIC_RESET ||
1880             state == SCIC_INITIALIZING ||
1881             state == SCIC_INITIALIZED) {
1882
1883                 if (scic_oem_parameters_validate(&scic_parms->sds1))
1884                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1885                 scic->oem_parameters.sds1 = scic_parms->sds1;
1886
1887                 return SCI_SUCCESS;
1888         }
1889
1890         return SCI_FAILURE_INVALID_STATE;
1891 }
1892
1893 void scic_oem_parameters_get(
1894         struct scic_sds_controller *scic,
1895         union scic_oem_parameters *scic_parms)
1896 {
1897         memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
1898 }
1899
1900 static void power_control_timeout(unsigned long data)
1901 {
1902         struct sci_timer *tmr = (struct sci_timer *)data;
1903         struct scic_sds_controller *scic = container_of(tmr, typeof(*scic), power_control.timer);
1904         struct isci_host *ihost = scic_to_ihost(scic);
1905         struct scic_sds_phy *sci_phy;
1906         unsigned long flags;
1907         u8 i;
1908
1909         spin_lock_irqsave(&ihost->scic_lock, flags);
1910
1911         if (tmr->cancel)
1912                 goto done;
1913
1914         scic->power_control.phys_granted_power = 0;
1915
1916         if (scic->power_control.phys_waiting == 0) {
1917                 scic->power_control.timer_started = false;
1918                 goto done;
1919         }
1920
1921         for (i = 0; i < SCI_MAX_PHYS; i++) {
1922
1923                 if (scic->power_control.phys_waiting == 0)
1924                         break;
1925
1926                 sci_phy = scic->power_control.requesters[i];
1927                 if (sci_phy == NULL)
1928                         continue;
1929
1930                 if (scic->power_control.phys_granted_power >=
1931                     scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up)
1932                         break;
1933
1934                 scic->power_control.requesters[i] = NULL;
1935                 scic->power_control.phys_waiting--;
1936                 scic->power_control.phys_granted_power++;
1937                 scic_sds_phy_consume_power_handler(sci_phy);
1938         }
1939
1940         /*
1941          * It doesn't matter if the power list is empty, we need to start the
1942          * timer in case another phy becomes ready.
1943          */
1944         sci_mod_timer(tmr, SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
1945         scic->power_control.timer_started = true;
1946
1947 done:
1948         spin_unlock_irqrestore(&ihost->scic_lock, flags);
1949 }
1950
1951 /**
1952  * This method inserts the phy in the stagger spinup control queue.
1953  * @scic:
1954  *
1955  *
1956  */
1957 void scic_sds_controller_power_control_queue_insert(
1958         struct scic_sds_controller *scic,
1959         struct scic_sds_phy *sci_phy)
1960 {
1961         BUG_ON(sci_phy == NULL);
1962
1963         if (scic->power_control.phys_granted_power <
1964             scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
1965                 scic->power_control.phys_granted_power++;
1966                 scic_sds_phy_consume_power_handler(sci_phy);
1967
1968                 /*
1969                  * stop and start the power_control timer. When the timer fires, the
1970                  * no_of_phys_granted_power will be set to 0
1971                  */
1972                 if (scic->power_control.timer_started)
1973                         sci_del_timer(&scic->power_control.timer);
1974
1975                 sci_mod_timer(&scic->power_control.timer,
1976                                  SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
1977                 scic->power_control.timer_started = true;
1978
1979         } else {
1980                 /* Add the phy in the waiting list */
1981                 scic->power_control.requesters[sci_phy->phy_index] = sci_phy;
1982                 scic->power_control.phys_waiting++;
1983         }
1984 }
1985
1986 /**
1987  * This method removes the phy from the stagger spinup control queue.
1988  * @scic:
1989  *
1990  *
1991  */
1992 void scic_sds_controller_power_control_queue_remove(
1993         struct scic_sds_controller *scic,
1994         struct scic_sds_phy *sci_phy)
1995 {
1996         BUG_ON(sci_phy == NULL);
1997
1998         if (scic->power_control.requesters[sci_phy->phy_index] != NULL) {
1999                 scic->power_control.phys_waiting--;
2000         }
2001
2002         scic->power_control.requesters[sci_phy->phy_index] = NULL;
2003 }
2004
2005 #define AFE_REGISTER_WRITE_DELAY 10
2006
2007 /* Initialize the AFE for this phy index. We need to read the AFE setup from
2008  * the OEM parameters
2009  */
2010 static void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
2011 {
2012         const struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
2013         u32 afe_status;
2014         u32 phy_id;
2015
2016         /* Clear DFX Status registers */
2017         writel(0x0081000f, &scic->scu_registers->afe.afe_dfx_master_control0);
2018         udelay(AFE_REGISTER_WRITE_DELAY);
2019
2020         if (is_b0()) {
2021                 /* PM Rx Equalization Save, PM SPhy Rx Acknowledgement
2022                  * Timer, PM Stagger Timer */
2023                 writel(0x0007BFFF, &scic->scu_registers->afe.afe_pmsn_master_control2);
2024                 udelay(AFE_REGISTER_WRITE_DELAY);
2025         }
2026
2027         /* Configure bias currents to normal */
2028         if (is_a0())
2029                 writel(0x00005500, &scic->scu_registers->afe.afe_bias_control);
2030         else if (is_a2())
2031                 writel(0x00005A00, &scic->scu_registers->afe.afe_bias_control);
2032         else if (is_b0() || is_c0())
2033                 writel(0x00005F00, &scic->scu_registers->afe.afe_bias_control);
2034
2035         udelay(AFE_REGISTER_WRITE_DELAY);
2036
2037         /* Enable PLL */
2038         if (is_b0() || is_c0())
2039                 writel(0x80040A08, &scic->scu_registers->afe.afe_pll_control0);
2040         else
2041                 writel(0x80040908, &scic->scu_registers->afe.afe_pll_control0);
2042
2043         udelay(AFE_REGISTER_WRITE_DELAY);
2044
2045         /* Wait for the PLL to lock */
2046         do {
2047                 afe_status = readl(&scic->scu_registers->afe.afe_common_block_status);
2048                 udelay(AFE_REGISTER_WRITE_DELAY);
2049         } while ((afe_status & 0x00001000) == 0);
2050
2051         if (is_a0() || is_a2()) {
2052                 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
2053                 writel(0x7bcc96ad, &scic->scu_registers->afe.afe_pmsn_master_control0);
2054                 udelay(AFE_REGISTER_WRITE_DELAY);
2055         }
2056
2057         for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
2058                 const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id];
2059
2060                 if (is_b0()) {
2061                          /* Configure transmitter SSC parameters */
2062                         writel(0x00030000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
2063                         udelay(AFE_REGISTER_WRITE_DELAY);
2064                 } else if (is_c0()) {
2065                          /* Configure transmitter SSC parameters */
2066                         writel(0x0003000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
2067                         udelay(AFE_REGISTER_WRITE_DELAY);
2068
2069                         /*
2070                          * All defaults, except the Receive Word Alignament/Comma Detect
2071                          * Enable....(0xe800) */
2072                         writel(0x00004500, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
2073                         udelay(AFE_REGISTER_WRITE_DELAY);
2074                 } else {
2075                         /*
2076                          * All defaults, except the Receive Word Alignament/Comma Detect
2077                          * Enable....(0xe800) */
2078                         writel(0x00004512, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
2079                         udelay(AFE_REGISTER_WRITE_DELAY);
2080
2081                         writel(0x0050100F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control1);
2082                         udelay(AFE_REGISTER_WRITE_DELAY);
2083                 }
2084
2085                 /*
2086                  * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
2087                  * & increase TX int & ext bias 20%....(0xe85c) */
2088                 if (is_a0())
2089                         writel(0x000003D4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2090                 else if (is_a2())
2091                         writel(0x000003F0, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2092                 else if (is_b0()) {
2093                          /* Power down TX and RX (PWRDNTX and PWRDNRX) */
2094                         writel(0x000003D7, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2095                         udelay(AFE_REGISTER_WRITE_DELAY);
2096
2097                         /*
2098                          * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
2099                          * & increase TX int & ext bias 20%....(0xe85c) */
2100                         writel(0x000003D4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2101                 } else {
2102                         writel(0x000001E7, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2103                         udelay(AFE_REGISTER_WRITE_DELAY);
2104
2105                         /*
2106                          * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
2107                          * & increase TX int & ext bias 20%....(0xe85c) */
2108                         writel(0x000001E4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2109                 }
2110                 udelay(AFE_REGISTER_WRITE_DELAY);
2111
2112                 if (is_a0() || is_a2()) {
2113                         /* Enable TX equalization (0xe824) */
2114                         writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
2115                         udelay(AFE_REGISTER_WRITE_DELAY);
2116                 }
2117
2118                 /*
2119                  * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
2120                  * RDD=0x0(RX Detect Enabled) ....(0xe800) */
2121                 writel(0x00004100, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
2122                 udelay(AFE_REGISTER_WRITE_DELAY);
2123
2124                 /* Leave DFE/FFE on */
2125                 if (is_a0())
2126                         writel(0x3F09983F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2127                 else if (is_a2())
2128                         writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2129                 else if (is_b0()) {
2130                         writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2131                         udelay(AFE_REGISTER_WRITE_DELAY);
2132                         /* Enable TX equalization (0xe824) */
2133                         writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
2134                 } else {
2135                         writel(0x0140DF0F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control1);
2136                         udelay(AFE_REGISTER_WRITE_DELAY);
2137
2138                         writel(0x3F6F103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2139                         udelay(AFE_REGISTER_WRITE_DELAY);
2140
2141                         /* Enable TX equalization (0xe824) */
2142                         writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
2143                 }
2144
2145                 udelay(AFE_REGISTER_WRITE_DELAY);
2146
2147                 writel(oem_phy->afe_tx_amp_control0,
2148                         &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control0);
2149                 udelay(AFE_REGISTER_WRITE_DELAY);
2150
2151                 writel(oem_phy->afe_tx_amp_control1,
2152                         &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control1);
2153                 udelay(AFE_REGISTER_WRITE_DELAY);
2154
2155                 writel(oem_phy->afe_tx_amp_control2,
2156                         &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control2);
2157                 udelay(AFE_REGISTER_WRITE_DELAY);
2158
2159                 writel(oem_phy->afe_tx_amp_control3,
2160                         &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control3);
2161                 udelay(AFE_REGISTER_WRITE_DELAY);
2162         }
2163
2164         /* Transfer control to the PEs */
2165         writel(0x00010f00, &scic->scu_registers->afe.afe_dfx_master_control0);
2166         udelay(AFE_REGISTER_WRITE_DELAY);
2167 }
2168
2169 static void scic_sds_controller_initialize_power_control(struct scic_sds_controller *scic)
2170 {
2171         sci_init_timer(&scic->power_control.timer, power_control_timeout);
2172
2173         memset(scic->power_control.requesters, 0,
2174                sizeof(scic->power_control.requesters));
2175
2176         scic->power_control.phys_waiting = 0;
2177         scic->power_control.phys_granted_power = 0;
2178 }
2179
2180 static enum sci_status scic_controller_initialize(struct scic_sds_controller *scic)
2181 {
2182         struct sci_base_state_machine *sm = &scic->sm;
2183         struct isci_host *ihost = scic_to_ihost(scic);
2184         enum sci_status result = SCI_FAILURE;
2185         unsigned long i, state, val;
2186
2187         if (scic->sm.current_state_id != SCIC_RESET) {
2188                 dev_warn(scic_to_dev(scic),
2189                          "SCIC Controller initialize operation requested "
2190                          "in invalid state\n");
2191                 return SCI_FAILURE_INVALID_STATE;
2192         }
2193
2194         sci_change_state(sm, SCIC_INITIALIZING);
2195
2196         sci_init_timer(&scic->phy_timer, phy_startup_timeout);
2197
2198         scic->next_phy_to_start = 0;
2199         scic->phy_startup_timer_pending = false;
2200
2201         scic_sds_controller_initialize_power_control(scic);
2202
2203         /*
2204          * There is nothing to do here for B0 since we do not have to
2205          * program the AFE registers.
2206          * / @todo The AFE settings are supposed to be correct for the B0 but
2207          * /       presently they seem to be wrong. */
2208         scic_sds_controller_afe_initialization(scic);
2209
2210
2211         /* Take the hardware out of reset */
2212         writel(0, &scic->smu_registers->soft_reset_control);
2213
2214         /*
2215          * / @todo Provide meaningfull error code for hardware failure
2216          * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2217         for (i = 100; i >= 1; i--) {
2218                 u32 status;
2219
2220                 /* Loop until the hardware reports success */
2221                 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2222                 status = readl(&scic->smu_registers->control_status);
2223
2224                 if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED)
2225                         break;
2226         }
2227         if (i == 0)
2228                 goto out;
2229
2230         /*
2231          * Determine what are the actaul device capacities that the
2232          * hardware will support */
2233         val = readl(&scic->smu_registers->device_context_capacity);
2234
2235         /* Record the smaller of the two capacity values */
2236         scic->logical_port_entries = min(smu_max_ports(val), SCI_MAX_PORTS);
2237         scic->task_context_entries = min(smu_max_task_contexts(val), SCI_MAX_IO_REQUESTS);
2238         scic->remote_node_entries = min(smu_max_rncs(val), SCI_MAX_REMOTE_DEVICES);
2239
2240         /*
2241          * Make all PEs that are unassigned match up with the
2242          * logical ports
2243          */
2244         for (i = 0; i < scic->logical_port_entries; i++) {
2245                 struct scu_port_task_scheduler_group_registers __iomem
2246                         *ptsg = &scic->scu_registers->peg0.ptsg;
2247
2248                 writel(i, &ptsg->protocol_engine[i]);
2249         }
2250
2251         /* Initialize hardware PCI Relaxed ordering in DMA engines */
2252         val = readl(&scic->scu_registers->sdma.pdma_configuration);
2253         val |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2254         writel(val, &scic->scu_registers->sdma.pdma_configuration);
2255
2256         val = readl(&scic->scu_registers->sdma.cdma_configuration);
2257         val |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2258         writel(val, &scic->scu_registers->sdma.cdma_configuration);
2259
2260         /*
2261          * Initialize the PHYs before the PORTs because the PHY registers
2262          * are accessed during the port initialization.
2263          */
2264         for (i = 0; i < SCI_MAX_PHYS; i++) {
2265                 result = scic_sds_phy_initialize(&ihost->phys[i].sci,
2266                                                  &scic->scu_registers->peg0.pe[i].tl,
2267                                                  &scic->scu_registers->peg0.pe[i].ll);
2268                 if (result != SCI_SUCCESS)
2269                         goto out;
2270         }
2271
2272         for (i = 0; i < scic->logical_port_entries; i++) {
2273                 result = scic_sds_port_initialize(&ihost->ports[i].sci,
2274                                                   &scic->scu_registers->peg0.ptsg.port[i],
2275                                                   &scic->scu_registers->peg0.ptsg.protocol_engine,
2276                                                   &scic->scu_registers->peg0.viit[i]);
2277
2278                 if (result != SCI_SUCCESS)
2279                         goto out;
2280         }
2281
2282         result = scic_sds_port_configuration_agent_initialize(scic, &scic->port_agent);
2283
2284  out:
2285         /* Advance the controller state machine */
2286         if (result == SCI_SUCCESS)
2287                 state = SCIC_INITIALIZED;
2288         else
2289                 state = SCIC_FAILED;
2290         sci_change_state(sm, state);
2291
2292         return result;
2293 }
2294
2295 static enum sci_status scic_user_parameters_set(
2296         struct scic_sds_controller *scic,
2297         union scic_user_parameters *scic_parms)
2298 {
2299         u32 state = scic->sm.current_state_id;
2300
2301         if (state == SCIC_RESET ||
2302             state == SCIC_INITIALIZING ||
2303             state == SCIC_INITIALIZED) {
2304                 u16 index;
2305
2306                 /*
2307                  * Validate the user parameters.  If they are not legal, then
2308                  * return a failure.
2309                  */
2310                 for (index = 0; index < SCI_MAX_PHYS; index++) {
2311                         struct sci_phy_user_params *user_phy;
2312
2313                         user_phy = &scic_parms->sds1.phys[index];
2314
2315                         if (!((user_phy->max_speed_generation <=
2316                                                 SCIC_SDS_PARM_MAX_SPEED) &&
2317                               (user_phy->max_speed_generation >
2318                                                 SCIC_SDS_PARM_NO_SPEED)))
2319                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2320
2321                         if (user_phy->in_connection_align_insertion_frequency <
2322                                         3)
2323                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2324
2325                         if ((user_phy->in_connection_align_insertion_frequency <
2326                                                 3) ||
2327                             (user_phy->align_insertion_frequency == 0) ||
2328                             (user_phy->
2329                                 notify_enable_spin_up_insertion_frequency ==
2330                                                 0))
2331                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2332                 }
2333
2334                 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2335                     (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2336                     (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2337                     (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2338                     (scic_parms->sds1.no_outbound_task_timeout == 0))
2339                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2340
2341                 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2342
2343                 return SCI_SUCCESS;
2344         }
2345
2346         return SCI_FAILURE_INVALID_STATE;
2347 }
2348
2349 static int scic_controller_mem_init(struct scic_sds_controller *scic)
2350 {
2351         struct device *dev = scic_to_dev(scic);
2352         dma_addr_t dma;
2353         size_t size;
2354         int err;
2355
2356         size = SCU_MAX_COMPLETION_QUEUE_ENTRIES * sizeof(u32);
2357         scic->completion_queue = dmam_alloc_coherent(dev, size, &dma, GFP_KERNEL);
2358         if (!scic->completion_queue)
2359                 return -ENOMEM;
2360
2361         writel(lower_32_bits(dma), &scic->smu_registers->completion_queue_lower);
2362         writel(upper_32_bits(dma), &scic->smu_registers->completion_queue_upper);
2363
2364         size = scic->remote_node_entries * sizeof(union scu_remote_node_context);
2365         scic->remote_node_context_table = dmam_alloc_coherent(dev, size, &dma,
2366                                                               GFP_KERNEL);
2367         if (!scic->remote_node_context_table)
2368                 return -ENOMEM;
2369
2370         writel(lower_32_bits(dma), &scic->smu_registers->remote_node_context_lower);
2371         writel(upper_32_bits(dma), &scic->smu_registers->remote_node_context_upper);
2372
2373         size = scic->task_context_entries * sizeof(struct scu_task_context),
2374         scic->task_context_table = dmam_alloc_coherent(dev, size, &dma, GFP_KERNEL);
2375         if (!scic->task_context_table)
2376                 return -ENOMEM;
2377
2378         writel(lower_32_bits(dma), &scic->smu_registers->host_task_table_lower);
2379         writel(upper_32_bits(dma), &scic->smu_registers->host_task_table_upper);
2380
2381         err = scic_sds_unsolicited_frame_control_construct(scic);
2382         if (err)
2383                 return err;
2384
2385         /*
2386          * Inform the silicon as to the location of the UF headers and
2387          * address table.
2388          */
2389         writel(lower_32_bits(scic->uf_control.headers.physical_address),
2390                 &scic->scu_registers->sdma.uf_header_base_address_lower);
2391         writel(upper_32_bits(scic->uf_control.headers.physical_address),
2392                 &scic->scu_registers->sdma.uf_header_base_address_upper);
2393
2394         writel(lower_32_bits(scic->uf_control.address_table.physical_address),
2395                 &scic->scu_registers->sdma.uf_address_table_lower);
2396         writel(upper_32_bits(scic->uf_control.address_table.physical_address),
2397                 &scic->scu_registers->sdma.uf_address_table_upper);
2398
2399         return 0;
2400 }
2401
2402 int isci_host_init(struct isci_host *isci_host)
2403 {
2404         int err = 0, i;
2405         enum sci_status status;
2406         union scic_oem_parameters oem;
2407         union scic_user_parameters scic_user_params;
2408         struct isci_pci_info *pci_info = to_pci_info(isci_host->pdev);
2409
2410         spin_lock_init(&isci_host->state_lock);
2411         spin_lock_init(&isci_host->scic_lock);
2412         spin_lock_init(&isci_host->queue_lock);
2413         init_waitqueue_head(&isci_host->eventq);
2414
2415         isci_host_change_state(isci_host, isci_starting);
2416         isci_host->can_queue = ISCI_CAN_QUEUE_VAL;
2417
2418         status = scic_controller_construct(&isci_host->sci, scu_base(isci_host),
2419                                            smu_base(isci_host));
2420
2421         if (status != SCI_SUCCESS) {
2422                 dev_err(&isci_host->pdev->dev,
2423                         "%s: scic_controller_construct failed - status = %x\n",
2424                         __func__,
2425                         status);
2426                 return -ENODEV;
2427         }
2428
2429         isci_host->sas_ha.dev = &isci_host->pdev->dev;
2430         isci_host->sas_ha.lldd_ha = isci_host;
2431
2432         /*
2433          * grab initial values stored in the controller object for OEM and USER
2434          * parameters
2435          */
2436         isci_user_parameters_get(isci_host, &scic_user_params);
2437         status = scic_user_parameters_set(&isci_host->sci,
2438                                           &scic_user_params);
2439         if (status != SCI_SUCCESS) {
2440                 dev_warn(&isci_host->pdev->dev,
2441                          "%s: scic_user_parameters_set failed\n",
2442                          __func__);
2443                 return -ENODEV;
2444         }
2445
2446         scic_oem_parameters_get(&isci_host->sci, &oem);
2447
2448         /* grab any OEM parameters specified in orom */
2449         if (pci_info->orom) {
2450                 status = isci_parse_oem_parameters(&oem,
2451                                                    pci_info->orom,
2452                                                    isci_host->id);
2453                 if (status != SCI_SUCCESS) {
2454                         dev_warn(&isci_host->pdev->dev,
2455                                  "parsing firmware oem parameters failed\n");
2456                         return -EINVAL;
2457                 }
2458         }
2459
2460         status = scic_oem_parameters_set(&isci_host->sci, &oem);
2461         if (status != SCI_SUCCESS) {
2462                 dev_warn(&isci_host->pdev->dev,
2463                                 "%s: scic_oem_parameters_set failed\n",
2464                                 __func__);
2465                 return -ENODEV;
2466         }
2467
2468         tasklet_init(&isci_host->completion_tasklet,
2469                      isci_host_completion_routine, (unsigned long)isci_host);
2470
2471         INIT_LIST_HEAD(&isci_host->requests_to_complete);
2472         INIT_LIST_HEAD(&isci_host->requests_to_errorback);
2473
2474         spin_lock_irq(&isci_host->scic_lock);
2475         status = scic_controller_initialize(&isci_host->sci);
2476         spin_unlock_irq(&isci_host->scic_lock);
2477         if (status != SCI_SUCCESS) {
2478                 dev_warn(&isci_host->pdev->dev,
2479                          "%s: scic_controller_initialize failed -"
2480                          " status = 0x%x\n",
2481                          __func__, status);
2482                 return -ENODEV;
2483         }
2484
2485         err = scic_controller_mem_init(&isci_host->sci);
2486         if (err)
2487                 return err;
2488
2489         isci_host->dma_pool = dmam_pool_create(DRV_NAME, &isci_host->pdev->dev,
2490                                                sizeof(struct isci_request),
2491                                                SLAB_HWCACHE_ALIGN, 0);
2492
2493         if (!isci_host->dma_pool)
2494                 return -ENOMEM;
2495
2496         for (i = 0; i < SCI_MAX_PORTS; i++)
2497                 isci_port_init(&isci_host->ports[i], isci_host, i);
2498
2499         for (i = 0; i < SCI_MAX_PHYS; i++)
2500                 isci_phy_init(&isci_host->phys[i], isci_host, i);
2501
2502         for (i = 0; i < SCI_MAX_REMOTE_DEVICES; i++) {
2503                 struct isci_remote_device *idev = &isci_host->devices[i];
2504
2505                 INIT_LIST_HEAD(&idev->reqs_in_process);
2506                 INIT_LIST_HEAD(&idev->node);
2507         }
2508
2509         return 0;
2510 }
2511
2512 void scic_sds_controller_link_up(struct scic_sds_controller *scic,
2513                 struct scic_sds_port *port, struct scic_sds_phy *phy)
2514 {
2515         switch (scic->sm.current_state_id) {
2516         case SCIC_STARTING:
2517                 sci_del_timer(&scic->phy_timer);
2518                 scic->phy_startup_timer_pending = false;
2519                 scic->port_agent.link_up_handler(scic, &scic->port_agent,
2520                                                  port, phy);
2521                 scic_sds_controller_start_next_phy(scic);
2522                 break;
2523         case SCIC_READY:
2524                 scic->port_agent.link_up_handler(scic, &scic->port_agent,
2525                                                  port, phy);
2526                 break;
2527         default:
2528                 dev_dbg(scic_to_dev(scic),
2529                         "%s: SCIC Controller linkup event from phy %d in "
2530                         "unexpected state %d\n", __func__, phy->phy_index,
2531                         scic->sm.current_state_id);
2532         }
2533 }
2534
2535 void scic_sds_controller_link_down(struct scic_sds_controller *scic,
2536                 struct scic_sds_port *port, struct scic_sds_phy *phy)
2537 {
2538         switch (scic->sm.current_state_id) {
2539         case SCIC_STARTING:
2540         case SCIC_READY:
2541                 scic->port_agent.link_down_handler(scic, &scic->port_agent,
2542                                                    port, phy);
2543                 break;
2544         default:
2545                 dev_dbg(scic_to_dev(scic),
2546                         "%s: SCIC Controller linkdown event from phy %d in "
2547                         "unexpected state %d\n",
2548                         __func__,
2549                         phy->phy_index,
2550                         scic->sm.current_state_id);
2551         }
2552 }
2553
2554 /**
2555  * This is a helper method to determine if any remote devices on this
2556  * controller are still in the stopping state.
2557  *
2558  */
2559 static bool scic_sds_controller_has_remote_devices_stopping(
2560         struct scic_sds_controller *controller)
2561 {
2562         u32 index;
2563
2564         for (index = 0; index < controller->remote_node_entries; index++) {
2565                 if ((controller->device_table[index] != NULL) &&
2566                    (controller->device_table[index]->sm.current_state_id == SCI_DEV_STOPPING))
2567                         return true;
2568         }
2569
2570         return false;
2571 }
2572
2573 /**
2574  * This method is called by the remote device to inform the controller
2575  * object that the remote device has stopped.
2576  */
2577 void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic,
2578                                                struct scic_sds_remote_device *sci_dev)
2579 {
2580         if (scic->sm.current_state_id != SCIC_STOPPING) {
2581                 dev_dbg(scic_to_dev(scic),
2582                         "SCIC Controller 0x%p remote device stopped event "
2583                         "from device 0x%p in unexpected state %d\n",
2584                         scic, sci_dev,
2585                         scic->sm.current_state_id);
2586                 return;
2587         }
2588
2589         if (!scic_sds_controller_has_remote_devices_stopping(scic)) {
2590                 sci_change_state(&scic->sm, SCIC_STOPPED);
2591         }
2592 }
2593
2594 /**
2595  * This method will write to the SCU PCP register the request value. The method
2596  *    is used to suspend/resume ports, devices, and phys.
2597  * @scic:
2598  *
2599  *
2600  */
2601 void scic_sds_controller_post_request(
2602         struct scic_sds_controller *scic,
2603         u32 request)
2604 {
2605         dev_dbg(scic_to_dev(scic),
2606                 "%s: SCIC Controller 0x%p post request 0x%08x\n",
2607                 __func__,
2608                 scic,
2609                 request);
2610
2611         writel(request, &scic->smu_registers->post_context_port);
2612 }
2613
2614 /**
2615  * This method will copy the soft copy of the task context into the physical
2616  *    memory accessible by the controller.
2617  * @scic: This parameter specifies the controller for which to copy
2618  *    the task context.
2619  * @sci_req: This parameter specifies the request for which the task
2620  *    context is being copied.
2621  *
2622  * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
2623  * the physical memory version of the task context. Thus, all subsequent
2624  * updates to the task context are performed in the TC table (i.e. DMAable
2625  * memory). none
2626  */
2627 void scic_sds_controller_copy_task_context(
2628         struct scic_sds_controller *scic,
2629         struct scic_sds_request *sci_req)
2630 {
2631         struct scu_task_context *task_context_buffer;
2632
2633         task_context_buffer = scic_sds_controller_get_task_context_buffer(
2634                 scic, sci_req->io_tag);
2635
2636         memcpy(task_context_buffer,
2637                sci_req->task_context_buffer,
2638                offsetof(struct scu_task_context, sgl_snapshot_ac));
2639
2640         /*
2641          * Now that the soft copy of the TC has been copied into the TC
2642          * table accessible by the silicon.  Thus, any further changes to
2643          * the TC (e.g. TC termination) occur in the appropriate location. */
2644         sci_req->task_context_buffer = task_context_buffer;
2645 }
2646
2647 struct scu_task_context *scic_sds_controller_get_task_context_buffer(struct scic_sds_controller *scic,
2648                                                                      u16 io_tag)
2649 {
2650         u16 tci = ISCI_TAG_TCI(io_tag);
2651
2652         if (tci < scic->task_context_entries) {
2653                 return &scic->task_context_table[tci];
2654         }
2655
2656         return NULL;
2657 }
2658
2659 struct scic_sds_request *scic_request_by_tag(struct scic_sds_controller *scic, u16 io_tag)
2660 {
2661         u16 task_index;
2662         u16 task_sequence;
2663
2664         task_index = ISCI_TAG_TCI(io_tag);
2665
2666         if (task_index < scic->task_context_entries) {
2667                 if (scic->io_request_table[task_index] != NULL) {
2668                         task_sequence = ISCI_TAG_SEQ(io_tag);
2669
2670                         if (task_sequence == scic->io_request_sequence[task_index]) {
2671                                 return scic->io_request_table[task_index];
2672                         }
2673                 }
2674         }
2675
2676         return NULL;
2677 }
2678
2679 /**
2680  * This method allocates remote node index and the reserves the remote node
2681  *    context space for use. This method can fail if there are no more remote
2682  *    node index available.
2683  * @scic: This is the controller object which contains the set of
2684  *    free remote node ids
2685  * @sci_dev: This is the device object which is requesting the a remote node
2686  *    id
2687  * @node_id: This is the remote node id that is assinged to the device if one
2688  *    is available
2689  *
2690  * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
2691  * node index available.
2692  */
2693 enum sci_status scic_sds_controller_allocate_remote_node_context(
2694         struct scic_sds_controller *scic,
2695         struct scic_sds_remote_device *sci_dev,
2696         u16 *node_id)
2697 {
2698         u16 node_index;
2699         u32 remote_node_count = scic_sds_remote_device_node_count(sci_dev);
2700
2701         node_index = scic_sds_remote_node_table_allocate_remote_node(
2702                 &scic->available_remote_nodes, remote_node_count
2703                 );
2704
2705         if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
2706                 scic->device_table[node_index] = sci_dev;
2707
2708                 *node_id = node_index;
2709
2710                 return SCI_SUCCESS;
2711         }
2712
2713         return SCI_FAILURE_INSUFFICIENT_RESOURCES;
2714 }
2715
2716 /**
2717  * This method frees the remote node index back to the available pool.  Once
2718  *    this is done the remote node context buffer is no longer valid and can
2719  *    not be used.
2720  * @scic:
2721  * @sci_dev:
2722  * @node_id:
2723  *
2724  */
2725 void scic_sds_controller_free_remote_node_context(
2726         struct scic_sds_controller *scic,
2727         struct scic_sds_remote_device *sci_dev,
2728         u16 node_id)
2729 {
2730         u32 remote_node_count = scic_sds_remote_device_node_count(sci_dev);
2731
2732         if (scic->device_table[node_id] == sci_dev) {
2733                 scic->device_table[node_id] = NULL;
2734
2735                 scic_sds_remote_node_table_release_remote_node_index(
2736                         &scic->available_remote_nodes, remote_node_count, node_id
2737                         );
2738         }
2739 }
2740
2741 /**
2742  * This method returns the union scu_remote_node_context for the specified remote
2743  *    node id.
2744  * @scic:
2745  * @node_id:
2746  *
2747  * union scu_remote_node_context*
2748  */
2749 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
2750         struct scic_sds_controller *scic,
2751         u16 node_id
2752         ) {
2753         if (
2754                 (node_id < scic->remote_node_entries)
2755                 && (scic->device_table[node_id] != NULL)
2756                 ) {
2757                 return &scic->remote_node_context_table[node_id];
2758         }
2759
2760         return NULL;
2761 }
2762
2763 /**
2764  *
2765  * @resposne_buffer: This is the buffer into which the D2H register FIS will be
2766  *    constructed.
2767  * @frame_header: This is the frame header returned by the hardware.
2768  * @frame_buffer: This is the frame buffer returned by the hardware.
2769  *
2770  * This method will combind the frame header and frame buffer to create a SATA
2771  * D2H register FIS none
2772  */
2773 void scic_sds_controller_copy_sata_response(
2774         void *response_buffer,
2775         void *frame_header,
2776         void *frame_buffer)
2777 {
2778         memcpy(response_buffer, frame_header, sizeof(u32));
2779
2780         memcpy(response_buffer + sizeof(u32),
2781                frame_buffer,
2782                sizeof(struct dev_to_host_fis) - sizeof(u32));
2783 }
2784
2785 /**
2786  * This method releases the frame once this is done the frame is available for
2787  *    re-use by the hardware.  The data contained in the frame header and frame
2788  *    buffer is no longer valid. The UF queue get pointer is only updated if UF
2789  *    control indicates this is appropriate.
2790  * @scic:
2791  * @frame_index:
2792  *
2793  */
2794 void scic_sds_controller_release_frame(
2795         struct scic_sds_controller *scic,
2796         u32 frame_index)
2797 {
2798         if (scic_sds_unsolicited_frame_control_release_frame(
2799                     &scic->uf_control, frame_index) == true)
2800                 writel(scic->uf_control.get,
2801                         &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
2802 }
2803
2804 /**
2805  * scic_controller_start_io() - This method is called by the SCI user to
2806  *    send/start an IO request. If the method invocation is successful, then
2807  *    the IO request has been queued to the hardware for processing.
2808  * @controller: the handle to the controller object for which to start an IO
2809  *    request.
2810  * @remote_device: the handle to the remote device object for which to start an
2811  *    IO request.
2812  * @io_request: the handle to the io request object to start.
2813  * @io_tag: This parameter specifies a previously allocated IO tag that the
2814  *    user desires to be utilized for this request. This parameter is optional.
2815  *     The user is allowed to supply SCI_CONTROLLER_INVALID_IO_TAG as the value
2816  *    for this parameter.
2817  *
2818  * - IO tags are a protected resource.  It is incumbent upon the SCI Core user
2819  * to ensure that each of the methods that may allocate or free available IO
2820  * tags are handled in a mutually exclusive manner.  This method is one of said
2821  * methods requiring proper critical code section protection (e.g. semaphore,
2822  * spin-lock, etc.). - For SATA, the user is required to manage NCQ tags.  As a
2823  * result, it is expected the user will have set the NCQ tag field in the host
2824  * to device register FIS prior to calling this method.  There is also a
2825  * requirement for the user to call scic_stp_io_set_ncq_tag() prior to invoking
2826  * the scic_controller_start_io() method. scic_controller_allocate_tag() for
2827  * more information on allocating a tag. Indicate if the controller
2828  * successfully started the IO request. SCI_SUCCESS if the IO request was
2829  * successfully started. Determine the failure situations and return values.
2830  */
2831 enum sci_status scic_controller_start_io(struct scic_sds_controller *scic,
2832                                          struct scic_sds_remote_device *rdev,
2833                                          struct scic_sds_request *req,
2834                                          u16 io_tag)
2835 {
2836         enum sci_status status;
2837
2838         if (scic->sm.current_state_id != SCIC_READY) {
2839                 dev_warn(scic_to_dev(scic), "invalid state to start I/O");
2840                 return SCI_FAILURE_INVALID_STATE;
2841         }
2842
2843         status = scic_sds_remote_device_start_io(scic, rdev, req);
2844         if (status != SCI_SUCCESS)
2845                 return status;
2846
2847         scic->io_request_table[ISCI_TAG_TCI(req->io_tag)] = req;
2848         scic_sds_controller_post_request(scic, scic_sds_request_get_post_context(req));
2849         return SCI_SUCCESS;
2850 }
2851
2852 /**
2853  * scic_controller_terminate_request() - This method is called by the SCI Core
2854  *    user to terminate an ongoing (i.e. started) core IO request.  This does
2855  *    not abort the IO request at the target, but rather removes the IO request
2856  *    from the host controller.
2857  * @controller: the handle to the controller object for which to terminate a
2858  *    request.
2859  * @remote_device: the handle to the remote device object for which to
2860  *    terminate a request.
2861  * @request: the handle to the io or task management request object to
2862  *    terminate.
2863  *
2864  * Indicate if the controller successfully began the terminate process for the
2865  * IO request. SCI_SUCCESS if the terminate process was successfully started
2866  * for the request. Determine the failure situations and return values.
2867  */
2868 enum sci_status scic_controller_terminate_request(
2869         struct scic_sds_controller *scic,
2870         struct scic_sds_remote_device *rdev,
2871         struct scic_sds_request *req)
2872 {
2873         enum sci_status status;
2874
2875         if (scic->sm.current_state_id != SCIC_READY) {
2876                 dev_warn(scic_to_dev(scic),
2877                          "invalid state to terminate request\n");
2878                 return SCI_FAILURE_INVALID_STATE;
2879         }
2880
2881         status = scic_sds_io_request_terminate(req);
2882         if (status != SCI_SUCCESS)
2883                 return status;
2884
2885         /*
2886          * Utilize the original post context command and or in the POST_TC_ABORT
2887          * request sub-type.
2888          */
2889         scic_sds_controller_post_request(scic,
2890                 scic_sds_request_get_post_context(req) |
2891                 SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT);
2892         return SCI_SUCCESS;
2893 }
2894
2895 /**
2896  * scic_controller_complete_io() - This method will perform core specific
2897  *    completion operations for an IO request.  After this method is invoked,
2898  *    the user should consider the IO request as invalid until it is properly
2899  *    reused (i.e. re-constructed).
2900  * @controller: The handle to the controller object for which to complete the
2901  *    IO request.
2902  * @remote_device: The handle to the remote device object for which to complete
2903  *    the IO request.
2904  * @io_request: the handle to the io request object to complete.
2905  *
2906  * - IO tags are a protected resource.  It is incumbent upon the SCI Core user
2907  * to ensure that each of the methods that may allocate or free available IO
2908  * tags are handled in a mutually exclusive manner.  This method is one of said
2909  * methods requiring proper critical code section protection (e.g. semaphore,
2910  * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
2911  * Core user, using the scic_controller_allocate_io_tag() method, then it is
2912  * the responsibility of the caller to invoke the scic_controller_free_io_tag()
2913  * method to free the tag (i.e. this method will not free the IO tag). Indicate
2914  * if the controller successfully completed the IO request. SCI_SUCCESS if the
2915  * completion process was successful.
2916  */
2917 enum sci_status scic_controller_complete_io(
2918         struct scic_sds_controller *scic,
2919         struct scic_sds_remote_device *rdev,
2920         struct scic_sds_request *request)
2921 {
2922         enum sci_status status;
2923         u16 index;
2924
2925         switch (scic->sm.current_state_id) {
2926         case SCIC_STOPPING:
2927                 /* XXX: Implement this function */
2928                 return SCI_FAILURE;
2929         case SCIC_READY:
2930                 status = scic_sds_remote_device_complete_io(scic, rdev, request);
2931                 if (status != SCI_SUCCESS)
2932                         return status;
2933
2934                 index = ISCI_TAG_TCI(request->io_tag);
2935                 scic->io_request_table[index] = NULL;
2936                 return SCI_SUCCESS;
2937         default:
2938                 dev_warn(scic_to_dev(scic), "invalid state to complete I/O");
2939                 return SCI_FAILURE_INVALID_STATE;
2940         }
2941
2942 }
2943
2944 enum sci_status scic_controller_continue_io(struct scic_sds_request *sci_req)
2945 {
2946         struct scic_sds_controller *scic = sci_req->owning_controller;
2947
2948         if (scic->sm.current_state_id != SCIC_READY) {
2949                 dev_warn(scic_to_dev(scic), "invalid state to continue I/O");
2950                 return SCI_FAILURE_INVALID_STATE;
2951         }
2952
2953         scic->io_request_table[ISCI_TAG_TCI(sci_req->io_tag)] = sci_req;
2954         scic_sds_controller_post_request(scic, scic_sds_request_get_post_context(sci_req));
2955         return SCI_SUCCESS;
2956 }
2957
2958 /**
2959  * scic_controller_start_task() - This method is called by the SCIC user to
2960  *    send/start a framework task management request.
2961  * @controller: the handle to the controller object for which to start the task
2962  *    management request.
2963  * @remote_device: the handle to the remote device object for which to start
2964  *    the task management request.
2965  * @task_request: the handle to the task request object to start.
2966  * @io_tag: This parameter specifies a previously allocated IO tag that the
2967  *    user desires to be utilized for this request.  Note this not the io_tag
2968  *    of the request being managed.  It is to be utilized for the task request
2969  *    itself. This parameter is optional.  The user is allowed to supply
2970  *    SCI_CONTROLLER_INVALID_IO_TAG as the value for this parameter.
2971  *
2972  * - IO tags are a protected resource.  It is incumbent upon the SCI Core user
2973  * to ensure that each of the methods that may allocate or free available IO
2974  * tags are handled in a mutually exclusive manner.  This method is one of said
2975  * methods requiring proper critical code section protection (e.g. semaphore,
2976  * spin-lock, etc.). - The user must synchronize this task with completion
2977  * queue processing.  If they are not synchronized then it is possible for the
2978  * io requests that are being managed by the task request can complete before
2979  * starting the task request. scic_controller_allocate_tag() for more
2980  * information on allocating a tag. Indicate if the controller successfully
2981  * started the IO request. SCI_TASK_SUCCESS if the task request was
2982  * successfully started. SCI_TASK_FAILURE_REQUIRES_SCSI_ABORT This value is
2983  * returned if there is/are task(s) outstanding that require termination or
2984  * completion before this request can succeed.
2985  */
2986 enum sci_task_status scic_controller_start_task(
2987         struct scic_sds_controller *scic,
2988         struct scic_sds_remote_device *rdev,
2989         struct scic_sds_request *req,
2990         u16 task_tag)
2991 {
2992         enum sci_status status;
2993
2994         if (scic->sm.current_state_id != SCIC_READY) {
2995                 dev_warn(scic_to_dev(scic),
2996                          "%s: SCIC Controller starting task from invalid "
2997                          "state\n",
2998                          __func__);
2999                 return SCI_TASK_FAILURE_INVALID_STATE;
3000         }
3001
3002         status = scic_sds_remote_device_start_task(scic, rdev, req);
3003         switch (status) {
3004         case SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS:
3005                 scic->io_request_table[ISCI_TAG_TCI(req->io_tag)] = req;
3006
3007                 /*
3008                  * We will let framework know this task request started successfully,
3009                  * although core is still woring on starting the request (to post tc when
3010                  * RNC is resumed.)
3011                  */
3012                 return SCI_SUCCESS;
3013         case SCI_SUCCESS:
3014                 scic->io_request_table[ISCI_TAG_TCI(req->io_tag)] = req;
3015
3016                 scic_sds_controller_post_request(scic,
3017                         scic_sds_request_get_post_context(req));
3018                 break;
3019         default:
3020                 break;
3021         }
3022
3023         return status;
3024 }
3025
3026 /**
3027  * scic_controller_allocate_io_tag() - This method will allocate a tag from the
3028  *    pool of free IO tags. Direct allocation of IO tags by the SCI Core user
3029  *    is optional. The scic_controller_start_io() method will allocate an IO
3030  *    tag if this method is not utilized and the tag is not supplied to the IO
3031  *    construct routine.  Direct allocation of IO tags may provide additional
3032  *    performance improvements in environments capable of supporting this usage
3033  *    model.  Additionally, direct allocation of IO tags also provides
3034  *    additional flexibility to the SCI Core user.  Specifically, the user may
3035  *    retain IO tags across the lives of multiple IO requests.
3036  * @controller: the handle to the controller object for which to allocate the
3037  *    tag.
3038  *
3039  * IO tags are a protected resource.  It is incumbent upon the SCI Core user to
3040  * ensure that each of the methods that may allocate or free available IO tags
3041  * are handled in a mutually exclusive manner.  This method is one of said
3042  * methods requiring proper critical code section protection (e.g. semaphore,
3043  * spin-lock, etc.). An unsigned integer representing an available IO tag.
3044  * SCI_CONTROLLER_INVALID_IO_TAG This value is returned if there are no
3045  * currently available tags to be allocated. All return other values indicate a
3046  * legitimate tag.
3047  */
3048 u16 scic_controller_allocate_io_tag(struct scic_sds_controller *scic)
3049 {
3050         struct isci_host *ihost = scic_to_ihost(scic);
3051
3052         if (isci_tci_space(ihost)) {
3053                 u16 tci = isci_tci_alloc(ihost);
3054                 u8 seq = scic->io_request_sequence[tci];
3055
3056                 return ISCI_TAG(seq, tci);
3057         }
3058
3059         return SCI_CONTROLLER_INVALID_IO_TAG;
3060 }
3061
3062 /**
3063  * scic_controller_free_io_tag() - This method will free an IO tag to the pool
3064  *    of free IO tags. This method provides the SCI Core user more flexibility
3065  *    with regards to IO tags.  The user may desire to keep an IO tag after an
3066  *    IO request has completed, because they plan on re-using the tag for a
3067  *    subsequent IO request.  This method is only legal if the tag was
3068  *    allocated via scic_controller_allocate_io_tag().
3069  * @controller: This parameter specifies the handle to the controller object
3070  *    for which to free/return the tag.
3071  * @io_tag: This parameter represents the tag to be freed to the pool of
3072  *    available tags.
3073  *
3074  * - IO tags are a protected resource.  It is incumbent upon the SCI Core user
3075  * to ensure that each of the methods that may allocate or free available IO
3076  * tags are handled in a mutually exclusive manner.  This method is one of said
3077  * methods requiring proper critical code section protection (e.g. semaphore,
3078  * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
3079  * Core user, using the scic_controller_allocate_io_tag() method, then it is
3080  * the responsibility of the caller to invoke this method to free the tag. This
3081  * method returns an indication of whether the tag was successfully put back
3082  * (freed) to the pool of available tags. SCI_SUCCESS This return value
3083  * indicates the tag was successfully placed into the pool of available IO
3084  * tags. SCI_FAILURE_INVALID_IO_TAG This value is returned if the supplied tag
3085  * is not a valid IO tag value.
3086  */
3087 enum sci_status scic_controller_free_io_tag(struct scic_sds_controller *scic,
3088                                             u16 io_tag)
3089 {
3090         struct isci_host *ihost = scic_to_ihost(scic);
3091         u16 tci = ISCI_TAG_TCI(io_tag);
3092         u16 seq = ISCI_TAG_SEQ(io_tag);
3093
3094         /* prevent tail from passing head */
3095         if (isci_tci_active(ihost) == 0)
3096                 return SCI_FAILURE_INVALID_IO_TAG;
3097
3098         if (seq == scic->io_request_sequence[tci]) {
3099                 scic->io_request_sequence[tci] = (seq+1) & (SCI_MAX_SEQ-1);
3100
3101                 isci_tci_free(ihost, ISCI_TAG_TCI(io_tag));
3102
3103                 return SCI_SUCCESS;
3104         }
3105         return SCI_FAILURE_INVALID_IO_TAG;
3106 }