2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
76 static void __ata_qc_complete(struct ata_queued_cmd *qc);
78 static unsigned int ata_unique_id = 1;
79 static struct workqueue_struct *ata_wq;
81 int atapi_enabled = 0;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
91 * ata_tf_load_pio - send taskfile registers to host controller
92 * @ap: Port to which output is sent
93 * @tf: ATA taskfile register set
95 * Outputs ATA taskfile to standard ATA host controller.
98 * Inherited from caller.
101 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
103 struct ata_ioports *ioaddr = &ap->ioaddr;
104 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
106 if (tf->ctl != ap->last_ctl) {
107 outb(tf->ctl, ioaddr->ctl_addr);
108 ap->last_ctl = tf->ctl;
112 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
113 outb(tf->hob_feature, ioaddr->feature_addr);
114 outb(tf->hob_nsect, ioaddr->nsect_addr);
115 outb(tf->hob_lbal, ioaddr->lbal_addr);
116 outb(tf->hob_lbam, ioaddr->lbam_addr);
117 outb(tf->hob_lbah, ioaddr->lbah_addr);
118 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
127 outb(tf->feature, ioaddr->feature_addr);
128 outb(tf->nsect, ioaddr->nsect_addr);
129 outb(tf->lbal, ioaddr->lbal_addr);
130 outb(tf->lbam, ioaddr->lbam_addr);
131 outb(tf->lbah, ioaddr->lbah_addr);
132 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
140 if (tf->flags & ATA_TFLAG_DEVICE) {
141 outb(tf->device, ioaddr->device_addr);
142 VPRINTK("device 0x%X\n", tf->device);
149 * ata_tf_load_mmio - send taskfile registers to host controller
150 * @ap: Port to which output is sent
151 * @tf: ATA taskfile register set
153 * Outputs ATA taskfile to standard ATA host controller using MMIO.
156 * Inherited from caller.
159 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
164 if (tf->ctl != ap->last_ctl) {
165 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
166 ap->last_ctl = tf->ctl;
170 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
171 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
172 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
173 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
174 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
175 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
176 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
185 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
186 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
187 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
188 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
189 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
190 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
198 if (tf->flags & ATA_TFLAG_DEVICE) {
199 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
200 VPRINTK("device 0x%X\n", tf->device);
208 * ata_tf_load - send taskfile registers to host controller
209 * @ap: Port to which output is sent
210 * @tf: ATA taskfile register set
212 * Outputs ATA taskfile to standard ATA host controller using MMIO
213 * or PIO as indicated by the ATA_FLAG_MMIO flag.
214 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
215 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
216 * hob_lbal, hob_lbam, and hob_lbah.
218 * This function waits for idle (!BUSY and !DRQ) after writing
219 * registers. If the control register has a new value, this
220 * function also waits for idle after writing control and before
221 * writing the remaining registers.
223 * May be used as the tf_load() entry in ata_port_operations.
226 * Inherited from caller.
228 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
230 if (ap->flags & ATA_FLAG_MMIO)
231 ata_tf_load_mmio(ap, tf);
233 ata_tf_load_pio(ap, tf);
237 * ata_exec_command_pio - issue ATA command to host controller
238 * @ap: port to which command is being issued
239 * @tf: ATA taskfile register set
241 * Issues PIO write to ATA command register, with proper
242 * synchronization with interrupt handler / other threads.
245 * spin_lock_irqsave(host_set lock)
248 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
250 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
252 outb(tf->command, ap->ioaddr.command_addr);
258 * ata_exec_command_mmio - issue ATA command to host controller
259 * @ap: port to which command is being issued
260 * @tf: ATA taskfile register set
262 * Issues MMIO write to ATA command register, with proper
263 * synchronization with interrupt handler / other threads.
266 * spin_lock_irqsave(host_set lock)
269 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
271 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
273 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
279 * ata_exec_command - issue ATA command to host controller
280 * @ap: port to which command is being issued
281 * @tf: ATA taskfile register set
283 * Issues PIO/MMIO write to ATA command register, with proper
284 * synchronization with interrupt handler / other threads.
287 * spin_lock_irqsave(host_set lock)
289 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
291 if (ap->flags & ATA_FLAG_MMIO)
292 ata_exec_command_mmio(ap, tf);
294 ata_exec_command_pio(ap, tf);
298 * ata_tf_to_host - issue ATA taskfile to host controller
299 * @ap: port to which command is being issued
300 * @tf: ATA taskfile register set
302 * Issues ATA taskfile register set to ATA host controller,
303 * with proper synchronization with interrupt handler and
307 * spin_lock_irqsave(host_set lock)
310 static inline void ata_tf_to_host(struct ata_port *ap,
311 const struct ata_taskfile *tf)
313 ap->ops->tf_load(ap, tf);
314 ap->ops->exec_command(ap, tf);
318 * ata_tf_read_pio - input device's ATA taskfile shadow registers
319 * @ap: Port from which input is read
320 * @tf: ATA taskfile register set for storing input
322 * Reads ATA taskfile registers for currently-selected device
326 * Inherited from caller.
329 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
331 struct ata_ioports *ioaddr = &ap->ioaddr;
333 tf->command = ata_check_status(ap);
334 tf->feature = inb(ioaddr->error_addr);
335 tf->nsect = inb(ioaddr->nsect_addr);
336 tf->lbal = inb(ioaddr->lbal_addr);
337 tf->lbam = inb(ioaddr->lbam_addr);
338 tf->lbah = inb(ioaddr->lbah_addr);
339 tf->device = inb(ioaddr->device_addr);
341 if (tf->flags & ATA_TFLAG_LBA48) {
342 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
343 tf->hob_feature = inb(ioaddr->error_addr);
344 tf->hob_nsect = inb(ioaddr->nsect_addr);
345 tf->hob_lbal = inb(ioaddr->lbal_addr);
346 tf->hob_lbam = inb(ioaddr->lbam_addr);
347 tf->hob_lbah = inb(ioaddr->lbah_addr);
352 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
353 * @ap: Port from which input is read
354 * @tf: ATA taskfile register set for storing input
356 * Reads ATA taskfile registers for currently-selected device
360 * Inherited from caller.
363 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
365 struct ata_ioports *ioaddr = &ap->ioaddr;
367 tf->command = ata_check_status(ap);
368 tf->feature = readb((void __iomem *)ioaddr->error_addr);
369 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
370 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
371 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
372 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
373 tf->device = readb((void __iomem *)ioaddr->device_addr);
375 if (tf->flags & ATA_TFLAG_LBA48) {
376 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
377 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
378 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
379 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
380 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
381 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
387 * ata_tf_read - input device's ATA taskfile shadow registers
388 * @ap: Port from which input is read
389 * @tf: ATA taskfile register set for storing input
391 * Reads ATA taskfile registers for currently-selected device
394 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
395 * is set, also reads the hob registers.
397 * May be used as the tf_read() entry in ata_port_operations.
400 * Inherited from caller.
402 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
404 if (ap->flags & ATA_FLAG_MMIO)
405 ata_tf_read_mmio(ap, tf);
407 ata_tf_read_pio(ap, tf);
411 * ata_check_status_pio - Read device status reg & clear interrupt
412 * @ap: port where the device is
414 * Reads ATA taskfile status register for currently-selected device
415 * and return its value. This also clears pending interrupts
419 * Inherited from caller.
421 static u8 ata_check_status_pio(struct ata_port *ap)
423 return inb(ap->ioaddr.status_addr);
427 * ata_check_status_mmio - Read device status reg & clear interrupt
428 * @ap: port where the device is
430 * Reads ATA taskfile status register for currently-selected device
431 * via MMIO and return its value. This also clears pending interrupts
435 * Inherited from caller.
437 static u8 ata_check_status_mmio(struct ata_port *ap)
439 return readb((void __iomem *) ap->ioaddr.status_addr);
444 * ata_check_status - Read device status reg & clear interrupt
445 * @ap: port where the device is
447 * Reads ATA taskfile status register for currently-selected device
448 * and return its value. This also clears pending interrupts
451 * May be used as the check_status() entry in ata_port_operations.
454 * Inherited from caller.
456 u8 ata_check_status(struct ata_port *ap)
458 if (ap->flags & ATA_FLAG_MMIO)
459 return ata_check_status_mmio(ap);
460 return ata_check_status_pio(ap);
465 * ata_altstatus - Read device alternate status reg
466 * @ap: port where the device is
468 * Reads ATA taskfile alternate status register for
469 * currently-selected device and return its value.
471 * Note: may NOT be used as the check_altstatus() entry in
472 * ata_port_operations.
475 * Inherited from caller.
477 u8 ata_altstatus(struct ata_port *ap)
479 if (ap->ops->check_altstatus)
480 return ap->ops->check_altstatus(ap);
482 if (ap->flags & ATA_FLAG_MMIO)
483 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
484 return inb(ap->ioaddr.altstatus_addr);
489 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
490 * @tf: Taskfile to convert
491 * @fis: Buffer into which data will output
492 * @pmp: Port multiplier port
494 * Converts a standard ATA taskfile to a Serial ATA
495 * FIS structure (Register - Host to Device).
498 * Inherited from caller.
501 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
503 fis[0] = 0x27; /* Register - Host to Device FIS */
504 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
505 bit 7 indicates Command FIS */
506 fis[2] = tf->command;
507 fis[3] = tf->feature;
514 fis[8] = tf->hob_lbal;
515 fis[9] = tf->hob_lbam;
516 fis[10] = tf->hob_lbah;
517 fis[11] = tf->hob_feature;
520 fis[13] = tf->hob_nsect;
531 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
532 * @fis: Buffer from which data will be input
533 * @tf: Taskfile to output
535 * Converts a serial ATA FIS structure to a standard ATA taskfile.
538 * Inherited from caller.
541 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
543 tf->command = fis[2]; /* status */
544 tf->feature = fis[3]; /* error */
551 tf->hob_lbal = fis[8];
552 tf->hob_lbam = fis[9];
553 tf->hob_lbah = fis[10];
556 tf->hob_nsect = fis[13];
559 static const u8 ata_rw_cmds[] = {
563 ATA_CMD_READ_MULTI_EXT,
564 ATA_CMD_WRITE_MULTI_EXT,
568 ATA_CMD_PIO_READ_EXT,
569 ATA_CMD_PIO_WRITE_EXT,
578 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
579 * @qc: command to examine and configure
581 * Examine the device configuration and tf->flags to calculate
582 * the proper read/write commands and protocol to use.
587 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
589 struct ata_taskfile *tf = &qc->tf;
590 struct ata_device *dev = qc->dev;
592 int index, lba48, write;
594 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
595 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
597 if (dev->flags & ATA_DFLAG_PIO) {
598 tf->protocol = ATA_PROT_PIO;
599 index = dev->multi_count ? 0 : 4;
601 tf->protocol = ATA_PROT_DMA;
605 tf->command = ata_rw_cmds[index + lba48 + write];
608 static const char * const xfer_mode_str[] = {
628 * ata_udma_string - convert UDMA bit offset to string
629 * @mask: mask of bits supported; only highest bit counts.
631 * Determine string which represents the highest speed
632 * (highest bit in @udma_mask).
638 * Constant C string representing highest speed listed in
639 * @udma_mask, or the constant C string "<n/a>".
642 static const char *ata_mode_string(unsigned int mask)
646 for (i = 7; i >= 0; i--)
649 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
652 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
659 return xfer_mode_str[i];
663 * ata_pio_devchk - PATA device presence detection
664 * @ap: ATA channel to examine
665 * @device: Device to examine (starting at zero)
667 * This technique was originally described in
668 * Hale Landis's ATADRVR (www.ata-atapi.com), and
669 * later found its way into the ATA/ATAPI spec.
671 * Write a pattern to the ATA shadow registers,
672 * and if a device is present, it will respond by
673 * correctly storing and echoing back the
674 * ATA shadow register contents.
680 static unsigned int ata_pio_devchk(struct ata_port *ap,
683 struct ata_ioports *ioaddr = &ap->ioaddr;
686 ap->ops->dev_select(ap, device);
688 outb(0x55, ioaddr->nsect_addr);
689 outb(0xaa, ioaddr->lbal_addr);
691 outb(0xaa, ioaddr->nsect_addr);
692 outb(0x55, ioaddr->lbal_addr);
694 outb(0x55, ioaddr->nsect_addr);
695 outb(0xaa, ioaddr->lbal_addr);
697 nsect = inb(ioaddr->nsect_addr);
698 lbal = inb(ioaddr->lbal_addr);
700 if ((nsect == 0x55) && (lbal == 0xaa))
701 return 1; /* we found a device */
703 return 0; /* nothing found */
707 * ata_mmio_devchk - PATA device presence detection
708 * @ap: ATA channel to examine
709 * @device: Device to examine (starting at zero)
711 * This technique was originally described in
712 * Hale Landis's ATADRVR (www.ata-atapi.com), and
713 * later found its way into the ATA/ATAPI spec.
715 * Write a pattern to the ATA shadow registers,
716 * and if a device is present, it will respond by
717 * correctly storing and echoing back the
718 * ATA shadow register contents.
724 static unsigned int ata_mmio_devchk(struct ata_port *ap,
727 struct ata_ioports *ioaddr = &ap->ioaddr;
730 ap->ops->dev_select(ap, device);
732 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
733 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
735 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
736 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
738 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
739 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
741 nsect = readb((void __iomem *) ioaddr->nsect_addr);
742 lbal = readb((void __iomem *) ioaddr->lbal_addr);
744 if ((nsect == 0x55) && (lbal == 0xaa))
745 return 1; /* we found a device */
747 return 0; /* nothing found */
751 * ata_devchk - PATA device presence detection
752 * @ap: ATA channel to examine
753 * @device: Device to examine (starting at zero)
755 * Dispatch ATA device presence detection, depending
756 * on whether we are using PIO or MMIO to talk to the
757 * ATA shadow registers.
763 static unsigned int ata_devchk(struct ata_port *ap,
766 if (ap->flags & ATA_FLAG_MMIO)
767 return ata_mmio_devchk(ap, device);
768 return ata_pio_devchk(ap, device);
772 * ata_dev_classify - determine device type based on ATA-spec signature
773 * @tf: ATA taskfile register set for device to be identified
775 * Determine from taskfile register contents whether a device is
776 * ATA or ATAPI, as per "Signature and persistence" section
777 * of ATA/PI spec (volume 1, sect 5.14).
783 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
784 * the event of failure.
787 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
789 /* Apple's open source Darwin code hints that some devices only
790 * put a proper signature into the LBA mid/high registers,
791 * So, we only check those. It's sufficient for uniqueness.
794 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
795 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
796 DPRINTK("found ATA device by sig\n");
800 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
801 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
802 DPRINTK("found ATAPI device by sig\n");
803 return ATA_DEV_ATAPI;
806 DPRINTK("unknown device\n");
807 return ATA_DEV_UNKNOWN;
811 * ata_dev_try_classify - Parse returned ATA device signature
812 * @ap: ATA channel to examine
813 * @device: Device to examine (starting at zero)
815 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
816 * an ATA/ATAPI-defined set of values is placed in the ATA
817 * shadow registers, indicating the results of device detection
820 * Select the ATA device, and read the values from the ATA shadow
821 * registers. Then parse according to the Error register value,
822 * and the spec-defined values examined by ata_dev_classify().
828 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
830 struct ata_device *dev = &ap->device[device];
831 struct ata_taskfile tf;
835 ap->ops->dev_select(ap, device);
837 memset(&tf, 0, sizeof(tf));
839 ap->ops->tf_read(ap, &tf);
842 dev->class = ATA_DEV_NONE;
844 /* see if device passed diags */
847 else if ((device == 0) && (err == 0x81))
852 /* determine if device if ATA or ATAPI */
853 class = ata_dev_classify(&tf);
854 if (class == ATA_DEV_UNKNOWN)
856 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
865 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
866 * @id: IDENTIFY DEVICE results we will examine
867 * @s: string into which data is output
868 * @ofs: offset into identify device page
869 * @len: length of string to return. must be an even number.
871 * The strings in the IDENTIFY DEVICE page are broken up into
872 * 16-bit chunks. Run through the string, and output each
873 * 8-bit chunk linearly, regardless of platform.
879 void ata_dev_id_string(const u16 *id, unsigned char *s,
880 unsigned int ofs, unsigned int len)
900 * ata_noop_dev_select - Select device 0/1 on ATA bus
901 * @ap: ATA channel to manipulate
902 * @device: ATA device (numbered from zero) to select
904 * This function performs no actual function.
906 * May be used as the dev_select() entry in ata_port_operations.
911 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
917 * ata_std_dev_select - Select device 0/1 on ATA bus
918 * @ap: ATA channel to manipulate
919 * @device: ATA device (numbered from zero) to select
921 * Use the method defined in the ATA specification to
922 * make either device 0, or device 1, active on the
923 * ATA channel. Works with both PIO and MMIO.
925 * May be used as the dev_select() entry in ata_port_operations.
931 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
936 tmp = ATA_DEVICE_OBS;
938 tmp = ATA_DEVICE_OBS | ATA_DEV1;
940 if (ap->flags & ATA_FLAG_MMIO) {
941 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
943 outb(tmp, ap->ioaddr.device_addr);
945 ata_pause(ap); /* needed; also flushes, for mmio */
949 * ata_dev_select - Select device 0/1 on ATA bus
950 * @ap: ATA channel to manipulate
951 * @device: ATA device (numbered from zero) to select
952 * @wait: non-zero to wait for Status register BSY bit to clear
953 * @can_sleep: non-zero if context allows sleeping
955 * Use the method defined in the ATA specification to
956 * make either device 0, or device 1, active on the
959 * This is a high-level version of ata_std_dev_select(),
960 * which additionally provides the services of inserting
961 * the proper pauses and status polling, where needed.
967 void ata_dev_select(struct ata_port *ap, unsigned int device,
968 unsigned int wait, unsigned int can_sleep)
970 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
971 ap->id, device, wait);
976 ap->ops->dev_select(ap, device);
979 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
986 * ata_dump_id - IDENTIFY DEVICE info debugging output
987 * @dev: Device whose IDENTIFY DEVICE page we will dump
989 * Dump selected 16-bit words from a detected device's
990 * IDENTIFY PAGE page.
996 static inline void ata_dump_id(const struct ata_device *dev)
998 DPRINTK("49==0x%04x "
1008 DPRINTK("80==0x%04x "
1018 DPRINTK("88==0x%04x "
1025 * Compute the PIO modes available for this device. This is not as
1026 * trivial as it seems if we must consider early devices correctly.
1028 * FIXME: pre IDE drive timing (do we care ?).
1031 static unsigned int ata_pio_modes(const struct ata_device *adev)
1035 /* Usual case. Word 53 indicates word 88 is valid */
1036 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1037 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1043 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1044 for the maximum. Turn it into a mask and return it */
1045 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1049 struct ata_exec_internal_arg {
1050 unsigned int err_mask;
1051 struct ata_taskfile *tf;
1052 struct completion *waiting;
1055 int ata_qc_complete_internal(struct ata_queued_cmd *qc)
1057 struct ata_exec_internal_arg *arg = qc->private_data;
1058 struct completion *waiting = arg->waiting;
1060 if (!(qc->err_mask & ~AC_ERR_DEV))
1061 qc->ap->ops->tf_read(qc->ap, arg->tf);
1062 arg->err_mask = qc->err_mask;
1063 arg->waiting = NULL;
1070 * ata_exec_internal - execute libata internal command
1071 * @ap: Port to which the command is sent
1072 * @dev: Device to which the command is sent
1073 * @tf: Taskfile registers for the command and the result
1074 * @dma_dir: Data tranfer direction of the command
1075 * @buf: Data buffer of the command
1076 * @buflen: Length of data buffer
1078 * Executes libata internal command with timeout. @tf contains
1079 * command on entry and result on return. Timeout and error
1080 * conditions are reported via return value. No recovery action
1081 * is taken after a command times out. It's caller's duty to
1082 * clean up after timeout.
1085 * None. Should be called with kernel context, might sleep.
1089 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
1090 struct ata_taskfile *tf,
1091 int dma_dir, void *buf, unsigned int buflen)
1093 u8 command = tf->command;
1094 struct ata_queued_cmd *qc;
1095 DECLARE_COMPLETION(wait);
1096 unsigned long flags;
1097 struct ata_exec_internal_arg arg;
1099 spin_lock_irqsave(&ap->host_set->lock, flags);
1101 qc = ata_qc_new_init(ap, dev);
1105 qc->dma_dir = dma_dir;
1106 if (dma_dir != DMA_NONE) {
1107 ata_sg_init_one(qc, buf, buflen);
1108 qc->nsect = buflen / ATA_SECT_SIZE;
1111 arg.waiting = &wait;
1113 qc->private_data = &arg;
1114 qc->complete_fn = ata_qc_complete_internal;
1116 if (ata_qc_issue(qc))
1119 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1121 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1122 spin_lock_irqsave(&ap->host_set->lock, flags);
1124 /* We're racing with irq here. If we lose, the
1125 * following test prevents us from completing the qc
1126 * again. If completion irq occurs after here but
1127 * before the caller cleans up, it will result in a
1128 * spurious interrupt. We can live with that.
1131 qc->err_mask = AC_ERR_OTHER;
1132 ata_qc_complete(qc);
1133 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1137 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1140 return arg.err_mask;
1144 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1145 return AC_ERR_OTHER;
1148 static int ata_qc_wait_err(struct ata_queued_cmd *qc,
1149 struct completion *wait)
1153 if (wait_for_completion_timeout(wait, 30 * HZ) < 1) {
1154 /* timeout handling */
1155 qc->err_mask |= ac_err_mask(ata_chk_status(qc->ap));
1157 if (!qc->err_mask) {
1158 printk(KERN_WARNING "ata%u: slow completion (cmd %x)\n",
1159 qc->ap->id, qc->tf.command);
1161 printk(KERN_WARNING "ata%u: qc timeout (cmd %x)\n",
1162 qc->ap->id, qc->tf.command);
1166 ata_qc_complete(qc);
1173 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1174 * @ap: port on which device we wish to probe resides
1175 * @device: device bus address, starting at zero
1177 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1178 * command, and read back the 512-byte device information page.
1179 * The device information page is fed to us via the standard
1180 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1181 * using standard PIO-IN paths)
1183 * After reading the device information page, we use several
1184 * bits of information from it to initialize data structures
1185 * that will be used during the lifetime of the ata_device.
1186 * Other data from the info page is used to disqualify certain
1187 * older ATA devices we do not wish to support.
1190 * Inherited from caller. Some functions called by this function
1191 * obtain the host_set lock.
1194 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1196 struct ata_device *dev = &ap->device[device];
1197 unsigned int major_version;
1199 unsigned long xfer_modes;
1200 unsigned int using_edd;
1201 struct ata_taskfile tf;
1202 unsigned int err_mask;
1205 if (!ata_dev_present(dev)) {
1206 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1211 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1216 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1218 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1219 dev->class == ATA_DEV_NONE);
1221 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1224 ata_tf_init(ap, &tf, device);
1226 if (dev->class == ATA_DEV_ATA) {
1227 tf.command = ATA_CMD_ID_ATA;
1228 DPRINTK("do ATA identify\n");
1230 tf.command = ATA_CMD_ID_ATAPI;
1231 DPRINTK("do ATAPI identify\n");
1234 tf.protocol = ATA_PROT_PIO;
1236 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1237 dev->id, sizeof(dev->id));
1240 if (err_mask & ~AC_ERR_DEV)
1244 * arg! EDD works for all test cases, but seems to return
1245 * the ATA signature for some ATAPI devices. Until the
1246 * reason for this is found and fixed, we fix up the mess
1247 * here. If IDENTIFY DEVICE returns command aborted
1248 * (as ATAPI devices do), then we issue an
1249 * IDENTIFY PACKET DEVICE.
1251 * ATA software reset (SRST, the default) does not appear
1252 * to have this problem.
1254 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1255 u8 err = tf.feature;
1256 if (err & ATA_ABORTED) {
1257 dev->class = ATA_DEV_ATAPI;
1264 swap_buf_le16(dev->id, ATA_ID_WORDS);
1266 /* print device capabilities */
1267 printk(KERN_DEBUG "ata%u: dev %u cfg "
1268 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1269 ap->id, device, dev->id[49],
1270 dev->id[82], dev->id[83], dev->id[84],
1271 dev->id[85], dev->id[86], dev->id[87],
1275 * common ATA, ATAPI feature tests
1278 /* we require DMA support (bits 8 of word 49) */
1279 if (!ata_id_has_dma(dev->id)) {
1280 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1284 /* quick-n-dirty find max transfer mode; for printk only */
1285 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1287 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1289 xfer_modes = ata_pio_modes(dev);
1293 /* ATA-specific feature tests */
1294 if (dev->class == ATA_DEV_ATA) {
1295 if (!ata_id_is_ata(dev->id)) /* sanity check */
1298 /* get major version */
1299 tmp = dev->id[ATA_ID_MAJOR_VER];
1300 for (major_version = 14; major_version >= 1; major_version--)
1301 if (tmp & (1 << major_version))
1305 * The exact sequence expected by certain pre-ATA4 drives is:
1308 * INITIALIZE DEVICE PARAMETERS
1310 * Some drives were very specific about that exact sequence.
1312 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1313 ata_dev_init_params(ap, dev);
1315 /* current CHS translation info (id[53-58]) might be
1316 * changed. reread the identify device info.
1318 ata_dev_reread_id(ap, dev);
1321 if (ata_id_has_lba(dev->id)) {
1322 dev->flags |= ATA_DFLAG_LBA;
1324 if (ata_id_has_lba48(dev->id)) {
1325 dev->flags |= ATA_DFLAG_LBA48;
1326 dev->n_sectors = ata_id_u64(dev->id, 100);
1328 dev->n_sectors = ata_id_u32(dev->id, 60);
1331 /* print device info to dmesg */
1332 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1335 ata_mode_string(xfer_modes),
1336 (unsigned long long)dev->n_sectors,
1337 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1341 /* Default translation */
1342 dev->cylinders = dev->id[1];
1343 dev->heads = dev->id[3];
1344 dev->sectors = dev->id[6];
1345 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1347 if (ata_id_current_chs_valid(dev->id)) {
1348 /* Current CHS translation is valid. */
1349 dev->cylinders = dev->id[54];
1350 dev->heads = dev->id[55];
1351 dev->sectors = dev->id[56];
1353 dev->n_sectors = ata_id_u32(dev->id, 57);
1356 /* print device info to dmesg */
1357 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1360 ata_mode_string(xfer_modes),
1361 (unsigned long long)dev->n_sectors,
1362 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1366 ap->host->max_cmd_len = 16;
1369 /* ATAPI-specific feature tests */
1370 else if (dev->class == ATA_DEV_ATAPI) {
1371 if (ata_id_is_ata(dev->id)) /* sanity check */
1374 rc = atapi_cdb_len(dev->id);
1375 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1376 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1379 ap->cdb_len = (unsigned int) rc;
1380 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1382 /* print device info to dmesg */
1383 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1385 ata_mode_string(xfer_modes));
1388 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1392 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1395 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1396 DPRINTK("EXIT, err\n");
1400 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1402 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1406 * ata_dev_config - Run device specific handlers and check for
1407 * SATA->PATA bridges
1414 void ata_dev_config(struct ata_port *ap, unsigned int i)
1416 /* limit bridge transfers to udma5, 200 sectors */
1417 if (ata_dev_knobble(ap)) {
1418 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1419 ap->id, ap->device->devno);
1420 ap->udma_mask &= ATA_UDMA5;
1421 ap->host->max_sectors = ATA_MAX_SECTORS;
1422 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1423 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1426 if (ap->ops->dev_config)
1427 ap->ops->dev_config(ap, &ap->device[i]);
1431 * ata_bus_probe - Reset and probe ATA bus
1434 * Master ATA bus probing function. Initiates a hardware-dependent
1435 * bus reset, then attempts to identify any devices found on
1439 * PCI/etc. bus probe sem.
1442 * Zero on success, non-zero on error.
1445 static int ata_bus_probe(struct ata_port *ap)
1447 unsigned int i, found = 0;
1449 ap->ops->phy_reset(ap);
1450 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1453 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1454 ata_dev_identify(ap, i);
1455 if (ata_dev_present(&ap->device[i])) {
1457 ata_dev_config(ap,i);
1461 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1462 goto err_out_disable;
1465 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1466 goto err_out_disable;
1471 ap->ops->port_disable(ap);
1477 * ata_port_probe - Mark port as enabled
1478 * @ap: Port for which we indicate enablement
1480 * Modify @ap data structure such that the system
1481 * thinks that the entire port is enabled.
1483 * LOCKING: host_set lock, or some other form of
1487 void ata_port_probe(struct ata_port *ap)
1489 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1493 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1494 * @ap: SATA port associated with target SATA PHY.
1496 * This function issues commands to standard SATA Sxxx
1497 * PHY registers, to wake up the phy (and device), and
1498 * clear any reset condition.
1501 * PCI/etc. bus probe sem.
1504 void __sata_phy_reset(struct ata_port *ap)
1507 unsigned long timeout = jiffies + (HZ * 5);
1509 if (ap->flags & ATA_FLAG_SATA_RESET) {
1510 /* issue phy wake/reset */
1511 scr_write_flush(ap, SCR_CONTROL, 0x301);
1512 /* Couldn't find anything in SATA I/II specs, but
1513 * AHCI-1.1 10.4.2 says at least 1 ms. */
1516 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1518 /* wait for phy to become ready, if necessary */
1521 sstatus = scr_read(ap, SCR_STATUS);
1522 if ((sstatus & 0xf) != 1)
1524 } while (time_before(jiffies, timeout));
1526 /* TODO: phy layer with polling, timeouts, etc. */
1527 sstatus = scr_read(ap, SCR_STATUS);
1528 if (sata_dev_present(ap)) {
1532 tmp = (sstatus >> 4) & 0xf;
1535 else if (tmp & (1 << 1))
1538 speed = "<unknown>";
1539 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1540 ap->id, speed, sstatus);
1543 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1545 ata_port_disable(ap);
1548 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1551 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1552 ata_port_disable(ap);
1556 ap->cbl = ATA_CBL_SATA;
1560 * sata_phy_reset - Reset SATA bus.
1561 * @ap: SATA port associated with target SATA PHY.
1563 * This function resets the SATA bus, and then probes
1564 * the bus for devices.
1567 * PCI/etc. bus probe sem.
1570 void sata_phy_reset(struct ata_port *ap)
1572 __sata_phy_reset(ap);
1573 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1579 * ata_port_disable - Disable port.
1580 * @ap: Port to be disabled.
1582 * Modify @ap data structure such that the system
1583 * thinks that the entire port is disabled, and should
1584 * never attempt to probe or communicate with devices
1587 * LOCKING: host_set lock, or some other form of
1591 void ata_port_disable(struct ata_port *ap)
1593 ap->device[0].class = ATA_DEV_NONE;
1594 ap->device[1].class = ATA_DEV_NONE;
1595 ap->flags |= ATA_FLAG_PORT_DISABLED;
1599 * This mode timing computation functionality is ported over from
1600 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1603 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1604 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1605 * for PIO 5, which is a nonstandard extension and UDMA6, which
1606 * is currently supported only by Maxtor drives.
1609 static const struct ata_timing ata_timing[] = {
1611 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1612 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1613 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1614 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1616 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1617 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1618 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1620 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1622 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1623 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1624 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1626 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1627 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1628 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1630 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1631 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1632 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1634 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1635 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1636 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1638 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1643 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1644 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1646 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1648 q->setup = EZ(t->setup * 1000, T);
1649 q->act8b = EZ(t->act8b * 1000, T);
1650 q->rec8b = EZ(t->rec8b * 1000, T);
1651 q->cyc8b = EZ(t->cyc8b * 1000, T);
1652 q->active = EZ(t->active * 1000, T);
1653 q->recover = EZ(t->recover * 1000, T);
1654 q->cycle = EZ(t->cycle * 1000, T);
1655 q->udma = EZ(t->udma * 1000, UT);
1658 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1659 struct ata_timing *m, unsigned int what)
1661 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1662 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1663 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1664 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1665 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1666 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1667 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1668 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1671 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1673 const struct ata_timing *t;
1675 for (t = ata_timing; t->mode != speed; t++)
1676 if (t->mode == 0xFF)
1681 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1682 struct ata_timing *t, int T, int UT)
1684 const struct ata_timing *s;
1685 struct ata_timing p;
1691 if (!(s = ata_timing_find_mode(speed)))
1694 memcpy(t, s, sizeof(*s));
1697 * If the drive is an EIDE drive, it can tell us it needs extended
1698 * PIO/MW_DMA cycle timing.
1701 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1702 memset(&p, 0, sizeof(p));
1703 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1704 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1705 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1706 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1707 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1709 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1713 * Convert the timing to bus clock counts.
1716 ata_timing_quantize(t, t, T, UT);
1719 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1720 * and some other commands. We have to ensure that the DMA cycle timing is
1721 * slower/equal than the fastest PIO timing.
1724 if (speed > XFER_PIO_4) {
1725 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1726 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1730 * Lenghten active & recovery time so that cycle time is correct.
1733 if (t->act8b + t->rec8b < t->cyc8b) {
1734 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1735 t->rec8b = t->cyc8b - t->act8b;
1738 if (t->active + t->recover < t->cycle) {
1739 t->active += (t->cycle - (t->active + t->recover)) / 2;
1740 t->recover = t->cycle - t->active;
1746 static const struct {
1749 } xfer_mode_classes[] = {
1750 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1751 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1752 { ATA_SHIFT_PIO, XFER_PIO_0 },
1755 static inline u8 base_from_shift(unsigned int shift)
1759 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1760 if (xfer_mode_classes[i].shift == shift)
1761 return xfer_mode_classes[i].base;
1766 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1771 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1774 if (dev->xfer_shift == ATA_SHIFT_PIO)
1775 dev->flags |= ATA_DFLAG_PIO;
1777 ata_dev_set_xfermode(ap, dev);
1779 base = base_from_shift(dev->xfer_shift);
1780 ofs = dev->xfer_mode - base;
1781 idx = ofs + dev->xfer_shift;
1782 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1784 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1785 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1787 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1788 ap->id, dev->devno, xfer_mode_str[idx]);
1791 static int ata_host_set_pio(struct ata_port *ap)
1797 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1800 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1804 base = base_from_shift(ATA_SHIFT_PIO);
1805 xfer_mode = base + x;
1807 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1808 (int)base, (int)xfer_mode, mask, x);
1810 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1811 struct ata_device *dev = &ap->device[i];
1812 if (ata_dev_present(dev)) {
1813 dev->pio_mode = xfer_mode;
1814 dev->xfer_mode = xfer_mode;
1815 dev->xfer_shift = ATA_SHIFT_PIO;
1816 if (ap->ops->set_piomode)
1817 ap->ops->set_piomode(ap, dev);
1824 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1825 unsigned int xfer_shift)
1829 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1830 struct ata_device *dev = &ap->device[i];
1831 if (ata_dev_present(dev)) {
1832 dev->dma_mode = xfer_mode;
1833 dev->xfer_mode = xfer_mode;
1834 dev->xfer_shift = xfer_shift;
1835 if (ap->ops->set_dmamode)
1836 ap->ops->set_dmamode(ap, dev);
1842 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1843 * @ap: port on which timings will be programmed
1845 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1848 * PCI/etc. bus probe sem.
1851 static void ata_set_mode(struct ata_port *ap)
1853 unsigned int xfer_shift;
1857 /* step 1: always set host PIO timings */
1858 rc = ata_host_set_pio(ap);
1862 /* step 2: choose the best data xfer mode */
1863 xfer_mode = xfer_shift = 0;
1864 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1868 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1869 if (xfer_shift != ATA_SHIFT_PIO)
1870 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1872 /* step 4: update devices' xfer mode */
1873 ata_dev_set_mode(ap, &ap->device[0]);
1874 ata_dev_set_mode(ap, &ap->device[1]);
1876 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1879 if (ap->ops->post_set_mode)
1880 ap->ops->post_set_mode(ap);
1885 ata_port_disable(ap);
1889 * ata_busy_sleep - sleep until BSY clears, or timeout
1890 * @ap: port containing status register to be polled
1891 * @tmout_pat: impatience timeout
1892 * @tmout: overall timeout
1894 * Sleep until ATA Status register bit BSY clears,
1895 * or a timeout occurs.
1901 static unsigned int ata_busy_sleep (struct ata_port *ap,
1902 unsigned long tmout_pat,
1903 unsigned long tmout)
1905 unsigned long timer_start, timeout;
1908 status = ata_busy_wait(ap, ATA_BUSY, 300);
1909 timer_start = jiffies;
1910 timeout = timer_start + tmout_pat;
1911 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1913 status = ata_busy_wait(ap, ATA_BUSY, 3);
1916 if (status & ATA_BUSY)
1917 printk(KERN_WARNING "ata%u is slow to respond, "
1918 "please be patient\n", ap->id);
1920 timeout = timer_start + tmout;
1921 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1923 status = ata_chk_status(ap);
1926 if (status & ATA_BUSY) {
1927 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1928 ap->id, tmout / HZ);
1935 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1937 struct ata_ioports *ioaddr = &ap->ioaddr;
1938 unsigned int dev0 = devmask & (1 << 0);
1939 unsigned int dev1 = devmask & (1 << 1);
1940 unsigned long timeout;
1942 /* if device 0 was found in ata_devchk, wait for its
1946 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1948 /* if device 1 was found in ata_devchk, wait for
1949 * register access, then wait for BSY to clear
1951 timeout = jiffies + ATA_TMOUT_BOOT;
1955 ap->ops->dev_select(ap, 1);
1956 if (ap->flags & ATA_FLAG_MMIO) {
1957 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1958 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1960 nsect = inb(ioaddr->nsect_addr);
1961 lbal = inb(ioaddr->lbal_addr);
1963 if ((nsect == 1) && (lbal == 1))
1965 if (time_after(jiffies, timeout)) {
1969 msleep(50); /* give drive a breather */
1972 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1974 /* is all this really necessary? */
1975 ap->ops->dev_select(ap, 0);
1977 ap->ops->dev_select(ap, 1);
1979 ap->ops->dev_select(ap, 0);
1983 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1984 * @ap: Port to reset and probe
1986 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1987 * probe the bus. Not often used these days.
1990 * PCI/etc. bus probe sem.
1991 * Obtains host_set lock.
1995 static unsigned int ata_bus_edd(struct ata_port *ap)
1997 struct ata_taskfile tf;
1998 unsigned long flags;
2000 /* set up execute-device-diag (bus reset) taskfile */
2001 /* also, take interrupts to a known state (disabled) */
2002 DPRINTK("execute-device-diag\n");
2003 ata_tf_init(ap, &tf, 0);
2005 tf.command = ATA_CMD_EDD;
2006 tf.protocol = ATA_PROT_NODATA;
2009 spin_lock_irqsave(&ap->host_set->lock, flags);
2010 ata_tf_to_host(ap, &tf);
2011 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2013 /* spec says at least 2ms. but who knows with those
2014 * crazy ATAPI devices...
2018 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2021 static unsigned int ata_bus_softreset(struct ata_port *ap,
2022 unsigned int devmask)
2024 struct ata_ioports *ioaddr = &ap->ioaddr;
2026 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2028 /* software reset. causes dev0 to be selected */
2029 if (ap->flags & ATA_FLAG_MMIO) {
2030 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2031 udelay(20); /* FIXME: flush */
2032 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2033 udelay(20); /* FIXME: flush */
2034 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2036 outb(ap->ctl, ioaddr->ctl_addr);
2038 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2040 outb(ap->ctl, ioaddr->ctl_addr);
2043 /* spec mandates ">= 2ms" before checking status.
2044 * We wait 150ms, because that was the magic delay used for
2045 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2046 * between when the ATA command register is written, and then
2047 * status is checked. Because waiting for "a while" before
2048 * checking status is fine, post SRST, we perform this magic
2049 * delay here as well.
2053 ata_bus_post_reset(ap, devmask);
2059 * ata_bus_reset - reset host port and associated ATA channel
2060 * @ap: port to reset
2062 * This is typically the first time we actually start issuing
2063 * commands to the ATA channel. We wait for BSY to clear, then
2064 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2065 * result. Determine what devices, if any, are on the channel
2066 * by looking at the device 0/1 error register. Look at the signature
2067 * stored in each device's taskfile registers, to determine if
2068 * the device is ATA or ATAPI.
2071 * PCI/etc. bus probe sem.
2072 * Obtains host_set lock.
2075 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2078 void ata_bus_reset(struct ata_port *ap)
2080 struct ata_ioports *ioaddr = &ap->ioaddr;
2081 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2083 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2085 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2087 /* determine if device 0/1 are present */
2088 if (ap->flags & ATA_FLAG_SATA_RESET)
2091 dev0 = ata_devchk(ap, 0);
2093 dev1 = ata_devchk(ap, 1);
2097 devmask |= (1 << 0);
2099 devmask |= (1 << 1);
2101 /* select device 0 again */
2102 ap->ops->dev_select(ap, 0);
2104 /* issue bus reset */
2105 if (ap->flags & ATA_FLAG_SRST)
2106 rc = ata_bus_softreset(ap, devmask);
2107 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2108 /* set up device control */
2109 if (ap->flags & ATA_FLAG_MMIO)
2110 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2112 outb(ap->ctl, ioaddr->ctl_addr);
2113 rc = ata_bus_edd(ap);
2120 * determine by signature whether we have ATA or ATAPI devices
2122 err = ata_dev_try_classify(ap, 0);
2123 if ((slave_possible) && (err != 0x81))
2124 ata_dev_try_classify(ap, 1);
2126 /* re-enable interrupts */
2127 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2130 /* is double-select really necessary? */
2131 if (ap->device[1].class != ATA_DEV_NONE)
2132 ap->ops->dev_select(ap, 1);
2133 if (ap->device[0].class != ATA_DEV_NONE)
2134 ap->ops->dev_select(ap, 0);
2136 /* if no devices were detected, disable this port */
2137 if ((ap->device[0].class == ATA_DEV_NONE) &&
2138 (ap->device[1].class == ATA_DEV_NONE))
2141 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2142 /* set up device control for ATA_FLAG_SATA_RESET */
2143 if (ap->flags & ATA_FLAG_MMIO)
2144 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2146 outb(ap->ctl, ioaddr->ctl_addr);
2153 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2154 ap->ops->port_disable(ap);
2159 static void ata_pr_blacklisted(const struct ata_port *ap,
2160 const struct ata_device *dev)
2162 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2163 ap->id, dev->devno);
2166 static const char * const ata_dma_blacklist [] = {
2185 "Toshiba CD-ROM XM-6202B",
2186 "TOSHIBA CD-ROM XM-1702BC",
2188 "E-IDE CD-ROM CR-840",
2191 "SAMSUNG CD-ROM SC-148C",
2192 "SAMSUNG CD-ROM SC",
2194 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2198 static int ata_dma_blacklisted(const struct ata_device *dev)
2200 unsigned char model_num[40];
2205 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2208 len = strnlen(s, sizeof(model_num));
2210 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2211 while ((len > 0) && (s[len - 1] == ' ')) {
2216 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2217 if (!strncmp(ata_dma_blacklist[i], s, len))
2223 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2225 const struct ata_device *master, *slave;
2228 master = &ap->device[0];
2229 slave = &ap->device[1];
2231 assert (ata_dev_present(master) || ata_dev_present(slave));
2233 if (shift == ATA_SHIFT_UDMA) {
2234 mask = ap->udma_mask;
2235 if (ata_dev_present(master)) {
2236 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2237 if (ata_dma_blacklisted(master)) {
2239 ata_pr_blacklisted(ap, master);
2242 if (ata_dev_present(slave)) {
2243 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2244 if (ata_dma_blacklisted(slave)) {
2246 ata_pr_blacklisted(ap, slave);
2250 else if (shift == ATA_SHIFT_MWDMA) {
2251 mask = ap->mwdma_mask;
2252 if (ata_dev_present(master)) {
2253 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2254 if (ata_dma_blacklisted(master)) {
2256 ata_pr_blacklisted(ap, master);
2259 if (ata_dev_present(slave)) {
2260 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2261 if (ata_dma_blacklisted(slave)) {
2263 ata_pr_blacklisted(ap, slave);
2267 else if (shift == ATA_SHIFT_PIO) {
2268 mask = ap->pio_mask;
2269 if (ata_dev_present(master)) {
2270 /* spec doesn't return explicit support for
2271 * PIO0-2, so we fake it
2273 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2278 if (ata_dev_present(slave)) {
2279 /* spec doesn't return explicit support for
2280 * PIO0-2, so we fake it
2282 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2289 mask = 0xffffffff; /* shut up compiler warning */
2296 /* find greatest bit */
2297 static int fgb(u32 bitmap)
2302 for (i = 0; i < 32; i++)
2303 if (bitmap & (1 << i))
2310 * ata_choose_xfer_mode - attempt to find best transfer mode
2311 * @ap: Port for which an xfer mode will be selected
2312 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2313 * @xfer_shift_out: (output) bit shift that selects this mode
2315 * Based on host and device capabilities, determine the
2316 * maximum transfer mode that is amenable to all.
2319 * PCI/etc. bus probe sem.
2322 * Zero on success, negative on error.
2325 static int ata_choose_xfer_mode(const struct ata_port *ap,
2327 unsigned int *xfer_shift_out)
2329 unsigned int mask, shift;
2332 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2333 shift = xfer_mode_classes[i].shift;
2334 mask = ata_get_mode_mask(ap, shift);
2338 *xfer_mode_out = xfer_mode_classes[i].base + x;
2339 *xfer_shift_out = shift;
2348 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2349 * @ap: Port associated with device @dev
2350 * @dev: Device to which command will be sent
2352 * Issue SET FEATURES - XFER MODE command to device @dev
2356 * PCI/etc. bus probe sem.
2359 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2361 struct ata_taskfile tf;
2363 /* set up set-features taskfile */
2364 DPRINTK("set features - xfer mode\n");
2366 ata_tf_init(ap, &tf, dev->devno);
2367 tf.command = ATA_CMD_SET_FEATURES;
2368 tf.feature = SETFEATURES_XFER;
2369 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2370 tf.protocol = ATA_PROT_NODATA;
2371 tf.nsect = dev->xfer_mode;
2373 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2374 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2376 ata_port_disable(ap);
2383 * ata_dev_reread_id - Reread the device identify device info
2384 * @ap: port where the device is
2385 * @dev: device to reread the identify device info
2390 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2392 struct ata_taskfile tf;
2394 ata_tf_init(ap, &tf, dev->devno);
2396 if (dev->class == ATA_DEV_ATA) {
2397 tf.command = ATA_CMD_ID_ATA;
2398 DPRINTK("do ATA identify\n");
2400 tf.command = ATA_CMD_ID_ATAPI;
2401 DPRINTK("do ATAPI identify\n");
2404 tf.flags |= ATA_TFLAG_DEVICE;
2405 tf.protocol = ATA_PROT_PIO;
2407 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2408 dev->id, sizeof(dev->id)))
2411 swap_buf_le16(dev->id, ATA_ID_WORDS);
2419 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
2420 ata_port_disable(ap);
2424 * ata_dev_init_params - Issue INIT DEV PARAMS command
2425 * @ap: Port associated with device @dev
2426 * @dev: Device to which command will be sent
2431 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2433 struct ata_taskfile tf;
2434 u16 sectors = dev->id[6];
2435 u16 heads = dev->id[3];
2437 /* Number of sectors per track 1-255. Number of heads 1-16 */
2438 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2441 /* set up init dev params taskfile */
2442 DPRINTK("init dev params \n");
2444 ata_tf_init(ap, &tf, dev->devno);
2445 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2446 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2447 tf.protocol = ATA_PROT_NODATA;
2449 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2451 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2452 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2454 ata_port_disable(ap);
2461 * ata_sg_clean - Unmap DMA memory associated with command
2462 * @qc: Command containing DMA memory to be released
2464 * Unmap all mapped DMA memory associated with this command.
2467 * spin_lock_irqsave(host_set lock)
2470 static void ata_sg_clean(struct ata_queued_cmd *qc)
2472 struct ata_port *ap = qc->ap;
2473 struct scatterlist *sg = qc->__sg;
2474 int dir = qc->dma_dir;
2475 void *pad_buf = NULL;
2477 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2480 if (qc->flags & ATA_QCFLAG_SINGLE)
2481 assert(qc->n_elem == 1);
2483 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2485 /* if we padded the buffer out to 32-bit bound, and data
2486 * xfer direction is from-device, we must copy from the
2487 * pad buffer back into the supplied buffer
2489 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2490 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2492 if (qc->flags & ATA_QCFLAG_SG) {
2494 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2495 /* restore last sg */
2496 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2498 struct scatterlist *psg = &qc->pad_sgent;
2499 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2500 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2501 kunmap_atomic(addr, KM_IRQ0);
2504 if (sg_dma_len(&sg[0]) > 0)
2505 dma_unmap_single(ap->host_set->dev,
2506 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2509 sg->length += qc->pad_len;
2511 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2512 pad_buf, qc->pad_len);
2515 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2520 * ata_fill_sg - Fill PCI IDE PRD table
2521 * @qc: Metadata associated with taskfile to be transferred
2523 * Fill PCI IDE PRD (scatter-gather) table with segments
2524 * associated with the current disk command.
2527 * spin_lock_irqsave(host_set lock)
2530 static void ata_fill_sg(struct ata_queued_cmd *qc)
2532 struct ata_port *ap = qc->ap;
2533 struct scatterlist *sg;
2536 assert(qc->__sg != NULL);
2537 assert(qc->n_elem > 0);
2540 ata_for_each_sg(sg, qc) {
2544 /* determine if physical DMA addr spans 64K boundary.
2545 * Note h/w doesn't support 64-bit, so we unconditionally
2546 * truncate dma_addr_t to u32.
2548 addr = (u32) sg_dma_address(sg);
2549 sg_len = sg_dma_len(sg);
2552 offset = addr & 0xffff;
2554 if ((offset + sg_len) > 0x10000)
2555 len = 0x10000 - offset;
2557 ap->prd[idx].addr = cpu_to_le32(addr);
2558 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2559 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2568 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2571 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2572 * @qc: Metadata associated with taskfile to check
2574 * Allow low-level driver to filter ATA PACKET commands, returning
2575 * a status indicating whether or not it is OK to use DMA for the
2576 * supplied PACKET command.
2579 * spin_lock_irqsave(host_set lock)
2581 * RETURNS: 0 when ATAPI DMA can be used
2584 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2586 struct ata_port *ap = qc->ap;
2587 int rc = 0; /* Assume ATAPI DMA is OK by default */
2589 if (ap->ops->check_atapi_dma)
2590 rc = ap->ops->check_atapi_dma(qc);
2595 * ata_qc_prep - Prepare taskfile for submission
2596 * @qc: Metadata associated with taskfile to be prepared
2598 * Prepare ATA taskfile for submission.
2601 * spin_lock_irqsave(host_set lock)
2603 void ata_qc_prep(struct ata_queued_cmd *qc)
2605 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2612 * ata_sg_init_one - Associate command with memory buffer
2613 * @qc: Command to be associated
2614 * @buf: Memory buffer
2615 * @buflen: Length of memory buffer, in bytes.
2617 * Initialize the data-related elements of queued_cmd @qc
2618 * to point to a single memory buffer, @buf of byte length @buflen.
2621 * spin_lock_irqsave(host_set lock)
2624 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2626 struct scatterlist *sg;
2628 qc->flags |= ATA_QCFLAG_SINGLE;
2630 memset(&qc->sgent, 0, sizeof(qc->sgent));
2631 qc->__sg = &qc->sgent;
2633 qc->orig_n_elem = 1;
2637 sg_init_one(sg, buf, buflen);
2641 * ata_sg_init - Associate command with scatter-gather table.
2642 * @qc: Command to be associated
2643 * @sg: Scatter-gather table.
2644 * @n_elem: Number of elements in s/g table.
2646 * Initialize the data-related elements of queued_cmd @qc
2647 * to point to a scatter-gather table @sg, containing @n_elem
2651 * spin_lock_irqsave(host_set lock)
2654 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2655 unsigned int n_elem)
2657 qc->flags |= ATA_QCFLAG_SG;
2659 qc->n_elem = n_elem;
2660 qc->orig_n_elem = n_elem;
2664 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2665 * @qc: Command with memory buffer to be mapped.
2667 * DMA-map the memory buffer associated with queued_cmd @qc.
2670 * spin_lock_irqsave(host_set lock)
2673 * Zero on success, negative on error.
2676 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2678 struct ata_port *ap = qc->ap;
2679 int dir = qc->dma_dir;
2680 struct scatterlist *sg = qc->__sg;
2681 dma_addr_t dma_address;
2683 /* we must lengthen transfers to end on a 32-bit boundary */
2684 qc->pad_len = sg->length & 3;
2686 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2687 struct scatterlist *psg = &qc->pad_sgent;
2689 assert(qc->dev->class == ATA_DEV_ATAPI);
2691 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2693 if (qc->tf.flags & ATA_TFLAG_WRITE)
2694 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2697 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2698 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2700 sg->length -= qc->pad_len;
2702 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2703 sg->length, qc->pad_len);
2707 sg_dma_address(sg) = 0;
2711 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2713 if (dma_mapping_error(dma_address)) {
2715 sg->length += qc->pad_len;
2719 sg_dma_address(sg) = dma_address;
2721 sg_dma_len(sg) = sg->length;
2723 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2724 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2730 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2731 * @qc: Command with scatter-gather table to be mapped.
2733 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2736 * spin_lock_irqsave(host_set lock)
2739 * Zero on success, negative on error.
2743 static int ata_sg_setup(struct ata_queued_cmd *qc)
2745 struct ata_port *ap = qc->ap;
2746 struct scatterlist *sg = qc->__sg;
2747 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2748 int n_elem, pre_n_elem, dir, trim_sg = 0;
2750 VPRINTK("ENTER, ata%u\n", ap->id);
2751 assert(qc->flags & ATA_QCFLAG_SG);
2753 /* we must lengthen transfers to end on a 32-bit boundary */
2754 qc->pad_len = lsg->length & 3;
2756 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2757 struct scatterlist *psg = &qc->pad_sgent;
2758 unsigned int offset;
2760 assert(qc->dev->class == ATA_DEV_ATAPI);
2762 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2765 * psg->page/offset are used to copy to-be-written
2766 * data in this function or read data in ata_sg_clean.
2768 offset = lsg->offset + lsg->length - qc->pad_len;
2769 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2770 psg->offset = offset_in_page(offset);
2772 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2773 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2774 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2775 kunmap_atomic(addr, KM_IRQ0);
2778 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2779 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2781 lsg->length -= qc->pad_len;
2782 if (lsg->length == 0)
2785 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2786 qc->n_elem - 1, lsg->length, qc->pad_len);
2789 pre_n_elem = qc->n_elem;
2790 if (trim_sg && pre_n_elem)
2799 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2801 /* restore last sg */
2802 lsg->length += qc->pad_len;
2806 DPRINTK("%d sg elements mapped\n", n_elem);
2809 qc->n_elem = n_elem;
2815 * ata_poll_qc_complete - turn irq back on and finish qc
2816 * @qc: Command to complete
2817 * @err_mask: ATA status register content
2820 * None. (grabs host lock)
2823 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
2825 struct ata_port *ap = qc->ap;
2826 unsigned long flags;
2828 spin_lock_irqsave(&ap->host_set->lock, flags);
2829 ap->flags &= ~ATA_FLAG_NOINTR;
2831 ata_qc_complete(qc);
2832 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2837 * @ap: the target ata_port
2840 * None. (executing in kernel thread context)
2843 * timeout value to use
2846 static unsigned long ata_pio_poll(struct ata_port *ap)
2848 struct ata_queued_cmd *qc;
2850 unsigned int poll_state = HSM_ST_UNKNOWN;
2851 unsigned int reg_state = HSM_ST_UNKNOWN;
2853 qc = ata_qc_from_tag(ap, ap->active_tag);
2856 switch (ap->hsm_task_state) {
2859 poll_state = HSM_ST_POLL;
2863 case HSM_ST_LAST_POLL:
2864 poll_state = HSM_ST_LAST_POLL;
2865 reg_state = HSM_ST_LAST;
2872 status = ata_chk_status(ap);
2873 if (status & ATA_BUSY) {
2874 if (time_after(jiffies, ap->pio_task_timeout)) {
2875 qc->err_mask |= AC_ERR_ATA_BUS;
2876 ap->hsm_task_state = HSM_ST_TMOUT;
2879 ap->hsm_task_state = poll_state;
2880 return ATA_SHORT_PAUSE;
2883 ap->hsm_task_state = reg_state;
2888 * ata_pio_complete - check if drive is busy or idle
2889 * @ap: the target ata_port
2892 * None. (executing in kernel thread context)
2895 * Non-zero if qc completed, zero otherwise.
2898 static int ata_pio_complete (struct ata_port *ap)
2900 struct ata_queued_cmd *qc;
2904 * This is purely heuristic. This is a fast path. Sometimes when
2905 * we enter, BSY will be cleared in a chk-status or two. If not,
2906 * the drive is probably seeking or something. Snooze for a couple
2907 * msecs, then chk-status again. If still busy, fall back to
2908 * HSM_ST_POLL state.
2910 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2911 if (drv_stat & ATA_BUSY) {
2913 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2914 if (drv_stat & ATA_BUSY) {
2915 ap->hsm_task_state = HSM_ST_LAST_POLL;
2916 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2921 qc = ata_qc_from_tag(ap, ap->active_tag);
2924 drv_stat = ata_wait_idle(ap);
2925 if (!ata_ok(drv_stat)) {
2926 qc->err_mask |= __ac_err_mask(drv_stat);
2927 ap->hsm_task_state = HSM_ST_ERR;
2931 ap->hsm_task_state = HSM_ST_IDLE;
2933 assert(qc->err_mask == 0);
2934 ata_poll_qc_complete(qc);
2936 /* another command may start at this point */
2943 * swap_buf_le16 - swap halves of 16-words in place
2944 * @buf: Buffer to swap
2945 * @buf_words: Number of 16-bit words in buffer.
2947 * Swap halves of 16-bit words if needed to convert from
2948 * little-endian byte order to native cpu byte order, or
2952 * Inherited from caller.
2954 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2959 for (i = 0; i < buf_words; i++)
2960 buf[i] = le16_to_cpu(buf[i]);
2961 #endif /* __BIG_ENDIAN */
2965 * ata_mmio_data_xfer - Transfer data by MMIO
2966 * @ap: port to read/write
2968 * @buflen: buffer length
2969 * @write_data: read/write
2971 * Transfer data from/to the device data register by MMIO.
2974 * Inherited from caller.
2977 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2978 unsigned int buflen, int write_data)
2981 unsigned int words = buflen >> 1;
2982 u16 *buf16 = (u16 *) buf;
2983 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2985 /* Transfer multiple of 2 bytes */
2987 for (i = 0; i < words; i++)
2988 writew(le16_to_cpu(buf16[i]), mmio);
2990 for (i = 0; i < words; i++)
2991 buf16[i] = cpu_to_le16(readw(mmio));
2994 /* Transfer trailing 1 byte, if any. */
2995 if (unlikely(buflen & 0x01)) {
2996 u16 align_buf[1] = { 0 };
2997 unsigned char *trailing_buf = buf + buflen - 1;
3000 memcpy(align_buf, trailing_buf, 1);
3001 writew(le16_to_cpu(align_buf[0]), mmio);
3003 align_buf[0] = cpu_to_le16(readw(mmio));
3004 memcpy(trailing_buf, align_buf, 1);
3010 * ata_pio_data_xfer - Transfer data by PIO
3011 * @ap: port to read/write
3013 * @buflen: buffer length
3014 * @write_data: read/write
3016 * Transfer data from/to the device data register by PIO.
3019 * Inherited from caller.
3022 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3023 unsigned int buflen, int write_data)
3025 unsigned int words = buflen >> 1;
3027 /* Transfer multiple of 2 bytes */
3029 outsw(ap->ioaddr.data_addr, buf, words);
3031 insw(ap->ioaddr.data_addr, buf, words);
3033 /* Transfer trailing 1 byte, if any. */
3034 if (unlikely(buflen & 0x01)) {
3035 u16 align_buf[1] = { 0 };
3036 unsigned char *trailing_buf = buf + buflen - 1;
3039 memcpy(align_buf, trailing_buf, 1);
3040 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3042 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3043 memcpy(trailing_buf, align_buf, 1);
3049 * ata_data_xfer - Transfer data from/to the data register.
3050 * @ap: port to read/write
3052 * @buflen: buffer length
3053 * @do_write: read/write
3055 * Transfer data from/to the device data register.
3058 * Inherited from caller.
3061 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3062 unsigned int buflen, int do_write)
3064 if (ap->flags & ATA_FLAG_MMIO)
3065 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3067 ata_pio_data_xfer(ap, buf, buflen, do_write);
3071 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3072 * @qc: Command on going
3074 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3077 * Inherited from caller.
3080 static void ata_pio_sector(struct ata_queued_cmd *qc)
3082 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3083 struct scatterlist *sg = qc->__sg;
3084 struct ata_port *ap = qc->ap;
3086 unsigned int offset;
3089 if (qc->cursect == (qc->nsect - 1))
3090 ap->hsm_task_state = HSM_ST_LAST;
3092 page = sg[qc->cursg].page;
3093 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3095 /* get the current page and offset */
3096 page = nth_page(page, (offset >> PAGE_SHIFT));
3097 offset %= PAGE_SIZE;
3099 buf = kmap(page) + offset;
3104 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3109 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3111 /* do the actual data transfer */
3112 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3113 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3119 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3120 * @qc: Command on going
3121 * @bytes: number of bytes
3123 * Transfer Transfer data from/to the ATAPI device.
3126 * Inherited from caller.
3130 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3132 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3133 struct scatterlist *sg = qc->__sg;
3134 struct ata_port *ap = qc->ap;
3137 unsigned int offset, count;
3139 if (qc->curbytes + bytes >= qc->nbytes)
3140 ap->hsm_task_state = HSM_ST_LAST;
3143 if (unlikely(qc->cursg >= qc->n_elem)) {
3145 * The end of qc->sg is reached and the device expects
3146 * more data to transfer. In order not to overrun qc->sg
3147 * and fulfill length specified in the byte count register,
3148 * - for read case, discard trailing data from the device
3149 * - for write case, padding zero data to the device
3151 u16 pad_buf[1] = { 0 };
3152 unsigned int words = bytes >> 1;
3155 if (words) /* warning if bytes > 1 */
3156 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3159 for (i = 0; i < words; i++)
3160 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3162 ap->hsm_task_state = HSM_ST_LAST;
3166 sg = &qc->__sg[qc->cursg];
3169 offset = sg->offset + qc->cursg_ofs;
3171 /* get the current page and offset */
3172 page = nth_page(page, (offset >> PAGE_SHIFT));
3173 offset %= PAGE_SIZE;
3175 /* don't overrun current sg */
3176 count = min(sg->length - qc->cursg_ofs, bytes);
3178 /* don't cross page boundaries */
3179 count = min(count, (unsigned int)PAGE_SIZE - offset);
3181 buf = kmap(page) + offset;
3184 qc->curbytes += count;
3185 qc->cursg_ofs += count;
3187 if (qc->cursg_ofs == sg->length) {
3192 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3194 /* do the actual data transfer */
3195 ata_data_xfer(ap, buf, count, do_write);
3204 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3205 * @qc: Command on going
3207 * Transfer Transfer data from/to the ATAPI device.
3210 * Inherited from caller.
3213 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3215 struct ata_port *ap = qc->ap;
3216 struct ata_device *dev = qc->dev;
3217 unsigned int ireason, bc_lo, bc_hi, bytes;
3218 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3220 ap->ops->tf_read(ap, &qc->tf);
3221 ireason = qc->tf.nsect;
3222 bc_lo = qc->tf.lbam;
3223 bc_hi = qc->tf.lbah;
3224 bytes = (bc_hi << 8) | bc_lo;
3226 /* shall be cleared to zero, indicating xfer of data */
3227 if (ireason & (1 << 0))
3230 /* make sure transfer direction matches expected */
3231 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3232 if (do_write != i_write)
3235 __atapi_pio_bytes(qc, bytes);
3240 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3241 ap->id, dev->devno);
3242 qc->err_mask |= AC_ERR_ATA_BUS;
3243 ap->hsm_task_state = HSM_ST_ERR;
3247 * ata_pio_block - start PIO on a block
3248 * @ap: the target ata_port
3251 * None. (executing in kernel thread context)
3254 static void ata_pio_block(struct ata_port *ap)
3256 struct ata_queued_cmd *qc;
3260 * This is purely heuristic. This is a fast path.
3261 * Sometimes when we enter, BSY will be cleared in
3262 * a chk-status or two. If not, the drive is probably seeking
3263 * or something. Snooze for a couple msecs, then
3264 * chk-status again. If still busy, fall back to
3265 * HSM_ST_POLL state.
3267 status = ata_busy_wait(ap, ATA_BUSY, 5);
3268 if (status & ATA_BUSY) {
3270 status = ata_busy_wait(ap, ATA_BUSY, 10);
3271 if (status & ATA_BUSY) {
3272 ap->hsm_task_state = HSM_ST_POLL;
3273 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3278 qc = ata_qc_from_tag(ap, ap->active_tag);
3282 if (status & (ATA_ERR | ATA_DF)) {
3283 qc->err_mask |= AC_ERR_DEV;
3284 ap->hsm_task_state = HSM_ST_ERR;
3288 /* transfer data if any */
3289 if (is_atapi_taskfile(&qc->tf)) {
3290 /* DRQ=0 means no more data to transfer */
3291 if ((status & ATA_DRQ) == 0) {
3292 ap->hsm_task_state = HSM_ST_LAST;
3296 atapi_pio_bytes(qc);
3298 /* handle BSY=0, DRQ=0 as error */
3299 if ((status & ATA_DRQ) == 0) {
3300 qc->err_mask |= AC_ERR_ATA_BUS;
3301 ap->hsm_task_state = HSM_ST_ERR;
3309 static void ata_pio_error(struct ata_port *ap)
3311 struct ata_queued_cmd *qc;
3313 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3315 qc = ata_qc_from_tag(ap, ap->active_tag);
3318 /* make sure qc->err_mask is available to
3319 * know what's wrong and recover
3321 assert(qc->err_mask);
3323 ap->hsm_task_state = HSM_ST_IDLE;
3325 ata_poll_qc_complete(qc);
3328 static void ata_pio_task(void *_data)
3330 struct ata_port *ap = _data;
3331 unsigned long timeout;
3338 switch (ap->hsm_task_state) {
3347 qc_completed = ata_pio_complete(ap);
3351 case HSM_ST_LAST_POLL:
3352 timeout = ata_pio_poll(ap);
3362 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3363 else if (!qc_completed)
3368 * ata_qc_timeout - Handle timeout of queued command
3369 * @qc: Command that timed out
3371 * Some part of the kernel (currently, only the SCSI layer)
3372 * has noticed that the active command on port @ap has not
3373 * completed after a specified length of time. Handle this
3374 * condition by disabling DMA (if necessary) and completing
3375 * transactions, with error if necessary.
3377 * This also handles the case of the "lost interrupt", where
3378 * for some reason (possibly hardware bug, possibly driver bug)
3379 * an interrupt was not delivered to the driver, even though the
3380 * transaction completed successfully.
3383 * Inherited from SCSI layer (none, can sleep)
3386 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3388 struct ata_port *ap = qc->ap;
3389 struct ata_host_set *host_set = ap->host_set;
3390 u8 host_stat = 0, drv_stat;
3391 unsigned long flags;
3395 spin_lock_irqsave(&host_set->lock, flags);
3397 /* hack alert! We cannot use the supplied completion
3398 * function from inside the ->eh_strategy_handler() thread.
3399 * libata is the only user of ->eh_strategy_handler() in
3400 * any kernel, so the default scsi_done() assumes it is
3401 * not being called from the SCSI EH.
3403 qc->scsidone = scsi_finish_command;
3405 switch (qc->tf.protocol) {
3408 case ATA_PROT_ATAPI_DMA:
3409 host_stat = ap->ops->bmdma_status(ap);
3411 /* before we do anything else, clear DMA-Start bit */
3412 ap->ops->bmdma_stop(qc);
3418 drv_stat = ata_chk_status(ap);
3420 /* ack bmdma irq events */
3421 ap->ops->irq_clear(ap);
3423 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3424 ap->id, qc->tf.command, drv_stat, host_stat);
3426 /* complete taskfile transaction */
3427 qc->err_mask |= ac_err_mask(drv_stat);
3428 ata_qc_complete(qc);
3432 spin_unlock_irqrestore(&host_set->lock, flags);
3438 * ata_eng_timeout - Handle timeout of queued command
3439 * @ap: Port on which timed-out command is active
3441 * Some part of the kernel (currently, only the SCSI layer)
3442 * has noticed that the active command on port @ap has not
3443 * completed after a specified length of time. Handle this
3444 * condition by disabling DMA (if necessary) and completing
3445 * transactions, with error if necessary.
3447 * This also handles the case of the "lost interrupt", where
3448 * for some reason (possibly hardware bug, possibly driver bug)
3449 * an interrupt was not delivered to the driver, even though the
3450 * transaction completed successfully.
3453 * Inherited from SCSI layer (none, can sleep)
3456 void ata_eng_timeout(struct ata_port *ap)
3458 struct ata_queued_cmd *qc;
3462 qc = ata_qc_from_tag(ap, ap->active_tag);
3466 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3476 * ata_qc_new - Request an available ATA command, for queueing
3477 * @ap: Port associated with device @dev
3478 * @dev: Device from whom we request an available command structure
3484 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3486 struct ata_queued_cmd *qc = NULL;
3489 for (i = 0; i < ATA_MAX_QUEUE; i++)
3490 if (!test_and_set_bit(i, &ap->qactive)) {
3491 qc = ata_qc_from_tag(ap, i);
3502 * ata_qc_new_init - Request an available ATA command, and initialize it
3503 * @ap: Port associated with device @dev
3504 * @dev: Device from whom we request an available command structure
3510 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3511 struct ata_device *dev)
3513 struct ata_queued_cmd *qc;
3515 qc = ata_qc_new(ap);
3527 int ata_qc_complete_noop(struct ata_queued_cmd *qc)
3532 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3534 struct ata_port *ap = qc->ap;
3535 unsigned int tag, do_clear = 0;
3539 if (likely(ata_tag_valid(tag))) {
3540 if (tag == ap->active_tag)
3541 ap->active_tag = ATA_TAG_POISON;
3542 qc->tag = ATA_TAG_POISON;
3547 struct completion *waiting = qc->waiting;
3552 if (likely(do_clear))
3553 clear_bit(tag, &ap->qactive);
3557 * ata_qc_free - free unused ata_queued_cmd
3558 * @qc: Command to complete
3560 * Designed to free unused ata_queued_cmd object
3561 * in case something prevents using it.
3564 * spin_lock_irqsave(host_set lock)
3566 void ata_qc_free(struct ata_queued_cmd *qc)
3568 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3569 assert(qc->waiting == NULL); /* nothing should be waiting */
3571 __ata_qc_complete(qc);
3575 * ata_qc_complete - Complete an active ATA command
3576 * @qc: Command to complete
3577 * @err_mask: ATA Status register contents
3579 * Indicate to the mid and upper layers that an ATA
3580 * command has completed, with either an ok or not-ok status.
3583 * spin_lock_irqsave(host_set lock)
3586 void ata_qc_complete(struct ata_queued_cmd *qc)
3590 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3591 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3593 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3596 /* atapi: mark qc as inactive to prevent the interrupt handler
3597 * from completing the command twice later, before the error handler
3598 * is called. (when rc != 0 and atapi request sense is needed)
3600 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3602 /* call completion callback */
3603 rc = qc->complete_fn(qc);
3605 /* if callback indicates not to complete command (non-zero),
3606 * return immediately
3611 __ata_qc_complete(qc);
3616 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3618 struct ata_port *ap = qc->ap;
3620 switch (qc->tf.protocol) {
3622 case ATA_PROT_ATAPI_DMA:
3625 case ATA_PROT_ATAPI:
3627 case ATA_PROT_PIO_MULT:
3628 if (ap->flags & ATA_FLAG_PIO_DMA)
3641 * ata_qc_issue - issue taskfile to device
3642 * @qc: command to issue to device
3644 * Prepare an ATA command to submission to device.
3645 * This includes mapping the data into a DMA-able
3646 * area, filling in the S/G table, and finally
3647 * writing the taskfile to hardware, starting the command.
3650 * spin_lock_irqsave(host_set lock)
3653 * Zero on success, negative on error.
3656 int ata_qc_issue(struct ata_queued_cmd *qc)
3658 struct ata_port *ap = qc->ap;
3660 if (ata_should_dma_map(qc)) {
3661 if (qc->flags & ATA_QCFLAG_SG) {
3662 if (ata_sg_setup(qc))
3664 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3665 if (ata_sg_setup_one(qc))
3669 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3672 ap->ops->qc_prep(qc);
3674 qc->ap->active_tag = qc->tag;
3675 qc->flags |= ATA_QCFLAG_ACTIVE;
3677 return ap->ops->qc_issue(qc);
3685 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3686 * @qc: command to issue to device
3688 * Using various libata functions and hooks, this function
3689 * starts an ATA command. ATA commands are grouped into
3690 * classes called "protocols", and issuing each type of protocol
3691 * is slightly different.
3693 * May be used as the qc_issue() entry in ata_port_operations.
3696 * spin_lock_irqsave(host_set lock)
3699 * Zero on success, negative on error.
3702 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3704 struct ata_port *ap = qc->ap;
3706 ata_dev_select(ap, qc->dev->devno, 1, 0);
3708 switch (qc->tf.protocol) {
3709 case ATA_PROT_NODATA:
3710 ata_tf_to_host(ap, &qc->tf);
3714 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3715 ap->ops->bmdma_setup(qc); /* set up bmdma */
3716 ap->ops->bmdma_start(qc); /* initiate bmdma */
3719 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3720 ata_qc_set_polling(qc);
3721 ata_tf_to_host(ap, &qc->tf);
3722 ap->hsm_task_state = HSM_ST;
3723 queue_work(ata_wq, &ap->pio_task);
3726 case ATA_PROT_ATAPI:
3727 ata_qc_set_polling(qc);
3728 ata_tf_to_host(ap, &qc->tf);
3729 queue_work(ata_wq, &ap->packet_task);
3732 case ATA_PROT_ATAPI_NODATA:
3733 ap->flags |= ATA_FLAG_NOINTR;
3734 ata_tf_to_host(ap, &qc->tf);
3735 queue_work(ata_wq, &ap->packet_task);
3738 case ATA_PROT_ATAPI_DMA:
3739 ap->flags |= ATA_FLAG_NOINTR;
3740 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3741 ap->ops->bmdma_setup(qc); /* set up bmdma */
3742 queue_work(ata_wq, &ap->packet_task);
3754 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3755 * @qc: Info associated with this ATA transaction.
3758 * spin_lock_irqsave(host_set lock)
3761 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3763 struct ata_port *ap = qc->ap;
3764 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3766 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3768 /* load PRD table addr. */
3769 mb(); /* make sure PRD table writes are visible to controller */
3770 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3772 /* specify data direction, triple-check start bit is clear */
3773 dmactl = readb(mmio + ATA_DMA_CMD);
3774 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3776 dmactl |= ATA_DMA_WR;
3777 writeb(dmactl, mmio + ATA_DMA_CMD);
3779 /* issue r/w command */
3780 ap->ops->exec_command(ap, &qc->tf);
3784 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3785 * @qc: Info associated with this ATA transaction.
3788 * spin_lock_irqsave(host_set lock)
3791 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3793 struct ata_port *ap = qc->ap;
3794 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3797 /* start host DMA transaction */
3798 dmactl = readb(mmio + ATA_DMA_CMD);
3799 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3801 /* Strictly, one may wish to issue a readb() here, to
3802 * flush the mmio write. However, control also passes
3803 * to the hardware at this point, and it will interrupt
3804 * us when we are to resume control. So, in effect,
3805 * we don't care when the mmio write flushes.
3806 * Further, a read of the DMA status register _immediately_
3807 * following the write may not be what certain flaky hardware
3808 * is expected, so I think it is best to not add a readb()
3809 * without first all the MMIO ATA cards/mobos.
3810 * Or maybe I'm just being paranoid.
3815 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3816 * @qc: Info associated with this ATA transaction.
3819 * spin_lock_irqsave(host_set lock)
3822 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3824 struct ata_port *ap = qc->ap;
3825 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3828 /* load PRD table addr. */
3829 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3831 /* specify data direction, triple-check start bit is clear */
3832 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3833 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3835 dmactl |= ATA_DMA_WR;
3836 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3838 /* issue r/w command */
3839 ap->ops->exec_command(ap, &qc->tf);
3843 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3844 * @qc: Info associated with this ATA transaction.
3847 * spin_lock_irqsave(host_set lock)
3850 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3852 struct ata_port *ap = qc->ap;
3855 /* start host DMA transaction */
3856 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3857 outb(dmactl | ATA_DMA_START,
3858 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3863 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3864 * @qc: Info associated with this ATA transaction.
3866 * Writes the ATA_DMA_START flag to the DMA command register.
3868 * May be used as the bmdma_start() entry in ata_port_operations.
3871 * spin_lock_irqsave(host_set lock)
3873 void ata_bmdma_start(struct ata_queued_cmd *qc)
3875 if (qc->ap->flags & ATA_FLAG_MMIO)
3876 ata_bmdma_start_mmio(qc);
3878 ata_bmdma_start_pio(qc);
3883 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3884 * @qc: Info associated with this ATA transaction.
3886 * Writes address of PRD table to device's PRD Table Address
3887 * register, sets the DMA control register, and calls
3888 * ops->exec_command() to start the transfer.
3890 * May be used as the bmdma_setup() entry in ata_port_operations.
3893 * spin_lock_irqsave(host_set lock)
3895 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3897 if (qc->ap->flags & ATA_FLAG_MMIO)
3898 ata_bmdma_setup_mmio(qc);
3900 ata_bmdma_setup_pio(qc);
3905 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3906 * @ap: Port associated with this ATA transaction.
3908 * Clear interrupt and error flags in DMA status register.
3910 * May be used as the irq_clear() entry in ata_port_operations.
3913 * spin_lock_irqsave(host_set lock)
3916 void ata_bmdma_irq_clear(struct ata_port *ap)
3918 if (ap->flags & ATA_FLAG_MMIO) {
3919 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3920 writeb(readb(mmio), mmio);
3922 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3923 outb(inb(addr), addr);
3930 * ata_bmdma_status - Read PCI IDE BMDMA status
3931 * @ap: Port associated with this ATA transaction.
3933 * Read and return BMDMA status register.
3935 * May be used as the bmdma_status() entry in ata_port_operations.
3938 * spin_lock_irqsave(host_set lock)
3941 u8 ata_bmdma_status(struct ata_port *ap)
3944 if (ap->flags & ATA_FLAG_MMIO) {
3945 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3946 host_stat = readb(mmio + ATA_DMA_STATUS);
3948 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3954 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3955 * @qc: Command we are ending DMA for
3957 * Clears the ATA_DMA_START flag in the dma control register
3959 * May be used as the bmdma_stop() entry in ata_port_operations.
3962 * spin_lock_irqsave(host_set lock)
3965 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3967 struct ata_port *ap = qc->ap;
3968 if (ap->flags & ATA_FLAG_MMIO) {
3969 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3971 /* clear start/stop bit */
3972 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3973 mmio + ATA_DMA_CMD);
3975 /* clear start/stop bit */
3976 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3977 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3980 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3981 ata_altstatus(ap); /* dummy read */
3985 * ata_host_intr - Handle host interrupt for given (port, task)
3986 * @ap: Port on which interrupt arrived (possibly...)
3987 * @qc: Taskfile currently active in engine
3989 * Handle host interrupt for given queued command. Currently,
3990 * only DMA interrupts are handled. All other commands are
3991 * handled via polling with interrupts disabled (nIEN bit).
3994 * spin_lock_irqsave(host_set lock)
3997 * One if interrupt was handled, zero if not (shared irq).
4000 inline unsigned int ata_host_intr (struct ata_port *ap,
4001 struct ata_queued_cmd *qc)
4003 u8 status, host_stat;
4005 switch (qc->tf.protocol) {
4008 case ATA_PROT_ATAPI_DMA:
4009 case ATA_PROT_ATAPI:
4010 /* check status of DMA engine */
4011 host_stat = ap->ops->bmdma_status(ap);
4012 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4014 /* if it's not our irq... */
4015 if (!(host_stat & ATA_DMA_INTR))
4018 /* before we do anything else, clear DMA-Start bit */
4019 ap->ops->bmdma_stop(qc);
4023 case ATA_PROT_ATAPI_NODATA:
4024 case ATA_PROT_NODATA:
4025 /* check altstatus */
4026 status = ata_altstatus(ap);
4027 if (status & ATA_BUSY)
4030 /* check main status, clearing INTRQ */
4031 status = ata_chk_status(ap);
4032 if (unlikely(status & ATA_BUSY))
4034 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4035 ap->id, qc->tf.protocol, status);
4037 /* ack bmdma irq events */
4038 ap->ops->irq_clear(ap);
4040 /* complete taskfile transaction */
4041 qc->err_mask |= ac_err_mask(status);
4042 ata_qc_complete(qc);
4049 return 1; /* irq handled */
4052 ap->stats.idle_irq++;
4055 if ((ap->stats.idle_irq % 1000) == 0) {
4057 ata_irq_ack(ap, 0); /* debug trap */
4058 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4061 return 0; /* irq not handled */
4065 * ata_interrupt - Default ATA host interrupt handler
4066 * @irq: irq line (unused)
4067 * @dev_instance: pointer to our ata_host_set information structure
4070 * Default interrupt handler for PCI IDE devices. Calls
4071 * ata_host_intr() for each port that is not disabled.
4074 * Obtains host_set lock during operation.
4077 * IRQ_NONE or IRQ_HANDLED.
4080 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4082 struct ata_host_set *host_set = dev_instance;
4084 unsigned int handled = 0;
4085 unsigned long flags;
4087 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4088 spin_lock_irqsave(&host_set->lock, flags);
4090 for (i = 0; i < host_set->n_ports; i++) {
4091 struct ata_port *ap;
4093 ap = host_set->ports[i];
4095 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4096 struct ata_queued_cmd *qc;
4098 qc = ata_qc_from_tag(ap, ap->active_tag);
4099 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4100 (qc->flags & ATA_QCFLAG_ACTIVE))
4101 handled |= ata_host_intr(ap, qc);
4105 spin_unlock_irqrestore(&host_set->lock, flags);
4107 return IRQ_RETVAL(handled);
4111 * atapi_packet_task - Write CDB bytes to hardware
4112 * @_data: Port to which ATAPI device is attached.
4114 * When device has indicated its readiness to accept
4115 * a CDB, this function is called. Send the CDB.
4116 * If DMA is to be performed, exit immediately.
4117 * Otherwise, we are in polling mode, so poll
4118 * status under operation succeeds or fails.
4121 * Kernel thread context (may sleep)
4124 static void atapi_packet_task(void *_data)
4126 struct ata_port *ap = _data;
4127 struct ata_queued_cmd *qc;
4130 qc = ata_qc_from_tag(ap, ap->active_tag);
4132 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4134 /* sleep-wait for BSY to clear */
4135 DPRINTK("busy wait\n");
4136 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
4137 qc->err_mask |= AC_ERR_ATA_BUS;
4141 /* make sure DRQ is set */
4142 status = ata_chk_status(ap);
4143 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
4144 qc->err_mask |= AC_ERR_ATA_BUS;
4149 DPRINTK("send cdb\n");
4150 assert(ap->cdb_len >= 12);
4152 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4153 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4154 unsigned long flags;
4156 /* Once we're done issuing command and kicking bmdma,
4157 * irq handler takes over. To not lose irq, we need
4158 * to clear NOINTR flag before sending cdb, but
4159 * interrupt handler shouldn't be invoked before we're
4160 * finished. Hence, the following locking.
4162 spin_lock_irqsave(&ap->host_set->lock, flags);
4163 ap->flags &= ~ATA_FLAG_NOINTR;
4164 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4165 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4166 ap->ops->bmdma_start(qc); /* initiate bmdma */
4167 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4169 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4171 /* PIO commands are handled by polling */
4172 ap->hsm_task_state = HSM_ST;
4173 queue_work(ata_wq, &ap->pio_task);
4179 ata_poll_qc_complete(qc);
4184 * ata_port_start - Set port up for dma.
4185 * @ap: Port to initialize
4187 * Called just after data structures for each port are
4188 * initialized. Allocates space for PRD table.
4190 * May be used as the port_start() entry in ata_port_operations.
4193 * Inherited from caller.
4196 int ata_port_start (struct ata_port *ap)
4198 struct device *dev = ap->host_set->dev;
4201 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4205 rc = ata_pad_alloc(ap, dev);
4207 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4211 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4218 * ata_port_stop - Undo ata_port_start()
4219 * @ap: Port to shut down
4221 * Frees the PRD table.
4223 * May be used as the port_stop() entry in ata_port_operations.
4226 * Inherited from caller.
4229 void ata_port_stop (struct ata_port *ap)
4231 struct device *dev = ap->host_set->dev;
4233 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4234 ata_pad_free(ap, dev);
4237 void ata_host_stop (struct ata_host_set *host_set)
4239 if (host_set->mmio_base)
4240 iounmap(host_set->mmio_base);
4245 * ata_host_remove - Unregister SCSI host structure with upper layers
4246 * @ap: Port to unregister
4247 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4250 * Inherited from caller.
4253 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4255 struct Scsi_Host *sh = ap->host;
4260 scsi_remove_host(sh);
4262 ap->ops->port_stop(ap);
4266 * ata_host_init - Initialize an ata_port structure
4267 * @ap: Structure to initialize
4268 * @host: associated SCSI mid-layer structure
4269 * @host_set: Collection of hosts to which @ap belongs
4270 * @ent: Probe information provided by low-level driver
4271 * @port_no: Port number associated with this ata_port
4273 * Initialize a new ata_port structure, and its associated
4277 * Inherited from caller.
4280 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4281 struct ata_host_set *host_set,
4282 const struct ata_probe_ent *ent, unsigned int port_no)
4288 host->max_channel = 1;
4289 host->unique_id = ata_unique_id++;
4290 host->max_cmd_len = 12;
4292 ap->flags = ATA_FLAG_PORT_DISABLED;
4293 ap->id = host->unique_id;
4295 ap->ctl = ATA_DEVCTL_OBS;
4296 ap->host_set = host_set;
4297 ap->port_no = port_no;
4299 ent->legacy_mode ? ent->hard_port_no : port_no;
4300 ap->pio_mask = ent->pio_mask;
4301 ap->mwdma_mask = ent->mwdma_mask;
4302 ap->udma_mask = ent->udma_mask;
4303 ap->flags |= ent->host_flags;
4304 ap->ops = ent->port_ops;
4305 ap->cbl = ATA_CBL_NONE;
4306 ap->active_tag = ATA_TAG_POISON;
4307 ap->last_ctl = 0xFF;
4309 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4310 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4312 for (i = 0; i < ATA_MAX_DEVICES; i++)
4313 ap->device[i].devno = i;
4316 ap->stats.unhandled_irq = 1;
4317 ap->stats.idle_irq = 1;
4320 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4324 * ata_host_add - Attach low-level ATA driver to system
4325 * @ent: Information provided by low-level driver
4326 * @host_set: Collections of ports to which we add
4327 * @port_no: Port number associated with this host
4329 * Attach low-level ATA driver to system.
4332 * PCI/etc. bus probe sem.
4335 * New ata_port on success, for NULL on error.
4338 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4339 struct ata_host_set *host_set,
4340 unsigned int port_no)
4342 struct Scsi_Host *host;
4343 struct ata_port *ap;
4347 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4351 ap = (struct ata_port *) &host->hostdata[0];
4353 ata_host_init(ap, host, host_set, ent, port_no);
4355 rc = ap->ops->port_start(ap);
4362 scsi_host_put(host);
4367 * ata_device_add - Register hardware device with ATA and SCSI layers
4368 * @ent: Probe information describing hardware device to be registered
4370 * This function processes the information provided in the probe
4371 * information struct @ent, allocates the necessary ATA and SCSI
4372 * host information structures, initializes them, and registers
4373 * everything with requisite kernel subsystems.
4375 * This function requests irqs, probes the ATA bus, and probes
4379 * PCI/etc. bus probe sem.
4382 * Number of ports registered. Zero on error (no ports registered).
4385 int ata_device_add(const struct ata_probe_ent *ent)
4387 unsigned int count = 0, i;
4388 struct device *dev = ent->dev;
4389 struct ata_host_set *host_set;
4392 /* alloc a container for our list of ATA ports (buses) */
4393 host_set = kzalloc(sizeof(struct ata_host_set) +
4394 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4397 spin_lock_init(&host_set->lock);
4399 host_set->dev = dev;
4400 host_set->n_ports = ent->n_ports;
4401 host_set->irq = ent->irq;
4402 host_set->mmio_base = ent->mmio_base;
4403 host_set->private_data = ent->private_data;
4404 host_set->ops = ent->port_ops;
4406 /* register each port bound to this device */
4407 for (i = 0; i < ent->n_ports; i++) {
4408 struct ata_port *ap;
4409 unsigned long xfer_mode_mask;
4411 ap = ata_host_add(ent, host_set, i);
4415 host_set->ports[i] = ap;
4416 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4417 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4418 (ap->pio_mask << ATA_SHIFT_PIO);
4420 /* print per-port info to dmesg */
4421 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4422 "bmdma 0x%lX irq %lu\n",
4424 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4425 ata_mode_string(xfer_mode_mask),
4426 ap->ioaddr.cmd_addr,
4427 ap->ioaddr.ctl_addr,
4428 ap->ioaddr.bmdma_addr,
4432 host_set->ops->irq_clear(ap);
4439 /* obtain irq, that is shared between channels */
4440 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4441 DRV_NAME, host_set))
4444 /* perform each probe synchronously */
4445 DPRINTK("probe begin\n");
4446 for (i = 0; i < count; i++) {
4447 struct ata_port *ap;
4450 ap = host_set->ports[i];
4452 DPRINTK("ata%u: probe begin\n", ap->id);
4453 rc = ata_bus_probe(ap);
4454 DPRINTK("ata%u: probe end\n", ap->id);
4457 /* FIXME: do something useful here?
4458 * Current libata behavior will
4459 * tear down everything when
4460 * the module is removed
4461 * or the h/w is unplugged.
4465 rc = scsi_add_host(ap->host, dev);
4467 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4469 /* FIXME: do something useful here */
4470 /* FIXME: handle unconditional calls to
4471 * scsi_scan_host and ata_host_remove, below,
4477 /* probes are done, now scan each port's disk(s) */
4478 DPRINTK("probe begin\n");
4479 for (i = 0; i < count; i++) {
4480 struct ata_port *ap = host_set->ports[i];
4482 ata_scsi_scan_host(ap);
4485 dev_set_drvdata(dev, host_set);
4487 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4488 return ent->n_ports; /* success */
4491 for (i = 0; i < count; i++) {
4492 ata_host_remove(host_set->ports[i], 1);
4493 scsi_host_put(host_set->ports[i]->host);
4497 VPRINTK("EXIT, returning 0\n");
4502 * ata_host_set_remove - PCI layer callback for device removal
4503 * @host_set: ATA host set that was removed
4505 * Unregister all objects associated with this host set. Free those
4509 * Inherited from calling layer (may sleep).
4512 void ata_host_set_remove(struct ata_host_set *host_set)
4514 struct ata_port *ap;
4517 for (i = 0; i < host_set->n_ports; i++) {
4518 ap = host_set->ports[i];
4519 scsi_remove_host(ap->host);
4522 free_irq(host_set->irq, host_set);
4524 for (i = 0; i < host_set->n_ports; i++) {
4525 ap = host_set->ports[i];
4527 ata_scsi_release(ap->host);
4529 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4530 struct ata_ioports *ioaddr = &ap->ioaddr;
4532 if (ioaddr->cmd_addr == 0x1f0)
4533 release_region(0x1f0, 8);
4534 else if (ioaddr->cmd_addr == 0x170)
4535 release_region(0x170, 8);
4538 scsi_host_put(ap->host);
4541 if (host_set->ops->host_stop)
4542 host_set->ops->host_stop(host_set);
4548 * ata_scsi_release - SCSI layer callback hook for host unload
4549 * @host: libata host to be unloaded
4551 * Performs all duties necessary to shut down a libata port...
4552 * Kill port kthread, disable port, and release resources.
4555 * Inherited from SCSI layer.
4561 int ata_scsi_release(struct Scsi_Host *host)
4563 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4567 ap->ops->port_disable(ap);
4568 ata_host_remove(ap, 0);
4575 * ata_std_ports - initialize ioaddr with standard port offsets.
4576 * @ioaddr: IO address structure to be initialized
4578 * Utility function which initializes data_addr, error_addr,
4579 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4580 * device_addr, status_addr, and command_addr to standard offsets
4581 * relative to cmd_addr.
4583 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4586 void ata_std_ports(struct ata_ioports *ioaddr)
4588 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4589 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4590 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4591 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4592 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4593 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4594 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4595 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4596 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4597 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4600 static struct ata_probe_ent *
4601 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4603 struct ata_probe_ent *probe_ent;
4605 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4607 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4608 kobject_name(&(dev->kobj)));
4612 INIT_LIST_HEAD(&probe_ent->node);
4613 probe_ent->dev = dev;
4615 probe_ent->sht = port->sht;
4616 probe_ent->host_flags = port->host_flags;
4617 probe_ent->pio_mask = port->pio_mask;
4618 probe_ent->mwdma_mask = port->mwdma_mask;
4619 probe_ent->udma_mask = port->udma_mask;
4620 probe_ent->port_ops = port->port_ops;
4629 void ata_pci_host_stop (struct ata_host_set *host_set)
4631 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4633 pci_iounmap(pdev, host_set->mmio_base);
4637 * ata_pci_init_native_mode - Initialize native-mode driver
4638 * @pdev: pci device to be initialized
4639 * @port: array[2] of pointers to port info structures.
4640 * @ports: bitmap of ports present
4642 * Utility function which allocates and initializes an
4643 * ata_probe_ent structure for a standard dual-port
4644 * PIO-based IDE controller. The returned ata_probe_ent
4645 * structure can be passed to ata_device_add(). The returned
4646 * ata_probe_ent structure should then be freed with kfree().
4648 * The caller need only pass the address of the primary port, the
4649 * secondary will be deduced automatically. If the device has non
4650 * standard secondary port mappings this function can be called twice,
4651 * once for each interface.
4654 struct ata_probe_ent *
4655 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4657 struct ata_probe_ent *probe_ent =
4658 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4664 probe_ent->irq = pdev->irq;
4665 probe_ent->irq_flags = SA_SHIRQ;
4666 probe_ent->private_data = port[0]->private_data;
4668 if (ports & ATA_PORT_PRIMARY) {
4669 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4670 probe_ent->port[p].altstatus_addr =
4671 probe_ent->port[p].ctl_addr =
4672 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4673 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4674 ata_std_ports(&probe_ent->port[p]);
4678 if (ports & ATA_PORT_SECONDARY) {
4679 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4680 probe_ent->port[p].altstatus_addr =
4681 probe_ent->port[p].ctl_addr =
4682 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4683 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4684 ata_std_ports(&probe_ent->port[p]);
4688 probe_ent->n_ports = p;
4692 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
4694 struct ata_probe_ent *probe_ent;
4696 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
4700 probe_ent->legacy_mode = 1;
4701 probe_ent->n_ports = 1;
4702 probe_ent->hard_port_no = port_num;
4703 probe_ent->private_data = port->private_data;
4708 probe_ent->irq = 14;
4709 probe_ent->port[0].cmd_addr = 0x1f0;
4710 probe_ent->port[0].altstatus_addr =
4711 probe_ent->port[0].ctl_addr = 0x3f6;
4714 probe_ent->irq = 15;
4715 probe_ent->port[0].cmd_addr = 0x170;
4716 probe_ent->port[0].altstatus_addr =
4717 probe_ent->port[0].ctl_addr = 0x376;
4720 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4721 ata_std_ports(&probe_ent->port[0]);
4726 * ata_pci_init_one - Initialize/register PCI IDE host controller
4727 * @pdev: Controller to be initialized
4728 * @port_info: Information from low-level host driver
4729 * @n_ports: Number of ports attached to host controller
4731 * This is a helper function which can be called from a driver's
4732 * xxx_init_one() probe function if the hardware uses traditional
4733 * IDE taskfile registers.
4735 * This function calls pci_enable_device(), reserves its register
4736 * regions, sets the dma mask, enables bus master mode, and calls
4740 * Inherited from PCI layer (may sleep).
4743 * Zero on success, negative on errno-based value on error.
4746 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4747 unsigned int n_ports)
4749 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4750 struct ata_port_info *port[2];
4752 unsigned int legacy_mode = 0;
4753 int disable_dev_on_err = 1;
4758 port[0] = port_info[0];
4760 port[1] = port_info[1];
4764 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4765 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4766 /* TODO: What if one channel is in native mode ... */
4767 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4768 mask = (1 << 2) | (1 << 0);
4769 if ((tmp8 & mask) != mask)
4770 legacy_mode = (1 << 3);
4774 if ((!legacy_mode) && (n_ports > 2)) {
4775 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4780 /* FIXME: Really for ATA it isn't safe because the device may be
4781 multi-purpose and we want to leave it alone if it was already
4782 enabled. Secondly for shared use as Arjan says we want refcounting
4784 Checking dev->is_enabled is insufficient as this is not set at
4785 boot for the primary video which is BIOS enabled
4788 rc = pci_enable_device(pdev);
4792 rc = pci_request_regions(pdev, DRV_NAME);
4794 disable_dev_on_err = 0;
4798 /* FIXME: Should use platform specific mappers for legacy port ranges */
4800 if (!request_region(0x1f0, 8, "libata")) {
4801 struct resource *conflict, res;
4803 res.end = 0x1f0 + 8 - 1;
4804 conflict = ____request_resource(&ioport_resource, &res);
4805 if (!strcmp(conflict->name, "libata"))
4806 legacy_mode |= (1 << 0);
4808 disable_dev_on_err = 0;
4809 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4812 legacy_mode |= (1 << 0);
4814 if (!request_region(0x170, 8, "libata")) {
4815 struct resource *conflict, res;
4817 res.end = 0x170 + 8 - 1;
4818 conflict = ____request_resource(&ioport_resource, &res);
4819 if (!strcmp(conflict->name, "libata"))
4820 legacy_mode |= (1 << 1);
4822 disable_dev_on_err = 0;
4823 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4826 legacy_mode |= (1 << 1);
4829 /* we have legacy mode, but all ports are unavailable */
4830 if (legacy_mode == (1 << 3)) {
4832 goto err_out_regions;
4835 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4837 goto err_out_regions;
4838 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4840 goto err_out_regions;
4843 if (legacy_mode & (1 << 0))
4844 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
4845 if (legacy_mode & (1 << 1))
4846 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
4849 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4851 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4853 if (!probe_ent && !probe_ent2) {
4855 goto err_out_regions;
4858 pci_set_master(pdev);
4860 /* FIXME: check ata_device_add return */
4862 if (legacy_mode & (1 << 0))
4863 ata_device_add(probe_ent);
4864 if (legacy_mode & (1 << 1))
4865 ata_device_add(probe_ent2);
4867 ata_device_add(probe_ent);
4875 if (legacy_mode & (1 << 0))
4876 release_region(0x1f0, 8);
4877 if (legacy_mode & (1 << 1))
4878 release_region(0x170, 8);
4879 pci_release_regions(pdev);
4881 if (disable_dev_on_err)
4882 pci_disable_device(pdev);
4887 * ata_pci_remove_one - PCI layer callback for device removal
4888 * @pdev: PCI device that was removed
4890 * PCI layer indicates to libata via this hook that
4891 * hot-unplug or module unload event has occurred.
4892 * Handle this by unregistering all objects associated
4893 * with this PCI device. Free those objects. Then finally
4894 * release PCI resources and disable device.
4897 * Inherited from PCI layer (may sleep).
4900 void ata_pci_remove_one (struct pci_dev *pdev)
4902 struct device *dev = pci_dev_to_dev(pdev);
4903 struct ata_host_set *host_set = dev_get_drvdata(dev);
4905 ata_host_set_remove(host_set);
4906 pci_release_regions(pdev);
4907 pci_disable_device(pdev);
4908 dev_set_drvdata(dev, NULL);
4911 /* move to PCI subsystem */
4912 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4914 unsigned long tmp = 0;
4916 switch (bits->width) {
4919 pci_read_config_byte(pdev, bits->reg, &tmp8);
4925 pci_read_config_word(pdev, bits->reg, &tmp16);
4931 pci_read_config_dword(pdev, bits->reg, &tmp32);
4942 return (tmp == bits->val) ? 1 : 0;
4944 #endif /* CONFIG_PCI */
4947 static int __init ata_init(void)
4949 ata_wq = create_workqueue("ata");
4953 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4957 static void __exit ata_exit(void)
4959 destroy_workqueue(ata_wq);
4962 module_init(ata_init);
4963 module_exit(ata_exit);
4965 static unsigned long ratelimit_time;
4966 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4968 int ata_ratelimit(void)
4971 unsigned long flags;
4973 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4975 if (time_after(jiffies, ratelimit_time)) {
4977 ratelimit_time = jiffies + (HZ/5);
4981 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4987 * libata is essentially a library of internal helper functions for
4988 * low-level ATA host controller drivers. As such, the API/ABI is
4989 * likely to change as new drivers are added and updated.
4990 * Do not depend on ABI/API stability.
4993 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4994 EXPORT_SYMBOL_GPL(ata_std_ports);
4995 EXPORT_SYMBOL_GPL(ata_device_add);
4996 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4997 EXPORT_SYMBOL_GPL(ata_sg_init);
4998 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4999 EXPORT_SYMBOL_GPL(ata_qc_complete);
5000 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5001 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5002 EXPORT_SYMBOL_GPL(ata_tf_load);
5003 EXPORT_SYMBOL_GPL(ata_tf_read);
5004 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5005 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5006 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5007 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5008 EXPORT_SYMBOL_GPL(ata_check_status);
5009 EXPORT_SYMBOL_GPL(ata_altstatus);
5010 EXPORT_SYMBOL_GPL(ata_exec_command);
5011 EXPORT_SYMBOL_GPL(ata_port_start);
5012 EXPORT_SYMBOL_GPL(ata_port_stop);
5013 EXPORT_SYMBOL_GPL(ata_host_stop);
5014 EXPORT_SYMBOL_GPL(ata_interrupt);
5015 EXPORT_SYMBOL_GPL(ata_qc_prep);
5016 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5017 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5018 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5019 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5020 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5021 EXPORT_SYMBOL_GPL(ata_port_probe);
5022 EXPORT_SYMBOL_GPL(sata_phy_reset);
5023 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5024 EXPORT_SYMBOL_GPL(ata_bus_reset);
5025 EXPORT_SYMBOL_GPL(ata_port_disable);
5026 EXPORT_SYMBOL_GPL(ata_ratelimit);
5027 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5028 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5029 EXPORT_SYMBOL_GPL(ata_scsi_error);
5030 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5031 EXPORT_SYMBOL_GPL(ata_scsi_release);
5032 EXPORT_SYMBOL_GPL(ata_host_intr);
5033 EXPORT_SYMBOL_GPL(ata_dev_classify);
5034 EXPORT_SYMBOL_GPL(ata_dev_id_string);
5035 EXPORT_SYMBOL_GPL(ata_dev_config);
5036 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5038 EXPORT_SYMBOL_GPL(ata_timing_compute);
5039 EXPORT_SYMBOL_GPL(ata_timing_merge);
5042 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5043 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5044 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5045 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5046 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5047 #endif /* CONFIG_PCI */