2 * Copyright (c) 2000-2010 LSI Corporation.
6 * Title: MPI Message independent structures and definitions
7 * including System Interface Register Set and
8 * scatter/gather formats.
9 * Creation Date: June 21, 2006
11 * mpi2.h Version: 02.00.16
16 * Date Version Description
17 * -------- -------- ------------------------------------------------------
18 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
19 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
20 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
21 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
22 * Moved ReplyPostHostIndex register to offset 0x6C of the
23 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for
24 * MPI2_REPLY_POST_HOST_INDEX_OFFSET.
25 * Added union of request descriptors.
26 * Added union of reply descriptors.
27 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
28 * Added define for MPI2_VERSION_02_00.
29 * Fixed the size of the FunctionDependent5 field in the
30 * MPI2_DEFAULT_REPLY structure.
31 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
32 * Removed the MPI-defined Fault Codes and extended the
33 * product specific codes up to 0xEFFF.
34 * Added a sixth key value for the WriteSequence register
35 * and changed the flush value to 0x0.
36 * Added message function codes for Diagnostic Buffer Post
37 * and Diagnsotic Release.
38 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
39 * Moved MPI2_VERSION_UNION from mpi2_ioc.h.
40 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
41 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
42 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
43 * Added #defines for marking a reply descriptor as unused.
44 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
45 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
46 * Moved LUN field defines from mpi2_init.h.
47 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
48 * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
49 * In all request and reply descriptors, replaced VF_ID
50 * field with MSIxIndex field.
51 * Removed DevHandle field from
52 * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
54 * Added RAID Accelerator functionality.
55 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
56 * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
57 * Added MSI-x index mask and shift for Reply Post Host
59 * Added function code for Host Based Discovery Action.
60 * 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT.
61 * Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
62 * Added defines for product-specific range of message
63 * function codes, 0xF0 to 0xFF.
64 * 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT.
65 * Added alternative defines for the SGE Direction bit.
66 * --------------------------------------------------------------------------
73 /*****************************************************************************
75 * MPI Version Definitions
77 *****************************************************************************/
79 #define MPI2_VERSION_MAJOR (0x02)
80 #define MPI2_VERSION_MINOR (0x00)
81 #define MPI2_VERSION_MAJOR_MASK (0xFF00)
82 #define MPI2_VERSION_MAJOR_SHIFT (8)
83 #define MPI2_VERSION_MINOR_MASK (0x00FF)
84 #define MPI2_VERSION_MINOR_SHIFT (0)
85 #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
88 #define MPI2_VERSION_02_00 (0x0200)
90 /* versioning for this MPI header set */
91 #define MPI2_HEADER_VERSION_UNIT (0x10)
92 #define MPI2_HEADER_VERSION_DEV (0x00)
93 #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
94 #define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
95 #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
96 #define MPI2_HEADER_VERSION_DEV_SHIFT (0)
97 #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
100 /*****************************************************************************
102 * IOC State Definitions
104 *****************************************************************************/
106 #define MPI2_IOC_STATE_RESET (0x00000000)
107 #define MPI2_IOC_STATE_READY (0x10000000)
108 #define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
109 #define MPI2_IOC_STATE_FAULT (0x40000000)
111 #define MPI2_IOC_STATE_MASK (0xF0000000)
112 #define MPI2_IOC_STATE_SHIFT (28)
114 /* Fault state range for prodcut specific codes */
115 #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
116 #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
119 /*****************************************************************************
121 * System Interface Register Definitions
123 *****************************************************************************/
125 typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
127 U32 Doorbell; /* 0x00 */
128 U32 WriteSequence; /* 0x04 */
129 U32 HostDiagnostic; /* 0x08 */
130 U32 Reserved1; /* 0x0C */
131 U32 DiagRWData; /* 0x10 */
132 U32 DiagRWAddressLow; /* 0x14 */
133 U32 DiagRWAddressHigh; /* 0x18 */
134 U32 Reserved2[5]; /* 0x1C */
135 U32 HostInterruptStatus; /* 0x30 */
136 U32 HostInterruptMask; /* 0x34 */
137 U32 DCRData; /* 0x38 */
138 U32 DCRAddress; /* 0x3C */
139 U32 Reserved3[2]; /* 0x40 */
140 U32 ReplyFreeHostIndex; /* 0x48 */
141 U32 Reserved4[8]; /* 0x4C */
142 U32 ReplyPostHostIndex; /* 0x6C */
143 U32 Reserved5; /* 0x70 */
144 U32 HCBSize; /* 0x74 */
145 U32 HCBAddressLow; /* 0x78 */
146 U32 HCBAddressHigh; /* 0x7C */
147 U32 Reserved6[16]; /* 0x80 */
148 U32 RequestDescriptorPostLow; /* 0xC0 */
149 U32 RequestDescriptorPostHigh; /* 0xC4 */
150 U32 Reserved7[14]; /* 0xC8 */
151 } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
152 Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
155 * Defines for working with the Doorbell register.
157 #define MPI2_DOORBELL_OFFSET (0x00000000)
159 /* IOC --> System values */
160 #define MPI2_DOORBELL_USED (0x08000000)
161 #define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
162 #define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
163 #define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
164 #define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
166 /* System --> IOC values */
167 #define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
168 #define MPI2_DOORBELL_FUNCTION_SHIFT (24)
169 #define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
170 #define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
174 * Defines for the WriteSequence register
176 #define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
177 #define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
178 #define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
179 #define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
180 #define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
181 #define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
182 #define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
183 #define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
184 #define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
187 * Defines for the HostDiagnostic register
189 #define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
191 #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
192 #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
193 #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
195 #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
196 #define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
197 #define MPI2_DIAG_HCB_MODE (0x00000100)
198 #define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
199 #define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
200 #define MPI2_DIAG_RESET_HISTORY (0x00000020)
201 #define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
202 #define MPI2_DIAG_RESET_ADAPTER (0x00000004)
203 #define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
206 * Offsets for DiagRWData and address
208 #define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
209 #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
210 #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
213 * Defines for the HostInterruptStatus register
215 #define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
216 #define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
217 #define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
218 #define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
219 #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
220 #define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
221 #define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
224 * Defines for the HostInterruptMask register
226 #define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
227 #define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
228 #define MPI2_HIM_REPLY_INT_MASK (0x00000008)
229 #define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
230 #define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
231 #define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
234 * Offsets for DCRData and address
236 #define MPI2_DCR_DATA_OFFSET (0x00000038)
237 #define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
240 * Offset for the Reply Free Queue
242 #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
245 * Defines for the Reply Descriptor Post Queue
247 #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
248 #define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF)
249 #define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000)
250 #define MPI2_RPHI_MSIX_INDEX_SHIFT (24)
253 * Defines for the HCBSize and address
255 #define MPI2_HCB_SIZE_OFFSET (0x00000074)
256 #define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
257 #define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
259 #define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
260 #define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
263 * Offsets for the Request Queue
265 #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
266 #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
269 /*****************************************************************************
271 * Message Descriptors
273 *****************************************************************************/
275 /* Request Descriptors */
277 /* Default Request Descriptor */
278 typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
280 U8 RequestFlags; /* 0x00 */
281 U8 MSIxIndex; /* 0x01 */
284 U16 DescriptorTypeDependent; /* 0x06 */
285 } MPI2_DEFAULT_REQUEST_DESCRIPTOR,
286 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
287 Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
289 /* defines for the RequestFlags field */
290 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
291 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
292 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
293 #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
294 #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
295 #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A)
297 #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
300 /* High Priority Request Descriptor */
301 typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
303 U8 RequestFlags; /* 0x00 */
304 U8 MSIxIndex; /* 0x01 */
307 U16 Reserved1; /* 0x06 */
308 } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
309 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
310 Mpi2HighPriorityRequestDescriptor_t,
311 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
314 /* SCSI IO Request Descriptor */
315 typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
317 U8 RequestFlags; /* 0x00 */
318 U8 MSIxIndex; /* 0x01 */
321 U16 DevHandle; /* 0x06 */
322 } MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
323 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
324 Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t;
327 /* SCSI Target Request Descriptor */
328 typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
330 U8 RequestFlags; /* 0x00 */
331 U8 MSIxIndex; /* 0x01 */
334 U16 IoIndex; /* 0x06 */
335 } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
336 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
337 Mpi2SCSITargetRequestDescriptor_t,
338 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
341 /* RAID Accelerator Request Descriptor */
342 typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR {
343 U8 RequestFlags; /* 0x00 */
344 U8 MSIxIndex; /* 0x01 */
347 U16 Reserved; /* 0x06 */
348 } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
349 MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
350 Mpi2RAIDAcceleratorRequestDescriptor_t,
351 MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
354 /* union of Request Descriptors */
355 typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
357 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
358 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
359 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
360 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
361 MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
363 } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
364 Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
367 /* Reply Descriptors */
369 /* Default Reply Descriptor */
370 typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
372 U8 ReplyFlags; /* 0x00 */
373 U8 MSIxIndex; /* 0x01 */
374 U16 DescriptorTypeDependent1; /* 0x02 */
375 U32 DescriptorTypeDependent2; /* 0x04 */
376 } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
377 Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
379 /* defines for the ReplyFlags field */
380 #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
381 #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
382 #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
383 #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
384 #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
385 #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05)
386 #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
388 /* values for marking a reply descriptor as unused */
389 #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
390 #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
392 /* Address Reply Descriptor */
393 typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
395 U8 ReplyFlags; /* 0x00 */
396 U8 MSIxIndex; /* 0x01 */
398 U32 ReplyFrameAddress; /* 0x04 */
399 } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
400 Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
402 #define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
405 /* SCSI IO Success Reply Descriptor */
406 typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
408 U8 ReplyFlags; /* 0x00 */
409 U8 MSIxIndex; /* 0x01 */
411 U16 TaskTag; /* 0x04 */
412 U16 Reserved1; /* 0x06 */
413 } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
414 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
415 Mpi2SCSIIOSuccessReplyDescriptor_t,
416 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t;
419 /* TargetAssist Success Reply Descriptor */
420 typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
422 U8 ReplyFlags; /* 0x00 */
423 U8 MSIxIndex; /* 0x01 */
425 U8 SequenceNumber; /* 0x04 */
426 U8 Reserved1; /* 0x05 */
427 U16 IoIndex; /* 0x06 */
428 } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
429 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
430 Mpi2TargetAssistSuccessReplyDescriptor_t,
431 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t;
434 /* Target Command Buffer Reply Descriptor */
435 typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
437 U8 ReplyFlags; /* 0x00 */
438 U8 MSIxIndex; /* 0x01 */
441 U16 InitiatorDevHandle; /* 0x04 */
442 U16 IoIndex; /* 0x06 */
443 } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
444 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
445 Mpi2TargetCommandBufferReplyDescriptor_t,
446 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
448 /* defines for Flags field */
449 #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
452 /* RAID Accelerator Success Reply Descriptor */
453 typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR {
454 U8 ReplyFlags; /* 0x00 */
455 U8 MSIxIndex; /* 0x01 */
457 U32 Reserved; /* 0x04 */
458 } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
459 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
460 Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
461 MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
464 /* union of Reply Descriptors */
465 typedef union _MPI2_REPLY_DESCRIPTORS_UNION
467 MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
468 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
469 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
470 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
471 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
472 MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess;
474 } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
475 Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
479 /*****************************************************************************
483 *****************************************************************************/
485 #define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
486 #define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */
487 #define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
488 #define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */
489 #define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */
490 #define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */
491 #define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */
492 #define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */
493 #define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */
494 #define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */
495 #define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */
496 #define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */
497 #define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */
498 #define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */
499 #define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */
500 #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */
501 #define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
502 #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
503 #define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
504 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
505 #define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
506 #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
507 #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
508 #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
509 #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
510 #define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator*/
511 /* Host Based Discovery Action */
512 #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F)
513 /* Power Management Control */
514 #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30)
515 /* beginning of product-specific range */
516 #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0)
517 /* end of product-specific range */
518 #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF)
523 /* Doorbell functions */
524 #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
525 #define MPI2_FUNCTION_HANDSHAKE (0x42)
528 /*****************************************************************************
532 *****************************************************************************/
534 /* mask for IOCStatus status value */
535 #define MPI2_IOCSTATUS_MASK (0x7FFF)
537 /****************************************************************************
538 * Common IOCStatus values for all replies
539 ****************************************************************************/
541 #define MPI2_IOCSTATUS_SUCCESS (0x0000)
542 #define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
543 #define MPI2_IOCSTATUS_BUSY (0x0002)
544 #define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
545 #define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
546 #define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
547 #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
548 #define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
549 #define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
550 #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
552 /****************************************************************************
553 * Config IOCStatus values
554 ****************************************************************************/
556 #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
557 #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
558 #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
559 #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
560 #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
561 #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
563 /****************************************************************************
565 ****************************************************************************/
567 #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
568 #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
569 #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
570 #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
571 #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
572 #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
573 #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
574 #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
575 #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
576 #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
577 #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
578 #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
580 /****************************************************************************
581 * For use by SCSI Initiator and SCSI Target end-to-end data protection
582 ****************************************************************************/
584 #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
585 #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
586 #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
588 /****************************************************************************
590 ****************************************************************************/
592 #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
593 #define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
594 #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
595 #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
596 #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
597 #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
598 #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
599 #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
600 #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
601 #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
603 /****************************************************************************
604 * Serial Attached SCSI values
605 ****************************************************************************/
607 #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
608 #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
610 /****************************************************************************
611 * Diagnostic Buffer Post / Diagnostic Release values
612 ****************************************************************************/
614 #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
616 /****************************************************************************
617 * RAID Accelerator values
618 ****************************************************************************/
620 #define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0)
622 /****************************************************************************
623 * IOCStatus flag to indicate that log info is available
624 ****************************************************************************/
626 #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
628 /****************************************************************************
630 ****************************************************************************/
632 #define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
633 #define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
634 #define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
635 #define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
636 #define MPI2_IOCLOGINFO_TYPE_FC (0x2)
637 #define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
638 #define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
639 #define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
642 /*****************************************************************************
644 * Standard Message Structures
646 *****************************************************************************/
648 /****************************************************************************
649 * Request Message Header for all request messages
650 ****************************************************************************/
652 typedef struct _MPI2_REQUEST_HEADER
654 U16 FunctionDependent1; /* 0x00 */
655 U8 ChainOffset; /* 0x02 */
656 U8 Function; /* 0x03 */
657 U16 FunctionDependent2; /* 0x04 */
658 U8 FunctionDependent3; /* 0x06 */
659 U8 MsgFlags; /* 0x07 */
662 U16 Reserved1; /* 0x0A */
663 } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER,
664 MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t;
667 /****************************************************************************
669 ****************************************************************************/
671 typedef struct _MPI2_DEFAULT_REPLY
673 U16 FunctionDependent1; /* 0x00 */
674 U8 MsgLength; /* 0x02 */
675 U8 Function; /* 0x03 */
676 U16 FunctionDependent2; /* 0x04 */
677 U8 FunctionDependent3; /* 0x06 */
678 U8 MsgFlags; /* 0x07 */
681 U16 Reserved1; /* 0x0A */
682 U16 FunctionDependent5; /* 0x0C */
683 U16 IOCStatus; /* 0x0E */
684 U32 IOCLogInfo; /* 0x10 */
685 } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY,
686 MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t;
689 /* common version structure/union used in messages and configuration pages */
691 typedef struct _MPI2_VERSION_STRUCT
697 } MPI2_VERSION_STRUCT;
699 typedef union _MPI2_VERSION_UNION
701 MPI2_VERSION_STRUCT Struct;
703 } MPI2_VERSION_UNION;
706 /* LUN field defines, common to many structures */
707 #define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
708 #define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
709 #define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
710 #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
711 #define MPI2_LUN_LEVEL_1_WORD (0xFF00)
712 #define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
715 /*****************************************************************************
717 * Fusion-MPT MPI Scatter Gather Elements
719 *****************************************************************************/
721 /****************************************************************************
722 * MPI Simple Element structures
723 ****************************************************************************/
725 typedef struct _MPI2_SGE_SIMPLE32
729 } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32,
730 Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t;
732 typedef struct _MPI2_SGE_SIMPLE64
736 } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
737 Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
739 typedef struct _MPI2_SGE_SIMPLE_UNION
747 } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
748 Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
751 /****************************************************************************
752 * MPI Chain Element structures
753 ****************************************************************************/
755 typedef struct _MPI2_SGE_CHAIN32
761 } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
762 Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
764 typedef struct _MPI2_SGE_CHAIN64
770 } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
771 Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
773 typedef struct _MPI2_SGE_CHAIN_UNION
783 } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
784 Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
787 /****************************************************************************
788 * MPI Transaction Context Element structures
789 ****************************************************************************/
791 typedef struct _MPI2_SGE_TRANSACTION32
797 U32 TransactionContext[1];
798 U32 TransactionDetails[1];
799 } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
800 Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
802 typedef struct _MPI2_SGE_TRANSACTION64
808 U32 TransactionContext[2];
809 U32 TransactionDetails[1];
810 } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64,
811 Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t;
813 typedef struct _MPI2_SGE_TRANSACTION96
819 U32 TransactionContext[3];
820 U32 TransactionDetails[1];
821 } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96,
822 Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t;
824 typedef struct _MPI2_SGE_TRANSACTION128
830 U32 TransactionContext[4];
831 U32 TransactionDetails[1];
832 } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128,
833 Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128;
835 typedef struct _MPI2_SGE_TRANSACTION_UNION
843 U32 TransactionContext32[1];
844 U32 TransactionContext64[2];
845 U32 TransactionContext96[3];
846 U32 TransactionContext128[4];
848 U32 TransactionDetails[1];
849 } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
850 Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
853 /****************************************************************************
854 * MPI SGE union for IO SGL's
855 ****************************************************************************/
857 typedef struct _MPI2_MPI_SGE_IO_UNION
861 MPI2_SGE_SIMPLE_UNION Simple;
862 MPI2_SGE_CHAIN_UNION Chain;
864 } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
865 Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
868 /****************************************************************************
869 * MPI SGE union for SGL's with Simple and Transaction elements
870 ****************************************************************************/
872 typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
876 MPI2_SGE_SIMPLE_UNION Simple;
877 MPI2_SGE_TRANSACTION_UNION Transaction;
879 } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
880 Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
883 /****************************************************************************
884 * All MPI SGE types union
885 ****************************************************************************/
887 typedef struct _MPI2_MPI_SGE_UNION
891 MPI2_SGE_SIMPLE_UNION Simple;
892 MPI2_SGE_CHAIN_UNION Chain;
893 MPI2_SGE_TRANSACTION_UNION Transaction;
895 } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION,
896 Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t;
899 /****************************************************************************
900 * MPI SGE field definition and masks
901 ****************************************************************************/
903 /* Flags field bit definitions */
905 #define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
906 #define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
907 #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
908 #define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
909 #define MPI2_SGE_FLAGS_DIRECTION (0x04)
910 #define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
911 #define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
913 #define MPI2_SGE_FLAGS_SHIFT (24)
915 #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
916 #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
920 #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
921 #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
922 #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30)
923 #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
925 /* Address location */
927 #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
931 #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
932 #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
934 #define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST)
935 #define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC)
939 #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
940 #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
944 #define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
945 #define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
946 #define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
947 #define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
949 #define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
950 #define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
952 /****************************************************************************
953 * MPI SGE operation Macros
954 ****************************************************************************/
956 /* SIMPLE FlagsLength manipulations... */
957 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
958 #define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
959 #define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
960 #define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
962 #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
964 #define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
965 #define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
966 #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
968 /* CAUTION - The following are READ-MODIFY-WRITE! */
969 #define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
970 #define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
972 #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
975 /*****************************************************************************
977 * Fusion-MPT IEEE Scatter Gather Elements
979 *****************************************************************************/
981 /****************************************************************************
982 * IEEE Simple Element structures
983 ****************************************************************************/
985 typedef struct _MPI2_IEEE_SGE_SIMPLE32
989 } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
990 Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
992 typedef struct _MPI2_IEEE_SGE_SIMPLE64
999 } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
1000 Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
1002 typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
1004 MPI2_IEEE_SGE_SIMPLE32 Simple32;
1005 MPI2_IEEE_SGE_SIMPLE64 Simple64;
1006 } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
1007 Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
1010 /****************************************************************************
1011 * IEEE Chain Element structures
1012 ****************************************************************************/
1014 typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32;
1016 typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64;
1018 typedef union _MPI2_IEEE_SGE_CHAIN_UNION
1020 MPI2_IEEE_SGE_CHAIN32 Chain32;
1021 MPI2_IEEE_SGE_CHAIN64 Chain64;
1022 } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
1023 Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
1026 /****************************************************************************
1027 * All IEEE SGE types union
1028 ****************************************************************************/
1030 typedef struct _MPI2_IEEE_SGE_UNION
1034 MPI2_IEEE_SGE_SIMPLE_UNION Simple;
1035 MPI2_IEEE_SGE_CHAIN_UNION Chain;
1037 } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
1038 Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
1041 /****************************************************************************
1042 * IEEE SGE field definitions and masks
1043 ****************************************************************************/
1045 /* Flags field bit definitions */
1047 #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
1049 #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
1051 #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
1055 #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
1056 #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
1058 /* Data Location Address Space */
1060 #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
1061 #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
1062 #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
1063 #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
1064 #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
1067 /****************************************************************************
1068 * IEEE SGE operation Macros
1069 ****************************************************************************/
1071 /* SIMPLE FlagsLength manipulations... */
1072 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1073 #define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1074 #define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1076 #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1078 #define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1079 #define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1080 #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1082 /* CAUTION - The following are READ-MODIFY-WRITE! */
1083 #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1084 #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
1089 /*****************************************************************************
1091 * Fusion-MPT MPI/IEEE Scatter Gather Unions
1093 *****************************************************************************/
1095 typedef union _MPI2_SIMPLE_SGE_UNION
1097 MPI2_SGE_SIMPLE_UNION MpiSimple;
1098 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1099 } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION,
1100 Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t;
1103 typedef union _MPI2_SGE_IO_UNION
1105 MPI2_SGE_SIMPLE_UNION MpiSimple;
1106 MPI2_SGE_CHAIN_UNION MpiChain;
1107 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1108 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
1109 } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION,
1110 Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t;
1113 /****************************************************************************
1115 * Values for SGLFlags field, used in many request messages with an SGL
1117 ****************************************************************************/
1119 /* values for MPI SGL Data Location Address Space subfield */
1120 #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
1121 #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
1122 #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
1123 #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
1124 #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
1125 /* values for SGL Type subfield */
1126 #define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
1127 #define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
1128 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01)
1129 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)