2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
13 static struct mb_cmd_name {
17 {MBC_GET_PORT_DATABASE, "GPDB"},
18 {MBC_GET_ID_LIST, "GIDList"},
19 {MBC_GET_LINK_PRIV_STATS, "Stats"},
22 static const char *mb_to_str(uint16_t cmd)
25 struct mb_cmd_name *e;
27 for (i = 0; i < ARRAY_SIZE(mb_str); i++) {
35 static struct rom_cmd {
39 { MBC_EXECUTE_FIRMWARE },
40 { MBC_READ_RAM_WORD },
41 { MBC_MAILBOX_REGISTER_TEST },
42 { MBC_VERIFY_CHECKSUM },
43 { MBC_GET_FIRMWARE_VERSION },
44 { MBC_LOAD_RISC_RAM },
45 { MBC_DUMP_RISC_RAM },
46 { MBC_LOAD_RISC_RAM_EXTENDED },
47 { MBC_DUMP_RISC_RAM_EXTENDED },
48 { MBC_WRITE_RAM_WORD_EXTENDED },
49 { MBC_READ_RAM_EXTENDED },
50 { MBC_GET_RESOURCE_COUNTS },
51 { MBC_SET_FIRMWARE_OPTION },
52 { MBC_MID_INITIALIZE_FIRMWARE },
53 { MBC_GET_FIRMWARE_STATE },
54 { MBC_GET_MEM_OFFLOAD_CNTRL_STAT },
55 { MBC_GET_RETRY_COUNT },
56 { MBC_TRACE_CONTROL },
59 static int is_rom_cmd(uint16_t cmd)
64 for (i = 0; i < ARRAY_SIZE(rom_cmds); i++) {
74 * qla2x00_mailbox_command
75 * Issue mailbox command and waits for completion.
78 * ha = adapter block pointer.
79 * mcp = driver internal mbx struct pointer.
82 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
85 * 0 : QLA_SUCCESS = cmd performed success
86 * 1 : QLA_FUNCTION_FAILED (error encountered)
87 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
93 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
96 unsigned long flags = 0;
100 uint16_t command = 0;
102 uint16_t __iomem *optr;
105 uint16_t __iomem *mbx_reg;
106 unsigned long wait_time;
107 struct qla_hw_data *ha = vha->hw;
108 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
111 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
113 if (ha->pdev->error_state > pci_channel_io_frozen) {
114 ql_log(ql_log_warn, vha, 0x1001,
115 "error_state is greater than pci_channel_io_frozen, "
117 return QLA_FUNCTION_TIMEOUT;
120 if (vha->device_flags & DFLG_DEV_FAILED) {
121 ql_log(ql_log_warn, vha, 0x1002,
122 "Device in failed state, exiting.\n");
123 return QLA_FUNCTION_TIMEOUT;
126 /* if PCI error, then avoid mbx processing.*/
127 if (test_bit(PCI_ERR, &base_vha->dpc_flags)) {
128 ql_log(ql_log_warn, vha, 0x1191,
129 "PCI error, exiting.\n");
130 return QLA_FUNCTION_TIMEOUT;
134 io_lock_on = base_vha->flags.init_done;
137 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
140 if (ha->flags.pci_channel_io_perm_failure) {
141 ql_log(ql_log_warn, vha, 0x1003,
142 "Perm failure on EEH timeout MBX, exiting.\n");
143 return QLA_FUNCTION_TIMEOUT;
146 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
147 /* Setting Link-Down error */
148 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
149 ql_log(ql_log_warn, vha, 0x1004,
150 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
151 return QLA_FUNCTION_TIMEOUT;
154 /* check if ISP abort is active and return cmd with timeout */
155 if ((test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
156 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
157 test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) &&
158 !is_rom_cmd(mcp->mb[0])) {
159 ql_log(ql_log_info, vha, 0x1005,
160 "Cmd 0x%x aborted with timeout since ISP Abort is pending\n",
162 return QLA_FUNCTION_TIMEOUT;
166 * Wait for active mailbox commands to finish by waiting at most tov
167 * seconds. This is to serialize actual issuing of mailbox cmds during
168 * non ISP abort time.
170 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
171 /* Timeout occurred. Return error. */
172 ql_log(ql_log_warn, vha, 0x1005,
173 "Cmd access timeout, cmd=0x%x, Exiting.\n",
175 return QLA_FUNCTION_TIMEOUT;
178 ha->flags.mbox_busy = 1;
179 /* Save mailbox command for debug */
182 ql_dbg(ql_dbg_mbx, vha, 0x1006,
183 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
185 spin_lock_irqsave(&ha->hardware_lock, flags);
187 /* Load mailbox registers. */
189 optr = (uint16_t __iomem *)®->isp82.mailbox_in[0];
190 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
191 optr = (uint16_t __iomem *)®->isp24.mailbox0;
193 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0);
196 command = mcp->mb[0];
197 mboxes = mcp->out_mb;
199 ql_dbg(ql_dbg_mbx, vha, 0x1111,
200 "Mailbox registers (OUT):\n");
201 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
202 if (IS_QLA2200(ha) && cnt == 8)
204 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8);
205 if (mboxes & BIT_0) {
206 ql_dbg(ql_dbg_mbx, vha, 0x1112,
207 "mbox[%d]<-0x%04x\n", cnt, *iptr);
208 WRT_REG_WORD(optr, *iptr);
216 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
217 "I/O Address = %p.\n", optr);
219 /* Issue set host interrupt command to send cmd out. */
220 ha->flags.mbox_int = 0;
221 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
223 /* Unlock mbx registers and wait for interrupt */
224 ql_dbg(ql_dbg_mbx, vha, 0x100f,
225 "Going to unlock irq & waiting for interrupts. "
226 "jiffies=%lx.\n", jiffies);
228 /* Wait for mbx cmd completion until timeout */
230 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
231 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
233 if (IS_P3P_TYPE(ha)) {
234 if (RD_REG_DWORD(®->isp82.hint) &
235 HINT_MBX_INT_PENDING) {
236 spin_unlock_irqrestore(&ha->hardware_lock,
238 ha->flags.mbox_busy = 0;
239 ql_dbg(ql_dbg_mbx, vha, 0x1010,
240 "Pending mailbox timeout, exiting.\n");
241 rval = QLA_FUNCTION_TIMEOUT;
244 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
245 } else if (IS_FWI2_CAPABLE(ha))
246 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
248 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
249 spin_unlock_irqrestore(&ha->hardware_lock, flags);
252 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
254 ql_dbg(ql_dbg_mbx, vha, 0x117a,
255 "cmd=%x Timeout.\n", command);
256 spin_lock_irqsave(&ha->hardware_lock, flags);
257 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
258 spin_unlock_irqrestore(&ha->hardware_lock, flags);
260 if (time_after(jiffies, wait_time + 5 * HZ))
261 ql_log(ql_log_warn, vha, 0x1015, "cmd=0x%x, waited %d msecs\n",
262 command, jiffies_to_msecs(jiffies - wait_time));
264 ql_dbg(ql_dbg_mbx, vha, 0x1011,
265 "Cmd=%x Polling Mode.\n", command);
267 if (IS_P3P_TYPE(ha)) {
268 if (RD_REG_DWORD(®->isp82.hint) &
269 HINT_MBX_INT_PENDING) {
270 spin_unlock_irqrestore(&ha->hardware_lock,
272 ha->flags.mbox_busy = 0;
273 ql_dbg(ql_dbg_mbx, vha, 0x1012,
274 "Pending mailbox timeout, exiting.\n");
275 rval = QLA_FUNCTION_TIMEOUT;
278 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
279 } else if (IS_FWI2_CAPABLE(ha))
280 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
282 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
283 spin_unlock_irqrestore(&ha->hardware_lock, flags);
285 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
286 while (!ha->flags.mbox_int) {
287 if (time_after(jiffies, wait_time))
290 /* Check for pending interrupts. */
291 qla2x00_poll(ha->rsp_q_map[0]);
293 if (!ha->flags.mbox_int &&
295 command == MBC_LOAD_RISC_RAM_EXTENDED))
298 ql_dbg(ql_dbg_mbx, vha, 0x1013,
300 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
303 /* Check whether we timed out */
304 if (ha->flags.mbox_int) {
307 ql_dbg(ql_dbg_mbx, vha, 0x1014,
308 "Cmd=%x completed.\n", command);
310 /* Got interrupt. Clear the flag. */
311 ha->flags.mbox_int = 0;
312 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
314 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
315 ha->flags.mbox_busy = 0;
316 /* Setting Link-Down error */
317 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
319 rval = QLA_FUNCTION_FAILED;
320 ql_log(ql_log_warn, vha, 0x1015,
321 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
325 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
326 rval = QLA_FUNCTION_FAILED;
328 /* Load return mailbox registers. */
330 iptr = (uint16_t *)&ha->mailbox_out[0];
333 ql_dbg(ql_dbg_mbx, vha, 0x1113,
334 "Mailbox registers (IN):\n");
335 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
336 if (mboxes & BIT_0) {
338 ql_dbg(ql_dbg_mbx, vha, 0x1114,
339 "mbox[%d]->0x%04x\n", cnt, *iptr2);
349 uint32_t ictrl, host_status, hccr;
352 if (IS_FWI2_CAPABLE(ha)) {
353 mb[0] = RD_REG_WORD(®->isp24.mailbox0);
354 mb[1] = RD_REG_WORD(®->isp24.mailbox1);
355 mb[2] = RD_REG_WORD(®->isp24.mailbox2);
356 mb[3] = RD_REG_WORD(®->isp24.mailbox3);
357 mb[7] = RD_REG_WORD(®->isp24.mailbox7);
358 ictrl = RD_REG_DWORD(®->isp24.ictrl);
359 host_status = RD_REG_DWORD(®->isp24.host_status);
360 hccr = RD_REG_DWORD(®->isp24.hccr);
362 ql_log(ql_log_warn, vha, 0x1119,
363 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
364 "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
365 command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
366 mb[7], host_status, hccr);
369 mb[0] = RD_MAILBOX_REG(ha, ®->isp, 0);
370 ictrl = RD_REG_WORD(®->isp.ictrl);
371 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
372 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
373 "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
375 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
377 /* Capture FW dump only, if PCI device active */
378 if (!pci_channel_offline(vha->hw->pdev)) {
379 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
380 if (w == 0xffff || ictrl == 0xffffffff) {
381 /* This is special case if there is unload
382 * of driver happening and if PCI device go
383 * into bad state due to PCI error condition
384 * then only PCI ERR flag would be set.
385 * we will do premature exit for above case.
387 if (test_bit(UNLOADING, &base_vha->dpc_flags))
388 set_bit(PCI_ERR, &base_vha->dpc_flags);
389 ha->flags.mbox_busy = 0;
390 rval = QLA_FUNCTION_TIMEOUT;
394 /* Attempt to capture firmware dump for further
395 * anallysis of the current formware state. we do not
396 * need to do this if we are intentionally generating
399 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
400 ha->isp_ops->fw_dump(vha, 0);
401 rval = QLA_FUNCTION_TIMEOUT;
405 ha->flags.mbox_busy = 0;
410 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
411 ql_dbg(ql_dbg_mbx, vha, 0x101a,
412 "Checking for additional resp interrupt.\n");
414 /* polling mode for non isp_abort commands. */
415 qla2x00_poll(ha->rsp_q_map[0]);
418 if (rval == QLA_FUNCTION_TIMEOUT &&
419 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
420 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
421 ha->flags.eeh_busy) {
422 /* not in dpc. schedule it for dpc to take over. */
423 ql_dbg(ql_dbg_mbx, vha, 0x101b,
424 "Timeout, schedule isp_abort_needed.\n");
426 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
427 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
428 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
429 if (IS_QLA82XX(ha)) {
430 ql_dbg(ql_dbg_mbx, vha, 0x112a,
431 "disabling pause transmit on port "
434 QLA82XX_CRB_NIU + 0x98,
435 CRB_NIU_XG_PAUSE_CTL_P0|
436 CRB_NIU_XG_PAUSE_CTL_P1);
438 ql_log(ql_log_info, base_vha, 0x101c,
439 "Mailbox cmd timeout occurred, cmd=0x%x, "
440 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
441 "abort.\n", command, mcp->mb[0],
443 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
444 qla2xxx_wake_dpc(vha);
446 } else if (!abort_active) {
447 /* call abort directly since we are in the DPC thread */
448 ql_dbg(ql_dbg_mbx, vha, 0x101d,
449 "Timeout, calling abort_isp.\n");
451 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
452 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
453 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
454 if (IS_QLA82XX(ha)) {
455 ql_dbg(ql_dbg_mbx, vha, 0x112b,
456 "disabling pause transmit on port "
459 QLA82XX_CRB_NIU + 0x98,
460 CRB_NIU_XG_PAUSE_CTL_P0|
461 CRB_NIU_XG_PAUSE_CTL_P1);
463 ql_log(ql_log_info, base_vha, 0x101e,
464 "Mailbox cmd timeout occurred, cmd=0x%x, "
465 "mb[0]=0x%x. Scheduling ISP abort ",
466 command, mcp->mb[0]);
467 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
468 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
469 /* Allow next mbx cmd to come in. */
470 complete(&ha->mbx_cmd_comp);
471 if (ha->isp_ops->abort_isp(vha)) {
472 /* Failed. retry later. */
473 set_bit(ISP_ABORT_NEEDED,
476 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
477 ql_dbg(ql_dbg_mbx, vha, 0x101f,
478 "Finished abort_isp.\n");
485 /* Allow next mbx cmd to come in. */
486 complete(&ha->mbx_cmd_comp);
490 ql_dbg(ql_dbg_disc, base_vha, 0x1020,
491 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
492 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
494 ql_dbg(ql_dbg_mbx, vha, 0x1198,
495 "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n",
496 RD_REG_DWORD(®->isp24.host_status),
497 ha->fw_dump_cap_flags,
498 RD_REG_DWORD(®->isp24.ictrl),
499 RD_REG_DWORD(®->isp24.istatus));
501 mbx_reg = ®->isp24.mailbox0;
502 for (i = 0; i < 6; i++)
503 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1199,
504 "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++));
506 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
513 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
514 uint32_t risc_code_size)
517 struct qla_hw_data *ha = vha->hw;
519 mbx_cmd_t *mcp = &mc;
521 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
522 "Entered %s.\n", __func__);
524 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
525 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
526 mcp->mb[8] = MSW(risc_addr);
527 mcp->out_mb = MBX_8|MBX_0;
529 mcp->mb[0] = MBC_LOAD_RISC_RAM;
532 mcp->mb[1] = LSW(risc_addr);
533 mcp->mb[2] = MSW(req_dma);
534 mcp->mb[3] = LSW(req_dma);
535 mcp->mb[6] = MSW(MSD(req_dma));
536 mcp->mb[7] = LSW(MSD(req_dma));
537 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
538 if (IS_FWI2_CAPABLE(ha)) {
539 mcp->mb[4] = MSW(risc_code_size);
540 mcp->mb[5] = LSW(risc_code_size);
541 mcp->out_mb |= MBX_5|MBX_4;
543 mcp->mb[4] = LSW(risc_code_size);
544 mcp->out_mb |= MBX_4;
548 mcp->tov = MBX_TOV_SECONDS;
550 rval = qla2x00_mailbox_command(vha, mcp);
552 if (rval != QLA_SUCCESS) {
553 ql_dbg(ql_dbg_mbx, vha, 0x1023,
554 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
557 "Done %s.\n", __func__);
563 #define EXTENDED_BB_CREDITS BIT_0
566 * Start adapter firmware.
569 * ha = adapter block pointer.
570 * TARGET_QUEUE_LOCK must be released.
571 * ADAPTER_STATE_LOCK must be released.
574 * qla2x00 local function return status code.
580 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
583 struct qla_hw_data *ha = vha->hw;
585 mbx_cmd_t *mcp = &mc;
587 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
588 "Entered %s.\n", __func__);
590 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
593 if (IS_FWI2_CAPABLE(ha)) {
594 mcp->mb[1] = MSW(risc_addr);
595 mcp->mb[2] = LSW(risc_addr);
597 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
599 struct nvram_81xx *nv = ha->nvram;
600 mcp->mb[4] = (nv->enhanced_features &
601 EXTENDED_BB_CREDITS);
605 if (ha->flags.exlogins_enabled)
606 mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;
608 if (ha->flags.exchoffld_enabled)
609 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;
611 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
614 mcp->mb[1] = LSW(risc_addr);
615 mcp->out_mb |= MBX_1;
616 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
618 mcp->out_mb |= MBX_2;
622 mcp->tov = MBX_TOV_SECONDS;
624 rval = qla2x00_mailbox_command(vha, mcp);
626 if (rval != QLA_SUCCESS) {
627 ql_dbg(ql_dbg_mbx, vha, 0x1026,
628 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
630 if (IS_FWI2_CAPABLE(ha)) {
631 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
632 "Done exchanges=%x.\n", mcp->mb[1]);
634 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
635 "Done %s.\n", __func__);
643 * qla_get_exlogin_status
644 * Get extended login status
645 * uses the memory offload control/status Mailbox
648 * ha: adapter state pointer.
649 * fwopt: firmware options
652 * qla2x00 local function status
657 #define FETCH_XLOGINS_STAT 0x8
659 qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
660 uint16_t *ex_logins_cnt)
664 mbx_cmd_t *mcp = &mc;
666 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
667 "Entered %s\n", __func__);
669 memset(mcp->mb, 0 , sizeof(mcp->mb));
670 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
671 mcp->mb[1] = FETCH_XLOGINS_STAT;
672 mcp->out_mb = MBX_1|MBX_0;
673 mcp->in_mb = MBX_10|MBX_4|MBX_0;
674 mcp->tov = MBX_TOV_SECONDS;
677 rval = qla2x00_mailbox_command(vha, mcp);
678 if (rval != QLA_SUCCESS) {
679 ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
681 *buf_sz = mcp->mb[4];
682 *ex_logins_cnt = mcp->mb[10];
684 ql_log(ql_log_info, vha, 0x1190,
685 "buffer size 0x%x, exchange login count=%d\n",
686 mcp->mb[4], mcp->mb[10]);
688 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
689 "Done %s.\n", __func__);
696 * qla_set_exlogin_mem_cfg
697 * set extended login memory configuration
698 * Mbx needs to be issues before init_cb is set
701 * ha: adapter state pointer.
702 * buffer: buffer pointer
703 * phys_addr: physical address of buffer
704 * size: size of buffer
705 * TARGET_QUEUE_LOCK must be released
706 * ADAPTER_STATE_LOCK must be release
709 * qla2x00 local funxtion status code.
714 #define CONFIG_XLOGINS_MEM 0x3
716 qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
720 mbx_cmd_t *mcp = &mc;
721 struct qla_hw_data *ha = vha->hw;
723 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
724 "Entered %s.\n", __func__);
726 memset(mcp->mb, 0 , sizeof(mcp->mb));
727 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
728 mcp->mb[1] = CONFIG_XLOGINS_MEM;
729 mcp->mb[2] = MSW(phys_addr);
730 mcp->mb[3] = LSW(phys_addr);
731 mcp->mb[6] = MSW(MSD(phys_addr));
732 mcp->mb[7] = LSW(MSD(phys_addr));
733 mcp->mb[8] = MSW(ha->exlogin_size);
734 mcp->mb[9] = LSW(ha->exlogin_size);
735 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
736 mcp->in_mb = MBX_11|MBX_0;
737 mcp->tov = MBX_TOV_SECONDS;
739 rval = qla2x00_mailbox_command(vha, mcp);
740 if (rval != QLA_SUCCESS) {
742 ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
744 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
745 "Done %s.\n", __func__);
752 * qla_get_exchoffld_status
753 * Get exchange offload status
754 * uses the memory offload control/status Mailbox
757 * ha: adapter state pointer.
758 * fwopt: firmware options
761 * qla2x00 local function status
766 #define FETCH_XCHOFFLD_STAT 0x2
768 qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
769 uint16_t *ex_logins_cnt)
773 mbx_cmd_t *mcp = &mc;
775 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
776 "Entered %s\n", __func__);
778 memset(mcp->mb, 0 , sizeof(mcp->mb));
779 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
780 mcp->mb[1] = FETCH_XCHOFFLD_STAT;
781 mcp->out_mb = MBX_1|MBX_0;
782 mcp->in_mb = MBX_10|MBX_4|MBX_0;
783 mcp->tov = MBX_TOV_SECONDS;
786 rval = qla2x00_mailbox_command(vha, mcp);
787 if (rval != QLA_SUCCESS) {
788 ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
790 *buf_sz = mcp->mb[4];
791 *ex_logins_cnt = mcp->mb[10];
793 ql_log(ql_log_info, vha, 0x118e,
794 "buffer size 0x%x, exchange offload count=%d\n",
795 mcp->mb[4], mcp->mb[10]);
797 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
798 "Done %s.\n", __func__);
805 * qla_set_exchoffld_mem_cfg
806 * Set exchange offload memory configuration
807 * Mbx needs to be issues before init_cb is set
810 * ha: adapter state pointer.
811 * buffer: buffer pointer
812 * phys_addr: physical address of buffer
813 * size: size of buffer
814 * TARGET_QUEUE_LOCK must be released
815 * ADAPTER_STATE_LOCK must be release
818 * qla2x00 local funxtion status code.
823 #define CONFIG_XCHOFFLD_MEM 0x3
825 qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
829 mbx_cmd_t *mcp = &mc;
830 struct qla_hw_data *ha = vha->hw;
832 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
833 "Entered %s.\n", __func__);
835 memset(mcp->mb, 0 , sizeof(mcp->mb));
836 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
837 mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
838 mcp->mb[2] = MSW(phys_addr);
839 mcp->mb[3] = LSW(phys_addr);
840 mcp->mb[6] = MSW(MSD(phys_addr));
841 mcp->mb[7] = LSW(MSD(phys_addr));
842 mcp->mb[8] = MSW(ha->exlogin_size);
843 mcp->mb[9] = LSW(ha->exlogin_size);
844 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
845 mcp->in_mb = MBX_11|MBX_0;
846 mcp->tov = MBX_TOV_SECONDS;
848 rval = qla2x00_mailbox_command(vha, mcp);
849 if (rval != QLA_SUCCESS) {
851 ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
854 "Done %s.\n", __func__);
861 * qla2x00_get_fw_version
862 * Get firmware version.
865 * ha: adapter state pointer.
866 * major: pointer for major number.
867 * minor: pointer for minor number.
868 * subminor: pointer for subminor number.
871 * qla2x00 local function return status code.
877 qla2x00_get_fw_version(scsi_qla_host_t *vha)
881 mbx_cmd_t *mcp = &mc;
882 struct qla_hw_data *ha = vha->hw;
884 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
885 "Entered %s.\n", __func__);
887 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
889 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
890 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
891 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
892 if (IS_FWI2_CAPABLE(ha))
893 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
896 MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18|
897 MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8;
900 mcp->tov = MBX_TOV_SECONDS;
901 rval = qla2x00_mailbox_command(vha, mcp);
902 if (rval != QLA_SUCCESS)
905 /* Return mailbox data. */
906 ha->fw_major_version = mcp->mb[1];
907 ha->fw_minor_version = mcp->mb[2];
908 ha->fw_subminor_version = mcp->mb[3];
909 ha->fw_attributes = mcp->mb[6];
910 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
911 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
913 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
915 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
916 ha->mpi_version[0] = mcp->mb[10] & 0xff;
917 ha->mpi_version[1] = mcp->mb[11] >> 8;
918 ha->mpi_version[2] = mcp->mb[11] & 0xff;
919 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
920 ha->phy_version[0] = mcp->mb[8] & 0xff;
921 ha->phy_version[1] = mcp->mb[9] >> 8;
922 ha->phy_version[2] = mcp->mb[9] & 0xff;
925 if (IS_FWI2_CAPABLE(ha)) {
926 ha->fw_attributes_h = mcp->mb[15];
927 ha->fw_attributes_ext[0] = mcp->mb[16];
928 ha->fw_attributes_ext[1] = mcp->mb[17];
929 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
930 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
931 __func__, mcp->mb[15], mcp->mb[6]);
932 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
933 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
934 __func__, mcp->mb[17], mcp->mb[16]);
936 if (ha->fw_attributes_h & 0x4)
937 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
938 "%s: Firmware supports Extended Login 0x%x\n",
939 __func__, ha->fw_attributes_h);
941 if (ha->fw_attributes_h & 0x8)
942 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
943 "%s: Firmware supports Exchange Offload 0x%x\n",
944 __func__, ha->fw_attributes_h);
947 if (IS_QLA27XX(ha)) {
948 ha->mpi_version[0] = mcp->mb[10] & 0xff;
949 ha->mpi_version[1] = mcp->mb[11] >> 8;
950 ha->mpi_version[2] = mcp->mb[11] & 0xff;
951 ha->pep_version[0] = mcp->mb[13] & 0xff;
952 ha->pep_version[1] = mcp->mb[14] >> 8;
953 ha->pep_version[2] = mcp->mb[14] & 0xff;
954 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
955 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
956 ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22];
957 ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24];
961 if (rval != QLA_SUCCESS) {
963 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
966 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
967 "Done %s.\n", __func__);
973 * qla2x00_get_fw_options
974 * Set firmware options.
977 * ha = adapter block pointer.
978 * fwopt = pointer for firmware options.
981 * qla2x00 local function return status code.
987 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
991 mbx_cmd_t *mcp = &mc;
993 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
994 "Entered %s.\n", __func__);
996 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
998 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
999 mcp->tov = MBX_TOV_SECONDS;
1001 rval = qla2x00_mailbox_command(vha, mcp);
1003 if (rval != QLA_SUCCESS) {
1005 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
1007 fwopts[0] = mcp->mb[0];
1008 fwopts[1] = mcp->mb[1];
1009 fwopts[2] = mcp->mb[2];
1010 fwopts[3] = mcp->mb[3];
1012 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
1013 "Done %s.\n", __func__);
1021 * qla2x00_set_fw_options
1022 * Set firmware options.
1025 * ha = adapter block pointer.
1026 * fwopt = pointer for firmware options.
1029 * qla2x00 local function return status code.
1035 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1039 mbx_cmd_t *mcp = &mc;
1041 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
1042 "Entered %s.\n", __func__);
1044 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
1045 mcp->mb[1] = fwopts[1];
1046 mcp->mb[2] = fwopts[2];
1047 mcp->mb[3] = fwopts[3];
1048 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1050 if (IS_FWI2_CAPABLE(vha->hw)) {
1051 mcp->in_mb |= MBX_1;
1053 mcp->mb[10] = fwopts[10];
1054 mcp->mb[11] = fwopts[11];
1055 mcp->mb[12] = 0; /* Undocumented, but used */
1056 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
1058 mcp->tov = MBX_TOV_SECONDS;
1060 rval = qla2x00_mailbox_command(vha, mcp);
1062 fwopts[0] = mcp->mb[0];
1064 if (rval != QLA_SUCCESS) {
1066 ql_dbg(ql_dbg_mbx, vha, 0x1030,
1067 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
1070 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
1071 "Done %s.\n", __func__);
1078 * qla2x00_mbx_reg_test
1079 * Mailbox register wrap test.
1082 * ha = adapter block pointer.
1083 * TARGET_QUEUE_LOCK must be released.
1084 * ADAPTER_STATE_LOCK must be released.
1087 * qla2x00 local function return status code.
1093 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
1097 mbx_cmd_t *mcp = &mc;
1099 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
1100 "Entered %s.\n", __func__);
1102 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
1103 mcp->mb[1] = 0xAAAA;
1104 mcp->mb[2] = 0x5555;
1105 mcp->mb[3] = 0xAA55;
1106 mcp->mb[4] = 0x55AA;
1107 mcp->mb[5] = 0xA5A5;
1108 mcp->mb[6] = 0x5A5A;
1109 mcp->mb[7] = 0x2525;
1110 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1111 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1112 mcp->tov = MBX_TOV_SECONDS;
1114 rval = qla2x00_mailbox_command(vha, mcp);
1116 if (rval == QLA_SUCCESS) {
1117 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
1118 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
1119 rval = QLA_FUNCTION_FAILED;
1120 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
1121 mcp->mb[7] != 0x2525)
1122 rval = QLA_FUNCTION_FAILED;
1125 if (rval != QLA_SUCCESS) {
1127 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1130 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
1131 "Done %s.\n", __func__);
1138 * qla2x00_verify_checksum
1139 * Verify firmware checksum.
1142 * ha = adapter block pointer.
1143 * TARGET_QUEUE_LOCK must be released.
1144 * ADAPTER_STATE_LOCK must be released.
1147 * qla2x00 local function return status code.
1153 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1157 mbx_cmd_t *mcp = &mc;
1159 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
1160 "Entered %s.\n", __func__);
1162 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1163 mcp->out_mb = MBX_0;
1165 if (IS_FWI2_CAPABLE(vha->hw)) {
1166 mcp->mb[1] = MSW(risc_addr);
1167 mcp->mb[2] = LSW(risc_addr);
1168 mcp->out_mb |= MBX_2|MBX_1;
1169 mcp->in_mb |= MBX_2|MBX_1;
1171 mcp->mb[1] = LSW(risc_addr);
1172 mcp->out_mb |= MBX_1;
1173 mcp->in_mb |= MBX_1;
1176 mcp->tov = MBX_TOV_SECONDS;
1178 rval = qla2x00_mailbox_command(vha, mcp);
1180 if (rval != QLA_SUCCESS) {
1181 ql_dbg(ql_dbg_mbx, vha, 0x1036,
1182 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
1183 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1185 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
1186 "Done %s.\n", __func__);
1193 * qla2x00_issue_iocb
1194 * Issue IOCB using mailbox command
1197 * ha = adapter state pointer.
1198 * buffer = buffer pointer.
1199 * phys_addr = physical address of buffer.
1200 * size = size of buffer.
1201 * TARGET_QUEUE_LOCK must be released.
1202 * ADAPTER_STATE_LOCK must be released.
1205 * qla2x00 local function return status code.
1211 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1212 dma_addr_t phys_addr, size_t size, uint32_t tov)
1216 mbx_cmd_t *mcp = &mc;
1218 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
1219 "Entered %s.\n", __func__);
1221 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
1223 mcp->mb[2] = MSW(phys_addr);
1224 mcp->mb[3] = LSW(phys_addr);
1225 mcp->mb[6] = MSW(MSD(phys_addr));
1226 mcp->mb[7] = LSW(MSD(phys_addr));
1227 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1228 mcp->in_mb = MBX_2|MBX_0;
1231 rval = qla2x00_mailbox_command(vha, mcp);
1233 if (rval != QLA_SUCCESS) {
1235 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1237 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
1239 /* Mask reserved bits. */
1240 sts_entry->entry_status &=
1241 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1242 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1243 "Done %s.\n", __func__);
1250 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1253 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1258 * qla2x00_abort_command
1259 * Abort command aborts a specified IOCB.
1262 * ha = adapter block pointer.
1263 * sp = SB structure pointer.
1266 * qla2x00 local function return status code.
1272 qla2x00_abort_command(srb_t *sp)
1274 unsigned long flags = 0;
1276 uint32_t handle = 0;
1278 mbx_cmd_t *mcp = &mc;
1279 fc_port_t *fcport = sp->fcport;
1280 scsi_qla_host_t *vha = fcport->vha;
1281 struct qla_hw_data *ha = vha->hw;
1282 struct req_que *req;
1283 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1285 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
1286 "Entered %s.\n", __func__);
1288 if (vha->flags.qpairs_available && sp->qpair)
1289 req = sp->qpair->req;
1293 spin_lock_irqsave(&ha->hardware_lock, flags);
1294 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1295 if (req->outstanding_cmds[handle] == sp)
1298 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1300 if (handle == req->num_outstanding_cmds) {
1301 /* command not found */
1302 return QLA_FUNCTION_FAILED;
1305 mcp->mb[0] = MBC_ABORT_COMMAND;
1306 if (HAS_EXTENDED_IDS(ha))
1307 mcp->mb[1] = fcport->loop_id;
1309 mcp->mb[1] = fcport->loop_id << 8;
1310 mcp->mb[2] = (uint16_t)handle;
1311 mcp->mb[3] = (uint16_t)(handle >> 16);
1312 mcp->mb[6] = (uint16_t)cmd->device->lun;
1313 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1315 mcp->tov = MBX_TOV_SECONDS;
1317 rval = qla2x00_mailbox_command(vha, mcp);
1319 if (rval != QLA_SUCCESS) {
1320 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1322 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
1323 "Done %s.\n", __func__);
1330 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
1334 mbx_cmd_t *mcp = &mc;
1335 scsi_qla_host_t *vha;
1336 struct req_que *req;
1337 struct rsp_que *rsp;
1342 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
1343 "Entered %s.\n", __func__);
1345 req = vha->hw->req_q_map[0];
1347 mcp->mb[0] = MBC_ABORT_TARGET;
1348 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1349 if (HAS_EXTENDED_IDS(vha->hw)) {
1350 mcp->mb[1] = fcport->loop_id;
1352 mcp->out_mb |= MBX_10;
1354 mcp->mb[1] = fcport->loop_id << 8;
1356 mcp->mb[2] = vha->hw->loop_reset_delay;
1357 mcp->mb[9] = vha->vp_idx;
1360 mcp->tov = MBX_TOV_SECONDS;
1362 rval = qla2x00_mailbox_command(vha, mcp);
1363 if (rval != QLA_SUCCESS) {
1364 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
1365 "Failed=%x.\n", rval);
1368 /* Issue marker IOCB. */
1369 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
1371 if (rval2 != QLA_SUCCESS) {
1372 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1373 "Failed to issue marker IOCB (%x).\n", rval2);
1375 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1376 "Done %s.\n", __func__);
1383 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1387 mbx_cmd_t *mcp = &mc;
1388 scsi_qla_host_t *vha;
1389 struct req_que *req;
1390 struct rsp_que *rsp;
1394 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1395 "Entered %s.\n", __func__);
1397 req = vha->hw->req_q_map[0];
1399 mcp->mb[0] = MBC_LUN_RESET;
1400 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1401 if (HAS_EXTENDED_IDS(vha->hw))
1402 mcp->mb[1] = fcport->loop_id;
1404 mcp->mb[1] = fcport->loop_id << 8;
1405 mcp->mb[2] = (u32)l;
1407 mcp->mb[9] = vha->vp_idx;
1410 mcp->tov = MBX_TOV_SECONDS;
1412 rval = qla2x00_mailbox_command(vha, mcp);
1413 if (rval != QLA_SUCCESS) {
1414 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1417 /* Issue marker IOCB. */
1418 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1420 if (rval2 != QLA_SUCCESS) {
1421 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1422 "Failed to issue marker IOCB (%x).\n", rval2);
1424 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1425 "Done %s.\n", __func__);
1432 * qla2x00_get_adapter_id
1433 * Get adapter ID and topology.
1436 * ha = adapter block pointer.
1437 * id = pointer for loop ID.
1438 * al_pa = pointer for AL_PA.
1439 * area = pointer for area.
1440 * domain = pointer for domain.
1441 * top = pointer for topology.
1442 * TARGET_QUEUE_LOCK must be released.
1443 * ADAPTER_STATE_LOCK must be released.
1446 * qla2x00 local function return status code.
1452 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1453 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1457 mbx_cmd_t *mcp = &mc;
1459 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1460 "Entered %s.\n", __func__);
1462 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1463 mcp->mb[9] = vha->vp_idx;
1464 mcp->out_mb = MBX_9|MBX_0;
1465 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1466 if (IS_CNA_CAPABLE(vha->hw))
1467 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1468 if (IS_FWI2_CAPABLE(vha->hw))
1469 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1470 if (IS_QLA27XX(vha->hw))
1471 mcp->in_mb |= MBX_15;
1472 mcp->tov = MBX_TOV_SECONDS;
1474 rval = qla2x00_mailbox_command(vha, mcp);
1475 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1476 rval = QLA_COMMAND_ERROR;
1477 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1478 rval = QLA_INVALID_COMMAND;
1482 *al_pa = LSB(mcp->mb[2]);
1483 *area = MSB(mcp->mb[2]);
1484 *domain = LSB(mcp->mb[3]);
1486 *sw_cap = mcp->mb[7];
1488 if (rval != QLA_SUCCESS) {
1490 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1492 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1493 "Done %s.\n", __func__);
1495 if (IS_CNA_CAPABLE(vha->hw)) {
1496 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1497 vha->fcoe_fcf_idx = mcp->mb[10];
1498 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1499 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1500 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1501 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1502 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1503 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1505 /* If FA-WWN supported */
1506 if (IS_FAWWN_CAPABLE(vha->hw)) {
1507 if (mcp->mb[7] & BIT_14) {
1508 vha->port_name[0] = MSB(mcp->mb[16]);
1509 vha->port_name[1] = LSB(mcp->mb[16]);
1510 vha->port_name[2] = MSB(mcp->mb[17]);
1511 vha->port_name[3] = LSB(mcp->mb[17]);
1512 vha->port_name[4] = MSB(mcp->mb[18]);
1513 vha->port_name[5] = LSB(mcp->mb[18]);
1514 vha->port_name[6] = MSB(mcp->mb[19]);
1515 vha->port_name[7] = LSB(mcp->mb[19]);
1516 fc_host_port_name(vha->host) =
1517 wwn_to_u64(vha->port_name);
1518 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1519 "FA-WWN acquired %016llx\n",
1520 wwn_to_u64(vha->port_name));
1524 if (IS_QLA27XX(vha->hw))
1525 vha->bbcr = mcp->mb[15];
1532 * qla2x00_get_retry_cnt
1533 * Get current firmware login retry count and delay.
1536 * ha = adapter block pointer.
1537 * retry_cnt = pointer to login retry count.
1538 * tov = pointer to login timeout value.
1541 * qla2x00 local function return status code.
1547 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1553 mbx_cmd_t *mcp = &mc;
1555 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1556 "Entered %s.\n", __func__);
1558 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1559 mcp->out_mb = MBX_0;
1560 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1561 mcp->tov = MBX_TOV_SECONDS;
1563 rval = qla2x00_mailbox_command(vha, mcp);
1565 if (rval != QLA_SUCCESS) {
1567 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1568 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1570 /* Convert returned data and check our values. */
1571 *r_a_tov = mcp->mb[3] / 2;
1572 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1573 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1574 /* Update to the larger values */
1575 *retry_cnt = (uint8_t)mcp->mb[1];
1579 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1580 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1587 * qla2x00_init_firmware
1588 * Initialize adapter firmware.
1591 * ha = adapter block pointer.
1592 * dptr = Initialization control block pointer.
1593 * size = size of initialization control block.
1594 * TARGET_QUEUE_LOCK must be released.
1595 * ADAPTER_STATE_LOCK must be released.
1598 * qla2x00 local function return status code.
1604 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1608 mbx_cmd_t *mcp = &mc;
1609 struct qla_hw_data *ha = vha->hw;
1611 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1612 "Entered %s.\n", __func__);
1614 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1615 qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1616 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1618 if (ha->flags.npiv_supported)
1619 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1621 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1624 mcp->mb[2] = MSW(ha->init_cb_dma);
1625 mcp->mb[3] = LSW(ha->init_cb_dma);
1626 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1627 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1628 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1629 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1631 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1632 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1633 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1634 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1635 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1636 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1638 /* 1 and 2 should normally be captured. */
1639 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1640 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1641 /* mb3 is additional info about the installed SFP. */
1642 mcp->in_mb |= MBX_3;
1643 mcp->buf_size = size;
1644 mcp->flags = MBX_DMA_OUT;
1645 mcp->tov = MBX_TOV_SECONDS;
1646 rval = qla2x00_mailbox_command(vha, mcp);
1648 if (rval != QLA_SUCCESS) {
1650 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1651 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1652 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1655 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1656 "Done %s.\n", __func__);
1664 * qla2x00_get_port_database
1665 * Issue normal/enhanced get port database mailbox command
1666 * and copy device name as necessary.
1669 * ha = adapter state pointer.
1670 * dev = structure pointer.
1671 * opt = enhanced cmd option byte.
1674 * qla2x00 local function return status code.
1680 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1684 mbx_cmd_t *mcp = &mc;
1685 port_database_t *pd;
1686 struct port_database_24xx *pd24;
1688 struct qla_hw_data *ha = vha->hw;
1690 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1691 "Entered %s.\n", __func__);
1694 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1696 ql_log(ql_log_warn, vha, 0x1050,
1697 "Failed to allocate port database structure.\n");
1698 return QLA_MEMORY_ALLOC_FAILED;
1700 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1702 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1703 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1704 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1705 mcp->mb[2] = MSW(pd_dma);
1706 mcp->mb[3] = LSW(pd_dma);
1707 mcp->mb[6] = MSW(MSD(pd_dma));
1708 mcp->mb[7] = LSW(MSD(pd_dma));
1709 mcp->mb[9] = vha->vp_idx;
1710 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1712 if (IS_FWI2_CAPABLE(ha)) {
1713 mcp->mb[1] = fcport->loop_id;
1715 mcp->out_mb |= MBX_10|MBX_1;
1716 mcp->in_mb |= MBX_1;
1717 } else if (HAS_EXTENDED_IDS(ha)) {
1718 mcp->mb[1] = fcport->loop_id;
1720 mcp->out_mb |= MBX_10|MBX_1;
1722 mcp->mb[1] = fcport->loop_id << 8 | opt;
1723 mcp->out_mb |= MBX_1;
1725 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1726 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1727 mcp->flags = MBX_DMA_IN;
1728 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1729 rval = qla2x00_mailbox_command(vha, mcp);
1730 if (rval != QLA_SUCCESS)
1733 if (IS_FWI2_CAPABLE(ha)) {
1735 pd24 = (struct port_database_24xx *) pd;
1737 /* Check for logged in state. */
1738 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1739 pd24->last_login_state != PDS_PRLI_COMPLETE) {
1740 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1741 "Unable to verify login-state (%x/%x) for "
1742 "loop_id %x.\n", pd24->current_login_state,
1743 pd24->last_login_state, fcport->loop_id);
1744 rval = QLA_FUNCTION_FAILED;
1748 if (fcport->loop_id == FC_NO_LOOP_ID ||
1749 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1750 memcmp(fcport->port_name, pd24->port_name, 8))) {
1751 /* We lost the device mid way. */
1752 rval = QLA_NOT_LOGGED_IN;
1756 /* Names are little-endian. */
1757 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1758 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1760 /* Get port_id of device. */
1761 fcport->d_id.b.domain = pd24->port_id[0];
1762 fcport->d_id.b.area = pd24->port_id[1];
1763 fcport->d_id.b.al_pa = pd24->port_id[2];
1764 fcport->d_id.b.rsvd_1 = 0;
1766 /* If not target must be initiator or unknown type. */
1767 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1768 fcport->port_type = FCT_INITIATOR;
1770 fcport->port_type = FCT_TARGET;
1772 /* Passback COS information. */
1773 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1774 FC_COS_CLASS2 : FC_COS_CLASS3;
1776 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1777 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1781 /* Check for logged in state. */
1782 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1783 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1784 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1785 "Unable to verify login-state (%x/%x) - "
1786 "portid=%02x%02x%02x.\n", pd->master_state,
1787 pd->slave_state, fcport->d_id.b.domain,
1788 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1789 rval = QLA_FUNCTION_FAILED;
1793 if (fcport->loop_id == FC_NO_LOOP_ID ||
1794 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1795 memcmp(fcport->port_name, pd->port_name, 8))) {
1796 /* We lost the device mid way. */
1797 rval = QLA_NOT_LOGGED_IN;
1801 /* Names are little-endian. */
1802 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1803 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1805 /* Get port_id of device. */
1806 fcport->d_id.b.domain = pd->port_id[0];
1807 fcport->d_id.b.area = pd->port_id[3];
1808 fcport->d_id.b.al_pa = pd->port_id[2];
1809 fcport->d_id.b.rsvd_1 = 0;
1811 /* If not target must be initiator or unknown type. */
1812 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1813 fcport->port_type = FCT_INITIATOR;
1815 fcport->port_type = FCT_TARGET;
1817 /* Passback COS information. */
1818 fcport->supported_classes = (pd->options & BIT_4) ?
1819 FC_COS_CLASS2: FC_COS_CLASS3;
1823 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1825 if (rval != QLA_SUCCESS) {
1826 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1827 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1828 mcp->mb[0], mcp->mb[1]);
1830 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1831 "Done %s.\n", __func__);
1838 * qla2x00_get_firmware_state
1839 * Get adapter firmware state.
1842 * ha = adapter block pointer.
1843 * dptr = pointer for firmware state.
1844 * TARGET_QUEUE_LOCK must be released.
1845 * ADAPTER_STATE_LOCK must be released.
1848 * qla2x00 local function return status code.
1854 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1858 mbx_cmd_t *mcp = &mc;
1860 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1861 "Entered %s.\n", __func__);
1863 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1864 mcp->out_mb = MBX_0;
1865 if (IS_FWI2_CAPABLE(vha->hw))
1866 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1868 mcp->in_mb = MBX_1|MBX_0;
1869 mcp->tov = MBX_TOV_SECONDS;
1871 rval = qla2x00_mailbox_command(vha, mcp);
1873 /* Return firmware states. */
1874 states[0] = mcp->mb[1];
1875 if (IS_FWI2_CAPABLE(vha->hw)) {
1876 states[1] = mcp->mb[2];
1877 states[2] = mcp->mb[3]; /* SFP info */
1878 states[3] = mcp->mb[4];
1879 states[4] = mcp->mb[5];
1880 states[5] = mcp->mb[6]; /* DPORT status */
1883 if (rval != QLA_SUCCESS) {
1885 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1888 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1889 "Done %s.\n", __func__);
1896 * qla2x00_get_port_name
1897 * Issue get port name mailbox command.
1898 * Returned name is in big endian format.
1901 * ha = adapter block pointer.
1902 * loop_id = loop ID of device.
1903 * name = pointer for name.
1904 * TARGET_QUEUE_LOCK must be released.
1905 * ADAPTER_STATE_LOCK must be released.
1908 * qla2x00 local function return status code.
1914 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1919 mbx_cmd_t *mcp = &mc;
1921 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1922 "Entered %s.\n", __func__);
1924 mcp->mb[0] = MBC_GET_PORT_NAME;
1925 mcp->mb[9] = vha->vp_idx;
1926 mcp->out_mb = MBX_9|MBX_1|MBX_0;
1927 if (HAS_EXTENDED_IDS(vha->hw)) {
1928 mcp->mb[1] = loop_id;
1930 mcp->out_mb |= MBX_10;
1932 mcp->mb[1] = loop_id << 8 | opt;
1935 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1936 mcp->tov = MBX_TOV_SECONDS;
1938 rval = qla2x00_mailbox_command(vha, mcp);
1940 if (rval != QLA_SUCCESS) {
1942 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1945 /* This function returns name in big endian. */
1946 name[0] = MSB(mcp->mb[2]);
1947 name[1] = LSB(mcp->mb[2]);
1948 name[2] = MSB(mcp->mb[3]);
1949 name[3] = LSB(mcp->mb[3]);
1950 name[4] = MSB(mcp->mb[6]);
1951 name[5] = LSB(mcp->mb[6]);
1952 name[6] = MSB(mcp->mb[7]);
1953 name[7] = LSB(mcp->mb[7]);
1956 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1957 "Done %s.\n", __func__);
1964 * qla24xx_link_initialization
1965 * Issue link initialization mailbox command.
1968 * ha = adapter block pointer.
1969 * TARGET_QUEUE_LOCK must be released.
1970 * ADAPTER_STATE_LOCK must be released.
1973 * qla2x00 local function return status code.
1979 qla24xx_link_initialize(scsi_qla_host_t *vha)
1983 mbx_cmd_t *mcp = &mc;
1985 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1986 "Entered %s.\n", __func__);
1988 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1989 return QLA_FUNCTION_FAILED;
1991 mcp->mb[0] = MBC_LINK_INITIALIZATION;
1993 if (vha->hw->operating_mode == LOOP)
1994 mcp->mb[1] |= BIT_6;
1996 mcp->mb[1] |= BIT_5;
1999 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2001 mcp->tov = MBX_TOV_SECONDS;
2003 rval = qla2x00_mailbox_command(vha, mcp);
2005 if (rval != QLA_SUCCESS) {
2006 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
2008 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
2009 "Done %s.\n", __func__);
2017 * Issue LIP reset mailbox command.
2020 * ha = adapter block pointer.
2021 * TARGET_QUEUE_LOCK must be released.
2022 * ADAPTER_STATE_LOCK must be released.
2025 * qla2x00 local function return status code.
2031 qla2x00_lip_reset(scsi_qla_host_t *vha)
2035 mbx_cmd_t *mcp = &mc;
2037 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
2038 "Entered %s.\n", __func__);
2040 if (IS_CNA_CAPABLE(vha->hw)) {
2041 /* Logout across all FCFs. */
2042 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2045 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2046 } else if (IS_FWI2_CAPABLE(vha->hw)) {
2047 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2050 mcp->mb[3] = vha->hw->loop_reset_delay;
2051 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2053 mcp->mb[0] = MBC_LIP_RESET;
2054 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2055 if (HAS_EXTENDED_IDS(vha->hw)) {
2056 mcp->mb[1] = 0x00ff;
2058 mcp->out_mb |= MBX_10;
2060 mcp->mb[1] = 0xff00;
2062 mcp->mb[2] = vha->hw->loop_reset_delay;
2066 mcp->tov = MBX_TOV_SECONDS;
2068 rval = qla2x00_mailbox_command(vha, mcp);
2070 if (rval != QLA_SUCCESS) {
2072 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
2075 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
2076 "Done %s.\n", __func__);
2087 * ha = adapter block pointer.
2088 * sns = pointer for command.
2089 * cmd_size = command size.
2090 * buf_size = response/command size.
2091 * TARGET_QUEUE_LOCK must be released.
2092 * ADAPTER_STATE_LOCK must be released.
2095 * qla2x00 local function return status code.
2101 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
2102 uint16_t cmd_size, size_t buf_size)
2106 mbx_cmd_t *mcp = &mc;
2108 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
2109 "Entered %s.\n", __func__);
2111 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2112 "Retry cnt=%d ratov=%d total tov=%d.\n",
2113 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
2115 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
2116 mcp->mb[1] = cmd_size;
2117 mcp->mb[2] = MSW(sns_phys_address);
2118 mcp->mb[3] = LSW(sns_phys_address);
2119 mcp->mb[6] = MSW(MSD(sns_phys_address));
2120 mcp->mb[7] = LSW(MSD(sns_phys_address));
2121 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2122 mcp->in_mb = MBX_0|MBX_1;
2123 mcp->buf_size = buf_size;
2124 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2125 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
2126 rval = qla2x00_mailbox_command(vha, mcp);
2128 if (rval != QLA_SUCCESS) {
2130 ql_dbg(ql_dbg_mbx, vha, 0x105f,
2131 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2132 rval, mcp->mb[0], mcp->mb[1]);
2135 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
2136 "Done %s.\n", __func__);
2143 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2144 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2148 struct logio_entry_24xx *lg;
2151 struct qla_hw_data *ha = vha->hw;
2152 struct req_que *req;
2154 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
2155 "Entered %s.\n", __func__);
2157 if (vha->vp_idx && vha->qpair)
2158 req = vha->qpair->req;
2160 req = ha->req_q_map[0];
2162 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2164 ql_log(ql_log_warn, vha, 0x1062,
2165 "Failed to allocate login IOCB.\n");
2166 return QLA_MEMORY_ALLOC_FAILED;
2168 memset(lg, 0, sizeof(struct logio_entry_24xx));
2170 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2171 lg->entry_count = 1;
2172 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2173 lg->nport_handle = cpu_to_le16(loop_id);
2174 lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2176 lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2178 lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2179 lg->port_id[0] = al_pa;
2180 lg->port_id[1] = area;
2181 lg->port_id[2] = domain;
2182 lg->vp_index = vha->vp_idx;
2183 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2184 (ha->r_a_tov / 10 * 2) + 2);
2185 if (rval != QLA_SUCCESS) {
2186 ql_dbg(ql_dbg_mbx, vha, 0x1063,
2187 "Failed to issue login IOCB (%x).\n", rval);
2188 } else if (lg->entry_status != 0) {
2189 ql_dbg(ql_dbg_mbx, vha, 0x1064,
2190 "Failed to complete IOCB -- error status (%x).\n",
2192 rval = QLA_FUNCTION_FAILED;
2193 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2194 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2195 iop[1] = le32_to_cpu(lg->io_parameter[1]);
2197 ql_dbg(ql_dbg_mbx, vha, 0x1065,
2198 "Failed to complete IOCB -- completion status (%x) "
2199 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2203 case LSC_SCODE_PORTID_USED:
2204 mb[0] = MBS_PORT_ID_USED;
2205 mb[1] = LSW(iop[1]);
2207 case LSC_SCODE_NPORT_USED:
2208 mb[0] = MBS_LOOP_ID_USED;
2210 case LSC_SCODE_NOLINK:
2211 case LSC_SCODE_NOIOCB:
2212 case LSC_SCODE_NOXCB:
2213 case LSC_SCODE_CMD_FAILED:
2214 case LSC_SCODE_NOFABRIC:
2215 case LSC_SCODE_FW_NOT_READY:
2216 case LSC_SCODE_NOT_LOGGED_IN:
2217 case LSC_SCODE_NOPCB:
2218 case LSC_SCODE_ELS_REJECT:
2219 case LSC_SCODE_CMD_PARAM_ERR:
2220 case LSC_SCODE_NONPORT:
2221 case LSC_SCODE_LOGGED_IN:
2222 case LSC_SCODE_NOFLOGI_ACC:
2224 mb[0] = MBS_COMMAND_ERROR;
2228 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
2229 "Done %s.\n", __func__);
2231 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2233 mb[0] = MBS_COMMAND_COMPLETE;
2235 if (iop[0] & BIT_4) {
2241 /* Passback COS information. */
2243 if (lg->io_parameter[7] || lg->io_parameter[8])
2244 mb[10] |= BIT_0; /* Class 2. */
2245 if (lg->io_parameter[9] || lg->io_parameter[10])
2246 mb[10] |= BIT_1; /* Class 3. */
2247 if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2248 mb[10] |= BIT_7; /* Confirmed Completion
2253 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2259 * qla2x00_login_fabric
2260 * Issue login fabric port mailbox command.
2263 * ha = adapter block pointer.
2264 * loop_id = device loop ID.
2265 * domain = device domain.
2266 * area = device area.
2267 * al_pa = device AL_PA.
2268 * status = pointer for return status.
2269 * opt = command options.
2270 * TARGET_QUEUE_LOCK must be released.
2271 * ADAPTER_STATE_LOCK must be released.
2274 * qla2x00 local function return status code.
2280 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2281 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2285 mbx_cmd_t *mcp = &mc;
2286 struct qla_hw_data *ha = vha->hw;
2288 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2289 "Entered %s.\n", __func__);
2291 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2292 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2293 if (HAS_EXTENDED_IDS(ha)) {
2294 mcp->mb[1] = loop_id;
2296 mcp->out_mb |= MBX_10;
2298 mcp->mb[1] = (loop_id << 8) | opt;
2300 mcp->mb[2] = domain;
2301 mcp->mb[3] = area << 8 | al_pa;
2303 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2304 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2306 rval = qla2x00_mailbox_command(vha, mcp);
2308 /* Return mailbox statuses. */
2315 /* COS retrieved from Get-Port-Database mailbox command. */
2319 if (rval != QLA_SUCCESS) {
2320 /* RLU tmp code: need to change main mailbox_command function to
2321 * return ok even when the mailbox completion value is not
2322 * SUCCESS. The caller needs to be responsible to interpret
2323 * the return values of this mailbox command if we're not
2324 * to change too much of the existing code.
2326 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2327 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2328 mcp->mb[0] == 0x4006)
2332 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2333 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2334 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2337 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2338 "Done %s.\n", __func__);
2345 * qla2x00_login_local_device
2346 * Issue login loop port mailbox command.
2349 * ha = adapter block pointer.
2350 * loop_id = device loop ID.
2351 * opt = command options.
2354 * Return status code.
2361 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2362 uint16_t *mb_ret, uint8_t opt)
2366 mbx_cmd_t *mcp = &mc;
2367 struct qla_hw_data *ha = vha->hw;
2369 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2370 "Entered %s.\n", __func__);
2372 if (IS_FWI2_CAPABLE(ha))
2373 return qla24xx_login_fabric(vha, fcport->loop_id,
2374 fcport->d_id.b.domain, fcport->d_id.b.area,
2375 fcport->d_id.b.al_pa, mb_ret, opt);
2377 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2378 if (HAS_EXTENDED_IDS(ha))
2379 mcp->mb[1] = fcport->loop_id;
2381 mcp->mb[1] = fcport->loop_id << 8;
2383 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2384 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2385 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2387 rval = qla2x00_mailbox_command(vha, mcp);
2389 /* Return mailbox statuses. */
2390 if (mb_ret != NULL) {
2391 mb_ret[0] = mcp->mb[0];
2392 mb_ret[1] = mcp->mb[1];
2393 mb_ret[6] = mcp->mb[6];
2394 mb_ret[7] = mcp->mb[7];
2397 if (rval != QLA_SUCCESS) {
2398 /* AV tmp code: need to change main mailbox_command function to
2399 * return ok even when the mailbox completion value is not
2400 * SUCCESS. The caller needs to be responsible to interpret
2401 * the return values of this mailbox command if we're not
2402 * to change too much of the existing code.
2404 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2407 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2408 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2409 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2412 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2413 "Done %s.\n", __func__);
2420 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2421 uint8_t area, uint8_t al_pa)
2424 struct logio_entry_24xx *lg;
2426 struct qla_hw_data *ha = vha->hw;
2427 struct req_que *req;
2429 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2430 "Entered %s.\n", __func__);
2432 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2434 ql_log(ql_log_warn, vha, 0x106e,
2435 "Failed to allocate logout IOCB.\n");
2436 return QLA_MEMORY_ALLOC_FAILED;
2438 memset(lg, 0, sizeof(struct logio_entry_24xx));
2441 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2442 lg->entry_count = 1;
2443 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2444 lg->nport_handle = cpu_to_le16(loop_id);
2446 cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2448 lg->port_id[0] = al_pa;
2449 lg->port_id[1] = area;
2450 lg->port_id[2] = domain;
2451 lg->vp_index = vha->vp_idx;
2452 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2453 (ha->r_a_tov / 10 * 2) + 2);
2454 if (rval != QLA_SUCCESS) {
2455 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2456 "Failed to issue logout IOCB (%x).\n", rval);
2457 } else if (lg->entry_status != 0) {
2458 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2459 "Failed to complete IOCB -- error status (%x).\n",
2461 rval = QLA_FUNCTION_FAILED;
2462 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2463 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2464 "Failed to complete IOCB -- completion status (%x) "
2465 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2466 le32_to_cpu(lg->io_parameter[0]),
2467 le32_to_cpu(lg->io_parameter[1]));
2470 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2471 "Done %s.\n", __func__);
2474 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2480 * qla2x00_fabric_logout
2481 * Issue logout fabric port mailbox command.
2484 * ha = adapter block pointer.
2485 * loop_id = device loop ID.
2486 * TARGET_QUEUE_LOCK must be released.
2487 * ADAPTER_STATE_LOCK must be released.
2490 * qla2x00 local function return status code.
2496 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2497 uint8_t area, uint8_t al_pa)
2501 mbx_cmd_t *mcp = &mc;
2503 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2504 "Entered %s.\n", __func__);
2506 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2507 mcp->out_mb = MBX_1|MBX_0;
2508 if (HAS_EXTENDED_IDS(vha->hw)) {
2509 mcp->mb[1] = loop_id;
2511 mcp->out_mb |= MBX_10;
2513 mcp->mb[1] = loop_id << 8;
2516 mcp->in_mb = MBX_1|MBX_0;
2517 mcp->tov = MBX_TOV_SECONDS;
2519 rval = qla2x00_mailbox_command(vha, mcp);
2521 if (rval != QLA_SUCCESS) {
2523 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2524 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2527 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2528 "Done %s.\n", __func__);
2535 * qla2x00_full_login_lip
2536 * Issue full login LIP mailbox command.
2539 * ha = adapter block pointer.
2540 * TARGET_QUEUE_LOCK must be released.
2541 * ADAPTER_STATE_LOCK must be released.
2544 * qla2x00 local function return status code.
2550 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2554 mbx_cmd_t *mcp = &mc;
2556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2557 "Entered %s.\n", __func__);
2559 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2560 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2563 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2565 mcp->tov = MBX_TOV_SECONDS;
2567 rval = qla2x00_mailbox_command(vha, mcp);
2569 if (rval != QLA_SUCCESS) {
2571 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2574 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2575 "Done %s.\n", __func__);
2582 * qla2x00_get_id_list
2585 * ha = adapter block pointer.
2588 * qla2x00 local function return status code.
2594 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2599 mbx_cmd_t *mcp = &mc;
2601 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2602 "Entered %s.\n", __func__);
2604 if (id_list == NULL)
2605 return QLA_FUNCTION_FAILED;
2607 mcp->mb[0] = MBC_GET_ID_LIST;
2608 mcp->out_mb = MBX_0;
2609 if (IS_FWI2_CAPABLE(vha->hw)) {
2610 mcp->mb[2] = MSW(id_list_dma);
2611 mcp->mb[3] = LSW(id_list_dma);
2612 mcp->mb[6] = MSW(MSD(id_list_dma));
2613 mcp->mb[7] = LSW(MSD(id_list_dma));
2615 mcp->mb[9] = vha->vp_idx;
2616 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2618 mcp->mb[1] = MSW(id_list_dma);
2619 mcp->mb[2] = LSW(id_list_dma);
2620 mcp->mb[3] = MSW(MSD(id_list_dma));
2621 mcp->mb[6] = LSW(MSD(id_list_dma));
2622 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2624 mcp->in_mb = MBX_1|MBX_0;
2625 mcp->tov = MBX_TOV_SECONDS;
2627 rval = qla2x00_mailbox_command(vha, mcp);
2629 if (rval != QLA_SUCCESS) {
2631 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2633 *entries = mcp->mb[1];
2634 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2635 "Done %s.\n", __func__);
2642 * qla2x00_get_resource_cnts
2643 * Get current firmware resource counts.
2646 * ha = adapter block pointer.
2649 * qla2x00 local function return status code.
2655 qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
2657 struct qla_hw_data *ha = vha->hw;
2660 mbx_cmd_t *mcp = &mc;
2662 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2663 "Entered %s.\n", __func__);
2665 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2666 mcp->out_mb = MBX_0;
2667 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2668 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2669 mcp->in_mb |= MBX_12;
2670 mcp->tov = MBX_TOV_SECONDS;
2672 rval = qla2x00_mailbox_command(vha, mcp);
2674 if (rval != QLA_SUCCESS) {
2676 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2677 "Failed mb[0]=%x.\n", mcp->mb[0]);
2679 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2680 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2681 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2682 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2683 mcp->mb[11], mcp->mb[12]);
2685 ha->orig_fw_tgt_xcb_count = mcp->mb[1];
2686 ha->cur_fw_tgt_xcb_count = mcp->mb[2];
2687 ha->cur_fw_xcb_count = mcp->mb[3];
2688 ha->orig_fw_xcb_count = mcp->mb[6];
2689 ha->cur_fw_iocb_count = mcp->mb[7];
2690 ha->orig_fw_iocb_count = mcp->mb[10];
2691 if (ha->flags.npiv_supported)
2692 ha->max_npiv_vports = mcp->mb[11];
2693 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
2694 ha->fw_max_fcf_count = mcp->mb[12];
2701 * qla2x00_get_fcal_position_map
2702 * Get FCAL (LILP) position map using mailbox command
2705 * ha = adapter state pointer.
2706 * pos_map = buffer pointer (can be NULL).
2709 * qla2x00 local function return status code.
2715 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2719 mbx_cmd_t *mcp = &mc;
2721 dma_addr_t pmap_dma;
2722 struct qla_hw_data *ha = vha->hw;
2724 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2725 "Entered %s.\n", __func__);
2727 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2729 ql_log(ql_log_warn, vha, 0x1080,
2730 "Memory alloc failed.\n");
2731 return QLA_MEMORY_ALLOC_FAILED;
2733 memset(pmap, 0, FCAL_MAP_SIZE);
2735 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2736 mcp->mb[2] = MSW(pmap_dma);
2737 mcp->mb[3] = LSW(pmap_dma);
2738 mcp->mb[6] = MSW(MSD(pmap_dma));
2739 mcp->mb[7] = LSW(MSD(pmap_dma));
2740 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2741 mcp->in_mb = MBX_1|MBX_0;
2742 mcp->buf_size = FCAL_MAP_SIZE;
2743 mcp->flags = MBX_DMA_IN;
2744 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2745 rval = qla2x00_mailbox_command(vha, mcp);
2747 if (rval == QLA_SUCCESS) {
2748 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2749 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2750 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2751 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2755 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2757 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2759 if (rval != QLA_SUCCESS) {
2760 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2762 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2763 "Done %s.\n", __func__);
2770 * qla2x00_get_link_status
2773 * ha = adapter block pointer.
2774 * loop_id = device loop ID.
2775 * ret_buf = pointer to link status return buffer.
2779 * BIT_0 = mem alloc error.
2780 * BIT_1 = mailbox error.
2783 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2784 struct link_statistics *stats, dma_addr_t stats_dma)
2788 mbx_cmd_t *mcp = &mc;
2789 uint32_t *iter = (void *)stats;
2790 ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter);
2791 struct qla_hw_data *ha = vha->hw;
2793 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2794 "Entered %s.\n", __func__);
2796 mcp->mb[0] = MBC_GET_LINK_STATUS;
2797 mcp->mb[2] = MSW(LSD(stats_dma));
2798 mcp->mb[3] = LSW(LSD(stats_dma));
2799 mcp->mb[6] = MSW(MSD(stats_dma));
2800 mcp->mb[7] = LSW(MSD(stats_dma));
2801 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2803 if (IS_FWI2_CAPABLE(ha)) {
2804 mcp->mb[1] = loop_id;
2807 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2808 mcp->in_mb |= MBX_1;
2809 } else if (HAS_EXTENDED_IDS(ha)) {
2810 mcp->mb[1] = loop_id;
2812 mcp->out_mb |= MBX_10|MBX_1;
2814 mcp->mb[1] = loop_id << 8;
2815 mcp->out_mb |= MBX_1;
2817 mcp->tov = MBX_TOV_SECONDS;
2818 mcp->flags = IOCTL_CMD;
2819 rval = qla2x00_mailbox_command(vha, mcp);
2821 if (rval == QLA_SUCCESS) {
2822 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2823 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2824 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2825 rval = QLA_FUNCTION_FAILED;
2827 /* Re-endianize - firmware data is le32. */
2828 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2829 "Done %s.\n", __func__);
2830 for ( ; dwords--; iter++)
2835 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2842 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2843 dma_addr_t stats_dma, uint16_t options)
2847 mbx_cmd_t *mcp = &mc;
2848 uint32_t *iter, dwords;
2850 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2851 "Entered %s.\n", __func__);
2853 memset(&mc, 0, sizeof(mc));
2854 mc.mb[0] = MBC_GET_LINK_PRIV_STATS;
2855 mc.mb[2] = MSW(stats_dma);
2856 mc.mb[3] = LSW(stats_dma);
2857 mc.mb[6] = MSW(MSD(stats_dma));
2858 mc.mb[7] = LSW(MSD(stats_dma));
2859 mc.mb[8] = sizeof(struct link_statistics) / 4;
2860 mc.mb[9] = cpu_to_le16(vha->vp_idx);
2861 mc.mb[10] = cpu_to_le16(options);
2863 rval = qla24xx_send_mb_cmd(vha, &mc);
2865 if (rval == QLA_SUCCESS) {
2866 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2867 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2868 "Failed mb[0]=%x.\n", mcp->mb[0]);
2869 rval = QLA_FUNCTION_FAILED;
2871 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2872 "Done %s.\n", __func__);
2873 /* Re-endianize - firmware data is le32. */
2874 dwords = sizeof(struct link_statistics) / 4;
2875 iter = &stats->link_fail_cnt;
2876 for ( ; dwords--; iter++)
2881 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2888 qla24xx_abort_command(srb_t *sp)
2891 unsigned long flags = 0;
2893 struct abort_entry_24xx *abt;
2896 fc_port_t *fcport = sp->fcport;
2897 struct scsi_qla_host *vha = fcport->vha;
2898 struct qla_hw_data *ha = vha->hw;
2899 struct req_que *req = vha->req;
2901 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2902 "Entered %s.\n", __func__);
2904 if (vha->flags.qpairs_available && sp->qpair)
2905 req = sp->qpair->req;
2907 if (ql2xasynctmfenable)
2908 return qla24xx_async_abort_command(sp);
2910 spin_lock_irqsave(&ha->hardware_lock, flags);
2911 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2912 if (req->outstanding_cmds[handle] == sp)
2915 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2916 if (handle == req->num_outstanding_cmds) {
2917 /* Command not found. */
2918 return QLA_FUNCTION_FAILED;
2921 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2923 ql_log(ql_log_warn, vha, 0x108d,
2924 "Failed to allocate abort IOCB.\n");
2925 return QLA_MEMORY_ALLOC_FAILED;
2927 memset(abt, 0, sizeof(struct abort_entry_24xx));
2929 abt->entry_type = ABORT_IOCB_TYPE;
2930 abt->entry_count = 1;
2931 abt->handle = MAKE_HANDLE(req->id, abt->handle);
2932 abt->nport_handle = cpu_to_le16(fcport->loop_id);
2933 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2934 abt->port_id[0] = fcport->d_id.b.al_pa;
2935 abt->port_id[1] = fcport->d_id.b.area;
2936 abt->port_id[2] = fcport->d_id.b.domain;
2937 abt->vp_index = fcport->vha->vp_idx;
2939 abt->req_que_no = cpu_to_le16(req->id);
2941 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2942 if (rval != QLA_SUCCESS) {
2943 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2944 "Failed to issue IOCB (%x).\n", rval);
2945 } else if (abt->entry_status != 0) {
2946 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2947 "Failed to complete IOCB -- error status (%x).\n",
2949 rval = QLA_FUNCTION_FAILED;
2950 } else if (abt->nport_handle != cpu_to_le16(0)) {
2951 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2952 "Failed to complete IOCB -- completion status (%x).\n",
2953 le16_to_cpu(abt->nport_handle));
2954 if (abt->nport_handle == CS_IOCB_ERROR)
2955 rval = QLA_FUNCTION_PARAMETER_ERROR;
2957 rval = QLA_FUNCTION_FAILED;
2959 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2960 "Done %s.\n", __func__);
2963 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2968 struct tsk_mgmt_cmd {
2970 struct tsk_mgmt_entry tsk;
2971 struct sts_entry_24xx sts;
2976 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2977 uint64_t l, int tag)
2980 struct tsk_mgmt_cmd *tsk;
2981 struct sts_entry_24xx *sts;
2983 scsi_qla_host_t *vha;
2984 struct qla_hw_data *ha;
2985 struct req_que *req;
2986 struct rsp_que *rsp;
2987 struct qla_qpair *qpair;
2993 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2994 "Entered %s.\n", __func__);
2996 if (vha->vp_idx && vha->qpair) {
3005 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
3007 ql_log(ql_log_warn, vha, 0x1093,
3008 "Failed to allocate task management IOCB.\n");
3009 return QLA_MEMORY_ALLOC_FAILED;
3011 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
3013 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
3014 tsk->p.tsk.entry_count = 1;
3015 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
3016 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
3017 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
3018 tsk->p.tsk.control_flags = cpu_to_le32(type);
3019 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
3020 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
3021 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
3022 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
3023 if (type == TCF_LUN_RESET) {
3024 int_to_scsilun(l, &tsk->p.tsk.lun);
3025 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
3026 sizeof(tsk->p.tsk.lun));
3030 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
3031 if (rval != QLA_SUCCESS) {
3032 ql_dbg(ql_dbg_mbx, vha, 0x1094,
3033 "Failed to issue %s reset IOCB (%x).\n", name, rval);
3034 } else if (sts->entry_status != 0) {
3035 ql_dbg(ql_dbg_mbx, vha, 0x1095,
3036 "Failed to complete IOCB -- error status (%x).\n",
3038 rval = QLA_FUNCTION_FAILED;
3039 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3040 ql_dbg(ql_dbg_mbx, vha, 0x1096,
3041 "Failed to complete IOCB -- completion status (%x).\n",
3042 le16_to_cpu(sts->comp_status));
3043 rval = QLA_FUNCTION_FAILED;
3044 } else if (le16_to_cpu(sts->scsi_status) &
3045 SS_RESPONSE_INFO_LEN_VALID) {
3046 if (le32_to_cpu(sts->rsp_data_len) < 4) {
3047 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3048 "Ignoring inconsistent data length -- not enough "
3049 "response info (%d).\n",
3050 le32_to_cpu(sts->rsp_data_len));
3051 } else if (sts->data[3]) {
3052 ql_dbg(ql_dbg_mbx, vha, 0x1098,
3053 "Failed to complete IOCB -- response (%x).\n",
3055 rval = QLA_FUNCTION_FAILED;
3059 /* Issue marker IOCB. */
3060 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
3061 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
3062 if (rval2 != QLA_SUCCESS) {
3063 ql_dbg(ql_dbg_mbx, vha, 0x1099,
3064 "Failed to issue marker IOCB (%x).\n", rval2);
3066 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
3067 "Done %s.\n", __func__);
3070 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3076 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3078 struct qla_hw_data *ha = fcport->vha->hw;
3080 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3081 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
3083 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3087 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3089 struct qla_hw_data *ha = fcport->vha->hw;
3091 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3092 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
3094 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3098 qla2x00_system_error(scsi_qla_host_t *vha)
3102 mbx_cmd_t *mcp = &mc;
3103 struct qla_hw_data *ha = vha->hw;
3105 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3106 return QLA_FUNCTION_FAILED;
3108 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
3109 "Entered %s.\n", __func__);
3111 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
3112 mcp->out_mb = MBX_0;
3116 rval = qla2x00_mailbox_command(vha, mcp);
3118 if (rval != QLA_SUCCESS) {
3119 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3121 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
3122 "Done %s.\n", __func__);
3129 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
3133 mbx_cmd_t *mcp = &mc;
3135 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3136 !IS_QLA27XX(vha->hw))
3137 return QLA_FUNCTION_FAILED;
3139 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
3140 "Entered %s.\n", __func__);
3142 mcp->mb[0] = MBC_WRITE_SERDES;
3144 if (IS_QLA2031(vha->hw))
3145 mcp->mb[2] = data & 0xff;
3150 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
3152 mcp->tov = MBX_TOV_SECONDS;
3154 rval = qla2x00_mailbox_command(vha, mcp);
3156 if (rval != QLA_SUCCESS) {
3157 ql_dbg(ql_dbg_mbx, vha, 0x1183,
3158 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3160 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
3161 "Done %s.\n", __func__);
3168 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
3172 mbx_cmd_t *mcp = &mc;
3174 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3175 !IS_QLA27XX(vha->hw))
3176 return QLA_FUNCTION_FAILED;
3178 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
3179 "Entered %s.\n", __func__);
3181 mcp->mb[0] = MBC_READ_SERDES;
3184 mcp->out_mb = MBX_3|MBX_1|MBX_0;
3185 mcp->in_mb = MBX_1|MBX_0;
3186 mcp->tov = MBX_TOV_SECONDS;
3188 rval = qla2x00_mailbox_command(vha, mcp);
3190 if (IS_QLA2031(vha->hw))
3191 *data = mcp->mb[1] & 0xff;
3195 if (rval != QLA_SUCCESS) {
3196 ql_dbg(ql_dbg_mbx, vha, 0x1186,
3197 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3199 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
3200 "Done %s.\n", __func__);
3207 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
3211 mbx_cmd_t *mcp = &mc;
3213 if (!IS_QLA8044(vha->hw))
3214 return QLA_FUNCTION_FAILED;
3216 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1186,
3217 "Entered %s.\n", __func__);
3219 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3220 mcp->mb[1] = HCS_WRITE_SERDES;
3221 mcp->mb[3] = LSW(addr);
3222 mcp->mb[4] = MSW(addr);
3223 mcp->mb[5] = LSW(data);
3224 mcp->mb[6] = MSW(data);
3225 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
3227 mcp->tov = MBX_TOV_SECONDS;
3229 rval = qla2x00_mailbox_command(vha, mcp);
3231 if (rval != QLA_SUCCESS) {
3232 ql_dbg(ql_dbg_mbx, vha, 0x1187,
3233 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3235 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
3236 "Done %s.\n", __func__);
3243 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
3247 mbx_cmd_t *mcp = &mc;
3249 if (!IS_QLA8044(vha->hw))
3250 return QLA_FUNCTION_FAILED;
3252 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
3253 "Entered %s.\n", __func__);
3255 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3256 mcp->mb[1] = HCS_READ_SERDES;
3257 mcp->mb[3] = LSW(addr);
3258 mcp->mb[4] = MSW(addr);
3259 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
3260 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3261 mcp->tov = MBX_TOV_SECONDS;
3263 rval = qla2x00_mailbox_command(vha, mcp);
3265 *data = mcp->mb[2] << 16 | mcp->mb[1];
3267 if (rval != QLA_SUCCESS) {
3268 ql_dbg(ql_dbg_mbx, vha, 0x118a,
3269 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3271 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
3272 "Done %s.\n", __func__);
3279 * qla2x00_set_serdes_params() -
3285 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3286 uint16_t sw_em_2g, uint16_t sw_em_4g)
3290 mbx_cmd_t *mcp = &mc;
3292 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3293 "Entered %s.\n", __func__);
3295 mcp->mb[0] = MBC_SERDES_PARAMS;
3297 mcp->mb[2] = sw_em_1g | BIT_15;
3298 mcp->mb[3] = sw_em_2g | BIT_15;
3299 mcp->mb[4] = sw_em_4g | BIT_15;
3300 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3302 mcp->tov = MBX_TOV_SECONDS;
3304 rval = qla2x00_mailbox_command(vha, mcp);
3306 if (rval != QLA_SUCCESS) {
3308 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3309 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3312 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3313 "Done %s.\n", __func__);
3320 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3324 mbx_cmd_t *mcp = &mc;
3326 if (!IS_FWI2_CAPABLE(vha->hw))
3327 return QLA_FUNCTION_FAILED;
3329 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3330 "Entered %s.\n", __func__);
3332 mcp->mb[0] = MBC_STOP_FIRMWARE;
3334 mcp->out_mb = MBX_1|MBX_0;
3338 rval = qla2x00_mailbox_command(vha, mcp);
3340 if (rval != QLA_SUCCESS) {
3341 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3342 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3343 rval = QLA_INVALID_COMMAND;
3345 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3346 "Done %s.\n", __func__);
3353 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3358 mbx_cmd_t *mcp = &mc;
3360 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3361 "Entered %s.\n", __func__);
3363 if (!IS_FWI2_CAPABLE(vha->hw))
3364 return QLA_FUNCTION_FAILED;
3366 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3367 return QLA_FUNCTION_FAILED;
3369 mcp->mb[0] = MBC_TRACE_CONTROL;
3370 mcp->mb[1] = TC_EFT_ENABLE;
3371 mcp->mb[2] = LSW(eft_dma);
3372 mcp->mb[3] = MSW(eft_dma);
3373 mcp->mb[4] = LSW(MSD(eft_dma));
3374 mcp->mb[5] = MSW(MSD(eft_dma));
3375 mcp->mb[6] = buffers;
3376 mcp->mb[7] = TC_AEN_DISABLE;
3377 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3378 mcp->in_mb = MBX_1|MBX_0;
3379 mcp->tov = MBX_TOV_SECONDS;
3381 rval = qla2x00_mailbox_command(vha, mcp);
3382 if (rval != QLA_SUCCESS) {
3383 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3384 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3385 rval, mcp->mb[0], mcp->mb[1]);
3387 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3388 "Done %s.\n", __func__);
3395 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3399 mbx_cmd_t *mcp = &mc;
3401 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3402 "Entered %s.\n", __func__);
3404 if (!IS_FWI2_CAPABLE(vha->hw))
3405 return QLA_FUNCTION_FAILED;
3407 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3408 return QLA_FUNCTION_FAILED;
3410 mcp->mb[0] = MBC_TRACE_CONTROL;
3411 mcp->mb[1] = TC_EFT_DISABLE;
3412 mcp->out_mb = MBX_1|MBX_0;
3413 mcp->in_mb = MBX_1|MBX_0;
3414 mcp->tov = MBX_TOV_SECONDS;
3416 rval = qla2x00_mailbox_command(vha, mcp);
3417 if (rval != QLA_SUCCESS) {
3418 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3419 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3420 rval, mcp->mb[0], mcp->mb[1]);
3422 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3423 "Done %s.\n", __func__);
3430 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3431 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3435 mbx_cmd_t *mcp = &mc;
3437 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3438 "Entered %s.\n", __func__);
3440 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3441 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3442 return QLA_FUNCTION_FAILED;
3444 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3445 return QLA_FUNCTION_FAILED;
3447 mcp->mb[0] = MBC_TRACE_CONTROL;
3448 mcp->mb[1] = TC_FCE_ENABLE;
3449 mcp->mb[2] = LSW(fce_dma);
3450 mcp->mb[3] = MSW(fce_dma);
3451 mcp->mb[4] = LSW(MSD(fce_dma));
3452 mcp->mb[5] = MSW(MSD(fce_dma));
3453 mcp->mb[6] = buffers;
3454 mcp->mb[7] = TC_AEN_DISABLE;
3456 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3457 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3458 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3460 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3461 mcp->tov = MBX_TOV_SECONDS;
3463 rval = qla2x00_mailbox_command(vha, mcp);
3464 if (rval != QLA_SUCCESS) {
3465 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3466 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3467 rval, mcp->mb[0], mcp->mb[1]);
3469 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3470 "Done %s.\n", __func__);
3473 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3482 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3486 mbx_cmd_t *mcp = &mc;
3488 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3489 "Entered %s.\n", __func__);
3491 if (!IS_FWI2_CAPABLE(vha->hw))
3492 return QLA_FUNCTION_FAILED;
3494 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3495 return QLA_FUNCTION_FAILED;
3497 mcp->mb[0] = MBC_TRACE_CONTROL;
3498 mcp->mb[1] = TC_FCE_DISABLE;
3499 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3500 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3501 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3503 mcp->tov = MBX_TOV_SECONDS;
3505 rval = qla2x00_mailbox_command(vha, mcp);
3506 if (rval != QLA_SUCCESS) {
3507 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3508 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3509 rval, mcp->mb[0], mcp->mb[1]);
3511 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3512 "Done %s.\n", __func__);
3515 *wr = (uint64_t) mcp->mb[5] << 48 |
3516 (uint64_t) mcp->mb[4] << 32 |
3517 (uint64_t) mcp->mb[3] << 16 |
3518 (uint64_t) mcp->mb[2];
3520 *rd = (uint64_t) mcp->mb[9] << 48 |
3521 (uint64_t) mcp->mb[8] << 32 |
3522 (uint64_t) mcp->mb[7] << 16 |
3523 (uint64_t) mcp->mb[6];
3530 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3531 uint16_t *port_speed, uint16_t *mb)
3535 mbx_cmd_t *mcp = &mc;
3537 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3538 "Entered %s.\n", __func__);
3540 if (!IS_IIDMA_CAPABLE(vha->hw))
3541 return QLA_FUNCTION_FAILED;
3543 mcp->mb[0] = MBC_PORT_PARAMS;
3544 mcp->mb[1] = loop_id;
3545 mcp->mb[2] = mcp->mb[3] = 0;
3546 mcp->mb[9] = vha->vp_idx;
3547 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3548 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3549 mcp->tov = MBX_TOV_SECONDS;
3551 rval = qla2x00_mailbox_command(vha, mcp);
3553 /* Return mailbox statuses. */
3560 if (rval != QLA_SUCCESS) {
3561 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3563 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3564 "Done %s.\n", __func__);
3566 *port_speed = mcp->mb[3];
3573 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3574 uint16_t port_speed, uint16_t *mb)
3578 mbx_cmd_t *mcp = &mc;
3580 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3581 "Entered %s.\n", __func__);
3583 if (!IS_IIDMA_CAPABLE(vha->hw))
3584 return QLA_FUNCTION_FAILED;
3586 mcp->mb[0] = MBC_PORT_PARAMS;
3587 mcp->mb[1] = loop_id;
3589 if (IS_CNA_CAPABLE(vha->hw))
3590 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3592 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3593 mcp->mb[9] = vha->vp_idx;
3594 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3595 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3596 mcp->tov = MBX_TOV_SECONDS;
3598 rval = qla2x00_mailbox_command(vha, mcp);
3600 /* Return mailbox statuses. */
3607 if (rval != QLA_SUCCESS) {
3608 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3609 "Failed=%x.\n", rval);
3611 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3612 "Done %s.\n", __func__);
3619 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3620 struct vp_rpt_id_entry_24xx *rptid_entry)
3622 struct qla_hw_data *ha = vha->hw;
3623 scsi_qla_host_t *vp = NULL;
3624 unsigned long flags;
3628 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3629 "Entered %s.\n", __func__);
3631 if (rptid_entry->entry_status != 0)
3634 id.b.domain = rptid_entry->port_id[2];
3635 id.b.area = rptid_entry->port_id[1];
3636 id.b.al_pa = rptid_entry->port_id[0];
3639 if (rptid_entry->format == 0) {
3641 ql_dbg(ql_dbg_async, vha, 0x10b7,
3642 "Format 0 : Number of VPs setup %d, number of "
3643 "VPs acquired %d.\n", rptid_entry->vp_setup,
3644 rptid_entry->vp_acquired);
3645 ql_dbg(ql_dbg_async, vha, 0x10b8,
3646 "Primary port id %02x%02x%02x.\n",
3647 rptid_entry->port_id[2], rptid_entry->port_id[1],
3648 rptid_entry->port_id[0]);
3650 qlt_update_host_map(vha, id);
3652 } else if (rptid_entry->format == 1) {
3654 ql_dbg(ql_dbg_async, vha, 0x10b9,
3655 "Format 1: VP[%d] enabled - status %d - with "
3656 "port id %02x%02x%02x.\n", rptid_entry->vp_idx,
3657 rptid_entry->vp_status,
3658 rptid_entry->port_id[2], rptid_entry->port_id[1],
3659 rptid_entry->port_id[0]);
3661 /* buffer to buffer credit flag */
3662 vha->flags.bbcr_enable = (rptid_entry->u.f1.bbcr & 0xf) != 0;
3664 if (rptid_entry->vp_idx == 0) {
3665 if (rptid_entry->vp_status == VP_STAT_COMPL) {
3666 /* FA-WWN is only for physical port */
3667 if (qla_ini_mode_enabled(vha) &&
3668 ha->flags.fawwpn_enabled &&
3669 (rptid_entry->u.f1.flags &
3670 VP_FLAGS_NAME_VALID)) {
3671 memcpy(vha->port_name,
3672 rptid_entry->u.f1.port_name,
3676 qlt_update_host_map(vha, id);
3679 fc_host_port_name(vha->host) =
3680 wwn_to_u64(vha->port_name);
3682 if (qla_ini_mode_enabled(vha))
3683 ql_dbg(ql_dbg_mbx, vha, 0x1018,
3684 "FA-WWN portname %016llx (%x)\n",
3685 fc_host_port_name(vha->host),
3686 rptid_entry->vp_status);
3688 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
3689 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
3691 if (rptid_entry->vp_status != VP_STAT_COMPL &&
3692 rptid_entry->vp_status != VP_STAT_ID_CHG) {
3693 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3694 "Could not acquire ID for VP[%d].\n",
3695 rptid_entry->vp_idx);
3700 spin_lock_irqsave(&ha->vport_slock, flags);
3701 list_for_each_entry(vp, &ha->vp_list, list) {
3702 if (rptid_entry->vp_idx == vp->vp_idx) {
3707 spin_unlock_irqrestore(&ha->vport_slock, flags);
3712 qlt_update_host_map(vp, id);
3715 * Cannot configure here as we are still sitting on the
3716 * response queue. Handle it in dpc context.
3718 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3719 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3720 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3722 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3723 qla2xxx_wake_dpc(vha);
3724 } else if (rptid_entry->format == 2) {
3725 ql_dbg(ql_dbg_async, vha, 0xffff,
3726 "RIDA: format 2/N2N Primary port id %02x%02x%02x.\n",
3727 rptid_entry->port_id[2], rptid_entry->port_id[1],
3728 rptid_entry->port_id[0]);
3730 ql_dbg(ql_dbg_async, vha, 0xffff,
3731 "N2N: Remote WWPN %8phC.\n",
3732 rptid_entry->u.f2.port_name);
3734 /* N2N. direct connect */
3735 vha->d_id.b.domain = rptid_entry->port_id[2];
3736 vha->d_id.b.area = rptid_entry->port_id[1];
3737 vha->d_id.b.al_pa = rptid_entry->port_id[0];
3739 spin_lock_irqsave(&ha->vport_slock, flags);
3740 qlt_update_vp_map(vha, SET_AL_PA);
3741 spin_unlock_irqrestore(&ha->vport_slock, flags);
3746 * qla24xx_modify_vp_config
3747 * Change VP configuration for vha
3750 * vha = adapter block pointer.
3753 * qla2xxx local function return status code.
3759 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3762 struct vp_config_entry_24xx *vpmod;
3763 dma_addr_t vpmod_dma;
3764 struct qla_hw_data *ha = vha->hw;
3765 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3767 /* This can be called by the parent */
3769 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3770 "Entered %s.\n", __func__);
3772 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3774 ql_log(ql_log_warn, vha, 0x10bc,
3775 "Failed to allocate modify VP IOCB.\n");
3776 return QLA_MEMORY_ALLOC_FAILED;
3779 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3780 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3781 vpmod->entry_count = 1;
3782 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3783 vpmod->vp_count = 1;
3784 vpmod->vp_index1 = vha->vp_idx;
3785 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3787 qlt_modify_vp_config(vha, vpmod);
3789 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3790 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3791 vpmod->entry_count = 1;
3793 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3794 if (rval != QLA_SUCCESS) {
3795 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3796 "Failed to issue VP config IOCB (%x).\n", rval);
3797 } else if (vpmod->comp_status != 0) {
3798 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3799 "Failed to complete IOCB -- error status (%x).\n",
3800 vpmod->comp_status);
3801 rval = QLA_FUNCTION_FAILED;
3802 } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
3803 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3804 "Failed to complete IOCB -- completion status (%x).\n",
3805 le16_to_cpu(vpmod->comp_status));
3806 rval = QLA_FUNCTION_FAILED;
3809 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3810 "Done %s.\n", __func__);
3811 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3813 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3819 * qla24xx_control_vp
3820 * Enable a virtual port for given host
3823 * ha = adapter block pointer.
3824 * vhba = virtual adapter (unused)
3825 * index = index number for enabled VP
3828 * qla2xxx local function return status code.
3834 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3838 struct vp_ctrl_entry_24xx *vce;
3840 struct qla_hw_data *ha = vha->hw;
3841 int vp_index = vha->vp_idx;
3842 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3844 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3845 "Entered %s enabling index %d.\n", __func__, vp_index);
3847 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3848 return QLA_PARAMETER_ERROR;
3850 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3852 ql_log(ql_log_warn, vha, 0x10c2,
3853 "Failed to allocate VP control IOCB.\n");
3854 return QLA_MEMORY_ALLOC_FAILED;
3856 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3858 vce->entry_type = VP_CTRL_IOCB_TYPE;
3859 vce->entry_count = 1;
3860 vce->command = cpu_to_le16(cmd);
3861 vce->vp_count = cpu_to_le16(1);
3863 /* index map in firmware starts with 1; decrement index
3864 * this is ok as we never use index 0
3866 map = (vp_index - 1) / 8;
3867 pos = (vp_index - 1) & 7;
3868 mutex_lock(&ha->vport_lock);
3869 vce->vp_idx_map[map] |= 1 << pos;
3870 mutex_unlock(&ha->vport_lock);
3872 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3873 if (rval != QLA_SUCCESS) {
3874 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3875 "Failed to issue VP control IOCB (%x).\n", rval);
3876 } else if (vce->entry_status != 0) {
3877 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3878 "Failed to complete IOCB -- error status (%x).\n",
3880 rval = QLA_FUNCTION_FAILED;
3881 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
3882 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3883 "Failed to complet IOCB -- completion status (%x).\n",
3884 le16_to_cpu(vce->comp_status));
3885 rval = QLA_FUNCTION_FAILED;
3887 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3888 "Done %s.\n", __func__);
3891 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3897 * qla2x00_send_change_request
3898 * Receive or disable RSCN request from fabric controller
3901 * ha = adapter block pointer
3902 * format = registration format:
3904 * 1 - Fabric detected registration
3905 * 2 - N_port detected registration
3906 * 3 - Full registration
3907 * FF - clear registration
3908 * vp_idx = Virtual port index
3911 * qla2x00 local function return status code.
3918 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3923 mbx_cmd_t *mcp = &mc;
3925 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3926 "Entered %s.\n", __func__);
3928 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3929 mcp->mb[1] = format;
3930 mcp->mb[9] = vp_idx;
3931 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3932 mcp->in_mb = MBX_0|MBX_1;
3933 mcp->tov = MBX_TOV_SECONDS;
3935 rval = qla2x00_mailbox_command(vha, mcp);
3937 if (rval == QLA_SUCCESS) {
3938 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3948 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3953 mbx_cmd_t *mcp = &mc;
3955 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3956 "Entered %s.\n", __func__);
3958 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3959 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3960 mcp->mb[8] = MSW(addr);
3961 mcp->out_mb = MBX_8|MBX_0;
3963 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3964 mcp->out_mb = MBX_0;
3966 mcp->mb[1] = LSW(addr);
3967 mcp->mb[2] = MSW(req_dma);
3968 mcp->mb[3] = LSW(req_dma);
3969 mcp->mb[6] = MSW(MSD(req_dma));
3970 mcp->mb[7] = LSW(MSD(req_dma));
3971 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3972 if (IS_FWI2_CAPABLE(vha->hw)) {
3973 mcp->mb[4] = MSW(size);
3974 mcp->mb[5] = LSW(size);
3975 mcp->out_mb |= MBX_5|MBX_4;
3977 mcp->mb[4] = LSW(size);
3978 mcp->out_mb |= MBX_4;
3982 mcp->tov = MBX_TOV_SECONDS;
3984 rval = qla2x00_mailbox_command(vha, mcp);
3986 if (rval != QLA_SUCCESS) {
3987 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3988 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3990 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3991 "Done %s.\n", __func__);
3996 /* 84XX Support **************************************************************/
3998 struct cs84xx_mgmt_cmd {
4000 struct verify_chip_entry_84xx req;
4001 struct verify_chip_rsp_84xx rsp;
4006 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
4009 struct cs84xx_mgmt_cmd *mn;
4012 unsigned long flags;
4013 struct qla_hw_data *ha = vha->hw;
4015 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
4016 "Entered %s.\n", __func__);
4018 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
4020 return QLA_MEMORY_ALLOC_FAILED;
4024 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
4025 /* Diagnostic firmware? */
4026 /* options |= MENLO_DIAG_FW; */
4027 /* We update the firmware with only one data sequence. */
4028 options |= VCO_END_OF_DATA;
4032 memset(mn, 0, sizeof(*mn));
4033 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
4034 mn->p.req.entry_count = 1;
4035 mn->p.req.options = cpu_to_le16(options);
4037 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
4038 "Dump of Verify Request.\n");
4039 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
4040 (uint8_t *)mn, sizeof(*mn));
4042 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4043 if (rval != QLA_SUCCESS) {
4044 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
4045 "Failed to issue verify IOCB (%x).\n", rval);
4049 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
4050 "Dump of Verify Response.\n");
4051 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
4052 (uint8_t *)mn, sizeof(*mn));
4054 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
4055 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
4056 le16_to_cpu(mn->p.rsp.failure_code) : 0;
4057 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
4058 "cs=%x fc=%x.\n", status[0], status[1]);
4060 if (status[0] != CS_COMPLETE) {
4061 rval = QLA_FUNCTION_FAILED;
4062 if (!(options & VCO_DONT_UPDATE_FW)) {
4063 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
4064 "Firmware update failed. Retrying "
4065 "without update firmware.\n");
4066 options |= VCO_DONT_UPDATE_FW;
4067 options &= ~VCO_FORCE_UPDATE;
4071 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4072 "Firmware updated to %x.\n",
4073 le32_to_cpu(mn->p.rsp.fw_ver));
4075 /* NOTE: we only update OP firmware. */
4076 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
4077 ha->cs84xx->op_fw_version =
4078 le32_to_cpu(mn->p.rsp.fw_ver);
4079 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
4085 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
4087 if (rval != QLA_SUCCESS) {
4088 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
4089 "Failed=%x.\n", rval);
4091 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
4092 "Done %s.\n", __func__);
4099 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4102 unsigned long flags;
4104 mbx_cmd_t *mcp = &mc;
4105 struct qla_hw_data *ha = vha->hw;
4107 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
4108 "Entered %s.\n", __func__);
4110 if (IS_SHADOW_REG_CAPABLE(ha))
4111 req->options |= BIT_13;
4113 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4114 mcp->mb[1] = req->options;
4115 mcp->mb[2] = MSW(LSD(req->dma));
4116 mcp->mb[3] = LSW(LSD(req->dma));
4117 mcp->mb[6] = MSW(MSD(req->dma));
4118 mcp->mb[7] = LSW(MSD(req->dma));
4119 mcp->mb[5] = req->length;
4121 mcp->mb[10] = req->rsp->id;
4122 mcp->mb[12] = req->qos;
4123 mcp->mb[11] = req->vp_idx;
4124 mcp->mb[13] = req->rid;
4125 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4128 mcp->mb[4] = req->id;
4129 /* que in ptr index */
4131 /* que out ptr index */
4132 mcp->mb[9] = *req->out_ptr = 0;
4133 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
4134 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4136 mcp->flags = MBX_DMA_OUT;
4137 mcp->tov = MBX_TOV_SECONDS * 2;
4139 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
4140 mcp->in_mb |= MBX_1;
4141 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4142 mcp->out_mb |= MBX_15;
4143 /* debug q create issue in SR-IOV */
4144 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4147 spin_lock_irqsave(&ha->hardware_lock, flags);
4148 if (!(req->options & BIT_0)) {
4149 WRT_REG_DWORD(req->req_q_in, 0);
4150 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4151 WRT_REG_DWORD(req->req_q_out, 0);
4153 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4155 rval = qla2x00_mailbox_command(vha, mcp);
4156 if (rval != QLA_SUCCESS) {
4157 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
4158 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4160 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
4161 "Done %s.\n", __func__);
4168 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4171 unsigned long flags;
4173 mbx_cmd_t *mcp = &mc;
4174 struct qla_hw_data *ha = vha->hw;
4176 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
4177 "Entered %s.\n", __func__);
4179 if (IS_SHADOW_REG_CAPABLE(ha))
4180 rsp->options |= BIT_13;
4182 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4183 mcp->mb[1] = rsp->options;
4184 mcp->mb[2] = MSW(LSD(rsp->dma));
4185 mcp->mb[3] = LSW(LSD(rsp->dma));
4186 mcp->mb[6] = MSW(MSD(rsp->dma));
4187 mcp->mb[7] = LSW(MSD(rsp->dma));
4188 mcp->mb[5] = rsp->length;
4189 mcp->mb[14] = rsp->msix->entry;
4190 mcp->mb[13] = rsp->rid;
4191 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4194 mcp->mb[4] = rsp->id;
4195 /* que in ptr index */
4196 mcp->mb[8] = *rsp->in_ptr = 0;
4197 /* que out ptr index */
4199 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4200 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4202 mcp->flags = MBX_DMA_OUT;
4203 mcp->tov = MBX_TOV_SECONDS * 2;
4205 if (IS_QLA81XX(ha)) {
4206 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
4207 mcp->in_mb |= MBX_1;
4208 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4209 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
4210 mcp->in_mb |= MBX_1;
4211 /* debug q create issue in SR-IOV */
4212 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4215 spin_lock_irqsave(&ha->hardware_lock, flags);
4216 if (!(rsp->options & BIT_0)) {
4217 WRT_REG_DWORD(rsp->rsp_q_out, 0);
4218 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4219 WRT_REG_DWORD(rsp->rsp_q_in, 0);
4222 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4224 rval = qla2x00_mailbox_command(vha, mcp);
4225 if (rval != QLA_SUCCESS) {
4226 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
4227 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4229 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
4230 "Done %s.\n", __func__);
4237 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
4241 mbx_cmd_t *mcp = &mc;
4243 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
4244 "Entered %s.\n", __func__);
4246 mcp->mb[0] = MBC_IDC_ACK;
4247 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4248 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4250 mcp->tov = MBX_TOV_SECONDS;
4252 rval = qla2x00_mailbox_command(vha, mcp);
4254 if (rval != QLA_SUCCESS) {
4255 ql_dbg(ql_dbg_mbx, vha, 0x10da,
4256 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4258 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
4259 "Done %s.\n", __func__);
4266 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
4270 mbx_cmd_t *mcp = &mc;
4272 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
4273 "Entered %s.\n", __func__);
4275 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4276 !IS_QLA27XX(vha->hw))
4277 return QLA_FUNCTION_FAILED;
4279 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4280 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
4281 mcp->out_mb = MBX_1|MBX_0;
4282 mcp->in_mb = MBX_1|MBX_0;
4283 mcp->tov = MBX_TOV_SECONDS;
4285 rval = qla2x00_mailbox_command(vha, mcp);
4287 if (rval != QLA_SUCCESS) {
4288 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
4289 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4290 rval, mcp->mb[0], mcp->mb[1]);
4292 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
4293 "Done %s.\n", __func__);
4294 *sector_size = mcp->mb[1];
4301 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
4305 mbx_cmd_t *mcp = &mc;
4307 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4308 !IS_QLA27XX(vha->hw))
4309 return QLA_FUNCTION_FAILED;
4311 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
4312 "Entered %s.\n", __func__);
4314 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4315 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
4316 FAC_OPT_CMD_WRITE_PROTECT;
4317 mcp->out_mb = MBX_1|MBX_0;
4318 mcp->in_mb = MBX_1|MBX_0;
4319 mcp->tov = MBX_TOV_SECONDS;
4321 rval = qla2x00_mailbox_command(vha, mcp);
4323 if (rval != QLA_SUCCESS) {
4324 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4325 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4326 rval, mcp->mb[0], mcp->mb[1]);
4328 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4329 "Done %s.\n", __func__);
4336 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4340 mbx_cmd_t *mcp = &mc;
4342 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4343 !IS_QLA27XX(vha->hw))
4344 return QLA_FUNCTION_FAILED;
4346 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4347 "Entered %s.\n", __func__);
4349 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4350 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4351 mcp->mb[2] = LSW(start);
4352 mcp->mb[3] = MSW(start);
4353 mcp->mb[4] = LSW(finish);
4354 mcp->mb[5] = MSW(finish);
4355 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4356 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4357 mcp->tov = MBX_TOV_SECONDS;
4359 rval = qla2x00_mailbox_command(vha, mcp);
4361 if (rval != QLA_SUCCESS) {
4362 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4363 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4364 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4366 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4367 "Done %s.\n", __func__);
4374 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4378 mbx_cmd_t *mcp = &mc;
4380 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4381 "Entered %s.\n", __func__);
4383 mcp->mb[0] = MBC_RESTART_MPI_FW;
4384 mcp->out_mb = MBX_0;
4385 mcp->in_mb = MBX_0|MBX_1;
4386 mcp->tov = MBX_TOV_SECONDS;
4388 rval = qla2x00_mailbox_command(vha, mcp);
4390 if (rval != QLA_SUCCESS) {
4391 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4392 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4393 rval, mcp->mb[0], mcp->mb[1]);
4395 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4396 "Done %s.\n", __func__);
4403 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4407 mbx_cmd_t *mcp = &mc;
4411 struct qla_hw_data *ha = vha->hw;
4413 if (!IS_P3P_TYPE(ha))
4414 return QLA_FUNCTION_FAILED;
4416 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4417 "Entered %s.\n", __func__);
4419 str = (void *)version;
4420 len = strlen(version);
4422 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4423 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4424 mcp->out_mb = MBX_1|MBX_0;
4425 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4426 mcp->mb[i] = cpu_to_le16p(str);
4427 mcp->out_mb |= 1<<i;
4429 for (; i < 16; i++) {
4431 mcp->out_mb |= 1<<i;
4433 mcp->in_mb = MBX_1|MBX_0;
4434 mcp->tov = MBX_TOV_SECONDS;
4436 rval = qla2x00_mailbox_command(vha, mcp);
4438 if (rval != QLA_SUCCESS) {
4439 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4440 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4442 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4443 "Done %s.\n", __func__);
4450 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4454 mbx_cmd_t *mcp = &mc;
4459 struct qla_hw_data *ha = vha->hw;
4461 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4463 return QLA_FUNCTION_FAILED;
4465 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4466 "Entered %s.\n", __func__);
4468 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4470 ql_log(ql_log_warn, vha, 0x117f,
4471 "Failed to allocate driver version param.\n");
4472 return QLA_MEMORY_ALLOC_FAILED;
4475 memcpy(str, "\x7\x3\x11\x0", 4);
4477 len = dwlen * 4 - 4;
4478 memset(str + 4, 0, len);
4479 if (len > strlen(version))
4480 len = strlen(version);
4481 memcpy(str + 4, version, len);
4483 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4484 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4485 mcp->mb[2] = MSW(LSD(str_dma));
4486 mcp->mb[3] = LSW(LSD(str_dma));
4487 mcp->mb[6] = MSW(MSD(str_dma));
4488 mcp->mb[7] = LSW(MSD(str_dma));
4489 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4490 mcp->in_mb = MBX_1|MBX_0;
4491 mcp->tov = MBX_TOV_SECONDS;
4493 rval = qla2x00_mailbox_command(vha, mcp);
4495 if (rval != QLA_SUCCESS) {
4496 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4497 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4499 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4500 "Done %s.\n", __func__);
4503 dma_pool_free(ha->s_dma_pool, str, str_dma);
4509 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4513 mbx_cmd_t *mcp = &mc;
4515 if (!IS_FWI2_CAPABLE(vha->hw))
4516 return QLA_FUNCTION_FAILED;
4518 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4519 "Entered %s.\n", __func__);
4521 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4522 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4523 mcp->out_mb = MBX_1|MBX_0;
4524 mcp->in_mb = MBX_1|MBX_0;
4525 mcp->tov = MBX_TOV_SECONDS;
4527 rval = qla2x00_mailbox_command(vha, mcp);
4530 if (rval != QLA_SUCCESS) {
4531 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4532 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4534 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4535 "Done %s.\n", __func__);
4542 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4543 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4547 mbx_cmd_t *mcp = &mc;
4548 struct qla_hw_data *ha = vha->hw;
4550 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4551 "Entered %s.\n", __func__);
4553 if (!IS_FWI2_CAPABLE(ha))
4554 return QLA_FUNCTION_FAILED;
4559 mcp->mb[0] = MBC_READ_SFP;
4561 mcp->mb[2] = MSW(sfp_dma);
4562 mcp->mb[3] = LSW(sfp_dma);
4563 mcp->mb[6] = MSW(MSD(sfp_dma));
4564 mcp->mb[7] = LSW(MSD(sfp_dma));
4568 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4569 mcp->in_mb = MBX_1|MBX_0;
4570 mcp->tov = MBX_TOV_SECONDS;
4572 rval = qla2x00_mailbox_command(vha, mcp);
4577 if (rval != QLA_SUCCESS) {
4578 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4579 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4581 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4582 "Done %s.\n", __func__);
4589 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4590 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4594 mbx_cmd_t *mcp = &mc;
4595 struct qla_hw_data *ha = vha->hw;
4597 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4598 "Entered %s.\n", __func__);
4600 if (!IS_FWI2_CAPABLE(ha))
4601 return QLA_FUNCTION_FAILED;
4609 mcp->mb[0] = MBC_WRITE_SFP;
4611 mcp->mb[2] = MSW(sfp_dma);
4612 mcp->mb[3] = LSW(sfp_dma);
4613 mcp->mb[6] = MSW(MSD(sfp_dma));
4614 mcp->mb[7] = LSW(MSD(sfp_dma));
4618 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4619 mcp->in_mb = MBX_1|MBX_0;
4620 mcp->tov = MBX_TOV_SECONDS;
4622 rval = qla2x00_mailbox_command(vha, mcp);
4624 if (rval != QLA_SUCCESS) {
4625 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4626 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4628 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4629 "Done %s.\n", __func__);
4636 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4637 uint16_t size_in_bytes, uint16_t *actual_size)
4641 mbx_cmd_t *mcp = &mc;
4643 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4644 "Entered %s.\n", __func__);
4646 if (!IS_CNA_CAPABLE(vha->hw))
4647 return QLA_FUNCTION_FAILED;
4649 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4650 mcp->mb[2] = MSW(stats_dma);
4651 mcp->mb[3] = LSW(stats_dma);
4652 mcp->mb[6] = MSW(MSD(stats_dma));
4653 mcp->mb[7] = LSW(MSD(stats_dma));
4654 mcp->mb[8] = size_in_bytes >> 2;
4655 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4656 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4657 mcp->tov = MBX_TOV_SECONDS;
4659 rval = qla2x00_mailbox_command(vha, mcp);
4661 if (rval != QLA_SUCCESS) {
4662 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4663 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4664 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4666 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4667 "Done %s.\n", __func__);
4670 *actual_size = mcp->mb[2] << 2;
4677 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4682 mbx_cmd_t *mcp = &mc;
4684 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4685 "Entered %s.\n", __func__);
4687 if (!IS_CNA_CAPABLE(vha->hw))
4688 return QLA_FUNCTION_FAILED;
4690 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4692 mcp->mb[2] = MSW(tlv_dma);
4693 mcp->mb[3] = LSW(tlv_dma);
4694 mcp->mb[6] = MSW(MSD(tlv_dma));
4695 mcp->mb[7] = LSW(MSD(tlv_dma));
4697 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4698 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4699 mcp->tov = MBX_TOV_SECONDS;
4701 rval = qla2x00_mailbox_command(vha, mcp);
4703 if (rval != QLA_SUCCESS) {
4704 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4705 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4706 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4708 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4709 "Done %s.\n", __func__);
4716 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4720 mbx_cmd_t *mcp = &mc;
4722 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4723 "Entered %s.\n", __func__);
4725 if (!IS_FWI2_CAPABLE(vha->hw))
4726 return QLA_FUNCTION_FAILED;
4728 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4729 mcp->mb[1] = LSW(risc_addr);
4730 mcp->mb[8] = MSW(risc_addr);
4731 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4732 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4735 rval = qla2x00_mailbox_command(vha, mcp);
4736 if (rval != QLA_SUCCESS) {
4737 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4738 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4740 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4741 "Done %s.\n", __func__);
4742 *data = mcp->mb[3] << 16 | mcp->mb[2];
4749 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4754 mbx_cmd_t *mcp = &mc;
4756 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4757 "Entered %s.\n", __func__);
4759 memset(mcp->mb, 0 , sizeof(mcp->mb));
4760 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4761 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4763 /* transfer count */
4764 mcp->mb[10] = LSW(mreq->transfer_size);
4765 mcp->mb[11] = MSW(mreq->transfer_size);
4767 /* send data address */
4768 mcp->mb[14] = LSW(mreq->send_dma);
4769 mcp->mb[15] = MSW(mreq->send_dma);
4770 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4771 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4773 /* receive data address */
4774 mcp->mb[16] = LSW(mreq->rcv_dma);
4775 mcp->mb[17] = MSW(mreq->rcv_dma);
4776 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4777 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4779 /* Iteration count */
4780 mcp->mb[18] = LSW(mreq->iteration_count);
4781 mcp->mb[19] = MSW(mreq->iteration_count);
4783 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4784 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4785 if (IS_CNA_CAPABLE(vha->hw))
4786 mcp->out_mb |= MBX_2;
4787 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4789 mcp->buf_size = mreq->transfer_size;
4790 mcp->tov = MBX_TOV_SECONDS;
4791 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4793 rval = qla2x00_mailbox_command(vha, mcp);
4795 if (rval != QLA_SUCCESS) {
4796 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4797 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4798 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4799 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4801 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4802 "Done %s.\n", __func__);
4805 /* Copy mailbox information */
4806 memcpy( mresp, mcp->mb, 64);
4811 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4816 mbx_cmd_t *mcp = &mc;
4817 struct qla_hw_data *ha = vha->hw;
4819 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4820 "Entered %s.\n", __func__);
4822 memset(mcp->mb, 0 , sizeof(mcp->mb));
4823 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4824 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
4825 if (IS_CNA_CAPABLE(ha)) {
4826 mcp->mb[1] |= BIT_15;
4827 mcp->mb[2] = vha->fcoe_fcf_idx;
4829 mcp->mb[16] = LSW(mreq->rcv_dma);
4830 mcp->mb[17] = MSW(mreq->rcv_dma);
4831 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4832 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4834 mcp->mb[10] = LSW(mreq->transfer_size);
4836 mcp->mb[14] = LSW(mreq->send_dma);
4837 mcp->mb[15] = MSW(mreq->send_dma);
4838 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4839 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4841 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4842 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4843 if (IS_CNA_CAPABLE(ha))
4844 mcp->out_mb |= MBX_2;
4847 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4848 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4849 mcp->in_mb |= MBX_1;
4850 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4851 mcp->in_mb |= MBX_3;
4853 mcp->tov = MBX_TOV_SECONDS;
4854 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4855 mcp->buf_size = mreq->transfer_size;
4857 rval = qla2x00_mailbox_command(vha, mcp);
4859 if (rval != QLA_SUCCESS) {
4860 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4861 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4862 rval, mcp->mb[0], mcp->mb[1]);
4864 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4865 "Done %s.\n", __func__);
4868 /* Copy mailbox information */
4869 memcpy(mresp, mcp->mb, 64);
4874 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4878 mbx_cmd_t *mcp = &mc;
4880 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4881 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4883 mcp->mb[0] = MBC_ISP84XX_RESET;
4884 mcp->mb[1] = enable_diagnostic;
4885 mcp->out_mb = MBX_1|MBX_0;
4886 mcp->in_mb = MBX_1|MBX_0;
4887 mcp->tov = MBX_TOV_SECONDS;
4888 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4889 rval = qla2x00_mailbox_command(vha, mcp);
4891 if (rval != QLA_SUCCESS)
4892 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4894 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4895 "Done %s.\n", __func__);
4901 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4905 mbx_cmd_t *mcp = &mc;
4907 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4908 "Entered %s.\n", __func__);
4910 if (!IS_FWI2_CAPABLE(vha->hw))
4911 return QLA_FUNCTION_FAILED;
4913 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4914 mcp->mb[1] = LSW(risc_addr);
4915 mcp->mb[2] = LSW(data);
4916 mcp->mb[3] = MSW(data);
4917 mcp->mb[8] = MSW(risc_addr);
4918 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4922 rval = qla2x00_mailbox_command(vha, mcp);
4923 if (rval != QLA_SUCCESS) {
4924 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4925 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4927 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4928 "Done %s.\n", __func__);
4935 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4938 uint32_t stat, timer;
4940 struct qla_hw_data *ha = vha->hw;
4941 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4945 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4946 "Entered %s.\n", __func__);
4948 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4950 /* Write the MBC data to the registers */
4951 WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER);
4952 WRT_REG_WORD(®->mailbox1, mb[0]);
4953 WRT_REG_WORD(®->mailbox2, mb[1]);
4954 WRT_REG_WORD(®->mailbox3, mb[2]);
4955 WRT_REG_WORD(®->mailbox4, mb[3]);
4957 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
4959 /* Poll for MBC interrupt */
4960 for (timer = 6000000; timer; timer--) {
4961 /* Check for pending interrupts. */
4962 stat = RD_REG_DWORD(®->host_status);
4963 if (stat & HSRX_RISC_INT) {
4966 if (stat == 0x1 || stat == 0x2 ||
4967 stat == 0x10 || stat == 0x11) {
4968 set_bit(MBX_INTERRUPT,
4969 &ha->mbx_cmd_flags);
4970 mb0 = RD_REG_WORD(®->mailbox0);
4971 WRT_REG_DWORD(®->hccr,
4972 HCCRX_CLR_RISC_INT);
4973 RD_REG_DWORD(®->hccr);
4980 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4981 rval = mb0 & MBS_MASK;
4983 rval = QLA_FUNCTION_FAILED;
4985 if (rval != QLA_SUCCESS) {
4986 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4987 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4989 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4990 "Done %s.\n", __func__);
4997 qla2x00_get_data_rate(scsi_qla_host_t *vha)
5001 mbx_cmd_t *mcp = &mc;
5002 struct qla_hw_data *ha = vha->hw;
5004 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
5005 "Entered %s.\n", __func__);
5007 if (!IS_FWI2_CAPABLE(ha))
5008 return QLA_FUNCTION_FAILED;
5010 mcp->mb[0] = MBC_DATA_RATE;
5012 mcp->out_mb = MBX_1|MBX_0;
5013 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5014 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
5015 mcp->in_mb |= MBX_3;
5016 mcp->tov = MBX_TOV_SECONDS;
5018 rval = qla2x00_mailbox_command(vha, mcp);
5019 if (rval != QLA_SUCCESS) {
5020 ql_dbg(ql_dbg_mbx, vha, 0x1107,
5021 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5023 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
5024 "Done %s.\n", __func__);
5025 if (mcp->mb[1] != 0x7)
5026 ha->link_data_rate = mcp->mb[1];
5033 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5037 mbx_cmd_t *mcp = &mc;
5038 struct qla_hw_data *ha = vha->hw;
5040 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
5041 "Entered %s.\n", __func__);
5043 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
5045 return QLA_FUNCTION_FAILED;
5046 mcp->mb[0] = MBC_GET_PORT_CONFIG;
5047 mcp->out_mb = MBX_0;
5048 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5049 mcp->tov = MBX_TOV_SECONDS;
5052 rval = qla2x00_mailbox_command(vha, mcp);
5054 if (rval != QLA_SUCCESS) {
5055 ql_dbg(ql_dbg_mbx, vha, 0x110a,
5056 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5058 /* Copy all bits to preserve original value */
5059 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
5061 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
5062 "Done %s.\n", __func__);
5068 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5072 mbx_cmd_t *mcp = &mc;
5074 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
5075 "Entered %s.\n", __func__);
5077 mcp->mb[0] = MBC_SET_PORT_CONFIG;
5078 /* Copy all bits to preserve original setting */
5079 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
5080 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5082 mcp->tov = MBX_TOV_SECONDS;
5084 rval = qla2x00_mailbox_command(vha, mcp);
5086 if (rval != QLA_SUCCESS) {
5087 ql_dbg(ql_dbg_mbx, vha, 0x110d,
5088 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5090 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
5091 "Done %s.\n", __func__);
5098 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
5103 mbx_cmd_t *mcp = &mc;
5104 struct qla_hw_data *ha = vha->hw;
5106 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
5107 "Entered %s.\n", __func__);
5109 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
5110 return QLA_FUNCTION_FAILED;
5112 mcp->mb[0] = MBC_PORT_PARAMS;
5113 mcp->mb[1] = loop_id;
5114 if (ha->flags.fcp_prio_enabled)
5118 mcp->mb[4] = priority & 0xf;
5119 mcp->mb[9] = vha->vp_idx;
5120 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5121 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5124 rval = qla2x00_mailbox_command(vha, mcp);
5132 if (rval != QLA_SUCCESS) {
5133 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5135 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
5136 "Done %s.\n", __func__);
5143 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5145 int rval = QLA_FUNCTION_FAILED;
5146 struct qla_hw_data *ha = vha->hw;
5149 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
5150 ql_dbg(ql_dbg_mbx, vha, 0x1150,
5151 "Thermal not supported by this card.\n");
5155 if (IS_QLA25XX(ha)) {
5156 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5157 ha->pdev->subsystem_device == 0x0175) {
5158 rval = qla2x00_read_sfp(vha, 0, &byte,
5159 0x98, 0x1, 1, BIT_13|BIT_0);
5163 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
5164 ha->pdev->subsystem_device == 0x338e) {
5165 rval = qla2x00_read_sfp(vha, 0, &byte,
5166 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
5170 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
5171 "Thermal not supported by this card.\n");
5175 if (IS_QLA82XX(ha)) {
5176 *temp = qla82xx_read_temperature(vha);
5179 } else if (IS_QLA8044(ha)) {
5180 *temp = qla8044_read_temperature(vha);
5185 rval = qla2x00_read_asic_temperature(vha, temp);
5190 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
5193 struct qla_hw_data *ha = vha->hw;
5195 mbx_cmd_t *mcp = &mc;
5197 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
5198 "Entered %s.\n", __func__);
5200 if (!IS_FWI2_CAPABLE(ha))
5201 return QLA_FUNCTION_FAILED;
5203 memset(mcp, 0, sizeof(mbx_cmd_t));
5204 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5207 mcp->out_mb = MBX_1|MBX_0;
5212 rval = qla2x00_mailbox_command(vha, mcp);
5213 if (rval != QLA_SUCCESS) {
5214 ql_dbg(ql_dbg_mbx, vha, 0x1016,
5215 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5217 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
5218 "Done %s.\n", __func__);
5225 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
5228 struct qla_hw_data *ha = vha->hw;
5230 mbx_cmd_t *mcp = &mc;
5232 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
5233 "Entered %s.\n", __func__);
5235 if (!IS_P3P_TYPE(ha))
5236 return QLA_FUNCTION_FAILED;
5238 memset(mcp, 0, sizeof(mbx_cmd_t));
5239 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5242 mcp->out_mb = MBX_1|MBX_0;
5247 rval = qla2x00_mailbox_command(vha, mcp);
5248 if (rval != QLA_SUCCESS) {
5249 ql_dbg(ql_dbg_mbx, vha, 0x100c,
5250 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5252 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
5253 "Done %s.\n", __func__);
5260 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
5262 struct qla_hw_data *ha = vha->hw;
5264 mbx_cmd_t *mcp = &mc;
5265 int rval = QLA_FUNCTION_FAILED;
5267 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
5268 "Entered %s.\n", __func__);
5270 memset(mcp->mb, 0 , sizeof(mcp->mb));
5271 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5272 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5273 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
5274 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
5276 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5277 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
5278 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5280 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5281 mcp->tov = MBX_TOV_SECONDS;
5282 rval = qla2x00_mailbox_command(vha, mcp);
5284 /* Always copy back return mailbox values. */
5285 if (rval != QLA_SUCCESS) {
5286 ql_dbg(ql_dbg_mbx, vha, 0x1120,
5287 "mailbox command FAILED=0x%x, subcode=%x.\n",
5288 (mcp->mb[1] << 16) | mcp->mb[0],
5289 (mcp->mb[3] << 16) | mcp->mb[2]);
5291 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
5292 "Done %s.\n", __func__);
5293 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
5294 if (!ha->md_template_size) {
5295 ql_dbg(ql_dbg_mbx, vha, 0x1122,
5296 "Null template size obtained.\n");
5297 rval = QLA_FUNCTION_FAILED;
5304 qla82xx_md_get_template(scsi_qla_host_t *vha)
5306 struct qla_hw_data *ha = vha->hw;
5308 mbx_cmd_t *mcp = &mc;
5309 int rval = QLA_FUNCTION_FAILED;
5311 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
5312 "Entered %s.\n", __func__);
5314 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5315 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5316 if (!ha->md_tmplt_hdr) {
5317 ql_log(ql_log_warn, vha, 0x1124,
5318 "Unable to allocate memory for Minidump template.\n");
5322 memset(mcp->mb, 0 , sizeof(mcp->mb));
5323 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5324 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5325 mcp->mb[2] = LSW(RQST_TMPLT);
5326 mcp->mb[3] = MSW(RQST_TMPLT);
5327 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5328 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5329 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5330 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5331 mcp->mb[8] = LSW(ha->md_template_size);
5332 mcp->mb[9] = MSW(ha->md_template_size);
5334 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5335 mcp->tov = MBX_TOV_SECONDS;
5336 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5337 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5338 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5339 rval = qla2x00_mailbox_command(vha, mcp);
5341 if (rval != QLA_SUCCESS) {
5342 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5343 "mailbox command FAILED=0x%x, subcode=%x.\n",
5344 ((mcp->mb[1] << 16) | mcp->mb[0]),
5345 ((mcp->mb[3] << 16) | mcp->mb[2]));
5347 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5348 "Done %s.\n", __func__);
5353 qla8044_md_get_template(scsi_qla_host_t *vha)
5355 struct qla_hw_data *ha = vha->hw;
5357 mbx_cmd_t *mcp = &mc;
5358 int rval = QLA_FUNCTION_FAILED;
5359 int offset = 0, size = MINIDUMP_SIZE_36K;
5360 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5361 "Entered %s.\n", __func__);
5363 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5364 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5365 if (!ha->md_tmplt_hdr) {
5366 ql_log(ql_log_warn, vha, 0xb11b,
5367 "Unable to allocate memory for Minidump template.\n");
5371 memset(mcp->mb, 0 , sizeof(mcp->mb));
5372 while (offset < ha->md_template_size) {
5373 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5374 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5375 mcp->mb[2] = LSW(RQST_TMPLT);
5376 mcp->mb[3] = MSW(RQST_TMPLT);
5377 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5378 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5379 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5380 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5381 mcp->mb[8] = LSW(size);
5382 mcp->mb[9] = MSW(size);
5383 mcp->mb[10] = offset & 0x0000FFFF;
5384 mcp->mb[11] = offset & 0xFFFF0000;
5385 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5386 mcp->tov = MBX_TOV_SECONDS;
5387 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5388 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5389 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5390 rval = qla2x00_mailbox_command(vha, mcp);
5392 if (rval != QLA_SUCCESS) {
5393 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5394 "mailbox command FAILED=0x%x, subcode=%x.\n",
5395 ((mcp->mb[1] << 16) | mcp->mb[0]),
5396 ((mcp->mb[3] << 16) | mcp->mb[2]));
5399 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5400 "Done %s.\n", __func__);
5401 offset = offset + size;
5407 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5410 struct qla_hw_data *ha = vha->hw;
5412 mbx_cmd_t *mcp = &mc;
5414 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5415 return QLA_FUNCTION_FAILED;
5417 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5418 "Entered %s.\n", __func__);
5420 memset(mcp, 0, sizeof(mbx_cmd_t));
5421 mcp->mb[0] = MBC_SET_LED_CONFIG;
5422 mcp->mb[1] = led_cfg[0];
5423 mcp->mb[2] = led_cfg[1];
5424 if (IS_QLA8031(ha)) {
5425 mcp->mb[3] = led_cfg[2];
5426 mcp->mb[4] = led_cfg[3];
5427 mcp->mb[5] = led_cfg[4];
5428 mcp->mb[6] = led_cfg[5];
5431 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5433 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5438 rval = qla2x00_mailbox_command(vha, mcp);
5439 if (rval != QLA_SUCCESS) {
5440 ql_dbg(ql_dbg_mbx, vha, 0x1134,
5441 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5443 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5444 "Done %s.\n", __func__);
5451 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5454 struct qla_hw_data *ha = vha->hw;
5456 mbx_cmd_t *mcp = &mc;
5458 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5459 return QLA_FUNCTION_FAILED;
5461 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5462 "Entered %s.\n", __func__);
5464 memset(mcp, 0, sizeof(mbx_cmd_t));
5465 mcp->mb[0] = MBC_GET_LED_CONFIG;
5467 mcp->out_mb = MBX_0;
5468 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5470 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5474 rval = qla2x00_mailbox_command(vha, mcp);
5475 if (rval != QLA_SUCCESS) {
5476 ql_dbg(ql_dbg_mbx, vha, 0x1137,
5477 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5479 led_cfg[0] = mcp->mb[1];
5480 led_cfg[1] = mcp->mb[2];
5481 if (IS_QLA8031(ha)) {
5482 led_cfg[2] = mcp->mb[3];
5483 led_cfg[3] = mcp->mb[4];
5484 led_cfg[4] = mcp->mb[5];
5485 led_cfg[5] = mcp->mb[6];
5487 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5488 "Done %s.\n", __func__);
5495 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5498 struct qla_hw_data *ha = vha->hw;
5500 mbx_cmd_t *mcp = &mc;
5502 if (!IS_P3P_TYPE(ha))
5503 return QLA_FUNCTION_FAILED;
5505 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5506 "Entered %s.\n", __func__);
5508 memset(mcp, 0, sizeof(mbx_cmd_t));
5509 mcp->mb[0] = MBC_SET_LED_CONFIG;
5515 mcp->out_mb = MBX_7|MBX_0;
5517 mcp->tov = MBX_TOV_SECONDS;
5520 rval = qla2x00_mailbox_command(vha, mcp);
5521 if (rval != QLA_SUCCESS) {
5522 ql_dbg(ql_dbg_mbx, vha, 0x1128,
5523 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5525 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5526 "Done %s.\n", __func__);
5533 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5536 struct qla_hw_data *ha = vha->hw;
5538 mbx_cmd_t *mcp = &mc;
5540 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5541 return QLA_FUNCTION_FAILED;
5543 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5544 "Entered %s.\n", __func__);
5546 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5547 mcp->mb[1] = LSW(reg);
5548 mcp->mb[2] = MSW(reg);
5549 mcp->mb[3] = LSW(data);
5550 mcp->mb[4] = MSW(data);
5551 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5553 mcp->in_mb = MBX_1|MBX_0;
5554 mcp->tov = MBX_TOV_SECONDS;
5556 rval = qla2x00_mailbox_command(vha, mcp);
5558 if (rval != QLA_SUCCESS) {
5559 ql_dbg(ql_dbg_mbx, vha, 0x1131,
5560 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5562 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5563 "Done %s.\n", __func__);
5570 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5573 struct qla_hw_data *ha = vha->hw;
5575 mbx_cmd_t *mcp = &mc;
5577 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5578 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5579 "Implicit LOGO Unsupported.\n");
5580 return QLA_FUNCTION_FAILED;
5584 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5585 "Entering %s.\n", __func__);
5587 /* Perform Implicit LOGO. */
5588 mcp->mb[0] = MBC_PORT_LOGOUT;
5589 mcp->mb[1] = fcport->loop_id;
5590 mcp->mb[10] = BIT_15;
5591 mcp->out_mb = MBX_10|MBX_1|MBX_0;
5593 mcp->tov = MBX_TOV_SECONDS;
5595 rval = qla2x00_mailbox_command(vha, mcp);
5596 if (rval != QLA_SUCCESS)
5597 ql_dbg(ql_dbg_mbx, vha, 0x113d,
5598 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5600 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5601 "Done %s.\n", __func__);
5607 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5611 mbx_cmd_t *mcp = &mc;
5612 struct qla_hw_data *ha = vha->hw;
5613 unsigned long retry_max_time = jiffies + (2 * HZ);
5615 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5616 return QLA_FUNCTION_FAILED;
5618 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5621 mcp->mb[0] = MBC_READ_REMOTE_REG;
5622 mcp->mb[1] = LSW(reg);
5623 mcp->mb[2] = MSW(reg);
5624 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5625 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5626 mcp->tov = MBX_TOV_SECONDS;
5628 rval = qla2x00_mailbox_command(vha, mcp);
5630 if (rval != QLA_SUCCESS) {
5631 ql_dbg(ql_dbg_mbx, vha, 0x114c,
5632 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5633 rval, mcp->mb[0], mcp->mb[1]);
5635 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
5636 if (*data == QLA8XXX_BAD_VALUE) {
5638 * During soft-reset CAMRAM register reads might
5639 * return 0xbad0bad0. So retry for MAX of 2 sec
5640 * while reading camram registers.
5642 if (time_after(jiffies, retry_max_time)) {
5643 ql_dbg(ql_dbg_mbx, vha, 0x1141,
5644 "Failure to read CAMRAM register. "
5645 "data=0x%x.\n", *data);
5646 return QLA_FUNCTION_FAILED;
5651 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5658 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5662 mbx_cmd_t *mcp = &mc;
5663 struct qla_hw_data *ha = vha->hw;
5665 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5666 return QLA_FUNCTION_FAILED;
5668 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5670 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5671 mcp->out_mb = MBX_0;
5672 mcp->in_mb = MBX_1|MBX_0;
5673 mcp->tov = MBX_TOV_SECONDS;
5675 rval = qla2x00_mailbox_command(vha, mcp);
5677 if (rval != QLA_SUCCESS) {
5678 ql_dbg(ql_dbg_mbx, vha, 0x1144,
5679 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5680 rval, mcp->mb[0], mcp->mb[1]);
5681 ha->isp_ops->fw_dump(vha, 0);
5683 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5690 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5691 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5695 mbx_cmd_t *mcp = &mc;
5696 uint8_t subcode = (uint8_t)options;
5697 struct qla_hw_data *ha = vha->hw;
5699 if (!IS_QLA8031(ha))
5700 return QLA_FUNCTION_FAILED;
5702 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5704 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5705 mcp->mb[1] = options;
5706 mcp->out_mb = MBX_1|MBX_0;
5707 if (subcode & BIT_2) {
5708 mcp->mb[2] = LSW(start_addr);
5709 mcp->mb[3] = MSW(start_addr);
5710 mcp->mb[4] = LSW(end_addr);
5711 mcp->mb[5] = MSW(end_addr);
5712 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5714 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5715 if (!(subcode & (BIT_2 | BIT_5)))
5716 mcp->in_mb |= MBX_4|MBX_3;
5717 mcp->tov = MBX_TOV_SECONDS;
5719 rval = qla2x00_mailbox_command(vha, mcp);
5721 if (rval != QLA_SUCCESS) {
5722 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5723 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5724 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5726 ha->isp_ops->fw_dump(vha, 0);
5728 if (subcode & BIT_5)
5729 *sector_size = mcp->mb[1];
5730 else if (subcode & (BIT_6 | BIT_7)) {
5731 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5732 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5733 } else if (subcode & (BIT_3 | BIT_4)) {
5734 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5735 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5737 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5744 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5749 mbx_cmd_t *mcp = &mc;
5751 if (!IS_MCTP_CAPABLE(vha->hw))
5752 return QLA_FUNCTION_FAILED;
5754 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5755 "Entered %s.\n", __func__);
5757 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5758 mcp->mb[1] = LSW(addr);
5759 mcp->mb[2] = MSW(req_dma);
5760 mcp->mb[3] = LSW(req_dma);
5761 mcp->mb[4] = MSW(size);
5762 mcp->mb[5] = LSW(size);
5763 mcp->mb[6] = MSW(MSD(req_dma));
5764 mcp->mb[7] = LSW(MSD(req_dma));
5765 mcp->mb[8] = MSW(addr);
5766 /* Setting RAM ID to valid */
5767 mcp->mb[10] |= BIT_7;
5768 /* For MCTP RAM ID is 0x40 */
5769 mcp->mb[10] |= 0x40;
5771 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5775 mcp->tov = MBX_TOV_SECONDS;
5777 rval = qla2x00_mailbox_command(vha, mcp);
5779 if (rval != QLA_SUCCESS) {
5780 ql_dbg(ql_dbg_mbx, vha, 0x114e,
5781 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5783 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5784 "Done %s.\n", __func__);
5791 qla26xx_dport_diagnostics(scsi_qla_host_t *vha,
5792 void *dd_buf, uint size, uint options)
5796 mbx_cmd_t *mcp = &mc;
5799 if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
5800 return QLA_FUNCTION_FAILED;
5802 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
5803 "Entered %s.\n", __func__);
5805 dd_dma = dma_map_single(&vha->hw->pdev->dev,
5806 dd_buf, size, DMA_FROM_DEVICE);
5808 ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n");
5809 return QLA_MEMORY_ALLOC_FAILED;
5812 memset(dd_buf, 0, size);
5814 mcp->mb[0] = MBC_DPORT_DIAGNOSTICS;
5815 mcp->mb[1] = options;
5816 mcp->mb[2] = MSW(LSD(dd_dma));
5817 mcp->mb[3] = LSW(LSD(dd_dma));
5818 mcp->mb[6] = MSW(MSD(dd_dma));
5819 mcp->mb[7] = LSW(MSD(dd_dma));
5821 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5822 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5823 mcp->buf_size = size;
5824 mcp->flags = MBX_DMA_IN;
5825 mcp->tov = MBX_TOV_SECONDS * 4;
5826 rval = qla2x00_mailbox_command(vha, mcp);
5828 if (rval != QLA_SUCCESS) {
5829 ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval);
5831 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196,
5832 "Done %s.\n", __func__);
5835 dma_unmap_single(&vha->hw->pdev->dev, dd_dma,
5836 size, DMA_FROM_DEVICE);
5841 static void qla2x00_async_mb_sp_done(void *s, int res)
5845 sp->u.iocb_cmd.u.mbx.rc = res;
5847 complete(&sp->u.iocb_cmd.u.mbx.comp);
5848 /* don't free sp here. Let the caller do the free */
5852 * This mailbox uses the iocb interface to send MB command.
5853 * This allows non-critial (non chip setup) command to go
5856 int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp)
5858 int rval = QLA_FUNCTION_FAILED;
5862 if (!vha->hw->flags.fw_started)
5865 sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL);
5869 sp->type = SRB_MB_IOCB;
5870 sp->name = mb_to_str(mcp->mb[0]);
5872 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
5874 memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG);
5876 c = &sp->u.iocb_cmd;
5877 c->timeout = qla2x00_async_iocb_timeout;
5878 init_completion(&c->u.mbx.comp);
5880 sp->done = qla2x00_async_mb_sp_done;
5882 rval = qla2x00_start_sp(sp);
5883 if (rval != QLA_SUCCESS) {
5884 ql_dbg(ql_dbg_mbx, vha, 0xffff,
5885 "%s: %s Failed submission. %x.\n",
5886 __func__, sp->name, rval);
5890 ql_dbg(ql_dbg_mbx, vha, 0xffff, "MB:%s hndl %x submitted\n",
5891 sp->name, sp->handle);
5893 wait_for_completion(&c->u.mbx.comp);
5894 memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG);
5898 case QLA_FUNCTION_TIMEOUT:
5899 ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %s Timeout. %x.\n",
5900 __func__, sp->name, rval);
5903 ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %s done.\n",
5904 __func__, sp->name);
5908 ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %s Failed. %x.\n",
5909 __func__, sp->name, rval);
5924 * NOTE: Do not call this routine from DPC thread
5926 int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
5928 int rval = QLA_FUNCTION_FAILED;
5930 struct port_database_24xx *pd;
5931 struct qla_hw_data *ha = vha->hw;
5934 if (!vha->hw->flags.fw_started)
5937 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
5939 ql_log(ql_log_warn, vha, 0xffff,
5940 "Failed to allocate port database structure.\n");
5943 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
5945 memset(&mc, 0, sizeof(mc));
5946 mc.mb[0] = MBC_GET_PORT_DATABASE;
5947 mc.mb[1] = cpu_to_le16(fcport->loop_id);
5948 mc.mb[2] = MSW(pd_dma);
5949 mc.mb[3] = LSW(pd_dma);
5950 mc.mb[6] = MSW(MSD(pd_dma));
5951 mc.mb[7] = LSW(MSD(pd_dma));
5952 mc.mb[9] = cpu_to_le16(vha->vp_idx);
5953 mc.mb[10] = cpu_to_le16((uint16_t)opt);
5955 rval = qla24xx_send_mb_cmd(vha, &mc);
5956 if (rval != QLA_SUCCESS) {
5957 ql_dbg(ql_dbg_mbx, vha, 0xffff,
5958 "%s: %8phC fail\n", __func__, fcport->port_name);
5962 rval = __qla24xx_parse_gpdb(vha, fcport, pd);
5964 ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %8phC done\n",
5965 __func__, fcport->port_name);
5969 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
5974 int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport,
5975 struct port_database_24xx *pd)
5977 int rval = QLA_SUCCESS;
5980 /* Check for logged in state. */
5981 if (pd->current_login_state != PDS_PRLI_COMPLETE &&
5982 pd->last_login_state != PDS_PRLI_COMPLETE) {
5983 ql_dbg(ql_dbg_mbx, vha, 0xffff,
5984 "Unable to verify login-state (%x/%x) for "
5985 "loop_id %x.\n", pd->current_login_state,
5986 pd->last_login_state, fcport->loop_id);
5987 rval = QLA_FUNCTION_FAILED;
5991 if (fcport->loop_id == FC_NO_LOOP_ID ||
5992 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
5993 memcmp(fcport->port_name, pd->port_name, 8))) {
5994 /* We lost the device mid way. */
5995 rval = QLA_NOT_LOGGED_IN;
5999 /* Names are little-endian. */
6000 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
6001 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
6003 /* Get port_id of device. */
6004 fcport->d_id.b.domain = pd->port_id[0];
6005 fcport->d_id.b.area = pd->port_id[1];
6006 fcport->d_id.b.al_pa = pd->port_id[2];
6007 fcport->d_id.b.rsvd_1 = 0;
6009 /* If not target must be initiator or unknown type. */
6010 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
6011 fcport->port_type = FCT_INITIATOR;
6013 fcport->port_type = FCT_TARGET;
6015 /* Passback COS information. */
6016 fcport->supported_classes = (pd->flags & PDF_CLASS_2) ?
6017 FC_COS_CLASS2 : FC_COS_CLASS3;
6019 if (pd->prli_svc_param_word_3[0] & BIT_7) {
6020 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
6021 fcport->conf_compl_supported = 1;
6029 * qla24xx_gidlist__wait
6030 * NOTE: don't call this routine from DPC thread.
6032 int qla24xx_gidlist_wait(struct scsi_qla_host *vha,
6033 void *id_list, dma_addr_t id_list_dma, uint16_t *entries)
6035 int rval = QLA_FUNCTION_FAILED;
6038 if (!vha->hw->flags.fw_started)
6041 memset(&mc, 0, sizeof(mc));
6042 mc.mb[0] = MBC_GET_ID_LIST;
6043 mc.mb[2] = MSW(id_list_dma);
6044 mc.mb[3] = LSW(id_list_dma);
6045 mc.mb[6] = MSW(MSD(id_list_dma));
6046 mc.mb[7] = LSW(MSD(id_list_dma));
6048 mc.mb[9] = cpu_to_le16(vha->vp_idx);
6050 rval = qla24xx_send_mb_cmd(vha, &mc);
6051 if (rval != QLA_SUCCESS) {
6052 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6053 "%s: fail\n", __func__);
6055 *entries = mc.mb[1];
6056 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6057 "%s: done\n", __func__);