drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint64_t ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, ullong, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 240 static void qla2x00_free_device(scsi_qla_host_t *);
 241 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 242
 243 struct scsi_host_template qla2xxx_driver_template = {
 244         .module                 = THIS_MODULE,
 245         .name                   = QLA2XXX_DRIVER_NAME,
 246         .queuecommand           = qla2xxx_queuecommand,
 247
 248         .eh_abort_handler       = qla2xxx_eh_abort,
 249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 253
 254         .slave_configure        = qla2xxx_slave_configure,
 255
 256         .slave_alloc            = qla2xxx_slave_alloc,
 257         .slave_destroy          = qla2xxx_slave_destroy,
 258         .scan_finished          = qla2xxx_scan_finished,
 259         .scan_start             = qla2xxx_scan_start,
 260         .change_queue_depth     = scsi_change_queue_depth,
 261         .this_id                = -1,
 262         .cmd_per_lun            = 3,
 263         .use_clustering         = ENABLE_CLUSTERING,
 264         .sg_tablesize           = SG_ALL,
 265
 266         .max_sectors            = 0xFFFF,
 267         .shost_attrs            = qla2x00_host_attrs,
 268
 269         .supported_mode         = MODE_INITIATOR,
 270         .use_blk_tags           = 1,
 271         .track_queue_depth      = 1,
 272 };
 273
 274 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 275 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 276
 277 /* TODO Convert to inlines
 278  *
 279  * Timer routines
 280  */
 281
 282 __inline__ void
 283 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 284 {
 285         init_timer(&vha->timer);
 286         vha->timer.expires = jiffies + interval * HZ;
 287         vha->timer.data = (unsigned long)vha;
 288         vha->timer.function = (void (*)(unsigned long))func;
 289         add_timer(&vha->timer);
 290         vha->timer_active = 1;
 291 }
 292
 293 static inline void
 294 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 295 {
 296         /* Currently used for 82XX only. */
 297         if (vha->device_flags & DFLG_DEV_FAILED) {
 298                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 299                     "Device in a failed state, returning.\n");
 300                 return;
 301         }
 302
 303         mod_timer(&vha->timer, jiffies + interval * HZ);
 304 }
 305
 306 static __inline__ void
 307 qla2x00_stop_timer(scsi_qla_host_t *vha)
 308 {
 309         del_timer_sync(&vha->timer);
 310         vha->timer_active = 0;
 311 }
 312
 313 static int qla2x00_do_dpc(void *data);
 314
 315 static void qla2x00_rst_aen(scsi_qla_host_t *);
 316
 317 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 318         struct req_que **, struct rsp_que **);
 319 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 320 static void qla2x00_mem_free(struct qla_hw_data *);
 321
 322 /* -------------------------------------------------------------------------- */
 323 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 324                                 struct rsp_que *rsp)
 325 {
 326         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 327         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 328                                 GFP_KERNEL);
 329         if (!ha->req_q_map) {
 330                 ql_log(ql_log_fatal, vha, 0x003b,
 331                     "Unable to allocate memory for request queue ptrs.\n");
 332                 goto fail_req_map;
 333         }
 334
 335         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 336                                 GFP_KERNEL);
 337         if (!ha->rsp_q_map) {
 338                 ql_log(ql_log_fatal, vha, 0x003c,
 339                     "Unable to allocate memory for response queue ptrs.\n");
 340                 goto fail_rsp_map;
 341         }
 342         /*
 343          * Make sure we record at least the request and response queue zero in
 344          * case we need to free them if part of the probe fails.
 345          */
 346         ha->rsp_q_map[0] = rsp;
 347         ha->req_q_map[0] = req;
 348         set_bit(0, ha->rsp_qid_map);
 349         set_bit(0, ha->req_qid_map);
 350         return 1;
 351
 352 fail_rsp_map:
 353         kfree(ha->req_q_map);
 354         ha->req_q_map = NULL;
 355 fail_req_map:
 356         return -ENOMEM;
 357 }
 358
 359 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 360 {
 361         if (IS_QLAFX00(ha)) {
 362                 if (req && req->ring_fx00)
 363                         dma_free_coherent(&ha->pdev->dev,
 364                             (req->length_fx00 + 1) * sizeof(request_t),
 365                             req->ring_fx00, req->dma_fx00);
 366         } else if (req && req->ring)
 367                 dma_free_coherent(&ha->pdev->dev,
 368                 (req->length + 1) * sizeof(request_t),
 369                 req->ring, req->dma);
 370
 371         if (req)
 372                 kfree(req->outstanding_cmds);
 373
 374         kfree(req);
 375         req = NULL;
 376 }
 377
 378 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 379 {
 380         if (IS_QLAFX00(ha)) {
 381                 if (rsp && rsp->ring)
 382                         dma_free_coherent(&ha->pdev->dev,
 383                             (rsp->length_fx00 + 1) * sizeof(request_t),
 384                             rsp->ring_fx00, rsp->dma_fx00);
 385         } else if (rsp && rsp->ring) {
 386                 dma_free_coherent(&ha->pdev->dev,
 387                 (rsp->length + 1) * sizeof(response_t),
 388                 rsp->ring, rsp->dma);
 389         }
 390         kfree(rsp);
 391         rsp = NULL;
 392 }
 393
 394 static void qla2x00_free_queues(struct qla_hw_data *ha)
 395 {
 396         struct req_que *req;
 397         struct rsp_que *rsp;
 398         int cnt;
 399
 400         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 401                 req = ha->req_q_map[cnt];
 402                 qla2x00_free_req_que(ha, req);
 403         }
 404         kfree(ha->req_q_map);
 405         ha->req_q_map = NULL;
 406
 407         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 408                 rsp = ha->rsp_q_map[cnt];
 409                 qla2x00_free_rsp_que(ha, rsp);
 410         }
 411         kfree(ha->rsp_q_map);
 412         ha->rsp_q_map = NULL;
 413 }
 414
 415 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 416 {
 417         uint16_t options = 0;
 418         int ques, req, ret;
 419         struct qla_hw_data *ha = vha->hw;
 420
 421         if (!(ha->fw_attributes & BIT_6)) {
 422                 ql_log(ql_log_warn, vha, 0x00d8,
 423                     "Firmware is not multi-queue capable.\n");
 424                 goto fail;
 425         }
 426         if (ql2xmultique_tag) {
 427                 /* create a request queue for IO */
 428                 options |= BIT_7;
 429                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 430                         QLA_DEFAULT_QUE_QOS);
 431                 if (!req) {
 432                         ql_log(ql_log_warn, vha, 0x00e0,
 433                             "Failed to create request queue.\n");
 434                         goto fail;
 435                 }
 436                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 437                 vha->req = ha->req_q_map[req];
 438                 options |= BIT_1;
 439                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 440                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 441                         if (!ret) {
 442                                 ql_log(ql_log_warn, vha, 0x00e8,
 443                                     "Failed to create response queue.\n");
 444                                 goto fail2;
 445                         }
 446                 }
 447                 ha->flags.cpu_affinity_enabled = 1;
 448                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 449                     "CPU affinity mode enalbed, "
 450                     "no. of response queues:%d no. of request queues:%d.\n",
 451                     ha->max_rsp_queues, ha->max_req_queues);
 452                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 453                     "CPU affinity mode enalbed, "
 454                     "no. of response queues:%d no. of request queues:%d.\n",
 455                     ha->max_rsp_queues, ha->max_req_queues);
 456         }
 457         return 0;
 458 fail2:
 459         qla25xx_delete_queues(vha);
 460         destroy_workqueue(ha->wq);
 461         ha->wq = NULL;
 462         vha->req = ha->req_q_map[0];
 463 fail:
 464         ha->mqenable = 0;
 465         kfree(ha->req_q_map);
 466         kfree(ha->rsp_q_map);
 467         ha->max_req_queues = ha->max_rsp_queues = 1;
 468         return 1;
 469 }
 470
 471 static char *
 472 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 473 {
 474         struct qla_hw_data *ha = vha->hw;
 475         static char *pci_bus_modes[] = {
 476                 "33", "66", "100", "133",
 477         };
 478         uint16_t pci_bus;
 479
 480         strcpy(str, "PCI");
 481         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 482         if (pci_bus) {
 483                 strcat(str, "-X (");
 484                 strcat(str, pci_bus_modes[pci_bus]);
 485         } else {
 486                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 487                 strcat(str, " (");
 488                 strcat(str, pci_bus_modes[pci_bus]);
 489         }
 490         strcat(str, " MHz)");
 491
 492         return (str);
 493 }
 494
 495 static char *
 496 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 497 {
 498         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 499         struct qla_hw_data *ha = vha->hw;
 500         uint32_t pci_bus;
 501
 502         if (pci_is_pcie(ha->pdev)) {
 503                 char lwstr[6];
 504                 uint32_t lstat, lspeed, lwidth;
 505
 506                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 507                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 508                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 509
 510                 strcpy(str, "PCIe (");
 511                 switch (lspeed) {
 512                 case 1:
 513                         strcat(str, "2.5GT/s ");
 514                         break;
 515                 case 2:
 516                         strcat(str, "5.0GT/s ");
 517                         break;
 518                 case 3:
 519                         strcat(str, "8.0GT/s ");
 520                         break;
 521                 default:
 522                         strcat(str, "<unknown> ");
 523                         break;
 524                 }
 525                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 526                 strcat(str, lwstr);
 527
 528                 return str;
 529         }
 530
 531         strcpy(str, "PCI");
 532         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 533         if (pci_bus == 0 || pci_bus == 8) {
 534                 strcat(str, " (");
 535                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 536         } else {
 537                 strcat(str, "-X ");
 538                 if (pci_bus & BIT_2)
 539                         strcat(str, "Mode 2");
 540                 else
 541                         strcat(str, "Mode 1");
 542                 strcat(str, " (");
 543                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 544         }
 545         strcat(str, " MHz)");
 546
 547         return str;
 548 }
 549
 550 static char *
 551 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 552 {
 553         char un_str[10];
 554         struct qla_hw_data *ha = vha->hw;
 555
 556         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 557             ha->fw_minor_version, ha->fw_subminor_version);
 558
 559         if (ha->fw_attributes & BIT_9) {
 560                 strcat(str, "FLX");
 561                 return (str);
 562         }
 563
 564         switch (ha->fw_attributes & 0xFF) {
 565         case 0x7:
 566                 strcat(str, "EF");
 567                 break;
 568         case 0x17:
 569                 strcat(str, "TP");
 570                 break;
 571         case 0x37:
 572                 strcat(str, "IP");
 573                 break;
 574         case 0x77:
 575                 strcat(str, "VI");
 576                 break;
 577         default:
 578                 sprintf(un_str, "(%x)", ha->fw_attributes);
 579                 strcat(str, un_str);
 580                 break;
 581         }
 582         if (ha->fw_attributes & 0x100)
 583                 strcat(str, "X");
 584
 585         return (str);
 586 }
 587
 588 static char *
 589 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 590 {
 591         struct qla_hw_data *ha = vha->hw;
 592
 593         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 594             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 595         return str;
 596 }
 597
 598 void
 599 qla2x00_sp_free_dma(void *vha, void *ptr)
 600 {
 601         srb_t *sp = (srb_t *)ptr;
 602         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 603         struct qla_hw_data *ha = sp->fcport->vha->hw;
 604         void *ctx = GET_CMD_CTX_SP(sp);
 605
 606         if (sp->flags & SRB_DMA_VALID) {
 607                 scsi_dma_unmap(cmd);
 608                 sp->flags &= ~SRB_DMA_VALID;
 609         }
 610
 611         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 612                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 613                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 614                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 615         }
 616
 617         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 618                 /* List assured to be having elements */
 619                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 620                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 621         }
 622
 623         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 624                 dma_pool_free(ha->dl_dma_pool, ctx,
 625                     ((struct crc_context *)ctx)->crc_ctx_dma);
 626                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 627         }
 628
 629         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 630                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 631
 632                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 633                         ctx1->fcp_cmnd_dma);
 634                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 635                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 636                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 637                 mempool_free(ctx1, ha->ctx_mempool);
 638                 ctx1 = NULL;
 639         }
 640
 641         CMD_SP(cmd) = NULL;
 642         qla2x00_rel_sp(sp->fcport->vha, sp);
 643 }
 644
 645 static void
 646 qla2x00_sp_compl(void *data, void *ptr, int res)
 647 {
 648         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 649         srb_t *sp = (srb_t *)ptr;
 650         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 651
 652         cmd->result = res;
 653
 654         if (atomic_read(&sp->ref_count) == 0) {
 655                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 656                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 657                     sp, GET_CMD_SP(sp));
 658                 if (ql2xextended_error_logging & ql_dbg_io)
 659                         BUG();
 660                 return;
 661         }
 662         if (!atomic_dec_and_test(&sp->ref_count))
 663                 return;
 664
 665         qla2x00_sp_free_dma(ha, sp);
 666         cmd->scsi_done(cmd);
 667 }
 668
 669 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 670  * does not have the changes necessary to avoid taking host->host_lock.
 671  */
 672 static int
 673 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 674 {
 675         scsi_qla_host_t *vha = shost_priv(host);
 676         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 677         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 678         struct qla_hw_data *ha = vha->hw;
 679         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 680         srb_t *sp;
 681         int rval;
 682
 683         if (ha->flags.eeh_busy) {
 684                 if (ha->flags.pci_channel_io_perm_failure) {
 685                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 686                             "PCI Channel IO permanent failure, exiting "
 687                             "cmd=%p.\n", cmd);
 688                         cmd->result = DID_NO_CONNECT << 16;
 689                 } else {
 690                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 691                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 692                         cmd->result = DID_REQUEUE << 16;
 693                 }
 694                 goto qc24_fail_command;
 695         }
 696
 697         rval = fc_remote_port_chkready(rport);
 698         if (rval) {
 699                 cmd->result = rval;
 700                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 701                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 702                     cmd, rval);
 703                 goto qc24_fail_command;
 704         }
 705
 706         if (!vha->flags.difdix_supported &&
 707                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 708                         ql_dbg(ql_dbg_io, vha, 0x3004,
 709                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 710                             cmd);
 711                         cmd->result = DID_NO_CONNECT << 16;
 712                         goto qc24_fail_command;
 713         }
 714
 715         if (!fcport) {
 716                 cmd->result = DID_NO_CONNECT << 16;
 717                 goto qc24_fail_command;
 718         }
 719
 720         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 721                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 722                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 723                         ql_dbg(ql_dbg_io, vha, 0x3005,
 724                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 725                             atomic_read(&fcport->state),
 726                             atomic_read(&base_vha->loop_state));
 727                         cmd->result = DID_NO_CONNECT << 16;
 728                         goto qc24_fail_command;
 729                 }
 730                 goto qc24_target_busy;
 731         }
 732
 733         /*
 734          * Return target busy if we've received a non-zero retry_delay_timer
 735          * in a FCP_RSP.
 736          */
 737         if (time_after(jiffies, fcport->retry_delay_timestamp))
 738                 fcport->retry_delay_timestamp = 0;
 739         else
 740                 goto qc24_target_busy;
 741
 742         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 743         if (!sp)
 744                 goto qc24_host_busy;
 745
 746         sp->u.scmd.cmd = cmd;
 747         sp->type = SRB_SCSI_CMD;
 748         atomic_set(&sp->ref_count, 1);
 749         CMD_SP(cmd) = (void *)sp;
 750         sp->free = qla2x00_sp_free_dma;
 751         sp->done = qla2x00_sp_compl;
 752
 753         rval = ha->isp_ops->start_scsi(sp);
 754         if (rval != QLA_SUCCESS) {
 755                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 756                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 757                 goto qc24_host_busy_free_sp;
 758         }
 759
 760         return 0;
 761
 762 qc24_host_busy_free_sp:
 763         qla2x00_sp_free_dma(ha, sp);
 764
 765 qc24_host_busy:
 766         return SCSI_MLQUEUE_HOST_BUSY;
 767
 768 qc24_target_busy:
 769         return SCSI_MLQUEUE_TARGET_BUSY;
 770
 771 qc24_fail_command:
 772         cmd->scsi_done(cmd);
 773
 774         return 0;
 775 }
 776
 777 /*
 778  * qla2x00_eh_wait_on_command
 779  *    Waits for the command to be returned by the Firmware for some
 780  *    max time.
 781  *
 782  * Input:
 783  *    cmd = Scsi Command to wait on.
 784  *
 785  * Return:
 786  *    Not Found : 0
 787  *    Found : 1
 788  */
 789 static int
 790 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 791 {
 792 #define ABORT_POLLING_PERIOD    1000
 793 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 794         unsigned long wait_iter = ABORT_WAIT_ITER;
 795         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 796         struct qla_hw_data *ha = vha->hw;
 797         int ret = QLA_SUCCESS;
 798
 799         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 800                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 801                     "Return:eh_wait.\n");
 802                 return ret;
 803         }
 804
 805         while (CMD_SP(cmd) && wait_iter--) {
 806                 msleep(ABORT_POLLING_PERIOD);
 807         }
 808         if (CMD_SP(cmd))
 809                 ret = QLA_FUNCTION_FAILED;
 810
 811         return ret;
 812 }
 813
 814 /*
 815  * qla2x00_wait_for_hba_online
 816  *    Wait till the HBA is online after going through
 817  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 818  *    finally HBA is disabled ie marked offline
 819  *
 820  * Input:
 821  *     ha - pointer to host adapter structure
 822  *
 823  * Note:
 824  *    Does context switching-Release SPIN_LOCK
 825  *    (if any) before calling this routine.
 826  *
 827  * Return:
 828  *    Success (Adapter is online) : 0
 829  *    Failed  (Adapter is offline/disabled) : 1
 830  */
 831 int
 832 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 833 {
 834         int             return_status;
 835         unsigned long   wait_online;
 836         struct qla_hw_data *ha = vha->hw;
 837         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 838
 839         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 840         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 841             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 842             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 843             ha->dpc_active) && time_before(jiffies, wait_online)) {
 844
 845                 msleep(1000);
 846         }
 847         if (base_vha->flags.online)
 848                 return_status = QLA_SUCCESS;
 849         else
 850                 return_status = QLA_FUNCTION_FAILED;
 851
 852         return (return_status);
 853 }
 854
 855 /*
 856  * qla2x00_wait_for_hba_ready
 857  * Wait till the HBA is ready before doing driver unload
 858  *
 859  * Input:
 860  *     ha - pointer to host adapter structure
 861  *
 862  * Note:
 863  *    Does context switching-Release SPIN_LOCK
 864  *    (if any) before calling this routine.
 865  *
 866  */
 867 static void
 868 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 869 {
 870         struct qla_hw_data *ha = vha->hw;
 871
 872         while (((qla2x00_reset_active(vha)) || ha->dpc_active ||
 873             ha->flags.mbox_busy) ||
 874                 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
 875                 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags))
 876                 msleep(1000);
 877 }
 878
 879 int
 880 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 881 {
 882         int             return_status;
 883         unsigned long   wait_reset;
 884         struct qla_hw_data *ha = vha->hw;
 885         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 886
 887         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 888         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 889             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 890             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 891             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 892
 893                 msleep(1000);
 894
 895                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 896                     ha->flags.chip_reset_done)
 897                         break;
 898         }
 899         if (ha->flags.chip_reset_done)
 900                 return_status = QLA_SUCCESS;
 901         else
 902                 return_status = QLA_FUNCTION_FAILED;
 903
 904         return return_status;
 905 }
 906
 907 static void
 908 sp_get(struct srb *sp)
 909 {
 910         atomic_inc(&sp->ref_count);
 911 }
 912
 913 /**************************************************************************
 914 * qla2xxx_eh_abort
 915 *
 916 * Description:
 917 *    The abort function will abort the specified command.
 918 *
 919 * Input:
 920 *    cmd = Linux SCSI command packet to be aborted.
 921 *
 922 * Returns:
 923 *    Either SUCCESS or FAILED.
 924 *
 925 * Note:
 926 *    Only return FAILED if command not returned by firmware.
 927 **************************************************************************/
 928 static int
 929 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 930 {
 931         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 932         srb_t *sp;
 933         int ret;
 934         unsigned int id;
 935         uint64_t lun;
 936         unsigned long flags;
 937         int rval, wait = 0;
 938         struct qla_hw_data *ha = vha->hw;
 939
 940         if (!CMD_SP(cmd))
 941                 return SUCCESS;
 942
 943         ret = fc_block_scsi_eh(cmd);
 944         if (ret != 0)
 945                 return ret;
 946         ret = SUCCESS;
 947
 948         id = cmd->device->id;
 949         lun = cmd->device->lun;
 950
 951         spin_lock_irqsave(&ha->hardware_lock, flags);
 952         sp = (srb_t *) CMD_SP(cmd);
 953         if (!sp) {
 954                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 955                 return SUCCESS;
 956         }
 957
 958         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 959             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p\n",
 960             vha->host_no, id, lun, sp, cmd);
 961
 962         /* Get a reference to the sp and drop the lock.*/
 963         sp_get(sp);
 964
 965         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 966         rval = ha->isp_ops->abort_command(sp);
 967         if (rval) {
 968                 if (rval == QLA_FUNCTION_PARAMETER_ERROR) {
 969                         /*
 970                          * Decrement the ref_count since we can't find the
 971                          * command
 972                          */
 973                         atomic_dec(&sp->ref_count);
 974                         ret = SUCCESS;
 975                 } else
 976                         ret = FAILED;
 977
 978                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 979                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
 980         } else {
 981                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 982                     "Abort command mbx success cmd=%p.\n", cmd);
 983                 wait = 1;
 984         }
 985
 986         spin_lock_irqsave(&ha->hardware_lock, flags);
 987         /*
 988          * Clear the slot in the oustanding_cmds array if we can't find the
 989          * command to reclaim the resources.
 990          */
 991         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
 992                 vha->req->outstanding_cmds[sp->handle] = NULL;
 993         sp->done(ha, sp, 0);
 994         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 995
 996         /* Did the command return during mailbox execution? */
 997         if (ret == FAILED && !CMD_SP(cmd))
 998                 ret = SUCCESS;
 999
1000         /* Wait for the command to be returned. */
1001         if (wait) {
1002                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1003                         ql_log(ql_log_warn, vha, 0x8006,
1004                             "Abort handler timed out cmd=%p.\n", cmd);
1005                         ret = FAILED;
1006                 }
1007         }
1008
1009         ql_log(ql_log_info, vha, 0x801c,
1010             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1011             vha->host_no, id, lun, wait, ret);
1012
1013         return ret;
1014 }
1015
1016 int
1017 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1018         uint64_t l, enum nexus_wait_type type)
1019 {
1020         int cnt, match, status;
1021         unsigned long flags;
1022         struct qla_hw_data *ha = vha->hw;
1023         struct req_que *req;
1024         srb_t *sp;
1025         struct scsi_cmnd *cmd;
1026
1027         status = QLA_SUCCESS;
1028
1029         spin_lock_irqsave(&ha->hardware_lock, flags);
1030         req = vha->req;
1031         for (cnt = 1; status == QLA_SUCCESS &&
1032                 cnt < req->num_outstanding_cmds; cnt++) {
1033                 sp = req->outstanding_cmds[cnt];
1034                 if (!sp)
1035                         continue;
1036                 if (sp->type != SRB_SCSI_CMD)
1037                         continue;
1038                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1039                         continue;
1040                 match = 0;
1041                 cmd = GET_CMD_SP(sp);
1042                 switch (type) {
1043                 case WAIT_HOST:
1044                         match = 1;
1045                         break;
1046                 case WAIT_TARGET:
1047                         match = cmd->device->id == t;
1048                         break;
1049                 case WAIT_LUN:
1050                         match = (cmd->device->id == t &&
1051                                 cmd->device->lun == l);
1052                         break;
1053                 }
1054                 if (!match)
1055                         continue;
1056
1057                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1058                 status = qla2x00_eh_wait_on_command(cmd);
1059                 spin_lock_irqsave(&ha->hardware_lock, flags);
1060         }
1061         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1062
1063         return status;
1064 }
1065
1066 static char *reset_errors[] = {
1067         "HBA not online",
1068         "HBA not ready",
1069         "Task management failed",
1070         "Waiting for command completions",
1071 };
1072
1073 static int
1074 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1075     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1076 {
1077         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1078         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1079         int err;
1080
1081         if (!fcport) {
1082                 return FAILED;
1083         }
1084
1085         err = fc_block_scsi_eh(cmd);
1086         if (err != 0)
1087                 return err;
1088
1089         ql_log(ql_log_info, vha, 0x8009,
1090             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1091             cmd->device->id, cmd->device->lun, cmd);
1092
1093         err = 0;
1094         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1095                 ql_log(ql_log_warn, vha, 0x800a,
1096                     "Wait for hba online failed for cmd=%p.\n", cmd);
1097                 goto eh_reset_failed;
1098         }
1099         err = 2;
1100         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1101                 != QLA_SUCCESS) {
1102                 ql_log(ql_log_warn, vha, 0x800c,
1103                     "do_reset failed for cmd=%p.\n", cmd);
1104                 goto eh_reset_failed;
1105         }
1106         err = 3;
1107         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1108             cmd->device->lun, type) != QLA_SUCCESS) {
1109                 ql_log(ql_log_warn, vha, 0x800d,
1110                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1111                 goto eh_reset_failed;
1112         }
1113
1114         ql_log(ql_log_info, vha, 0x800e,
1115             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1116             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1117
1118         return SUCCESS;
1119
1120 eh_reset_failed:
1121         ql_log(ql_log_info, vha, 0x800f,
1122             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1123             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1124             cmd);
1125         return FAILED;
1126 }
1127
1128 static int
1129 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1130 {
1131         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1132         struct qla_hw_data *ha = vha->hw;
1133
1134         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1135             ha->isp_ops->lun_reset);
1136 }
1137
1138 static int
1139 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1140 {
1141         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1142         struct qla_hw_data *ha = vha->hw;
1143
1144         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1145             ha->isp_ops->target_reset);
1146 }
1147
1148 /**************************************************************************
1149 * qla2xxx_eh_bus_reset
1150 *
1151 * Description:
1152 *    The bus reset function will reset the bus and abort any executing
1153 *    commands.
1154 *
1155 * Input:
1156 *    cmd = Linux SCSI command packet of the command that cause the
1157 *          bus reset.
1158 *
1159 * Returns:
1160 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1161 *
1162 **************************************************************************/
1163 static int
1164 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1165 {
1166         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1167         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1168         int ret = FAILED;
1169         unsigned int id;
1170         uint64_t lun;
1171
1172         id = cmd->device->id;
1173         lun = cmd->device->lun;
1174
1175         if (!fcport) {
1176                 return ret;
1177         }
1178
1179         ret = fc_block_scsi_eh(cmd);
1180         if (ret != 0)
1181                 return ret;
1182         ret = FAILED;
1183
1184         ql_log(ql_log_info, vha, 0x8012,
1185             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1186
1187         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1188                 ql_log(ql_log_fatal, vha, 0x8013,
1189                     "Wait for hba online failed board disabled.\n");
1190                 goto eh_bus_reset_done;
1191         }
1192
1193         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1194                 ret = SUCCESS;
1195
1196         if (ret == FAILED)
1197                 goto eh_bus_reset_done;
1198
1199         /* Flush outstanding commands. */
1200         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1201             QLA_SUCCESS) {
1202                 ql_log(ql_log_warn, vha, 0x8014,
1203                     "Wait for pending commands failed.\n");
1204                 ret = FAILED;
1205         }
1206
1207 eh_bus_reset_done:
1208         ql_log(ql_log_warn, vha, 0x802b,
1209             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1210             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1211
1212         return ret;
1213 }
1214
1215 /**************************************************************************
1216 * qla2xxx_eh_host_reset
1217 *
1218 * Description:
1219 *    The reset function will reset the Adapter.
1220 *
1221 * Input:
1222 *      cmd = Linux SCSI command packet of the command that cause the
1223 *            adapter reset.
1224 *
1225 * Returns:
1226 *      Either SUCCESS or FAILED.
1227 *
1228 * Note:
1229 **************************************************************************/
1230 static int
1231 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1232 {
1233         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1234         struct qla_hw_data *ha = vha->hw;
1235         int ret = FAILED;
1236         unsigned int id;
1237         uint64_t lun;
1238         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1239
1240         id = cmd->device->id;
1241         lun = cmd->device->lun;
1242
1243         ql_log(ql_log_info, vha, 0x8018,
1244             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1245
1246         /*
1247          * No point in issuing another reset if one is active.  Also do not
1248          * attempt a reset if we are updating flash.
1249          */
1250         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1251                 goto eh_host_reset_lock;
1252
1253         if (vha != base_vha) {
1254                 if (qla2x00_vp_abort_isp(vha))
1255                         goto eh_host_reset_lock;
1256         } else {
1257                 if (IS_P3P_TYPE(vha->hw)) {
1258                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1259                                 /* Ctx reset success */
1260                                 ret = SUCCESS;
1261                                 goto eh_host_reset_lock;
1262                         }
1263                         /* fall thru if ctx reset failed */
1264                 }
1265                 if (ha->wq)
1266                         flush_workqueue(ha->wq);
1267
1268                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1269                 if (ha->isp_ops->abort_isp(base_vha)) {
1270                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1271                         /* failed. schedule dpc to try */
1272                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1273
1274                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1275                                 ql_log(ql_log_warn, vha, 0x802a,
1276                                     "wait for hba online failed.\n");
1277                                 goto eh_host_reset_lock;
1278                         }
1279                 }
1280                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1281         }
1282
1283         /* Waiting for command to be returned to OS.*/
1284         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1285                 QLA_SUCCESS)
1286                 ret = SUCCESS;
1287
1288 eh_host_reset_lock:
1289         ql_log(ql_log_info, vha, 0x8017,
1290             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1291             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1292
1293         return ret;
1294 }
1295
1296 /*
1297 * qla2x00_loop_reset
1298 *      Issue loop reset.
1299 *
1300 * Input:
1301 *      ha = adapter block pointer.
1302 *
1303 * Returns:
1304 *      0 = success
1305 */
1306 int
1307 qla2x00_loop_reset(scsi_qla_host_t *vha)
1308 {
1309         int ret;
1310         struct fc_port *fcport;
1311         struct qla_hw_data *ha = vha->hw;
1312
1313         if (IS_QLAFX00(ha)) {
1314                 return qlafx00_loop_reset(vha);
1315         }
1316
1317         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1318                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1319                         if (fcport->port_type != FCT_TARGET)
1320                                 continue;
1321
1322                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1323                         if (ret != QLA_SUCCESS) {
1324                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1325                                     "Bus Reset failed: Reset=%d "
1326                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1327                         }
1328                 }
1329         }
1330
1331
1332         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1333                 atomic_set(&vha->loop_state, LOOP_DOWN);
1334                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1335                 qla2x00_mark_all_devices_lost(vha, 0);
1336                 ret = qla2x00_full_login_lip(vha);
1337                 if (ret != QLA_SUCCESS) {
1338                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1339                             "full_login_lip=%d.\n", ret);
1340                 }
1341         }
1342
1343         if (ha->flags.enable_lip_reset) {
1344                 ret = qla2x00_lip_reset(vha);
1345                 if (ret != QLA_SUCCESS)
1346                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1347                             "lip_reset failed (%d).\n", ret);
1348         }
1349
1350         /* Issue marker command only when we are going to start the I/O */
1351         vha->marker_needed = 1;
1352
1353         return QLA_SUCCESS;
1354 }
1355
1356 void
1357 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1358 {
1359         int que, cnt;
1360         unsigned long flags;
1361         srb_t *sp;
1362         struct qla_hw_data *ha = vha->hw;
1363         struct req_que *req;
1364
1365         qlt_host_reset_handler(ha);
1366
1367         spin_lock_irqsave(&ha->hardware_lock, flags);
1368         for (que = 0; que < ha->max_req_queues; que++) {
1369                 req = ha->req_q_map[que];
1370                 if (!req)
1371                         continue;
1372                 if (!req->outstanding_cmds)
1373                         continue;
1374                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1375                         sp = req->outstanding_cmds[cnt];
1376                         if (sp) {
1377                                 req->outstanding_cmds[cnt] = NULL;
1378                                 sp->done(vha, sp, res);
1379                         }
1380                 }
1381         }
1382         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1383 }
1384
1385 static int
1386 qla2xxx_slave_alloc(struct scsi_device *sdev)
1387 {
1388         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1389
1390         if (!rport || fc_remote_port_chkready(rport))
1391                 return -ENXIO;
1392
1393         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1394
1395         return 0;
1396 }
1397
1398 static int
1399 qla2xxx_slave_configure(struct scsi_device *sdev)
1400 {
1401         scsi_qla_host_t *vha = shost_priv(sdev->host);
1402         struct req_que *req = vha->req;
1403
1404         if (IS_T10_PI_CAPABLE(vha->hw))
1405                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1406
1407         scsi_change_queue_depth(sdev, req->max_q_depth);
1408         return 0;
1409 }
1410
1411 static void
1412 qla2xxx_slave_destroy(struct scsi_device *sdev)
1413 {
1414         sdev->hostdata = NULL;
1415 }
1416
1417 /**
1418  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1419  * @ha: HA context
1420  *
1421  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1422  * supported addressing method.
1423  */
1424 static void
1425 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1426 {
1427         /* Assume a 32bit DMA mask. */
1428         ha->flags.enable_64bit_addressing = 0;
1429
1430         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1431                 /* Any upper-dword bits set? */
1432                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1433                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1434                         /* Ok, a 64bit DMA mask is applicable. */
1435                         ha->flags.enable_64bit_addressing = 1;
1436                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1437                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1438                         return;
1439                 }
1440         }
1441
1442         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1443         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1444 }
1445
1446 static void
1447 qla2x00_enable_intrs(struct qla_hw_data *ha)
1448 {
1449         unsigned long flags = 0;
1450         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1451
1452         spin_lock_irqsave(&ha->hardware_lock, flags);
1453         ha->interrupts_on = 1;
1454         /* enable risc and host interrupts */
1455         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1456         RD_REG_WORD(&reg->ictrl);
1457         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1458
1459 }
1460
1461 static void
1462 qla2x00_disable_intrs(struct qla_hw_data *ha)
1463 {
1464         unsigned long flags = 0;
1465         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1466
1467         spin_lock_irqsave(&ha->hardware_lock, flags);
1468         ha->interrupts_on = 0;
1469         /* disable risc and host interrupts */
1470         WRT_REG_WORD(&reg->ictrl, 0);
1471         RD_REG_WORD(&reg->ictrl);
1472         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1473 }
1474
1475 static void
1476 qla24xx_enable_intrs(struct qla_hw_data *ha)
1477 {
1478         unsigned long flags = 0;
1479         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1480
1481         spin_lock_irqsave(&ha->hardware_lock, flags);
1482         ha->interrupts_on = 1;
1483         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1484         RD_REG_DWORD(&reg->ictrl);
1485         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1486 }
1487
1488 static void
1489 qla24xx_disable_intrs(struct qla_hw_data *ha)
1490 {
1491         unsigned long flags = 0;
1492         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1493
1494         if (IS_NOPOLLING_TYPE(ha))
1495                 return;
1496         spin_lock_irqsave(&ha->hardware_lock, flags);
1497         ha->interrupts_on = 0;
1498         WRT_REG_DWORD(&reg->ictrl, 0);
1499         RD_REG_DWORD(&reg->ictrl);
1500         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1501 }
1502
1503 static int
1504 qla2x00_iospace_config(struct qla_hw_data *ha)
1505 {
1506         resource_size_t pio;
1507         uint16_t msix;
1508         int cpus;
1509
1510         if (pci_request_selected_regions(ha->pdev, ha->bars,
1511             QLA2XXX_DRIVER_NAME)) {
1512                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1513                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1514                     pci_name(ha->pdev));
1515                 goto iospace_error_exit;
1516         }
1517         if (!(ha->bars & 1))
1518                 goto skip_pio;
1519
1520         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1521         pio = pci_resource_start(ha->pdev, 0);
1522         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1523                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1524                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1525                             "Invalid pci I/O region size (%s).\n",
1526                             pci_name(ha->pdev));
1527                         pio = 0;
1528                 }
1529         } else {
1530                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1531                     "Region #0 no a PIO resource (%s).\n",
1532                     pci_name(ha->pdev));
1533                 pio = 0;
1534         }
1535         ha->pio_address = pio;
1536         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1537             "PIO address=%llu.\n",
1538             (unsigned long long)ha->pio_address);
1539
1540 skip_pio:
1541         /* Use MMIO operations for all accesses. */
1542         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1543                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1544                     "Region #1 not an MMIO resource (%s), aborting.\n",
1545                     pci_name(ha->pdev));
1546                 goto iospace_error_exit;
1547         }
1548         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1549                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1550                     "Invalid PCI mem region size (%s), aborting.\n",
1551                     pci_name(ha->pdev));
1552                 goto iospace_error_exit;
1553         }
1554
1555         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1556         if (!ha->iobase) {
1557                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1558                     "Cannot remap MMIO (%s), aborting.\n",
1559                     pci_name(ha->pdev));
1560                 goto iospace_error_exit;
1561         }
1562
1563         /* Determine queue resources */
1564         ha->max_req_queues = ha->max_rsp_queues = 1;
1565         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1566                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1567                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1568                 goto mqiobase_exit;
1569
1570         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1571                         pci_resource_len(ha->pdev, 3));
1572         if (ha->mqiobase) {
1573                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1574                     "MQIO Base=%p.\n", ha->mqiobase);
1575                 /* Read MSIX vector size of the board */
1576                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1577                 ha->msix_count = msix;
1578                 /* Max queues are bounded by available msix vectors */
1579                 /* queue 0 uses two msix vectors */
1580                 if (ql2xmultique_tag) {
1581                         cpus = num_online_cpus();
1582                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1583                                 (cpus + 1) : (ha->msix_count - 1);
1584                         ha->max_req_queues = 2;
1585                 } else if (ql2xmaxqueues > 1) {
1586                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1587                             QLA_MQ_SIZE : ql2xmaxqueues;
1588                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1589                             "QoS mode set, max no of request queues:%d.\n",
1590                             ha->max_req_queues);
1591                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1592                             "QoS mode set, max no of request queues:%d.\n",
1593                             ha->max_req_queues);
1594                 }
1595                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1596                     "MSI-X vector count: %d.\n", msix);
1597         } else
1598                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1599                     "BAR 3 not enabled.\n");
1600
1601 mqiobase_exit:
1602         ha->msix_count = ha->max_rsp_queues + 1;
1603         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1604             "MSIX Count:%d.\n", ha->msix_count);
1605         return (0);
1606
1607 iospace_error_exit:
1608         return (-ENOMEM);
1609 }
1610
1611
1612 static int
1613 qla83xx_iospace_config(struct qla_hw_data *ha)
1614 {
1615         uint16_t msix;
1616         int cpus;
1617
1618         if (pci_request_selected_regions(ha->pdev, ha->bars,
1619             QLA2XXX_DRIVER_NAME)) {
1620                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1621                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1622                     pci_name(ha->pdev));
1623
1624                 goto iospace_error_exit;
1625         }
1626
1627         /* Use MMIO operations for all accesses. */
1628         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1629                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1630                     "Invalid pci I/O region size (%s).\n",
1631                     pci_name(ha->pdev));
1632                 goto iospace_error_exit;
1633         }
1634         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1635                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1636                     "Invalid PCI mem region size (%s), aborting\n",
1637                         pci_name(ha->pdev));
1638                 goto iospace_error_exit;
1639         }
1640
1641         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1642         if (!ha->iobase) {
1643                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1644                     "Cannot remap MMIO (%s), aborting.\n",
1645                     pci_name(ha->pdev));
1646                 goto iospace_error_exit;
1647         }
1648
1649         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1650         /* 83XX 26XX always use MQ type access for queues
1651          * - mbar 2, a.k.a region 4 */
1652         ha->max_req_queues = ha->max_rsp_queues = 1;
1653         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1654                         pci_resource_len(ha->pdev, 4));
1655
1656         if (!ha->mqiobase) {
1657                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1658                     "BAR2/region4 not enabled\n");
1659                 goto mqiobase_exit;
1660         }
1661
1662         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1663                         pci_resource_len(ha->pdev, 2));
1664         if (ha->msixbase) {
1665                 /* Read MSIX vector size of the board */
1666                 pci_read_config_word(ha->pdev,
1667                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1668                 ha->msix_count = msix;
1669                 /* Max queues are bounded by available msix vectors */
1670                 /* queue 0 uses two msix vectors */
1671                 if (ql2xmultique_tag) {
1672                         cpus = num_online_cpus();
1673                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1674                                 (cpus + 1) : (ha->msix_count - 1);
1675                         ha->max_req_queues = 2;
1676                 } else if (ql2xmaxqueues > 1) {
1677                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1678                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1679                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1680                             "QoS mode set, max no of request queues:%d.\n",
1681                             ha->max_req_queues);
1682                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1683                             "QoS mode set, max no of request queues:%d.\n",
1684                             ha->max_req_queues);
1685                 }
1686                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1687                     "MSI-X vector count: %d.\n", msix);
1688         } else
1689                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1690                     "BAR 1 not enabled.\n");
1691
1692 mqiobase_exit:
1693         ha->msix_count = ha->max_rsp_queues + 1;
1694
1695         qlt_83xx_iospace_config(ha);
1696
1697         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1698             "MSIX Count:%d.\n", ha->msix_count);
1699         return 0;
1700
1701 iospace_error_exit:
1702         return -ENOMEM;
1703 }
1704
1705 static struct isp_operations qla2100_isp_ops = {
1706         .pci_config             = qla2100_pci_config,
1707         .reset_chip             = qla2x00_reset_chip,
1708         .chip_diag              = qla2x00_chip_diag,
1709         .config_rings           = qla2x00_config_rings,
1710         .reset_adapter          = qla2x00_reset_adapter,
1711         .nvram_config           = qla2x00_nvram_config,
1712         .update_fw_options      = qla2x00_update_fw_options,
1713         .load_risc              = qla2x00_load_risc,
1714         .pci_info_str           = qla2x00_pci_info_str,
1715         .fw_version_str         = qla2x00_fw_version_str,
1716         .intr_handler           = qla2100_intr_handler,
1717         .enable_intrs           = qla2x00_enable_intrs,
1718         .disable_intrs          = qla2x00_disable_intrs,
1719         .abort_command          = qla2x00_abort_command,
1720         .target_reset           = qla2x00_abort_target,
1721         .lun_reset              = qla2x00_lun_reset,
1722         .fabric_login           = qla2x00_login_fabric,
1723         .fabric_logout          = qla2x00_fabric_logout,
1724         .calc_req_entries       = qla2x00_calc_iocbs_32,
1725         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1726         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1727         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1728         .read_nvram             = qla2x00_read_nvram_data,
1729         .write_nvram            = qla2x00_write_nvram_data,
1730         .fw_dump                = qla2100_fw_dump,
1731         .beacon_on              = NULL,
1732         .beacon_off             = NULL,
1733         .beacon_blink           = NULL,
1734         .read_optrom            = qla2x00_read_optrom_data,
1735         .write_optrom           = qla2x00_write_optrom_data,
1736         .get_flash_version      = qla2x00_get_flash_version,
1737         .start_scsi             = qla2x00_start_scsi,
1738         .abort_isp              = qla2x00_abort_isp,
1739         .iospace_config         = qla2x00_iospace_config,
1740         .initialize_adapter     = qla2x00_initialize_adapter,
1741 };
1742
1743 static struct isp_operations qla2300_isp_ops = {
1744         .pci_config             = qla2300_pci_config,
1745         .reset_chip             = qla2x00_reset_chip,
1746         .chip_diag              = qla2x00_chip_diag,
1747         .config_rings           = qla2x00_config_rings,
1748         .reset_adapter          = qla2x00_reset_adapter,
1749         .nvram_config           = qla2x00_nvram_config,
1750         .update_fw_options      = qla2x00_update_fw_options,
1751         .load_risc              = qla2x00_load_risc,
1752         .pci_info_str           = qla2x00_pci_info_str,
1753         .fw_version_str         = qla2x00_fw_version_str,
1754         .intr_handler           = qla2300_intr_handler,
1755         .enable_intrs           = qla2x00_enable_intrs,
1756         .disable_intrs          = qla2x00_disable_intrs,
1757         .abort_command          = qla2x00_abort_command,
1758         .target_reset           = qla2x00_abort_target,
1759         .lun_reset              = qla2x00_lun_reset,
1760         .fabric_login           = qla2x00_login_fabric,
1761         .fabric_logout          = qla2x00_fabric_logout,
1762         .calc_req_entries       = qla2x00_calc_iocbs_32,
1763         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1764         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1765         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1766         .read_nvram             = qla2x00_read_nvram_data,
1767         .write_nvram            = qla2x00_write_nvram_data,
1768         .fw_dump                = qla2300_fw_dump,
1769         .beacon_on              = qla2x00_beacon_on,
1770         .beacon_off             = qla2x00_beacon_off,
1771         .beacon_blink           = qla2x00_beacon_blink,
1772         .read_optrom            = qla2x00_read_optrom_data,
1773         .write_optrom           = qla2x00_write_optrom_data,
1774         .get_flash_version      = qla2x00_get_flash_version,
1775         .start_scsi             = qla2x00_start_scsi,
1776         .abort_isp              = qla2x00_abort_isp,
1777         .iospace_config         = qla2x00_iospace_config,
1778         .initialize_adapter     = qla2x00_initialize_adapter,
1779 };
1780
1781 static struct isp_operations qla24xx_isp_ops = {
1782         .pci_config             = qla24xx_pci_config,
1783         .reset_chip             = qla24xx_reset_chip,
1784         .chip_diag              = qla24xx_chip_diag,
1785         .config_rings           = qla24xx_config_rings,
1786         .reset_adapter          = qla24xx_reset_adapter,
1787         .nvram_config           = qla24xx_nvram_config,
1788         .update_fw_options      = qla24xx_update_fw_options,
1789         .load_risc              = qla24xx_load_risc,
1790         .pci_info_str           = qla24xx_pci_info_str,
1791         .fw_version_str         = qla24xx_fw_version_str,
1792         .intr_handler           = qla24xx_intr_handler,
1793         .enable_intrs           = qla24xx_enable_intrs,
1794         .disable_intrs          = qla24xx_disable_intrs,
1795         .abort_command          = qla24xx_abort_command,
1796         .target_reset           = qla24xx_abort_target,
1797         .lun_reset              = qla24xx_lun_reset,
1798         .fabric_login           = qla24xx_login_fabric,
1799         .fabric_logout          = qla24xx_fabric_logout,
1800         .calc_req_entries       = NULL,
1801         .build_iocbs            = NULL,
1802         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1803         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1804         .read_nvram             = qla24xx_read_nvram_data,
1805         .write_nvram            = qla24xx_write_nvram_data,
1806         .fw_dump                = qla24xx_fw_dump,
1807         .beacon_on              = qla24xx_beacon_on,
1808         .beacon_off             = qla24xx_beacon_off,
1809         .beacon_blink           = qla24xx_beacon_blink,
1810         .read_optrom            = qla24xx_read_optrom_data,
1811         .write_optrom           = qla24xx_write_optrom_data,
1812         .get_flash_version      = qla24xx_get_flash_version,
1813         .start_scsi             = qla24xx_start_scsi,
1814         .abort_isp              = qla2x00_abort_isp,
1815         .iospace_config         = qla2x00_iospace_config,
1816         .initialize_adapter     = qla2x00_initialize_adapter,
1817 };
1818
1819 static struct isp_operations qla25xx_isp_ops = {
1820         .pci_config             = qla25xx_pci_config,
1821         .reset_chip             = qla24xx_reset_chip,
1822         .chip_diag              = qla24xx_chip_diag,
1823         .config_rings           = qla24xx_config_rings,
1824         .reset_adapter          = qla24xx_reset_adapter,
1825         .nvram_config           = qla24xx_nvram_config,
1826         .update_fw_options      = qla24xx_update_fw_options,
1827         .load_risc              = qla24xx_load_risc,
1828         .pci_info_str           = qla24xx_pci_info_str,
1829         .fw_version_str         = qla24xx_fw_version_str,
1830         .intr_handler           = qla24xx_intr_handler,
1831         .enable_intrs           = qla24xx_enable_intrs,
1832         .disable_intrs          = qla24xx_disable_intrs,
1833         .abort_command          = qla24xx_abort_command,
1834         .target_reset           = qla24xx_abort_target,
1835         .lun_reset              = qla24xx_lun_reset,
1836         .fabric_login           = qla24xx_login_fabric,
1837         .fabric_logout          = qla24xx_fabric_logout,
1838         .calc_req_entries       = NULL,
1839         .build_iocbs            = NULL,
1840         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1841         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1842         .read_nvram             = qla25xx_read_nvram_data,
1843         .write_nvram            = qla25xx_write_nvram_data,
1844         .fw_dump                = qla25xx_fw_dump,
1845         .beacon_on              = qla24xx_beacon_on,
1846         .beacon_off             = qla24xx_beacon_off,
1847         .beacon_blink           = qla24xx_beacon_blink,
1848         .read_optrom            = qla25xx_read_optrom_data,
1849         .write_optrom           = qla24xx_write_optrom_data,
1850         .get_flash_version      = qla24xx_get_flash_version,
1851         .start_scsi             = qla24xx_dif_start_scsi,
1852         .abort_isp              = qla2x00_abort_isp,
1853         .iospace_config         = qla2x00_iospace_config,
1854         .initialize_adapter     = qla2x00_initialize_adapter,
1855 };
1856
1857 static struct isp_operations qla81xx_isp_ops = {
1858         .pci_config             = qla25xx_pci_config,
1859         .reset_chip             = qla24xx_reset_chip,
1860         .chip_diag              = qla24xx_chip_diag,
1861         .config_rings           = qla24xx_config_rings,
1862         .reset_adapter          = qla24xx_reset_adapter,
1863         .nvram_config           = qla81xx_nvram_config,
1864         .update_fw_options      = qla81xx_update_fw_options,
1865         .load_risc              = qla81xx_load_risc,
1866         .pci_info_str           = qla24xx_pci_info_str,
1867         .fw_version_str         = qla24xx_fw_version_str,
1868         .intr_handler           = qla24xx_intr_handler,
1869         .enable_intrs           = qla24xx_enable_intrs,
1870         .disable_intrs          = qla24xx_disable_intrs,
1871         .abort_command          = qla24xx_abort_command,
1872         .target_reset           = qla24xx_abort_target,
1873         .lun_reset              = qla24xx_lun_reset,
1874         .fabric_login           = qla24xx_login_fabric,
1875         .fabric_logout          = qla24xx_fabric_logout,
1876         .calc_req_entries       = NULL,
1877         .build_iocbs            = NULL,
1878         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1879         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1880         .read_nvram             = NULL,
1881         .write_nvram            = NULL,
1882         .fw_dump                = qla81xx_fw_dump,
1883         .beacon_on              = qla24xx_beacon_on,
1884         .beacon_off             = qla24xx_beacon_off,
1885         .beacon_blink           = qla83xx_beacon_blink,
1886         .read_optrom            = qla25xx_read_optrom_data,
1887         .write_optrom           = qla24xx_write_optrom_data,
1888         .get_flash_version      = qla24xx_get_flash_version,
1889         .start_scsi             = qla24xx_dif_start_scsi,
1890         .abort_isp              = qla2x00_abort_isp,
1891         .iospace_config         = qla2x00_iospace_config,
1892         .initialize_adapter     = qla2x00_initialize_adapter,
1893 };
1894
1895 static struct isp_operations qla82xx_isp_ops = {
1896         .pci_config             = qla82xx_pci_config,
1897         .reset_chip             = qla82xx_reset_chip,
1898         .chip_diag              = qla24xx_chip_diag,
1899         .config_rings           = qla82xx_config_rings,
1900         .reset_adapter          = qla24xx_reset_adapter,
1901         .nvram_config           = qla81xx_nvram_config,
1902         .update_fw_options      = qla24xx_update_fw_options,
1903         .load_risc              = qla82xx_load_risc,
1904         .pci_info_str           = qla24xx_pci_info_str,
1905         .fw_version_str         = qla24xx_fw_version_str,
1906         .intr_handler           = qla82xx_intr_handler,
1907         .enable_intrs           = qla82xx_enable_intrs,
1908         .disable_intrs          = qla82xx_disable_intrs,
1909         .abort_command          = qla24xx_abort_command,
1910         .target_reset           = qla24xx_abort_target,
1911         .lun_reset              = qla24xx_lun_reset,
1912         .fabric_login           = qla24xx_login_fabric,
1913         .fabric_logout          = qla24xx_fabric_logout,
1914         .calc_req_entries       = NULL,
1915         .build_iocbs            = NULL,
1916         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1917         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1918         .read_nvram             = qla24xx_read_nvram_data,
1919         .write_nvram            = qla24xx_write_nvram_data,
1920         .fw_dump                = qla82xx_fw_dump,
1921         .beacon_on              = qla82xx_beacon_on,
1922         .beacon_off             = qla82xx_beacon_off,
1923         .beacon_blink           = NULL,
1924         .read_optrom            = qla82xx_read_optrom_data,
1925         .write_optrom           = qla82xx_write_optrom_data,
1926         .get_flash_version      = qla82xx_get_flash_version,
1927         .start_scsi             = qla82xx_start_scsi,
1928         .abort_isp              = qla82xx_abort_isp,
1929         .iospace_config         = qla82xx_iospace_config,
1930         .initialize_adapter     = qla2x00_initialize_adapter,
1931 };
1932
1933 static struct isp_operations qla8044_isp_ops = {
1934         .pci_config             = qla82xx_pci_config,
1935         .reset_chip             = qla82xx_reset_chip,
1936         .chip_diag              = qla24xx_chip_diag,
1937         .config_rings           = qla82xx_config_rings,
1938         .reset_adapter          = qla24xx_reset_adapter,
1939         .nvram_config           = qla81xx_nvram_config,
1940         .update_fw_options      = qla24xx_update_fw_options,
1941         .load_risc              = qla82xx_load_risc,
1942         .pci_info_str           = qla24xx_pci_info_str,
1943         .fw_version_str         = qla24xx_fw_version_str,
1944         .intr_handler           = qla8044_intr_handler,
1945         .enable_intrs           = qla82xx_enable_intrs,
1946         .disable_intrs          = qla82xx_disable_intrs,
1947         .abort_command          = qla24xx_abort_command,
1948         .target_reset           = qla24xx_abort_target,
1949         .lun_reset              = qla24xx_lun_reset,
1950         .fabric_login           = qla24xx_login_fabric,
1951         .fabric_logout          = qla24xx_fabric_logout,
1952         .calc_req_entries       = NULL,
1953         .build_iocbs            = NULL,
1954         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1955         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1956         .read_nvram             = NULL,
1957         .write_nvram            = NULL,
1958         .fw_dump                = qla8044_fw_dump,
1959         .beacon_on              = qla82xx_beacon_on,
1960         .beacon_off             = qla82xx_beacon_off,
1961         .beacon_blink           = NULL,
1962         .read_optrom            = qla8044_read_optrom_data,
1963         .write_optrom           = qla8044_write_optrom_data,
1964         .get_flash_version      = qla82xx_get_flash_version,
1965         .start_scsi             = qla82xx_start_scsi,
1966         .abort_isp              = qla8044_abort_isp,
1967         .iospace_config         = qla82xx_iospace_config,
1968         .initialize_adapter     = qla2x00_initialize_adapter,
1969 };
1970
1971 static struct isp_operations qla83xx_isp_ops = {
1972         .pci_config             = qla25xx_pci_config,
1973         .reset_chip             = qla24xx_reset_chip,
1974         .chip_diag              = qla24xx_chip_diag,
1975         .config_rings           = qla24xx_config_rings,
1976         .reset_adapter          = qla24xx_reset_adapter,
1977         .nvram_config           = qla81xx_nvram_config,
1978         .update_fw_options      = qla81xx_update_fw_options,
1979         .load_risc              = qla81xx_load_risc,
1980         .pci_info_str           = qla24xx_pci_info_str,
1981         .fw_version_str         = qla24xx_fw_version_str,
1982         .intr_handler           = qla24xx_intr_handler,
1983         .enable_intrs           = qla24xx_enable_intrs,
1984         .disable_intrs          = qla24xx_disable_intrs,
1985         .abort_command          = qla24xx_abort_command,
1986         .target_reset           = qla24xx_abort_target,
1987         .lun_reset              = qla24xx_lun_reset,
1988         .fabric_login           = qla24xx_login_fabric,
1989         .fabric_logout          = qla24xx_fabric_logout,
1990         .calc_req_entries       = NULL,
1991         .build_iocbs            = NULL,
1992         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1993         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1994         .read_nvram             = NULL,
1995         .write_nvram            = NULL,
1996         .fw_dump                = qla83xx_fw_dump,
1997         .beacon_on              = qla24xx_beacon_on,
1998         .beacon_off             = qla24xx_beacon_off,
1999         .beacon_blink           = qla83xx_beacon_blink,
2000         .read_optrom            = qla25xx_read_optrom_data,
2001         .write_optrom           = qla24xx_write_optrom_data,
2002         .get_flash_version      = qla24xx_get_flash_version,
2003         .start_scsi             = qla24xx_dif_start_scsi,
2004         .abort_isp              = qla2x00_abort_isp,
2005         .iospace_config         = qla83xx_iospace_config,
2006         .initialize_adapter     = qla2x00_initialize_adapter,
2007 };
2008
2009 static struct isp_operations qlafx00_isp_ops = {
2010         .pci_config             = qlafx00_pci_config,
2011         .reset_chip             = qlafx00_soft_reset,
2012         .chip_diag              = qlafx00_chip_diag,
2013         .config_rings           = qlafx00_config_rings,
2014         .reset_adapter          = qlafx00_soft_reset,
2015         .nvram_config           = NULL,
2016         .update_fw_options      = NULL,
2017         .load_risc              = NULL,
2018         .pci_info_str           = qlafx00_pci_info_str,
2019         .fw_version_str         = qlafx00_fw_version_str,
2020         .intr_handler           = qlafx00_intr_handler,
2021         .enable_intrs           = qlafx00_enable_intrs,
2022         .disable_intrs          = qlafx00_disable_intrs,
2023         .abort_command          = qla24xx_async_abort_command,
2024         .target_reset           = qlafx00_abort_target,
2025         .lun_reset              = qlafx00_lun_reset,
2026         .fabric_login           = NULL,
2027         .fabric_logout          = NULL,
2028         .calc_req_entries       = NULL,
2029         .build_iocbs            = NULL,
2030         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2031         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2032         .read_nvram             = qla24xx_read_nvram_data,
2033         .write_nvram            = qla24xx_write_nvram_data,
2034         .fw_dump                = NULL,
2035         .beacon_on              = qla24xx_beacon_on,
2036         .beacon_off             = qla24xx_beacon_off,
2037         .beacon_blink           = NULL,
2038         .read_optrom            = qla24xx_read_optrom_data,
2039         .write_optrom           = qla24xx_write_optrom_data,
2040         .get_flash_version      = qla24xx_get_flash_version,
2041         .start_scsi             = qlafx00_start_scsi,
2042         .abort_isp              = qlafx00_abort_isp,
2043         .iospace_config         = qlafx00_iospace_config,
2044         .initialize_adapter     = qlafx00_initialize_adapter,
2045 };
2046
2047 static struct isp_operations qla27xx_isp_ops = {
2048         .pci_config             = qla25xx_pci_config,
2049         .reset_chip             = qla24xx_reset_chip,
2050         .chip_diag              = qla24xx_chip_diag,
2051         .config_rings           = qla24xx_config_rings,
2052         .reset_adapter          = qla24xx_reset_adapter,
2053         .nvram_config           = qla81xx_nvram_config,
2054         .update_fw_options      = qla81xx_update_fw_options,
2055         .load_risc              = qla81xx_load_risc,
2056         .pci_info_str           = qla24xx_pci_info_str,
2057         .fw_version_str         = qla24xx_fw_version_str,
2058         .intr_handler           = qla24xx_intr_handler,
2059         .enable_intrs           = qla24xx_enable_intrs,
2060         .disable_intrs          = qla24xx_disable_intrs,
2061         .abort_command          = qla24xx_abort_command,
2062         .target_reset           = qla24xx_abort_target,
2063         .lun_reset              = qla24xx_lun_reset,
2064         .fabric_login           = qla24xx_login_fabric,
2065         .fabric_logout          = qla24xx_fabric_logout,
2066         .calc_req_entries       = NULL,
2067         .build_iocbs            = NULL,
2068         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2069         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2070         .read_nvram             = NULL,
2071         .write_nvram            = NULL,
2072         .fw_dump                = qla27xx_fwdump,
2073         .beacon_on              = qla24xx_beacon_on,
2074         .beacon_off             = qla24xx_beacon_off,
2075         .beacon_blink           = qla83xx_beacon_blink,
2076         .read_optrom            = qla25xx_read_optrom_data,
2077         .write_optrom           = qla24xx_write_optrom_data,
2078         .get_flash_version      = qla24xx_get_flash_version,
2079         .start_scsi             = qla24xx_dif_start_scsi,
2080         .abort_isp              = qla2x00_abort_isp,
2081         .iospace_config         = qla83xx_iospace_config,
2082         .initialize_adapter     = qla2x00_initialize_adapter,
2083 };
2084
2085 static inline void
2086 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2087 {
2088         ha->device_type = DT_EXTENDED_IDS;
2089         switch (ha->pdev->device) {
2090         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2091                 ha->device_type |= DT_ISP2100;
2092                 ha->device_type &= ~DT_EXTENDED_IDS;
2093                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2094                 break;
2095         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2096                 ha->device_type |= DT_ISP2200;
2097                 ha->device_type &= ~DT_EXTENDED_IDS;
2098                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2099                 break;
2100         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2101                 ha->device_type |= DT_ISP2300;
2102                 ha->device_type |= DT_ZIO_SUPPORTED;
2103                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2104                 break;
2105         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2106                 ha->device_type |= DT_ISP2312;
2107                 ha->device_type |= DT_ZIO_SUPPORTED;
2108                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2109                 break;
2110         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2111                 ha->device_type |= DT_ISP2322;
2112                 ha->device_type |= DT_ZIO_SUPPORTED;
2113                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2114                     ha->pdev->subsystem_device == 0x0170)
2115                         ha->device_type |= DT_OEM_001;
2116                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2117                 break;
2118         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2119                 ha->device_type |= DT_ISP6312;
2120                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2121                 break;
2122         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2123                 ha->device_type |= DT_ISP6322;
2124                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2125                 break;
2126         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2127                 ha->device_type |= DT_ISP2422;
2128                 ha->device_type |= DT_ZIO_SUPPORTED;
2129                 ha->device_type |= DT_FWI2;
2130                 ha->device_type |= DT_IIDMA;
2131                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2132                 break;
2133         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2134                 ha->device_type |= DT_ISP2432;
2135                 ha->device_type |= DT_ZIO_SUPPORTED;
2136                 ha->device_type |= DT_FWI2;
2137                 ha->device_type |= DT_IIDMA;
2138                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2139                 break;
2140         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2141                 ha->device_type |= DT_ISP8432;
2142                 ha->device_type |= DT_ZIO_SUPPORTED;
2143                 ha->device_type |= DT_FWI2;
2144                 ha->device_type |= DT_IIDMA;
2145                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2146                 break;
2147         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2148                 ha->device_type |= DT_ISP5422;
2149                 ha->device_type |= DT_FWI2;
2150                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2151                 break;
2152         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2153                 ha->device_type |= DT_ISP5432;
2154                 ha->device_type |= DT_FWI2;
2155                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2156                 break;
2157         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2158                 ha->device_type |= DT_ISP2532;
2159                 ha->device_type |= DT_ZIO_SUPPORTED;
2160                 ha->device_type |= DT_FWI2;
2161                 ha->device_type |= DT_IIDMA;
2162                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2163                 break;
2164         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2165                 ha->device_type |= DT_ISP8001;
2166                 ha->device_type |= DT_ZIO_SUPPORTED;
2167                 ha->device_type |= DT_FWI2;
2168                 ha->device_type |= DT_IIDMA;
2169                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2170                 break;
2171         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2172                 ha->device_type |= DT_ISP8021;
2173                 ha->device_type |= DT_ZIO_SUPPORTED;
2174                 ha->device_type |= DT_FWI2;
2175                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2176                 /* Initialize 82XX ISP flags */
2177                 qla82xx_init_flags(ha);
2178                 break;
2179          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2180                 ha->device_type |= DT_ISP8044;
2181                 ha->device_type |= DT_ZIO_SUPPORTED;
2182                 ha->device_type |= DT_FWI2;
2183                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2184                 /* Initialize 82XX ISP flags */
2185                 qla82xx_init_flags(ha);
2186                 break;
2187         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2188                 ha->device_type |= DT_ISP2031;
2189                 ha->device_type |= DT_ZIO_SUPPORTED;
2190                 ha->device_type |= DT_FWI2;
2191                 ha->device_type |= DT_IIDMA;
2192                 ha->device_type |= DT_T10_PI;
2193                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2194                 break;
2195         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2196                 ha->device_type |= DT_ISP8031;
2197                 ha->device_type |= DT_ZIO_SUPPORTED;
2198                 ha->device_type |= DT_FWI2;
2199                 ha->device_type |= DT_IIDMA;
2200                 ha->device_type |= DT_T10_PI;
2201                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2202                 break;
2203         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2204                 ha->device_type |= DT_ISPFX00;
2205                 break;
2206         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2207                 ha->device_type |= DT_ISP2071;
2208                 ha->device_type |= DT_ZIO_SUPPORTED;
2209                 ha->device_type |= DT_FWI2;
2210                 ha->device_type |= DT_IIDMA;
2211                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2212                 break;
2213         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2214                 ha->device_type |= DT_ISP2271;
2215                 ha->device_type |= DT_ZIO_SUPPORTED;
2216                 ha->device_type |= DT_FWI2;
2217                 ha->device_type |= DT_IIDMA;
2218                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2219                 break;
2220         }
2221
2222         if (IS_QLA82XX(ha))
2223                 ha->port_no = ha->portnum & 1;
2224         else {
2225                 /* Get adapter physical port no from interrupt pin register. */
2226                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2227                 if (IS_QLA27XX(ha))
2228                         ha->port_no--;
2229                 else
2230                         ha->port_no = !(ha->port_no & 1);
2231         }
2232
2233         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2234             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2235             ha->device_type, ha->port_no, ha->fw_srisc_address);
2236 }
2237
2238 static void
2239 qla2xxx_scan_start(struct Scsi_Host *shost)
2240 {
2241         scsi_qla_host_t *vha = shost_priv(shost);
2242
2243         if (vha->hw->flags.running_gold_fw)
2244                 return;
2245
2246         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2247         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2248         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2249         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2250 }
2251
2252 static int
2253 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2254 {
2255         scsi_qla_host_t *vha = shost_priv(shost);
2256
2257         if (!vha->host)
2258                 return 1;
2259         if (time > vha->hw->loop_reset_delay * HZ)
2260                 return 1;
2261
2262         return atomic_read(&vha->loop_state) == LOOP_READY;
2263 }
2264
2265 /*
2266  * PCI driver interface
2267  */
2268 static int
2269 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2270 {
2271         int     ret = -ENODEV;
2272         struct Scsi_Host *host;
2273         scsi_qla_host_t *base_vha = NULL;
2274         struct qla_hw_data *ha;
2275         char pci_info[30];
2276         char fw_str[30], wq_name[30];
2277         struct scsi_host_template *sht;
2278         int bars, mem_only = 0;
2279         uint16_t req_length = 0, rsp_length = 0;
2280         struct req_que *req = NULL;
2281         struct rsp_que *rsp = NULL;
2282         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2283         sht = &qla2xxx_driver_template;
2284         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2285             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2286             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2287             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2288             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2289             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2290             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2291             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2292             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2293             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2294             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2295             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2296             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2297             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271) {
2298                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2299                 mem_only = 1;
2300                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2301                     "Mem only adapter.\n");
2302         }
2303         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2304             "Bars=%d.\n", bars);
2305
2306         if (mem_only) {
2307                 if (pci_enable_device_mem(pdev))
2308                         goto probe_out;
2309         } else {
2310                 if (pci_enable_device(pdev))
2311                         goto probe_out;
2312         }
2313
2314         /* This may fail but that's ok */
2315         pci_enable_pcie_error_reporting(pdev);
2316
2317         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2318         if (!ha) {
2319                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2320                     "Unable to allocate memory for ha.\n");
2321                 goto probe_out;
2322         }
2323         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2324             "Memory allocated for ha=%p.\n", ha);
2325         ha->pdev = pdev;
2326         ha->tgt.enable_class_2 = ql2xenableclass2;
2327         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2328         spin_lock_init(&ha->tgt.q_full_lock);
2329
2330         /* Clear our data area */
2331         ha->bars = bars;
2332         ha->mem_only = mem_only;
2333         spin_lock_init(&ha->hardware_lock);
2334         spin_lock_init(&ha->vport_slock);
2335         mutex_init(&ha->selflogin_lock);
2336         mutex_init(&ha->optrom_mutex);
2337
2338         /* Set ISP-type information. */
2339         qla2x00_set_isp_flags(ha);
2340
2341         /* Set EEH reset type to fundamental if required by hba */
2342         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2343             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2344                 pdev->needs_freset = 1;
2345
2346         ha->prev_topology = 0;
2347         ha->init_cb_size = sizeof(init_cb_t);
2348         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2349         ha->optrom_size = OPTROM_SIZE_2300;
2350
2351         /* Assign ISP specific operations. */
2352         if (IS_QLA2100(ha)) {
2353                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2354                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2355                 req_length = REQUEST_ENTRY_CNT_2100;
2356                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2357                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2358                 ha->gid_list_info_size = 4;
2359                 ha->flash_conf_off = ~0;
2360                 ha->flash_data_off = ~0;
2361                 ha->nvram_conf_off = ~0;
2362                 ha->nvram_data_off = ~0;
2363                 ha->isp_ops = &qla2100_isp_ops;
2364         } else if (IS_QLA2200(ha)) {
2365                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2366                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2367                 req_length = REQUEST_ENTRY_CNT_2200;
2368                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2369                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2370                 ha->gid_list_info_size = 4;
2371                 ha->flash_conf_off = ~0;
2372                 ha->flash_data_off = ~0;
2373                 ha->nvram_conf_off = ~0;
2374                 ha->nvram_data_off = ~0;
2375                 ha->isp_ops = &qla2100_isp_ops;
2376         } else if (IS_QLA23XX(ha)) {
2377                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2378                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2379                 req_length = REQUEST_ENTRY_CNT_2200;
2380                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2381                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2382                 ha->gid_list_info_size = 6;
2383                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2384                         ha->optrom_size = OPTROM_SIZE_2322;
2385                 ha->flash_conf_off = ~0;
2386                 ha->flash_data_off = ~0;
2387                 ha->nvram_conf_off = ~0;
2388                 ha->nvram_data_off = ~0;
2389                 ha->isp_ops = &qla2300_isp_ops;
2390         } else if (IS_QLA24XX_TYPE(ha)) {
2391                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2392                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2393                 req_length = REQUEST_ENTRY_CNT_24XX;
2394                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2395                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2396                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2397                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2398                 ha->gid_list_info_size = 8;
2399                 ha->optrom_size = OPTROM_SIZE_24XX;
2400                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2401                 ha->isp_ops = &qla24xx_isp_ops;
2402                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2403                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2404                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2405                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2406         } else if (IS_QLA25XX(ha)) {
2407                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2408                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2409                 req_length = REQUEST_ENTRY_CNT_24XX;
2410                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2411                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2412                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2413                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2414                 ha->gid_list_info_size = 8;
2415                 ha->optrom_size = OPTROM_SIZE_25XX;
2416                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2417                 ha->isp_ops = &qla25xx_isp_ops;
2418                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2419                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2420                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2421                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2422         } else if (IS_QLA81XX(ha)) {
2423                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2424                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2425                 req_length = REQUEST_ENTRY_CNT_24XX;
2426                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2427                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2428                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2429                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2430                 ha->gid_list_info_size = 8;
2431                 ha->optrom_size = OPTROM_SIZE_81XX;
2432                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2433                 ha->isp_ops = &qla81xx_isp_ops;
2434                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2435                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2436                 ha->nvram_conf_off = ~0;
2437                 ha->nvram_data_off = ~0;
2438         } else if (IS_QLA82XX(ha)) {
2439                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2440                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2441                 req_length = REQUEST_ENTRY_CNT_82XX;
2442                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2443                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2444                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2445                 ha->gid_list_info_size = 8;
2446                 ha->optrom_size = OPTROM_SIZE_82XX;
2447                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2448                 ha->isp_ops = &qla82xx_isp_ops;
2449                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2450                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2451                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2452                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2453         } else if (IS_QLA8044(ha)) {
2454                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2455                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2456                 req_length = REQUEST_ENTRY_CNT_82XX;
2457                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2458                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2459                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2460                 ha->gid_list_info_size = 8;
2461                 ha->optrom_size = OPTROM_SIZE_83XX;
2462                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2463                 ha->isp_ops = &qla8044_isp_ops;
2464                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2465                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2466                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2467                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2468         } else if (IS_QLA83XX(ha)) {
2469                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2470                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2471                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2472                 req_length = REQUEST_ENTRY_CNT_83XX;
2473                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2474                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2475                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2476                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2477                 ha->gid_list_info_size = 8;
2478                 ha->optrom_size = OPTROM_SIZE_83XX;
2479                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2480                 ha->isp_ops = &qla83xx_isp_ops;
2481                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2482                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2483                 ha->nvram_conf_off = ~0;
2484                 ha->nvram_data_off = ~0;
2485         }  else if (IS_QLAFX00(ha)) {
2486                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2487                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2488                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2489                 req_length = REQUEST_ENTRY_CNT_FX00;
2490                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2491                 ha->isp_ops = &qlafx00_isp_ops;
2492                 ha->port_down_retry_count = 30; /* default value */
2493                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2494                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2495                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2496                 ha->mr.fw_hbt_en = 1;
2497                 ha->mr.host_info_resend = false;
2498                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2499         } else if (IS_QLA27XX(ha)) {
2500                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2501                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2502                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2503                 req_length = REQUEST_ENTRY_CNT_24XX;
2504                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2505                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2506                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2507                 ha->gid_list_info_size = 8;
2508                 ha->optrom_size = OPTROM_SIZE_83XX;
2509                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2510                 ha->isp_ops = &qla27xx_isp_ops;
2511                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2512                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2513                 ha->nvram_conf_off = ~0;
2514                 ha->nvram_data_off = ~0;
2515         }
2516
2517         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2518             "mbx_count=%d, req_length=%d, "
2519             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2520             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2521             "max_fibre_devices=%d.\n",
2522             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2523             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2524             ha->nvram_npiv_size, ha->max_fibre_devices);
2525         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2526             "isp_ops=%p, flash_conf_off=%d, "
2527             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2528             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2529             ha->nvram_conf_off, ha->nvram_data_off);
2530
2531         /* Configure PCI I/O space */
2532         ret = ha->isp_ops->iospace_config(ha);
2533         if (ret)
2534                 goto iospace_config_failed;
2535
2536         ql_log_pci(ql_log_info, pdev, 0x001d,
2537             "Found an ISP%04X irq %d iobase 0x%p.\n",
2538             pdev->device, pdev->irq, ha->iobase);
2539         mutex_init(&ha->vport_lock);
2540         init_completion(&ha->mbx_cmd_comp);
2541         complete(&ha->mbx_cmd_comp);
2542         init_completion(&ha->mbx_intr_comp);
2543         init_completion(&ha->dcbx_comp);
2544         init_completion(&ha->lb_portup_comp);
2545
2546         set_bit(0, (unsigned long *) ha->vp_idx_map);
2547
2548         qla2x00_config_dma_addressing(ha);
2549         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2550             "64 Bit addressing is %s.\n",
2551             ha->flags.enable_64bit_addressing ? "enable" :
2552             "disable");
2553         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2554         if (ret) {
2555                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2556                     "Failed to allocate memory for adapter, aborting.\n");
2557
2558                 goto probe_hw_failed;
2559         }
2560
2561         req->max_q_depth = MAX_Q_DEPTH;
2562         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2563                 req->max_q_depth = ql2xmaxqdepth;
2564
2565
2566         base_vha = qla2x00_create_host(sht, ha);
2567         if (!base_vha) {
2568                 ret = -ENOMEM;
2569                 qla2x00_mem_free(ha);
2570                 qla2x00_free_req_que(ha, req);
2571                 qla2x00_free_rsp_que(ha, rsp);
2572                 goto probe_hw_failed;
2573         }
2574
2575         pci_set_drvdata(pdev, base_vha);
2576         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2577
2578         host = base_vha->host;
2579         base_vha->req = req;
2580         if (IS_QLA2XXX_MIDTYPE(ha))
2581                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2582         else
2583                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2584                                                 base_vha->vp_idx;
2585
2586         /* Setup fcport template structure. */
2587         ha->mr.fcport.vha = base_vha;
2588         ha->mr.fcport.port_type = FCT_UNKNOWN;
2589         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2590         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2591         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2592         ha->mr.fcport.scan_state = 1;
2593
2594         /* Set the SG table size based on ISP type */
2595         if (!IS_FWI2_CAPABLE(ha)) {
2596                 if (IS_QLA2100(ha))
2597                         host->sg_tablesize = 32;
2598         } else {
2599                 if (!IS_QLA82XX(ha))
2600                         host->sg_tablesize = QLA_SG_ALL;
2601         }
2602         host->max_id = ha->max_fibre_devices;
2603         host->cmd_per_lun = 3;
2604         host->unique_id = host->host_no;
2605         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2606                 host->max_cmd_len = 32;
2607         else
2608                 host->max_cmd_len = MAX_CMDSZ;
2609         host->max_channel = MAX_BUSES - 1;
2610         /* Older HBAs support only 16-bit LUNs */
2611         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2612             ql2xmaxlun > 0xffff)
2613                 host->max_lun = 0xffff;
2614         else
2615                 host->max_lun = ql2xmaxlun;
2616         host->transportt = qla2xxx_transport_template;
2617         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2618
2619         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2620             "max_id=%d this_id=%d "
2621             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2622             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2623             host->this_id, host->cmd_per_lun, host->unique_id,
2624             host->max_cmd_len, host->max_channel, host->max_lun,
2625             host->transportt, sht->vendor_id);
2626
2627 que_init:
2628         /* Alloc arrays of request and response ring ptrs */
2629         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2630                 ql_log(ql_log_fatal, base_vha, 0x003d,
2631                     "Failed to allocate memory for queue pointers..."
2632                     "aborting.\n");
2633                 goto probe_init_failed;
2634         }
2635
2636         qlt_probe_one_stage1(base_vha, ha);
2637
2638         /* Set up the irqs */
2639         ret = qla2x00_request_irqs(ha, rsp);
2640         if (ret)
2641                 goto probe_init_failed;
2642
2643         pci_save_state(pdev);
2644
2645         /* Assign back pointers */
2646         rsp->req = req;
2647         req->rsp = rsp;
2648
2649         if (IS_QLAFX00(ha)) {
2650                 ha->rsp_q_map[0] = rsp;
2651                 ha->req_q_map[0] = req;
2652                 set_bit(0, ha->req_qid_map);
2653                 set_bit(0, ha->rsp_qid_map);
2654         }
2655
2656         /* FWI2-capable only. */
2657         req->req_q_in = &ha->iobase->isp24.req_q_in;
2658         req->req_q_out = &ha->iobase->isp24.req_q_out;
2659         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2660         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2661         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2662                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2663                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2664                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2665                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2666         }
2667
2668         if (IS_QLAFX00(ha)) {
2669                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2670                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2671                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2672                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2673         }
2674
2675         if (IS_P3P_TYPE(ha)) {
2676                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2677                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2678                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2679         }
2680
2681         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2682             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2683             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2684         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2685             "req->req_q_in=%p req->req_q_out=%p "
2686             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2687             req->req_q_in, req->req_q_out,
2688             rsp->rsp_q_in, rsp->rsp_q_out);
2689         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2690             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2691             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2692         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2693             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2694             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2695
2696         if (ha->isp_ops->initialize_adapter(base_vha)) {
2697                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2698                     "Failed to initialize adapter - Adapter flags %x.\n",
2699                     base_vha->device_flags);
2700
2701                 if (IS_QLA82XX(ha)) {
2702                         qla82xx_idc_lock(ha);
2703                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2704                                 QLA8XXX_DEV_FAILED);
2705                         qla82xx_idc_unlock(ha);
2706                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2707                             "HW State: FAILED.\n");
2708                 } else if (IS_QLA8044(ha)) {
2709                         qla8044_idc_lock(ha);
2710                         qla8044_wr_direct(base_vha,
2711                                 QLA8044_CRB_DEV_STATE_INDEX,
2712                                 QLA8XXX_DEV_FAILED);
2713                         qla8044_idc_unlock(ha);
2714                         ql_log(ql_log_fatal, base_vha, 0x0150,
2715                             "HW State: FAILED.\n");
2716                 }
2717
2718                 ret = -ENODEV;
2719                 goto probe_failed;
2720         }
2721
2722         if (IS_QLAFX00(ha))
2723                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2724         else
2725                 host->can_queue = req->num_outstanding_cmds - 10;
2726
2727         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2728             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2729             host->can_queue, base_vha->req,
2730             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2731
2732         if (ha->mqenable) {
2733                 if (qla25xx_setup_mode(base_vha)) {
2734                         ql_log(ql_log_warn, base_vha, 0x00ec,
2735                             "Failed to create queues, falling back to single queue mode.\n");
2736                         goto que_init;
2737                 }
2738         }
2739
2740         if (ha->flags.running_gold_fw)
2741                 goto skip_dpc;
2742
2743         /*
2744          * Startup the kernel thread for this host adapter
2745          */
2746         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2747             "%s_dpc", base_vha->host_str);
2748         if (IS_ERR(ha->dpc_thread)) {
2749                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2750                     "Failed to start DPC thread.\n");
2751                 ret = PTR_ERR(ha->dpc_thread);
2752                 goto probe_failed;
2753         }
2754         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2755             "DPC thread started successfully.\n");
2756
2757         /*
2758          * If we're not coming up in initiator mode, we might sit for
2759          * a while without waking up the dpc thread, which leads to a
2760          * stuck process warning.  So just kick the dpc once here and
2761          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2762          */
2763         qla2xxx_wake_dpc(base_vha);
2764
2765         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2766
2767         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2768                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2769                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2770                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2771
2772                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2773                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2774                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2775                 INIT_WORK(&ha->idc_state_handler,
2776                     qla83xx_idc_state_handler_work);
2777                 INIT_WORK(&ha->nic_core_unrecoverable,
2778                     qla83xx_nic_core_unrecoverable_work);
2779         }
2780
2781 skip_dpc:
2782         list_add_tail(&base_vha->list, &ha->vp_list);
2783         base_vha->host->irq = ha->pdev->irq;
2784
2785         /* Initialized the timer */
2786         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2787         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2788             "Started qla2x00_timer with "
2789             "interval=%d.\n", WATCH_INTERVAL);
2790         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2791             "Detected hba at address=%p.\n",
2792             ha);
2793
2794         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2795                 if (ha->fw_attributes & BIT_4) {
2796                         int prot = 0, guard;
2797                         base_vha->flags.difdix_supported = 1;
2798                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2799                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2800                         if (ql2xenabledif == 1)
2801                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2802                         scsi_host_set_prot(host,
2803                             prot | SHOST_DIF_TYPE1_PROTECTION
2804                             | SHOST_DIF_TYPE2_PROTECTION
2805                             | SHOST_DIF_TYPE3_PROTECTION
2806                             | SHOST_DIX_TYPE1_PROTECTION
2807                             | SHOST_DIX_TYPE2_PROTECTION
2808                             | SHOST_DIX_TYPE3_PROTECTION);
2809
2810                         guard = SHOST_DIX_GUARD_CRC;
2811
2812                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2813                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2814                                 guard |= SHOST_DIX_GUARD_IP;
2815
2816                         scsi_host_set_guard(host, guard);
2817                 } else
2818                         base_vha->flags.difdix_supported = 0;
2819         }
2820
2821         ha->isp_ops->enable_intrs(ha);
2822
2823         if (IS_QLAFX00(ha)) {
2824                 ret = qlafx00_fx_disc(base_vha,
2825                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2826                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2827                     QLA_SG_ALL : 128;
2828         }
2829
2830         ret = scsi_add_host(host, &pdev->dev);
2831         if (ret)
2832                 goto probe_failed;
2833
2834         base_vha->flags.init_done = 1;
2835         base_vha->flags.online = 1;
2836         ha->prev_minidump_failed = 0;
2837
2838         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2839             "Init done and hba is online.\n");
2840
2841         if (qla_ini_mode_enabled(base_vha))
2842                 scsi_scan_host(host);
2843         else
2844                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2845                         "skipping scsi_scan_host() for non-initiator port\n");
2846
2847         qla2x00_alloc_sysfs_attr(base_vha);
2848
2849         if (IS_QLAFX00(ha)) {
2850                 ret = qlafx00_fx_disc(base_vha,
2851                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2852
2853                 /* Register system information */
2854                 ret =  qlafx00_fx_disc(base_vha,
2855                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2856         }
2857
2858         qla2x00_init_host_attr(base_vha);
2859
2860         qla2x00_dfs_setup(base_vha);
2861
2862         ql_log(ql_log_info, base_vha, 0x00fb,
2863             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2864         ql_log(ql_log_info, base_vha, 0x00fc,
2865             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2866             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2867             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2868             base_vha->host_no,
2869             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
2870
2871         qlt_add_target(ha, base_vha);
2872
2873         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2874         return 0;
2875
2876 probe_init_failed:
2877         qla2x00_free_req_que(ha, req);
2878         ha->req_q_map[0] = NULL;
2879         clear_bit(0, ha->req_qid_map);
2880         qla2x00_free_rsp_que(ha, rsp);
2881         ha->rsp_q_map[0] = NULL;
2882         clear_bit(0, ha->rsp_qid_map);
2883         ha->max_req_queues = ha->max_rsp_queues = 0;
2884
2885 probe_failed:
2886         if (base_vha->timer_active)
2887                 qla2x00_stop_timer(base_vha);
2888         base_vha->flags.online = 0;
2889         if (ha->dpc_thread) {
2890                 struct task_struct *t = ha->dpc_thread;
2891
2892                 ha->dpc_thread = NULL;
2893                 kthread_stop(t);
2894         }
2895
2896         qla2x00_free_device(base_vha);
2897
2898         scsi_host_put(base_vha->host);
2899
2900 probe_hw_failed:
2901         qla2x00_clear_drv_active(ha);
2902
2903 iospace_config_failed:
2904         if (IS_P3P_TYPE(ha)) {
2905                 if (!ha->nx_pcibase)
2906                         iounmap((device_reg_t *)ha->nx_pcibase);
2907                 if (!ql2xdbwr)
2908                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2909         } else {
2910                 if (ha->iobase)
2911                         iounmap(ha->iobase);
2912                 if (ha->cregbase)
2913                         iounmap(ha->cregbase);
2914         }
2915         pci_release_selected_regions(ha->pdev, ha->bars);
2916         kfree(ha);
2917         ha = NULL;
2918
2919 probe_out:
2920         pci_disable_device(pdev);
2921         return ret;
2922 }
2923
2924 static void
2925 qla2x00_shutdown(struct pci_dev *pdev)
2926 {
2927         scsi_qla_host_t *vha;
2928         struct qla_hw_data  *ha;
2929
2930         if (!atomic_read(&pdev->enable_cnt))
2931                 return;
2932
2933         vha = pci_get_drvdata(pdev);
2934         ha = vha->hw;
2935
2936         /* Notify ISPFX00 firmware */
2937         if (IS_QLAFX00(ha))
2938                 qlafx00_driver_shutdown(vha, 20);
2939
2940         /* Turn-off FCE trace */
2941         if (ha->flags.fce_enabled) {
2942                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2943                 ha->flags.fce_enabled = 0;
2944         }
2945
2946         /* Turn-off EFT trace */
2947         if (ha->eft)
2948                 qla2x00_disable_eft_trace(vha);
2949
2950         /* Stop currently executing firmware. */
2951         qla2x00_try_to_stop_firmware(vha);
2952
2953         /* Turn adapter off line */
2954         vha->flags.online = 0;
2955
2956         /* turn-off interrupts on the card */
2957         if (ha->interrupts_on) {
2958                 vha->flags.init_done = 0;
2959                 ha->isp_ops->disable_intrs(ha);
2960         }
2961
2962         qla2x00_free_irqs(vha);
2963
2964         qla2x00_free_fw_dump(ha);
2965
2966         pci_disable_pcie_error_reporting(pdev);
2967         pci_disable_device(pdev);
2968 }
2969
2970 /* Deletes all the virtual ports for a given ha */
2971 static void
2972 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
2973 {
2974         struct Scsi_Host *scsi_host;
2975         scsi_qla_host_t *vha;
2976         unsigned long flags;
2977
2978         mutex_lock(&ha->vport_lock);
2979         while (ha->cur_vport_count) {
2980                 spin_lock_irqsave(&ha->vport_slock, flags);
2981
2982                 BUG_ON(base_vha->list.next == &ha->vp_list);
2983                 /* This assumes first entry in ha->vp_list is always base vha */
2984                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2985                 scsi_host = scsi_host_get(vha->host);
2986
2987                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2988                 mutex_unlock(&ha->vport_lock);
2989
2990                 fc_vport_terminate(vha->fc_vport);
2991                 scsi_host_put(vha->host);
2992
2993                 mutex_lock(&ha->vport_lock);
2994         }
2995         mutex_unlock(&ha->vport_lock);
2996 }
2997
2998 /* Stops all deferred work threads */
2999 static void
3000 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3001 {
3002         /* Flush the work queue and remove it */
3003         if (ha->wq) {
3004                 flush_workqueue(ha->wq);
3005                 destroy_workqueue(ha->wq);
3006                 ha->wq = NULL;
3007         }
3008
3009         /* Cancel all work and destroy DPC workqueues */
3010         if (ha->dpc_lp_wq) {
3011                 cancel_work_sync(&ha->idc_aen);
3012                 destroy_workqueue(ha->dpc_lp_wq);
3013                 ha->dpc_lp_wq = NULL;
3014         }
3015
3016         if (ha->dpc_hp_wq) {
3017                 cancel_work_sync(&ha->nic_core_reset);
3018                 cancel_work_sync(&ha->idc_state_handler);
3019                 cancel_work_sync(&ha->nic_core_unrecoverable);
3020                 destroy_workqueue(ha->dpc_hp_wq);
3021                 ha->dpc_hp_wq = NULL;
3022         }
3023
3024         /* Kill the kernel thread for this host */
3025         if (ha->dpc_thread) {
3026                 struct task_struct *t = ha->dpc_thread;
3027
3028                 /*
3029                  * qla2xxx_wake_dpc checks for ->dpc_thread
3030                  * so we need to zero it out.
3031                  */
3032                 ha->dpc_thread = NULL;
3033                 kthread_stop(t);
3034         }
3035 }
3036
3037 static void
3038 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3039 {
3040         if (IS_QLA82XX(ha)) {
3041
3042                 iounmap((device_reg_t *)ha->nx_pcibase);
3043                 if (!ql2xdbwr)
3044                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3045         } else {
3046                 if (ha->iobase)
3047                         iounmap(ha->iobase);
3048
3049                 if (ha->cregbase)
3050                         iounmap(ha->cregbase);
3051
3052                 if (ha->mqiobase)
3053                         iounmap(ha->mqiobase);
3054
3055                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3056                         iounmap(ha->msixbase);
3057         }
3058 }
3059
3060 static void
3061 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3062 {
3063         if (IS_QLA8044(ha)) {
3064                 qla8044_idc_lock(ha);
3065                 qla8044_clear_drv_active(ha);
3066                 qla8044_idc_unlock(ha);
3067         } else if (IS_QLA82XX(ha)) {
3068                 qla82xx_idc_lock(ha);
3069                 qla82xx_clear_drv_active(ha);
3070                 qla82xx_idc_unlock(ha);
3071         }
3072 }
3073
3074 static void
3075 qla2x00_remove_one(struct pci_dev *pdev)
3076 {
3077         scsi_qla_host_t *base_vha;
3078         struct qla_hw_data  *ha;
3079
3080         base_vha = pci_get_drvdata(pdev);
3081         ha = base_vha->hw;
3082
3083         /* Indicate device removal to prevent future board_disable and wait
3084          * until any pending board_disable has completed. */
3085         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3086         cancel_work_sync(&ha->board_disable);
3087
3088         /*
3089          * If the PCI device is disabled then there was a PCI-disconnect and
3090          * qla2x00_disable_board_on_pci_error has taken care of most of the
3091          * resources.
3092          */
3093         if (!atomic_read(&pdev->enable_cnt)) {
3094                 scsi_host_put(base_vha->host);
3095                 kfree(ha);
3096                 pci_set_drvdata(pdev, NULL);
3097                 return;
3098         }
3099
3100         qla2x00_wait_for_hba_ready(base_vha);
3101
3102         set_bit(UNLOADING, &base_vha->dpc_flags);
3103
3104         if (IS_QLAFX00(ha))
3105                 qlafx00_driver_shutdown(base_vha, 20);
3106
3107         qla2x00_delete_all_vps(ha, base_vha);
3108
3109         if (IS_QLA8031(ha)) {
3110                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3111                     "Clearing fcoe driver presence.\n");
3112                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3113                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3114                             "Error while clearing DRV-Presence.\n");
3115         }
3116
3117         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3118
3119         qla2x00_dfs_remove(base_vha);
3120
3121         qla84xx_put_chip(base_vha);
3122
3123         /* Laser should be disabled only for ISP2031 */
3124         if (IS_QLA2031(ha))
3125                 qla83xx_disable_laser(base_vha);
3126
3127         /* Disable timer */
3128         if (base_vha->timer_active)
3129                 qla2x00_stop_timer(base_vha);
3130
3131         base_vha->flags.online = 0;
3132
3133         qla2x00_destroy_deferred_work(ha);
3134
3135         qlt_remove_target(ha, base_vha);
3136
3137         qla2x00_free_sysfs_attr(base_vha, true);
3138
3139         fc_remove_host(base_vha->host);
3140
3141         scsi_remove_host(base_vha->host);
3142
3143         qla2x00_free_device(base_vha);
3144
3145         qla2x00_clear_drv_active(ha);
3146
3147         scsi_host_put(base_vha->host);
3148
3149         qla2x00_unmap_iobases(ha);
3150
3151         pci_release_selected_regions(ha->pdev, ha->bars);
3152         kfree(ha);
3153         ha = NULL;
3154
3155         pci_disable_pcie_error_reporting(pdev);
3156
3157         pci_disable_device(pdev);
3158 }
3159
3160 static void
3161 qla2x00_free_device(scsi_qla_host_t *vha)
3162 {
3163         struct qla_hw_data *ha = vha->hw;
3164
3165         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3166
3167         /* Disable timer */
3168         if (vha->timer_active)
3169                 qla2x00_stop_timer(vha);
3170
3171         qla25xx_delete_queues(vha);
3172
3173         if (ha->flags.fce_enabled)
3174                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3175
3176         if (ha->eft)
3177                 qla2x00_disable_eft_trace(vha);
3178
3179         /* Stop currently executing firmware. */
3180         qla2x00_try_to_stop_firmware(vha);
3181
3182         vha->flags.online = 0;
3183
3184         /* turn-off interrupts on the card */
3185         if (ha->interrupts_on) {
3186                 vha->flags.init_done = 0;
3187                 ha->isp_ops->disable_intrs(ha);
3188         }
3189
3190         qla2x00_free_irqs(vha);
3191
3192         qla2x00_free_fcports(vha);
3193
3194         qla2x00_mem_free(ha);
3195
3196         qla82xx_md_free(vha);
3197
3198         qla2x00_free_queues(ha);
3199 }
3200
3201 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3202 {
3203         fc_port_t *fcport, *tfcport;
3204
3205         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3206                 list_del(&fcport->list);
3207                 qla2x00_clear_loop_id(fcport);
3208                 kfree(fcport);
3209                 fcport = NULL;
3210         }
3211 }
3212
3213 static inline void
3214 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3215     int defer)
3216 {
3217         struct fc_rport *rport;
3218         scsi_qla_host_t *base_vha;
3219         unsigned long flags;
3220
3221         if (!fcport->rport)
3222                 return;
3223
3224         rport = fcport->rport;
3225         if (defer) {
3226                 base_vha = pci_get_drvdata(vha->hw->pdev);
3227                 spin_lock_irqsave(vha->host->host_lock, flags);
3228                 fcport->drport = rport;
3229                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3230                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3231                 qla2xxx_wake_dpc(base_vha);
3232         } else {
3233                 fc_remote_port_delete(rport);
3234                 qlt_fc_port_deleted(vha, fcport);
3235         }
3236 }
3237
3238 /*
3239  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3240  *
3241  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3242  *
3243  * Return: None.
3244  *
3245  * Context:
3246  */
3247 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3248     int do_login, int defer)
3249 {
3250         if (IS_QLAFX00(vha->hw)) {
3251                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3252                 qla2x00_schedule_rport_del(vha, fcport, defer);
3253                 return;
3254         }
3255
3256         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3257             vha->vp_idx == fcport->vha->vp_idx) {
3258                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3259                 qla2x00_schedule_rport_del(vha, fcport, defer);
3260         }
3261         /*
3262          * We may need to retry the login, so don't change the state of the
3263          * port but do the retries.
3264          */
3265         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3266                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3267
3268         if (!do_login)
3269                 return;
3270
3271         if (fcport->login_retry == 0) {
3272                 fcport->login_retry = vha->hw->login_retry_count;
3273                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3274
3275                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3276                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3277                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3278         }
3279 }
3280
3281 /*
3282  * qla2x00_mark_all_devices_lost
3283  *      Updates fcport state when device goes offline.
3284  *
3285  * Input:
3286  *      ha = adapter block pointer.
3287  *      fcport = port structure pointer.
3288  *
3289  * Return:
3290  *      None.
3291  *
3292  * Context:
3293  */
3294 void
3295 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3296 {
3297         fc_port_t *fcport;
3298
3299         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3300                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3301                         continue;
3302
3303                 /*
3304                  * No point in marking the device as lost, if the device is
3305                  * already DEAD.
3306                  */
3307                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3308                         continue;
3309                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3310                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3311                         if (defer)
3312                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3313                         else if (vha->vp_idx == fcport->vha->vp_idx)
3314                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3315                 }
3316         }
3317 }
3318
3319 /*
3320 * qla2x00_mem_alloc
3321 *      Allocates adapter memory.
3322 *
3323 * Returns:
3324 *      0  = success.
3325 *      !0  = failure.
3326 */
3327 static int
3328 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3329         struct req_que **req, struct rsp_que **rsp)
3330 {
3331         char    name[16];
3332
3333         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3334                 &ha->init_cb_dma, GFP_KERNEL);
3335         if (!ha->init_cb)
3336                 goto fail;
3337
3338         if (qlt_mem_alloc(ha) < 0)
3339                 goto fail_free_init_cb;
3340
3341         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3342                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3343         if (!ha->gid_list)
3344                 goto fail_free_tgt_mem;
3345
3346         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3347         if (!ha->srb_mempool)
3348                 goto fail_free_gid_list;
3349
3350         if (IS_P3P_TYPE(ha)) {
3351                 /* Allocate cache for CT6 Ctx. */
3352                 if (!ctx_cachep) {
3353                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3354                                 sizeof(struct ct6_dsd), 0,
3355                                 SLAB_HWCACHE_ALIGN, NULL);
3356                         if (!ctx_cachep)
3357                                 goto fail_free_gid_list;
3358                 }
3359                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3360                         ctx_cachep);
3361                 if (!ha->ctx_mempool)
3362                         goto fail_free_srb_mempool;
3363                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3364                     "ctx_cachep=%p ctx_mempool=%p.\n",
3365                     ctx_cachep, ha->ctx_mempool);
3366         }
3367
3368         /* Get memory for cached NVRAM */
3369         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3370         if (!ha->nvram)
3371                 goto fail_free_ctx_mempool;
3372
3373         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3374                 ha->pdev->device);
3375         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3376                 DMA_POOL_SIZE, 8, 0);
3377         if (!ha->s_dma_pool)
3378                 goto fail_free_nvram;
3379
3380         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3381             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3382             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3383
3384         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3385                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3386                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3387                 if (!ha->dl_dma_pool) {
3388                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3389                             "Failed to allocate memory for dl_dma_pool.\n");
3390                         goto fail_s_dma_pool;
3391                 }
3392
3393                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3394                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3395                 if (!ha->fcp_cmnd_dma_pool) {
3396                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3397                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3398                         goto fail_dl_dma_pool;
3399                 }
3400                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3401                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3402                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3403         }
3404
3405         /* Allocate memory for SNS commands */
3406         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3407         /* Get consistent memory allocated for SNS commands */
3408                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3409                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3410                 if (!ha->sns_cmd)
3411                         goto fail_dma_pool;
3412                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3413                     "sns_cmd: %p.\n", ha->sns_cmd);
3414         } else {
3415         /* Get consistent memory allocated for MS IOCB */
3416                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3417                         &ha->ms_iocb_dma);
3418                 if (!ha->ms_iocb)
3419                         goto fail_dma_pool;
3420         /* Get consistent memory allocated for CT SNS commands */
3421                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3422                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3423                 if (!ha->ct_sns)
3424                         goto fail_free_ms_iocb;
3425                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3426                     "ms_iocb=%p ct_sns=%p.\n",
3427                     ha->ms_iocb, ha->ct_sns);
3428         }
3429
3430         /* Allocate memory for request ring */
3431         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3432         if (!*req) {
3433                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3434                     "Failed to allocate memory for req.\n");
3435                 goto fail_req;
3436         }
3437         (*req)->length = req_len;
3438         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3439                 ((*req)->length + 1) * sizeof(request_t),
3440                 &(*req)->dma, GFP_KERNEL);
3441         if (!(*req)->ring) {
3442                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3443                     "Failed to allocate memory for req_ring.\n");
3444                 goto fail_req_ring;
3445         }
3446         /* Allocate memory for response ring */
3447         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3448         if (!*rsp) {
3449                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3450                     "Failed to allocate memory for rsp.\n");
3451                 goto fail_rsp;
3452         }
3453         (*rsp)->hw = ha;
3454         (*rsp)->length = rsp_len;
3455         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3456                 ((*rsp)->length + 1) * sizeof(response_t),
3457                 &(*rsp)->dma, GFP_KERNEL);
3458         if (!(*rsp)->ring) {
3459                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3460                     "Failed to allocate memory for rsp_ring.\n");
3461                 goto fail_rsp_ring;
3462         }
3463         (*req)->rsp = *rsp;
3464         (*rsp)->req = *req;
3465         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3466             "req=%p req->length=%d req->ring=%p rsp=%p "
3467             "rsp->length=%d rsp->ring=%p.\n",
3468             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3469             (*rsp)->ring);
3470         /* Allocate memory for NVRAM data for vports */
3471         if (ha->nvram_npiv_size) {
3472                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3473                     ha->nvram_npiv_size, GFP_KERNEL);
3474                 if (!ha->npiv_info) {
3475                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3476                             "Failed to allocate memory for npiv_info.\n");
3477                         goto fail_npiv_info;
3478                 }
3479         } else
3480                 ha->npiv_info = NULL;
3481
3482         /* Get consistent memory allocated for EX-INIT-CB. */
3483         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3484                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3485                     &ha->ex_init_cb_dma);
3486                 if (!ha->ex_init_cb)
3487                         goto fail_ex_init_cb;
3488                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3489                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3490         }
3491
3492         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3493
3494         /* Get consistent memory allocated for Async Port-Database. */
3495         if (!IS_FWI2_CAPABLE(ha)) {
3496                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3497                         &ha->async_pd_dma);
3498                 if (!ha->async_pd)
3499                         goto fail_async_pd;
3500                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3501                     "async_pd=%p.\n", ha->async_pd);
3502         }
3503
3504         INIT_LIST_HEAD(&ha->vp_list);
3505
3506         /* Allocate memory for our loop_id bitmap */
3507         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3508             GFP_KERNEL);
3509         if (!ha->loop_id_map)
3510                 goto fail_async_pd;
3511         else {
3512                 qla2x00_set_reserved_loop_ids(ha);
3513                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3514                     "loop_id_map=%p.\n", ha->loop_id_map);
3515         }
3516
3517         return 0;
3518
3519 fail_async_pd:
3520         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3521 fail_ex_init_cb:
3522         kfree(ha->npiv_info);
3523 fail_npiv_info:
3524         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3525                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3526         (*rsp)->ring = NULL;
3527         (*rsp)->dma = 0;
3528 fail_rsp_ring:
3529         kfree(*rsp);
3530 fail_rsp:
3531         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3532                 sizeof(request_t), (*req)->ring, (*req)->dma);
3533         (*req)->ring = NULL;
3534         (*req)->dma = 0;
3535 fail_req_ring:
3536         kfree(*req);
3537 fail_req:
3538         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3539                 ha->ct_sns, ha->ct_sns_dma);
3540         ha->ct_sns = NULL;
3541         ha->ct_sns_dma = 0;
3542 fail_free_ms_iocb:
3543         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3544         ha->ms_iocb = NULL;
3545         ha->ms_iocb_dma = 0;
3546 fail_dma_pool:
3547         if (IS_QLA82XX(ha) || ql2xenabledif) {
3548                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3549                 ha->fcp_cmnd_dma_pool = NULL;
3550         }
3551 fail_dl_dma_pool:
3552         if (IS_QLA82XX(ha) || ql2xenabledif) {
3553                 dma_pool_destroy(ha->dl_dma_pool);
3554                 ha->dl_dma_pool = NULL;
3555         }
3556 fail_s_dma_pool:
3557         dma_pool_destroy(ha->s_dma_pool);
3558         ha->s_dma_pool = NULL;
3559 fail_free_nvram:
3560         kfree(ha->nvram);
3561         ha->nvram = NULL;
3562 fail_free_ctx_mempool:
3563         mempool_destroy(ha->ctx_mempool);
3564         ha->ctx_mempool = NULL;
3565 fail_free_srb_mempool:
3566         mempool_destroy(ha->srb_mempool);
3567         ha->srb_mempool = NULL;
3568 fail_free_gid_list:
3569         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3570         ha->gid_list,
3571         ha->gid_list_dma);
3572         ha->gid_list = NULL;
3573         ha->gid_list_dma = 0;
3574 fail_free_tgt_mem:
3575         qlt_mem_free(ha);
3576 fail_free_init_cb:
3577         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3578         ha->init_cb_dma);
3579         ha->init_cb = NULL;
3580         ha->init_cb_dma = 0;
3581 fail:
3582         ql_log(ql_log_fatal, NULL, 0x0030,
3583             "Memory allocation failure.\n");
3584         return -ENOMEM;
3585 }
3586
3587 /*
3588 * qla2x00_free_fw_dump
3589 *       Frees fw dump stuff.
3590 *
3591 * Input:
3592 *       ha = adapter block pointer
3593 */
3594 static void
3595 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3596 {
3597         if (ha->fce)
3598                 dma_free_coherent(&ha->pdev->dev,
3599                     FCE_SIZE, ha->fce, ha->fce_dma);
3600
3601         if (ha->eft)
3602                 dma_free_coherent(&ha->pdev->dev,
3603                     EFT_SIZE, ha->eft, ha->eft_dma);
3604
3605         if (ha->fw_dump)
3606                 vfree(ha->fw_dump);
3607         if (ha->fw_dump_template)
3608                 vfree(ha->fw_dump_template);
3609
3610         ha->fce = NULL;
3611         ha->fce_dma = 0;
3612         ha->eft = NULL;
3613         ha->eft_dma = 0;
3614         ha->fw_dumped = 0;
3615         ha->fw_dump_cap_flags = 0;
3616         ha->fw_dump_reading = 0;
3617         ha->fw_dump = NULL;
3618         ha->fw_dump_len = 0;
3619         ha->fw_dump_template = NULL;
3620         ha->fw_dump_template_len = 0;
3621 }
3622
3623 /*
3624 * qla2x00_mem_free
3625 *      Frees all adapter allocated memory.
3626 *
3627 * Input:
3628 *      ha = adapter block pointer.
3629 */
3630 static void
3631 qla2x00_mem_free(struct qla_hw_data *ha)
3632 {
3633         qla2x00_free_fw_dump(ha);
3634
3635         if (ha->mctp_dump)
3636                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3637                     ha->mctp_dump_dma);
3638
3639         if (ha->srb_mempool)
3640                 mempool_destroy(ha->srb_mempool);
3641
3642         if (ha->dcbx_tlv)
3643                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3644                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3645
3646         if (ha->xgmac_data)
3647                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3648                     ha->xgmac_data, ha->xgmac_data_dma);
3649
3650         if (ha->sns_cmd)
3651                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3652                 ha->sns_cmd, ha->sns_cmd_dma);
3653
3654         if (ha->ct_sns)
3655                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3656                 ha->ct_sns, ha->ct_sns_dma);
3657
3658         if (ha->sfp_data)
3659                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3660
3661         if (ha->ms_iocb)
3662                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3663
3664         if (ha->ex_init_cb)
3665                 dma_pool_free(ha->s_dma_pool,
3666                         ha->ex_init_cb, ha->ex_init_cb_dma);
3667
3668         if (ha->async_pd)
3669                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3670
3671         if (ha->s_dma_pool)
3672                 dma_pool_destroy(ha->s_dma_pool);
3673
3674         if (ha->gid_list)
3675                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3676                 ha->gid_list, ha->gid_list_dma);
3677
3678         if (IS_QLA82XX(ha)) {
3679                 if (!list_empty(&ha->gbl_dsd_list)) {
3680                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3681
3682                         /* clean up allocated prev pool */
3683                         list_for_each_entry_safe(dsd_ptr,
3684                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3685                                 dma_pool_free(ha->dl_dma_pool,
3686                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3687                                 list_del(&dsd_ptr->list);
3688                                 kfree(dsd_ptr);
3689                         }
3690                 }
3691         }
3692
3693         if (ha->dl_dma_pool)
3694                 dma_pool_destroy(ha->dl_dma_pool);
3695
3696         if (ha->fcp_cmnd_dma_pool)
3697                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3698
3699         if (ha->ctx_mempool)
3700                 mempool_destroy(ha->ctx_mempool);
3701
3702         qlt_mem_free(ha);
3703
3704         if (ha->init_cb)
3705                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3706                         ha->init_cb, ha->init_cb_dma);
3707         vfree(ha->optrom_buffer);
3708         kfree(ha->nvram);
3709         kfree(ha->npiv_info);
3710         kfree(ha->swl);
3711         kfree(ha->loop_id_map);
3712
3713         ha->srb_mempool = NULL;
3714         ha->ctx_mempool = NULL;
3715         ha->sns_cmd = NULL;
3716         ha->sns_cmd_dma = 0;
3717         ha->ct_sns = NULL;
3718         ha->ct_sns_dma = 0;
3719         ha->ms_iocb = NULL;
3720         ha->ms_iocb_dma = 0;
3721         ha->init_cb = NULL;
3722         ha->init_cb_dma = 0;
3723         ha->ex_init_cb = NULL;
3724         ha->ex_init_cb_dma = 0;
3725         ha->async_pd = NULL;
3726         ha->async_pd_dma = 0;
3727
3728         ha->s_dma_pool = NULL;
3729         ha->dl_dma_pool = NULL;
3730         ha->fcp_cmnd_dma_pool = NULL;
3731
3732         ha->gid_list = NULL;
3733         ha->gid_list_dma = 0;
3734
3735         ha->tgt.atio_ring = NULL;
3736         ha->tgt.atio_dma = 0;
3737         ha->tgt.tgt_vp_map = NULL;
3738 }
3739
3740 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3741                                                 struct qla_hw_data *ha)
3742 {
3743         struct Scsi_Host *host;
3744         struct scsi_qla_host *vha = NULL;
3745
3746         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3747         if (host == NULL) {
3748                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3749                     "Failed to allocate host from the scsi layer, aborting.\n");
3750                 goto fail;
3751         }
3752
3753         /* Clear our data area */
3754         vha = shost_priv(host);
3755         memset(vha, 0, sizeof(scsi_qla_host_t));
3756
3757         vha->host = host;
3758         vha->host_no = host->host_no;
3759         vha->hw = ha;
3760
3761         INIT_LIST_HEAD(&vha->vp_fcports);
3762         INIT_LIST_HEAD(&vha->work_list);
3763         INIT_LIST_HEAD(&vha->list);
3764
3765         spin_lock_init(&vha->work_lock);
3766
3767         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3768         ql_dbg(ql_dbg_init, vha, 0x0041,
3769             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3770             vha->host, vha->hw, vha,
3771             dev_name(&(ha->pdev->dev)));
3772
3773         return vha;
3774
3775 fail:
3776         return vha;
3777 }
3778
3779 static struct qla_work_evt *
3780 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3781 {
3782         struct qla_work_evt *e;
3783         uint8_t bail;
3784
3785         QLA_VHA_MARK_BUSY(vha, bail);
3786         if (bail)
3787                 return NULL;
3788
3789         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3790         if (!e) {
3791                 QLA_VHA_MARK_NOT_BUSY(vha);
3792                 return NULL;
3793         }
3794
3795         INIT_LIST_HEAD(&e->list);
3796         e->type = type;
3797         e->flags = QLA_EVT_FLAG_FREE;
3798         return e;
3799 }
3800
3801 static int
3802 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3803 {
3804         unsigned long flags;
3805
3806         spin_lock_irqsave(&vha->work_lock, flags);
3807         list_add_tail(&e->list, &vha->work_list);
3808         spin_unlock_irqrestore(&vha->work_lock, flags);
3809         qla2xxx_wake_dpc(vha);
3810
3811         return QLA_SUCCESS;
3812 }
3813
3814 int
3815 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3816     u32 data)
3817 {
3818         struct qla_work_evt *e;
3819
3820         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3821         if (!e)
3822                 return QLA_FUNCTION_FAILED;
3823
3824         e->u.aen.code = code;
3825         e->u.aen.data = data;
3826         return qla2x00_post_work(vha, e);
3827 }
3828
3829 int
3830 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3831 {
3832         struct qla_work_evt *e;
3833
3834         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3835         if (!e)
3836                 return QLA_FUNCTION_FAILED;
3837
3838         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3839         return qla2x00_post_work(vha, e);
3840 }
3841
3842 #define qla2x00_post_async_work(name, type)     \
3843 int qla2x00_post_async_##name##_work(           \
3844     struct scsi_qla_host *vha,                  \
3845     fc_port_t *fcport, uint16_t *data)          \
3846 {                                               \
3847         struct qla_work_evt *e;                 \
3848                                                 \
3849         e = qla2x00_alloc_work(vha, type);      \
3850         if (!e)                                 \
3851                 return QLA_FUNCTION_FAILED;     \
3852                                                 \
3853         e->u.logio.fcport = fcport;             \
3854         if (data) {                             \
3855                 e->u.logio.data[0] = data[0];   \
3856                 e->u.logio.data[1] = data[1];   \
3857         }                                       \
3858         return qla2x00_post_work(vha, e);       \
3859 }
3860
3861 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3862 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3863 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3864 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3865 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3866 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3867
3868 int
3869 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3870 {
3871         struct qla_work_evt *e;
3872
3873         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3874         if (!e)
3875                 return QLA_FUNCTION_FAILED;
3876
3877         e->u.uevent.code = code;
3878         return qla2x00_post_work(vha, e);
3879 }
3880
3881 static void
3882 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3883 {
3884         char event_string[40];
3885         char *envp[] = { event_string, NULL };
3886
3887         switch (code) {
3888         case QLA_UEVENT_CODE_FW_DUMP:
3889                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3890                     vha->host_no);
3891                 break;
3892         default:
3893                 /* do nothing */
3894                 break;
3895         }
3896         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3897 }
3898
3899 int
3900 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3901                         uint32_t *data, int cnt)
3902 {
3903         struct qla_work_evt *e;
3904
3905         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3906         if (!e)
3907                 return QLA_FUNCTION_FAILED;
3908
3909         e->u.aenfx.evtcode = evtcode;
3910         e->u.aenfx.count = cnt;
3911         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3912         return qla2x00_post_work(vha, e);
3913 }
3914
3915 void
3916 qla2x00_do_work(struct scsi_qla_host *vha)
3917 {
3918         struct qla_work_evt *e, *tmp;
3919         unsigned long flags;
3920         LIST_HEAD(work);
3921
3922         spin_lock_irqsave(&vha->work_lock, flags);
3923         list_splice_init(&vha->work_list, &work);
3924         spin_unlock_irqrestore(&vha->work_lock, flags);
3925
3926         list_for_each_entry_safe(e, tmp, &work, list) {
3927                 list_del_init(&e->list);
3928
3929                 switch (e->type) {
3930                 case QLA_EVT_AEN:
3931                         fc_host_post_event(vha->host, fc_get_event_number(),
3932                             e->u.aen.code, e->u.aen.data);
3933                         break;
3934                 case QLA_EVT_IDC_ACK:
3935                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3936                         break;
3937                 case QLA_EVT_ASYNC_LOGIN:
3938                         qla2x00_async_login(vha, e->u.logio.fcport,
3939                             e->u.logio.data);
3940                         break;
3941                 case QLA_EVT_ASYNC_LOGIN_DONE:
3942                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3943                             e->u.logio.data);
3944                         break;
3945                 case QLA_EVT_ASYNC_LOGOUT:
3946                         qla2x00_async_logout(vha, e->u.logio.fcport);
3947                         break;
3948                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3949                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3950                             e->u.logio.data);
3951                         break;
3952                 case QLA_EVT_ASYNC_ADISC:
3953                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3954                             e->u.logio.data);
3955                         break;
3956                 case QLA_EVT_ASYNC_ADISC_DONE:
3957                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3958                             e->u.logio.data);
3959                         break;
3960                 case QLA_EVT_UEVENT:
3961                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3962                         break;
3963                 case QLA_EVT_AENFX:
3964                         qlafx00_process_aen(vha, e);
3965                         break;
3966                 }
3967                 if (e->flags & QLA_EVT_FLAG_FREE)
3968                         kfree(e);
3969
3970                 /* For each work completed decrement vha ref count */
3971                 QLA_VHA_MARK_NOT_BUSY(vha);
3972         }
3973 }
3974
3975 /* Relogins all the fcports of a vport
3976  * Context: dpc thread
3977  */
3978 void qla2x00_relogin(struct scsi_qla_host *vha)
3979 {
3980         fc_port_t       *fcport;
3981         int status;
3982         uint16_t        next_loopid = 0;
3983         struct qla_hw_data *ha = vha->hw;
3984         uint16_t data[2];
3985
3986         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3987         /*
3988          * If the port is not ONLINE then try to login
3989          * to it if we haven't run out of retries.
3990          */
3991                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3992                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3993                         fcport->login_retry--;
3994                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3995                                 if (fcport->flags & FCF_FCP2_DEVICE)
3996                                         ha->isp_ops->fabric_logout(vha,
3997                                                         fcport->loop_id,
3998                                                         fcport->d_id.b.domain,
3999                                                         fcport->d_id.b.area,
4000                                                         fcport->d_id.b.al_pa);
4001
4002                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4003                                         fcport->loop_id = next_loopid =
4004                                             ha->min_external_loopid;
4005                                         status = qla2x00_find_new_loop_id(
4006                                             vha, fcport);
4007                                         if (status != QLA_SUCCESS) {
4008                                                 /* Ran out of IDs to use */
4009                                                 break;
4010                                         }
4011                                 }
4012
4013                                 if (IS_ALOGIO_CAPABLE(ha)) {
4014                                         fcport->flags |= FCF_ASYNC_SENT;
4015                                         data[0] = 0;
4016                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4017                                         status = qla2x00_post_async_login_work(
4018                                             vha, fcport, data);
4019                                         if (status == QLA_SUCCESS)
4020                                                 continue;
4021                                         /* Attempt a retry. */
4022                                         status = 1;
4023                                 } else {
4024                                         status = qla2x00_fabric_login(vha,
4025                                             fcport, &next_loopid);
4026                                         if (status ==  QLA_SUCCESS) {
4027                                                 int status2;
4028                                                 uint8_t opts;
4029
4030                                                 opts = 0;
4031                                                 if (fcport->flags &
4032                                                     FCF_FCP2_DEVICE)
4033                                                         opts |= BIT_1;
4034                                                 status2 =
4035                                                     qla2x00_get_port_database(
4036                                                         vha, fcport, opts);
4037                                                 if (status2 != QLA_SUCCESS)
4038                                                         status = 1;
4039                                         }
4040                                 }
4041                         } else
4042                                 status = qla2x00_local_device_login(vha,
4043                                                                 fcport);
4044
4045                         if (status == QLA_SUCCESS) {
4046                                 fcport->old_loop_id = fcport->loop_id;
4047
4048                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4049                                     "Port login OK: logged in ID 0x%x.\n",
4050                                     fcport->loop_id);
4051
4052                                 qla2x00_update_fcport(vha, fcport);
4053
4054                         } else if (status == 1) {
4055                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4056                                 /* retry the login again */
4057                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4058                                     "Retrying %d login again loop_id 0x%x.\n",
4059                                     fcport->login_retry, fcport->loop_id);
4060                         } else {
4061                                 fcport->login_retry = 0;
4062                         }
4063
4064                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4065                                 qla2x00_clear_loop_id(fcport);
4066                 }
4067                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4068                         break;
4069         }
4070 }
4071
4072 /* Schedule work on any of the dpc-workqueues */
4073 void
4074 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4075 {
4076         struct qla_hw_data *ha = base_vha->hw;
4077
4078         switch (work_code) {
4079         case MBA_IDC_AEN: /* 0x8200 */
4080                 if (ha->dpc_lp_wq)
4081                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4082                 break;
4083
4084         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4085                 if (!ha->flags.nic_core_reset_hdlr_active) {
4086                         if (ha->dpc_hp_wq)
4087                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4088                 } else
4089                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4090                             "NIC Core reset is already active. Skip "
4091                             "scheduling it again.\n");
4092                 break;
4093         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4094                 if (ha->dpc_hp_wq)
4095                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4096                 break;
4097         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4098                 if (ha->dpc_hp_wq)
4099                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4100                 break;
4101         default:
4102                 ql_log(ql_log_warn, base_vha, 0xb05f,
4103                     "Unknow work-code=0x%x.\n", work_code);
4104         }
4105
4106         return;
4107 }
4108
4109 /* Work: Perform NIC Core Unrecoverable state handling */
4110 void
4111 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4112 {
4113         struct qla_hw_data *ha =
4114                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4115         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4116         uint32_t dev_state = 0;
4117
4118         qla83xx_idc_lock(base_vha, 0);
4119         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4120         qla83xx_reset_ownership(base_vha);
4121         if (ha->flags.nic_core_reset_owner) {
4122                 ha->flags.nic_core_reset_owner = 0;
4123                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4124                     QLA8XXX_DEV_FAILED);
4125                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4126                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4127         }
4128         qla83xx_idc_unlock(base_vha, 0);
4129 }
4130
4131 /* Work: Execute IDC state handler */
4132 void
4133 qla83xx_idc_state_handler_work(struct work_struct *work)
4134 {
4135         struct qla_hw_data *ha =
4136                 container_of(work, struct qla_hw_data, idc_state_handler);
4137         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4138         uint32_t dev_state = 0;
4139
4140         qla83xx_idc_lock(base_vha, 0);
4141         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4142         if (dev_state == QLA8XXX_DEV_FAILED ||
4143                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4144                 qla83xx_idc_state_handler(base_vha);
4145         qla83xx_idc_unlock(base_vha, 0);
4146 }
4147
4148 static int
4149 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4150 {
4151         int rval = QLA_SUCCESS;
4152         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4153         uint32_t heart_beat_counter1, heart_beat_counter2;
4154
4155         do {
4156                 if (time_after(jiffies, heart_beat_wait)) {
4157                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4158                             "Nic Core f/w is not alive.\n");
4159                         rval = QLA_FUNCTION_FAILED;
4160                         break;
4161                 }
4162
4163                 qla83xx_idc_lock(base_vha, 0);
4164                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4165                     &heart_beat_counter1);
4166                 qla83xx_idc_unlock(base_vha, 0);
4167                 msleep(100);
4168                 qla83xx_idc_lock(base_vha, 0);
4169                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4170                     &heart_beat_counter2);
4171                 qla83xx_idc_unlock(base_vha, 0);
4172         } while (heart_beat_counter1 == heart_beat_counter2);
4173
4174         return rval;
4175 }
4176
4177 /* Work: Perform NIC Core Reset handling */
4178 void
4179 qla83xx_nic_core_reset_work(struct work_struct *work)
4180 {
4181         struct qla_hw_data *ha =
4182                 container_of(work, struct qla_hw_data, nic_core_reset);
4183         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4184         uint32_t dev_state = 0;
4185
4186         if (IS_QLA2031(ha)) {
4187                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4188                         ql_log(ql_log_warn, base_vha, 0xb081,
4189                             "Failed to dump mctp\n");
4190                 return;
4191         }
4192
4193         if (!ha->flags.nic_core_reset_hdlr_active) {
4194                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4195                         qla83xx_idc_lock(base_vha, 0);
4196                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4197                             &dev_state);
4198                         qla83xx_idc_unlock(base_vha, 0);
4199                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4200                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4201                                     "Nic Core f/w is alive.\n");
4202                                 return;
4203                         }
4204                 }
4205
4206                 ha->flags.nic_core_reset_hdlr_active = 1;
4207                 if (qla83xx_nic_core_reset(base_vha)) {
4208                         /* NIC Core reset failed. */
4209                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4210                             "NIC Core reset failed.\n");
4211                 }
4212                 ha->flags.nic_core_reset_hdlr_active = 0;
4213         }
4214 }
4215
4216 /* Work: Handle 8200 IDC aens */
4217 void
4218 qla83xx_service_idc_aen(struct work_struct *work)
4219 {
4220         struct qla_hw_data *ha =
4221                 container_of(work, struct qla_hw_data, idc_aen);
4222         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4223         uint32_t dev_state, idc_control;
4224
4225         qla83xx_idc_lock(base_vha, 0);
4226         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4227         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4228         qla83xx_idc_unlock(base_vha, 0);
4229         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4230                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4231                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4232                             "Application requested NIC Core Reset.\n");
4233                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4234                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4235                     QLA_SUCCESS) {
4236                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4237                             "Other protocol driver requested NIC Core Reset.\n");
4238                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4239                 }
4240         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4241                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4242                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4243         }
4244 }
4245
4246 static void
4247 qla83xx_wait_logic(void)
4248 {
4249         int i;
4250
4251         /* Yield CPU */
4252         if (!in_interrupt()) {
4253                 /*
4254                  * Wait about 200ms before retrying again.
4255                  * This controls the number of retries for single
4256                  * lock operation.
4257                  */
4258                 msleep(100);
4259                 schedule();
4260         } else {
4261                 for (i = 0; i < 20; i++)
4262                         cpu_relax(); /* This a nop instr on i386 */
4263         }
4264 }
4265
4266 static int
4267 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4268 {
4269         int rval;
4270         uint32_t data;
4271         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4272         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4273         struct qla_hw_data *ha = base_vha->hw;
4274         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4275             "Trying force recovery of the IDC lock.\n");
4276
4277         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4278         if (rval)
4279                 return rval;
4280
4281         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4282                 return QLA_SUCCESS;
4283         } else {
4284                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4285                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4286                     data);
4287                 if (rval)
4288                         return rval;
4289
4290                 msleep(200);
4291
4292                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4293                     &data);
4294                 if (rval)
4295                         return rval;
4296
4297                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4298                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4299                                         ~(idc_lck_rcvry_stage_mask));
4300                         rval = qla83xx_wr_reg(base_vha,
4301                             QLA83XX_IDC_LOCK_RECOVERY, data);
4302                         if (rval)
4303                                 return rval;
4304
4305                         /* Forcefully perform IDC UnLock */
4306                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4307                             &data);
4308                         if (rval)
4309                                 return rval;
4310                         /* Clear lock-id by setting 0xff */
4311                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4312                             0xff);
4313                         if (rval)
4314                                 return rval;
4315                         /* Clear lock-recovery by setting 0x0 */
4316                         rval = qla83xx_wr_reg(base_vha,
4317                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4318                         if (rval)
4319                                 return rval;
4320                 } else
4321                         return QLA_SUCCESS;
4322         }
4323
4324         return rval;
4325 }
4326
4327 static int
4328 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4329 {
4330         int rval = QLA_SUCCESS;
4331         uint32_t o_drv_lockid, n_drv_lockid;
4332         unsigned long lock_recovery_timeout;
4333
4334         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4335 retry_lockid:
4336         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4337         if (rval)
4338                 goto exit;
4339
4340         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4341         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4342                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4343                         return QLA_SUCCESS;
4344                 else
4345                         return QLA_FUNCTION_FAILED;
4346         }
4347
4348         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4349         if (rval)
4350                 goto exit;
4351
4352         if (o_drv_lockid == n_drv_lockid) {
4353                 qla83xx_wait_logic();
4354                 goto retry_lockid;
4355         } else
4356                 return QLA_SUCCESS;
4357
4358 exit:
4359         return rval;
4360 }
4361
4362 void
4363 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4364 {
4365         uint16_t options = (requester_id << 15) | BIT_6;
4366         uint32_t data;
4367         uint32_t lock_owner;
4368         struct qla_hw_data *ha = base_vha->hw;
4369
4370         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4371 retry_lock:
4372         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4373             == QLA_SUCCESS) {
4374                 if (data) {
4375                         /* Setting lock-id to our function-number */
4376                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4377                             ha->portnum);
4378                 } else {
4379                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4380                             &lock_owner);
4381                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4382                             "Failed to acquire IDC lock, acquired by %d, "
4383                             "retrying...\n", lock_owner);
4384
4385                         /* Retry/Perform IDC-Lock recovery */
4386                         if (qla83xx_idc_lock_recovery(base_vha)
4387                             == QLA_SUCCESS) {
4388                                 qla83xx_wait_logic();
4389                                 goto retry_lock;
4390                         } else
4391                                 ql_log(ql_log_warn, base_vha, 0xb075,
4392                                     "IDC Lock recovery FAILED.\n");
4393                 }
4394
4395         }
4396
4397         return;
4398
4399         /* XXX: IDC-lock implementation using access-control mbx */
4400 retry_lock2:
4401         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4402                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4403                     "Failed to acquire IDC lock. retrying...\n");
4404                 /* Retry/Perform IDC-Lock recovery */
4405                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4406                         qla83xx_wait_logic();
4407                         goto retry_lock2;
4408                 } else
4409                         ql_log(ql_log_warn, base_vha, 0xb076,
4410                             "IDC Lock recovery FAILED.\n");
4411         }
4412
4413         return;
4414 }
4415
4416 void
4417 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4418 {
4419         uint16_t options = (requester_id << 15) | BIT_7, retry;
4420         uint32_t data;
4421         struct qla_hw_data *ha = base_vha->hw;
4422
4423         /* IDC-unlock implementation using driver-unlock/lock-id
4424          * remote registers
4425          */
4426         retry = 0;
4427 retry_unlock:
4428         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4429             == QLA_SUCCESS) {
4430                 if (data == ha->portnum) {
4431                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4432                         /* Clearing lock-id by setting 0xff */
4433                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4434                 } else if (retry < 10) {
4435                         /* SV: XXX: IDC unlock retrying needed here? */
4436
4437                         /* Retry for IDC-unlock */
4438                         qla83xx_wait_logic();
4439                         retry++;
4440                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4441                             "Failed to release IDC lock, retyring=%d\n", retry);
4442                         goto retry_unlock;
4443                 }
4444         } else if (retry < 10) {
4445                 /* Retry for IDC-unlock */
4446                 qla83xx_wait_logic();
4447                 retry++;
4448                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4449                     "Failed to read drv-lockid, retyring=%d\n", retry);
4450                 goto retry_unlock;
4451         }
4452
4453         return;
4454
4455         /* XXX: IDC-unlock implementation using access-control mbx */
4456         retry = 0;
4457 retry_unlock2:
4458         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4459                 if (retry < 10) {
4460                         /* Retry for IDC-unlock */
4461                         qla83xx_wait_logic();
4462                         retry++;
4463                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4464                             "Failed to release IDC lock, retyring=%d\n", retry);
4465                         goto retry_unlock2;
4466                 }
4467         }
4468
4469         return;
4470 }
4471
4472 int
4473 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4474 {
4475         int rval = QLA_SUCCESS;
4476         struct qla_hw_data *ha = vha->hw;
4477         uint32_t drv_presence;
4478
4479         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4480         if (rval == QLA_SUCCESS) {
4481                 drv_presence |= (1 << ha->portnum);
4482                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4483                     drv_presence);
4484         }
4485
4486         return rval;
4487 }
4488
4489 int
4490 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4491 {
4492         int rval = QLA_SUCCESS;
4493
4494         qla83xx_idc_lock(vha, 0);
4495         rval = __qla83xx_set_drv_presence(vha);
4496         qla83xx_idc_unlock(vha, 0);
4497
4498         return rval;
4499 }
4500
4501 int
4502 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4503 {
4504         int rval = QLA_SUCCESS;
4505         struct qla_hw_data *ha = vha->hw;
4506         uint32_t drv_presence;
4507
4508         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4509         if (rval == QLA_SUCCESS) {
4510                 drv_presence &= ~(1 << ha->portnum);
4511                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4512                     drv_presence);
4513         }
4514
4515         return rval;
4516 }
4517
4518 int
4519 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4520 {
4521         int rval = QLA_SUCCESS;
4522
4523         qla83xx_idc_lock(vha, 0);
4524         rval = __qla83xx_clear_drv_presence(vha);
4525         qla83xx_idc_unlock(vha, 0);
4526
4527         return rval;
4528 }
4529
4530 static void
4531 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4532 {
4533         struct qla_hw_data *ha = vha->hw;
4534         uint32_t drv_ack, drv_presence;
4535         unsigned long ack_timeout;
4536
4537         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4538         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4539         while (1) {
4540                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4541                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4542                 if ((drv_ack & drv_presence) == drv_presence)
4543                         break;
4544
4545                 if (time_after_eq(jiffies, ack_timeout)) {
4546                         ql_log(ql_log_warn, vha, 0xb067,
4547                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4548                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4549                         /*
4550                          * The function(s) which did not ack in time are forced
4551                          * to withdraw any further participation in the IDC
4552                          * reset.
4553                          */
4554                         if (drv_ack != drv_presence)
4555                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4556                                     drv_ack);
4557                         break;
4558                 }
4559
4560                 qla83xx_idc_unlock(vha, 0);
4561                 msleep(1000);
4562                 qla83xx_idc_lock(vha, 0);
4563         }
4564
4565         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4566         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4567 }
4568
4569 static int
4570 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4571 {
4572         int rval = QLA_SUCCESS;
4573         uint32_t idc_control;
4574
4575         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4576         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4577
4578         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4579         __qla83xx_get_idc_control(vha, &idc_control);
4580         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4581         __qla83xx_set_idc_control(vha, 0);
4582
4583         qla83xx_idc_unlock(vha, 0);
4584         rval = qla83xx_restart_nic_firmware(vha);
4585         qla83xx_idc_lock(vha, 0);
4586
4587         if (rval != QLA_SUCCESS) {
4588                 ql_log(ql_log_fatal, vha, 0xb06a,
4589                     "Failed to restart NIC f/w.\n");
4590                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4591                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4592         } else {
4593                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4594                     "Success in restarting nic f/w.\n");
4595                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4596                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4597         }
4598
4599         return rval;
4600 }
4601
4602 /* Assumes idc_lock always held on entry */
4603 int
4604 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4605 {
4606         struct qla_hw_data *ha = base_vha->hw;
4607         int rval = QLA_SUCCESS;
4608         unsigned long dev_init_timeout;
4609         uint32_t dev_state;
4610
4611         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4612         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4613
4614         while (1) {
4615
4616                 if (time_after_eq(jiffies, dev_init_timeout)) {
4617                         ql_log(ql_log_warn, base_vha, 0xb06e,
4618                             "Initialization TIMEOUT!\n");
4619                         /* Init timeout. Disable further NIC Core
4620                          * communication.
4621                          */
4622                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4623                                 QLA8XXX_DEV_FAILED);
4624                         ql_log(ql_log_info, base_vha, 0xb06f,
4625                             "HW State: FAILED.\n");
4626                 }
4627
4628                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4629                 switch (dev_state) {
4630                 case QLA8XXX_DEV_READY:
4631                         if (ha->flags.nic_core_reset_owner)
4632                                 qla83xx_idc_audit(base_vha,
4633                                     IDC_AUDIT_COMPLETION);
4634                         ha->flags.nic_core_reset_owner = 0;
4635                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4636                             "Reset_owner reset by 0x%x.\n",
4637                             ha->portnum);
4638                         goto exit;
4639                 case QLA8XXX_DEV_COLD:
4640                         if (ha->flags.nic_core_reset_owner)
4641                                 rval = qla83xx_device_bootstrap(base_vha);
4642                         else {
4643                         /* Wait for AEN to change device-state */
4644                                 qla83xx_idc_unlock(base_vha, 0);
4645                                 msleep(1000);
4646                                 qla83xx_idc_lock(base_vha, 0);
4647                         }
4648                         break;
4649                 case QLA8XXX_DEV_INITIALIZING:
4650                         /* Wait for AEN to change device-state */
4651                         qla83xx_idc_unlock(base_vha, 0);
4652                         msleep(1000);
4653                         qla83xx_idc_lock(base_vha, 0);
4654                         break;
4655                 case QLA8XXX_DEV_NEED_RESET:
4656                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4657                                 qla83xx_need_reset_handler(base_vha);
4658                         else {
4659                                 /* Wait for AEN to change device-state */
4660                                 qla83xx_idc_unlock(base_vha, 0);
4661                                 msleep(1000);
4662                                 qla83xx_idc_lock(base_vha, 0);
4663                         }
4664                         /* reset timeout value after need reset handler */
4665                         dev_init_timeout = jiffies +
4666                             (ha->fcoe_dev_init_timeout * HZ);
4667                         break;
4668                 case QLA8XXX_DEV_NEED_QUIESCENT:
4669                         /* XXX: DEBUG for now */
4670                         qla83xx_idc_unlock(base_vha, 0);
4671                         msleep(1000);
4672                         qla83xx_idc_lock(base_vha, 0);
4673                         break;
4674                 case QLA8XXX_DEV_QUIESCENT:
4675                         /* XXX: DEBUG for now */
4676                         if (ha->flags.quiesce_owner)
4677                                 goto exit;
4678
4679                         qla83xx_idc_unlock(base_vha, 0);
4680                         msleep(1000);
4681                         qla83xx_idc_lock(base_vha, 0);
4682                         dev_init_timeout = jiffies +
4683                             (ha->fcoe_dev_init_timeout * HZ);
4684                         break;
4685                 case QLA8XXX_DEV_FAILED:
4686                         if (ha->flags.nic_core_reset_owner)
4687                                 qla83xx_idc_audit(base_vha,
4688                                     IDC_AUDIT_COMPLETION);
4689                         ha->flags.nic_core_reset_owner = 0;
4690                         __qla83xx_clear_drv_presence(base_vha);
4691                         qla83xx_idc_unlock(base_vha, 0);
4692                         qla8xxx_dev_failed_handler(base_vha);
4693                         rval = QLA_FUNCTION_FAILED;
4694                         qla83xx_idc_lock(base_vha, 0);
4695                         goto exit;
4696                 case QLA8XXX_BAD_VALUE:
4697                         qla83xx_idc_unlock(base_vha, 0);
4698                         msleep(1000);
4699                         qla83xx_idc_lock(base_vha, 0);
4700                         break;
4701                 default:
4702                         ql_log(ql_log_warn, base_vha, 0xb071,
4703                             "Unknow Device State: %x.\n", dev_state);
4704                         qla83xx_idc_unlock(base_vha, 0);
4705                         qla8xxx_dev_failed_handler(base_vha);
4706                         rval = QLA_FUNCTION_FAILED;
4707                         qla83xx_idc_lock(base_vha, 0);
4708                         goto exit;
4709                 }
4710         }
4711
4712 exit:
4713         return rval;
4714 }
4715
4716 void
4717 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4718 {
4719         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4720             board_disable);
4721         struct pci_dev *pdev = ha->pdev;
4722         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4723
4724         ql_log(ql_log_warn, base_vha, 0x015b,
4725             "Disabling adapter.\n");
4726
4727         set_bit(UNLOADING, &base_vha->dpc_flags);
4728
4729         qla2x00_delete_all_vps(ha, base_vha);
4730
4731         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4732
4733         qla2x00_dfs_remove(base_vha);
4734
4735         qla84xx_put_chip(base_vha);
4736
4737         if (base_vha->timer_active)
4738                 qla2x00_stop_timer(base_vha);
4739
4740         base_vha->flags.online = 0;
4741
4742         qla2x00_destroy_deferred_work(ha);
4743
4744         /*
4745          * Do not try to stop beacon blink as it will issue a mailbox
4746          * command.
4747          */
4748         qla2x00_free_sysfs_attr(base_vha, false);
4749
4750         fc_remove_host(base_vha->host);
4751
4752         scsi_remove_host(base_vha->host);
4753
4754         base_vha->flags.init_done = 0;
4755         qla25xx_delete_queues(base_vha);
4756         qla2x00_free_irqs(base_vha);
4757         qla2x00_free_fcports(base_vha);
4758         qla2x00_mem_free(ha);
4759         qla82xx_md_free(base_vha);
4760         qla2x00_free_queues(ha);
4761
4762         qla2x00_unmap_iobases(ha);
4763
4764         pci_release_selected_regions(ha->pdev, ha->bars);
4765         pci_disable_pcie_error_reporting(pdev);
4766         pci_disable_device(pdev);
4767
4768         /*
4769          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
4770          */
4771 }
4772
4773 /**************************************************************************
4774 * qla2x00_do_dpc
4775 *   This kernel thread is a task that is schedule by the interrupt handler
4776 *   to perform the background processing for interrupts.
4777 *
4778 * Notes:
4779 * This task always run in the context of a kernel thread.  It
4780 * is kick-off by the driver's detect code and starts up
4781 * up one per adapter. It immediately goes to sleep and waits for
4782 * some fibre event.  When either the interrupt handler or
4783 * the timer routine detects a event it will one of the task
4784 * bits then wake us up.
4785 **************************************************************************/
4786 static int
4787 qla2x00_do_dpc(void *data)
4788 {
4789         int             rval;
4790         scsi_qla_host_t *base_vha;
4791         struct qla_hw_data *ha;
4792
4793         ha = (struct qla_hw_data *)data;
4794         base_vha = pci_get_drvdata(ha->pdev);
4795
4796         set_user_nice(current, MIN_NICE);
4797
4798         set_current_state(TASK_INTERRUPTIBLE);
4799         while (!kthread_should_stop()) {
4800                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4801                     "DPC handler sleeping.\n");
4802
4803                 schedule();
4804
4805                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4806                         goto end_loop;
4807
4808                 if (ha->flags.eeh_busy) {
4809                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4810                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4811                         goto end_loop;
4812                 }
4813
4814                 ha->dpc_active = 1;
4815
4816                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4817                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4818                     base_vha->dpc_flags);
4819
4820                 qla2x00_do_work(base_vha);
4821
4822                 if (IS_P3P_TYPE(ha)) {
4823                         if (IS_QLA8044(ha)) {
4824                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4825                                         &base_vha->dpc_flags)) {
4826                                         qla8044_idc_lock(ha);
4827                                         qla8044_wr_direct(base_vha,
4828                                                 QLA8044_CRB_DEV_STATE_INDEX,
4829                                                 QLA8XXX_DEV_FAILED);
4830                                         qla8044_idc_unlock(ha);
4831                                         ql_log(ql_log_info, base_vha, 0x4004,
4832                                                 "HW State: FAILED.\n");
4833                                         qla8044_device_state_handler(base_vha);
4834                                         continue;
4835                                 }
4836
4837                         } else {
4838                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4839                                         &base_vha->dpc_flags)) {
4840                                         qla82xx_idc_lock(ha);
4841                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4842                                                 QLA8XXX_DEV_FAILED);
4843                                         qla82xx_idc_unlock(ha);
4844                                         ql_log(ql_log_info, base_vha, 0x0151,
4845                                                 "HW State: FAILED.\n");
4846                                         qla82xx_device_state_handler(base_vha);
4847                                         continue;
4848                                 }
4849                         }
4850
4851                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4852                                 &base_vha->dpc_flags)) {
4853
4854                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4855                                     "FCoE context reset scheduled.\n");
4856                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4857                                         &base_vha->dpc_flags))) {
4858                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4859                                                 /* FCoE-ctx reset failed.
4860                                                  * Escalate to chip-reset
4861                                                  */
4862                                                 set_bit(ISP_ABORT_NEEDED,
4863                                                         &base_vha->dpc_flags);
4864                                         }
4865                                         clear_bit(ABORT_ISP_ACTIVE,
4866                                                 &base_vha->dpc_flags);
4867                                 }
4868
4869                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4870                                     "FCoE context reset end.\n");
4871                         }
4872                 } else if (IS_QLAFX00(ha)) {
4873                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4874                                 &base_vha->dpc_flags)) {
4875                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4876                                     "Firmware Reset Recovery\n");
4877                                 if (qlafx00_reset_initialize(base_vha)) {
4878                                         /* Failed. Abort isp later. */
4879                                         if (!test_bit(UNLOADING,
4880                                             &base_vha->dpc_flags)) {
4881                                                 set_bit(ISP_UNRECOVERABLE,
4882                                                     &base_vha->dpc_flags);
4883                                                 ql_dbg(ql_dbg_dpc, base_vha,
4884                                                     0x4021,
4885                                                     "Reset Recovery Failed\n");
4886                                         }
4887                                 }
4888                         }
4889
4890                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4891                                 &base_vha->dpc_flags)) {
4892                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4893                                     "ISPFx00 Target Scan scheduled\n");
4894                                 if (qlafx00_rescan_isp(base_vha)) {
4895                                         if (!test_bit(UNLOADING,
4896                                             &base_vha->dpc_flags))
4897                                                 set_bit(ISP_UNRECOVERABLE,
4898                                                     &base_vha->dpc_flags);
4899                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4900                                             "ISPFx00 Target Scan Failed\n");
4901                                 }
4902                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4903                                     "ISPFx00 Target Scan End\n");
4904                         }
4905                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4906                                 &base_vha->dpc_flags)) {
4907                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4908                                     "ISPFx00 Host Info resend scheduled\n");
4909                                 qlafx00_fx_disc(base_vha,
4910                                     &base_vha->hw->mr.fcport,
4911                                     FXDISC_REG_HOST_INFO);
4912                         }
4913                 }
4914
4915                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4916                                                 &base_vha->dpc_flags)) {
4917
4918                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4919                             "ISP abort scheduled.\n");
4920                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4921                             &base_vha->dpc_flags))) {
4922
4923                                 if (ha->isp_ops->abort_isp(base_vha)) {
4924                                         /* failed. retry later */
4925                                         set_bit(ISP_ABORT_NEEDED,
4926                                             &base_vha->dpc_flags);
4927                                 }
4928                                 clear_bit(ABORT_ISP_ACTIVE,
4929                                                 &base_vha->dpc_flags);
4930                         }
4931
4932                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4933                             "ISP abort end.\n");
4934                 }
4935
4936                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4937                     &base_vha->dpc_flags)) {
4938                         qla2x00_update_fcports(base_vha);
4939                 }
4940
4941                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4942                         int ret;
4943                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4944                         if (ret != QLA_SUCCESS)
4945                                 ql_log(ql_log_warn, base_vha, 0x121,
4946                                     "Failed to enable receiving of RSCN "
4947                                     "requests: 0x%x.\n", ret);
4948                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4949                 }
4950
4951                 if (IS_QLAFX00(ha))
4952                         goto loop_resync_check;
4953
4954                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4955                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4956                             "Quiescence mode scheduled.\n");
4957                         if (IS_P3P_TYPE(ha)) {
4958                                 if (IS_QLA82XX(ha))
4959                                         qla82xx_device_state_handler(base_vha);
4960                                 if (IS_QLA8044(ha))
4961                                         qla8044_device_state_handler(base_vha);
4962                                 clear_bit(ISP_QUIESCE_NEEDED,
4963                                     &base_vha->dpc_flags);
4964                                 if (!ha->flags.quiesce_owner) {
4965                                         qla2x00_perform_loop_resync(base_vha);
4966                                         if (IS_QLA82XX(ha)) {
4967                                                 qla82xx_idc_lock(ha);
4968                                                 qla82xx_clear_qsnt_ready(
4969                                                     base_vha);
4970                                                 qla82xx_idc_unlock(ha);
4971                                         } else if (IS_QLA8044(ha)) {
4972                                                 qla8044_idc_lock(ha);
4973                                                 qla8044_clear_qsnt_ready(
4974                                                     base_vha);
4975                                                 qla8044_idc_unlock(ha);
4976                                         }
4977                                 }
4978                         } else {
4979                                 clear_bit(ISP_QUIESCE_NEEDED,
4980                                     &base_vha->dpc_flags);
4981                                 qla2x00_quiesce_io(base_vha);
4982                         }
4983                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4984                             "Quiescence mode end.\n");
4985                 }
4986
4987                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4988                                 &base_vha->dpc_flags) &&
4989                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4990
4991                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4992                             "Reset marker scheduled.\n");
4993                         qla2x00_rst_aen(base_vha);
4994                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4995                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4996                             "Reset marker end.\n");
4997                 }
4998
4999                 /* Retry each device up to login retry count */
5000                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5001                                                 &base_vha->dpc_flags)) &&
5002                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5003                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5004
5005                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5006                             "Relogin scheduled.\n");
5007                         qla2x00_relogin(base_vha);
5008                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5009                             "Relogin end.\n");
5010                 }
5011 loop_resync_check:
5012                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5013                     &base_vha->dpc_flags)) {
5014
5015                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5016                             "Loop resync scheduled.\n");
5017
5018                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5019                             &base_vha->dpc_flags))) {
5020
5021                                 rval = qla2x00_loop_resync(base_vha);
5022
5023                                 clear_bit(LOOP_RESYNC_ACTIVE,
5024                                                 &base_vha->dpc_flags);
5025                         }
5026
5027                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5028                             "Loop resync end.\n");
5029                 }
5030
5031                 if (IS_QLAFX00(ha))
5032                         goto intr_on_check;
5033
5034                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5035                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5036                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5037                         qla2xxx_flash_npiv_conf(base_vha);
5038                 }
5039
5040 intr_on_check:
5041                 if (!ha->interrupts_on)
5042                         ha->isp_ops->enable_intrs(ha);
5043
5044                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5045                                         &base_vha->dpc_flags)) {
5046                         if (ha->beacon_blink_led == 1)
5047                                 ha->isp_ops->beacon_blink(base_vha);
5048                 }
5049
5050                 if (!IS_QLAFX00(ha))
5051                         qla2x00_do_dpc_all_vps(base_vha);
5052
5053                 ha->dpc_active = 0;
5054 end_loop:
5055                 set_current_state(TASK_INTERRUPTIBLE);
5056         } /* End of while(1) */
5057         __set_current_state(TASK_RUNNING);
5058
5059         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5060             "DPC handler exiting.\n");
5061
5062         /*
5063          * Make sure that nobody tries to wake us up again.
5064          */
5065         ha->dpc_active = 0;
5066
5067         /* Cleanup any residual CTX SRBs. */
5068         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5069
5070         return 0;
5071 }
5072
5073 void
5074 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5075 {
5076         struct qla_hw_data *ha = vha->hw;
5077         struct task_struct *t = ha->dpc_thread;
5078
5079         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5080                 wake_up_process(t);
5081 }
5082
5083 /*
5084 *  qla2x00_rst_aen
5085 *      Processes asynchronous reset.
5086 *
5087 * Input:
5088 *      ha  = adapter block pointer.
5089 */
5090 static void
5091 qla2x00_rst_aen(scsi_qla_host_t *vha)
5092 {
5093         if (vha->flags.online && !vha->flags.reset_active &&
5094             !atomic_read(&vha->loop_down_timer) &&
5095             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5096                 do {
5097                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5098
5099                         /*
5100                          * Issue marker command only when we are going to start
5101                          * the I/O.
5102                          */
5103                         vha->marker_needed = 1;
5104                 } while (!atomic_read(&vha->loop_down_timer) &&
5105                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5106         }
5107 }
5108
5109 /**************************************************************************
5110 *   qla2x00_timer
5111 *
5112 * Description:
5113 *   One second timer
5114 *
5115 * Context: Interrupt
5116 ***************************************************************************/
5117 void
5118 qla2x00_timer(scsi_qla_host_t *vha)
5119 {
5120         unsigned long   cpu_flags = 0;
5121         int             start_dpc = 0;
5122         int             index;
5123         srb_t           *sp;
5124         uint16_t        w;
5125         struct qla_hw_data *ha = vha->hw;
5126         struct req_que *req;
5127
5128         if (ha->flags.eeh_busy) {
5129                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5130                     "EEH = %d, restarting timer.\n",
5131                     ha->flags.eeh_busy);
5132                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5133                 return;
5134         }
5135
5136         /*
5137          * Hardware read to raise pending EEH errors during mailbox waits. If
5138          * the read returns -1 then disable the board.
5139          */
5140         if (!pci_channel_offline(ha->pdev)) {
5141                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5142                 qla2x00_check_reg16_for_disconnect(vha, w);
5143         }
5144
5145         /* Make sure qla82xx_watchdog is run only for physical port */
5146         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5147                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5148                         start_dpc++;
5149                 if (IS_QLA82XX(ha))
5150                         qla82xx_watchdog(vha);
5151                 else if (IS_QLA8044(ha))
5152                         qla8044_watchdog(vha);
5153         }
5154
5155         if (!vha->vp_idx && IS_QLAFX00(ha))
5156                 qlafx00_timer_routine(vha);
5157
5158         /* Loop down handler. */
5159         if (atomic_read(&vha->loop_down_timer) > 0 &&
5160             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5161             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5162                 && vha->flags.online) {
5163
5164                 if (atomic_read(&vha->loop_down_timer) ==
5165                     vha->loop_down_abort_time) {
5166
5167                         ql_log(ql_log_info, vha, 0x6008,
5168                             "Loop down - aborting the queues before time expires.\n");
5169
5170                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5171                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5172
5173                         /*
5174                          * Schedule an ISP abort to return any FCP2-device
5175                          * commands.
5176                          */
5177                         /* NPIV - scan physical port only */
5178                         if (!vha->vp_idx) {
5179                                 spin_lock_irqsave(&ha->hardware_lock,
5180                                     cpu_flags);
5181                                 req = ha->req_q_map[0];
5182                                 for (index = 1;
5183                                     index < req->num_outstanding_cmds;
5184                                     index++) {
5185                                         fc_port_t *sfcp;
5186
5187                                         sp = req->outstanding_cmds[index];
5188                                         if (!sp)
5189                                                 continue;
5190                                         if (sp->type != SRB_SCSI_CMD)
5191                                                 continue;
5192                                         sfcp = sp->fcport;
5193                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5194                                                 continue;
5195
5196                                         if (IS_QLA82XX(ha))
5197                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5198                                                         &vha->dpc_flags);
5199                                         else
5200                                                 set_bit(ISP_ABORT_NEEDED,
5201                                                         &vha->dpc_flags);
5202                                         break;
5203                                 }
5204                                 spin_unlock_irqrestore(&ha->hardware_lock,
5205                                                                 cpu_flags);
5206                         }
5207                         start_dpc++;
5208                 }
5209
5210                 /* if the loop has been down for 4 minutes, reinit adapter */
5211                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5212                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5213                                 ql_log(ql_log_warn, vha, 0x6009,
5214                                     "Loop down - aborting ISP.\n");
5215
5216                                 if (IS_QLA82XX(ha))
5217                                         set_bit(FCOE_CTX_RESET_NEEDED,
5218                                                 &vha->dpc_flags);
5219                                 else
5220                                         set_bit(ISP_ABORT_NEEDED,
5221                                                 &vha->dpc_flags);
5222                         }
5223                 }
5224                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5225                     "Loop down - seconds remaining %d.\n",
5226                     atomic_read(&vha->loop_down_timer));
5227         }
5228         /* Check if beacon LED needs to be blinked for physical host only */
5229         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5230                 /* There is no beacon_blink function for ISP82xx */
5231                 if (!IS_P3P_TYPE(ha)) {
5232                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5233                         start_dpc++;
5234                 }
5235         }
5236
5237         /* Process any deferred work. */
5238         if (!list_empty(&vha->work_list))
5239                 start_dpc++;
5240
5241         /* Schedule the DPC routine if needed */
5242         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5243             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5244             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5245             start_dpc ||
5246             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5247             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5248             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5249             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5250             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5251             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5252                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5253                     "isp_abort_needed=%d loop_resync_needed=%d "
5254                     "fcport_update_needed=%d start_dpc=%d "
5255                     "reset_marker_needed=%d",
5256                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5257                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5258                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5259                     start_dpc,
5260                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5261                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5262                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5263                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5264                     "relogin_needed=%d.\n",
5265                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5266                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5267                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5268                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5269                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5270                 qla2xxx_wake_dpc(vha);
5271         }
5272
5273         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5274 }
5275
5276 /* Firmware interface routines. */
5277
5278 #define FW_BLOBS        11
5279 #define FW_ISP21XX      0
5280 #define FW_ISP22XX      1
5281 #define FW_ISP2300      2
5282 #define FW_ISP2322      3
5283 #define FW_ISP24XX      4
5284 #define FW_ISP25XX      5
5285 #define FW_ISP81XX      6
5286 #define FW_ISP82XX      7
5287 #define FW_ISP2031      8
5288 #define FW_ISP8031      9
5289 #define FW_ISP27XX      10
5290
5291 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5292 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5293 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5294 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5295 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5296 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5297 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5298 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5299 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5300 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5301 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5302
5303
5304 static DEFINE_MUTEX(qla_fw_lock);
5305
5306 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5307         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5308         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5309         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5310         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5311         { .name = FW_FILE_ISP24XX, },
5312         { .name = FW_FILE_ISP25XX, },
5313         { .name = FW_FILE_ISP81XX, },
5314         { .name = FW_FILE_ISP82XX, },
5315         { .name = FW_FILE_ISP2031, },
5316         { .name = FW_FILE_ISP8031, },
5317         { .name = FW_FILE_ISP27XX, },
5318 };
5319
5320 struct fw_blob *
5321 qla2x00_request_firmware(scsi_qla_host_t *vha)
5322 {
5323         struct qla_hw_data *ha = vha->hw;
5324         struct fw_blob *blob;
5325
5326         if (IS_QLA2100(ha)) {
5327                 blob = &qla_fw_blobs[FW_ISP21XX];
5328         } else if (IS_QLA2200(ha)) {
5329                 blob = &qla_fw_blobs[FW_ISP22XX];
5330         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5331                 blob = &qla_fw_blobs[FW_ISP2300];
5332         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5333                 blob = &qla_fw_blobs[FW_ISP2322];
5334         } else if (IS_QLA24XX_TYPE(ha)) {
5335                 blob = &qla_fw_blobs[FW_ISP24XX];
5336         } else if (IS_QLA25XX(ha)) {
5337                 blob = &qla_fw_blobs[FW_ISP25XX];
5338         } else if (IS_QLA81XX(ha)) {
5339                 blob = &qla_fw_blobs[FW_ISP81XX];
5340         } else if (IS_QLA82XX(ha)) {
5341                 blob = &qla_fw_blobs[FW_ISP82XX];
5342         } else if (IS_QLA2031(ha)) {
5343                 blob = &qla_fw_blobs[FW_ISP2031];
5344         } else if (IS_QLA8031(ha)) {
5345                 blob = &qla_fw_blobs[FW_ISP8031];
5346         } else if (IS_QLA27XX(ha)) {
5347                 blob = &qla_fw_blobs[FW_ISP27XX];
5348         } else {
5349                 return NULL;
5350         }
5351
5352         mutex_lock(&qla_fw_lock);
5353         if (blob->fw)
5354                 goto out;
5355
5356         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5357                 ql_log(ql_log_warn, vha, 0x0063,
5358                     "Failed to load firmware image (%s).\n", blob->name);
5359                 blob->fw = NULL;
5360                 blob = NULL;
5361                 goto out;
5362         }
5363
5364 out:
5365         mutex_unlock(&qla_fw_lock);
5366         return blob;
5367 }
5368
5369 static void
5370 qla2x00_release_firmware(void)
5371 {
5372         int idx;
5373
5374         mutex_lock(&qla_fw_lock);
5375         for (idx = 0; idx < FW_BLOBS; idx++)
5376                 release_firmware(qla_fw_blobs[idx].fw);
5377         mutex_unlock(&qla_fw_lock);
5378 }
5379
5380 static pci_ers_result_t
5381 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5382 {
5383         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5384         struct qla_hw_data *ha = vha->hw;
5385
5386         ql_dbg(ql_dbg_aer, vha, 0x9000,
5387             "PCI error detected, state %x.\n", state);
5388
5389         switch (state) {
5390         case pci_channel_io_normal:
5391                 ha->flags.eeh_busy = 0;
5392                 return PCI_ERS_RESULT_CAN_RECOVER;
5393         case pci_channel_io_frozen:
5394                 ha->flags.eeh_busy = 1;
5395                 /* For ISP82XX complete any pending mailbox cmd */
5396                 if (IS_QLA82XX(ha)) {
5397                         ha->flags.isp82xx_fw_hung = 1;
5398                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5399                         qla82xx_clear_pending_mbx(vha);
5400                 }
5401                 qla2x00_free_irqs(vha);
5402                 pci_disable_device(pdev);
5403                 /* Return back all IOs */
5404                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5405                 return PCI_ERS_RESULT_NEED_RESET;
5406         case pci_channel_io_perm_failure:
5407                 ha->flags.pci_channel_io_perm_failure = 1;
5408                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5409                 return PCI_ERS_RESULT_DISCONNECT;
5410         }
5411         return PCI_ERS_RESULT_NEED_RESET;
5412 }
5413
5414 static pci_ers_result_t
5415 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5416 {
5417         int risc_paused = 0;
5418         uint32_t stat;
5419         unsigned long flags;
5420         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5421         struct qla_hw_data *ha = base_vha->hw;
5422         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5423         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5424
5425         if (IS_QLA82XX(ha))
5426                 return PCI_ERS_RESULT_RECOVERED;
5427
5428         spin_lock_irqsave(&ha->hardware_lock, flags);
5429         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5430                 stat = RD_REG_DWORD(&reg->hccr);
5431                 if (stat & HCCR_RISC_PAUSE)
5432                         risc_paused = 1;
5433         } else if (IS_QLA23XX(ha)) {
5434                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5435                 if (stat & HSR_RISC_PAUSED)
5436                         risc_paused = 1;
5437         } else if (IS_FWI2_CAPABLE(ha)) {
5438                 stat = RD_REG_DWORD(&reg24->host_status);
5439                 if (stat & HSRX_RISC_PAUSED)
5440                         risc_paused = 1;
5441         }
5442         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5443
5444         if (risc_paused) {
5445                 ql_log(ql_log_info, base_vha, 0x9003,
5446                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5447                 ha->isp_ops->fw_dump(base_vha, 0);
5448
5449                 return PCI_ERS_RESULT_NEED_RESET;
5450         } else
5451                 return PCI_ERS_RESULT_RECOVERED;
5452 }
5453
5454 static uint32_t
5455 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5456 {
5457         uint32_t rval = QLA_FUNCTION_FAILED;
5458         uint32_t drv_active = 0;
5459         struct qla_hw_data *ha = base_vha->hw;
5460         int fn;
5461         struct pci_dev *other_pdev = NULL;
5462
5463         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5464             "Entered %s.\n", __func__);
5465
5466         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5467
5468         if (base_vha->flags.online) {
5469                 /* Abort all outstanding commands,
5470                  * so as to be requeued later */
5471                 qla2x00_abort_isp_cleanup(base_vha);
5472         }
5473
5474
5475         fn = PCI_FUNC(ha->pdev->devfn);
5476         while (fn > 0) {
5477                 fn--;
5478                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5479                     "Finding pci device at function = 0x%x.\n", fn);
5480                 other_pdev =
5481                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5482                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5483                     fn));
5484
5485                 if (!other_pdev)
5486                         continue;
5487                 if (atomic_read(&other_pdev->enable_cnt)) {
5488                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5489                             "Found PCI func available and enable at 0x%x.\n",
5490                             fn);
5491                         pci_dev_put(other_pdev);
5492                         break;
5493                 }
5494                 pci_dev_put(other_pdev);
5495         }
5496
5497         if (!fn) {
5498                 /* Reset owner */
5499                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5500                     "This devfn is reset owner = 0x%x.\n",
5501                     ha->pdev->devfn);
5502                 qla82xx_idc_lock(ha);
5503
5504                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5505                     QLA8XXX_DEV_INITIALIZING);
5506
5507                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5508                     QLA82XX_IDC_VERSION);
5509
5510                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5511                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5512                     "drv_active = 0x%x.\n", drv_active);
5513
5514                 qla82xx_idc_unlock(ha);
5515                 /* Reset if device is not already reset
5516                  * drv_active would be 0 if a reset has already been done
5517                  */
5518                 if (drv_active)
5519                         rval = qla82xx_start_firmware(base_vha);
5520                 else
5521                         rval = QLA_SUCCESS;
5522                 qla82xx_idc_lock(ha);
5523
5524                 if (rval != QLA_SUCCESS) {
5525                         ql_log(ql_log_info, base_vha, 0x900b,
5526                             "HW State: FAILED.\n");
5527                         qla82xx_clear_drv_active(ha);
5528                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5529                             QLA8XXX_DEV_FAILED);
5530                 } else {
5531                         ql_log(ql_log_info, base_vha, 0x900c,
5532                             "HW State: READY.\n");
5533                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5534                             QLA8XXX_DEV_READY);
5535                         qla82xx_idc_unlock(ha);
5536                         ha->flags.isp82xx_fw_hung = 0;
5537                         rval = qla82xx_restart_isp(base_vha);
5538                         qla82xx_idc_lock(ha);
5539                         /* Clear driver state register */
5540                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5541                         qla82xx_set_drv_active(base_vha);
5542                 }
5543                 qla82xx_idc_unlock(ha);
5544         } else {
5545                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5546                     "This devfn is not reset owner = 0x%x.\n",
5547                     ha->pdev->devfn);
5548                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5549                     QLA8XXX_DEV_READY)) {
5550                         ha->flags.isp82xx_fw_hung = 0;
5551                         rval = qla82xx_restart_isp(base_vha);
5552                         qla82xx_idc_lock(ha);
5553                         qla82xx_set_drv_active(base_vha);
5554                         qla82xx_idc_unlock(ha);
5555                 }
5556         }
5557         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5558
5559         return rval;
5560 }
5561
5562 static pci_ers_result_t
5563 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5564 {
5565         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5566         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5567         struct qla_hw_data *ha = base_vha->hw;
5568         struct rsp_que *rsp;
5569         int rc, retries = 10;
5570
5571         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5572             "Slot Reset.\n");
5573
5574         /* Workaround: qla2xxx driver which access hardware earlier
5575          * needs error state to be pci_channel_io_online.
5576          * Otherwise mailbox command timesout.
5577          */
5578         pdev->error_state = pci_channel_io_normal;
5579
5580         pci_restore_state(pdev);
5581
5582         /* pci_restore_state() clears the saved_state flag of the device
5583          * save restored state which resets saved_state flag
5584          */
5585         pci_save_state(pdev);
5586
5587         if (ha->mem_only)
5588                 rc = pci_enable_device_mem(pdev);
5589         else
5590                 rc = pci_enable_device(pdev);
5591
5592         if (rc) {
5593                 ql_log(ql_log_warn, base_vha, 0x9005,
5594                     "Can't re-enable PCI device after reset.\n");
5595                 goto exit_slot_reset;
5596         }
5597
5598         rsp = ha->rsp_q_map[0];
5599         if (qla2x00_request_irqs(ha, rsp))
5600                 goto exit_slot_reset;
5601
5602         if (ha->isp_ops->pci_config(base_vha))
5603                 goto exit_slot_reset;
5604
5605         if (IS_QLA82XX(ha)) {
5606                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5607                         ret = PCI_ERS_RESULT_RECOVERED;
5608                         goto exit_slot_reset;
5609                 } else
5610                         goto exit_slot_reset;
5611         }
5612
5613         while (ha->flags.mbox_busy && retries--)
5614                 msleep(1000);
5615
5616         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5617         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5618                 ret =  PCI_ERS_RESULT_RECOVERED;
5619         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5620
5621
5622 exit_slot_reset:
5623         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5624             "slot_reset return %x.\n", ret);
5625
5626         return ret;
5627 }
5628
5629 static void
5630 qla2xxx_pci_resume(struct pci_dev *pdev)
5631 {
5632         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5633         struct qla_hw_data *ha = base_vha->hw;
5634         int ret;
5635
5636         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5637             "pci_resume.\n");
5638
5639         ret = qla2x00_wait_for_hba_online(base_vha);
5640         if (ret != QLA_SUCCESS) {
5641                 ql_log(ql_log_fatal, base_vha, 0x9002,
5642                     "The device failed to resume I/O from slot/link_reset.\n");
5643         }
5644
5645         pci_cleanup_aer_uncorrect_error_status(pdev);
5646
5647         ha->flags.eeh_busy = 0;
5648 }
5649
5650 static void
5651 qla83xx_disable_laser(scsi_qla_host_t *vha)
5652 {
5653         uint32_t reg, data, fn;
5654         struct qla_hw_data *ha = vha->hw;
5655         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
5656
5657         /* pci func #/port # */
5658         ql_dbg(ql_dbg_init, vha, 0x004b,
5659             "Disabling Laser for hba: %p\n", vha);
5660
5661         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
5662                 (BIT_15|BIT_14|BIT_13|BIT_12));
5663
5664         fn = (fn >> 12);
5665
5666         if (fn & 1)
5667                 reg = PORT_1_2031;
5668         else
5669                 reg = PORT_0_2031;
5670
5671         data = LASER_OFF_2031;
5672
5673         qla83xx_wr_reg(vha, reg, data);
5674 }
5675
5676 static const struct pci_error_handlers qla2xxx_err_handler = {
5677         .error_detected = qla2xxx_pci_error_detected,
5678         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5679         .slot_reset = qla2xxx_pci_slot_reset,
5680         .resume = qla2xxx_pci_resume,
5681 };
5682
5683 static struct pci_device_id qla2xxx_pci_tbl[] = {
5684         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5685         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5686         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5687         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5688         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5689         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5690         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5691         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5692         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5693         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5694         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5695         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5696         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5697         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5698         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5699         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5700         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5701         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5702         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5703         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5704         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5705         { 0 },
5706 };
5707 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5708
5709 static struct pci_driver qla2xxx_pci_driver = {
5710         .name           = QLA2XXX_DRIVER_NAME,
5711         .driver         = {
5712                 .owner          = THIS_MODULE,
5713         },
5714         .id_table       = qla2xxx_pci_tbl,
5715         .probe          = qla2x00_probe_one,
5716         .remove         = qla2x00_remove_one,
5717         .shutdown       = qla2x00_shutdown,
5718         .err_handler    = &qla2xxx_err_handler,
5719 };
5720
5721 static const struct file_operations apidev_fops = {
5722         .owner = THIS_MODULE,
5723         .llseek = noop_llseek,
5724 };
5725
5726 /**
5727  * qla2x00_module_init - Module initialization.
5728  **/
5729 static int __init
5730 qla2x00_module_init(void)
5731 {
5732         int ret = 0;
5733
5734         /* Allocate cache for SRBs. */
5735         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5736             SLAB_HWCACHE_ALIGN, NULL);
5737         if (srb_cachep == NULL) {
5738                 ql_log(ql_log_fatal, NULL, 0x0001,
5739                     "Unable to allocate SRB cache...Failing load!.\n");
5740                 return -ENOMEM;
5741         }
5742
5743         /* Initialize target kmem_cache and mem_pools */
5744         ret = qlt_init();
5745         if (ret < 0) {
5746                 kmem_cache_destroy(srb_cachep);
5747                 return ret;
5748         } else if (ret > 0) {
5749                 /*
5750                  * If initiator mode is explictly disabled by qlt_init(),
5751                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5752                  * performing scsi_scan_target() during LOOP UP event.
5753                  */
5754                 qla2xxx_transport_functions.disable_target_scan = 1;
5755                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5756         }
5757
5758         /* Derive version string. */
5759         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5760         if (ql2xextended_error_logging)
5761                 strcat(qla2x00_version_str, "-debug");
5762
5763         qla2xxx_transport_template =
5764             fc_attach_transport(&qla2xxx_transport_functions);
5765         if (!qla2xxx_transport_template) {
5766                 kmem_cache_destroy(srb_cachep);
5767                 ql_log(ql_log_fatal, NULL, 0x0002,
5768                     "fc_attach_transport failed...Failing load!.\n");
5769                 qlt_exit();
5770                 return -ENODEV;
5771         }
5772
5773         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5774         if (apidev_major < 0) {
5775                 ql_log(ql_log_fatal, NULL, 0x0003,
5776                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5777         }
5778
5779         qla2xxx_transport_vport_template =
5780             fc_attach_transport(&qla2xxx_transport_vport_functions);
5781         if (!qla2xxx_transport_vport_template) {
5782                 kmem_cache_destroy(srb_cachep);
5783                 qlt_exit();
5784                 fc_release_transport(qla2xxx_transport_template);
5785                 ql_log(ql_log_fatal, NULL, 0x0004,
5786                     "fc_attach_transport vport failed...Failing load!.\n");
5787                 return -ENODEV;
5788         }
5789         ql_log(ql_log_info, NULL, 0x0005,
5790             "QLogic Fibre Channel HBA Driver: %s.\n",
5791             qla2x00_version_str);
5792         ret = pci_register_driver(&qla2xxx_pci_driver);
5793         if (ret) {
5794                 kmem_cache_destroy(srb_cachep);
5795                 qlt_exit();
5796                 fc_release_transport(qla2xxx_transport_template);
5797                 fc_release_transport(qla2xxx_transport_vport_template);
5798                 ql_log(ql_log_fatal, NULL, 0x0006,
5799                     "pci_register_driver failed...ret=%d Failing load!.\n",
5800                     ret);
5801         }
5802         return ret;
5803 }
5804
5805 /**
5806  * qla2x00_module_exit - Module cleanup.
5807  **/
5808 static void __exit
5809 qla2x00_module_exit(void)
5810 {
5811         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5812         pci_unregister_driver(&qla2xxx_pci_driver);
5813         qla2x00_release_firmware();
5814         kmem_cache_destroy(srb_cachep);
5815         qlt_exit();
5816         if (ctx_cachep)
5817                 kmem_cache_destroy(ctx_cachep);
5818         fc_release_transport(qla2xxx_transport_template);
5819         fc_release_transport(qla2xxx_transport_vport_template);
5820 }
5821
5822 module_init(qla2x00_module_init);
5823 module_exit(qla2x00_module_exit);
5824
5825 MODULE_AUTHOR("QLogic Corporation");
5826 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5827 MODULE_LICENSE("GPL");
5828 MODULE_VERSION(QLA2XXX_VERSION);
5829 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5830 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5831 MODULE_FIRMWARE(FW_FILE_ISP2300);
5832 MODULE_FIRMWARE(FW_FILE_ISP2322);
5833 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5834 MODULE_FIRMWARE(FW_FILE_ISP25XX);