drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint64_t ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, ullong, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 int ql2xexlogins = 0;
 225 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 226 MODULE_PARM_DESC(ql2xexlogins,
 227                  "Number of extended Logins. "
 228                  "0 (Default)- Disabled.");
 229
 230 int ql2xexchoffld = 0;
 231 module_param(ql2xexchoffld, uint, S_IRUGO|S_IWUSR);
 232 MODULE_PARM_DESC(ql2xexchoffld,
 233                  "Number of exchanges to offload. "
 234                  "0 (Default)- Disabled.");
 235
 236 int ql2xfwholdabts = 0;
 237 module_param(ql2xfwholdabts, int, S_IRUGO);
 238 MODULE_PARM_DESC(ql2xfwholdabts,
 239                 "Allow FW to hold status IOCB until ABTS rsp received. "
 240                 "0 (Default) Do not set fw option. "
 241                 "1 - Set fw option to hold ABTS.");
 242
 243 /*
 244  * SCSI host template entry points
 245  */
 246 static int qla2xxx_slave_configure(struct scsi_device * device);
 247 static int qla2xxx_slave_alloc(struct scsi_device *);
 248 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 249 static void qla2xxx_scan_start(struct Scsi_Host *);
 250 static void qla2xxx_slave_destroy(struct scsi_device *);
 251 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 252 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 253 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 254 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 255 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 256 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 257
 258 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 259 static void qla2x00_free_device(scsi_qla_host_t *);
 260 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 261
 262 struct scsi_host_template qla2xxx_driver_template = {
 263         .module                 = THIS_MODULE,
 264         .name                   = QLA2XXX_DRIVER_NAME,
 265         .queuecommand           = qla2xxx_queuecommand,
 266
 267         .eh_abort_handler       = qla2xxx_eh_abort,
 268         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 269         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 270         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 271         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 272
 273         .slave_configure        = qla2xxx_slave_configure,
 274
 275         .slave_alloc            = qla2xxx_slave_alloc,
 276         .slave_destroy          = qla2xxx_slave_destroy,
 277         .scan_finished          = qla2xxx_scan_finished,
 278         .scan_start             = qla2xxx_scan_start,
 279         .change_queue_depth     = scsi_change_queue_depth,
 280         .this_id                = -1,
 281         .cmd_per_lun            = 3,
 282         .use_clustering         = ENABLE_CLUSTERING,
 283         .sg_tablesize           = SG_ALL,
 284
 285         .max_sectors            = 0xFFFF,
 286         .shost_attrs            = qla2x00_host_attrs,
 287
 288         .supported_mode         = MODE_INITIATOR,
 289         .track_queue_depth      = 1,
 290 };
 291
 292 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 293 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 294
 295 /* TODO Convert to inlines
 296  *
 297  * Timer routines
 298  */
 299
 300 __inline__ void
 301 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 302 {
 303         init_timer(&vha->timer);
 304         vha->timer.expires = jiffies + interval * HZ;
 305         vha->timer.data = (unsigned long)vha;
 306         vha->timer.function = (void (*)(unsigned long))func;
 307         add_timer(&vha->timer);
 308         vha->timer_active = 1;
 309 }
 310
 311 static inline void
 312 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 313 {
 314         /* Currently used for 82XX only. */
 315         if (vha->device_flags & DFLG_DEV_FAILED) {
 316                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 317                     "Device in a failed state, returning.\n");
 318                 return;
 319         }
 320
 321         mod_timer(&vha->timer, jiffies + interval * HZ);
 322 }
 323
 324 static __inline__ void
 325 qla2x00_stop_timer(scsi_qla_host_t *vha)
 326 {
 327         del_timer_sync(&vha->timer);
 328         vha->timer_active = 0;
 329 }
 330
 331 static int qla2x00_do_dpc(void *data);
 332
 333 static void qla2x00_rst_aen(scsi_qla_host_t *);
 334
 335 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 336         struct req_que **, struct rsp_que **);
 337 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 338 static void qla2x00_mem_free(struct qla_hw_data *);
 339
 340 /* -------------------------------------------------------------------------- */
 341 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 342                                 struct rsp_que *rsp)
 343 {
 344         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 345         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 346                                 GFP_KERNEL);
 347         if (!ha->req_q_map) {
 348                 ql_log(ql_log_fatal, vha, 0x003b,
 349                     "Unable to allocate memory for request queue ptrs.\n");
 350                 goto fail_req_map;
 351         }
 352
 353         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 354                                 GFP_KERNEL);
 355         if (!ha->rsp_q_map) {
 356                 ql_log(ql_log_fatal, vha, 0x003c,
 357                     "Unable to allocate memory for response queue ptrs.\n");
 358                 goto fail_rsp_map;
 359         }
 360         /*
 361          * Make sure we record at least the request and response queue zero in
 362          * case we need to free them if part of the probe fails.
 363          */
 364         ha->rsp_q_map[0] = rsp;
 365         ha->req_q_map[0] = req;
 366         set_bit(0, ha->rsp_qid_map);
 367         set_bit(0, ha->req_qid_map);
 368         return 1;
 369
 370 fail_rsp_map:
 371         kfree(ha->req_q_map);
 372         ha->req_q_map = NULL;
 373 fail_req_map:
 374         return -ENOMEM;
 375 }
 376
 377 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 378 {
 379         if (IS_QLAFX00(ha)) {
 380                 if (req && req->ring_fx00)
 381                         dma_free_coherent(&ha->pdev->dev,
 382                             (req->length_fx00 + 1) * sizeof(request_t),
 383                             req->ring_fx00, req->dma_fx00);
 384         } else if (req && req->ring)
 385                 dma_free_coherent(&ha->pdev->dev,
 386                 (req->length + 1) * sizeof(request_t),
 387                 req->ring, req->dma);
 388
 389         if (req)
 390                 kfree(req->outstanding_cmds);
 391
 392         kfree(req);
 393         req = NULL;
 394 }
 395
 396 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 397 {
 398         if (IS_QLAFX00(ha)) {
 399                 if (rsp && rsp->ring)
 400                         dma_free_coherent(&ha->pdev->dev,
 401                             (rsp->length_fx00 + 1) * sizeof(request_t),
 402                             rsp->ring_fx00, rsp->dma_fx00);
 403         } else if (rsp && rsp->ring) {
 404                 dma_free_coherent(&ha->pdev->dev,
 405                 (rsp->length + 1) * sizeof(response_t),
 406                 rsp->ring, rsp->dma);
 407         }
 408         kfree(rsp);
 409         rsp = NULL;
 410 }
 411
 412 static void qla2x00_free_queues(struct qla_hw_data *ha)
 413 {
 414         struct req_que *req;
 415         struct rsp_que *rsp;
 416         int cnt;
 417
 418         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 419                 if (!test_bit(cnt, ha->req_qid_map))
 420                         continue;
 421
 422                 req = ha->req_q_map[cnt];
 423                 qla2x00_free_req_que(ha, req);
 424         }
 425         kfree(ha->req_q_map);
 426         ha->req_q_map = NULL;
 427
 428         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 429                 if (!test_bit(cnt, ha->rsp_qid_map))
 430                         continue;
 431
 432                 rsp = ha->rsp_q_map[cnt];
 433                 qla2x00_free_rsp_que(ha, rsp);
 434         }
 435         kfree(ha->rsp_q_map);
 436         ha->rsp_q_map = NULL;
 437 }
 438
 439 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 440 {
 441         uint16_t options = 0;
 442         int ques, req, ret;
 443         struct qla_hw_data *ha = vha->hw;
 444
 445         if (!(ha->fw_attributes & BIT_6)) {
 446                 ql_log(ql_log_warn, vha, 0x00d8,
 447                     "Firmware is not multi-queue capable.\n");
 448                 goto fail;
 449         }
 450         if (ql2xmultique_tag) {
 451                 /* create a request queue for IO */
 452                 options |= BIT_7;
 453                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 454                         QLA_DEFAULT_QUE_QOS);
 455                 if (!req) {
 456                         ql_log(ql_log_warn, vha, 0x00e0,
 457                             "Failed to create request queue.\n");
 458                         goto fail;
 459                 }
 460                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 461                 vha->req = ha->req_q_map[req];
 462                 options |= BIT_1;
 463                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 464                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 465                         if (!ret) {
 466                                 ql_log(ql_log_warn, vha, 0x00e8,
 467                                     "Failed to create response queue.\n");
 468                                 goto fail2;
 469                         }
 470                 }
 471                 ha->flags.cpu_affinity_enabled = 1;
 472                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 473                     "CPU affinity mode enabled, "
 474                     "no. of response queues:%d no. of request queues:%d.\n",
 475                     ha->max_rsp_queues, ha->max_req_queues);
 476                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 477                     "CPU affinity mode enabled, "
 478                     "no. of response queues:%d no. of request queues:%d.\n",
 479                     ha->max_rsp_queues, ha->max_req_queues);
 480         }
 481         return 0;
 482 fail2:
 483         qla25xx_delete_queues(vha);
 484         destroy_workqueue(ha->wq);
 485         ha->wq = NULL;
 486         vha->req = ha->req_q_map[0];
 487 fail:
 488         ha->mqenable = 0;
 489         kfree(ha->req_q_map);
 490         kfree(ha->rsp_q_map);
 491         ha->max_req_queues = ha->max_rsp_queues = 1;
 492         return 1;
 493 }
 494
 495 static char *
 496 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 497 {
 498         struct qla_hw_data *ha = vha->hw;
 499         static char *pci_bus_modes[] = {
 500                 "33", "66", "100", "133",
 501         };
 502         uint16_t pci_bus;
 503
 504         strcpy(str, "PCI");
 505         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 506         if (pci_bus) {
 507                 strcat(str, "-X (");
 508                 strcat(str, pci_bus_modes[pci_bus]);
 509         } else {
 510                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 511                 strcat(str, " (");
 512                 strcat(str, pci_bus_modes[pci_bus]);
 513         }
 514         strcat(str, " MHz)");
 515
 516         return (str);
 517 }
 518
 519 static char *
 520 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 521 {
 522         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 523         struct qla_hw_data *ha = vha->hw;
 524         uint32_t pci_bus;
 525
 526         if (pci_is_pcie(ha->pdev)) {
 527                 char lwstr[6];
 528                 uint32_t lstat, lspeed, lwidth;
 529
 530                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 531                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 532                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 533
 534                 strcpy(str, "PCIe (");
 535                 switch (lspeed) {
 536                 case 1:
 537                         strcat(str, "2.5GT/s ");
 538                         break;
 539                 case 2:
 540                         strcat(str, "5.0GT/s ");
 541                         break;
 542                 case 3:
 543                         strcat(str, "8.0GT/s ");
 544                         break;
 545                 default:
 546                         strcat(str, "<unknown> ");
 547                         break;
 548                 }
 549                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 550                 strcat(str, lwstr);
 551
 552                 return str;
 553         }
 554
 555         strcpy(str, "PCI");
 556         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 557         if (pci_bus == 0 || pci_bus == 8) {
 558                 strcat(str, " (");
 559                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 560         } else {
 561                 strcat(str, "-X ");
 562                 if (pci_bus & BIT_2)
 563                         strcat(str, "Mode 2");
 564                 else
 565                         strcat(str, "Mode 1");
 566                 strcat(str, " (");
 567                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 568         }
 569         strcat(str, " MHz)");
 570
 571         return str;
 572 }
 573
 574 static char *
 575 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 576 {
 577         char un_str[10];
 578         struct qla_hw_data *ha = vha->hw;
 579
 580         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 581             ha->fw_minor_version, ha->fw_subminor_version);
 582
 583         if (ha->fw_attributes & BIT_9) {
 584                 strcat(str, "FLX");
 585                 return (str);
 586         }
 587
 588         switch (ha->fw_attributes & 0xFF) {
 589         case 0x7:
 590                 strcat(str, "EF");
 591                 break;
 592         case 0x17:
 593                 strcat(str, "TP");
 594                 break;
 595         case 0x37:
 596                 strcat(str, "IP");
 597                 break;
 598         case 0x77:
 599                 strcat(str, "VI");
 600                 break;
 601         default:
 602                 sprintf(un_str, "(%x)", ha->fw_attributes);
 603                 strcat(str, un_str);
 604                 break;
 605         }
 606         if (ha->fw_attributes & 0x100)
 607                 strcat(str, "X");
 608
 609         return (str);
 610 }
 611
 612 static char *
 613 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 614 {
 615         struct qla_hw_data *ha = vha->hw;
 616
 617         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 618             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 619         return str;
 620 }
 621
 622 void
 623 qla2x00_sp_free_dma(void *vha, void *ptr)
 624 {
 625         srb_t *sp = (srb_t *)ptr;
 626         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 627         struct qla_hw_data *ha = sp->fcport->vha->hw;
 628         void *ctx = GET_CMD_CTX_SP(sp);
 629
 630         if (sp->flags & SRB_DMA_VALID) {
 631                 scsi_dma_unmap(cmd);
 632                 sp->flags &= ~SRB_DMA_VALID;
 633         }
 634
 635         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 636                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 637                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 638                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 639         }
 640
 641         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 642                 /* List assured to be having elements */
 643                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 644                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 645         }
 646
 647         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 648                 dma_pool_free(ha->dl_dma_pool, ctx,
 649                     ((struct crc_context *)ctx)->crc_ctx_dma);
 650                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 651         }
 652
 653         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 654                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 655
 656                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 657                         ctx1->fcp_cmnd_dma);
 658                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 659                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 660                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 661                 mempool_free(ctx1, ha->ctx_mempool);
 662                 ctx1 = NULL;
 663         }
 664
 665         CMD_SP(cmd) = NULL;
 666         qla2x00_rel_sp(sp->fcport->vha, sp);
 667 }
 668
 669 static void
 670 qla2x00_sp_compl(void *data, void *ptr, int res)
 671 {
 672         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 673         srb_t *sp = (srb_t *)ptr;
 674         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 675
 676         cmd->result = res;
 677
 678         if (atomic_read(&sp->ref_count) == 0) {
 679                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 680                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 681                     sp, GET_CMD_SP(sp));
 682                 if (ql2xextended_error_logging & ql_dbg_io)
 683                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 684                 return;
 685         }
 686         if (!atomic_dec_and_test(&sp->ref_count))
 687                 return;
 688
 689         qla2x00_sp_free_dma(ha, sp);
 690         cmd->scsi_done(cmd);
 691 }
 692
 693 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 694  * does not have the changes necessary to avoid taking host->host_lock.
 695  */
 696 static int
 697 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 698 {
 699         scsi_qla_host_t *vha = shost_priv(host);
 700         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 701         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 702         struct qla_hw_data *ha = vha->hw;
 703         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 704         srb_t *sp;
 705         int rval;
 706
 707         if (ha->flags.eeh_busy) {
 708                 if (ha->flags.pci_channel_io_perm_failure) {
 709                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 710                             "PCI Channel IO permanent failure, exiting "
 711                             "cmd=%p.\n", cmd);
 712                         cmd->result = DID_NO_CONNECT << 16;
 713                 } else {
 714                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 715                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 716                         cmd->result = DID_REQUEUE << 16;
 717                 }
 718                 goto qc24_fail_command;
 719         }
 720
 721         rval = fc_remote_port_chkready(rport);
 722         if (rval) {
 723                 cmd->result = rval;
 724                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 725                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 726                     cmd, rval);
 727                 goto qc24_fail_command;
 728         }
 729
 730         if (!vha->flags.difdix_supported &&
 731                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 732                         ql_dbg(ql_dbg_io, vha, 0x3004,
 733                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 734                             cmd);
 735                         cmd->result = DID_NO_CONNECT << 16;
 736                         goto qc24_fail_command;
 737         }
 738
 739         if (!fcport) {
 740                 cmd->result = DID_NO_CONNECT << 16;
 741                 goto qc24_fail_command;
 742         }
 743
 744         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 745                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 746                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 747                         ql_dbg(ql_dbg_io, vha, 0x3005,
 748                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 749                             atomic_read(&fcport->state),
 750                             atomic_read(&base_vha->loop_state));
 751                         cmd->result = DID_NO_CONNECT << 16;
 752                         goto qc24_fail_command;
 753                 }
 754                 goto qc24_target_busy;
 755         }
 756
 757         /*
 758          * Return target busy if we've received a non-zero retry_delay_timer
 759          * in a FCP_RSP.
 760          */
 761         if (fcport->retry_delay_timestamp == 0) {
 762                 /* retry delay not set */
 763         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 764                 fcport->retry_delay_timestamp = 0;
 765         else
 766                 goto qc24_target_busy;
 767
 768         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 769         if (!sp)
 770                 goto qc24_host_busy;
 771
 772         sp->u.scmd.cmd = cmd;
 773         sp->type = SRB_SCSI_CMD;
 774         atomic_set(&sp->ref_count, 1);
 775         CMD_SP(cmd) = (void *)sp;
 776         sp->free = qla2x00_sp_free_dma;
 777         sp->done = qla2x00_sp_compl;
 778
 779         rval = ha->isp_ops->start_scsi(sp);
 780         if (rval != QLA_SUCCESS) {
 781                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 782                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 783                 goto qc24_host_busy_free_sp;
 784         }
 785
 786         return 0;
 787
 788 qc24_host_busy_free_sp:
 789         qla2x00_sp_free_dma(ha, sp);
 790
 791 qc24_host_busy:
 792         return SCSI_MLQUEUE_HOST_BUSY;
 793
 794 qc24_target_busy:
 795         return SCSI_MLQUEUE_TARGET_BUSY;
 796
 797 qc24_fail_command:
 798         cmd->scsi_done(cmd);
 799
 800         return 0;
 801 }
 802
 803 /*
 804  * qla2x00_eh_wait_on_command
 805  *    Waits for the command to be returned by the Firmware for some
 806  *    max time.
 807  *
 808  * Input:
 809  *    cmd = Scsi Command to wait on.
 810  *
 811  * Return:
 812  *    Not Found : 0
 813  *    Found : 1
 814  */
 815 static int
 816 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 817 {
 818 #define ABORT_POLLING_PERIOD    1000
 819 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 820         unsigned long wait_iter = ABORT_WAIT_ITER;
 821         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 822         struct qla_hw_data *ha = vha->hw;
 823         int ret = QLA_SUCCESS;
 824
 825         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 826                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 827                     "Return:eh_wait.\n");
 828                 return ret;
 829         }
 830
 831         while (CMD_SP(cmd) && wait_iter--) {
 832                 msleep(ABORT_POLLING_PERIOD);
 833         }
 834         if (CMD_SP(cmd))
 835                 ret = QLA_FUNCTION_FAILED;
 836
 837         return ret;
 838 }
 839
 840 /*
 841  * qla2x00_wait_for_hba_online
 842  *    Wait till the HBA is online after going through
 843  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 844  *    finally HBA is disabled ie marked offline
 845  *
 846  * Input:
 847  *     ha - pointer to host adapter structure
 848  *
 849  * Note:
 850  *    Does context switching-Release SPIN_LOCK
 851  *    (if any) before calling this routine.
 852  *
 853  * Return:
 854  *    Success (Adapter is online) : 0
 855  *    Failed  (Adapter is offline/disabled) : 1
 856  */
 857 int
 858 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 859 {
 860         int             return_status;
 861         unsigned long   wait_online;
 862         struct qla_hw_data *ha = vha->hw;
 863         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 864
 865         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 866         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 867             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 868             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 869             ha->dpc_active) && time_before(jiffies, wait_online)) {
 870
 871                 msleep(1000);
 872         }
 873         if (base_vha->flags.online)
 874                 return_status = QLA_SUCCESS;
 875         else
 876                 return_status = QLA_FUNCTION_FAILED;
 877
 878         return (return_status);
 879 }
 880
 881 /*
 882  * qla2x00_wait_for_hba_ready
 883  * Wait till the HBA is ready before doing driver unload
 884  *
 885  * Input:
 886  *     ha - pointer to host adapter structure
 887  *
 888  * Note:
 889  *    Does context switching-Release SPIN_LOCK
 890  *    (if any) before calling this routine.
 891  *
 892  */
 893 static void
 894 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 895 {
 896         struct qla_hw_data *ha = vha->hw;
 897
 898         while (((qla2x00_reset_active(vha)) || ha->dpc_active ||
 899             ha->flags.mbox_busy) ||
 900                 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
 901                 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags))
 902                 msleep(1000);
 903 }
 904
 905 int
 906 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 907 {
 908         int             return_status;
 909         unsigned long   wait_reset;
 910         struct qla_hw_data *ha = vha->hw;
 911         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 912
 913         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 914         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 915             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 916             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 917             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 918
 919                 msleep(1000);
 920
 921                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 922                     ha->flags.chip_reset_done)
 923                         break;
 924         }
 925         if (ha->flags.chip_reset_done)
 926                 return_status = QLA_SUCCESS;
 927         else
 928                 return_status = QLA_FUNCTION_FAILED;
 929
 930         return return_status;
 931 }
 932
 933 static void
 934 sp_get(struct srb *sp)
 935 {
 936         atomic_inc(&sp->ref_count);
 937 }
 938
 939 /**************************************************************************
 940 * qla2xxx_eh_abort
 941 *
 942 * Description:
 943 *    The abort function will abort the specified command.
 944 *
 945 * Input:
 946 *    cmd = Linux SCSI command packet to be aborted.
 947 *
 948 * Returns:
 949 *    Either SUCCESS or FAILED.
 950 *
 951 * Note:
 952 *    Only return FAILED if command not returned by firmware.
 953 **************************************************************************/
 954 static int
 955 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 956 {
 957         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 958         srb_t *sp;
 959         int ret;
 960         unsigned int id;
 961         uint64_t lun;
 962         unsigned long flags;
 963         int rval, wait = 0;
 964         struct qla_hw_data *ha = vha->hw;
 965
 966         if (!CMD_SP(cmd))
 967                 return SUCCESS;
 968
 969         ret = fc_block_scsi_eh(cmd);
 970         if (ret != 0)
 971                 return ret;
 972         ret = SUCCESS;
 973
 974         id = cmd->device->id;
 975         lun = cmd->device->lun;
 976
 977         spin_lock_irqsave(&ha->hardware_lock, flags);
 978         sp = (srb_t *) CMD_SP(cmd);
 979         if (!sp) {
 980                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 981                 return SUCCESS;
 982         }
 983
 984         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 985             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
 986             vha->host_no, id, lun, sp, cmd, sp->handle);
 987
 988         /* Get a reference to the sp and drop the lock.*/
 989         sp_get(sp);
 990
 991         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 992         rval = ha->isp_ops->abort_command(sp);
 993         if (rval) {
 994                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
 995                         ret = SUCCESS;
 996                 else
 997                         ret = FAILED;
 998
 999                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1000                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1001         } else {
1002                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1003                     "Abort command mbx success cmd=%p.\n", cmd);
1004                 wait = 1;
1005         }
1006
1007         spin_lock_irqsave(&ha->hardware_lock, flags);
1008         sp->done(ha, sp, 0);
1009         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1010
1011         /* Did the command return during mailbox execution? */
1012         if (ret == FAILED && !CMD_SP(cmd))
1013                 ret = SUCCESS;
1014
1015         /* Wait for the command to be returned. */
1016         if (wait) {
1017                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1018                         ql_log(ql_log_warn, vha, 0x8006,
1019                             "Abort handler timed out cmd=%p.\n", cmd);
1020                         ret = FAILED;
1021                 }
1022         }
1023
1024         ql_log(ql_log_info, vha, 0x801c,
1025             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1026             vha->host_no, id, lun, wait, ret);
1027
1028         return ret;
1029 }
1030
1031 int
1032 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1033         uint64_t l, enum nexus_wait_type type)
1034 {
1035         int cnt, match, status;
1036         unsigned long flags;
1037         struct qla_hw_data *ha = vha->hw;
1038         struct req_que *req;
1039         srb_t *sp;
1040         struct scsi_cmnd *cmd;
1041
1042         status = QLA_SUCCESS;
1043
1044         spin_lock_irqsave(&ha->hardware_lock, flags);
1045         req = vha->req;
1046         for (cnt = 1; status == QLA_SUCCESS &&
1047                 cnt < req->num_outstanding_cmds; cnt++) {
1048                 sp = req->outstanding_cmds[cnt];
1049                 if (!sp)
1050                         continue;
1051                 if (sp->type != SRB_SCSI_CMD)
1052                         continue;
1053                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1054                         continue;
1055                 match = 0;
1056                 cmd = GET_CMD_SP(sp);
1057                 switch (type) {
1058                 case WAIT_HOST:
1059                         match = 1;
1060                         break;
1061                 case WAIT_TARGET:
1062                         match = cmd->device->id == t;
1063                         break;
1064                 case WAIT_LUN:
1065                         match = (cmd->device->id == t &&
1066                                 cmd->device->lun == l);
1067                         break;
1068                 }
1069                 if (!match)
1070                         continue;
1071
1072                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1073                 status = qla2x00_eh_wait_on_command(cmd);
1074                 spin_lock_irqsave(&ha->hardware_lock, flags);
1075         }
1076         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1077
1078         return status;
1079 }
1080
1081 static char *reset_errors[] = {
1082         "HBA not online",
1083         "HBA not ready",
1084         "Task management failed",
1085         "Waiting for command completions",
1086 };
1087
1088 static int
1089 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1090     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1091 {
1092         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1093         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1094         int err;
1095
1096         if (!fcport) {
1097                 return FAILED;
1098         }
1099
1100         err = fc_block_scsi_eh(cmd);
1101         if (err != 0)
1102                 return err;
1103
1104         ql_log(ql_log_info, vha, 0x8009,
1105             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1106             cmd->device->id, cmd->device->lun, cmd);
1107
1108         err = 0;
1109         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1110                 ql_log(ql_log_warn, vha, 0x800a,
1111                     "Wait for hba online failed for cmd=%p.\n", cmd);
1112                 goto eh_reset_failed;
1113         }
1114         err = 2;
1115         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1116                 != QLA_SUCCESS) {
1117                 ql_log(ql_log_warn, vha, 0x800c,
1118                     "do_reset failed for cmd=%p.\n", cmd);
1119                 goto eh_reset_failed;
1120         }
1121         err = 3;
1122         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1123             cmd->device->lun, type) != QLA_SUCCESS) {
1124                 ql_log(ql_log_warn, vha, 0x800d,
1125                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1126                 goto eh_reset_failed;
1127         }
1128
1129         ql_log(ql_log_info, vha, 0x800e,
1130             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1131             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1132
1133         return SUCCESS;
1134
1135 eh_reset_failed:
1136         ql_log(ql_log_info, vha, 0x800f,
1137             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1138             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1139             cmd);
1140         return FAILED;
1141 }
1142
1143 static int
1144 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1145 {
1146         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1147         struct qla_hw_data *ha = vha->hw;
1148
1149         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1150             ha->isp_ops->lun_reset);
1151 }
1152
1153 static int
1154 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1155 {
1156         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1157         struct qla_hw_data *ha = vha->hw;
1158
1159         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1160             ha->isp_ops->target_reset);
1161 }
1162
1163 /**************************************************************************
1164 * qla2xxx_eh_bus_reset
1165 *
1166 * Description:
1167 *    The bus reset function will reset the bus and abort any executing
1168 *    commands.
1169 *
1170 * Input:
1171 *    cmd = Linux SCSI command packet of the command that cause the
1172 *          bus reset.
1173 *
1174 * Returns:
1175 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1176 *
1177 **************************************************************************/
1178 static int
1179 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1180 {
1181         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1182         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1183         int ret = FAILED;
1184         unsigned int id;
1185         uint64_t lun;
1186
1187         id = cmd->device->id;
1188         lun = cmd->device->lun;
1189
1190         if (!fcport) {
1191                 return ret;
1192         }
1193
1194         ret = fc_block_scsi_eh(cmd);
1195         if (ret != 0)
1196                 return ret;
1197         ret = FAILED;
1198
1199         ql_log(ql_log_info, vha, 0x8012,
1200             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1201
1202         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1203                 ql_log(ql_log_fatal, vha, 0x8013,
1204                     "Wait for hba online failed board disabled.\n");
1205                 goto eh_bus_reset_done;
1206         }
1207
1208         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1209                 ret = SUCCESS;
1210
1211         if (ret == FAILED)
1212                 goto eh_bus_reset_done;
1213
1214         /* Flush outstanding commands. */
1215         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1216             QLA_SUCCESS) {
1217                 ql_log(ql_log_warn, vha, 0x8014,
1218                     "Wait for pending commands failed.\n");
1219                 ret = FAILED;
1220         }
1221
1222 eh_bus_reset_done:
1223         ql_log(ql_log_warn, vha, 0x802b,
1224             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1225             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1226
1227         return ret;
1228 }
1229
1230 /**************************************************************************
1231 * qla2xxx_eh_host_reset
1232 *
1233 * Description:
1234 *    The reset function will reset the Adapter.
1235 *
1236 * Input:
1237 *      cmd = Linux SCSI command packet of the command that cause the
1238 *            adapter reset.
1239 *
1240 * Returns:
1241 *      Either SUCCESS or FAILED.
1242 *
1243 * Note:
1244 **************************************************************************/
1245 static int
1246 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1247 {
1248         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1249         struct qla_hw_data *ha = vha->hw;
1250         int ret = FAILED;
1251         unsigned int id;
1252         uint64_t lun;
1253         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1254
1255         id = cmd->device->id;
1256         lun = cmd->device->lun;
1257
1258         ql_log(ql_log_info, vha, 0x8018,
1259             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1260
1261         /*
1262          * No point in issuing another reset if one is active.  Also do not
1263          * attempt a reset if we are updating flash.
1264          */
1265         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1266                 goto eh_host_reset_lock;
1267
1268         if (vha != base_vha) {
1269                 if (qla2x00_vp_abort_isp(vha))
1270                         goto eh_host_reset_lock;
1271         } else {
1272                 if (IS_P3P_TYPE(vha->hw)) {
1273                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1274                                 /* Ctx reset success */
1275                                 ret = SUCCESS;
1276                                 goto eh_host_reset_lock;
1277                         }
1278                         /* fall thru if ctx reset failed */
1279                 }
1280                 if (ha->wq)
1281                         flush_workqueue(ha->wq);
1282
1283                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1284                 if (ha->isp_ops->abort_isp(base_vha)) {
1285                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1286                         /* failed. schedule dpc to try */
1287                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1288
1289                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1290                                 ql_log(ql_log_warn, vha, 0x802a,
1291                                     "wait for hba online failed.\n");
1292                                 goto eh_host_reset_lock;
1293                         }
1294                 }
1295                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1296         }
1297
1298         /* Waiting for command to be returned to OS.*/
1299         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1300                 QLA_SUCCESS)
1301                 ret = SUCCESS;
1302
1303 eh_host_reset_lock:
1304         ql_log(ql_log_info, vha, 0x8017,
1305             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1306             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1307
1308         return ret;
1309 }
1310
1311 /*
1312 * qla2x00_loop_reset
1313 *      Issue loop reset.
1314 *
1315 * Input:
1316 *      ha = adapter block pointer.
1317 *
1318 * Returns:
1319 *      0 = success
1320 */
1321 int
1322 qla2x00_loop_reset(scsi_qla_host_t *vha)
1323 {
1324         int ret;
1325         struct fc_port *fcport;
1326         struct qla_hw_data *ha = vha->hw;
1327
1328         if (IS_QLAFX00(ha)) {
1329                 return qlafx00_loop_reset(vha);
1330         }
1331
1332         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1333                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1334                         if (fcport->port_type != FCT_TARGET)
1335                                 continue;
1336
1337                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1338                         if (ret != QLA_SUCCESS) {
1339                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1340                                     "Bus Reset failed: Reset=%d "
1341                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1342                         }
1343                 }
1344         }
1345
1346
1347         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1348                 atomic_set(&vha->loop_state, LOOP_DOWN);
1349                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1350                 qla2x00_mark_all_devices_lost(vha, 0);
1351                 ret = qla2x00_full_login_lip(vha);
1352                 if (ret != QLA_SUCCESS) {
1353                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1354                             "full_login_lip=%d.\n", ret);
1355                 }
1356         }
1357
1358         if (ha->flags.enable_lip_reset) {
1359                 ret = qla2x00_lip_reset(vha);
1360                 if (ret != QLA_SUCCESS)
1361                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1362                             "lip_reset failed (%d).\n", ret);
1363         }
1364
1365         /* Issue marker command only when we are going to start the I/O */
1366         vha->marker_needed = 1;
1367
1368         return QLA_SUCCESS;
1369 }
1370
1371 void
1372 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1373 {
1374         int que, cnt;
1375         unsigned long flags;
1376         srb_t *sp;
1377         struct qla_hw_data *ha = vha->hw;
1378         struct req_que *req;
1379
1380         qlt_host_reset_handler(ha);
1381
1382         spin_lock_irqsave(&ha->hardware_lock, flags);
1383         for (que = 0; que < ha->max_req_queues; que++) {
1384                 req = ha->req_q_map[que];
1385                 if (!req)
1386                         continue;
1387                 if (!req->outstanding_cmds)
1388                         continue;
1389                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1390                         sp = req->outstanding_cmds[cnt];
1391                         if (sp) {
1392                                 req->outstanding_cmds[cnt] = NULL;
1393                                 sp->done(vha, sp, res);
1394                         }
1395                 }
1396         }
1397         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1398 }
1399
1400 static int
1401 qla2xxx_slave_alloc(struct scsi_device *sdev)
1402 {
1403         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1404
1405         if (!rport || fc_remote_port_chkready(rport))
1406                 return -ENXIO;
1407
1408         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1409
1410         return 0;
1411 }
1412
1413 static int
1414 qla2xxx_slave_configure(struct scsi_device *sdev)
1415 {
1416         scsi_qla_host_t *vha = shost_priv(sdev->host);
1417         struct req_que *req = vha->req;
1418
1419         if (IS_T10_PI_CAPABLE(vha->hw))
1420                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1421
1422         scsi_change_queue_depth(sdev, req->max_q_depth);
1423         return 0;
1424 }
1425
1426 static void
1427 qla2xxx_slave_destroy(struct scsi_device *sdev)
1428 {
1429         sdev->hostdata = NULL;
1430 }
1431
1432 /**
1433  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1434  * @ha: HA context
1435  *
1436  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1437  * supported addressing method.
1438  */
1439 static void
1440 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1441 {
1442         /* Assume a 32bit DMA mask. */
1443         ha->flags.enable_64bit_addressing = 0;
1444
1445         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1446                 /* Any upper-dword bits set? */
1447                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1448                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1449                         /* Ok, a 64bit DMA mask is applicable. */
1450                         ha->flags.enable_64bit_addressing = 1;
1451                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1452                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1453                         return;
1454                 }
1455         }
1456
1457         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1458         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1459 }
1460
1461 static void
1462 qla2x00_enable_intrs(struct qla_hw_data *ha)
1463 {
1464         unsigned long flags = 0;
1465         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1466
1467         spin_lock_irqsave(&ha->hardware_lock, flags);
1468         ha->interrupts_on = 1;
1469         /* enable risc and host interrupts */
1470         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1471         RD_REG_WORD(&reg->ictrl);
1472         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1473
1474 }
1475
1476 static void
1477 qla2x00_disable_intrs(struct qla_hw_data *ha)
1478 {
1479         unsigned long flags = 0;
1480         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1481
1482         spin_lock_irqsave(&ha->hardware_lock, flags);
1483         ha->interrupts_on = 0;
1484         /* disable risc and host interrupts */
1485         WRT_REG_WORD(&reg->ictrl, 0);
1486         RD_REG_WORD(&reg->ictrl);
1487         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1488 }
1489
1490 static void
1491 qla24xx_enable_intrs(struct qla_hw_data *ha)
1492 {
1493         unsigned long flags = 0;
1494         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1495
1496         spin_lock_irqsave(&ha->hardware_lock, flags);
1497         ha->interrupts_on = 1;
1498         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1499         RD_REG_DWORD(&reg->ictrl);
1500         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1501 }
1502
1503 static void
1504 qla24xx_disable_intrs(struct qla_hw_data *ha)
1505 {
1506         unsigned long flags = 0;
1507         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1508
1509         if (IS_NOPOLLING_TYPE(ha))
1510                 return;
1511         spin_lock_irqsave(&ha->hardware_lock, flags);
1512         ha->interrupts_on = 0;
1513         WRT_REG_DWORD(&reg->ictrl, 0);
1514         RD_REG_DWORD(&reg->ictrl);
1515         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1516 }
1517
1518 static int
1519 qla2x00_iospace_config(struct qla_hw_data *ha)
1520 {
1521         resource_size_t pio;
1522         uint16_t msix;
1523         int cpus;
1524
1525         if (pci_request_selected_regions(ha->pdev, ha->bars,
1526             QLA2XXX_DRIVER_NAME)) {
1527                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1528                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1529                     pci_name(ha->pdev));
1530                 goto iospace_error_exit;
1531         }
1532         if (!(ha->bars & 1))
1533                 goto skip_pio;
1534
1535         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1536         pio = pci_resource_start(ha->pdev, 0);
1537         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1538                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1539                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1540                             "Invalid pci I/O region size (%s).\n",
1541                             pci_name(ha->pdev));
1542                         pio = 0;
1543                 }
1544         } else {
1545                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1546                     "Region #0 no a PIO resource (%s).\n",
1547                     pci_name(ha->pdev));
1548                 pio = 0;
1549         }
1550         ha->pio_address = pio;
1551         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1552             "PIO address=%llu.\n",
1553             (unsigned long long)ha->pio_address);
1554
1555 skip_pio:
1556         /* Use MMIO operations for all accesses. */
1557         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1558                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1559                     "Region #1 not an MMIO resource (%s), aborting.\n",
1560                     pci_name(ha->pdev));
1561                 goto iospace_error_exit;
1562         }
1563         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1564                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1565                     "Invalid PCI mem region size (%s), aborting.\n",
1566                     pci_name(ha->pdev));
1567                 goto iospace_error_exit;
1568         }
1569
1570         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1571         if (!ha->iobase) {
1572                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1573                     "Cannot remap MMIO (%s), aborting.\n",
1574                     pci_name(ha->pdev));
1575                 goto iospace_error_exit;
1576         }
1577
1578         /* Determine queue resources */
1579         ha->max_req_queues = ha->max_rsp_queues = 1;
1580         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1581                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1582                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1583                 goto mqiobase_exit;
1584
1585         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1586                         pci_resource_len(ha->pdev, 3));
1587         if (ha->mqiobase) {
1588                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1589                     "MQIO Base=%p.\n", ha->mqiobase);
1590                 /* Read MSIX vector size of the board */
1591                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1592                 ha->msix_count = msix;
1593                 /* Max queues are bounded by available msix vectors */
1594                 /* queue 0 uses two msix vectors */
1595                 if (ql2xmultique_tag) {
1596                         cpus = num_online_cpus();
1597                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1598                                 (cpus + 1) : (ha->msix_count - 1);
1599                         ha->max_req_queues = 2;
1600                 } else if (ql2xmaxqueues > 1) {
1601                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1602                             QLA_MQ_SIZE : ql2xmaxqueues;
1603                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1604                             "QoS mode set, max no of request queues:%d.\n",
1605                             ha->max_req_queues);
1606                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1607                             "QoS mode set, max no of request queues:%d.\n",
1608                             ha->max_req_queues);
1609                 }
1610                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1611                     "MSI-X vector count: %d.\n", msix);
1612         } else
1613                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1614                     "BAR 3 not enabled.\n");
1615
1616 mqiobase_exit:
1617         ha->msix_count = ha->max_rsp_queues + 1;
1618         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1619             "MSIX Count:%d.\n", ha->msix_count);
1620         return (0);
1621
1622 iospace_error_exit:
1623         return (-ENOMEM);
1624 }
1625
1626
1627 static int
1628 qla83xx_iospace_config(struct qla_hw_data *ha)
1629 {
1630         uint16_t msix;
1631         int cpus;
1632
1633         if (pci_request_selected_regions(ha->pdev, ha->bars,
1634             QLA2XXX_DRIVER_NAME)) {
1635                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1636                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1637                     pci_name(ha->pdev));
1638
1639                 goto iospace_error_exit;
1640         }
1641
1642         /* Use MMIO operations for all accesses. */
1643         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1644                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1645                     "Invalid pci I/O region size (%s).\n",
1646                     pci_name(ha->pdev));
1647                 goto iospace_error_exit;
1648         }
1649         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1650                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1651                     "Invalid PCI mem region size (%s), aborting\n",
1652                         pci_name(ha->pdev));
1653                 goto iospace_error_exit;
1654         }
1655
1656         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1657         if (!ha->iobase) {
1658                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1659                     "Cannot remap MMIO (%s), aborting.\n",
1660                     pci_name(ha->pdev));
1661                 goto iospace_error_exit;
1662         }
1663
1664         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1665         /* 83XX 26XX always use MQ type access for queues
1666          * - mbar 2, a.k.a region 4 */
1667         ha->max_req_queues = ha->max_rsp_queues = 1;
1668         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1669                         pci_resource_len(ha->pdev, 4));
1670
1671         if (!ha->mqiobase) {
1672                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1673                     "BAR2/region4 not enabled\n");
1674                 goto mqiobase_exit;
1675         }
1676
1677         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1678                         pci_resource_len(ha->pdev, 2));
1679         if (ha->msixbase) {
1680                 /* Read MSIX vector size of the board */
1681                 pci_read_config_word(ha->pdev,
1682                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1683                 ha->msix_count = msix;
1684                 /* Max queues are bounded by available msix vectors */
1685                 /* queue 0 uses two msix vectors */
1686                 if (ql2xmultique_tag) {
1687                         cpus = num_online_cpus();
1688                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1689                                 (cpus + 1) : (ha->msix_count - 1);
1690                         ha->max_req_queues = 2;
1691                 } else if (ql2xmaxqueues > 1) {
1692                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1693                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1694                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1695                             "QoS mode set, max no of request queues:%d.\n",
1696                             ha->max_req_queues);
1697                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1698                             "QoS mode set, max no of request queues:%d.\n",
1699                             ha->max_req_queues);
1700                 }
1701                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1702                     "MSI-X vector count: %d.\n", msix);
1703         } else
1704                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1705                     "BAR 1 not enabled.\n");
1706
1707 mqiobase_exit:
1708         ha->msix_count = ha->max_rsp_queues + 1;
1709
1710         qlt_83xx_iospace_config(ha);
1711
1712         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1713             "MSIX Count:%d.\n", ha->msix_count);
1714         return 0;
1715
1716 iospace_error_exit:
1717         return -ENOMEM;
1718 }
1719
1720 static struct isp_operations qla2100_isp_ops = {
1721         .pci_config             = qla2100_pci_config,
1722         .reset_chip             = qla2x00_reset_chip,
1723         .chip_diag              = qla2x00_chip_diag,
1724         .config_rings           = qla2x00_config_rings,
1725         .reset_adapter          = qla2x00_reset_adapter,
1726         .nvram_config           = qla2x00_nvram_config,
1727         .update_fw_options      = qla2x00_update_fw_options,
1728         .load_risc              = qla2x00_load_risc,
1729         .pci_info_str           = qla2x00_pci_info_str,
1730         .fw_version_str         = qla2x00_fw_version_str,
1731         .intr_handler           = qla2100_intr_handler,
1732         .enable_intrs           = qla2x00_enable_intrs,
1733         .disable_intrs          = qla2x00_disable_intrs,
1734         .abort_command          = qla2x00_abort_command,
1735         .target_reset           = qla2x00_abort_target,
1736         .lun_reset              = qla2x00_lun_reset,
1737         .fabric_login           = qla2x00_login_fabric,
1738         .fabric_logout          = qla2x00_fabric_logout,
1739         .calc_req_entries       = qla2x00_calc_iocbs_32,
1740         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1741         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1742         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1743         .read_nvram             = qla2x00_read_nvram_data,
1744         .write_nvram            = qla2x00_write_nvram_data,
1745         .fw_dump                = qla2100_fw_dump,
1746         .beacon_on              = NULL,
1747         .beacon_off             = NULL,
1748         .beacon_blink           = NULL,
1749         .read_optrom            = qla2x00_read_optrom_data,
1750         .write_optrom           = qla2x00_write_optrom_data,
1751         .get_flash_version      = qla2x00_get_flash_version,
1752         .start_scsi             = qla2x00_start_scsi,
1753         .abort_isp              = qla2x00_abort_isp,
1754         .iospace_config         = qla2x00_iospace_config,
1755         .initialize_adapter     = qla2x00_initialize_adapter,
1756 };
1757
1758 static struct isp_operations qla2300_isp_ops = {
1759         .pci_config             = qla2300_pci_config,
1760         .reset_chip             = qla2x00_reset_chip,
1761         .chip_diag              = qla2x00_chip_diag,
1762         .config_rings           = qla2x00_config_rings,
1763         .reset_adapter          = qla2x00_reset_adapter,
1764         .nvram_config           = qla2x00_nvram_config,
1765         .update_fw_options      = qla2x00_update_fw_options,
1766         .load_risc              = qla2x00_load_risc,
1767         .pci_info_str           = qla2x00_pci_info_str,
1768         .fw_version_str         = qla2x00_fw_version_str,
1769         .intr_handler           = qla2300_intr_handler,
1770         .enable_intrs           = qla2x00_enable_intrs,
1771         .disable_intrs          = qla2x00_disable_intrs,
1772         .abort_command          = qla2x00_abort_command,
1773         .target_reset           = qla2x00_abort_target,
1774         .lun_reset              = qla2x00_lun_reset,
1775         .fabric_login           = qla2x00_login_fabric,
1776         .fabric_logout          = qla2x00_fabric_logout,
1777         .calc_req_entries       = qla2x00_calc_iocbs_32,
1778         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1779         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1780         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1781         .read_nvram             = qla2x00_read_nvram_data,
1782         .write_nvram            = qla2x00_write_nvram_data,
1783         .fw_dump                = qla2300_fw_dump,
1784         .beacon_on              = qla2x00_beacon_on,
1785         .beacon_off             = qla2x00_beacon_off,
1786         .beacon_blink           = qla2x00_beacon_blink,
1787         .read_optrom            = qla2x00_read_optrom_data,
1788         .write_optrom           = qla2x00_write_optrom_data,
1789         .get_flash_version      = qla2x00_get_flash_version,
1790         .start_scsi             = qla2x00_start_scsi,
1791         .abort_isp              = qla2x00_abort_isp,
1792         .iospace_config         = qla2x00_iospace_config,
1793         .initialize_adapter     = qla2x00_initialize_adapter,
1794 };
1795
1796 static struct isp_operations qla24xx_isp_ops = {
1797         .pci_config             = qla24xx_pci_config,
1798         .reset_chip             = qla24xx_reset_chip,
1799         .chip_diag              = qla24xx_chip_diag,
1800         .config_rings           = qla24xx_config_rings,
1801         .reset_adapter          = qla24xx_reset_adapter,
1802         .nvram_config           = qla24xx_nvram_config,
1803         .update_fw_options      = qla24xx_update_fw_options,
1804         .load_risc              = qla24xx_load_risc,
1805         .pci_info_str           = qla24xx_pci_info_str,
1806         .fw_version_str         = qla24xx_fw_version_str,
1807         .intr_handler           = qla24xx_intr_handler,
1808         .enable_intrs           = qla24xx_enable_intrs,
1809         .disable_intrs          = qla24xx_disable_intrs,
1810         .abort_command          = qla24xx_abort_command,
1811         .target_reset           = qla24xx_abort_target,
1812         .lun_reset              = qla24xx_lun_reset,
1813         .fabric_login           = qla24xx_login_fabric,
1814         .fabric_logout          = qla24xx_fabric_logout,
1815         .calc_req_entries       = NULL,
1816         .build_iocbs            = NULL,
1817         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1818         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1819         .read_nvram             = qla24xx_read_nvram_data,
1820         .write_nvram            = qla24xx_write_nvram_data,
1821         .fw_dump                = qla24xx_fw_dump,
1822         .beacon_on              = qla24xx_beacon_on,
1823         .beacon_off             = qla24xx_beacon_off,
1824         .beacon_blink           = qla24xx_beacon_blink,
1825         .read_optrom            = qla24xx_read_optrom_data,
1826         .write_optrom           = qla24xx_write_optrom_data,
1827         .get_flash_version      = qla24xx_get_flash_version,
1828         .start_scsi             = qla24xx_start_scsi,
1829         .abort_isp              = qla2x00_abort_isp,
1830         .iospace_config         = qla2x00_iospace_config,
1831         .initialize_adapter     = qla2x00_initialize_adapter,
1832 };
1833
1834 static struct isp_operations qla25xx_isp_ops = {
1835         .pci_config             = qla25xx_pci_config,
1836         .reset_chip             = qla24xx_reset_chip,
1837         .chip_diag              = qla24xx_chip_diag,
1838         .config_rings           = qla24xx_config_rings,
1839         .reset_adapter          = qla24xx_reset_adapter,
1840         .nvram_config           = qla24xx_nvram_config,
1841         .update_fw_options      = qla24xx_update_fw_options,
1842         .load_risc              = qla24xx_load_risc,
1843         .pci_info_str           = qla24xx_pci_info_str,
1844         .fw_version_str         = qla24xx_fw_version_str,
1845         .intr_handler           = qla24xx_intr_handler,
1846         .enable_intrs           = qla24xx_enable_intrs,
1847         .disable_intrs          = qla24xx_disable_intrs,
1848         .abort_command          = qla24xx_abort_command,
1849         .target_reset           = qla24xx_abort_target,
1850         .lun_reset              = qla24xx_lun_reset,
1851         .fabric_login           = qla24xx_login_fabric,
1852         .fabric_logout          = qla24xx_fabric_logout,
1853         .calc_req_entries       = NULL,
1854         .build_iocbs            = NULL,
1855         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1856         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1857         .read_nvram             = qla25xx_read_nvram_data,
1858         .write_nvram            = qla25xx_write_nvram_data,
1859         .fw_dump                = qla25xx_fw_dump,
1860         .beacon_on              = qla24xx_beacon_on,
1861         .beacon_off             = qla24xx_beacon_off,
1862         .beacon_blink           = qla24xx_beacon_blink,
1863         .read_optrom            = qla25xx_read_optrom_data,
1864         .write_optrom           = qla24xx_write_optrom_data,
1865         .get_flash_version      = qla24xx_get_flash_version,
1866         .start_scsi             = qla24xx_dif_start_scsi,
1867         .abort_isp              = qla2x00_abort_isp,
1868         .iospace_config         = qla2x00_iospace_config,
1869         .initialize_adapter     = qla2x00_initialize_adapter,
1870 };
1871
1872 static struct isp_operations qla81xx_isp_ops = {
1873         .pci_config             = qla25xx_pci_config,
1874         .reset_chip             = qla24xx_reset_chip,
1875         .chip_diag              = qla24xx_chip_diag,
1876         .config_rings           = qla24xx_config_rings,
1877         .reset_adapter          = qla24xx_reset_adapter,
1878         .nvram_config           = qla81xx_nvram_config,
1879         .update_fw_options      = qla81xx_update_fw_options,
1880         .load_risc              = qla81xx_load_risc,
1881         .pci_info_str           = qla24xx_pci_info_str,
1882         .fw_version_str         = qla24xx_fw_version_str,
1883         .intr_handler           = qla24xx_intr_handler,
1884         .enable_intrs           = qla24xx_enable_intrs,
1885         .disable_intrs          = qla24xx_disable_intrs,
1886         .abort_command          = qla24xx_abort_command,
1887         .target_reset           = qla24xx_abort_target,
1888         .lun_reset              = qla24xx_lun_reset,
1889         .fabric_login           = qla24xx_login_fabric,
1890         .fabric_logout          = qla24xx_fabric_logout,
1891         .calc_req_entries       = NULL,
1892         .build_iocbs            = NULL,
1893         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1894         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1895         .read_nvram             = NULL,
1896         .write_nvram            = NULL,
1897         .fw_dump                = qla81xx_fw_dump,
1898         .beacon_on              = qla24xx_beacon_on,
1899         .beacon_off             = qla24xx_beacon_off,
1900         .beacon_blink           = qla83xx_beacon_blink,
1901         .read_optrom            = qla25xx_read_optrom_data,
1902         .write_optrom           = qla24xx_write_optrom_data,
1903         .get_flash_version      = qla24xx_get_flash_version,
1904         .start_scsi             = qla24xx_dif_start_scsi,
1905         .abort_isp              = qla2x00_abort_isp,
1906         .iospace_config         = qla2x00_iospace_config,
1907         .initialize_adapter     = qla2x00_initialize_adapter,
1908 };
1909
1910 static struct isp_operations qla82xx_isp_ops = {
1911         .pci_config             = qla82xx_pci_config,
1912         .reset_chip             = qla82xx_reset_chip,
1913         .chip_diag              = qla24xx_chip_diag,
1914         .config_rings           = qla82xx_config_rings,
1915         .reset_adapter          = qla24xx_reset_adapter,
1916         .nvram_config           = qla81xx_nvram_config,
1917         .update_fw_options      = qla24xx_update_fw_options,
1918         .load_risc              = qla82xx_load_risc,
1919         .pci_info_str           = qla24xx_pci_info_str,
1920         .fw_version_str         = qla24xx_fw_version_str,
1921         .intr_handler           = qla82xx_intr_handler,
1922         .enable_intrs           = qla82xx_enable_intrs,
1923         .disable_intrs          = qla82xx_disable_intrs,
1924         .abort_command          = qla24xx_abort_command,
1925         .target_reset           = qla24xx_abort_target,
1926         .lun_reset              = qla24xx_lun_reset,
1927         .fabric_login           = qla24xx_login_fabric,
1928         .fabric_logout          = qla24xx_fabric_logout,
1929         .calc_req_entries       = NULL,
1930         .build_iocbs            = NULL,
1931         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1932         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1933         .read_nvram             = qla24xx_read_nvram_data,
1934         .write_nvram            = qla24xx_write_nvram_data,
1935         .fw_dump                = qla82xx_fw_dump,
1936         .beacon_on              = qla82xx_beacon_on,
1937         .beacon_off             = qla82xx_beacon_off,
1938         .beacon_blink           = NULL,
1939         .read_optrom            = qla82xx_read_optrom_data,
1940         .write_optrom           = qla82xx_write_optrom_data,
1941         .get_flash_version      = qla82xx_get_flash_version,
1942         .start_scsi             = qla82xx_start_scsi,
1943         .abort_isp              = qla82xx_abort_isp,
1944         .iospace_config         = qla82xx_iospace_config,
1945         .initialize_adapter     = qla2x00_initialize_adapter,
1946 };
1947
1948 static struct isp_operations qla8044_isp_ops = {
1949         .pci_config             = qla82xx_pci_config,
1950         .reset_chip             = qla82xx_reset_chip,
1951         .chip_diag              = qla24xx_chip_diag,
1952         .config_rings           = qla82xx_config_rings,
1953         .reset_adapter          = qla24xx_reset_adapter,
1954         .nvram_config           = qla81xx_nvram_config,
1955         .update_fw_options      = qla24xx_update_fw_options,
1956         .load_risc              = qla82xx_load_risc,
1957         .pci_info_str           = qla24xx_pci_info_str,
1958         .fw_version_str         = qla24xx_fw_version_str,
1959         .intr_handler           = qla8044_intr_handler,
1960         .enable_intrs           = qla82xx_enable_intrs,
1961         .disable_intrs          = qla82xx_disable_intrs,
1962         .abort_command          = qla24xx_abort_command,
1963         .target_reset           = qla24xx_abort_target,
1964         .lun_reset              = qla24xx_lun_reset,
1965         .fabric_login           = qla24xx_login_fabric,
1966         .fabric_logout          = qla24xx_fabric_logout,
1967         .calc_req_entries       = NULL,
1968         .build_iocbs            = NULL,
1969         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1970         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1971         .read_nvram             = NULL,
1972         .write_nvram            = NULL,
1973         .fw_dump                = qla8044_fw_dump,
1974         .beacon_on              = qla82xx_beacon_on,
1975         .beacon_off             = qla82xx_beacon_off,
1976         .beacon_blink           = NULL,
1977         .read_optrom            = qla8044_read_optrom_data,
1978         .write_optrom           = qla8044_write_optrom_data,
1979         .get_flash_version      = qla82xx_get_flash_version,
1980         .start_scsi             = qla82xx_start_scsi,
1981         .abort_isp              = qla8044_abort_isp,
1982         .iospace_config         = qla82xx_iospace_config,
1983         .initialize_adapter     = qla2x00_initialize_adapter,
1984 };
1985
1986 static struct isp_operations qla83xx_isp_ops = {
1987         .pci_config             = qla25xx_pci_config,
1988         .reset_chip             = qla24xx_reset_chip,
1989         .chip_diag              = qla24xx_chip_diag,
1990         .config_rings           = qla24xx_config_rings,
1991         .reset_adapter          = qla24xx_reset_adapter,
1992         .nvram_config           = qla81xx_nvram_config,
1993         .update_fw_options      = qla81xx_update_fw_options,
1994         .load_risc              = qla81xx_load_risc,
1995         .pci_info_str           = qla24xx_pci_info_str,
1996         .fw_version_str         = qla24xx_fw_version_str,
1997         .intr_handler           = qla24xx_intr_handler,
1998         .enable_intrs           = qla24xx_enable_intrs,
1999         .disable_intrs          = qla24xx_disable_intrs,
2000         .abort_command          = qla24xx_abort_command,
2001         .target_reset           = qla24xx_abort_target,
2002         .lun_reset              = qla24xx_lun_reset,
2003         .fabric_login           = qla24xx_login_fabric,
2004         .fabric_logout          = qla24xx_fabric_logout,
2005         .calc_req_entries       = NULL,
2006         .build_iocbs            = NULL,
2007         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2008         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2009         .read_nvram             = NULL,
2010         .write_nvram            = NULL,
2011         .fw_dump                = qla83xx_fw_dump,
2012         .beacon_on              = qla24xx_beacon_on,
2013         .beacon_off             = qla24xx_beacon_off,
2014         .beacon_blink           = qla83xx_beacon_blink,
2015         .read_optrom            = qla25xx_read_optrom_data,
2016         .write_optrom           = qla24xx_write_optrom_data,
2017         .get_flash_version      = qla24xx_get_flash_version,
2018         .start_scsi             = qla24xx_dif_start_scsi,
2019         .abort_isp              = qla2x00_abort_isp,
2020         .iospace_config         = qla83xx_iospace_config,
2021         .initialize_adapter     = qla2x00_initialize_adapter,
2022 };
2023
2024 static struct isp_operations qlafx00_isp_ops = {
2025         .pci_config             = qlafx00_pci_config,
2026         .reset_chip             = qlafx00_soft_reset,
2027         .chip_diag              = qlafx00_chip_diag,
2028         .config_rings           = qlafx00_config_rings,
2029         .reset_adapter          = qlafx00_soft_reset,
2030         .nvram_config           = NULL,
2031         .update_fw_options      = NULL,
2032         .load_risc              = NULL,
2033         .pci_info_str           = qlafx00_pci_info_str,
2034         .fw_version_str         = qlafx00_fw_version_str,
2035         .intr_handler           = qlafx00_intr_handler,
2036         .enable_intrs           = qlafx00_enable_intrs,
2037         .disable_intrs          = qlafx00_disable_intrs,
2038         .abort_command          = qla24xx_async_abort_command,
2039         .target_reset           = qlafx00_abort_target,
2040         .lun_reset              = qlafx00_lun_reset,
2041         .fabric_login           = NULL,
2042         .fabric_logout          = NULL,
2043         .calc_req_entries       = NULL,
2044         .build_iocbs            = NULL,
2045         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2046         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2047         .read_nvram             = qla24xx_read_nvram_data,
2048         .write_nvram            = qla24xx_write_nvram_data,
2049         .fw_dump                = NULL,
2050         .beacon_on              = qla24xx_beacon_on,
2051         .beacon_off             = qla24xx_beacon_off,
2052         .beacon_blink           = NULL,
2053         .read_optrom            = qla24xx_read_optrom_data,
2054         .write_optrom           = qla24xx_write_optrom_data,
2055         .get_flash_version      = qla24xx_get_flash_version,
2056         .start_scsi             = qlafx00_start_scsi,
2057         .abort_isp              = qlafx00_abort_isp,
2058         .iospace_config         = qlafx00_iospace_config,
2059         .initialize_adapter     = qlafx00_initialize_adapter,
2060 };
2061
2062 static struct isp_operations qla27xx_isp_ops = {
2063         .pci_config             = qla25xx_pci_config,
2064         .reset_chip             = qla24xx_reset_chip,
2065         .chip_diag              = qla24xx_chip_diag,
2066         .config_rings           = qla24xx_config_rings,
2067         .reset_adapter          = qla24xx_reset_adapter,
2068         .nvram_config           = qla81xx_nvram_config,
2069         .update_fw_options      = qla81xx_update_fw_options,
2070         .load_risc              = qla81xx_load_risc,
2071         .pci_info_str           = qla24xx_pci_info_str,
2072         .fw_version_str         = qla24xx_fw_version_str,
2073         .intr_handler           = qla24xx_intr_handler,
2074         .enable_intrs           = qla24xx_enable_intrs,
2075         .disable_intrs          = qla24xx_disable_intrs,
2076         .abort_command          = qla24xx_abort_command,
2077         .target_reset           = qla24xx_abort_target,
2078         .lun_reset              = qla24xx_lun_reset,
2079         .fabric_login           = qla24xx_login_fabric,
2080         .fabric_logout          = qla24xx_fabric_logout,
2081         .calc_req_entries       = NULL,
2082         .build_iocbs            = NULL,
2083         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2084         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2085         .read_nvram             = NULL,
2086         .write_nvram            = NULL,
2087         .fw_dump                = qla27xx_fwdump,
2088         .beacon_on              = qla24xx_beacon_on,
2089         .beacon_off             = qla24xx_beacon_off,
2090         .beacon_blink           = qla83xx_beacon_blink,
2091         .read_optrom            = qla25xx_read_optrom_data,
2092         .write_optrom           = qla24xx_write_optrom_data,
2093         .get_flash_version      = qla24xx_get_flash_version,
2094         .start_scsi             = qla24xx_dif_start_scsi,
2095         .abort_isp              = qla2x00_abort_isp,
2096         .iospace_config         = qla83xx_iospace_config,
2097         .initialize_adapter     = qla2x00_initialize_adapter,
2098 };
2099
2100 static inline void
2101 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2102 {
2103         ha->device_type = DT_EXTENDED_IDS;
2104         switch (ha->pdev->device) {
2105         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2106                 ha->device_type |= DT_ISP2100;
2107                 ha->device_type &= ~DT_EXTENDED_IDS;
2108                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2109                 break;
2110         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2111                 ha->device_type |= DT_ISP2200;
2112                 ha->device_type &= ~DT_EXTENDED_IDS;
2113                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2114                 break;
2115         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2116                 ha->device_type |= DT_ISP2300;
2117                 ha->device_type |= DT_ZIO_SUPPORTED;
2118                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2119                 break;
2120         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2121                 ha->device_type |= DT_ISP2312;
2122                 ha->device_type |= DT_ZIO_SUPPORTED;
2123                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2124                 break;
2125         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2126                 ha->device_type |= DT_ISP2322;
2127                 ha->device_type |= DT_ZIO_SUPPORTED;
2128                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2129                     ha->pdev->subsystem_device == 0x0170)
2130                         ha->device_type |= DT_OEM_001;
2131                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2132                 break;
2133         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2134                 ha->device_type |= DT_ISP6312;
2135                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2136                 break;
2137         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2138                 ha->device_type |= DT_ISP6322;
2139                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2140                 break;
2141         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2142                 ha->device_type |= DT_ISP2422;
2143                 ha->device_type |= DT_ZIO_SUPPORTED;
2144                 ha->device_type |= DT_FWI2;
2145                 ha->device_type |= DT_IIDMA;
2146                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2147                 break;
2148         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2149                 ha->device_type |= DT_ISP2432;
2150                 ha->device_type |= DT_ZIO_SUPPORTED;
2151                 ha->device_type |= DT_FWI2;
2152                 ha->device_type |= DT_IIDMA;
2153                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2154                 break;
2155         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2156                 ha->device_type |= DT_ISP8432;
2157                 ha->device_type |= DT_ZIO_SUPPORTED;
2158                 ha->device_type |= DT_FWI2;
2159                 ha->device_type |= DT_IIDMA;
2160                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2161                 break;
2162         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2163                 ha->device_type |= DT_ISP5422;
2164                 ha->device_type |= DT_FWI2;
2165                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2166                 break;
2167         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2168                 ha->device_type |= DT_ISP5432;
2169                 ha->device_type |= DT_FWI2;
2170                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2171                 break;
2172         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2173                 ha->device_type |= DT_ISP2532;
2174                 ha->device_type |= DT_ZIO_SUPPORTED;
2175                 ha->device_type |= DT_FWI2;
2176                 ha->device_type |= DT_IIDMA;
2177                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2178                 break;
2179         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2180                 ha->device_type |= DT_ISP8001;
2181                 ha->device_type |= DT_ZIO_SUPPORTED;
2182                 ha->device_type |= DT_FWI2;
2183                 ha->device_type |= DT_IIDMA;
2184                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2185                 break;
2186         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2187                 ha->device_type |= DT_ISP8021;
2188                 ha->device_type |= DT_ZIO_SUPPORTED;
2189                 ha->device_type |= DT_FWI2;
2190                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2191                 /* Initialize 82XX ISP flags */
2192                 qla82xx_init_flags(ha);
2193                 break;
2194          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2195                 ha->device_type |= DT_ISP8044;
2196                 ha->device_type |= DT_ZIO_SUPPORTED;
2197                 ha->device_type |= DT_FWI2;
2198                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2199                 /* Initialize 82XX ISP flags */
2200                 qla82xx_init_flags(ha);
2201                 break;
2202         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2203                 ha->device_type |= DT_ISP2031;
2204                 ha->device_type |= DT_ZIO_SUPPORTED;
2205                 ha->device_type |= DT_FWI2;
2206                 ha->device_type |= DT_IIDMA;
2207                 ha->device_type |= DT_T10_PI;
2208                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2209                 break;
2210         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2211                 ha->device_type |= DT_ISP8031;
2212                 ha->device_type |= DT_ZIO_SUPPORTED;
2213                 ha->device_type |= DT_FWI2;
2214                 ha->device_type |= DT_IIDMA;
2215                 ha->device_type |= DT_T10_PI;
2216                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2217                 break;
2218         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2219                 ha->device_type |= DT_ISPFX00;
2220                 break;
2221         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2222                 ha->device_type |= DT_ISP2071;
2223                 ha->device_type |= DT_ZIO_SUPPORTED;
2224                 ha->device_type |= DT_FWI2;
2225                 ha->device_type |= DT_IIDMA;
2226                 ha->device_type |= DT_T10_PI;
2227                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2228                 break;
2229         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2230                 ha->device_type |= DT_ISP2271;
2231                 ha->device_type |= DT_ZIO_SUPPORTED;
2232                 ha->device_type |= DT_FWI2;
2233                 ha->device_type |= DT_IIDMA;
2234                 ha->device_type |= DT_T10_PI;
2235                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2236                 break;
2237         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2238                 ha->device_type |= DT_ISP2261;
2239                 ha->device_type |= DT_ZIO_SUPPORTED;
2240                 ha->device_type |= DT_FWI2;
2241                 ha->device_type |= DT_IIDMA;
2242                 ha->device_type |= DT_T10_PI;
2243                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2244                 break;
2245         }
2246
2247         if (IS_QLA82XX(ha))
2248                 ha->port_no = ha->portnum & 1;
2249         else {
2250                 /* Get adapter physical port no from interrupt pin register. */
2251                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2252                 if (IS_QLA27XX(ha))
2253                         ha->port_no--;
2254                 else
2255                         ha->port_no = !(ha->port_no & 1);
2256         }
2257
2258         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2259             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2260             ha->device_type, ha->port_no, ha->fw_srisc_address);
2261 }
2262
2263 static void
2264 qla2xxx_scan_start(struct Scsi_Host *shost)
2265 {
2266         scsi_qla_host_t *vha = shost_priv(shost);
2267
2268         if (vha->hw->flags.running_gold_fw)
2269                 return;
2270
2271         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2272         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2273         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2274         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2275 }
2276
2277 static int
2278 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2279 {
2280         scsi_qla_host_t *vha = shost_priv(shost);
2281
2282         if (!vha->host)
2283                 return 1;
2284         if (time > vha->hw->loop_reset_delay * HZ)
2285                 return 1;
2286
2287         return atomic_read(&vha->loop_state) == LOOP_READY;
2288 }
2289
2290 /*
2291  * PCI driver interface
2292  */
2293 static int
2294 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2295 {
2296         int     ret = -ENODEV;
2297         struct Scsi_Host *host;
2298         scsi_qla_host_t *base_vha = NULL;
2299         struct qla_hw_data *ha;
2300         char pci_info[30];
2301         char fw_str[30], wq_name[30];
2302         struct scsi_host_template *sht;
2303         int bars, mem_only = 0;
2304         uint16_t req_length = 0, rsp_length = 0;
2305         struct req_que *req = NULL;
2306         struct rsp_que *rsp = NULL;
2307         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2308         sht = &qla2xxx_driver_template;
2309         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2310             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2311             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2312             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2313             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2314             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2315             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2316             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2317             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2318             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2319             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2320             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2321             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2322             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2323             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2324                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2325                 mem_only = 1;
2326                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2327                     "Mem only adapter.\n");
2328         }
2329         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2330             "Bars=%d.\n", bars);
2331
2332         if (mem_only) {
2333                 if (pci_enable_device_mem(pdev))
2334                         goto probe_out;
2335         } else {
2336                 if (pci_enable_device(pdev))
2337                         goto probe_out;
2338         }
2339
2340         /* This may fail but that's ok */
2341         pci_enable_pcie_error_reporting(pdev);
2342
2343         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2344         if (!ha) {
2345                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2346                     "Unable to allocate memory for ha.\n");
2347                 goto probe_out;
2348         }
2349         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2350             "Memory allocated for ha=%p.\n", ha);
2351         ha->pdev = pdev;
2352         ha->tgt.enable_class_2 = ql2xenableclass2;
2353         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2354         spin_lock_init(&ha->tgt.q_full_lock);
2355         spin_lock_init(&ha->tgt.sess_lock);
2356         spin_lock_init(&ha->tgt.atio_lock);
2357
2358
2359         /* Clear our data area */
2360         ha->bars = bars;
2361         ha->mem_only = mem_only;
2362         spin_lock_init(&ha->hardware_lock);
2363         spin_lock_init(&ha->vport_slock);
2364         mutex_init(&ha->selflogin_lock);
2365         mutex_init(&ha->optrom_mutex);
2366
2367         /* Set ISP-type information. */
2368         qla2x00_set_isp_flags(ha);
2369
2370         /* Set EEH reset type to fundamental if required by hba */
2371         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2372             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2373                 pdev->needs_freset = 1;
2374
2375         ha->prev_topology = 0;
2376         ha->init_cb_size = sizeof(init_cb_t);
2377         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2378         ha->optrom_size = OPTROM_SIZE_2300;
2379
2380         /* Assign ISP specific operations. */
2381         if (IS_QLA2100(ha)) {
2382                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2383                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2384                 req_length = REQUEST_ENTRY_CNT_2100;
2385                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2386                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2387                 ha->gid_list_info_size = 4;
2388                 ha->flash_conf_off = ~0;
2389                 ha->flash_data_off = ~0;
2390                 ha->nvram_conf_off = ~0;
2391                 ha->nvram_data_off = ~0;
2392                 ha->isp_ops = &qla2100_isp_ops;
2393         } else if (IS_QLA2200(ha)) {
2394                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2395                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2396                 req_length = REQUEST_ENTRY_CNT_2200;
2397                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2398                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2399                 ha->gid_list_info_size = 4;
2400                 ha->flash_conf_off = ~0;
2401                 ha->flash_data_off = ~0;
2402                 ha->nvram_conf_off = ~0;
2403                 ha->nvram_data_off = ~0;
2404                 ha->isp_ops = &qla2100_isp_ops;
2405         } else if (IS_QLA23XX(ha)) {
2406                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2407                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2408                 req_length = REQUEST_ENTRY_CNT_2200;
2409                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2410                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2411                 ha->gid_list_info_size = 6;
2412                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2413                         ha->optrom_size = OPTROM_SIZE_2322;
2414                 ha->flash_conf_off = ~0;
2415                 ha->flash_data_off = ~0;
2416                 ha->nvram_conf_off = ~0;
2417                 ha->nvram_data_off = ~0;
2418                 ha->isp_ops = &qla2300_isp_ops;
2419         } else if (IS_QLA24XX_TYPE(ha)) {
2420                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2421                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2422                 req_length = REQUEST_ENTRY_CNT_24XX;
2423                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2424                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2425                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2426                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2427                 ha->gid_list_info_size = 8;
2428                 ha->optrom_size = OPTROM_SIZE_24XX;
2429                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2430                 ha->isp_ops = &qla24xx_isp_ops;
2431                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2432                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2433                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2434                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2435         } else if (IS_QLA25XX(ha)) {
2436                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2437                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2438                 req_length = REQUEST_ENTRY_CNT_24XX;
2439                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2440                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2441                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2442                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2443                 ha->gid_list_info_size = 8;
2444                 ha->optrom_size = OPTROM_SIZE_25XX;
2445                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2446                 ha->isp_ops = &qla25xx_isp_ops;
2447                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2448                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2449                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2450                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2451         } else if (IS_QLA81XX(ha)) {
2452                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2453                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2454                 req_length = REQUEST_ENTRY_CNT_24XX;
2455                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2456                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2457                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2458                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2459                 ha->gid_list_info_size = 8;
2460                 ha->optrom_size = OPTROM_SIZE_81XX;
2461                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2462                 ha->isp_ops = &qla81xx_isp_ops;
2463                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2464                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2465                 ha->nvram_conf_off = ~0;
2466                 ha->nvram_data_off = ~0;
2467         } else if (IS_QLA82XX(ha)) {
2468                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2469                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2470                 req_length = REQUEST_ENTRY_CNT_82XX;
2471                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2472                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2473                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2474                 ha->gid_list_info_size = 8;
2475                 ha->optrom_size = OPTROM_SIZE_82XX;
2476                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2477                 ha->isp_ops = &qla82xx_isp_ops;
2478                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2479                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2480                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2481                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2482         } else if (IS_QLA8044(ha)) {
2483                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2484                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2485                 req_length = REQUEST_ENTRY_CNT_82XX;
2486                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2487                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2488                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2489                 ha->gid_list_info_size = 8;
2490                 ha->optrom_size = OPTROM_SIZE_83XX;
2491                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2492                 ha->isp_ops = &qla8044_isp_ops;
2493                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2494                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2495                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2496                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2497         } else if (IS_QLA83XX(ha)) {
2498                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2499                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2500                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2501                 req_length = REQUEST_ENTRY_CNT_83XX;
2502                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2503                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2504                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2505                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2506                 ha->gid_list_info_size = 8;
2507                 ha->optrom_size = OPTROM_SIZE_83XX;
2508                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2509                 ha->isp_ops = &qla83xx_isp_ops;
2510                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2511                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2512                 ha->nvram_conf_off = ~0;
2513                 ha->nvram_data_off = ~0;
2514         }  else if (IS_QLAFX00(ha)) {
2515                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2516                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2517                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2518                 req_length = REQUEST_ENTRY_CNT_FX00;
2519                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2520                 ha->isp_ops = &qlafx00_isp_ops;
2521                 ha->port_down_retry_count = 30; /* default value */
2522                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2523                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2524                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2525                 ha->mr.fw_hbt_en = 1;
2526                 ha->mr.host_info_resend = false;
2527                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2528         } else if (IS_QLA27XX(ha)) {
2529                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2530                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2531                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2532                 req_length = REQUEST_ENTRY_CNT_83XX;
2533                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2534                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2535                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2536                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2537                 ha->gid_list_info_size = 8;
2538                 ha->optrom_size = OPTROM_SIZE_83XX;
2539                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2540                 ha->isp_ops = &qla27xx_isp_ops;
2541                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2542                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2543                 ha->nvram_conf_off = ~0;
2544                 ha->nvram_data_off = ~0;
2545         }
2546
2547         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2548             "mbx_count=%d, req_length=%d, "
2549             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2550             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2551             "max_fibre_devices=%d.\n",
2552             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2553             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2554             ha->nvram_npiv_size, ha->max_fibre_devices);
2555         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2556             "isp_ops=%p, flash_conf_off=%d, "
2557             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2558             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2559             ha->nvram_conf_off, ha->nvram_data_off);
2560
2561         /* Configure PCI I/O space */
2562         ret = ha->isp_ops->iospace_config(ha);
2563         if (ret)
2564                 goto iospace_config_failed;
2565
2566         ql_log_pci(ql_log_info, pdev, 0x001d,
2567             "Found an ISP%04X irq %d iobase 0x%p.\n",
2568             pdev->device, pdev->irq, ha->iobase);
2569         mutex_init(&ha->vport_lock);
2570         init_completion(&ha->mbx_cmd_comp);
2571         complete(&ha->mbx_cmd_comp);
2572         init_completion(&ha->mbx_intr_comp);
2573         init_completion(&ha->dcbx_comp);
2574         init_completion(&ha->lb_portup_comp);
2575
2576         set_bit(0, (unsigned long *) ha->vp_idx_map);
2577
2578         qla2x00_config_dma_addressing(ha);
2579         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2580             "64 Bit addressing is %s.\n",
2581             ha->flags.enable_64bit_addressing ? "enable" :
2582             "disable");
2583         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2584         if (ret) {
2585                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2586                     "Failed to allocate memory for adapter, aborting.\n");
2587
2588                 goto probe_hw_failed;
2589         }
2590
2591         req->max_q_depth = MAX_Q_DEPTH;
2592         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2593                 req->max_q_depth = ql2xmaxqdepth;
2594
2595
2596         base_vha = qla2x00_create_host(sht, ha);
2597         if (!base_vha) {
2598                 ret = -ENOMEM;
2599                 qla2x00_mem_free(ha);
2600                 qla2x00_free_req_que(ha, req);
2601                 qla2x00_free_rsp_que(ha, rsp);
2602                 goto probe_hw_failed;
2603         }
2604
2605         pci_set_drvdata(pdev, base_vha);
2606         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2607
2608         host = base_vha->host;
2609         base_vha->req = req;
2610         if (IS_QLA2XXX_MIDTYPE(ha))
2611                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2612         else
2613                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2614                                                 base_vha->vp_idx;
2615
2616         /* Setup fcport template structure. */
2617         ha->mr.fcport.vha = base_vha;
2618         ha->mr.fcport.port_type = FCT_UNKNOWN;
2619         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2620         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2621         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2622         ha->mr.fcport.scan_state = 1;
2623
2624         /* Set the SG table size based on ISP type */
2625         if (!IS_FWI2_CAPABLE(ha)) {
2626                 if (IS_QLA2100(ha))
2627                         host->sg_tablesize = 32;
2628         } else {
2629                 if (!IS_QLA82XX(ha))
2630                         host->sg_tablesize = QLA_SG_ALL;
2631         }
2632         host->max_id = ha->max_fibre_devices;
2633         host->cmd_per_lun = 3;
2634         host->unique_id = host->host_no;
2635         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2636                 host->max_cmd_len = 32;
2637         else
2638                 host->max_cmd_len = MAX_CMDSZ;
2639         host->max_channel = MAX_BUSES - 1;
2640         /* Older HBAs support only 16-bit LUNs */
2641         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2642             ql2xmaxlun > 0xffff)
2643                 host->max_lun = 0xffff;
2644         else
2645                 host->max_lun = ql2xmaxlun;
2646         host->transportt = qla2xxx_transport_template;
2647         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2648
2649         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2650             "max_id=%d this_id=%d "
2651             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2652             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2653             host->this_id, host->cmd_per_lun, host->unique_id,
2654             host->max_cmd_len, host->max_channel, host->max_lun,
2655             host->transportt, sht->vendor_id);
2656
2657 que_init:
2658         /* Alloc arrays of request and response ring ptrs */
2659         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2660                 ql_log(ql_log_fatal, base_vha, 0x003d,
2661                     "Failed to allocate memory for queue pointers..."
2662                     "aborting.\n");
2663                 goto probe_init_failed;
2664         }
2665
2666         qlt_probe_one_stage1(base_vha, ha);
2667
2668         /* Set up the irqs */
2669         ret = qla2x00_request_irqs(ha, rsp);
2670         if (ret)
2671                 goto probe_init_failed;
2672
2673         pci_save_state(pdev);
2674
2675         /* Assign back pointers */
2676         rsp->req = req;
2677         req->rsp = rsp;
2678
2679         if (IS_QLAFX00(ha)) {
2680                 ha->rsp_q_map[0] = rsp;
2681                 ha->req_q_map[0] = req;
2682                 set_bit(0, ha->req_qid_map);
2683                 set_bit(0, ha->rsp_qid_map);
2684         }
2685
2686         /* FWI2-capable only. */
2687         req->req_q_in = &ha->iobase->isp24.req_q_in;
2688         req->req_q_out = &ha->iobase->isp24.req_q_out;
2689         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2690         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2691         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2692                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2693                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2694                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2695                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2696         }
2697
2698         if (IS_QLAFX00(ha)) {
2699                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2700                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2701                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2702                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2703         }
2704
2705         if (IS_P3P_TYPE(ha)) {
2706                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2707                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2708                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2709         }
2710
2711         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2712             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2713             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2714         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2715             "req->req_q_in=%p req->req_q_out=%p "
2716             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2717             req->req_q_in, req->req_q_out,
2718             rsp->rsp_q_in, rsp->rsp_q_out);
2719         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2720             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2721             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2722         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2723             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2724             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2725
2726         if (ha->isp_ops->initialize_adapter(base_vha)) {
2727                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2728                     "Failed to initialize adapter - Adapter flags %x.\n",
2729                     base_vha->device_flags);
2730
2731                 if (IS_QLA82XX(ha)) {
2732                         qla82xx_idc_lock(ha);
2733                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2734                                 QLA8XXX_DEV_FAILED);
2735                         qla82xx_idc_unlock(ha);
2736                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2737                             "HW State: FAILED.\n");
2738                 } else if (IS_QLA8044(ha)) {
2739                         qla8044_idc_lock(ha);
2740                         qla8044_wr_direct(base_vha,
2741                                 QLA8044_CRB_DEV_STATE_INDEX,
2742                                 QLA8XXX_DEV_FAILED);
2743                         qla8044_idc_unlock(ha);
2744                         ql_log(ql_log_fatal, base_vha, 0x0150,
2745                             "HW State: FAILED.\n");
2746                 }
2747
2748                 ret = -ENODEV;
2749                 goto probe_failed;
2750         }
2751
2752         if (IS_QLAFX00(ha))
2753                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2754         else
2755                 host->can_queue = req->num_outstanding_cmds - 10;
2756
2757         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2758             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2759             host->can_queue, base_vha->req,
2760             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2761
2762         if (ha->mqenable) {
2763                 if (qla25xx_setup_mode(base_vha)) {
2764                         ql_log(ql_log_warn, base_vha, 0x00ec,
2765                             "Failed to create queues, falling back to single queue mode.\n");
2766                         goto que_init;
2767                 }
2768         }
2769
2770         if (ha->flags.running_gold_fw)
2771                 goto skip_dpc;
2772
2773         /*
2774          * Startup the kernel thread for this host adapter
2775          */
2776         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2777             "%s_dpc", base_vha->host_str);
2778         if (IS_ERR(ha->dpc_thread)) {
2779                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2780                     "Failed to start DPC thread.\n");
2781                 ret = PTR_ERR(ha->dpc_thread);
2782                 goto probe_failed;
2783         }
2784         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2785             "DPC thread started successfully.\n");
2786
2787         /*
2788          * If we're not coming up in initiator mode, we might sit for
2789          * a while without waking up the dpc thread, which leads to a
2790          * stuck process warning.  So just kick the dpc once here and
2791          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2792          */
2793         qla2xxx_wake_dpc(base_vha);
2794
2795         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2796
2797         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2798                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2799                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2800                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2801
2802                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2803                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2804                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2805                 INIT_WORK(&ha->idc_state_handler,
2806                     qla83xx_idc_state_handler_work);
2807                 INIT_WORK(&ha->nic_core_unrecoverable,
2808                     qla83xx_nic_core_unrecoverable_work);
2809         }
2810
2811 skip_dpc:
2812         list_add_tail(&base_vha->list, &ha->vp_list);
2813         base_vha->host->irq = ha->pdev->irq;
2814
2815         /* Initialized the timer */
2816         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2817         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2818             "Started qla2x00_timer with "
2819             "interval=%d.\n", WATCH_INTERVAL);
2820         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2821             "Detected hba at address=%p.\n",
2822             ha);
2823
2824         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2825                 if (ha->fw_attributes & BIT_4) {
2826                         int prot = 0, guard;
2827                         base_vha->flags.difdix_supported = 1;
2828                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2829                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2830                         if (ql2xenabledif == 1)
2831                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2832                         scsi_host_set_prot(host,
2833                             prot | SHOST_DIF_TYPE1_PROTECTION
2834                             | SHOST_DIF_TYPE2_PROTECTION
2835                             | SHOST_DIF_TYPE3_PROTECTION
2836                             | SHOST_DIX_TYPE1_PROTECTION
2837                             | SHOST_DIX_TYPE2_PROTECTION
2838                             | SHOST_DIX_TYPE3_PROTECTION);
2839
2840                         guard = SHOST_DIX_GUARD_CRC;
2841
2842                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2843                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2844                                 guard |= SHOST_DIX_GUARD_IP;
2845
2846                         scsi_host_set_guard(host, guard);
2847                 } else
2848                         base_vha->flags.difdix_supported = 0;
2849         }
2850
2851         ha->isp_ops->enable_intrs(ha);
2852
2853         if (IS_QLAFX00(ha)) {
2854                 ret = qlafx00_fx_disc(base_vha,
2855                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2856                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2857                     QLA_SG_ALL : 128;
2858         }
2859
2860         ret = scsi_add_host(host, &pdev->dev);
2861         if (ret)
2862                 goto probe_failed;
2863
2864         base_vha->flags.init_done = 1;
2865         base_vha->flags.online = 1;
2866         ha->prev_minidump_failed = 0;
2867
2868         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2869             "Init done and hba is online.\n");
2870
2871         if (qla_ini_mode_enabled(base_vha))
2872                 scsi_scan_host(host);
2873         else
2874                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2875                         "skipping scsi_scan_host() for non-initiator port\n");
2876
2877         qla2x00_alloc_sysfs_attr(base_vha);
2878
2879         if (IS_QLAFX00(ha)) {
2880                 ret = qlafx00_fx_disc(base_vha,
2881                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2882
2883                 /* Register system information */
2884                 ret =  qlafx00_fx_disc(base_vha,
2885                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2886         }
2887
2888         qla2x00_init_host_attr(base_vha);
2889
2890         qla2x00_dfs_setup(base_vha);
2891
2892         ql_log(ql_log_info, base_vha, 0x00fb,
2893             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2894         ql_log(ql_log_info, base_vha, 0x00fc,
2895             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2896             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2897             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2898             base_vha->host_no,
2899             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
2900
2901         qlt_add_target(ha, base_vha);
2902
2903         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2904         return 0;
2905
2906 probe_init_failed:
2907         qla2x00_free_req_que(ha, req);
2908         ha->req_q_map[0] = NULL;
2909         clear_bit(0, ha->req_qid_map);
2910         qla2x00_free_rsp_que(ha, rsp);
2911         ha->rsp_q_map[0] = NULL;
2912         clear_bit(0, ha->rsp_qid_map);
2913         ha->max_req_queues = ha->max_rsp_queues = 0;
2914
2915 probe_failed:
2916         if (base_vha->timer_active)
2917                 qla2x00_stop_timer(base_vha);
2918         base_vha->flags.online = 0;
2919         if (ha->dpc_thread) {
2920                 struct task_struct *t = ha->dpc_thread;
2921
2922                 ha->dpc_thread = NULL;
2923                 kthread_stop(t);
2924         }
2925
2926         qla2x00_free_device(base_vha);
2927
2928         scsi_host_put(base_vha->host);
2929
2930 probe_hw_failed:
2931         qla2x00_clear_drv_active(ha);
2932
2933 iospace_config_failed:
2934         if (IS_P3P_TYPE(ha)) {
2935                 if (!ha->nx_pcibase)
2936                         iounmap((device_reg_t *)ha->nx_pcibase);
2937                 if (!ql2xdbwr)
2938                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2939         } else {
2940                 if (ha->iobase)
2941                         iounmap(ha->iobase);
2942                 if (ha->cregbase)
2943                         iounmap(ha->cregbase);
2944         }
2945         pci_release_selected_regions(ha->pdev, ha->bars);
2946         kfree(ha);
2947         ha = NULL;
2948
2949 probe_out:
2950         pci_disable_device(pdev);
2951         return ret;
2952 }
2953
2954 static void
2955 qla2x00_shutdown(struct pci_dev *pdev)
2956 {
2957         scsi_qla_host_t *vha;
2958         struct qla_hw_data  *ha;
2959
2960         if (!atomic_read(&pdev->enable_cnt))
2961                 return;
2962
2963         vha = pci_get_drvdata(pdev);
2964         ha = vha->hw;
2965
2966         /* Notify ISPFX00 firmware */
2967         if (IS_QLAFX00(ha))
2968                 qlafx00_driver_shutdown(vha, 20);
2969
2970         /* Turn-off FCE trace */
2971         if (ha->flags.fce_enabled) {
2972                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2973                 ha->flags.fce_enabled = 0;
2974         }
2975
2976         /* Turn-off EFT trace */
2977         if (ha->eft)
2978                 qla2x00_disable_eft_trace(vha);
2979
2980         /* Stop currently executing firmware. */
2981         qla2x00_try_to_stop_firmware(vha);
2982
2983         /* Turn adapter off line */
2984         vha->flags.online = 0;
2985
2986         /* turn-off interrupts on the card */
2987         if (ha->interrupts_on) {
2988                 vha->flags.init_done = 0;
2989                 ha->isp_ops->disable_intrs(ha);
2990         }
2991
2992         qla2x00_free_irqs(vha);
2993
2994         qla2x00_free_fw_dump(ha);
2995
2996         pci_disable_pcie_error_reporting(pdev);
2997         pci_disable_device(pdev);
2998 }
2999
3000 /* Deletes all the virtual ports for a given ha */
3001 static void
3002 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3003 {
3004         scsi_qla_host_t *vha;
3005         unsigned long flags;
3006
3007         mutex_lock(&ha->vport_lock);
3008         while (ha->cur_vport_count) {
3009                 spin_lock_irqsave(&ha->vport_slock, flags);
3010
3011                 BUG_ON(base_vha->list.next == &ha->vp_list);
3012                 /* This assumes first entry in ha->vp_list is always base vha */
3013                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3014                 scsi_host_get(vha->host);
3015
3016                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3017                 mutex_unlock(&ha->vport_lock);
3018
3019                 fc_vport_terminate(vha->fc_vport);
3020                 scsi_host_put(vha->host);
3021
3022                 mutex_lock(&ha->vport_lock);
3023         }
3024         mutex_unlock(&ha->vport_lock);
3025 }
3026
3027 /* Stops all deferred work threads */
3028 static void
3029 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3030 {
3031         /* Flush the work queue and remove it */
3032         if (ha->wq) {
3033                 flush_workqueue(ha->wq);
3034                 destroy_workqueue(ha->wq);
3035                 ha->wq = NULL;
3036         }
3037
3038         /* Cancel all work and destroy DPC workqueues */
3039         if (ha->dpc_lp_wq) {
3040                 cancel_work_sync(&ha->idc_aen);
3041                 destroy_workqueue(ha->dpc_lp_wq);
3042                 ha->dpc_lp_wq = NULL;
3043         }
3044
3045         if (ha->dpc_hp_wq) {
3046                 cancel_work_sync(&ha->nic_core_reset);
3047                 cancel_work_sync(&ha->idc_state_handler);
3048                 cancel_work_sync(&ha->nic_core_unrecoverable);
3049                 destroy_workqueue(ha->dpc_hp_wq);
3050                 ha->dpc_hp_wq = NULL;
3051         }
3052
3053         /* Kill the kernel thread for this host */
3054         if (ha->dpc_thread) {
3055                 struct task_struct *t = ha->dpc_thread;
3056
3057                 /*
3058                  * qla2xxx_wake_dpc checks for ->dpc_thread
3059                  * so we need to zero it out.
3060                  */
3061                 ha->dpc_thread = NULL;
3062                 kthread_stop(t);
3063         }
3064 }
3065
3066 static void
3067 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3068 {
3069         if (IS_QLA82XX(ha)) {
3070
3071                 iounmap((device_reg_t *)ha->nx_pcibase);
3072                 if (!ql2xdbwr)
3073                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3074         } else {
3075                 if (ha->iobase)
3076                         iounmap(ha->iobase);
3077
3078                 if (ha->cregbase)
3079                         iounmap(ha->cregbase);
3080
3081                 if (ha->mqiobase)
3082                         iounmap(ha->mqiobase);
3083
3084                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3085                         iounmap(ha->msixbase);
3086         }
3087 }
3088
3089 static void
3090 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3091 {
3092         if (IS_QLA8044(ha)) {
3093                 qla8044_idc_lock(ha);
3094                 qla8044_clear_drv_active(ha);
3095                 qla8044_idc_unlock(ha);
3096         } else if (IS_QLA82XX(ha)) {
3097                 qla82xx_idc_lock(ha);
3098                 qla82xx_clear_drv_active(ha);
3099                 qla82xx_idc_unlock(ha);
3100         }
3101 }
3102
3103 static void
3104 qla2x00_remove_one(struct pci_dev *pdev)
3105 {
3106         scsi_qla_host_t *base_vha;
3107         struct qla_hw_data  *ha;
3108
3109         base_vha = pci_get_drvdata(pdev);
3110         ha = base_vha->hw;
3111
3112         /* Indicate device removal to prevent future board_disable and wait
3113          * until any pending board_disable has completed. */
3114         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3115         cancel_work_sync(&ha->board_disable);
3116
3117         /*
3118          * If the PCI device is disabled then there was a PCI-disconnect and
3119          * qla2x00_disable_board_on_pci_error has taken care of most of the
3120          * resources.
3121          */
3122         if (!atomic_read(&pdev->enable_cnt)) {
3123                 scsi_host_put(base_vha->host);
3124                 kfree(ha);
3125                 pci_set_drvdata(pdev, NULL);
3126                 return;
3127         }
3128
3129         qla2x00_wait_for_hba_ready(base_vha);
3130
3131         set_bit(UNLOADING, &base_vha->dpc_flags);
3132
3133         if (IS_QLAFX00(ha))
3134                 qlafx00_driver_shutdown(base_vha, 20);
3135
3136         qla2x00_delete_all_vps(ha, base_vha);
3137
3138         if (IS_QLA8031(ha)) {
3139                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3140                     "Clearing fcoe driver presence.\n");
3141                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3142                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3143                             "Error while clearing DRV-Presence.\n");
3144         }
3145
3146         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3147
3148         qla2x00_dfs_remove(base_vha);
3149
3150         qla84xx_put_chip(base_vha);
3151
3152         /* Laser should be disabled only for ISP2031 */
3153         if (IS_QLA2031(ha))
3154                 qla83xx_disable_laser(base_vha);
3155
3156         /* Disable timer */
3157         if (base_vha->timer_active)
3158                 qla2x00_stop_timer(base_vha);
3159
3160         base_vha->flags.online = 0;
3161
3162         /* free DMA memory */
3163         if (ha->exlogin_buf)
3164                 qla2x00_free_exlogin_buffer(ha);
3165
3166         /* free DMA memory */
3167         if (ha->exchoffld_buf)
3168                 qla2x00_free_exchoffld_buffer(ha);
3169
3170         qla2x00_destroy_deferred_work(ha);
3171
3172         qlt_remove_target(ha, base_vha);
3173
3174         qla2x00_free_sysfs_attr(base_vha, true);
3175
3176         fc_remove_host(base_vha->host);
3177
3178         scsi_remove_host(base_vha->host);
3179
3180         qla2x00_free_device(base_vha);
3181
3182         qla2x00_clear_drv_active(ha);
3183
3184         scsi_host_put(base_vha->host);
3185
3186         qla2x00_unmap_iobases(ha);
3187
3188         pci_release_selected_regions(ha->pdev, ha->bars);
3189         kfree(ha);
3190         ha = NULL;
3191
3192         pci_disable_pcie_error_reporting(pdev);
3193
3194         pci_disable_device(pdev);
3195 }
3196
3197 static void
3198 qla2x00_free_device(scsi_qla_host_t *vha)
3199 {
3200         struct qla_hw_data *ha = vha->hw;
3201
3202         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3203
3204         /* Disable timer */
3205         if (vha->timer_active)
3206                 qla2x00_stop_timer(vha);
3207
3208         qla25xx_delete_queues(vha);
3209
3210         if (ha->flags.fce_enabled)
3211                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3212
3213         if (ha->eft)
3214                 qla2x00_disable_eft_trace(vha);
3215
3216         /* Stop currently executing firmware. */
3217         qla2x00_try_to_stop_firmware(vha);
3218
3219         vha->flags.online = 0;
3220
3221         /* turn-off interrupts on the card */
3222         if (ha->interrupts_on) {
3223                 vha->flags.init_done = 0;
3224                 ha->isp_ops->disable_intrs(ha);
3225         }
3226
3227         qla2x00_free_irqs(vha);
3228
3229         qla2x00_free_fcports(vha);
3230
3231         qla2x00_mem_free(ha);
3232
3233         qla82xx_md_free(vha);
3234
3235         qla2x00_free_queues(ha);
3236 }
3237
3238 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3239 {
3240         fc_port_t *fcport, *tfcport;
3241
3242         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3243                 list_del(&fcport->list);
3244                 qla2x00_clear_loop_id(fcport);
3245                 kfree(fcport);
3246                 fcport = NULL;
3247         }
3248 }
3249
3250 static inline void
3251 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3252     int defer)
3253 {
3254         struct fc_rport *rport;
3255         scsi_qla_host_t *base_vha;
3256         unsigned long flags;
3257
3258         if (!fcport->rport)
3259                 return;
3260
3261         rport = fcport->rport;
3262         if (defer) {
3263                 base_vha = pci_get_drvdata(vha->hw->pdev);
3264                 spin_lock_irqsave(vha->host->host_lock, flags);
3265                 fcport->drport = rport;
3266                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3267                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3268                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3269                 qla2xxx_wake_dpc(base_vha);
3270         } else {
3271                 int now;
3272                 if (rport)
3273                         fc_remote_port_delete(rport);
3274                 qlt_do_generation_tick(vha, &now);
3275                 qlt_fc_port_deleted(vha, fcport, now);
3276         }
3277 }
3278
3279 /*
3280  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3281  *
3282  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3283  *
3284  * Return: None.
3285  *
3286  * Context:
3287  */
3288 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3289     int do_login, int defer)
3290 {
3291         if (IS_QLAFX00(vha->hw)) {
3292                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3293                 qla2x00_schedule_rport_del(vha, fcport, defer);
3294                 return;
3295         }
3296
3297         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3298             vha->vp_idx == fcport->vha->vp_idx) {
3299                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3300                 qla2x00_schedule_rport_del(vha, fcport, defer);
3301         }
3302         /*
3303          * We may need to retry the login, so don't change the state of the
3304          * port but do the retries.
3305          */
3306         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3307                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3308
3309         if (!do_login)
3310                 return;
3311
3312         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3313
3314         if (fcport->login_retry == 0) {
3315                 fcport->login_retry = vha->hw->login_retry_count;
3316
3317                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3318                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3319                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3320         }
3321 }
3322
3323 /*
3324  * qla2x00_mark_all_devices_lost
3325  *      Updates fcport state when device goes offline.
3326  *
3327  * Input:
3328  *      ha = adapter block pointer.
3329  *      fcport = port structure pointer.
3330  *
3331  * Return:
3332  *      None.
3333  *
3334  * Context:
3335  */
3336 void
3337 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3338 {
3339         fc_port_t *fcport;
3340
3341         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3342                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3343                         continue;
3344
3345                 /*
3346                  * No point in marking the device as lost, if the device is
3347                  * already DEAD.
3348                  */
3349                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3350                         continue;
3351                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3352                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3353                         if (defer)
3354                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3355                         else if (vha->vp_idx == fcport->vha->vp_idx)
3356                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3357                 }
3358         }
3359 }
3360
3361 /*
3362 * qla2x00_mem_alloc
3363 *      Allocates adapter memory.
3364 *
3365 * Returns:
3366 *      0  = success.
3367 *      !0  = failure.
3368 */
3369 static int
3370 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3371         struct req_que **req, struct rsp_que **rsp)
3372 {
3373         char    name[16];
3374
3375         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3376                 &ha->init_cb_dma, GFP_KERNEL);
3377         if (!ha->init_cb)
3378                 goto fail;
3379
3380         if (qlt_mem_alloc(ha) < 0)
3381                 goto fail_free_init_cb;
3382
3383         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3384                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3385         if (!ha->gid_list)
3386                 goto fail_free_tgt_mem;
3387
3388         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3389         if (!ha->srb_mempool)
3390                 goto fail_free_gid_list;
3391
3392         if (IS_P3P_TYPE(ha)) {
3393                 /* Allocate cache for CT6 Ctx. */
3394                 if (!ctx_cachep) {
3395                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3396                                 sizeof(struct ct6_dsd), 0,
3397                                 SLAB_HWCACHE_ALIGN, NULL);
3398                         if (!ctx_cachep)
3399                                 goto fail_free_gid_list;
3400                 }
3401                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3402                         ctx_cachep);
3403                 if (!ha->ctx_mempool)
3404                         goto fail_free_srb_mempool;
3405                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3406                     "ctx_cachep=%p ctx_mempool=%p.\n",
3407                     ctx_cachep, ha->ctx_mempool);
3408         }
3409
3410         /* Get memory for cached NVRAM */
3411         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3412         if (!ha->nvram)
3413                 goto fail_free_ctx_mempool;
3414
3415         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3416                 ha->pdev->device);
3417         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3418                 DMA_POOL_SIZE, 8, 0);
3419         if (!ha->s_dma_pool)
3420                 goto fail_free_nvram;
3421
3422         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3423             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3424             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3425
3426         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3427                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3428                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3429                 if (!ha->dl_dma_pool) {
3430                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3431                             "Failed to allocate memory for dl_dma_pool.\n");
3432                         goto fail_s_dma_pool;
3433                 }
3434
3435                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3436                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3437                 if (!ha->fcp_cmnd_dma_pool) {
3438                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3439                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3440                         goto fail_dl_dma_pool;
3441                 }
3442                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3443                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3444                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3445         }
3446
3447         /* Allocate memory for SNS commands */
3448         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3449         /* Get consistent memory allocated for SNS commands */
3450                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3451                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3452                 if (!ha->sns_cmd)
3453                         goto fail_dma_pool;
3454                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3455                     "sns_cmd: %p.\n", ha->sns_cmd);
3456         } else {
3457         /* Get consistent memory allocated for MS IOCB */
3458                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3459                         &ha->ms_iocb_dma);
3460                 if (!ha->ms_iocb)
3461                         goto fail_dma_pool;
3462         /* Get consistent memory allocated for CT SNS commands */
3463                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3464                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3465                 if (!ha->ct_sns)
3466                         goto fail_free_ms_iocb;
3467                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3468                     "ms_iocb=%p ct_sns=%p.\n",
3469                     ha->ms_iocb, ha->ct_sns);
3470         }
3471
3472         /* Allocate memory for request ring */
3473         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3474         if (!*req) {
3475                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3476                     "Failed to allocate memory for req.\n");
3477                 goto fail_req;
3478         }
3479         (*req)->length = req_len;
3480         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3481                 ((*req)->length + 1) * sizeof(request_t),
3482                 &(*req)->dma, GFP_KERNEL);
3483         if (!(*req)->ring) {
3484                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3485                     "Failed to allocate memory for req_ring.\n");
3486                 goto fail_req_ring;
3487         }
3488         /* Allocate memory for response ring */
3489         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3490         if (!*rsp) {
3491                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3492                     "Failed to allocate memory for rsp.\n");
3493                 goto fail_rsp;
3494         }
3495         (*rsp)->hw = ha;
3496         (*rsp)->length = rsp_len;
3497         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3498                 ((*rsp)->length + 1) * sizeof(response_t),
3499                 &(*rsp)->dma, GFP_KERNEL);
3500         if (!(*rsp)->ring) {
3501                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3502                     "Failed to allocate memory for rsp_ring.\n");
3503                 goto fail_rsp_ring;
3504         }
3505         (*req)->rsp = *rsp;
3506         (*rsp)->req = *req;
3507         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3508             "req=%p req->length=%d req->ring=%p rsp=%p "
3509             "rsp->length=%d rsp->ring=%p.\n",
3510             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3511             (*rsp)->ring);
3512         /* Allocate memory for NVRAM data for vports */
3513         if (ha->nvram_npiv_size) {
3514                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3515                     ha->nvram_npiv_size, GFP_KERNEL);
3516                 if (!ha->npiv_info) {
3517                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3518                             "Failed to allocate memory for npiv_info.\n");
3519                         goto fail_npiv_info;
3520                 }
3521         } else
3522                 ha->npiv_info = NULL;
3523
3524         /* Get consistent memory allocated for EX-INIT-CB. */
3525         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3526                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3527                     &ha->ex_init_cb_dma);
3528                 if (!ha->ex_init_cb)
3529                         goto fail_ex_init_cb;
3530                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3531                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3532         }
3533
3534         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3535
3536         /* Get consistent memory allocated for Async Port-Database. */
3537         if (!IS_FWI2_CAPABLE(ha)) {
3538                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3539                         &ha->async_pd_dma);
3540                 if (!ha->async_pd)
3541                         goto fail_async_pd;
3542                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3543                     "async_pd=%p.\n", ha->async_pd);
3544         }
3545
3546         INIT_LIST_HEAD(&ha->vp_list);
3547
3548         /* Allocate memory for our loop_id bitmap */
3549         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3550             GFP_KERNEL);
3551         if (!ha->loop_id_map)
3552                 goto fail_async_pd;
3553         else {
3554                 qla2x00_set_reserved_loop_ids(ha);
3555                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3556                     "loop_id_map=%p.\n", ha->loop_id_map);
3557         }
3558
3559         return 0;
3560
3561 fail_async_pd:
3562         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3563 fail_ex_init_cb:
3564         kfree(ha->npiv_info);
3565 fail_npiv_info:
3566         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3567                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3568         (*rsp)->ring = NULL;
3569         (*rsp)->dma = 0;
3570 fail_rsp_ring:
3571         kfree(*rsp);
3572 fail_rsp:
3573         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3574                 sizeof(request_t), (*req)->ring, (*req)->dma);
3575         (*req)->ring = NULL;
3576         (*req)->dma = 0;
3577 fail_req_ring:
3578         kfree(*req);
3579 fail_req:
3580         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3581                 ha->ct_sns, ha->ct_sns_dma);
3582         ha->ct_sns = NULL;
3583         ha->ct_sns_dma = 0;
3584 fail_free_ms_iocb:
3585         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3586         ha->ms_iocb = NULL;
3587         ha->ms_iocb_dma = 0;
3588 fail_dma_pool:
3589         if (IS_QLA82XX(ha) || ql2xenabledif) {
3590                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3591                 ha->fcp_cmnd_dma_pool = NULL;
3592         }
3593 fail_dl_dma_pool:
3594         if (IS_QLA82XX(ha) || ql2xenabledif) {
3595                 dma_pool_destroy(ha->dl_dma_pool);
3596                 ha->dl_dma_pool = NULL;
3597         }
3598 fail_s_dma_pool:
3599         dma_pool_destroy(ha->s_dma_pool);
3600         ha->s_dma_pool = NULL;
3601 fail_free_nvram:
3602         kfree(ha->nvram);
3603         ha->nvram = NULL;
3604 fail_free_ctx_mempool:
3605         mempool_destroy(ha->ctx_mempool);
3606         ha->ctx_mempool = NULL;
3607 fail_free_srb_mempool:
3608         mempool_destroy(ha->srb_mempool);
3609         ha->srb_mempool = NULL;
3610 fail_free_gid_list:
3611         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3612         ha->gid_list,
3613         ha->gid_list_dma);
3614         ha->gid_list = NULL;
3615         ha->gid_list_dma = 0;
3616 fail_free_tgt_mem:
3617         qlt_mem_free(ha);
3618 fail_free_init_cb:
3619         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3620         ha->init_cb_dma);
3621         ha->init_cb = NULL;
3622         ha->init_cb_dma = 0;
3623 fail:
3624         ql_log(ql_log_fatal, NULL, 0x0030,
3625             "Memory allocation failure.\n");
3626         return -ENOMEM;
3627 }
3628
3629 int
3630 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
3631 {
3632         int rval;
3633         uint16_t        size, max_cnt, temp;
3634         struct qla_hw_data *ha = vha->hw;
3635
3636         /* Return if we don't need to alloacate any extended logins */
3637         if (!ql2xexlogins)
3638                 return QLA_SUCCESS;
3639
3640         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
3641         max_cnt = 0;
3642         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
3643         if (rval != QLA_SUCCESS) {
3644                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
3645                     "Failed to get exlogin status.\n");
3646                 return rval;
3647         }
3648
3649         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
3650         ha->exlogin_size = (size * temp);
3651         ql_log(ql_log_info, vha, 0xd024,
3652                 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
3653                 max_cnt, size, temp);
3654
3655         ql_log(ql_log_info, vha, 0xd025, "EXLOGIN: requested size=0x%x\n",
3656                 ha->exlogin_size);
3657
3658         /* Get consistent memory for extended logins */
3659         ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
3660             ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
3661         if (!ha->exlogin_buf) {
3662                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
3663                     "Failed to allocate memory for exlogin_buf_dma.\n");
3664                 return -ENOMEM;
3665         }
3666
3667         /* Now configure the dma buffer */
3668         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
3669         if (rval) {
3670                 ql_log(ql_log_fatal, vha, 0x00cf,
3671                     "Setup extended login buffer  ****FAILED****.\n");
3672                 qla2x00_free_exlogin_buffer(ha);
3673         }
3674
3675         return rval;
3676 }
3677
3678 /*
3679 * qla2x00_free_exlogin_buffer
3680 *
3681 * Input:
3682 *       ha = adapter block pointer
3683 */
3684 void
3685 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
3686 {
3687         if (ha->exlogin_buf) {
3688                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
3689                     ha->exlogin_buf, ha->exlogin_buf_dma);
3690                 ha->exlogin_buf = NULL;
3691                 ha->exlogin_size = 0;
3692         }
3693 }
3694
3695 int
3696 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
3697 {
3698         int rval;
3699         uint16_t        size, max_cnt, temp;
3700         struct qla_hw_data *ha = vha->hw;
3701
3702         /* Return if we don't need to alloacate any extended logins */
3703         if (!ql2xexchoffld)
3704                 return QLA_SUCCESS;
3705
3706         ql_log(ql_log_info, vha, 0xd014,
3707             "Exchange offload count: %d.\n", ql2xexlogins);
3708
3709         max_cnt = 0;
3710         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
3711         if (rval != QLA_SUCCESS) {
3712                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
3713                     "Failed to get exlogin status.\n");
3714                 return rval;
3715         }
3716
3717         temp = (ql2xexchoffld > max_cnt) ? max_cnt : ql2xexchoffld;
3718         ha->exchoffld_size = (size * temp);
3719         ql_log(ql_log_info, vha, 0xd016,
3720                 "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
3721                 max_cnt, size, temp);
3722
3723         ql_log(ql_log_info, vha, 0xd017,
3724             "Exchange Buffers requested size = 0x%x\n", ha->exchoffld_size);
3725
3726         /* Get consistent memory for extended logins */
3727         ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
3728             ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
3729         if (!ha->exchoffld_buf) {
3730                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
3731                     "Failed to allocate memory for exchoffld_buf_dma.\n");
3732                 return -ENOMEM;
3733         }
3734
3735         /* Now configure the dma buffer */
3736         rval = qla_set_exchoffld_mem_cfg(vha, ha->exchoffld_buf_dma);
3737         if (rval) {
3738                 ql_log(ql_log_fatal, vha, 0xd02e,
3739                     "Setup exchange offload buffer ****FAILED****.\n");
3740                 qla2x00_free_exchoffld_buffer(ha);
3741         }
3742
3743         return rval;
3744 }
3745
3746 /*
3747 * qla2x00_free_exchoffld_buffer
3748 *
3749 * Input:
3750 *       ha = adapter block pointer
3751 */
3752 void
3753 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
3754 {
3755         if (ha->exchoffld_buf) {
3756                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
3757                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
3758                 ha->exchoffld_buf = NULL;
3759                 ha->exchoffld_size = 0;
3760         }
3761 }
3762
3763 /*
3764 * qla2x00_free_fw_dump
3765 *       Frees fw dump stuff.
3766 *
3767 * Input:
3768 *       ha = adapter block pointer
3769 */
3770 static void
3771 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3772 {
3773         if (ha->fce)
3774                 dma_free_coherent(&ha->pdev->dev,
3775                     FCE_SIZE, ha->fce, ha->fce_dma);
3776
3777         if (ha->eft)
3778                 dma_free_coherent(&ha->pdev->dev,
3779                     EFT_SIZE, ha->eft, ha->eft_dma);
3780
3781         if (ha->fw_dump)
3782                 vfree(ha->fw_dump);
3783         if (ha->fw_dump_template)
3784                 vfree(ha->fw_dump_template);
3785
3786         ha->fce = NULL;
3787         ha->fce_dma = 0;
3788         ha->eft = NULL;
3789         ha->eft_dma = 0;
3790         ha->fw_dumped = 0;
3791         ha->fw_dump_cap_flags = 0;
3792         ha->fw_dump_reading = 0;
3793         ha->fw_dump = NULL;
3794         ha->fw_dump_len = 0;
3795         ha->fw_dump_template = NULL;
3796         ha->fw_dump_template_len = 0;
3797 }
3798
3799 /*
3800 * qla2x00_mem_free
3801 *      Frees all adapter allocated memory.
3802 *
3803 * Input:
3804 *      ha = adapter block pointer.
3805 */
3806 static void
3807 qla2x00_mem_free(struct qla_hw_data *ha)
3808 {
3809         qla2x00_free_fw_dump(ha);
3810
3811         if (ha->mctp_dump)
3812                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3813                     ha->mctp_dump_dma);
3814
3815         if (ha->srb_mempool)
3816                 mempool_destroy(ha->srb_mempool);
3817
3818         if (ha->dcbx_tlv)
3819                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3820                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3821
3822         if (ha->xgmac_data)
3823                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3824                     ha->xgmac_data, ha->xgmac_data_dma);
3825
3826         if (ha->sns_cmd)
3827                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3828                 ha->sns_cmd, ha->sns_cmd_dma);
3829
3830         if (ha->ct_sns)
3831                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3832                 ha->ct_sns, ha->ct_sns_dma);
3833
3834         if (ha->sfp_data)
3835                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3836
3837         if (ha->ms_iocb)
3838                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3839
3840         if (ha->ex_init_cb)
3841                 dma_pool_free(ha->s_dma_pool,
3842                         ha->ex_init_cb, ha->ex_init_cb_dma);
3843
3844         if (ha->async_pd)
3845                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3846
3847         if (ha->s_dma_pool)
3848                 dma_pool_destroy(ha->s_dma_pool);
3849
3850         if (ha->gid_list)
3851                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3852                 ha->gid_list, ha->gid_list_dma);
3853
3854         if (IS_QLA82XX(ha)) {
3855                 if (!list_empty(&ha->gbl_dsd_list)) {
3856                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3857
3858                         /* clean up allocated prev pool */
3859                         list_for_each_entry_safe(dsd_ptr,
3860                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3861                                 dma_pool_free(ha->dl_dma_pool,
3862                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3863                                 list_del(&dsd_ptr->list);
3864                                 kfree(dsd_ptr);
3865                         }
3866                 }
3867         }
3868
3869         if (ha->dl_dma_pool)
3870                 dma_pool_destroy(ha->dl_dma_pool);
3871
3872         if (ha->fcp_cmnd_dma_pool)
3873                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3874
3875         if (ha->ctx_mempool)
3876                 mempool_destroy(ha->ctx_mempool);
3877
3878         qlt_mem_free(ha);
3879
3880         if (ha->init_cb)
3881                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3882                         ha->init_cb, ha->init_cb_dma);
3883         vfree(ha->optrom_buffer);
3884         kfree(ha->nvram);
3885         kfree(ha->npiv_info);
3886         kfree(ha->swl);
3887         kfree(ha->loop_id_map);
3888
3889         ha->srb_mempool = NULL;
3890         ha->ctx_mempool = NULL;
3891         ha->sns_cmd = NULL;
3892         ha->sns_cmd_dma = 0;
3893         ha->ct_sns = NULL;
3894         ha->ct_sns_dma = 0;
3895         ha->ms_iocb = NULL;
3896         ha->ms_iocb_dma = 0;
3897         ha->init_cb = NULL;
3898         ha->init_cb_dma = 0;
3899         ha->ex_init_cb = NULL;
3900         ha->ex_init_cb_dma = 0;
3901         ha->async_pd = NULL;
3902         ha->async_pd_dma = 0;
3903
3904         ha->s_dma_pool = NULL;
3905         ha->dl_dma_pool = NULL;
3906         ha->fcp_cmnd_dma_pool = NULL;
3907
3908         ha->gid_list = NULL;
3909         ha->gid_list_dma = 0;
3910
3911         ha->tgt.atio_ring = NULL;
3912         ha->tgt.atio_dma = 0;
3913         ha->tgt.tgt_vp_map = NULL;
3914 }
3915
3916 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3917                                                 struct qla_hw_data *ha)
3918 {
3919         struct Scsi_Host *host;
3920         struct scsi_qla_host *vha = NULL;
3921
3922         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3923         if (host == NULL) {
3924                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3925                     "Failed to allocate host from the scsi layer, aborting.\n");
3926                 goto fail;
3927         }
3928
3929         /* Clear our data area */
3930         vha = shost_priv(host);
3931         memset(vha, 0, sizeof(scsi_qla_host_t));
3932
3933         vha->host = host;
3934         vha->host_no = host->host_no;
3935         vha->hw = ha;
3936
3937         INIT_LIST_HEAD(&vha->vp_fcports);
3938         INIT_LIST_HEAD(&vha->work_list);
3939         INIT_LIST_HEAD(&vha->list);
3940         INIT_LIST_HEAD(&vha->qla_cmd_list);
3941         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
3942         INIT_LIST_HEAD(&vha->logo_list);
3943         INIT_LIST_HEAD(&vha->plogi_ack_list);
3944
3945         spin_lock_init(&vha->work_lock);
3946         spin_lock_init(&vha->cmd_list_lock);
3947
3948         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3949         ql_dbg(ql_dbg_init, vha, 0x0041,
3950             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3951             vha->host, vha->hw, vha,
3952             dev_name(&(ha->pdev->dev)));
3953
3954         return vha;
3955
3956 fail:
3957         return vha;
3958 }
3959
3960 static struct qla_work_evt *
3961 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3962 {
3963         struct qla_work_evt *e;
3964         uint8_t bail;
3965
3966         QLA_VHA_MARK_BUSY(vha, bail);
3967         if (bail)
3968                 return NULL;
3969
3970         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3971         if (!e) {
3972                 QLA_VHA_MARK_NOT_BUSY(vha);
3973                 return NULL;
3974         }
3975
3976         INIT_LIST_HEAD(&e->list);
3977         e->type = type;
3978         e->flags = QLA_EVT_FLAG_FREE;
3979         return e;
3980 }
3981
3982 static int
3983 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3984 {
3985         unsigned long flags;
3986
3987         spin_lock_irqsave(&vha->work_lock, flags);
3988         list_add_tail(&e->list, &vha->work_list);
3989         spin_unlock_irqrestore(&vha->work_lock, flags);
3990         qla2xxx_wake_dpc(vha);
3991
3992         return QLA_SUCCESS;
3993 }
3994
3995 int
3996 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3997     u32 data)
3998 {
3999         struct qla_work_evt *e;
4000
4001         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4002         if (!e)
4003                 return QLA_FUNCTION_FAILED;
4004
4005         e->u.aen.code = code;
4006         e->u.aen.data = data;
4007         return qla2x00_post_work(vha, e);
4008 }
4009
4010 int
4011 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4012 {
4013         struct qla_work_evt *e;
4014
4015         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4016         if (!e)
4017                 return QLA_FUNCTION_FAILED;
4018
4019         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4020         return qla2x00_post_work(vha, e);
4021 }
4022
4023 #define qla2x00_post_async_work(name, type)     \
4024 int qla2x00_post_async_##name##_work(           \
4025     struct scsi_qla_host *vha,                  \
4026     fc_port_t *fcport, uint16_t *data)          \
4027 {                                               \
4028         struct qla_work_evt *e;                 \
4029                                                 \
4030         e = qla2x00_alloc_work(vha, type);      \
4031         if (!e)                                 \
4032                 return QLA_FUNCTION_FAILED;     \
4033                                                 \
4034         e->u.logio.fcport = fcport;             \
4035         if (data) {                             \
4036                 e->u.logio.data[0] = data[0];   \
4037                 e->u.logio.data[1] = data[1];   \
4038         }                                       \
4039         return qla2x00_post_work(vha, e);       \
4040 }
4041
4042 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4043 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
4044 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4045 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4046 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4047 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4048
4049 int
4050 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4051 {
4052         struct qla_work_evt *e;
4053
4054         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4055         if (!e)
4056                 return QLA_FUNCTION_FAILED;
4057
4058         e->u.uevent.code = code;
4059         return qla2x00_post_work(vha, e);
4060 }
4061
4062 static void
4063 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4064 {
4065         char event_string[40];
4066         char *envp[] = { event_string, NULL };
4067
4068         switch (code) {
4069         case QLA_UEVENT_CODE_FW_DUMP:
4070                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4071                     vha->host_no);
4072                 break;
4073         default:
4074                 /* do nothing */
4075                 break;
4076         }
4077         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4078 }
4079
4080 int
4081 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4082                         uint32_t *data, int cnt)
4083 {
4084         struct qla_work_evt *e;
4085
4086         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4087         if (!e)
4088                 return QLA_FUNCTION_FAILED;
4089
4090         e->u.aenfx.evtcode = evtcode;
4091         e->u.aenfx.count = cnt;
4092         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4093         return qla2x00_post_work(vha, e);
4094 }
4095
4096 void
4097 qla2x00_do_work(struct scsi_qla_host *vha)
4098 {
4099         struct qla_work_evt *e, *tmp;
4100         unsigned long flags;
4101         LIST_HEAD(work);
4102
4103         spin_lock_irqsave(&vha->work_lock, flags);
4104         list_splice_init(&vha->work_list, &work);
4105         spin_unlock_irqrestore(&vha->work_lock, flags);
4106
4107         list_for_each_entry_safe(e, tmp, &work, list) {
4108                 list_del_init(&e->list);
4109
4110                 switch (e->type) {
4111                 case QLA_EVT_AEN:
4112                         fc_host_post_event(vha->host, fc_get_event_number(),
4113                             e->u.aen.code, e->u.aen.data);
4114                         break;
4115                 case QLA_EVT_IDC_ACK:
4116                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4117                         break;
4118                 case QLA_EVT_ASYNC_LOGIN:
4119                         qla2x00_async_login(vha, e->u.logio.fcport,
4120                             e->u.logio.data);
4121                         break;
4122                 case QLA_EVT_ASYNC_LOGIN_DONE:
4123                         qla2x00_async_login_done(vha, e->u.logio.fcport,
4124                             e->u.logio.data);
4125                         break;
4126                 case QLA_EVT_ASYNC_LOGOUT:
4127                         qla2x00_async_logout(vha, e->u.logio.fcport);
4128                         break;
4129                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4130                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4131                             e->u.logio.data);
4132                         break;
4133                 case QLA_EVT_ASYNC_ADISC:
4134                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4135                             e->u.logio.data);
4136                         break;
4137                 case QLA_EVT_ASYNC_ADISC_DONE:
4138                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4139                             e->u.logio.data);
4140                         break;
4141                 case QLA_EVT_UEVENT:
4142                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4143                         break;
4144                 case QLA_EVT_AENFX:
4145                         qlafx00_process_aen(vha, e);
4146                         break;
4147                 }
4148                 if (e->flags & QLA_EVT_FLAG_FREE)
4149                         kfree(e);
4150
4151                 /* For each work completed decrement vha ref count */
4152                 QLA_VHA_MARK_NOT_BUSY(vha);
4153         }
4154 }
4155
4156 /* Relogins all the fcports of a vport
4157  * Context: dpc thread
4158  */
4159 void qla2x00_relogin(struct scsi_qla_host *vha)
4160 {
4161         fc_port_t       *fcport;
4162         int status;
4163         uint16_t        next_loopid = 0;
4164         struct qla_hw_data *ha = vha->hw;
4165         uint16_t data[2];
4166
4167         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4168         /*
4169          * If the port is not ONLINE then try to login
4170          * to it if we haven't run out of retries.
4171          */
4172                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4173                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4174                         fcport->login_retry--;
4175                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4176                                 if (fcport->flags & FCF_FCP2_DEVICE)
4177                                         ha->isp_ops->fabric_logout(vha,
4178                                                         fcport->loop_id,
4179                                                         fcport->d_id.b.domain,
4180                                                         fcport->d_id.b.area,
4181                                                         fcport->d_id.b.al_pa);
4182
4183                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4184                                         fcport->loop_id = next_loopid =
4185                                             ha->min_external_loopid;
4186                                         status = qla2x00_find_new_loop_id(
4187                                             vha, fcport);
4188                                         if (status != QLA_SUCCESS) {
4189                                                 /* Ran out of IDs to use */
4190                                                 break;
4191                                         }
4192                                 }
4193
4194                                 if (IS_ALOGIO_CAPABLE(ha)) {
4195                                         fcport->flags |= FCF_ASYNC_SENT;
4196                                         data[0] = 0;
4197                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4198                                         status = qla2x00_post_async_login_work(
4199                                             vha, fcport, data);
4200                                         if (status == QLA_SUCCESS)
4201                                                 continue;
4202                                         /* Attempt a retry. */
4203                                         status = 1;
4204                                 } else {
4205                                         status = qla2x00_fabric_login(vha,
4206                                             fcport, &next_loopid);
4207                                         if (status ==  QLA_SUCCESS) {
4208                                                 int status2;
4209                                                 uint8_t opts;
4210
4211                                                 opts = 0;
4212                                                 if (fcport->flags &
4213                                                     FCF_FCP2_DEVICE)
4214                                                         opts |= BIT_1;
4215                                                 status2 =
4216                                                     qla2x00_get_port_database(
4217                                                         vha, fcport, opts);
4218                                                 if (status2 != QLA_SUCCESS)
4219                                                         status = 1;
4220                                         }
4221                                 }
4222                         } else
4223                                 status = qla2x00_local_device_login(vha,
4224                                                                 fcport);
4225
4226                         if (status == QLA_SUCCESS) {
4227                                 fcport->old_loop_id = fcport->loop_id;
4228
4229                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4230                                     "Port login OK: logged in ID 0x%x.\n",
4231                                     fcport->loop_id);
4232
4233                                 qla2x00_update_fcport(vha, fcport);
4234
4235                         } else if (status == 1) {
4236                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4237                                 /* retry the login again */
4238                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4239                                     "Retrying %d login again loop_id 0x%x.\n",
4240                                     fcport->login_retry, fcport->loop_id);
4241                         } else {
4242                                 fcport->login_retry = 0;
4243                         }
4244
4245                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4246                                 qla2x00_clear_loop_id(fcport);
4247                 }
4248                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4249                         break;
4250         }
4251 }
4252
4253 /* Schedule work on any of the dpc-workqueues */
4254 void
4255 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4256 {
4257         struct qla_hw_data *ha = base_vha->hw;
4258
4259         switch (work_code) {
4260         case MBA_IDC_AEN: /* 0x8200 */
4261                 if (ha->dpc_lp_wq)
4262                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4263                 break;
4264
4265         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4266                 if (!ha->flags.nic_core_reset_hdlr_active) {
4267                         if (ha->dpc_hp_wq)
4268                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4269                 } else
4270                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4271                             "NIC Core reset is already active. Skip "
4272                             "scheduling it again.\n");
4273                 break;
4274         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4275                 if (ha->dpc_hp_wq)
4276                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4277                 break;
4278         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4279                 if (ha->dpc_hp_wq)
4280                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4281                 break;
4282         default:
4283                 ql_log(ql_log_warn, base_vha, 0xb05f,
4284                     "Unknown work-code=0x%x.\n", work_code);
4285         }
4286
4287         return;
4288 }
4289
4290 /* Work: Perform NIC Core Unrecoverable state handling */
4291 void
4292 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4293 {
4294         struct qla_hw_data *ha =
4295                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4296         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4297         uint32_t dev_state = 0;
4298
4299         qla83xx_idc_lock(base_vha, 0);
4300         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4301         qla83xx_reset_ownership(base_vha);
4302         if (ha->flags.nic_core_reset_owner) {
4303                 ha->flags.nic_core_reset_owner = 0;
4304                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4305                     QLA8XXX_DEV_FAILED);
4306                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4307                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4308         }
4309         qla83xx_idc_unlock(base_vha, 0);
4310 }
4311
4312 /* Work: Execute IDC state handler */
4313 void
4314 qla83xx_idc_state_handler_work(struct work_struct *work)
4315 {
4316         struct qla_hw_data *ha =
4317                 container_of(work, struct qla_hw_data, idc_state_handler);
4318         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4319         uint32_t dev_state = 0;
4320
4321         qla83xx_idc_lock(base_vha, 0);
4322         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4323         if (dev_state == QLA8XXX_DEV_FAILED ||
4324                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4325                 qla83xx_idc_state_handler(base_vha);
4326         qla83xx_idc_unlock(base_vha, 0);
4327 }
4328
4329 static int
4330 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4331 {
4332         int rval = QLA_SUCCESS;
4333         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4334         uint32_t heart_beat_counter1, heart_beat_counter2;
4335
4336         do {
4337                 if (time_after(jiffies, heart_beat_wait)) {
4338                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4339                             "Nic Core f/w is not alive.\n");
4340                         rval = QLA_FUNCTION_FAILED;
4341                         break;
4342                 }
4343
4344                 qla83xx_idc_lock(base_vha, 0);
4345                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4346                     &heart_beat_counter1);
4347                 qla83xx_idc_unlock(base_vha, 0);
4348                 msleep(100);
4349                 qla83xx_idc_lock(base_vha, 0);
4350                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4351                     &heart_beat_counter2);
4352                 qla83xx_idc_unlock(base_vha, 0);
4353         } while (heart_beat_counter1 == heart_beat_counter2);
4354
4355         return rval;
4356 }
4357
4358 /* Work: Perform NIC Core Reset handling */
4359 void
4360 qla83xx_nic_core_reset_work(struct work_struct *work)
4361 {
4362         struct qla_hw_data *ha =
4363                 container_of(work, struct qla_hw_data, nic_core_reset);
4364         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4365         uint32_t dev_state = 0;
4366
4367         if (IS_QLA2031(ha)) {
4368                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4369                         ql_log(ql_log_warn, base_vha, 0xb081,
4370                             "Failed to dump mctp\n");
4371                 return;
4372         }
4373
4374         if (!ha->flags.nic_core_reset_hdlr_active) {
4375                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4376                         qla83xx_idc_lock(base_vha, 0);
4377                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4378                             &dev_state);
4379                         qla83xx_idc_unlock(base_vha, 0);
4380                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4381                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4382                                     "Nic Core f/w is alive.\n");
4383                                 return;
4384                         }
4385                 }
4386
4387                 ha->flags.nic_core_reset_hdlr_active = 1;
4388                 if (qla83xx_nic_core_reset(base_vha)) {
4389                         /* NIC Core reset failed. */
4390                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4391                             "NIC Core reset failed.\n");
4392                 }
4393                 ha->flags.nic_core_reset_hdlr_active = 0;
4394         }
4395 }
4396
4397 /* Work: Handle 8200 IDC aens */
4398 void
4399 qla83xx_service_idc_aen(struct work_struct *work)
4400 {
4401         struct qla_hw_data *ha =
4402                 container_of(work, struct qla_hw_data, idc_aen);
4403         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4404         uint32_t dev_state, idc_control;
4405
4406         qla83xx_idc_lock(base_vha, 0);
4407         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4408         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4409         qla83xx_idc_unlock(base_vha, 0);
4410         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4411                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4412                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4413                             "Application requested NIC Core Reset.\n");
4414                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4415                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4416                     QLA_SUCCESS) {
4417                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4418                             "Other protocol driver requested NIC Core Reset.\n");
4419                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4420                 }
4421         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4422                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4423                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4424         }
4425 }
4426
4427 static void
4428 qla83xx_wait_logic(void)
4429 {
4430         int i;
4431
4432         /* Yield CPU */
4433         if (!in_interrupt()) {
4434                 /*
4435                  * Wait about 200ms before retrying again.
4436                  * This controls the number of retries for single
4437                  * lock operation.
4438                  */
4439                 msleep(100);
4440                 schedule();
4441         } else {
4442                 for (i = 0; i < 20; i++)
4443                         cpu_relax(); /* This a nop instr on i386 */
4444         }
4445 }
4446
4447 static int
4448 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4449 {
4450         int rval;
4451         uint32_t data;
4452         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4453         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4454         struct qla_hw_data *ha = base_vha->hw;
4455         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4456             "Trying force recovery of the IDC lock.\n");
4457
4458         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4459         if (rval)
4460                 return rval;
4461
4462         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4463                 return QLA_SUCCESS;
4464         } else {
4465                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4466                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4467                     data);
4468                 if (rval)
4469                         return rval;
4470
4471                 msleep(200);
4472
4473                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4474                     &data);
4475                 if (rval)
4476                         return rval;
4477
4478                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4479                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4480                                         ~(idc_lck_rcvry_stage_mask));
4481                         rval = qla83xx_wr_reg(base_vha,
4482                             QLA83XX_IDC_LOCK_RECOVERY, data);
4483                         if (rval)
4484                                 return rval;
4485
4486                         /* Forcefully perform IDC UnLock */
4487                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4488                             &data);
4489                         if (rval)
4490                                 return rval;
4491                         /* Clear lock-id by setting 0xff */
4492                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4493                             0xff);
4494                         if (rval)
4495                                 return rval;
4496                         /* Clear lock-recovery by setting 0x0 */
4497                         rval = qla83xx_wr_reg(base_vha,
4498                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4499                         if (rval)
4500                                 return rval;
4501                 } else
4502                         return QLA_SUCCESS;
4503         }
4504
4505         return rval;
4506 }
4507
4508 static int
4509 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4510 {
4511         int rval = QLA_SUCCESS;
4512         uint32_t o_drv_lockid, n_drv_lockid;
4513         unsigned long lock_recovery_timeout;
4514
4515         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4516 retry_lockid:
4517         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4518         if (rval)
4519                 goto exit;
4520
4521         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4522         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4523                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4524                         return QLA_SUCCESS;
4525                 else
4526                         return QLA_FUNCTION_FAILED;
4527         }
4528
4529         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4530         if (rval)
4531                 goto exit;
4532
4533         if (o_drv_lockid == n_drv_lockid) {
4534                 qla83xx_wait_logic();
4535                 goto retry_lockid;
4536         } else
4537                 return QLA_SUCCESS;
4538
4539 exit:
4540         return rval;
4541 }
4542
4543 void
4544 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4545 {
4546         uint16_t options = (requester_id << 15) | BIT_6;
4547         uint32_t data;
4548         uint32_t lock_owner;
4549         struct qla_hw_data *ha = base_vha->hw;
4550
4551         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4552 retry_lock:
4553         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4554             == QLA_SUCCESS) {
4555                 if (data) {
4556                         /* Setting lock-id to our function-number */
4557                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4558                             ha->portnum);
4559                 } else {
4560                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4561                             &lock_owner);
4562                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4563                             "Failed to acquire IDC lock, acquired by %d, "
4564                             "retrying...\n", lock_owner);
4565
4566                         /* Retry/Perform IDC-Lock recovery */
4567                         if (qla83xx_idc_lock_recovery(base_vha)
4568                             == QLA_SUCCESS) {
4569                                 qla83xx_wait_logic();
4570                                 goto retry_lock;
4571                         } else
4572                                 ql_log(ql_log_warn, base_vha, 0xb075,
4573                                     "IDC Lock recovery FAILED.\n");
4574                 }
4575
4576         }
4577
4578         return;
4579
4580         /* XXX: IDC-lock implementation using access-control mbx */
4581 retry_lock2:
4582         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4583                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4584                     "Failed to acquire IDC lock. retrying...\n");
4585                 /* Retry/Perform IDC-Lock recovery */
4586                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4587                         qla83xx_wait_logic();
4588                         goto retry_lock2;
4589                 } else
4590                         ql_log(ql_log_warn, base_vha, 0xb076,
4591                             "IDC Lock recovery FAILED.\n");
4592         }
4593
4594         return;
4595 }
4596
4597 void
4598 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4599 {
4600 #if 0
4601         uint16_t options = (requester_id << 15) | BIT_7;
4602 #endif
4603         uint16_t retry;
4604         uint32_t data;
4605         struct qla_hw_data *ha = base_vha->hw;
4606
4607         /* IDC-unlock implementation using driver-unlock/lock-id
4608          * remote registers
4609          */
4610         retry = 0;
4611 retry_unlock:
4612         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4613             == QLA_SUCCESS) {
4614                 if (data == ha->portnum) {
4615                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4616                         /* Clearing lock-id by setting 0xff */
4617                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4618                 } else if (retry < 10) {
4619                         /* SV: XXX: IDC unlock retrying needed here? */
4620
4621                         /* Retry for IDC-unlock */
4622                         qla83xx_wait_logic();
4623                         retry++;
4624                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4625                             "Failed to release IDC lock, retyring=%d\n", retry);
4626                         goto retry_unlock;
4627                 }
4628         } else if (retry < 10) {
4629                 /* Retry for IDC-unlock */
4630                 qla83xx_wait_logic();
4631                 retry++;
4632                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4633                     "Failed to read drv-lockid, retyring=%d\n", retry);
4634                 goto retry_unlock;
4635         }
4636
4637         return;
4638
4639 #if 0
4640         /* XXX: IDC-unlock implementation using access-control mbx */
4641         retry = 0;
4642 retry_unlock2:
4643         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4644                 if (retry < 10) {
4645                         /* Retry for IDC-unlock */
4646                         qla83xx_wait_logic();
4647                         retry++;
4648                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4649                             "Failed to release IDC lock, retyring=%d\n", retry);
4650                         goto retry_unlock2;
4651                 }
4652         }
4653
4654         return;
4655 #endif
4656 }
4657
4658 int
4659 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4660 {
4661         int rval = QLA_SUCCESS;
4662         struct qla_hw_data *ha = vha->hw;
4663         uint32_t drv_presence;
4664
4665         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4666         if (rval == QLA_SUCCESS) {
4667                 drv_presence |= (1 << ha->portnum);
4668                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4669                     drv_presence);
4670         }
4671
4672         return rval;
4673 }
4674
4675 int
4676 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4677 {
4678         int rval = QLA_SUCCESS;
4679
4680         qla83xx_idc_lock(vha, 0);
4681         rval = __qla83xx_set_drv_presence(vha);
4682         qla83xx_idc_unlock(vha, 0);
4683
4684         return rval;
4685 }
4686
4687 int
4688 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4689 {
4690         int rval = QLA_SUCCESS;
4691         struct qla_hw_data *ha = vha->hw;
4692         uint32_t drv_presence;
4693
4694         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4695         if (rval == QLA_SUCCESS) {
4696                 drv_presence &= ~(1 << ha->portnum);
4697                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4698                     drv_presence);
4699         }
4700
4701         return rval;
4702 }
4703
4704 int
4705 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4706 {
4707         int rval = QLA_SUCCESS;
4708
4709         qla83xx_idc_lock(vha, 0);
4710         rval = __qla83xx_clear_drv_presence(vha);
4711         qla83xx_idc_unlock(vha, 0);
4712
4713         return rval;
4714 }
4715
4716 static void
4717 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4718 {
4719         struct qla_hw_data *ha = vha->hw;
4720         uint32_t drv_ack, drv_presence;
4721         unsigned long ack_timeout;
4722
4723         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4724         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4725         while (1) {
4726                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4727                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4728                 if ((drv_ack & drv_presence) == drv_presence)
4729                         break;
4730
4731                 if (time_after_eq(jiffies, ack_timeout)) {
4732                         ql_log(ql_log_warn, vha, 0xb067,
4733                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4734                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4735                         /*
4736                          * The function(s) which did not ack in time are forced
4737                          * to withdraw any further participation in the IDC
4738                          * reset.
4739                          */
4740                         if (drv_ack != drv_presence)
4741                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4742                                     drv_ack);
4743                         break;
4744                 }
4745
4746                 qla83xx_idc_unlock(vha, 0);
4747                 msleep(1000);
4748                 qla83xx_idc_lock(vha, 0);
4749         }
4750
4751         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4752         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4753 }
4754
4755 static int
4756 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4757 {
4758         int rval = QLA_SUCCESS;
4759         uint32_t idc_control;
4760
4761         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4762         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4763
4764         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4765         __qla83xx_get_idc_control(vha, &idc_control);
4766         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4767         __qla83xx_set_idc_control(vha, 0);
4768
4769         qla83xx_idc_unlock(vha, 0);
4770         rval = qla83xx_restart_nic_firmware(vha);
4771         qla83xx_idc_lock(vha, 0);
4772
4773         if (rval != QLA_SUCCESS) {
4774                 ql_log(ql_log_fatal, vha, 0xb06a,
4775                     "Failed to restart NIC f/w.\n");
4776                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4777                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4778         } else {
4779                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4780                     "Success in restarting nic f/w.\n");
4781                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4782                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4783         }
4784
4785         return rval;
4786 }
4787
4788 /* Assumes idc_lock always held on entry */
4789 int
4790 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4791 {
4792         struct qla_hw_data *ha = base_vha->hw;
4793         int rval = QLA_SUCCESS;
4794         unsigned long dev_init_timeout;
4795         uint32_t dev_state;
4796
4797         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4798         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4799
4800         while (1) {
4801
4802                 if (time_after_eq(jiffies, dev_init_timeout)) {
4803                         ql_log(ql_log_warn, base_vha, 0xb06e,
4804                             "Initialization TIMEOUT!\n");
4805                         /* Init timeout. Disable further NIC Core
4806                          * communication.
4807                          */
4808                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4809                                 QLA8XXX_DEV_FAILED);
4810                         ql_log(ql_log_info, base_vha, 0xb06f,
4811                             "HW State: FAILED.\n");
4812                 }
4813
4814                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4815                 switch (dev_state) {
4816                 case QLA8XXX_DEV_READY:
4817                         if (ha->flags.nic_core_reset_owner)
4818                                 qla83xx_idc_audit(base_vha,
4819                                     IDC_AUDIT_COMPLETION);
4820                         ha->flags.nic_core_reset_owner = 0;
4821                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4822                             "Reset_owner reset by 0x%x.\n",
4823                             ha->portnum);
4824                         goto exit;
4825                 case QLA8XXX_DEV_COLD:
4826                         if (ha->flags.nic_core_reset_owner)
4827                                 rval = qla83xx_device_bootstrap(base_vha);
4828                         else {
4829                         /* Wait for AEN to change device-state */
4830                                 qla83xx_idc_unlock(base_vha, 0);
4831                                 msleep(1000);
4832                                 qla83xx_idc_lock(base_vha, 0);
4833                         }
4834                         break;
4835                 case QLA8XXX_DEV_INITIALIZING:
4836                         /* Wait for AEN to change device-state */
4837                         qla83xx_idc_unlock(base_vha, 0);
4838                         msleep(1000);
4839                         qla83xx_idc_lock(base_vha, 0);
4840                         break;
4841                 case QLA8XXX_DEV_NEED_RESET:
4842                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4843                                 qla83xx_need_reset_handler(base_vha);
4844                         else {
4845                                 /* Wait for AEN to change device-state */
4846                                 qla83xx_idc_unlock(base_vha, 0);
4847                                 msleep(1000);
4848                                 qla83xx_idc_lock(base_vha, 0);
4849                         }
4850                         /* reset timeout value after need reset handler */
4851                         dev_init_timeout = jiffies +
4852                             (ha->fcoe_dev_init_timeout * HZ);
4853                         break;
4854                 case QLA8XXX_DEV_NEED_QUIESCENT:
4855                         /* XXX: DEBUG for now */
4856                         qla83xx_idc_unlock(base_vha, 0);
4857                         msleep(1000);
4858                         qla83xx_idc_lock(base_vha, 0);
4859                         break;
4860                 case QLA8XXX_DEV_QUIESCENT:
4861                         /* XXX: DEBUG for now */
4862                         if (ha->flags.quiesce_owner)
4863                                 goto exit;
4864
4865                         qla83xx_idc_unlock(base_vha, 0);
4866                         msleep(1000);
4867                         qla83xx_idc_lock(base_vha, 0);
4868                         dev_init_timeout = jiffies +
4869                             (ha->fcoe_dev_init_timeout * HZ);
4870                         break;
4871                 case QLA8XXX_DEV_FAILED:
4872                         if (ha->flags.nic_core_reset_owner)
4873                                 qla83xx_idc_audit(base_vha,
4874                                     IDC_AUDIT_COMPLETION);
4875                         ha->flags.nic_core_reset_owner = 0;
4876                         __qla83xx_clear_drv_presence(base_vha);
4877                         qla83xx_idc_unlock(base_vha, 0);
4878                         qla8xxx_dev_failed_handler(base_vha);
4879                         rval = QLA_FUNCTION_FAILED;
4880                         qla83xx_idc_lock(base_vha, 0);
4881                         goto exit;
4882                 case QLA8XXX_BAD_VALUE:
4883                         qla83xx_idc_unlock(base_vha, 0);
4884                         msleep(1000);
4885                         qla83xx_idc_lock(base_vha, 0);
4886                         break;
4887                 default:
4888                         ql_log(ql_log_warn, base_vha, 0xb071,
4889                             "Unknown Device State: %x.\n", dev_state);
4890                         qla83xx_idc_unlock(base_vha, 0);
4891                         qla8xxx_dev_failed_handler(base_vha);
4892                         rval = QLA_FUNCTION_FAILED;
4893                         qla83xx_idc_lock(base_vha, 0);
4894                         goto exit;
4895                 }
4896         }
4897
4898 exit:
4899         return rval;
4900 }
4901
4902 void
4903 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4904 {
4905         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4906             board_disable);
4907         struct pci_dev *pdev = ha->pdev;
4908         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4909
4910         ql_log(ql_log_warn, base_vha, 0x015b,
4911             "Disabling adapter.\n");
4912
4913         set_bit(UNLOADING, &base_vha->dpc_flags);
4914
4915         qla2x00_delete_all_vps(ha, base_vha);
4916
4917         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4918
4919         qla2x00_dfs_remove(base_vha);
4920
4921         qla84xx_put_chip(base_vha);
4922
4923         if (base_vha->timer_active)
4924                 qla2x00_stop_timer(base_vha);
4925
4926         base_vha->flags.online = 0;
4927
4928         qla2x00_destroy_deferred_work(ha);
4929
4930         /*
4931          * Do not try to stop beacon blink as it will issue a mailbox
4932          * command.
4933          */
4934         qla2x00_free_sysfs_attr(base_vha, false);
4935
4936         fc_remove_host(base_vha->host);
4937
4938         scsi_remove_host(base_vha->host);
4939
4940         base_vha->flags.init_done = 0;
4941         qla25xx_delete_queues(base_vha);
4942         qla2x00_free_irqs(base_vha);
4943         qla2x00_free_fcports(base_vha);
4944         qla2x00_mem_free(ha);
4945         qla82xx_md_free(base_vha);
4946         qla2x00_free_queues(ha);
4947
4948         qla2x00_unmap_iobases(ha);
4949
4950         pci_release_selected_regions(ha->pdev, ha->bars);
4951         pci_disable_pcie_error_reporting(pdev);
4952         pci_disable_device(pdev);
4953
4954         /*
4955          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
4956          */
4957 }
4958
4959 /**************************************************************************
4960 * qla2x00_do_dpc
4961 *   This kernel thread is a task that is schedule by the interrupt handler
4962 *   to perform the background processing for interrupts.
4963 *
4964 * Notes:
4965 * This task always run in the context of a kernel thread.  It
4966 * is kick-off by the driver's detect code and starts up
4967 * up one per adapter. It immediately goes to sleep and waits for
4968 * some fibre event.  When either the interrupt handler or
4969 * the timer routine detects a event it will one of the task
4970 * bits then wake us up.
4971 **************************************************************************/
4972 static int
4973 qla2x00_do_dpc(void *data)
4974 {
4975         scsi_qla_host_t *base_vha;
4976         struct qla_hw_data *ha;
4977
4978         ha = (struct qla_hw_data *)data;
4979         base_vha = pci_get_drvdata(ha->pdev);
4980
4981         set_user_nice(current, MIN_NICE);
4982
4983         set_current_state(TASK_INTERRUPTIBLE);
4984         while (!kthread_should_stop()) {
4985                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4986                     "DPC handler sleeping.\n");
4987
4988                 schedule();
4989
4990                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4991                         goto end_loop;
4992
4993                 if (ha->flags.eeh_busy) {
4994                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4995                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4996                         goto end_loop;
4997                 }
4998
4999                 ha->dpc_active = 1;
5000
5001                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5002                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5003                     base_vha->dpc_flags);
5004
5005                 qla2x00_do_work(base_vha);
5006
5007                 if (IS_P3P_TYPE(ha)) {
5008                         if (IS_QLA8044(ha)) {
5009                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5010                                         &base_vha->dpc_flags)) {
5011                                         qla8044_idc_lock(ha);
5012                                         qla8044_wr_direct(base_vha,
5013                                                 QLA8044_CRB_DEV_STATE_INDEX,
5014                                                 QLA8XXX_DEV_FAILED);
5015                                         qla8044_idc_unlock(ha);
5016                                         ql_log(ql_log_info, base_vha, 0x4004,
5017                                                 "HW State: FAILED.\n");
5018                                         qla8044_device_state_handler(base_vha);
5019                                         continue;
5020                                 }
5021
5022                         } else {
5023                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5024                                         &base_vha->dpc_flags)) {
5025                                         qla82xx_idc_lock(ha);
5026                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5027                                                 QLA8XXX_DEV_FAILED);
5028                                         qla82xx_idc_unlock(ha);
5029                                         ql_log(ql_log_info, base_vha, 0x0151,
5030                                                 "HW State: FAILED.\n");
5031                                         qla82xx_device_state_handler(base_vha);
5032                                         continue;
5033                                 }
5034                         }
5035
5036                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5037                                 &base_vha->dpc_flags)) {
5038
5039                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5040                                     "FCoE context reset scheduled.\n");
5041                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5042                                         &base_vha->dpc_flags))) {
5043                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5044                                                 /* FCoE-ctx reset failed.
5045                                                  * Escalate to chip-reset
5046                                                  */
5047                                                 set_bit(ISP_ABORT_NEEDED,
5048                                                         &base_vha->dpc_flags);
5049                                         }
5050                                         clear_bit(ABORT_ISP_ACTIVE,
5051                                                 &base_vha->dpc_flags);
5052                                 }
5053
5054                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5055                                     "FCoE context reset end.\n");
5056                         }
5057                 } else if (IS_QLAFX00(ha)) {
5058                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5059                                 &base_vha->dpc_flags)) {
5060                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5061                                     "Firmware Reset Recovery\n");
5062                                 if (qlafx00_reset_initialize(base_vha)) {
5063                                         /* Failed. Abort isp later. */
5064                                         if (!test_bit(UNLOADING,
5065                                             &base_vha->dpc_flags)) {
5066                                                 set_bit(ISP_UNRECOVERABLE,
5067                                                     &base_vha->dpc_flags);
5068                                                 ql_dbg(ql_dbg_dpc, base_vha,
5069                                                     0x4021,
5070                                                     "Reset Recovery Failed\n");
5071                                         }
5072                                 }
5073                         }
5074
5075                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5076                                 &base_vha->dpc_flags)) {
5077                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5078                                     "ISPFx00 Target Scan scheduled\n");
5079                                 if (qlafx00_rescan_isp(base_vha)) {
5080                                         if (!test_bit(UNLOADING,
5081                                             &base_vha->dpc_flags))
5082                                                 set_bit(ISP_UNRECOVERABLE,
5083                                                     &base_vha->dpc_flags);
5084                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5085                                             "ISPFx00 Target Scan Failed\n");
5086                                 }
5087                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5088                                     "ISPFx00 Target Scan End\n");
5089                         }
5090                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5091                                 &base_vha->dpc_flags)) {
5092                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5093                                     "ISPFx00 Host Info resend scheduled\n");
5094                                 qlafx00_fx_disc(base_vha,
5095                                     &base_vha->hw->mr.fcport,
5096                                     FXDISC_REG_HOST_INFO);
5097                         }
5098                 }
5099
5100                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5101                                                 &base_vha->dpc_flags)) {
5102
5103                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5104                             "ISP abort scheduled.\n");
5105                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5106                             &base_vha->dpc_flags))) {
5107
5108                                 if (ha->isp_ops->abort_isp(base_vha)) {
5109                                         /* failed. retry later */
5110                                         set_bit(ISP_ABORT_NEEDED,
5111                                             &base_vha->dpc_flags);
5112                                 }
5113                                 clear_bit(ABORT_ISP_ACTIVE,
5114                                                 &base_vha->dpc_flags);
5115                         }
5116
5117                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5118                             "ISP abort end.\n");
5119                 }
5120
5121                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5122                     &base_vha->dpc_flags)) {
5123                         qla2x00_update_fcports(base_vha);
5124                 }
5125
5126                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
5127                         int ret;
5128                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
5129                         if (ret != QLA_SUCCESS)
5130                                 ql_log(ql_log_warn, base_vha, 0x121,
5131                                     "Failed to enable receiving of RSCN "
5132                                     "requests: 0x%x.\n", ret);
5133                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
5134                 }
5135
5136                 if (IS_QLAFX00(ha))
5137                         goto loop_resync_check;
5138
5139                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5140                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5141                             "Quiescence mode scheduled.\n");
5142                         if (IS_P3P_TYPE(ha)) {
5143                                 if (IS_QLA82XX(ha))
5144                                         qla82xx_device_state_handler(base_vha);
5145                                 if (IS_QLA8044(ha))
5146                                         qla8044_device_state_handler(base_vha);
5147                                 clear_bit(ISP_QUIESCE_NEEDED,
5148                                     &base_vha->dpc_flags);
5149                                 if (!ha->flags.quiesce_owner) {
5150                                         qla2x00_perform_loop_resync(base_vha);
5151                                         if (IS_QLA82XX(ha)) {
5152                                                 qla82xx_idc_lock(ha);
5153                                                 qla82xx_clear_qsnt_ready(
5154                                                     base_vha);
5155                                                 qla82xx_idc_unlock(ha);
5156                                         } else if (IS_QLA8044(ha)) {
5157                                                 qla8044_idc_lock(ha);
5158                                                 qla8044_clear_qsnt_ready(
5159                                                     base_vha);
5160                                                 qla8044_idc_unlock(ha);
5161                                         }
5162                                 }
5163                         } else {
5164                                 clear_bit(ISP_QUIESCE_NEEDED,
5165                                     &base_vha->dpc_flags);
5166                                 qla2x00_quiesce_io(base_vha);
5167                         }
5168                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5169                             "Quiescence mode end.\n");
5170                 }
5171
5172                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5173                                 &base_vha->dpc_flags) &&
5174                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5175
5176                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5177                             "Reset marker scheduled.\n");
5178                         qla2x00_rst_aen(base_vha);
5179                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5180                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5181                             "Reset marker end.\n");
5182                 }
5183
5184                 /* Retry each device up to login retry count */
5185                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5186                                                 &base_vha->dpc_flags)) &&
5187                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5188                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5189
5190                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5191                             "Relogin scheduled.\n");
5192                         qla2x00_relogin(base_vha);
5193                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5194                             "Relogin end.\n");
5195                 }
5196 loop_resync_check:
5197                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5198                     &base_vha->dpc_flags)) {
5199
5200                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5201                             "Loop resync scheduled.\n");
5202
5203                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5204                             &base_vha->dpc_flags))) {
5205
5206                                 qla2x00_loop_resync(base_vha);
5207
5208                                 clear_bit(LOOP_RESYNC_ACTIVE,
5209                                                 &base_vha->dpc_flags);
5210                         }
5211
5212                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5213                             "Loop resync end.\n");
5214                 }
5215
5216                 if (IS_QLAFX00(ha))
5217                         goto intr_on_check;
5218
5219                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5220                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5221                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5222                         qla2xxx_flash_npiv_conf(base_vha);
5223                 }
5224
5225 intr_on_check:
5226                 if (!ha->interrupts_on)
5227                         ha->isp_ops->enable_intrs(ha);
5228
5229                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5230                                         &base_vha->dpc_flags)) {
5231                         if (ha->beacon_blink_led == 1)
5232                                 ha->isp_ops->beacon_blink(base_vha);
5233                 }
5234
5235                 if (!IS_QLAFX00(ha))
5236                         qla2x00_do_dpc_all_vps(base_vha);
5237
5238                 ha->dpc_active = 0;
5239 end_loop:
5240                 set_current_state(TASK_INTERRUPTIBLE);
5241         } /* End of while(1) */
5242         __set_current_state(TASK_RUNNING);
5243
5244         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5245             "DPC handler exiting.\n");
5246
5247         /*
5248          * Make sure that nobody tries to wake us up again.
5249          */
5250         ha->dpc_active = 0;
5251
5252         /* Cleanup any residual CTX SRBs. */
5253         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5254
5255         return 0;
5256 }
5257
5258 void
5259 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5260 {
5261         struct qla_hw_data *ha = vha->hw;
5262         struct task_struct *t = ha->dpc_thread;
5263
5264         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5265                 wake_up_process(t);
5266 }
5267
5268 /*
5269 *  qla2x00_rst_aen
5270 *      Processes asynchronous reset.
5271 *
5272 * Input:
5273 *      ha  = adapter block pointer.
5274 */
5275 static void
5276 qla2x00_rst_aen(scsi_qla_host_t *vha)
5277 {
5278         if (vha->flags.online && !vha->flags.reset_active &&
5279             !atomic_read(&vha->loop_down_timer) &&
5280             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5281                 do {
5282                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5283
5284                         /*
5285                          * Issue marker command only when we are going to start
5286                          * the I/O.
5287                          */
5288                         vha->marker_needed = 1;
5289                 } while (!atomic_read(&vha->loop_down_timer) &&
5290                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5291         }
5292 }
5293
5294 /**************************************************************************
5295 *   qla2x00_timer
5296 *
5297 * Description:
5298 *   One second timer
5299 *
5300 * Context: Interrupt
5301 ***************************************************************************/
5302 void
5303 qla2x00_timer(scsi_qla_host_t *vha)
5304 {
5305         unsigned long   cpu_flags = 0;
5306         int             start_dpc = 0;
5307         int             index;
5308         srb_t           *sp;
5309         uint16_t        w;
5310         struct qla_hw_data *ha = vha->hw;
5311         struct req_que *req;
5312
5313         if (ha->flags.eeh_busy) {
5314                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5315                     "EEH = %d, restarting timer.\n",
5316                     ha->flags.eeh_busy);
5317                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5318                 return;
5319         }
5320
5321         /*
5322          * Hardware read to raise pending EEH errors during mailbox waits. If
5323          * the read returns -1 then disable the board.
5324          */
5325         if (!pci_channel_offline(ha->pdev)) {
5326                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5327                 qla2x00_check_reg16_for_disconnect(vha, w);
5328         }
5329
5330         /* Make sure qla82xx_watchdog is run only for physical port */
5331         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5332                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5333                         start_dpc++;
5334                 if (IS_QLA82XX(ha))
5335                         qla82xx_watchdog(vha);
5336                 else if (IS_QLA8044(ha))
5337                         qla8044_watchdog(vha);
5338         }
5339
5340         if (!vha->vp_idx && IS_QLAFX00(ha))
5341                 qlafx00_timer_routine(vha);
5342
5343         /* Loop down handler. */
5344         if (atomic_read(&vha->loop_down_timer) > 0 &&
5345             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5346             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5347                 && vha->flags.online) {
5348
5349                 if (atomic_read(&vha->loop_down_timer) ==
5350                     vha->loop_down_abort_time) {
5351
5352                         ql_log(ql_log_info, vha, 0x6008,
5353                             "Loop down - aborting the queues before time expires.\n");
5354
5355                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5356                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5357
5358                         /*
5359                          * Schedule an ISP abort to return any FCP2-device
5360                          * commands.
5361                          */
5362                         /* NPIV - scan physical port only */
5363                         if (!vha->vp_idx) {
5364                                 spin_lock_irqsave(&ha->hardware_lock,
5365                                     cpu_flags);
5366                                 req = ha->req_q_map[0];
5367                                 for (index = 1;
5368                                     index < req->num_outstanding_cmds;
5369                                     index++) {
5370                                         fc_port_t *sfcp;
5371
5372                                         sp = req->outstanding_cmds[index];
5373                                         if (!sp)
5374                                                 continue;
5375                                         if (sp->type != SRB_SCSI_CMD)
5376                                                 continue;
5377                                         sfcp = sp->fcport;
5378                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5379                                                 continue;
5380
5381                                         if (IS_QLA82XX(ha))
5382                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5383                                                         &vha->dpc_flags);
5384                                         else
5385                                                 set_bit(ISP_ABORT_NEEDED,
5386                                                         &vha->dpc_flags);
5387                                         break;
5388                                 }
5389                                 spin_unlock_irqrestore(&ha->hardware_lock,
5390                                                                 cpu_flags);
5391                         }
5392                         start_dpc++;
5393                 }
5394
5395                 /* if the loop has been down for 4 minutes, reinit adapter */
5396                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5397                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5398                                 ql_log(ql_log_warn, vha, 0x6009,
5399                                     "Loop down - aborting ISP.\n");
5400
5401                                 if (IS_QLA82XX(ha))
5402                                         set_bit(FCOE_CTX_RESET_NEEDED,
5403                                                 &vha->dpc_flags);
5404                                 else
5405                                         set_bit(ISP_ABORT_NEEDED,
5406                                                 &vha->dpc_flags);
5407                         }
5408                 }
5409                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5410                     "Loop down - seconds remaining %d.\n",
5411                     atomic_read(&vha->loop_down_timer));
5412         }
5413         /* Check if beacon LED needs to be blinked for physical host only */
5414         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5415                 /* There is no beacon_blink function for ISP82xx */
5416                 if (!IS_P3P_TYPE(ha)) {
5417                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5418                         start_dpc++;
5419                 }
5420         }
5421
5422         /* Process any deferred work. */
5423         if (!list_empty(&vha->work_list))
5424                 start_dpc++;
5425
5426         /* Schedule the DPC routine if needed */
5427         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5428             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5429             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5430             start_dpc ||
5431             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5432             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5433             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5434             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5435             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5436             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5437                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5438                     "isp_abort_needed=%d loop_resync_needed=%d "
5439                     "fcport_update_needed=%d start_dpc=%d "
5440                     "reset_marker_needed=%d",
5441                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5442                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5443                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5444                     start_dpc,
5445                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5446                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5447                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5448                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5449                     "relogin_needed=%d.\n",
5450                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5451                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5452                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5453                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5454                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5455                 qla2xxx_wake_dpc(vha);
5456         }
5457
5458         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5459 }
5460
5461 /* Firmware interface routines. */
5462
5463 #define FW_BLOBS        11
5464 #define FW_ISP21XX      0
5465 #define FW_ISP22XX      1
5466 #define FW_ISP2300      2
5467 #define FW_ISP2322      3
5468 #define FW_ISP24XX      4
5469 #define FW_ISP25XX      5
5470 #define FW_ISP81XX      6
5471 #define FW_ISP82XX      7
5472 #define FW_ISP2031      8
5473 #define FW_ISP8031      9
5474 #define FW_ISP27XX      10
5475
5476 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5477 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5478 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5479 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5480 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5481 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5482 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5483 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5484 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5485 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5486 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5487
5488
5489 static DEFINE_MUTEX(qla_fw_lock);
5490
5491 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5492         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5493         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5494         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5495         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5496         { .name = FW_FILE_ISP24XX, },
5497         { .name = FW_FILE_ISP25XX, },
5498         { .name = FW_FILE_ISP81XX, },
5499         { .name = FW_FILE_ISP82XX, },
5500         { .name = FW_FILE_ISP2031, },
5501         { .name = FW_FILE_ISP8031, },
5502         { .name = FW_FILE_ISP27XX, },
5503 };
5504
5505 struct fw_blob *
5506 qla2x00_request_firmware(scsi_qla_host_t *vha)
5507 {
5508         struct qla_hw_data *ha = vha->hw;
5509         struct fw_blob *blob;
5510
5511         if (IS_QLA2100(ha)) {
5512                 blob = &qla_fw_blobs[FW_ISP21XX];
5513         } else if (IS_QLA2200(ha)) {
5514                 blob = &qla_fw_blobs[FW_ISP22XX];
5515         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5516                 blob = &qla_fw_blobs[FW_ISP2300];
5517         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5518                 blob = &qla_fw_blobs[FW_ISP2322];
5519         } else if (IS_QLA24XX_TYPE(ha)) {
5520                 blob = &qla_fw_blobs[FW_ISP24XX];
5521         } else if (IS_QLA25XX(ha)) {
5522                 blob = &qla_fw_blobs[FW_ISP25XX];
5523         } else if (IS_QLA81XX(ha)) {
5524                 blob = &qla_fw_blobs[FW_ISP81XX];
5525         } else if (IS_QLA82XX(ha)) {
5526                 blob = &qla_fw_blobs[FW_ISP82XX];
5527         } else if (IS_QLA2031(ha)) {
5528                 blob = &qla_fw_blobs[FW_ISP2031];
5529         } else if (IS_QLA8031(ha)) {
5530                 blob = &qla_fw_blobs[FW_ISP8031];
5531         } else if (IS_QLA27XX(ha)) {
5532                 blob = &qla_fw_blobs[FW_ISP27XX];
5533         } else {
5534                 return NULL;
5535         }
5536
5537         mutex_lock(&qla_fw_lock);
5538         if (blob->fw)
5539                 goto out;
5540
5541         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5542                 ql_log(ql_log_warn, vha, 0x0063,
5543                     "Failed to load firmware image (%s).\n", blob->name);
5544                 blob->fw = NULL;
5545                 blob = NULL;
5546                 goto out;
5547         }
5548
5549 out:
5550         mutex_unlock(&qla_fw_lock);
5551         return blob;
5552 }
5553
5554 static void
5555 qla2x00_release_firmware(void)
5556 {
5557         int idx;
5558
5559         mutex_lock(&qla_fw_lock);
5560         for (idx = 0; idx < FW_BLOBS; idx++)
5561                 release_firmware(qla_fw_blobs[idx].fw);
5562         mutex_unlock(&qla_fw_lock);
5563 }
5564
5565 static pci_ers_result_t
5566 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5567 {
5568         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5569         struct qla_hw_data *ha = vha->hw;
5570
5571         ql_dbg(ql_dbg_aer, vha, 0x9000,
5572             "PCI error detected, state %x.\n", state);
5573
5574         switch (state) {
5575         case pci_channel_io_normal:
5576                 ha->flags.eeh_busy = 0;
5577                 return PCI_ERS_RESULT_CAN_RECOVER;
5578         case pci_channel_io_frozen:
5579                 ha->flags.eeh_busy = 1;
5580                 /* For ISP82XX complete any pending mailbox cmd */
5581                 if (IS_QLA82XX(ha)) {
5582                         ha->flags.isp82xx_fw_hung = 1;
5583                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5584                         qla82xx_clear_pending_mbx(vha);
5585                 }
5586                 qla2x00_free_irqs(vha);
5587                 pci_disable_device(pdev);
5588                 /* Return back all IOs */
5589                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5590                 return PCI_ERS_RESULT_NEED_RESET;
5591         case pci_channel_io_perm_failure:
5592                 ha->flags.pci_channel_io_perm_failure = 1;
5593                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5594                 return PCI_ERS_RESULT_DISCONNECT;
5595         }
5596         return PCI_ERS_RESULT_NEED_RESET;
5597 }
5598
5599 static pci_ers_result_t
5600 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5601 {
5602         int risc_paused = 0;
5603         uint32_t stat;
5604         unsigned long flags;
5605         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5606         struct qla_hw_data *ha = base_vha->hw;
5607         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5608         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5609
5610         if (IS_QLA82XX(ha))
5611                 return PCI_ERS_RESULT_RECOVERED;
5612
5613         spin_lock_irqsave(&ha->hardware_lock, flags);
5614         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5615                 stat = RD_REG_DWORD(&reg->hccr);
5616                 if (stat & HCCR_RISC_PAUSE)
5617                         risc_paused = 1;
5618         } else if (IS_QLA23XX(ha)) {
5619                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5620                 if (stat & HSR_RISC_PAUSED)
5621                         risc_paused = 1;
5622         } else if (IS_FWI2_CAPABLE(ha)) {
5623                 stat = RD_REG_DWORD(&reg24->host_status);
5624                 if (stat & HSRX_RISC_PAUSED)
5625                         risc_paused = 1;
5626         }
5627         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5628
5629         if (risc_paused) {
5630                 ql_log(ql_log_info, base_vha, 0x9003,
5631                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5632                 ha->isp_ops->fw_dump(base_vha, 0);
5633
5634                 return PCI_ERS_RESULT_NEED_RESET;
5635         } else
5636                 return PCI_ERS_RESULT_RECOVERED;
5637 }
5638
5639 static uint32_t
5640 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5641 {
5642         uint32_t rval = QLA_FUNCTION_FAILED;
5643         uint32_t drv_active = 0;
5644         struct qla_hw_data *ha = base_vha->hw;
5645         int fn;
5646         struct pci_dev *other_pdev = NULL;
5647
5648         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5649             "Entered %s.\n", __func__);
5650
5651         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5652
5653         if (base_vha->flags.online) {
5654                 /* Abort all outstanding commands,
5655                  * so as to be requeued later */
5656                 qla2x00_abort_isp_cleanup(base_vha);
5657         }
5658
5659
5660         fn = PCI_FUNC(ha->pdev->devfn);
5661         while (fn > 0) {
5662                 fn--;
5663                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5664                     "Finding pci device at function = 0x%x.\n", fn);
5665                 other_pdev =
5666                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5667                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5668                     fn));
5669
5670                 if (!other_pdev)
5671                         continue;
5672                 if (atomic_read(&other_pdev->enable_cnt)) {
5673                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5674                             "Found PCI func available and enable at 0x%x.\n",
5675                             fn);
5676                         pci_dev_put(other_pdev);
5677                         break;
5678                 }
5679                 pci_dev_put(other_pdev);
5680         }
5681
5682         if (!fn) {
5683                 /* Reset owner */
5684                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5685                     "This devfn is reset owner = 0x%x.\n",
5686                     ha->pdev->devfn);
5687                 qla82xx_idc_lock(ha);
5688
5689                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5690                     QLA8XXX_DEV_INITIALIZING);
5691
5692                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5693                     QLA82XX_IDC_VERSION);
5694
5695                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5696                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5697                     "drv_active = 0x%x.\n", drv_active);
5698
5699                 qla82xx_idc_unlock(ha);
5700                 /* Reset if device is not already reset
5701                  * drv_active would be 0 if a reset has already been done
5702                  */
5703                 if (drv_active)
5704                         rval = qla82xx_start_firmware(base_vha);
5705                 else
5706                         rval = QLA_SUCCESS;
5707                 qla82xx_idc_lock(ha);
5708
5709                 if (rval != QLA_SUCCESS) {
5710                         ql_log(ql_log_info, base_vha, 0x900b,
5711                             "HW State: FAILED.\n");
5712                         qla82xx_clear_drv_active(ha);
5713                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5714                             QLA8XXX_DEV_FAILED);
5715                 } else {
5716                         ql_log(ql_log_info, base_vha, 0x900c,
5717                             "HW State: READY.\n");
5718                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5719                             QLA8XXX_DEV_READY);
5720                         qla82xx_idc_unlock(ha);
5721                         ha->flags.isp82xx_fw_hung = 0;
5722                         rval = qla82xx_restart_isp(base_vha);
5723                         qla82xx_idc_lock(ha);
5724                         /* Clear driver state register */
5725                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5726                         qla82xx_set_drv_active(base_vha);
5727                 }
5728                 qla82xx_idc_unlock(ha);
5729         } else {
5730                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5731                     "This devfn is not reset owner = 0x%x.\n",
5732                     ha->pdev->devfn);
5733                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5734                     QLA8XXX_DEV_READY)) {
5735                         ha->flags.isp82xx_fw_hung = 0;
5736                         rval = qla82xx_restart_isp(base_vha);
5737                         qla82xx_idc_lock(ha);
5738                         qla82xx_set_drv_active(base_vha);
5739                         qla82xx_idc_unlock(ha);
5740                 }
5741         }
5742         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5743
5744         return rval;
5745 }
5746
5747 static pci_ers_result_t
5748 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5749 {
5750         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5751         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5752         struct qla_hw_data *ha = base_vha->hw;
5753         struct rsp_que *rsp;
5754         int rc, retries = 10;
5755
5756         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5757             "Slot Reset.\n");
5758
5759         /* Workaround: qla2xxx driver which access hardware earlier
5760          * needs error state to be pci_channel_io_online.
5761          * Otherwise mailbox command timesout.
5762          */
5763         pdev->error_state = pci_channel_io_normal;
5764
5765         pci_restore_state(pdev);
5766
5767         /* pci_restore_state() clears the saved_state flag of the device
5768          * save restored state which resets saved_state flag
5769          */
5770         pci_save_state(pdev);
5771
5772         if (ha->mem_only)
5773                 rc = pci_enable_device_mem(pdev);
5774         else
5775                 rc = pci_enable_device(pdev);
5776
5777         if (rc) {
5778                 ql_log(ql_log_warn, base_vha, 0x9005,
5779                     "Can't re-enable PCI device after reset.\n");
5780                 goto exit_slot_reset;
5781         }
5782
5783         rsp = ha->rsp_q_map[0];
5784         if (qla2x00_request_irqs(ha, rsp))
5785                 goto exit_slot_reset;
5786
5787         if (ha->isp_ops->pci_config(base_vha))
5788                 goto exit_slot_reset;
5789
5790         if (IS_QLA82XX(ha)) {
5791                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5792                         ret = PCI_ERS_RESULT_RECOVERED;
5793                         goto exit_slot_reset;
5794                 } else
5795                         goto exit_slot_reset;
5796         }
5797
5798         while (ha->flags.mbox_busy && retries--)
5799                 msleep(1000);
5800
5801         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5802         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5803                 ret =  PCI_ERS_RESULT_RECOVERED;
5804         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5805
5806
5807 exit_slot_reset:
5808         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5809             "slot_reset return %x.\n", ret);
5810
5811         return ret;
5812 }
5813
5814 static void
5815 qla2xxx_pci_resume(struct pci_dev *pdev)
5816 {
5817         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5818         struct qla_hw_data *ha = base_vha->hw;
5819         int ret;
5820
5821         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5822             "pci_resume.\n");
5823
5824         ret = qla2x00_wait_for_hba_online(base_vha);
5825         if (ret != QLA_SUCCESS) {
5826                 ql_log(ql_log_fatal, base_vha, 0x9002,
5827                     "The device failed to resume I/O from slot/link_reset.\n");
5828         }
5829
5830         pci_cleanup_aer_uncorrect_error_status(pdev);
5831
5832         ha->flags.eeh_busy = 0;
5833 }
5834
5835 static void
5836 qla83xx_disable_laser(scsi_qla_host_t *vha)
5837 {
5838         uint32_t reg, data, fn;
5839         struct qla_hw_data *ha = vha->hw;
5840         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
5841
5842         /* pci func #/port # */
5843         ql_dbg(ql_dbg_init, vha, 0x004b,
5844             "Disabling Laser for hba: %p\n", vha);
5845
5846         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
5847                 (BIT_15|BIT_14|BIT_13|BIT_12));
5848
5849         fn = (fn >> 12);
5850
5851         if (fn & 1)
5852                 reg = PORT_1_2031;
5853         else
5854                 reg = PORT_0_2031;
5855
5856         data = LASER_OFF_2031;
5857
5858         qla83xx_wr_reg(vha, reg, data);
5859 }
5860
5861 static const struct pci_error_handlers qla2xxx_err_handler = {
5862         .error_detected = qla2xxx_pci_error_detected,
5863         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5864         .slot_reset = qla2xxx_pci_slot_reset,
5865         .resume = qla2xxx_pci_resume,
5866 };
5867
5868 static struct pci_device_id qla2xxx_pci_tbl[] = {
5869         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5870         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5871         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5872         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5873         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5874         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5875         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5876         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5877         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5878         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5879         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5880         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5881         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5882         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5883         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5884         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5885         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5886         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5887         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5888         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5889         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5890         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
5891         { 0 },
5892 };
5893 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5894
5895 static struct pci_driver qla2xxx_pci_driver = {
5896         .name           = QLA2XXX_DRIVER_NAME,
5897         .driver         = {
5898                 .owner          = THIS_MODULE,
5899         },
5900         .id_table       = qla2xxx_pci_tbl,
5901         .probe          = qla2x00_probe_one,
5902         .remove         = qla2x00_remove_one,
5903         .shutdown       = qla2x00_shutdown,
5904         .err_handler    = &qla2xxx_err_handler,
5905 };
5906
5907 static const struct file_operations apidev_fops = {
5908         .owner = THIS_MODULE,
5909         .llseek = noop_llseek,
5910 };
5911
5912 /**
5913  * qla2x00_module_init - Module initialization.
5914  **/
5915 static int __init
5916 qla2x00_module_init(void)
5917 {
5918         int ret = 0;
5919
5920         /* Allocate cache for SRBs. */
5921         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5922             SLAB_HWCACHE_ALIGN, NULL);
5923         if (srb_cachep == NULL) {
5924                 ql_log(ql_log_fatal, NULL, 0x0001,
5925                     "Unable to allocate SRB cache...Failing load!.\n");
5926                 return -ENOMEM;
5927         }
5928
5929         /* Initialize target kmem_cache and mem_pools */
5930         ret = qlt_init();
5931         if (ret < 0) {
5932                 kmem_cache_destroy(srb_cachep);
5933                 return ret;
5934         } else if (ret > 0) {
5935                 /*
5936                  * If initiator mode is explictly disabled by qlt_init(),
5937                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5938                  * performing scsi_scan_target() during LOOP UP event.
5939                  */
5940                 qla2xxx_transport_functions.disable_target_scan = 1;
5941                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5942         }
5943
5944         /* Derive version string. */
5945         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5946         if (ql2xextended_error_logging)
5947                 strcat(qla2x00_version_str, "-debug");
5948
5949         qla2xxx_transport_template =
5950             fc_attach_transport(&qla2xxx_transport_functions);
5951         if (!qla2xxx_transport_template) {
5952                 kmem_cache_destroy(srb_cachep);
5953                 ql_log(ql_log_fatal, NULL, 0x0002,
5954                     "fc_attach_transport failed...Failing load!.\n");
5955                 qlt_exit();
5956                 return -ENODEV;
5957         }
5958
5959         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5960         if (apidev_major < 0) {
5961                 ql_log(ql_log_fatal, NULL, 0x0003,
5962                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5963         }
5964
5965         qla2xxx_transport_vport_template =
5966             fc_attach_transport(&qla2xxx_transport_vport_functions);
5967         if (!qla2xxx_transport_vport_template) {
5968                 kmem_cache_destroy(srb_cachep);
5969                 qlt_exit();
5970                 fc_release_transport(qla2xxx_transport_template);
5971                 ql_log(ql_log_fatal, NULL, 0x0004,
5972                     "fc_attach_transport vport failed...Failing load!.\n");
5973                 return -ENODEV;
5974         }
5975         ql_log(ql_log_info, NULL, 0x0005,
5976             "QLogic Fibre Channel HBA Driver: %s.\n",
5977             qla2x00_version_str);
5978         ret = pci_register_driver(&qla2xxx_pci_driver);
5979         if (ret) {
5980                 kmem_cache_destroy(srb_cachep);
5981                 qlt_exit();
5982                 fc_release_transport(qla2xxx_transport_template);
5983                 fc_release_transport(qla2xxx_transport_vport_template);
5984                 ql_log(ql_log_fatal, NULL, 0x0006,
5985                     "pci_register_driver failed...ret=%d Failing load!.\n",
5986                     ret);
5987         }
5988         return ret;
5989 }
5990
5991 /**
5992  * qla2x00_module_exit - Module cleanup.
5993  **/
5994 static void __exit
5995 qla2x00_module_exit(void)
5996 {
5997         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5998         pci_unregister_driver(&qla2xxx_pci_driver);
5999         qla2x00_release_firmware();
6000         kmem_cache_destroy(srb_cachep);
6001         qlt_exit();
6002         if (ctx_cachep)
6003                 kmem_cache_destroy(ctx_cachep);
6004         fc_release_transport(qla2xxx_transport_template);
6005         fc_release_transport(qla2xxx_transport_vport_template);
6006 }
6007
6008 module_init(qla2x00_module_init);
6009 module_exit(qla2x00_module_exit);
6010
6011 MODULE_AUTHOR("QLogic Corporation");
6012 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6013 MODULE_LICENSE("GPL");
6014 MODULE_VERSION(QLA2XXX_VERSION);
6015 MODULE_FIRMWARE(FW_FILE_ISP21XX);
6016 MODULE_FIRMWARE(FW_FILE_ISP22XX);
6017 MODULE_FIRMWARE(FW_FILE_ISP2300);
6018 MODULE_FIRMWARE(FW_FILE_ISP2322);
6019 MODULE_FIRMWARE(FW_FILE_ISP24XX);
6020 MODULE_FIRMWARE(FW_FILE_ISP25XX);