drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     32
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 32.");
 122
 123 int ql2xenabledif = 2;
 124 module_param(ql2xenabledif, int, S_IRUGO);
 125 MODULE_PARM_DESC(ql2xenabledif,
 126                 " Enable T10-CRC-DIF:\n"
 127                 " Default is 2.\n"
 128                 "  0 -- No DIF Support\n"
 129                 "  1 -- Enable DIF for all types\n"
 130                 "  2 -- Enable DIF for all types, except Type 0.\n");
 131
 132 int ql2xenablehba_err_chk = 2;
 133 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 134 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 135                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 136                 " Default is 2.\n"
 137                 "  0 -- Error isolation disabled\n"
 138                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 139                 "  2 -- Error isolation enabled for all Types\n");
 140
 141 int ql2xiidmaenable=1;
 142 module_param(ql2xiidmaenable, int, S_IRUGO);
 143 MODULE_PARM_DESC(ql2xiidmaenable,
 144                 "Enables iIDMA settings "
 145                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 146
 147 int ql2xmqsupport = 1;
 148 module_param(ql2xmqsupport, int, S_IRUGO);
 149 MODULE_PARM_DESC(ql2xmqsupport,
 150                 "Enable on demand multiple queue pairs support "
 151                 "Default is 1 for supported. "
 152                 "Set it to 0 to turn off mq qpair support.");
 153
 154 int ql2xfwloadbin;
 155 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 156 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 157 MODULE_PARM_DESC(ql2xfwloadbin,
 158                 "Option to specify location from which to load ISP firmware:.\n"
 159                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 160                 "      interface.\n"
 161                 " 1 -- load firmware from flash.\n"
 162                 " 0 -- use default semantics.\n");
 163
 164 int ql2xetsenable;
 165 module_param(ql2xetsenable, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xetsenable,
 167                 "Enables firmware ETS burst."
 168                 "Default is 0 - skip ETS enablement.");
 169
 170 int ql2xdbwr = 1;
 171 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 172 MODULE_PARM_DESC(ql2xdbwr,
 173                 "Option to specify scheme for request queue posting.\n"
 174                 " 0 -- Regular doorbell.\n"
 175                 " 1 -- CAMRAM doorbell (faster).\n");
 176
 177 int ql2xtargetreset = 1;
 178 module_param(ql2xtargetreset, int, S_IRUGO);
 179 MODULE_PARM_DESC(ql2xtargetreset,
 180                  "Enable target reset."
 181                  "Default is 1 - use hw defaults.");
 182
 183 int ql2xgffidenable;
 184 module_param(ql2xgffidenable, int, S_IRUGO);
 185 MODULE_PARM_DESC(ql2xgffidenable,
 186                 "Enables GFF_ID checks of port type. "
 187                 "Default is 0 - Do not use GFF_ID information.");
 188
 189 int ql2xasynctmfenable;
 190 module_param(ql2xasynctmfenable, int, S_IRUGO);
 191 MODULE_PARM_DESC(ql2xasynctmfenable,
 192                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 193                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 194
 195 int ql2xdontresethba;
 196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 197 MODULE_PARM_DESC(ql2xdontresethba,
 198                 "Option to specify reset behaviour.\n"
 199                 " 0 (Default) -- Reset on failure.\n"
 200                 " 1 -- Do not reset on failure.\n");
 201
 202 uint64_t ql2xmaxlun = MAX_LUNS;
 203 module_param(ql2xmaxlun, ullong, S_IRUGO);
 204 MODULE_PARM_DESC(ql2xmaxlun,
 205                 "Defines the maximum LU number to register with the SCSI "
 206                 "midlayer. Default is 65535.");
 207
 208 int ql2xmdcapmask = 0x1F;
 209 module_param(ql2xmdcapmask, int, S_IRUGO);
 210 MODULE_PARM_DESC(ql2xmdcapmask,
 211                 "Set the Minidump driver capture mask level. "
 212                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 213
 214 int ql2xmdenable = 1;
 215 module_param(ql2xmdenable, int, S_IRUGO);
 216 MODULE_PARM_DESC(ql2xmdenable,
 217                 "Enable/disable MiniDump. "
 218                 "0 - MiniDump disabled. "
 219                 "1 (Default) - MiniDump enabled.");
 220
 221 int ql2xexlogins = 0;
 222 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 223 MODULE_PARM_DESC(ql2xexlogins,
 224                  "Number of extended Logins. "
 225                  "0 (Default)- Disabled.");
 226
 227 int ql2xexchoffld = 0;
 228 module_param(ql2xexchoffld, uint, S_IRUGO|S_IWUSR);
 229 MODULE_PARM_DESC(ql2xexchoffld,
 230                  "Number of exchanges to offload. "
 231                  "0 (Default)- Disabled.");
 232
 233 int ql2xfwholdabts = 0;
 234 module_param(ql2xfwholdabts, int, S_IRUGO);
 235 MODULE_PARM_DESC(ql2xfwholdabts,
 236                 "Allow FW to hold status IOCB until ABTS rsp received. "
 237                 "0 (Default) Do not set fw option. "
 238                 "1 - Set fw option to hold ABTS.");
 239
 240 int ql2xmvasynctoatio = 1;
 241 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 242 MODULE_PARM_DESC(ql2xmvasynctoatio,
 243                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 244                 "0 (Default). Do not move IOCBs"
 245                 "1 - Move IOCBs.");
 246
 247 /*
 248  * SCSI host template entry points
 249  */
 250 static int qla2xxx_slave_configure(struct scsi_device * device);
 251 static int qla2xxx_slave_alloc(struct scsi_device *);
 252 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 253 static void qla2xxx_scan_start(struct Scsi_Host *);
 254 static void qla2xxx_slave_destroy(struct scsi_device *);
 255 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 256 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 257 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 258 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 259 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 260 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 261
 262 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 263 static void qla2x00_free_device(scsi_qla_host_t *);
 264 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 265 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 266
 267 struct scsi_host_template qla2xxx_driver_template = {
 268         .module                 = THIS_MODULE,
 269         .name                   = QLA2XXX_DRIVER_NAME,
 270         .queuecommand           = qla2xxx_queuecommand,
 271
 272         .eh_timed_out           = fc_eh_timed_out,
 273         .eh_abort_handler       = qla2xxx_eh_abort,
 274         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 275         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 276         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 277         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 278
 279         .slave_configure        = qla2xxx_slave_configure,
 280
 281         .slave_alloc            = qla2xxx_slave_alloc,
 282         .slave_destroy          = qla2xxx_slave_destroy,
 283         .scan_finished          = qla2xxx_scan_finished,
 284         .scan_start             = qla2xxx_scan_start,
 285         .change_queue_depth     = scsi_change_queue_depth,
 286         .map_queues             = qla2xxx_map_queues,
 287         .this_id                = -1,
 288         .cmd_per_lun            = 3,
 289         .use_clustering         = ENABLE_CLUSTERING,
 290         .sg_tablesize           = SG_ALL,
 291
 292         .max_sectors            = 0xFFFF,
 293         .shost_attrs            = qla2x00_host_attrs,
 294
 295         .supported_mode         = MODE_INITIATOR,
 296         .track_queue_depth      = 1,
 297 };
 298
 299 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 300 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 301
 302 /* TODO Convert to inlines
 303  *
 304  * Timer routines
 305  */
 306
 307 __inline__ void
 308 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 309 {
 310         init_timer(&vha->timer);
 311         vha->timer.expires = jiffies + interval * HZ;
 312         vha->timer.data = (unsigned long)vha;
 313         vha->timer.function = (void (*)(unsigned long))func;
 314         add_timer(&vha->timer);
 315         vha->timer_active = 1;
 316 }
 317
 318 static inline void
 319 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 320 {
 321         /* Currently used for 82XX only. */
 322         if (vha->device_flags & DFLG_DEV_FAILED) {
 323                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 324                     "Device in a failed state, returning.\n");
 325                 return;
 326         }
 327
 328         mod_timer(&vha->timer, jiffies + interval * HZ);
 329 }
 330
 331 static __inline__ void
 332 qla2x00_stop_timer(scsi_qla_host_t *vha)
 333 {
 334         del_timer_sync(&vha->timer);
 335         vha->timer_active = 0;
 336 }
 337
 338 static int qla2x00_do_dpc(void *data);
 339
 340 static void qla2x00_rst_aen(scsi_qla_host_t *);
 341
 342 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 343         struct req_que **, struct rsp_que **);
 344 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 345 static void qla2x00_mem_free(struct qla_hw_data *);
 346 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 347         struct qla_qpair *qpair);
 348
 349 /* -------------------------------------------------------------------------- */
 350 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 351                                 struct rsp_que *rsp)
 352 {
 353         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 354         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 355                                 GFP_KERNEL);
 356         if (!ha->req_q_map) {
 357                 ql_log(ql_log_fatal, vha, 0x003b,
 358                     "Unable to allocate memory for request queue ptrs.\n");
 359                 goto fail_req_map;
 360         }
 361
 362         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 363                                 GFP_KERNEL);
 364         if (!ha->rsp_q_map) {
 365                 ql_log(ql_log_fatal, vha, 0x003c,
 366                     "Unable to allocate memory for response queue ptrs.\n");
 367                 goto fail_rsp_map;
 368         }
 369
 370         if (ql2xmqsupport && ha->max_qpairs) {
 371                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 372                         GFP_KERNEL);
 373                 if (!ha->queue_pair_map) {
 374                         ql_log(ql_log_fatal, vha, 0x0180,
 375                             "Unable to allocate memory for queue pair ptrs.\n");
 376                         goto fail_qpair_map;
 377                 }
 378                 ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 379                 if (ha->base_qpair == NULL) {
 380                         ql_log(ql_log_warn, vha, 0x0182,
 381                             "Failed to allocate base queue pair memory.\n");
 382                         goto fail_base_qpair;
 383                 }
 384                 ha->base_qpair->req = req;
 385                 ha->base_qpair->rsp = rsp;
 386         }
 387
 388         /*
 389          * Make sure we record at least the request and response queue zero in
 390          * case we need to free them if part of the probe fails.
 391          */
 392         ha->rsp_q_map[0] = rsp;
 393         ha->req_q_map[0] = req;
 394         set_bit(0, ha->rsp_qid_map);
 395         set_bit(0, ha->req_qid_map);
 396         return 1;
 397
 398 fail_base_qpair:
 399         kfree(ha->queue_pair_map);
 400 fail_qpair_map:
 401         kfree(ha->rsp_q_map);
 402         ha->rsp_q_map = NULL;
 403 fail_rsp_map:
 404         kfree(ha->req_q_map);
 405         ha->req_q_map = NULL;
 406 fail_req_map:
 407         return -ENOMEM;
 408 }
 409
 410 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 411 {
 412         if (IS_QLAFX00(ha)) {
 413                 if (req && req->ring_fx00)
 414                         dma_free_coherent(&ha->pdev->dev,
 415                             (req->length_fx00 + 1) * sizeof(request_t),
 416                             req->ring_fx00, req->dma_fx00);
 417         } else if (req && req->ring)
 418                 dma_free_coherent(&ha->pdev->dev,
 419                 (req->length + 1) * sizeof(request_t),
 420                 req->ring, req->dma);
 421
 422         if (req)
 423                 kfree(req->outstanding_cmds);
 424
 425         kfree(req);
 426 }
 427
 428 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 429 {
 430         if (IS_QLAFX00(ha)) {
 431                 if (rsp && rsp->ring)
 432                         dma_free_coherent(&ha->pdev->dev,
 433                             (rsp->length_fx00 + 1) * sizeof(request_t),
 434                             rsp->ring_fx00, rsp->dma_fx00);
 435         } else if (rsp && rsp->ring) {
 436                 dma_free_coherent(&ha->pdev->dev,
 437                 (rsp->length + 1) * sizeof(response_t),
 438                 rsp->ring, rsp->dma);
 439         }
 440         kfree(rsp);
 441 }
 442
 443 static void qla2x00_free_queues(struct qla_hw_data *ha)
 444 {
 445         struct req_que *req;
 446         struct rsp_que *rsp;
 447         int cnt;
 448         unsigned long flags;
 449
 450         spin_lock_irqsave(&ha->hardware_lock, flags);
 451         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 452                 if (!test_bit(cnt, ha->req_qid_map))
 453                         continue;
 454
 455                 req = ha->req_q_map[cnt];
 456                 clear_bit(cnt, ha->req_qid_map);
 457                 ha->req_q_map[cnt] = NULL;
 458
 459                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 460                 qla2x00_free_req_que(ha, req);
 461                 spin_lock_irqsave(&ha->hardware_lock, flags);
 462         }
 463         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 464
 465         kfree(ha->req_q_map);
 466         ha->req_q_map = NULL;
 467
 468
 469         spin_lock_irqsave(&ha->hardware_lock, flags);
 470         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 471                 if (!test_bit(cnt, ha->rsp_qid_map))
 472                         continue;
 473
 474                 rsp = ha->rsp_q_map[cnt];
 475                 clear_bit(cnt, ha->rsp_qid_map);
 476                 ha->rsp_q_map[cnt] =  NULL;
 477                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 478                 qla2x00_free_rsp_que(ha, rsp);
 479                 spin_lock_irqsave(&ha->hardware_lock, flags);
 480         }
 481         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 482
 483         kfree(ha->rsp_q_map);
 484         ha->rsp_q_map = NULL;
 485 }
 486
 487 static char *
 488 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 489 {
 490         struct qla_hw_data *ha = vha->hw;
 491         static char *pci_bus_modes[] = {
 492                 "33", "66", "100", "133",
 493         };
 494         uint16_t pci_bus;
 495
 496         strcpy(str, "PCI");
 497         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 498         if (pci_bus) {
 499                 strcat(str, "-X (");
 500                 strcat(str, pci_bus_modes[pci_bus]);
 501         } else {
 502                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 503                 strcat(str, " (");
 504                 strcat(str, pci_bus_modes[pci_bus]);
 505         }
 506         strcat(str, " MHz)");
 507
 508         return (str);
 509 }
 510
 511 static char *
 512 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 513 {
 514         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 515         struct qla_hw_data *ha = vha->hw;
 516         uint32_t pci_bus;
 517
 518         if (pci_is_pcie(ha->pdev)) {
 519                 char lwstr[6];
 520                 uint32_t lstat, lspeed, lwidth;
 521
 522                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 523                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 524                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 525
 526                 strcpy(str, "PCIe (");
 527                 switch (lspeed) {
 528                 case 1:
 529                         strcat(str, "2.5GT/s ");
 530                         break;
 531                 case 2:
 532                         strcat(str, "5.0GT/s ");
 533                         break;
 534                 case 3:
 535                         strcat(str, "8.0GT/s ");
 536                         break;
 537                 default:
 538                         strcat(str, "<unknown> ");
 539                         break;
 540                 }
 541                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 542                 strcat(str, lwstr);
 543
 544                 return str;
 545         }
 546
 547         strcpy(str, "PCI");
 548         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 549         if (pci_bus == 0 || pci_bus == 8) {
 550                 strcat(str, " (");
 551                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 552         } else {
 553                 strcat(str, "-X ");
 554                 if (pci_bus & BIT_2)
 555                         strcat(str, "Mode 2");
 556                 else
 557                         strcat(str, "Mode 1");
 558                 strcat(str, " (");
 559                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 560         }
 561         strcat(str, " MHz)");
 562
 563         return str;
 564 }
 565
 566 static char *
 567 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 568 {
 569         char un_str[10];
 570         struct qla_hw_data *ha = vha->hw;
 571
 572         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 573             ha->fw_minor_version, ha->fw_subminor_version);
 574
 575         if (ha->fw_attributes & BIT_9) {
 576                 strcat(str, "FLX");
 577                 return (str);
 578         }
 579
 580         switch (ha->fw_attributes & 0xFF) {
 581         case 0x7:
 582                 strcat(str, "EF");
 583                 break;
 584         case 0x17:
 585                 strcat(str, "TP");
 586                 break;
 587         case 0x37:
 588                 strcat(str, "IP");
 589                 break;
 590         case 0x77:
 591                 strcat(str, "VI");
 592                 break;
 593         default:
 594                 sprintf(un_str, "(%x)", ha->fw_attributes);
 595                 strcat(str, un_str);
 596                 break;
 597         }
 598         if (ha->fw_attributes & 0x100)
 599                 strcat(str, "X");
 600
 601         return (str);
 602 }
 603
 604 static char *
 605 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 606 {
 607         struct qla_hw_data *ha = vha->hw;
 608
 609         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 610             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 611         return str;
 612 }
 613
 614 void
 615 qla2x00_sp_free_dma(void *ptr)
 616 {
 617         srb_t *sp = ptr;
 618         struct qla_hw_data *ha = sp->vha->hw;
 619         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 620         void *ctx = GET_CMD_CTX_SP(sp);
 621
 622         if (sp->flags & SRB_DMA_VALID) {
 623                 scsi_dma_unmap(cmd);
 624                 sp->flags &= ~SRB_DMA_VALID;
 625         }
 626
 627         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 628                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 629                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 630                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 631         }
 632
 633         if (!ctx)
 634                 goto end;
 635
 636         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 637                 /* List assured to be having elements */
 638                 qla2x00_clean_dsd_pool(ha, ctx);
 639                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 640         }
 641
 642         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 643                 struct crc_context *ctx0 = ctx;
 644
 645                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 646                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 647         }
 648
 649         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 650                 struct ct6_dsd *ctx1 = ctx;
 651
 652                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 653                     ctx1->fcp_cmnd_dma);
 654                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 655                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 656                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 657                 mempool_free(ctx1, ha->ctx_mempool);
 658         }
 659
 660 end:
 661         CMD_SP(cmd) = NULL;
 662         qla2x00_rel_sp(sp);
 663 }
 664
 665 void
 666 qla2x00_sp_compl(void *ptr, int res)
 667 {
 668         srb_t *sp = ptr;
 669         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 670
 671         cmd->result = res;
 672
 673         if (atomic_read(&sp->ref_count) == 0) {
 674                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 675                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 676                     sp, GET_CMD_SP(sp));
 677                 if (ql2xextended_error_logging & ql_dbg_io)
 678                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 679                 return;
 680         }
 681         if (!atomic_dec_and_test(&sp->ref_count))
 682                 return;
 683
 684         qla2x00_sp_free_dma(sp);
 685         cmd->scsi_done(cmd);
 686 }
 687
 688 void
 689 qla2xxx_qpair_sp_free_dma(void *ptr)
 690 {
 691         srb_t *sp = (srb_t *)ptr;
 692         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 693         struct qla_hw_data *ha = sp->fcport->vha->hw;
 694         void *ctx = GET_CMD_CTX_SP(sp);
 695
 696         if (sp->flags & SRB_DMA_VALID) {
 697                 scsi_dma_unmap(cmd);
 698                 sp->flags &= ~SRB_DMA_VALID;
 699         }
 700
 701         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 702                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 703                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 704                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 705         }
 706
 707         if (!ctx)
 708                 goto end;
 709
 710         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 711                 /* List assured to be having elements */
 712                 qla2x00_clean_dsd_pool(ha, ctx);
 713                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 714         }
 715
 716         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 717                 struct crc_context *ctx0 = ctx;
 718
 719                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 720                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 721         }
 722
 723         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 724                 struct ct6_dsd *ctx1 = ctx;
 725                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 726                     ctx1->fcp_cmnd_dma);
 727                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 728                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 729                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 730                 mempool_free(ctx1, ha->ctx_mempool);
 731         }
 732 end:
 733         CMD_SP(cmd) = NULL;
 734         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 735 }
 736
 737 void
 738 qla2xxx_qpair_sp_compl(void *ptr, int res)
 739 {
 740         srb_t *sp = ptr;
 741         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 742
 743         cmd->result = res;
 744
 745         if (atomic_read(&sp->ref_count) == 0) {
 746                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 747                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 748                     sp, GET_CMD_SP(sp));
 749                 if (ql2xextended_error_logging & ql_dbg_io)
 750                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 751                 return;
 752         }
 753         if (!atomic_dec_and_test(&sp->ref_count))
 754                 return;
 755
 756         qla2xxx_qpair_sp_free_dma(sp);
 757         cmd->scsi_done(cmd);
 758 }
 759
 760 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 761  * does not have the changes necessary to avoid taking host->host_lock.
 762  */
 763 static int
 764 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 765 {
 766         scsi_qla_host_t *vha = shost_priv(host);
 767         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 768         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 769         struct qla_hw_data *ha = vha->hw;
 770         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 771         srb_t *sp;
 772         int rval;
 773         struct qla_qpair *qpair = NULL;
 774         uint32_t tag;
 775         uint16_t hwq;
 776
 777         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 778                 cmd->result = DID_NO_CONNECT << 16;
 779                 goto qc24_fail_command;
 780         }
 781
 782         if (ha->mqenable) {
 783                 if (shost_use_blk_mq(vha->host)) {
 784                         tag = blk_mq_unique_tag(cmd->request);
 785                         hwq = blk_mq_unique_tag_to_hwq(tag);
 786                         qpair = ha->queue_pair_map[hwq];
 787                 } else if (vha->vp_idx && vha->qpair) {
 788                         qpair = vha->qpair;
 789                 }
 790
 791                 if (qpair)
 792                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 793         }
 794
 795         if (ha->flags.eeh_busy) {
 796                 if (ha->flags.pci_channel_io_perm_failure) {
 797                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 798                             "PCI Channel IO permanent failure, exiting "
 799                             "cmd=%p.\n", cmd);
 800                         cmd->result = DID_NO_CONNECT << 16;
 801                 } else {
 802                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 803                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 804                         cmd->result = DID_REQUEUE << 16;
 805                 }
 806                 goto qc24_fail_command;
 807         }
 808
 809         rval = fc_remote_port_chkready(rport);
 810         if (rval) {
 811                 cmd->result = rval;
 812                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 813                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 814                     cmd, rval);
 815                 goto qc24_fail_command;
 816         }
 817
 818         if (!vha->flags.difdix_supported &&
 819                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 820                         ql_dbg(ql_dbg_io, vha, 0x3004,
 821                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 822                             cmd);
 823                         cmd->result = DID_NO_CONNECT << 16;
 824                         goto qc24_fail_command;
 825         }
 826
 827         if (!fcport) {
 828                 cmd->result = DID_NO_CONNECT << 16;
 829                 goto qc24_fail_command;
 830         }
 831
 832         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 833                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 834                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 835                         ql_dbg(ql_dbg_io, vha, 0x3005,
 836                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 837                             atomic_read(&fcport->state),
 838                             atomic_read(&base_vha->loop_state));
 839                         cmd->result = DID_NO_CONNECT << 16;
 840                         goto qc24_fail_command;
 841                 }
 842                 goto qc24_target_busy;
 843         }
 844
 845         /*
 846          * Return target busy if we've received a non-zero retry_delay_timer
 847          * in a FCP_RSP.
 848          */
 849         if (fcport->retry_delay_timestamp == 0) {
 850                 /* retry delay not set */
 851         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 852                 fcport->retry_delay_timestamp = 0;
 853         else
 854                 goto qc24_target_busy;
 855
 856         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 857         if (!sp)
 858                 goto qc24_host_busy;
 859
 860         sp->u.scmd.cmd = cmd;
 861         sp->type = SRB_SCSI_CMD;
 862         atomic_set(&sp->ref_count, 1);
 863         CMD_SP(cmd) = (void *)sp;
 864         sp->free = qla2x00_sp_free_dma;
 865         sp->done = qla2x00_sp_compl;
 866
 867         rval = ha->isp_ops->start_scsi(sp);
 868         if (rval != QLA_SUCCESS) {
 869                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 870                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 871                 goto qc24_host_busy_free_sp;
 872         }
 873
 874         return 0;
 875
 876 qc24_host_busy_free_sp:
 877         qla2x00_sp_free_dma(sp);
 878
 879 qc24_host_busy:
 880         return SCSI_MLQUEUE_HOST_BUSY;
 881
 882 qc24_target_busy:
 883         return SCSI_MLQUEUE_TARGET_BUSY;
 884
 885 qc24_fail_command:
 886         cmd->scsi_done(cmd);
 887
 888         return 0;
 889 }
 890
 891 /* For MQ supported I/O */
 892 int
 893 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 894     struct qla_qpair *qpair)
 895 {
 896         scsi_qla_host_t *vha = shost_priv(host);
 897         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 898         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 899         struct qla_hw_data *ha = vha->hw;
 900         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 901         srb_t *sp;
 902         int rval;
 903
 904         rval = fc_remote_port_chkready(rport);
 905         if (rval) {
 906                 cmd->result = rval;
 907                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 908                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 909                     cmd, rval);
 910                 goto qc24_fail_command;
 911         }
 912
 913         if (!fcport) {
 914                 cmd->result = DID_NO_CONNECT << 16;
 915                 goto qc24_fail_command;
 916         }
 917
 918         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 919                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 920                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 921                         ql_dbg(ql_dbg_io, vha, 0x3077,
 922                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 923                             atomic_read(&fcport->state),
 924                             atomic_read(&base_vha->loop_state));
 925                         cmd->result = DID_NO_CONNECT << 16;
 926                         goto qc24_fail_command;
 927                 }
 928                 goto qc24_target_busy;
 929         }
 930
 931         /*
 932          * Return target busy if we've received a non-zero retry_delay_timer
 933          * in a FCP_RSP.
 934          */
 935         if (fcport->retry_delay_timestamp == 0) {
 936                 /* retry delay not set */
 937         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 938                 fcport->retry_delay_timestamp = 0;
 939         else
 940                 goto qc24_target_busy;
 941
 942         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
 943         if (!sp)
 944                 goto qc24_host_busy;
 945
 946         sp->u.scmd.cmd = cmd;
 947         sp->type = SRB_SCSI_CMD;
 948         atomic_set(&sp->ref_count, 1);
 949         CMD_SP(cmd) = (void *)sp;
 950         sp->free = qla2xxx_qpair_sp_free_dma;
 951         sp->done = qla2xxx_qpair_sp_compl;
 952         sp->qpair = qpair;
 953
 954         rval = ha->isp_ops->start_scsi_mq(sp);
 955         if (rval != QLA_SUCCESS) {
 956                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
 957                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 958                 if (rval == QLA_INTERFACE_ERROR)
 959                         goto qc24_fail_command;
 960                 goto qc24_host_busy_free_sp;
 961         }
 962
 963         return 0;
 964
 965 qc24_host_busy_free_sp:
 966         qla2xxx_qpair_sp_free_dma(sp);
 967
 968 qc24_host_busy:
 969         return SCSI_MLQUEUE_HOST_BUSY;
 970
 971 qc24_target_busy:
 972         return SCSI_MLQUEUE_TARGET_BUSY;
 973
 974 qc24_fail_command:
 975         cmd->scsi_done(cmd);
 976
 977         return 0;
 978 }
 979
 980 /*
 981  * qla2x00_eh_wait_on_command
 982  *    Waits for the command to be returned by the Firmware for some
 983  *    max time.
 984  *
 985  * Input:
 986  *    cmd = Scsi Command to wait on.
 987  *
 988  * Return:
 989  *    Not Found : 0
 990  *    Found : 1
 991  */
 992 static int
 993 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 994 {
 995 #define ABORT_POLLING_PERIOD    1000
 996 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 997         unsigned long wait_iter = ABORT_WAIT_ITER;
 998         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 999         struct qla_hw_data *ha = vha->hw;
1000         int ret = QLA_SUCCESS;
1001
1002         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1003                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1004                     "Return:eh_wait.\n");
1005                 return ret;
1006         }
1007
1008         while (CMD_SP(cmd) && wait_iter--) {
1009                 msleep(ABORT_POLLING_PERIOD);
1010         }
1011         if (CMD_SP(cmd))
1012                 ret = QLA_FUNCTION_FAILED;
1013
1014         return ret;
1015 }
1016
1017 /*
1018  * qla2x00_wait_for_hba_online
1019  *    Wait till the HBA is online after going through
1020  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1021  *    finally HBA is disabled ie marked offline
1022  *
1023  * Input:
1024  *     ha - pointer to host adapter structure
1025  *
1026  * Note:
1027  *    Does context switching-Release SPIN_LOCK
1028  *    (if any) before calling this routine.
1029  *
1030  * Return:
1031  *    Success (Adapter is online) : 0
1032  *    Failed  (Adapter is offline/disabled) : 1
1033  */
1034 int
1035 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1036 {
1037         int             return_status;
1038         unsigned long   wait_online;
1039         struct qla_hw_data *ha = vha->hw;
1040         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1041
1042         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1043         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1044             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1045             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1046             ha->dpc_active) && time_before(jiffies, wait_online)) {
1047
1048                 msleep(1000);
1049         }
1050         if (base_vha->flags.online)
1051                 return_status = QLA_SUCCESS;
1052         else
1053                 return_status = QLA_FUNCTION_FAILED;
1054
1055         return (return_status);
1056 }
1057
1058 static inline int test_fcport_count(scsi_qla_host_t *vha)
1059 {
1060         struct qla_hw_data *ha = vha->hw;
1061         unsigned long flags;
1062         int res;
1063
1064         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1065         ql_dbg(ql_dbg_init, vha, 0xffff,
1066                 "tgt %p, fcport_count=%d\n",
1067                 vha, vha->fcport_count);
1068         res = (vha->fcport_count == 0);
1069         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1070
1071         return res;
1072 }
1073
1074 /*
1075  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1076  * it has dependency on UNLOADING flag to stop device discovery
1077  */
1078 static void
1079 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1080 {
1081         qla2x00_mark_all_devices_lost(vha, 0);
1082
1083         wait_event(vha->fcport_waitQ, test_fcport_count(vha));
1084 }
1085
1086 /*
1087  * qla2x00_wait_for_hba_ready
1088  * Wait till the HBA is ready before doing driver unload
1089  *
1090  * Input:
1091  *     ha - pointer to host adapter structure
1092  *
1093  * Note:
1094  *    Does context switching-Release SPIN_LOCK
1095  *    (if any) before calling this routine.
1096  *
1097  */
1098 static void
1099 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1100 {
1101         struct qla_hw_data *ha = vha->hw;
1102         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1103
1104         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1105                 ha->flags.mbox_busy) ||
1106                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1107                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1108                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1109                         break;
1110                 msleep(1000);
1111         }
1112 }
1113
1114 int
1115 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1116 {
1117         int             return_status;
1118         unsigned long   wait_reset;
1119         struct qla_hw_data *ha = vha->hw;
1120         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1121
1122         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1123         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1124             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1125             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1126             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1127
1128                 msleep(1000);
1129
1130                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1131                     ha->flags.chip_reset_done)
1132                         break;
1133         }
1134         if (ha->flags.chip_reset_done)
1135                 return_status = QLA_SUCCESS;
1136         else
1137                 return_status = QLA_FUNCTION_FAILED;
1138
1139         return return_status;
1140 }
1141
1142 static void
1143 sp_get(struct srb *sp)
1144 {
1145         atomic_inc(&sp->ref_count);
1146 }
1147
1148 #define ISP_REG_DISCONNECT 0xffffffffU
1149 /**************************************************************************
1150 * qla2x00_isp_reg_stat
1151 *
1152 * Description:
1153 *       Read the host status register of ISP before aborting the command.
1154 *
1155 * Input:
1156 *       ha = pointer to host adapter structure.
1157 *
1158 *
1159 * Returns:
1160 *       Either true or false.
1161 *
1162 * Note: Return true if there is register disconnect.
1163 **************************************************************************/
1164 static inline
1165 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1166 {
1167         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1168         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1169
1170         if (IS_P3P_TYPE(ha))
1171                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1172         else
1173                 return ((RD_REG_DWORD(&reg->host_status)) ==
1174                         ISP_REG_DISCONNECT);
1175 }
1176
1177 /**************************************************************************
1178 * qla2xxx_eh_abort
1179 *
1180 * Description:
1181 *    The abort function will abort the specified command.
1182 *
1183 * Input:
1184 *    cmd = Linux SCSI command packet to be aborted.
1185 *
1186 * Returns:
1187 *    Either SUCCESS or FAILED.
1188 *
1189 * Note:
1190 *    Only return FAILED if command not returned by firmware.
1191 **************************************************************************/
1192 static int
1193 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1194 {
1195         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1196         srb_t *sp;
1197         int ret;
1198         unsigned int id;
1199         uint64_t lun;
1200         unsigned long flags;
1201         int rval, wait = 0;
1202         struct qla_hw_data *ha = vha->hw;
1203
1204         if (qla2x00_isp_reg_stat(ha)) {
1205                 ql_log(ql_log_info, vha, 0x8042,
1206                     "PCI/Register disconnect, exiting.\n");
1207                 return FAILED;
1208         }
1209         if (!CMD_SP(cmd))
1210                 return SUCCESS;
1211
1212         ret = fc_block_scsi_eh(cmd);
1213         if (ret != 0)
1214                 return ret;
1215         ret = SUCCESS;
1216
1217         id = cmd->device->id;
1218         lun = cmd->device->lun;
1219
1220         spin_lock_irqsave(&ha->hardware_lock, flags);
1221         sp = (srb_t *) CMD_SP(cmd);
1222         if (!sp) {
1223                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1224                 return SUCCESS;
1225         }
1226
1227         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1228             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1229             vha->host_no, id, lun, sp, cmd, sp->handle);
1230
1231         /* Get a reference to the sp and drop the lock.*/
1232         sp_get(sp);
1233
1234         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1235         rval = ha->isp_ops->abort_command(sp);
1236         if (rval) {
1237                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1238                         ret = SUCCESS;
1239                 else
1240                         ret = FAILED;
1241
1242                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1243                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1244         } else {
1245                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1246                     "Abort command mbx success cmd=%p.\n", cmd);
1247                 wait = 1;
1248         }
1249
1250         spin_lock_irqsave(&ha->hardware_lock, flags);
1251         sp->done(sp, 0);
1252         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1253
1254         /* Did the command return during mailbox execution? */
1255         if (ret == FAILED && !CMD_SP(cmd))
1256                 ret = SUCCESS;
1257
1258         /* Wait for the command to be returned. */
1259         if (wait) {
1260                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1261                         ql_log(ql_log_warn, vha, 0x8006,
1262                             "Abort handler timed out cmd=%p.\n", cmd);
1263                         ret = FAILED;
1264                 }
1265         }
1266
1267         ql_log(ql_log_info, vha, 0x801c,
1268             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1269             vha->host_no, id, lun, wait, ret);
1270
1271         return ret;
1272 }
1273
1274 int
1275 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1276         uint64_t l, enum nexus_wait_type type)
1277 {
1278         int cnt, match, status;
1279         unsigned long flags;
1280         struct qla_hw_data *ha = vha->hw;
1281         struct req_que *req;
1282         srb_t *sp;
1283         struct scsi_cmnd *cmd;
1284
1285         status = QLA_SUCCESS;
1286
1287         spin_lock_irqsave(&ha->hardware_lock, flags);
1288         req = vha->req;
1289         for (cnt = 1; status == QLA_SUCCESS &&
1290                 cnt < req->num_outstanding_cmds; cnt++) {
1291                 sp = req->outstanding_cmds[cnt];
1292                 if (!sp)
1293                         continue;
1294                 if (sp->type != SRB_SCSI_CMD)
1295                         continue;
1296                 if (vha->vp_idx != sp->vha->vp_idx)
1297                         continue;
1298                 match = 0;
1299                 cmd = GET_CMD_SP(sp);
1300                 switch (type) {
1301                 case WAIT_HOST:
1302                         match = 1;
1303                         break;
1304                 case WAIT_TARGET:
1305                         match = cmd->device->id == t;
1306                         break;
1307                 case WAIT_LUN:
1308                         match = (cmd->device->id == t &&
1309                                 cmd->device->lun == l);
1310                         break;
1311                 }
1312                 if (!match)
1313                         continue;
1314
1315                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1316                 status = qla2x00_eh_wait_on_command(cmd);
1317                 spin_lock_irqsave(&ha->hardware_lock, flags);
1318         }
1319         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1320
1321         return status;
1322 }
1323
1324 static char *reset_errors[] = {
1325         "HBA not online",
1326         "HBA not ready",
1327         "Task management failed",
1328         "Waiting for command completions",
1329 };
1330
1331 static int
1332 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1333     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1334 {
1335         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1336         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1337         int err;
1338
1339         if (!fcport) {
1340                 return FAILED;
1341         }
1342
1343         err = fc_block_scsi_eh(cmd);
1344         if (err != 0)
1345                 return err;
1346
1347         ql_log(ql_log_info, vha, 0x8009,
1348             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1349             cmd->device->id, cmd->device->lun, cmd);
1350
1351         err = 0;
1352         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1353                 ql_log(ql_log_warn, vha, 0x800a,
1354                     "Wait for hba online failed for cmd=%p.\n", cmd);
1355                 goto eh_reset_failed;
1356         }
1357         err = 2;
1358         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1359                 != QLA_SUCCESS) {
1360                 ql_log(ql_log_warn, vha, 0x800c,
1361                     "do_reset failed for cmd=%p.\n", cmd);
1362                 goto eh_reset_failed;
1363         }
1364         err = 3;
1365         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1366             cmd->device->lun, type) != QLA_SUCCESS) {
1367                 ql_log(ql_log_warn, vha, 0x800d,
1368                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1369                 goto eh_reset_failed;
1370         }
1371
1372         ql_log(ql_log_info, vha, 0x800e,
1373             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1374             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1375
1376         return SUCCESS;
1377
1378 eh_reset_failed:
1379         ql_log(ql_log_info, vha, 0x800f,
1380             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1381             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1382             cmd);
1383         return FAILED;
1384 }
1385
1386 static int
1387 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1388 {
1389         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1390         struct qla_hw_data *ha = vha->hw;
1391
1392         if (qla2x00_isp_reg_stat(ha)) {
1393                 ql_log(ql_log_info, vha, 0x803e,
1394                     "PCI/Register disconnect, exiting.\n");
1395                 return FAILED;
1396         }
1397
1398         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1399             ha->isp_ops->lun_reset);
1400 }
1401
1402 static int
1403 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1404 {
1405         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1406         struct qla_hw_data *ha = vha->hw;
1407
1408         if (qla2x00_isp_reg_stat(ha)) {
1409                 ql_log(ql_log_info, vha, 0x803f,
1410                     "PCI/Register disconnect, exiting.\n");
1411                 return FAILED;
1412         }
1413
1414         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1415             ha->isp_ops->target_reset);
1416 }
1417
1418 /**************************************************************************
1419 * qla2xxx_eh_bus_reset
1420 *
1421 * Description:
1422 *    The bus reset function will reset the bus and abort any executing
1423 *    commands.
1424 *
1425 * Input:
1426 *    cmd = Linux SCSI command packet of the command that cause the
1427 *          bus reset.
1428 *
1429 * Returns:
1430 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1431 *
1432 **************************************************************************/
1433 static int
1434 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1435 {
1436         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1437         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1438         int ret = FAILED;
1439         unsigned int id;
1440         uint64_t lun;
1441         struct qla_hw_data *ha = vha->hw;
1442
1443         if (qla2x00_isp_reg_stat(ha)) {
1444                 ql_log(ql_log_info, vha, 0x8040,
1445                     "PCI/Register disconnect, exiting.\n");
1446                 return FAILED;
1447         }
1448
1449         id = cmd->device->id;
1450         lun = cmd->device->lun;
1451
1452         if (!fcport) {
1453                 return ret;
1454         }
1455
1456         ret = fc_block_scsi_eh(cmd);
1457         if (ret != 0)
1458                 return ret;
1459         ret = FAILED;
1460
1461         ql_log(ql_log_info, vha, 0x8012,
1462             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1463
1464         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1465                 ql_log(ql_log_fatal, vha, 0x8013,
1466                     "Wait for hba online failed board disabled.\n");
1467                 goto eh_bus_reset_done;
1468         }
1469
1470         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1471                 ret = SUCCESS;
1472
1473         if (ret == FAILED)
1474                 goto eh_bus_reset_done;
1475
1476         /* Flush outstanding commands. */
1477         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1478             QLA_SUCCESS) {
1479                 ql_log(ql_log_warn, vha, 0x8014,
1480                     "Wait for pending commands failed.\n");
1481                 ret = FAILED;
1482         }
1483
1484 eh_bus_reset_done:
1485         ql_log(ql_log_warn, vha, 0x802b,
1486             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1487             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1488
1489         return ret;
1490 }
1491
1492 /**************************************************************************
1493 * qla2xxx_eh_host_reset
1494 *
1495 * Description:
1496 *    The reset function will reset the Adapter.
1497 *
1498 * Input:
1499 *      cmd = Linux SCSI command packet of the command that cause the
1500 *            adapter reset.
1501 *
1502 * Returns:
1503 *      Either SUCCESS or FAILED.
1504 *
1505 * Note:
1506 **************************************************************************/
1507 static int
1508 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1509 {
1510         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1511         struct qla_hw_data *ha = vha->hw;
1512         int ret = FAILED;
1513         unsigned int id;
1514         uint64_t lun;
1515         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1516
1517         if (qla2x00_isp_reg_stat(ha)) {
1518                 ql_log(ql_log_info, vha, 0x8041,
1519                     "PCI/Register disconnect, exiting.\n");
1520                 schedule_work(&ha->board_disable);
1521                 return SUCCESS;
1522         }
1523
1524         id = cmd->device->id;
1525         lun = cmd->device->lun;
1526
1527         ql_log(ql_log_info, vha, 0x8018,
1528             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1529
1530         /*
1531          * No point in issuing another reset if one is active.  Also do not
1532          * attempt a reset if we are updating flash.
1533          */
1534         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1535                 goto eh_host_reset_lock;
1536
1537         if (vha != base_vha) {
1538                 if (qla2x00_vp_abort_isp(vha))
1539                         goto eh_host_reset_lock;
1540         } else {
1541                 if (IS_P3P_TYPE(vha->hw)) {
1542                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1543                                 /* Ctx reset success */
1544                                 ret = SUCCESS;
1545                                 goto eh_host_reset_lock;
1546                         }
1547                         /* fall thru if ctx reset failed */
1548                 }
1549                 if (ha->wq)
1550                         flush_workqueue(ha->wq);
1551
1552                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1553                 if (ha->isp_ops->abort_isp(base_vha)) {
1554                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1555                         /* failed. schedule dpc to try */
1556                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1557
1558                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1559                                 ql_log(ql_log_warn, vha, 0x802a,
1560                                     "wait for hba online failed.\n");
1561                                 goto eh_host_reset_lock;
1562                         }
1563                 }
1564                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1565         }
1566
1567         /* Waiting for command to be returned to OS.*/
1568         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1569                 QLA_SUCCESS)
1570                 ret = SUCCESS;
1571
1572 eh_host_reset_lock:
1573         ql_log(ql_log_info, vha, 0x8017,
1574             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1575             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1576
1577         return ret;
1578 }
1579
1580 /*
1581 * qla2x00_loop_reset
1582 *      Issue loop reset.
1583 *
1584 * Input:
1585 *      ha = adapter block pointer.
1586 *
1587 * Returns:
1588 *      0 = success
1589 */
1590 int
1591 qla2x00_loop_reset(scsi_qla_host_t *vha)
1592 {
1593         int ret;
1594         struct fc_port *fcport;
1595         struct qla_hw_data *ha = vha->hw;
1596
1597         if (IS_QLAFX00(ha)) {
1598                 return qlafx00_loop_reset(vha);
1599         }
1600
1601         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1602                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1603                         if (fcport->port_type != FCT_TARGET)
1604                                 continue;
1605
1606                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1607                         if (ret != QLA_SUCCESS) {
1608                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1609                                     "Bus Reset failed: Reset=%d "
1610                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1611                         }
1612                 }
1613         }
1614
1615
1616         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1617                 atomic_set(&vha->loop_state, LOOP_DOWN);
1618                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1619                 qla2x00_mark_all_devices_lost(vha, 0);
1620                 ret = qla2x00_full_login_lip(vha);
1621                 if (ret != QLA_SUCCESS) {
1622                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1623                             "full_login_lip=%d.\n", ret);
1624                 }
1625         }
1626
1627         if (ha->flags.enable_lip_reset) {
1628                 ret = qla2x00_lip_reset(vha);
1629                 if (ret != QLA_SUCCESS)
1630                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1631                             "lip_reset failed (%d).\n", ret);
1632         }
1633
1634         /* Issue marker command only when we are going to start the I/O */
1635         vha->marker_needed = 1;
1636
1637         return QLA_SUCCESS;
1638 }
1639
1640 void
1641 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1642 {
1643         int que, cnt;
1644         unsigned long flags;
1645         srb_t *sp;
1646         struct qla_hw_data *ha = vha->hw;
1647         struct req_que *req;
1648
1649         qlt_host_reset_handler(ha);
1650
1651         spin_lock_irqsave(&ha->hardware_lock, flags);
1652         for (que = 0; que < ha->max_req_queues; que++) {
1653                 req = ha->req_q_map[que];
1654                 if (!req)
1655                         continue;
1656                 if (!req->outstanding_cmds)
1657                         continue;
1658                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1659                         sp = req->outstanding_cmds[cnt];
1660                         if (sp) {
1661                                 /* Don't abort commands in adapter during EEH
1662                                  * recovery as it's not accessible/responding.
1663                                  */
1664                                 if (GET_CMD_SP(sp) && !ha->flags.eeh_busy &&
1665                                     (sp->type == SRB_SCSI_CMD)) {
1666                                         /* Get a reference to the sp and drop the lock.
1667                                          * The reference ensures this sp->done() call
1668                                          * - and not the call in qla2xxx_eh_abort() -
1669                                          * ends the SCSI command (with result 'res').
1670                                          */
1671                                         sp_get(sp);
1672                                         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1673                                         qla2xxx_eh_abort(GET_CMD_SP(sp));
1674                                         spin_lock_irqsave(&ha->hardware_lock, flags);
1675                                 }
1676                                 req->outstanding_cmds[cnt] = NULL;
1677                                 sp->done(sp, res);
1678                         }
1679                 }
1680         }
1681         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1682 }
1683
1684 static int
1685 qla2xxx_slave_alloc(struct scsi_device *sdev)
1686 {
1687         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1688
1689         if (!rport || fc_remote_port_chkready(rport))
1690                 return -ENXIO;
1691
1692         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1693
1694         return 0;
1695 }
1696
1697 static int
1698 qla2xxx_slave_configure(struct scsi_device *sdev)
1699 {
1700         scsi_qla_host_t *vha = shost_priv(sdev->host);
1701         struct req_que *req = vha->req;
1702
1703         if (IS_T10_PI_CAPABLE(vha->hw))
1704                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1705
1706         scsi_change_queue_depth(sdev, req->max_q_depth);
1707         return 0;
1708 }
1709
1710 static void
1711 qla2xxx_slave_destroy(struct scsi_device *sdev)
1712 {
1713         sdev->hostdata = NULL;
1714 }
1715
1716 /**
1717  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1718  * @ha: HA context
1719  *
1720  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1721  * supported addressing method.
1722  */
1723 static void
1724 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1725 {
1726         /* Assume a 32bit DMA mask. */
1727         ha->flags.enable_64bit_addressing = 0;
1728
1729         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1730                 /* Any upper-dword bits set? */
1731                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1732                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1733                         /* Ok, a 64bit DMA mask is applicable. */
1734                         ha->flags.enable_64bit_addressing = 1;
1735                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1736                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1737                         return;
1738                 }
1739         }
1740
1741         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1742         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1743 }
1744
1745 static void
1746 qla2x00_enable_intrs(struct qla_hw_data *ha)
1747 {
1748         unsigned long flags = 0;
1749         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1750
1751         spin_lock_irqsave(&ha->hardware_lock, flags);
1752         ha->interrupts_on = 1;
1753         /* enable risc and host interrupts */
1754         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1755         RD_REG_WORD(&reg->ictrl);
1756         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1757
1758 }
1759
1760 static void
1761 qla2x00_disable_intrs(struct qla_hw_data *ha)
1762 {
1763         unsigned long flags = 0;
1764         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1765
1766         spin_lock_irqsave(&ha->hardware_lock, flags);
1767         ha->interrupts_on = 0;
1768         /* disable risc and host interrupts */
1769         WRT_REG_WORD(&reg->ictrl, 0);
1770         RD_REG_WORD(&reg->ictrl);
1771         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1772 }
1773
1774 static void
1775 qla24xx_enable_intrs(struct qla_hw_data *ha)
1776 {
1777         unsigned long flags = 0;
1778         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1779
1780         spin_lock_irqsave(&ha->hardware_lock, flags);
1781         ha->interrupts_on = 1;
1782         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1783         RD_REG_DWORD(&reg->ictrl);
1784         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1785 }
1786
1787 static void
1788 qla24xx_disable_intrs(struct qla_hw_data *ha)
1789 {
1790         unsigned long flags = 0;
1791         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1792
1793         if (IS_NOPOLLING_TYPE(ha))
1794                 return;
1795         spin_lock_irqsave(&ha->hardware_lock, flags);
1796         ha->interrupts_on = 0;
1797         WRT_REG_DWORD(&reg->ictrl, 0);
1798         RD_REG_DWORD(&reg->ictrl);
1799         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1800 }
1801
1802 static int
1803 qla2x00_iospace_config(struct qla_hw_data *ha)
1804 {
1805         resource_size_t pio;
1806         uint16_t msix;
1807
1808         if (pci_request_selected_regions(ha->pdev, ha->bars,
1809             QLA2XXX_DRIVER_NAME)) {
1810                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1811                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1812                     pci_name(ha->pdev));
1813                 goto iospace_error_exit;
1814         }
1815         if (!(ha->bars & 1))
1816                 goto skip_pio;
1817
1818         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1819         pio = pci_resource_start(ha->pdev, 0);
1820         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1821                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1822                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1823                             "Invalid pci I/O region size (%s).\n",
1824                             pci_name(ha->pdev));
1825                         pio = 0;
1826                 }
1827         } else {
1828                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1829                     "Region #0 no a PIO resource (%s).\n",
1830                     pci_name(ha->pdev));
1831                 pio = 0;
1832         }
1833         ha->pio_address = pio;
1834         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1835             "PIO address=%llu.\n",
1836             (unsigned long long)ha->pio_address);
1837
1838 skip_pio:
1839         /* Use MMIO operations for all accesses. */
1840         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1841                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1842                     "Region #1 not an MMIO resource (%s), aborting.\n",
1843                     pci_name(ha->pdev));
1844                 goto iospace_error_exit;
1845         }
1846         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1847                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1848                     "Invalid PCI mem region size (%s), aborting.\n",
1849                     pci_name(ha->pdev));
1850                 goto iospace_error_exit;
1851         }
1852
1853         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1854         if (!ha->iobase) {
1855                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1856                     "Cannot remap MMIO (%s), aborting.\n",
1857                     pci_name(ha->pdev));
1858                 goto iospace_error_exit;
1859         }
1860
1861         /* Determine queue resources */
1862         ha->max_req_queues = ha->max_rsp_queues = 1;
1863         ha->msix_count = QLA_BASE_VECTORS;
1864         if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1865                 goto mqiobase_exit;
1866
1867         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1868                         pci_resource_len(ha->pdev, 3));
1869         if (ha->mqiobase) {
1870                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1871                     "MQIO Base=%p.\n", ha->mqiobase);
1872                 /* Read MSIX vector size of the board */
1873                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1874                 ha->msix_count = msix + 1;
1875                 /* Max queues are bounded by available msix vectors */
1876                 /* MB interrupt uses 1 vector */
1877                 ha->max_req_queues = ha->msix_count - 1;
1878                 ha->max_rsp_queues = ha->max_req_queues;
1879                 /* Queue pairs is the max value minus the base queue pair */
1880                 ha->max_qpairs = ha->max_rsp_queues - 1;
1881                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1882                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1883
1884                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1885                     "MSI-X vector count: %d.\n", ha->msix_count);
1886         } else
1887                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1888                     "BAR 3 not enabled.\n");
1889
1890 mqiobase_exit:
1891         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1892             "MSIX Count: %d.\n", ha->msix_count);
1893         return (0);
1894
1895 iospace_error_exit:
1896         return (-ENOMEM);
1897 }
1898
1899
1900 static int
1901 qla83xx_iospace_config(struct qla_hw_data *ha)
1902 {
1903         uint16_t msix;
1904
1905         if (pci_request_selected_regions(ha->pdev, ha->bars,
1906             QLA2XXX_DRIVER_NAME)) {
1907                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1908                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1909                     pci_name(ha->pdev));
1910
1911                 goto iospace_error_exit;
1912         }
1913
1914         /* Use MMIO operations for all accesses. */
1915         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1916                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1917                     "Invalid pci I/O region size (%s).\n",
1918                     pci_name(ha->pdev));
1919                 goto iospace_error_exit;
1920         }
1921         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1922                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1923                     "Invalid PCI mem region size (%s), aborting\n",
1924                         pci_name(ha->pdev));
1925                 goto iospace_error_exit;
1926         }
1927
1928         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1929         if (!ha->iobase) {
1930                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1931                     "Cannot remap MMIO (%s), aborting.\n",
1932                     pci_name(ha->pdev));
1933                 goto iospace_error_exit;
1934         }
1935
1936         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1937         /* 83XX 26XX always use MQ type access for queues
1938          * - mbar 2, a.k.a region 4 */
1939         ha->max_req_queues = ha->max_rsp_queues = 1;
1940         ha->msix_count = QLA_BASE_VECTORS;
1941         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1942                         pci_resource_len(ha->pdev, 4));
1943
1944         if (!ha->mqiobase) {
1945                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1946                     "BAR2/region4 not enabled\n");
1947                 goto mqiobase_exit;
1948         }
1949
1950         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1951                         pci_resource_len(ha->pdev, 2));
1952         if (ha->msixbase) {
1953                 /* Read MSIX vector size of the board */
1954                 pci_read_config_word(ha->pdev,
1955                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1956                 ha->msix_count = msix + 1;
1957                 /*
1958                  * By default, driver uses at least two msix vectors
1959                  * (default & rspq)
1960                  */
1961                 if (ql2xmqsupport) {
1962                         /* MB interrupt uses 1 vector */
1963                         ha->max_req_queues = ha->msix_count - 1;
1964
1965                         /* ATIOQ needs 1 vector. That's 1 less QPair */
1966                         if (QLA_TGT_MODE_ENABLED())
1967                                 ha->max_req_queues--;
1968
1969                         ha->max_rsp_queues = ha->max_req_queues;
1970
1971                         /* Queue pairs is the max value minus
1972                          * the base queue pair */
1973                         ha->max_qpairs = ha->max_req_queues - 1;
1974                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
1975                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
1976                 }
1977                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1978                     "MSI-X vector count: %d.\n", ha->msix_count);
1979         } else
1980                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1981                     "BAR 1 not enabled.\n");
1982
1983 mqiobase_exit:
1984         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1985             "MSIX Count: %d.\n", ha->msix_count);
1986         return 0;
1987
1988 iospace_error_exit:
1989         return -ENOMEM;
1990 }
1991
1992 static struct isp_operations qla2100_isp_ops = {
1993         .pci_config             = qla2100_pci_config,
1994         .reset_chip             = qla2x00_reset_chip,
1995         .chip_diag              = qla2x00_chip_diag,
1996         .config_rings           = qla2x00_config_rings,
1997         .reset_adapter          = qla2x00_reset_adapter,
1998         .nvram_config           = qla2x00_nvram_config,
1999         .update_fw_options      = qla2x00_update_fw_options,
2000         .load_risc              = qla2x00_load_risc,
2001         .pci_info_str           = qla2x00_pci_info_str,
2002         .fw_version_str         = qla2x00_fw_version_str,
2003         .intr_handler           = qla2100_intr_handler,
2004         .enable_intrs           = qla2x00_enable_intrs,
2005         .disable_intrs          = qla2x00_disable_intrs,
2006         .abort_command          = qla2x00_abort_command,
2007         .target_reset           = qla2x00_abort_target,
2008         .lun_reset              = qla2x00_lun_reset,
2009         .fabric_login           = qla2x00_login_fabric,
2010         .fabric_logout          = qla2x00_fabric_logout,
2011         .calc_req_entries       = qla2x00_calc_iocbs_32,
2012         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2013         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2014         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2015         .read_nvram             = qla2x00_read_nvram_data,
2016         .write_nvram            = qla2x00_write_nvram_data,
2017         .fw_dump                = qla2100_fw_dump,
2018         .beacon_on              = NULL,
2019         .beacon_off             = NULL,
2020         .beacon_blink           = NULL,
2021         .read_optrom            = qla2x00_read_optrom_data,
2022         .write_optrom           = qla2x00_write_optrom_data,
2023         .get_flash_version      = qla2x00_get_flash_version,
2024         .start_scsi             = qla2x00_start_scsi,
2025         .start_scsi_mq          = NULL,
2026         .abort_isp              = qla2x00_abort_isp,
2027         .iospace_config         = qla2x00_iospace_config,
2028         .initialize_adapter     = qla2x00_initialize_adapter,
2029 };
2030
2031 static struct isp_operations qla2300_isp_ops = {
2032         .pci_config             = qla2300_pci_config,
2033         .reset_chip             = qla2x00_reset_chip,
2034         .chip_diag              = qla2x00_chip_diag,
2035         .config_rings           = qla2x00_config_rings,
2036         .reset_adapter          = qla2x00_reset_adapter,
2037         .nvram_config           = qla2x00_nvram_config,
2038         .update_fw_options      = qla2x00_update_fw_options,
2039         .load_risc              = qla2x00_load_risc,
2040         .pci_info_str           = qla2x00_pci_info_str,
2041         .fw_version_str         = qla2x00_fw_version_str,
2042         .intr_handler           = qla2300_intr_handler,
2043         .enable_intrs           = qla2x00_enable_intrs,
2044         .disable_intrs          = qla2x00_disable_intrs,
2045         .abort_command          = qla2x00_abort_command,
2046         .target_reset           = qla2x00_abort_target,
2047         .lun_reset              = qla2x00_lun_reset,
2048         .fabric_login           = qla2x00_login_fabric,
2049         .fabric_logout          = qla2x00_fabric_logout,
2050         .calc_req_entries       = qla2x00_calc_iocbs_32,
2051         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2052         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2053         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2054         .read_nvram             = qla2x00_read_nvram_data,
2055         .write_nvram            = qla2x00_write_nvram_data,
2056         .fw_dump                = qla2300_fw_dump,
2057         .beacon_on              = qla2x00_beacon_on,
2058         .beacon_off             = qla2x00_beacon_off,
2059         .beacon_blink           = qla2x00_beacon_blink,
2060         .read_optrom            = qla2x00_read_optrom_data,
2061         .write_optrom           = qla2x00_write_optrom_data,
2062         .get_flash_version      = qla2x00_get_flash_version,
2063         .start_scsi             = qla2x00_start_scsi,
2064         .start_scsi_mq          = NULL,
2065         .abort_isp              = qla2x00_abort_isp,
2066         .iospace_config         = qla2x00_iospace_config,
2067         .initialize_adapter     = qla2x00_initialize_adapter,
2068 };
2069
2070 static struct isp_operations qla24xx_isp_ops = {
2071         .pci_config             = qla24xx_pci_config,
2072         .reset_chip             = qla24xx_reset_chip,
2073         .chip_diag              = qla24xx_chip_diag,
2074         .config_rings           = qla24xx_config_rings,
2075         .reset_adapter          = qla24xx_reset_adapter,
2076         .nvram_config           = qla24xx_nvram_config,
2077         .update_fw_options      = qla24xx_update_fw_options,
2078         .load_risc              = qla24xx_load_risc,
2079         .pci_info_str           = qla24xx_pci_info_str,
2080         .fw_version_str         = qla24xx_fw_version_str,
2081         .intr_handler           = qla24xx_intr_handler,
2082         .enable_intrs           = qla24xx_enable_intrs,
2083         .disable_intrs          = qla24xx_disable_intrs,
2084         .abort_command          = qla24xx_abort_command,
2085         .target_reset           = qla24xx_abort_target,
2086         .lun_reset              = qla24xx_lun_reset,
2087         .fabric_login           = qla24xx_login_fabric,
2088         .fabric_logout          = qla24xx_fabric_logout,
2089         .calc_req_entries       = NULL,
2090         .build_iocbs            = NULL,
2091         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2092         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2093         .read_nvram             = qla24xx_read_nvram_data,
2094         .write_nvram            = qla24xx_write_nvram_data,
2095         .fw_dump                = qla24xx_fw_dump,
2096         .beacon_on              = qla24xx_beacon_on,
2097         .beacon_off             = qla24xx_beacon_off,
2098         .beacon_blink           = qla24xx_beacon_blink,
2099         .read_optrom            = qla24xx_read_optrom_data,
2100         .write_optrom           = qla24xx_write_optrom_data,
2101         .get_flash_version      = qla24xx_get_flash_version,
2102         .start_scsi             = qla24xx_start_scsi,
2103         .start_scsi_mq          = NULL,
2104         .abort_isp              = qla2x00_abort_isp,
2105         .iospace_config         = qla2x00_iospace_config,
2106         .initialize_adapter     = qla2x00_initialize_adapter,
2107 };
2108
2109 static struct isp_operations qla25xx_isp_ops = {
2110         .pci_config             = qla25xx_pci_config,
2111         .reset_chip             = qla24xx_reset_chip,
2112         .chip_diag              = qla24xx_chip_diag,
2113         .config_rings           = qla24xx_config_rings,
2114         .reset_adapter          = qla24xx_reset_adapter,
2115         .nvram_config           = qla24xx_nvram_config,
2116         .update_fw_options      = qla24xx_update_fw_options,
2117         .load_risc              = qla24xx_load_risc,
2118         .pci_info_str           = qla24xx_pci_info_str,
2119         .fw_version_str         = qla24xx_fw_version_str,
2120         .intr_handler           = qla24xx_intr_handler,
2121         .enable_intrs           = qla24xx_enable_intrs,
2122         .disable_intrs          = qla24xx_disable_intrs,
2123         .abort_command          = qla24xx_abort_command,
2124         .target_reset           = qla24xx_abort_target,
2125         .lun_reset              = qla24xx_lun_reset,
2126         .fabric_login           = qla24xx_login_fabric,
2127         .fabric_logout          = qla24xx_fabric_logout,
2128         .calc_req_entries       = NULL,
2129         .build_iocbs            = NULL,
2130         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2131         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2132         .read_nvram             = qla25xx_read_nvram_data,
2133         .write_nvram            = qla25xx_write_nvram_data,
2134         .fw_dump                = qla25xx_fw_dump,
2135         .beacon_on              = qla24xx_beacon_on,
2136         .beacon_off             = qla24xx_beacon_off,
2137         .beacon_blink           = qla24xx_beacon_blink,
2138         .read_optrom            = qla25xx_read_optrom_data,
2139         .write_optrom           = qla24xx_write_optrom_data,
2140         .get_flash_version      = qla24xx_get_flash_version,
2141         .start_scsi             = qla24xx_dif_start_scsi,
2142         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2143         .abort_isp              = qla2x00_abort_isp,
2144         .iospace_config         = qla2x00_iospace_config,
2145         .initialize_adapter     = qla2x00_initialize_adapter,
2146 };
2147
2148 static struct isp_operations qla81xx_isp_ops = {
2149         .pci_config             = qla25xx_pci_config,
2150         .reset_chip             = qla24xx_reset_chip,
2151         .chip_diag              = qla24xx_chip_diag,
2152         .config_rings           = qla24xx_config_rings,
2153         .reset_adapter          = qla24xx_reset_adapter,
2154         .nvram_config           = qla81xx_nvram_config,
2155         .update_fw_options      = qla81xx_update_fw_options,
2156         .load_risc              = qla81xx_load_risc,
2157         .pci_info_str           = qla24xx_pci_info_str,
2158         .fw_version_str         = qla24xx_fw_version_str,
2159         .intr_handler           = qla24xx_intr_handler,
2160         .enable_intrs           = qla24xx_enable_intrs,
2161         .disable_intrs          = qla24xx_disable_intrs,
2162         .abort_command          = qla24xx_abort_command,
2163         .target_reset           = qla24xx_abort_target,
2164         .lun_reset              = qla24xx_lun_reset,
2165         .fabric_login           = qla24xx_login_fabric,
2166         .fabric_logout          = qla24xx_fabric_logout,
2167         .calc_req_entries       = NULL,
2168         .build_iocbs            = NULL,
2169         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2170         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2171         .read_nvram             = NULL,
2172         .write_nvram            = NULL,
2173         .fw_dump                = qla81xx_fw_dump,
2174         .beacon_on              = qla24xx_beacon_on,
2175         .beacon_off             = qla24xx_beacon_off,
2176         .beacon_blink           = qla83xx_beacon_blink,
2177         .read_optrom            = qla25xx_read_optrom_data,
2178         .write_optrom           = qla24xx_write_optrom_data,
2179         .get_flash_version      = qla24xx_get_flash_version,
2180         .start_scsi             = qla24xx_dif_start_scsi,
2181         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2182         .abort_isp              = qla2x00_abort_isp,
2183         .iospace_config         = qla2x00_iospace_config,
2184         .initialize_adapter     = qla2x00_initialize_adapter,
2185 };
2186
2187 static struct isp_operations qla82xx_isp_ops = {
2188         .pci_config             = qla82xx_pci_config,
2189         .reset_chip             = qla82xx_reset_chip,
2190         .chip_diag              = qla24xx_chip_diag,
2191         .config_rings           = qla82xx_config_rings,
2192         .reset_adapter          = qla24xx_reset_adapter,
2193         .nvram_config           = qla81xx_nvram_config,
2194         .update_fw_options      = qla24xx_update_fw_options,
2195         .load_risc              = qla82xx_load_risc,
2196         .pci_info_str           = qla24xx_pci_info_str,
2197         .fw_version_str         = qla24xx_fw_version_str,
2198         .intr_handler           = qla82xx_intr_handler,
2199         .enable_intrs           = qla82xx_enable_intrs,
2200         .disable_intrs          = qla82xx_disable_intrs,
2201         .abort_command          = qla24xx_abort_command,
2202         .target_reset           = qla24xx_abort_target,
2203         .lun_reset              = qla24xx_lun_reset,
2204         .fabric_login           = qla24xx_login_fabric,
2205         .fabric_logout          = qla24xx_fabric_logout,
2206         .calc_req_entries       = NULL,
2207         .build_iocbs            = NULL,
2208         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2209         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2210         .read_nvram             = qla24xx_read_nvram_data,
2211         .write_nvram            = qla24xx_write_nvram_data,
2212         .fw_dump                = qla82xx_fw_dump,
2213         .beacon_on              = qla82xx_beacon_on,
2214         .beacon_off             = qla82xx_beacon_off,
2215         .beacon_blink           = NULL,
2216         .read_optrom            = qla82xx_read_optrom_data,
2217         .write_optrom           = qla82xx_write_optrom_data,
2218         .get_flash_version      = qla82xx_get_flash_version,
2219         .start_scsi             = qla82xx_start_scsi,
2220         .start_scsi_mq          = NULL,
2221         .abort_isp              = qla82xx_abort_isp,
2222         .iospace_config         = qla82xx_iospace_config,
2223         .initialize_adapter     = qla2x00_initialize_adapter,
2224 };
2225
2226 static struct isp_operations qla8044_isp_ops = {
2227         .pci_config             = qla82xx_pci_config,
2228         .reset_chip             = qla82xx_reset_chip,
2229         .chip_diag              = qla24xx_chip_diag,
2230         .config_rings           = qla82xx_config_rings,
2231         .reset_adapter          = qla24xx_reset_adapter,
2232         .nvram_config           = qla81xx_nvram_config,
2233         .update_fw_options      = qla24xx_update_fw_options,
2234         .load_risc              = qla82xx_load_risc,
2235         .pci_info_str           = qla24xx_pci_info_str,
2236         .fw_version_str         = qla24xx_fw_version_str,
2237         .intr_handler           = qla8044_intr_handler,
2238         .enable_intrs           = qla82xx_enable_intrs,
2239         .disable_intrs          = qla82xx_disable_intrs,
2240         .abort_command          = qla24xx_abort_command,
2241         .target_reset           = qla24xx_abort_target,
2242         .lun_reset              = qla24xx_lun_reset,
2243         .fabric_login           = qla24xx_login_fabric,
2244         .fabric_logout          = qla24xx_fabric_logout,
2245         .calc_req_entries       = NULL,
2246         .build_iocbs            = NULL,
2247         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2248         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2249         .read_nvram             = NULL,
2250         .write_nvram            = NULL,
2251         .fw_dump                = qla8044_fw_dump,
2252         .beacon_on              = qla82xx_beacon_on,
2253         .beacon_off             = qla82xx_beacon_off,
2254         .beacon_blink           = NULL,
2255         .read_optrom            = qla8044_read_optrom_data,
2256         .write_optrom           = qla8044_write_optrom_data,
2257         .get_flash_version      = qla82xx_get_flash_version,
2258         .start_scsi             = qla82xx_start_scsi,
2259         .start_scsi_mq          = NULL,
2260         .abort_isp              = qla8044_abort_isp,
2261         .iospace_config         = qla82xx_iospace_config,
2262         .initialize_adapter     = qla2x00_initialize_adapter,
2263 };
2264
2265 static struct isp_operations qla83xx_isp_ops = {
2266         .pci_config             = qla25xx_pci_config,
2267         .reset_chip             = qla24xx_reset_chip,
2268         .chip_diag              = qla24xx_chip_diag,
2269         .config_rings           = qla24xx_config_rings,
2270         .reset_adapter          = qla24xx_reset_adapter,
2271         .nvram_config           = qla81xx_nvram_config,
2272         .update_fw_options      = qla81xx_update_fw_options,
2273         .load_risc              = qla81xx_load_risc,
2274         .pci_info_str           = qla24xx_pci_info_str,
2275         .fw_version_str         = qla24xx_fw_version_str,
2276         .intr_handler           = qla24xx_intr_handler,
2277         .enable_intrs           = qla24xx_enable_intrs,
2278         .disable_intrs          = qla24xx_disable_intrs,
2279         .abort_command          = qla24xx_abort_command,
2280         .target_reset           = qla24xx_abort_target,
2281         .lun_reset              = qla24xx_lun_reset,
2282         .fabric_login           = qla24xx_login_fabric,
2283         .fabric_logout          = qla24xx_fabric_logout,
2284         .calc_req_entries       = NULL,
2285         .build_iocbs            = NULL,
2286         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2287         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2288         .read_nvram             = NULL,
2289         .write_nvram            = NULL,
2290         .fw_dump                = qla83xx_fw_dump,
2291         .beacon_on              = qla24xx_beacon_on,
2292         .beacon_off             = qla24xx_beacon_off,
2293         .beacon_blink           = qla83xx_beacon_blink,
2294         .read_optrom            = qla25xx_read_optrom_data,
2295         .write_optrom           = qla24xx_write_optrom_data,
2296         .get_flash_version      = qla24xx_get_flash_version,
2297         .start_scsi             = qla24xx_dif_start_scsi,
2298         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2299         .abort_isp              = qla2x00_abort_isp,
2300         .iospace_config         = qla83xx_iospace_config,
2301         .initialize_adapter     = qla2x00_initialize_adapter,
2302 };
2303
2304 static struct isp_operations qlafx00_isp_ops = {
2305         .pci_config             = qlafx00_pci_config,
2306         .reset_chip             = qlafx00_soft_reset,
2307         .chip_diag              = qlafx00_chip_diag,
2308         .config_rings           = qlafx00_config_rings,
2309         .reset_adapter          = qlafx00_soft_reset,
2310         .nvram_config           = NULL,
2311         .update_fw_options      = NULL,
2312         .load_risc              = NULL,
2313         .pci_info_str           = qlafx00_pci_info_str,
2314         .fw_version_str         = qlafx00_fw_version_str,
2315         .intr_handler           = qlafx00_intr_handler,
2316         .enable_intrs           = qlafx00_enable_intrs,
2317         .disable_intrs          = qlafx00_disable_intrs,
2318         .abort_command          = qla24xx_async_abort_command,
2319         .target_reset           = qlafx00_abort_target,
2320         .lun_reset              = qlafx00_lun_reset,
2321         .fabric_login           = NULL,
2322         .fabric_logout          = NULL,
2323         .calc_req_entries       = NULL,
2324         .build_iocbs            = NULL,
2325         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2326         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2327         .read_nvram             = qla24xx_read_nvram_data,
2328         .write_nvram            = qla24xx_write_nvram_data,
2329         .fw_dump                = NULL,
2330         .beacon_on              = qla24xx_beacon_on,
2331         .beacon_off             = qla24xx_beacon_off,
2332         .beacon_blink           = NULL,
2333         .read_optrom            = qla24xx_read_optrom_data,
2334         .write_optrom           = qla24xx_write_optrom_data,
2335         .get_flash_version      = qla24xx_get_flash_version,
2336         .start_scsi             = qlafx00_start_scsi,
2337         .start_scsi_mq          = NULL,
2338         .abort_isp              = qlafx00_abort_isp,
2339         .iospace_config         = qlafx00_iospace_config,
2340         .initialize_adapter     = qlafx00_initialize_adapter,
2341 };
2342
2343 static struct isp_operations qla27xx_isp_ops = {
2344         .pci_config             = qla25xx_pci_config,
2345         .reset_chip             = qla24xx_reset_chip,
2346         .chip_diag              = qla24xx_chip_diag,
2347         .config_rings           = qla24xx_config_rings,
2348         .reset_adapter          = qla24xx_reset_adapter,
2349         .nvram_config           = qla81xx_nvram_config,
2350         .update_fw_options      = qla81xx_update_fw_options,
2351         .load_risc              = qla81xx_load_risc,
2352         .pci_info_str           = qla24xx_pci_info_str,
2353         .fw_version_str         = qla24xx_fw_version_str,
2354         .intr_handler           = qla24xx_intr_handler,
2355         .enable_intrs           = qla24xx_enable_intrs,
2356         .disable_intrs          = qla24xx_disable_intrs,
2357         .abort_command          = qla24xx_abort_command,
2358         .target_reset           = qla24xx_abort_target,
2359         .lun_reset              = qla24xx_lun_reset,
2360         .fabric_login           = qla24xx_login_fabric,
2361         .fabric_logout          = qla24xx_fabric_logout,
2362         .calc_req_entries       = NULL,
2363         .build_iocbs            = NULL,
2364         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2365         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2366         .read_nvram             = NULL,
2367         .write_nvram            = NULL,
2368         .fw_dump                = qla27xx_fwdump,
2369         .beacon_on              = qla24xx_beacon_on,
2370         .beacon_off             = qla24xx_beacon_off,
2371         .beacon_blink           = qla83xx_beacon_blink,
2372         .read_optrom            = qla25xx_read_optrom_data,
2373         .write_optrom           = qla24xx_write_optrom_data,
2374         .get_flash_version      = qla24xx_get_flash_version,
2375         .start_scsi             = qla24xx_dif_start_scsi,
2376         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2377         .abort_isp              = qla2x00_abort_isp,
2378         .iospace_config         = qla83xx_iospace_config,
2379         .initialize_adapter     = qla2x00_initialize_adapter,
2380 };
2381
2382 static inline void
2383 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2384 {
2385         ha->device_type = DT_EXTENDED_IDS;
2386         switch (ha->pdev->device) {
2387         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2388                 ha->isp_type |= DT_ISP2100;
2389                 ha->device_type &= ~DT_EXTENDED_IDS;
2390                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2391                 break;
2392         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2393                 ha->isp_type |= DT_ISP2200;
2394                 ha->device_type &= ~DT_EXTENDED_IDS;
2395                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2396                 break;
2397         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2398                 ha->isp_type |= DT_ISP2300;
2399                 ha->device_type |= DT_ZIO_SUPPORTED;
2400                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2401                 break;
2402         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2403                 ha->isp_type |= DT_ISP2312;
2404                 ha->device_type |= DT_ZIO_SUPPORTED;
2405                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2406                 break;
2407         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2408                 ha->isp_type |= DT_ISP2322;
2409                 ha->device_type |= DT_ZIO_SUPPORTED;
2410                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2411                     ha->pdev->subsystem_device == 0x0170)
2412                         ha->device_type |= DT_OEM_001;
2413                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2414                 break;
2415         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2416                 ha->isp_type |= DT_ISP6312;
2417                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2418                 break;
2419         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2420                 ha->isp_type |= DT_ISP6322;
2421                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2422                 break;
2423         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2424                 ha->isp_type |= DT_ISP2422;
2425                 ha->device_type |= DT_ZIO_SUPPORTED;
2426                 ha->device_type |= DT_FWI2;
2427                 ha->device_type |= DT_IIDMA;
2428                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2429                 break;
2430         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2431                 ha->isp_type |= DT_ISP2432;
2432                 ha->device_type |= DT_ZIO_SUPPORTED;
2433                 ha->device_type |= DT_FWI2;
2434                 ha->device_type |= DT_IIDMA;
2435                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2436                 break;
2437         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2438                 ha->isp_type |= DT_ISP8432;
2439                 ha->device_type |= DT_ZIO_SUPPORTED;
2440                 ha->device_type |= DT_FWI2;
2441                 ha->device_type |= DT_IIDMA;
2442                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2443                 break;
2444         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2445                 ha->isp_type |= DT_ISP5422;
2446                 ha->device_type |= DT_FWI2;
2447                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2448                 break;
2449         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2450                 ha->isp_type |= DT_ISP5432;
2451                 ha->device_type |= DT_FWI2;
2452                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2453                 break;
2454         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2455                 ha->isp_type |= DT_ISP2532;
2456                 ha->device_type |= DT_ZIO_SUPPORTED;
2457                 ha->device_type |= DT_FWI2;
2458                 ha->device_type |= DT_IIDMA;
2459                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2460                 break;
2461         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2462                 ha->isp_type |= DT_ISP8001;
2463                 ha->device_type |= DT_ZIO_SUPPORTED;
2464                 ha->device_type |= DT_FWI2;
2465                 ha->device_type |= DT_IIDMA;
2466                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2467                 break;
2468         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2469                 ha->isp_type |= DT_ISP8021;
2470                 ha->device_type |= DT_ZIO_SUPPORTED;
2471                 ha->device_type |= DT_FWI2;
2472                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2473                 /* Initialize 82XX ISP flags */
2474                 qla82xx_init_flags(ha);
2475                 break;
2476          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2477                 ha->isp_type |= DT_ISP8044;
2478                 ha->device_type |= DT_ZIO_SUPPORTED;
2479                 ha->device_type |= DT_FWI2;
2480                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2481                 /* Initialize 82XX ISP flags */
2482                 qla82xx_init_flags(ha);
2483                 break;
2484         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2485                 ha->isp_type |= DT_ISP2031;
2486                 ha->device_type |= DT_ZIO_SUPPORTED;
2487                 ha->device_type |= DT_FWI2;
2488                 ha->device_type |= DT_IIDMA;
2489                 ha->device_type |= DT_T10_PI;
2490                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2491                 break;
2492         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2493                 ha->isp_type |= DT_ISP8031;
2494                 ha->device_type |= DT_ZIO_SUPPORTED;
2495                 ha->device_type |= DT_FWI2;
2496                 ha->device_type |= DT_IIDMA;
2497                 ha->device_type |= DT_T10_PI;
2498                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2499                 break;
2500         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2501                 ha->isp_type |= DT_ISPFX00;
2502                 break;
2503         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2504                 ha->isp_type |= DT_ISP2071;
2505                 ha->device_type |= DT_ZIO_SUPPORTED;
2506                 ha->device_type |= DT_FWI2;
2507                 ha->device_type |= DT_IIDMA;
2508                 ha->device_type |= DT_T10_PI;
2509                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2510                 break;
2511         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2512                 ha->isp_type |= DT_ISP2271;
2513                 ha->device_type |= DT_ZIO_SUPPORTED;
2514                 ha->device_type |= DT_FWI2;
2515                 ha->device_type |= DT_IIDMA;
2516                 ha->device_type |= DT_T10_PI;
2517                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2518                 break;
2519         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2520                 ha->isp_type |= DT_ISP2261;
2521                 ha->device_type |= DT_ZIO_SUPPORTED;
2522                 ha->device_type |= DT_FWI2;
2523                 ha->device_type |= DT_IIDMA;
2524                 ha->device_type |= DT_T10_PI;
2525                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2526                 break;
2527         }
2528
2529         if (IS_QLA82XX(ha))
2530                 ha->port_no = ha->portnum & 1;
2531         else {
2532                 /* Get adapter physical port no from interrupt pin register. */
2533                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2534                 if (IS_QLA27XX(ha))
2535                         ha->port_no--;
2536                 else
2537                         ha->port_no = !(ha->port_no & 1);
2538         }
2539
2540         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2541             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2542             ha->device_type, ha->port_no, ha->fw_srisc_address);
2543 }
2544
2545 static void
2546 qla2xxx_scan_start(struct Scsi_Host *shost)
2547 {
2548         scsi_qla_host_t *vha = shost_priv(shost);
2549
2550         if (vha->hw->flags.running_gold_fw)
2551                 return;
2552
2553         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2554         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2555         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2556         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2557 }
2558
2559 static int
2560 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2561 {
2562         scsi_qla_host_t *vha = shost_priv(shost);
2563
2564         if (test_bit(UNLOADING, &vha->dpc_flags))
2565                 return 1;
2566         if (!vha->host)
2567                 return 1;
2568         if (time > vha->hw->loop_reset_delay * HZ)
2569                 return 1;
2570
2571         return atomic_read(&vha->loop_state) == LOOP_READY;
2572 }
2573
2574 static void qla2x00_iocb_work_fn(struct work_struct *work)
2575 {
2576         struct scsi_qla_host *vha = container_of(work,
2577                 struct scsi_qla_host, iocb_work);
2578         int cnt = 0;
2579
2580         while (!list_empty(&vha->work_list)) {
2581                 qla2x00_do_work(vha);
2582                 cnt++;
2583                 if (cnt > 10)
2584                         break;
2585         }
2586 }
2587
2588 /*
2589  * PCI driver interface
2590  */
2591 static int
2592 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2593 {
2594         int     ret = -ENODEV;
2595         struct Scsi_Host *host;
2596         scsi_qla_host_t *base_vha = NULL;
2597         struct qla_hw_data *ha;
2598         char pci_info[30];
2599         char fw_str[30], wq_name[30];
2600         struct scsi_host_template *sht;
2601         int bars, mem_only = 0;
2602         uint16_t req_length = 0, rsp_length = 0;
2603         struct req_que *req = NULL;
2604         struct rsp_que *rsp = NULL;
2605         int i;
2606
2607         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2608         sht = &qla2xxx_driver_template;
2609         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2610             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2611             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2612             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2613             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2614             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2615             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2616             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2617             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2618             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2619             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2620             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2621             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2622             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2623             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2624                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2625                 mem_only = 1;
2626                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2627                     "Mem only adapter.\n");
2628         }
2629         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2630             "Bars=%d.\n", bars);
2631
2632         if (mem_only) {
2633                 if (pci_enable_device_mem(pdev))
2634                         return ret;
2635         } else {
2636                 if (pci_enable_device(pdev))
2637                         return ret;
2638         }
2639
2640         /* This may fail but that's ok */
2641         pci_enable_pcie_error_reporting(pdev);
2642
2643         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2644         if (!ha) {
2645                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2646                     "Unable to allocate memory for ha.\n");
2647                 goto disable_device;
2648         }
2649         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2650             "Memory allocated for ha=%p.\n", ha);
2651         ha->pdev = pdev;
2652         ha->tgt.enable_class_2 = ql2xenableclass2;
2653         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2654         spin_lock_init(&ha->tgt.q_full_lock);
2655         spin_lock_init(&ha->tgt.sess_lock);
2656         spin_lock_init(&ha->tgt.atio_lock);
2657
2658
2659         /* Clear our data area */
2660         ha->bars = bars;
2661         ha->mem_only = mem_only;
2662         spin_lock_init(&ha->hardware_lock);
2663         spin_lock_init(&ha->vport_slock);
2664         mutex_init(&ha->selflogin_lock);
2665         mutex_init(&ha->optrom_mutex);
2666
2667         /* Set ISP-type information. */
2668         qla2x00_set_isp_flags(ha);
2669
2670         /* Set EEH reset type to fundamental if required by hba */
2671         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2672             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2673                 pdev->needs_freset = 1;
2674
2675         ha->prev_topology = 0;
2676         ha->init_cb_size = sizeof(init_cb_t);
2677         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2678         ha->optrom_size = OPTROM_SIZE_2300;
2679
2680         /* Assign ISP specific operations. */
2681         if (IS_QLA2100(ha)) {
2682                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2683                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2684                 req_length = REQUEST_ENTRY_CNT_2100;
2685                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2686                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2687                 ha->gid_list_info_size = 4;
2688                 ha->flash_conf_off = ~0;
2689                 ha->flash_data_off = ~0;
2690                 ha->nvram_conf_off = ~0;
2691                 ha->nvram_data_off = ~0;
2692                 ha->isp_ops = &qla2100_isp_ops;
2693         } else if (IS_QLA2200(ha)) {
2694                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2695                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2696                 req_length = REQUEST_ENTRY_CNT_2200;
2697                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2698                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2699                 ha->gid_list_info_size = 4;
2700                 ha->flash_conf_off = ~0;
2701                 ha->flash_data_off = ~0;
2702                 ha->nvram_conf_off = ~0;
2703                 ha->nvram_data_off = ~0;
2704                 ha->isp_ops = &qla2100_isp_ops;
2705         } else if (IS_QLA23XX(ha)) {
2706                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2707                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2708                 req_length = REQUEST_ENTRY_CNT_2200;
2709                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2710                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2711                 ha->gid_list_info_size = 6;
2712                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2713                         ha->optrom_size = OPTROM_SIZE_2322;
2714                 ha->flash_conf_off = ~0;
2715                 ha->flash_data_off = ~0;
2716                 ha->nvram_conf_off = ~0;
2717                 ha->nvram_data_off = ~0;
2718                 ha->isp_ops = &qla2300_isp_ops;
2719         } else if (IS_QLA24XX_TYPE(ha)) {
2720                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2721                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2722                 req_length = REQUEST_ENTRY_CNT_24XX;
2723                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2724                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2725                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2726                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2727                 ha->gid_list_info_size = 8;
2728                 ha->optrom_size = OPTROM_SIZE_24XX;
2729                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2730                 ha->isp_ops = &qla24xx_isp_ops;
2731                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2732                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2733                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2734                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2735         } else if (IS_QLA25XX(ha)) {
2736                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2737                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2738                 req_length = REQUEST_ENTRY_CNT_24XX;
2739                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2740                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2741                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2742                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2743                 ha->gid_list_info_size = 8;
2744                 ha->optrom_size = OPTROM_SIZE_25XX;
2745                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2746                 ha->isp_ops = &qla25xx_isp_ops;
2747                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2748                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2749                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2750                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2751         } else if (IS_QLA81XX(ha)) {
2752                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2753                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2754                 req_length = REQUEST_ENTRY_CNT_24XX;
2755                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2756                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2757                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2758                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2759                 ha->gid_list_info_size = 8;
2760                 ha->optrom_size = OPTROM_SIZE_81XX;
2761                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2762                 ha->isp_ops = &qla81xx_isp_ops;
2763                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2764                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2765                 ha->nvram_conf_off = ~0;
2766                 ha->nvram_data_off = ~0;
2767         } else if (IS_QLA82XX(ha)) {
2768                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2769                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2770                 req_length = REQUEST_ENTRY_CNT_82XX;
2771                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2772                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2773                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2774                 ha->gid_list_info_size = 8;
2775                 ha->optrom_size = OPTROM_SIZE_82XX;
2776                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2777                 ha->isp_ops = &qla82xx_isp_ops;
2778                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2779                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2780                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2781                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2782         } else if (IS_QLA8044(ha)) {
2783                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2784                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2785                 req_length = REQUEST_ENTRY_CNT_82XX;
2786                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2787                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2788                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2789                 ha->gid_list_info_size = 8;
2790                 ha->optrom_size = OPTROM_SIZE_83XX;
2791                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2792                 ha->isp_ops = &qla8044_isp_ops;
2793                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2794                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2795                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2796                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2797         } else if (IS_QLA83XX(ha)) {
2798                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2799                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2800                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2801                 req_length = REQUEST_ENTRY_CNT_83XX;
2802                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2803                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2804                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2805                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2806                 ha->gid_list_info_size = 8;
2807                 ha->optrom_size = OPTROM_SIZE_83XX;
2808                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2809                 ha->isp_ops = &qla83xx_isp_ops;
2810                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2811                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2812                 ha->nvram_conf_off = ~0;
2813                 ha->nvram_data_off = ~0;
2814         }  else if (IS_QLAFX00(ha)) {
2815                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2816                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2817                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2818                 req_length = REQUEST_ENTRY_CNT_FX00;
2819                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2820                 ha->isp_ops = &qlafx00_isp_ops;
2821                 ha->port_down_retry_count = 30; /* default value */
2822                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2823                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2824                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2825                 ha->mr.fw_hbt_en = 1;
2826                 ha->mr.host_info_resend = false;
2827                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2828         } else if (IS_QLA27XX(ha)) {
2829                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2830                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2831                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2832                 req_length = REQUEST_ENTRY_CNT_83XX;
2833                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2834                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2835                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2836                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2837                 ha->gid_list_info_size = 8;
2838                 ha->optrom_size = OPTROM_SIZE_83XX;
2839                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2840                 ha->isp_ops = &qla27xx_isp_ops;
2841                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2842                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2843                 ha->nvram_conf_off = ~0;
2844                 ha->nvram_data_off = ~0;
2845         }
2846
2847         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2848             "mbx_count=%d, req_length=%d, "
2849             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2850             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2851             "max_fibre_devices=%d.\n",
2852             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2853             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2854             ha->nvram_npiv_size, ha->max_fibre_devices);
2855         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2856             "isp_ops=%p, flash_conf_off=%d, "
2857             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2858             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2859             ha->nvram_conf_off, ha->nvram_data_off);
2860
2861         /* Configure PCI I/O space */
2862         ret = ha->isp_ops->iospace_config(ha);
2863         if (ret)
2864                 goto iospace_config_failed;
2865
2866         ql_log_pci(ql_log_info, pdev, 0x001d,
2867             "Found an ISP%04X irq %d iobase 0x%p.\n",
2868             pdev->device, pdev->irq, ha->iobase);
2869         mutex_init(&ha->vport_lock);
2870         mutex_init(&ha->mq_lock);
2871         init_completion(&ha->mbx_cmd_comp);
2872         complete(&ha->mbx_cmd_comp);
2873         init_completion(&ha->mbx_intr_comp);
2874         init_completion(&ha->dcbx_comp);
2875         init_completion(&ha->lb_portup_comp);
2876
2877         set_bit(0, (unsigned long *) ha->vp_idx_map);
2878
2879         qla2x00_config_dma_addressing(ha);
2880         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2881             "64 Bit addressing is %s.\n",
2882             ha->flags.enable_64bit_addressing ? "enable" :
2883             "disable");
2884         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2885         if (ret) {
2886                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2887                     "Failed to allocate memory for adapter, aborting.\n");
2888
2889                 goto probe_hw_failed;
2890         }
2891
2892         req->max_q_depth = MAX_Q_DEPTH;
2893         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2894                 req->max_q_depth = ql2xmaxqdepth;
2895
2896
2897         base_vha = qla2x00_create_host(sht, ha);
2898         if (!base_vha) {
2899                 ret = -ENOMEM;
2900                 qla2x00_mem_free(ha);
2901                 qla2x00_free_req_que(ha, req);
2902                 qla2x00_free_rsp_que(ha, rsp);
2903                 goto probe_hw_failed;
2904         }
2905
2906         pci_set_drvdata(pdev, base_vha);
2907         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2908
2909         host = base_vha->host;
2910         base_vha->req = req;
2911         if (IS_QLA2XXX_MIDTYPE(ha))
2912                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2913         else
2914                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2915                                                 base_vha->vp_idx;
2916
2917         /* Setup fcport template structure. */
2918         ha->mr.fcport.vha = base_vha;
2919         ha->mr.fcport.port_type = FCT_UNKNOWN;
2920         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2921         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2922         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2923         ha->mr.fcport.scan_state = 1;
2924
2925         /* Set the SG table size based on ISP type */
2926         if (!IS_FWI2_CAPABLE(ha)) {
2927                 if (IS_QLA2100(ha))
2928                         host->sg_tablesize = 32;
2929         } else {
2930                 if (!IS_QLA82XX(ha))
2931                         host->sg_tablesize = QLA_SG_ALL;
2932         }
2933         host->max_id = ha->max_fibre_devices;
2934         host->cmd_per_lun = 3;
2935         host->unique_id = host->host_no;
2936         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2937                 host->max_cmd_len = 32;
2938         else
2939                 host->max_cmd_len = MAX_CMDSZ;
2940         host->max_channel = MAX_BUSES - 1;
2941         /* Older HBAs support only 16-bit LUNs */
2942         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2943             ql2xmaxlun > 0xffff)
2944                 host->max_lun = 0xffff;
2945         else
2946                 host->max_lun = ql2xmaxlun;
2947         host->transportt = qla2xxx_transport_template;
2948         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2949
2950         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2951             "max_id=%d this_id=%d "
2952             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2953             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2954             host->this_id, host->cmd_per_lun, host->unique_id,
2955             host->max_cmd_len, host->max_channel, host->max_lun,
2956             host->transportt, sht->vendor_id);
2957
2958         /* Set up the irqs */
2959         ret = qla2x00_request_irqs(ha, rsp);
2960         if (ret)
2961                 goto probe_init_failed;
2962
2963         /* Alloc arrays of request and response ring ptrs */
2964         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2965                 ql_log(ql_log_fatal, base_vha, 0x003d,
2966                     "Failed to allocate memory for queue pointers..."
2967                     "aborting.\n");
2968                 goto probe_init_failed;
2969         }
2970
2971         if (ha->mqenable && shost_use_blk_mq(host)) {
2972                 /* number of hardware queues supported by blk/scsi-mq*/
2973                 host->nr_hw_queues = ha->max_qpairs;
2974
2975                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
2976                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
2977         } else
2978                 ql_dbg(ql_dbg_init, base_vha, 0x0193,
2979                         "blk/scsi-mq disabled.\n");
2980
2981         qlt_probe_one_stage1(base_vha, ha);
2982
2983         pci_save_state(pdev);
2984
2985         /* Assign back pointers */
2986         rsp->req = req;
2987         req->rsp = rsp;
2988
2989         if (IS_QLAFX00(ha)) {
2990                 ha->rsp_q_map[0] = rsp;
2991                 ha->req_q_map[0] = req;
2992                 set_bit(0, ha->req_qid_map);
2993                 set_bit(0, ha->rsp_qid_map);
2994         }
2995
2996         /* FWI2-capable only. */
2997         req->req_q_in = &ha->iobase->isp24.req_q_in;
2998         req->req_q_out = &ha->iobase->isp24.req_q_out;
2999         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3000         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3001         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3002                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3003                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3004                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3005                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3006         }
3007
3008         if (IS_QLAFX00(ha)) {
3009                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3010                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3011                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3012                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3013         }
3014
3015         if (IS_P3P_TYPE(ha)) {
3016                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3017                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3018                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3019         }
3020
3021         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3022             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3023             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3024         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3025             "req->req_q_in=%p req->req_q_out=%p "
3026             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3027             req->req_q_in, req->req_q_out,
3028             rsp->rsp_q_in, rsp->rsp_q_out);
3029         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3030             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3031             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3032         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3033             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3034             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3035
3036         if (ha->isp_ops->initialize_adapter(base_vha)) {
3037                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3038                     "Failed to initialize adapter - Adapter flags %x.\n",
3039                     base_vha->device_flags);
3040
3041                 if (IS_QLA82XX(ha)) {
3042                         qla82xx_idc_lock(ha);
3043                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3044                                 QLA8XXX_DEV_FAILED);
3045                         qla82xx_idc_unlock(ha);
3046                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3047                             "HW State: FAILED.\n");
3048                 } else if (IS_QLA8044(ha)) {
3049                         qla8044_idc_lock(ha);
3050                         qla8044_wr_direct(base_vha,
3051                                 QLA8044_CRB_DEV_STATE_INDEX,
3052                                 QLA8XXX_DEV_FAILED);
3053                         qla8044_idc_unlock(ha);
3054                         ql_log(ql_log_fatal, base_vha, 0x0150,
3055                             "HW State: FAILED.\n");
3056                 }
3057
3058                 ret = -ENODEV;
3059                 goto probe_failed;
3060         }
3061
3062         if (IS_QLAFX00(ha))
3063                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3064         else
3065                 host->can_queue = req->num_outstanding_cmds - 10;
3066
3067         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3068             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3069             host->can_queue, base_vha->req,
3070             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3071
3072         if (ha->mqenable && qla_ini_mode_enabled(base_vha)) {
3073                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
3074                 /* Create start of day qpairs for Block MQ */
3075                 if (shost_use_blk_mq(host)) {
3076                         for (i = 0; i < ha->max_qpairs; i++)
3077                                 qla2xxx_create_qpair(base_vha, 5, 0);
3078                 }
3079         }
3080
3081         if (ha->flags.running_gold_fw)
3082                 goto skip_dpc;
3083
3084         /*
3085          * Startup the kernel thread for this host adapter
3086          */
3087         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3088             "%s_dpc", base_vha->host_str);
3089         if (IS_ERR(ha->dpc_thread)) {
3090                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3091                     "Failed to start DPC thread.\n");
3092                 ret = PTR_ERR(ha->dpc_thread);
3093                 goto probe_failed;
3094         }
3095         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3096             "DPC thread started successfully.\n");
3097
3098         /*
3099          * If we're not coming up in initiator mode, we might sit for
3100          * a while without waking up the dpc thread, which leads to a
3101          * stuck process warning.  So just kick the dpc once here and
3102          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3103          */
3104         qla2xxx_wake_dpc(base_vha);
3105
3106         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3107         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3108
3109         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3110                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3111                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3112                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3113
3114                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3115                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3116                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3117                 INIT_WORK(&ha->idc_state_handler,
3118                     qla83xx_idc_state_handler_work);
3119                 INIT_WORK(&ha->nic_core_unrecoverable,
3120                     qla83xx_nic_core_unrecoverable_work);
3121         }
3122
3123 skip_dpc:
3124         list_add_tail(&base_vha->list, &ha->vp_list);
3125         base_vha->host->irq = ha->pdev->irq;
3126
3127         /* Initialized the timer */
3128         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3129         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3130             "Started qla2x00_timer with "
3131             "interval=%d.\n", WATCH_INTERVAL);
3132         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3133             "Detected hba at address=%p.\n",
3134             ha);
3135
3136         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3137                 if (ha->fw_attributes & BIT_4) {
3138                         int prot = 0, guard;
3139                         base_vha->flags.difdix_supported = 1;
3140                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3141                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3142                         if (ql2xenabledif == 1)
3143                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3144                         scsi_host_set_prot(host,
3145                             prot | SHOST_DIF_TYPE1_PROTECTION
3146                             | SHOST_DIF_TYPE2_PROTECTION
3147                             | SHOST_DIF_TYPE3_PROTECTION
3148                             | SHOST_DIX_TYPE1_PROTECTION
3149                             | SHOST_DIX_TYPE2_PROTECTION
3150                             | SHOST_DIX_TYPE3_PROTECTION);
3151
3152                         guard = SHOST_DIX_GUARD_CRC;
3153
3154                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3155                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3156                                 guard |= SHOST_DIX_GUARD_IP;
3157
3158                         scsi_host_set_guard(host, guard);
3159                 } else
3160                         base_vha->flags.difdix_supported = 0;
3161         }
3162
3163         ha->isp_ops->enable_intrs(ha);
3164
3165         if (IS_QLAFX00(ha)) {
3166                 ret = qlafx00_fx_disc(base_vha,
3167                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3168                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3169                     QLA_SG_ALL : 128;
3170         }
3171
3172         ret = scsi_add_host(host, &pdev->dev);
3173         if (ret)
3174                 goto probe_failed;
3175
3176         base_vha->flags.init_done = 1;
3177         base_vha->flags.online = 1;
3178         ha->prev_minidump_failed = 0;
3179
3180         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3181             "Init done and hba is online.\n");
3182
3183         if (qla_ini_mode_enabled(base_vha) ||
3184                 qla_dual_mode_enabled(base_vha))
3185                 scsi_scan_host(host);
3186         else
3187                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3188                         "skipping scsi_scan_host() for non-initiator port\n");
3189
3190         qla2x00_alloc_sysfs_attr(base_vha);
3191
3192         if (IS_QLAFX00(ha)) {
3193                 ret = qlafx00_fx_disc(base_vha,
3194                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3195
3196                 /* Register system information */
3197                 ret =  qlafx00_fx_disc(base_vha,
3198                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3199         }
3200
3201         qla2x00_init_host_attr(base_vha);
3202
3203         qla2x00_dfs_setup(base_vha);
3204
3205         ql_log(ql_log_info, base_vha, 0x00fb,
3206             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3207         ql_log(ql_log_info, base_vha, 0x00fc,
3208             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3209             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3210             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3211             base_vha->host_no,
3212             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3213
3214         qlt_add_target(ha, base_vha);
3215
3216         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3217
3218         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3219                 return -ENODEV;
3220
3221         return 0;
3222
3223 probe_init_failed:
3224         qla2x00_free_req_que(ha, req);
3225         ha->req_q_map[0] = NULL;
3226         clear_bit(0, ha->req_qid_map);
3227         qla2x00_free_rsp_que(ha, rsp);
3228         ha->rsp_q_map[0] = NULL;
3229         clear_bit(0, ha->rsp_qid_map);
3230         ha->max_req_queues = ha->max_rsp_queues = 0;
3231
3232 probe_failed:
3233         if (base_vha->timer_active)
3234                 qla2x00_stop_timer(base_vha);
3235         base_vha->flags.online = 0;
3236         if (ha->dpc_thread) {
3237                 struct task_struct *t = ha->dpc_thread;
3238
3239                 ha->dpc_thread = NULL;
3240                 kthread_stop(t);
3241         }
3242
3243         qla2x00_free_device(base_vha);
3244
3245         scsi_host_put(base_vha->host);
3246
3247 probe_hw_failed:
3248         qla2x00_clear_drv_active(ha);
3249
3250 iospace_config_failed:
3251         if (IS_P3P_TYPE(ha)) {
3252                 if (!ha->nx_pcibase)
3253                         iounmap((device_reg_t *)ha->nx_pcibase);
3254                 if (!ql2xdbwr)
3255                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3256         } else {
3257                 if (ha->iobase)
3258                         iounmap(ha->iobase);
3259                 if (ha->cregbase)
3260                         iounmap(ha->cregbase);
3261         }
3262         pci_release_selected_regions(ha->pdev, ha->bars);
3263         kfree(ha);
3264
3265 disable_device:
3266         pci_disable_device(pdev);
3267         return ret;
3268 }
3269
3270 static void
3271 qla2x00_shutdown(struct pci_dev *pdev)
3272 {
3273         scsi_qla_host_t *vha;
3274         struct qla_hw_data  *ha;
3275
3276         if (!atomic_read(&pdev->enable_cnt))
3277                 return;
3278
3279         vha = pci_get_drvdata(pdev);
3280         ha = vha->hw;
3281
3282         /* Notify ISPFX00 firmware */
3283         if (IS_QLAFX00(ha))
3284                 qlafx00_driver_shutdown(vha, 20);
3285
3286         /* Turn-off FCE trace */
3287         if (ha->flags.fce_enabled) {
3288                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3289                 ha->flags.fce_enabled = 0;
3290         }
3291
3292         /* Turn-off EFT trace */
3293         if (ha->eft)
3294                 qla2x00_disable_eft_trace(vha);
3295
3296         /* Stop currently executing firmware. */
3297         qla2x00_try_to_stop_firmware(vha);
3298
3299         /* Turn adapter off line */
3300         vha->flags.online = 0;
3301
3302         /* turn-off interrupts on the card */
3303         if (ha->interrupts_on) {
3304                 vha->flags.init_done = 0;
3305                 ha->isp_ops->disable_intrs(ha);
3306         }
3307
3308         qla2x00_free_irqs(vha);
3309
3310         qla2x00_free_fw_dump(ha);
3311
3312         pci_disable_pcie_error_reporting(pdev);
3313         pci_disable_device(pdev);
3314 }
3315
3316 /* Deletes all the virtual ports for a given ha */
3317 static void
3318 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3319 {
3320         scsi_qla_host_t *vha;
3321         unsigned long flags;
3322
3323         mutex_lock(&ha->vport_lock);
3324         while (ha->cur_vport_count) {
3325                 spin_lock_irqsave(&ha->vport_slock, flags);
3326
3327                 BUG_ON(base_vha->list.next == &ha->vp_list);
3328                 /* This assumes first entry in ha->vp_list is always base vha */
3329                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3330                 scsi_host_get(vha->host);
3331
3332                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3333                 mutex_unlock(&ha->vport_lock);
3334
3335                 fc_vport_terminate(vha->fc_vport);
3336                 scsi_host_put(vha->host);
3337
3338                 mutex_lock(&ha->vport_lock);
3339         }
3340         mutex_unlock(&ha->vport_lock);
3341 }
3342
3343 /* Stops all deferred work threads */
3344 static void
3345 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3346 {
3347         /* Cancel all work and destroy DPC workqueues */
3348         if (ha->dpc_lp_wq) {
3349                 cancel_work_sync(&ha->idc_aen);
3350                 destroy_workqueue(ha->dpc_lp_wq);
3351                 ha->dpc_lp_wq = NULL;
3352         }
3353
3354         if (ha->dpc_hp_wq) {
3355                 cancel_work_sync(&ha->nic_core_reset);
3356                 cancel_work_sync(&ha->idc_state_handler);
3357                 cancel_work_sync(&ha->nic_core_unrecoverable);
3358                 destroy_workqueue(ha->dpc_hp_wq);
3359                 ha->dpc_hp_wq = NULL;
3360         }
3361
3362         /* Kill the kernel thread for this host */
3363         if (ha->dpc_thread) {
3364                 struct task_struct *t = ha->dpc_thread;
3365
3366                 /*
3367                  * qla2xxx_wake_dpc checks for ->dpc_thread
3368                  * so we need to zero it out.
3369                  */
3370                 ha->dpc_thread = NULL;
3371                 kthread_stop(t);
3372         }
3373 }
3374
3375 static void
3376 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3377 {
3378         if (IS_QLA82XX(ha)) {
3379
3380                 iounmap((device_reg_t *)ha->nx_pcibase);
3381                 if (!ql2xdbwr)
3382                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3383         } else {
3384                 if (ha->iobase)
3385                         iounmap(ha->iobase);
3386
3387                 if (ha->cregbase)
3388                         iounmap(ha->cregbase);
3389
3390                 if (ha->mqiobase)
3391                         iounmap(ha->mqiobase);
3392
3393                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3394                         iounmap(ha->msixbase);
3395         }
3396 }
3397
3398 static void
3399 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3400 {
3401         if (IS_QLA8044(ha)) {
3402                 qla8044_idc_lock(ha);
3403                 qla8044_clear_drv_active(ha);
3404                 qla8044_idc_unlock(ha);
3405         } else if (IS_QLA82XX(ha)) {
3406                 qla82xx_idc_lock(ha);
3407                 qla82xx_clear_drv_active(ha);
3408                 qla82xx_idc_unlock(ha);
3409         }
3410 }
3411
3412 static void
3413 qla2x00_remove_one(struct pci_dev *pdev)
3414 {
3415         scsi_qla_host_t *base_vha;
3416         struct qla_hw_data  *ha;
3417
3418         base_vha = pci_get_drvdata(pdev);
3419         ha = base_vha->hw;
3420
3421         /* Indicate device removal to prevent future board_disable and wait
3422          * until any pending board_disable has completed. */
3423         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3424         cancel_work_sync(&ha->board_disable);
3425
3426         /*
3427          * If the PCI device is disabled then there was a PCI-disconnect and
3428          * qla2x00_disable_board_on_pci_error has taken care of most of the
3429          * resources.
3430          */
3431         if (!atomic_read(&pdev->enable_cnt)) {
3432                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3433                     base_vha->gnl.l, base_vha->gnl.ldma);
3434
3435                 scsi_host_put(base_vha->host);
3436                 kfree(ha);
3437                 pci_set_drvdata(pdev, NULL);
3438                 return;
3439         }
3440         qla2x00_wait_for_hba_ready(base_vha);
3441
3442         /*
3443          * if UNLOAD flag is already set, then continue unload,
3444          * where it was set first.
3445          */
3446         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3447                 return;
3448
3449         set_bit(UNLOADING, &base_vha->dpc_flags);
3450         dma_free_coherent(&ha->pdev->dev,
3451                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3452
3453         if (IS_QLAFX00(ha))
3454                 qlafx00_driver_shutdown(base_vha, 20);
3455
3456         qla2x00_delete_all_vps(ha, base_vha);
3457
3458         if (IS_QLA8031(ha)) {
3459                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3460                     "Clearing fcoe driver presence.\n");
3461                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3462                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3463                             "Error while clearing DRV-Presence.\n");
3464         }
3465
3466         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3467
3468         qla2x00_dfs_remove(base_vha);
3469
3470         qla84xx_put_chip(base_vha);
3471
3472         /* Laser should be disabled only for ISP2031 */
3473         if (IS_QLA2031(ha))
3474                 qla83xx_disable_laser(base_vha);
3475
3476         /* Disable timer */
3477         if (base_vha->timer_active)
3478                 qla2x00_stop_timer(base_vha);
3479
3480         base_vha->flags.online = 0;
3481
3482         /* free DMA memory */
3483         if (ha->exlogin_buf)
3484                 qla2x00_free_exlogin_buffer(ha);
3485
3486         /* free DMA memory */
3487         if (ha->exchoffld_buf)
3488                 qla2x00_free_exchoffld_buffer(ha);
3489
3490         qla2x00_destroy_deferred_work(ha);
3491
3492         qlt_remove_target(ha, base_vha);
3493
3494         qla2x00_free_sysfs_attr(base_vha, true);
3495
3496         fc_remove_host(base_vha->host);
3497         qlt_remove_target_resources(ha);
3498
3499         scsi_remove_host(base_vha->host);
3500
3501         qla2x00_free_device(base_vha);
3502
3503         qla2x00_clear_drv_active(ha);
3504
3505         scsi_host_put(base_vha->host);
3506
3507         qla2x00_unmap_iobases(ha);
3508
3509         pci_release_selected_regions(ha->pdev, ha->bars);
3510         kfree(ha);
3511
3512         pci_disable_pcie_error_reporting(pdev);
3513
3514         pci_disable_device(pdev);
3515 }
3516
3517 static void
3518 qla2x00_free_device(scsi_qla_host_t *vha)
3519 {
3520         struct qla_hw_data *ha = vha->hw;
3521
3522         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3523
3524         /* Disable timer */
3525         if (vha->timer_active)
3526                 qla2x00_stop_timer(vha);
3527
3528         qla25xx_delete_queues(vha);
3529
3530         if (ha->flags.fce_enabled)
3531                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3532
3533         if (ha->eft)
3534                 qla2x00_disable_eft_trace(vha);
3535
3536         /* Stop currently executing firmware. */
3537         qla2x00_try_to_stop_firmware(vha);
3538
3539         vha->flags.online = 0;
3540
3541         /* turn-off interrupts on the card */
3542         if (ha->interrupts_on) {
3543                 vha->flags.init_done = 0;
3544                 ha->isp_ops->disable_intrs(ha);
3545         }
3546
3547         qla2x00_free_fcports(vha);
3548
3549         qla2x00_free_irqs(vha);
3550
3551         /* Flush the work queue and remove it */
3552         if (ha->wq) {
3553                 flush_workqueue(ha->wq);
3554                 destroy_workqueue(ha->wq);
3555                 ha->wq = NULL;
3556         }
3557
3558
3559         qla2x00_mem_free(ha);
3560
3561         qla82xx_md_free(vha);
3562
3563         qla2x00_free_queues(ha);
3564 }
3565
3566 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3567 {
3568         fc_port_t *fcport, *tfcport;
3569
3570         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3571                 list_del(&fcport->list);
3572                 qla2x00_clear_loop_id(fcport);
3573                 kfree(fcport);
3574         }
3575 }
3576
3577 static inline void
3578 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3579     int defer)
3580 {
3581         struct fc_rport *rport;
3582         scsi_qla_host_t *base_vha;
3583         unsigned long flags;
3584
3585         if (!fcport->rport)
3586                 return;
3587
3588         rport = fcport->rport;
3589         if (defer) {
3590                 base_vha = pci_get_drvdata(vha->hw->pdev);
3591                 spin_lock_irqsave(vha->host->host_lock, flags);
3592                 fcport->drport = rport;
3593                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3594                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3595                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3596                 qla2xxx_wake_dpc(base_vha);
3597         } else {
3598                 int now;
3599                 if (rport) {
3600                         ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
3601                                 "%s %8phN. rport %p roles %x \n",
3602                                 __func__, fcport->port_name, rport,
3603                                 rport->roles);
3604                         fc_remote_port_delete(rport);
3605                 }
3606                 qlt_do_generation_tick(vha, &now);
3607         }
3608 }
3609
3610 /*
3611  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3612  *
3613  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3614  *
3615  * Return: None.
3616  *
3617  * Context:
3618  */
3619 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3620     int do_login, int defer)
3621 {
3622         if (IS_QLAFX00(vha->hw)) {
3623                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3624                 qla2x00_schedule_rport_del(vha, fcport, defer);
3625                 return;
3626         }
3627
3628         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3629             vha->vp_idx == fcport->vha->vp_idx) {
3630                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3631                 qla2x00_schedule_rport_del(vha, fcport, defer);
3632         }
3633         /*
3634          * We may need to retry the login, so don't change the state of the
3635          * port but do the retries.
3636          */
3637         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3638                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3639
3640         if (!do_login)
3641                 return;
3642
3643         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3644
3645         if (fcport->login_retry == 0) {
3646                 fcport->login_retry = vha->hw->login_retry_count;
3647
3648                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3649                     "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3650                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3651         }
3652 }
3653
3654 /*
3655  * qla2x00_mark_all_devices_lost
3656  *      Updates fcport state when device goes offline.
3657  *
3658  * Input:
3659  *      ha = adapter block pointer.
3660  *      fcport = port structure pointer.
3661  *
3662  * Return:
3663  *      None.
3664  *
3665  * Context:
3666  */
3667 void
3668 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3669 {
3670         fc_port_t *fcport;
3671
3672         ql_dbg(ql_dbg_disc, vha, 0xffff,
3673                    "Mark all dev lost\n");
3674
3675         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3676                 fcport->scan_state = 0;
3677                 qlt_schedule_sess_for_deletion_lock(fcport);
3678
3679                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3680                         continue;
3681
3682                 /*
3683                  * No point in marking the device as lost, if the device is
3684                  * already DEAD.
3685                  */
3686                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3687                         continue;
3688                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3689                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3690                         if (defer)
3691                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3692                         else if (vha->vp_idx == fcport->vha->vp_idx)
3693                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3694                 }
3695         }
3696 }
3697
3698 /*
3699 * qla2x00_mem_alloc
3700 *      Allocates adapter memory.
3701 *
3702 * Returns:
3703 *      0  = success.
3704 *      !0  = failure.
3705 */
3706 static int
3707 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3708         struct req_que **req, struct rsp_que **rsp)
3709 {
3710         char    name[16];
3711
3712         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3713                 &ha->init_cb_dma, GFP_KERNEL);
3714         if (!ha->init_cb)
3715                 goto fail;
3716
3717         if (qlt_mem_alloc(ha) < 0)
3718                 goto fail_free_init_cb;
3719
3720         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3721                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3722         if (!ha->gid_list)
3723                 goto fail_free_tgt_mem;
3724
3725         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3726         if (!ha->srb_mempool)
3727                 goto fail_free_gid_list;
3728
3729         if (IS_P3P_TYPE(ha)) {
3730                 /* Allocate cache for CT6 Ctx. */
3731                 if (!ctx_cachep) {
3732                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3733                                 sizeof(struct ct6_dsd), 0,
3734                                 SLAB_HWCACHE_ALIGN, NULL);
3735                         if (!ctx_cachep)
3736                                 goto fail_free_srb_mempool;
3737                 }
3738                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3739                         ctx_cachep);
3740                 if (!ha->ctx_mempool)
3741                         goto fail_free_srb_mempool;
3742                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3743                     "ctx_cachep=%p ctx_mempool=%p.\n",
3744                     ctx_cachep, ha->ctx_mempool);
3745         }
3746
3747         /* Get memory for cached NVRAM */
3748         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3749         if (!ha->nvram)
3750                 goto fail_free_ctx_mempool;
3751
3752         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3753                 ha->pdev->device);
3754         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3755                 DMA_POOL_SIZE, 8, 0);
3756         if (!ha->s_dma_pool)
3757                 goto fail_free_nvram;
3758
3759         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3760             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3761             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3762
3763         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3764                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3765                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3766                 if (!ha->dl_dma_pool) {
3767                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3768                             "Failed to allocate memory for dl_dma_pool.\n");
3769                         goto fail_s_dma_pool;
3770                 }
3771
3772                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3773                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3774                 if (!ha->fcp_cmnd_dma_pool) {
3775                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3776                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3777                         goto fail_dl_dma_pool;
3778                 }
3779                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3780                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3781                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3782         }
3783
3784         /* Allocate memory for SNS commands */
3785         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3786         /* Get consistent memory allocated for SNS commands */
3787                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3788                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3789                 if (!ha->sns_cmd)
3790                         goto fail_dma_pool;
3791                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3792                     "sns_cmd: %p.\n", ha->sns_cmd);
3793         } else {
3794         /* Get consistent memory allocated for MS IOCB */
3795                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3796                         &ha->ms_iocb_dma);
3797                 if (!ha->ms_iocb)
3798                         goto fail_dma_pool;
3799         /* Get consistent memory allocated for CT SNS commands */
3800                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3801                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3802                 if (!ha->ct_sns)
3803                         goto fail_free_ms_iocb;
3804                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3805                     "ms_iocb=%p ct_sns=%p.\n",
3806                     ha->ms_iocb, ha->ct_sns);
3807         }
3808
3809         /* Allocate memory for request ring */
3810         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3811         if (!*req) {
3812                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3813                     "Failed to allocate memory for req.\n");
3814                 goto fail_req;
3815         }
3816         (*req)->length = req_len;
3817         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3818                 ((*req)->length + 1) * sizeof(request_t),
3819                 &(*req)->dma, GFP_KERNEL);
3820         if (!(*req)->ring) {
3821                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3822                     "Failed to allocate memory for req_ring.\n");
3823                 goto fail_req_ring;
3824         }
3825         /* Allocate memory for response ring */
3826         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3827         if (!*rsp) {
3828                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3829                     "Failed to allocate memory for rsp.\n");
3830                 goto fail_rsp;
3831         }
3832         (*rsp)->hw = ha;
3833         (*rsp)->length = rsp_len;
3834         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3835                 ((*rsp)->length + 1) * sizeof(response_t),
3836                 &(*rsp)->dma, GFP_KERNEL);
3837         if (!(*rsp)->ring) {
3838                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3839                     "Failed to allocate memory for rsp_ring.\n");
3840                 goto fail_rsp_ring;
3841         }
3842         (*req)->rsp = *rsp;
3843         (*rsp)->req = *req;
3844         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3845             "req=%p req->length=%d req->ring=%p rsp=%p "
3846             "rsp->length=%d rsp->ring=%p.\n",
3847             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3848             (*rsp)->ring);
3849         /* Allocate memory for NVRAM data for vports */
3850         if (ha->nvram_npiv_size) {
3851                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3852                     ha->nvram_npiv_size, GFP_KERNEL);
3853                 if (!ha->npiv_info) {
3854                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3855                             "Failed to allocate memory for npiv_info.\n");
3856                         goto fail_npiv_info;
3857                 }
3858         } else
3859                 ha->npiv_info = NULL;
3860
3861         /* Get consistent memory allocated for EX-INIT-CB. */
3862         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3863                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3864                     &ha->ex_init_cb_dma);
3865                 if (!ha->ex_init_cb)
3866                         goto fail_ex_init_cb;
3867                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3868                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3869         }
3870
3871         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3872
3873         /* Get consistent memory allocated for Async Port-Database. */
3874         if (!IS_FWI2_CAPABLE(ha)) {
3875                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3876                         &ha->async_pd_dma);
3877                 if (!ha->async_pd)
3878                         goto fail_async_pd;
3879                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3880                     "async_pd=%p.\n", ha->async_pd);
3881         }
3882
3883         INIT_LIST_HEAD(&ha->vp_list);
3884
3885         /* Allocate memory for our loop_id bitmap */
3886         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3887             GFP_KERNEL);
3888         if (!ha->loop_id_map)
3889                 goto fail_loop_id_map;
3890         else {
3891                 qla2x00_set_reserved_loop_ids(ha);
3892                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3893                     "loop_id_map=%p.\n", ha->loop_id_map);
3894         }
3895
3896         return 0;
3897
3898 fail_loop_id_map:
3899         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3900 fail_async_pd:
3901         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3902 fail_ex_init_cb:
3903         kfree(ha->npiv_info);
3904 fail_npiv_info:
3905         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3906                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3907         (*rsp)->ring = NULL;
3908         (*rsp)->dma = 0;
3909 fail_rsp_ring:
3910         kfree(*rsp);
3911 fail_rsp:
3912         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3913                 sizeof(request_t), (*req)->ring, (*req)->dma);
3914         (*req)->ring = NULL;
3915         (*req)->dma = 0;
3916 fail_req_ring:
3917         kfree(*req);
3918 fail_req:
3919         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3920                 ha->ct_sns, ha->ct_sns_dma);
3921         ha->ct_sns = NULL;
3922         ha->ct_sns_dma = 0;
3923 fail_free_ms_iocb:
3924         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3925         ha->ms_iocb = NULL;
3926         ha->ms_iocb_dma = 0;
3927
3928         if (ha->sns_cmd)
3929                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3930                     ha->sns_cmd, ha->sns_cmd_dma);
3931 fail_dma_pool:
3932         if (IS_QLA82XX(ha) || ql2xenabledif) {
3933                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3934                 ha->fcp_cmnd_dma_pool = NULL;
3935         }
3936 fail_dl_dma_pool:
3937         if (IS_QLA82XX(ha) || ql2xenabledif) {
3938                 dma_pool_destroy(ha->dl_dma_pool);
3939                 ha->dl_dma_pool = NULL;
3940         }
3941 fail_s_dma_pool:
3942         dma_pool_destroy(ha->s_dma_pool);
3943         ha->s_dma_pool = NULL;
3944 fail_free_nvram:
3945         kfree(ha->nvram);
3946         ha->nvram = NULL;
3947 fail_free_ctx_mempool:
3948         if (ha->ctx_mempool)
3949                 mempool_destroy(ha->ctx_mempool);
3950         ha->ctx_mempool = NULL;
3951 fail_free_srb_mempool:
3952         if (ha->srb_mempool)
3953                 mempool_destroy(ha->srb_mempool);
3954         ha->srb_mempool = NULL;
3955 fail_free_gid_list:
3956         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3957         ha->gid_list,
3958         ha->gid_list_dma);
3959         ha->gid_list = NULL;
3960         ha->gid_list_dma = 0;
3961 fail_free_tgt_mem:
3962         qlt_mem_free(ha);
3963 fail_free_init_cb:
3964         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3965         ha->init_cb_dma);
3966         ha->init_cb = NULL;
3967         ha->init_cb_dma = 0;
3968 fail:
3969         ql_log(ql_log_fatal, NULL, 0x0030,
3970             "Memory allocation failure.\n");
3971         return -ENOMEM;
3972 }
3973
3974 int
3975 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
3976 {
3977         int rval;
3978         uint16_t        size, max_cnt, temp;
3979         struct qla_hw_data *ha = vha->hw;
3980
3981         /* Return if we don't need to alloacate any extended logins */
3982         if (!ql2xexlogins)
3983                 return QLA_SUCCESS;
3984
3985         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
3986         max_cnt = 0;
3987         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
3988         if (rval != QLA_SUCCESS) {
3989                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
3990                     "Failed to get exlogin status.\n");
3991                 return rval;
3992         }
3993
3994         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
3995         ha->exlogin_size = (size * temp);
3996         ql_log(ql_log_info, vha, 0xd024,
3997                 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
3998                 max_cnt, size, temp);
3999
4000         ql_log(ql_log_info, vha, 0xd025, "EXLOGIN: requested size=0x%x\n",
4001                 ha->exlogin_size);
4002
4003         /* Get consistent memory for extended logins */
4004         ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4005             ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4006         if (!ha->exlogin_buf) {
4007                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4008                     "Failed to allocate memory for exlogin_buf_dma.\n");
4009                 return -ENOMEM;
4010         }
4011
4012         /* Now configure the dma buffer */
4013         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4014         if (rval) {
4015                 ql_log(ql_log_fatal, vha, 0x00cf,
4016                     "Setup extended login buffer  ****FAILED****.\n");
4017                 qla2x00_free_exlogin_buffer(ha);
4018         }
4019
4020         return rval;
4021 }
4022
4023 /*
4024 * qla2x00_free_exlogin_buffer
4025 *
4026 * Input:
4027 *       ha = adapter block pointer
4028 */
4029 void
4030 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4031 {
4032         if (ha->exlogin_buf) {
4033                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4034                     ha->exlogin_buf, ha->exlogin_buf_dma);
4035                 ha->exlogin_buf = NULL;
4036                 ha->exlogin_size = 0;
4037         }
4038 }
4039
4040 int
4041 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4042 {
4043         int rval;
4044         uint16_t        size, max_cnt, temp;
4045         struct qla_hw_data *ha = vha->hw;
4046
4047         /* Return if we don't need to alloacate any extended logins */
4048         if (!ql2xexchoffld)
4049                 return QLA_SUCCESS;
4050
4051         ql_log(ql_log_info, vha, 0xd014,
4052             "Exchange offload count: %d.\n", ql2xexlogins);
4053
4054         max_cnt = 0;
4055         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4056         if (rval != QLA_SUCCESS) {
4057                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4058                     "Failed to get exlogin status.\n");
4059                 return rval;
4060         }
4061
4062         temp = (ql2xexchoffld > max_cnt) ? max_cnt : ql2xexchoffld;
4063         ha->exchoffld_size = (size * temp);
4064         ql_log(ql_log_info, vha, 0xd016,
4065                 "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
4066                 max_cnt, size, temp);
4067
4068         ql_log(ql_log_info, vha, 0xd017,
4069             "Exchange Buffers requested size = 0x%x\n", ha->exchoffld_size);
4070
4071         /* Get consistent memory for extended logins */
4072         ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4073             ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4074         if (!ha->exchoffld_buf) {
4075                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4076                     "Failed to allocate memory for exchoffld_buf_dma.\n");
4077                 return -ENOMEM;
4078         }
4079
4080         /* Now configure the dma buffer */
4081         rval = qla_set_exchoffld_mem_cfg(vha, ha->exchoffld_buf_dma);
4082         if (rval) {
4083                 ql_log(ql_log_fatal, vha, 0xd02e,
4084                     "Setup exchange offload buffer ****FAILED****.\n");
4085                 qla2x00_free_exchoffld_buffer(ha);
4086         }
4087
4088         return rval;
4089 }
4090
4091 /*
4092 * qla2x00_free_exchoffld_buffer
4093 *
4094 * Input:
4095 *       ha = adapter block pointer
4096 */
4097 void
4098 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4099 {
4100         if (ha->exchoffld_buf) {
4101                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4102                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4103                 ha->exchoffld_buf = NULL;
4104                 ha->exchoffld_size = 0;
4105         }
4106 }
4107
4108 /*
4109 * qla2x00_free_fw_dump
4110 *       Frees fw dump stuff.
4111 *
4112 * Input:
4113 *       ha = adapter block pointer
4114 */
4115 static void
4116 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4117 {
4118         if (ha->fce)
4119                 dma_free_coherent(&ha->pdev->dev,
4120                     FCE_SIZE, ha->fce, ha->fce_dma);
4121
4122         if (ha->eft)
4123                 dma_free_coherent(&ha->pdev->dev,
4124                     EFT_SIZE, ha->eft, ha->eft_dma);
4125
4126         if (ha->fw_dump)
4127                 vfree(ha->fw_dump);
4128         if (ha->fw_dump_template)
4129                 vfree(ha->fw_dump_template);
4130
4131         ha->fce = NULL;
4132         ha->fce_dma = 0;
4133         ha->eft = NULL;
4134         ha->eft_dma = 0;
4135         ha->fw_dumped = 0;
4136         ha->fw_dump_cap_flags = 0;
4137         ha->fw_dump_reading = 0;
4138         ha->fw_dump = NULL;
4139         ha->fw_dump_len = 0;
4140         ha->fw_dump_template = NULL;
4141         ha->fw_dump_template_len = 0;
4142 }
4143
4144 /*
4145 * qla2x00_mem_free
4146 *      Frees all adapter allocated memory.
4147 *
4148 * Input:
4149 *      ha = adapter block pointer.
4150 */
4151 static void
4152 qla2x00_mem_free(struct qla_hw_data *ha)
4153 {
4154         qla2x00_free_fw_dump(ha);
4155
4156         if (ha->mctp_dump)
4157                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4158                     ha->mctp_dump_dma);
4159
4160         if (ha->srb_mempool)
4161                 mempool_destroy(ha->srb_mempool);
4162
4163         if (ha->dcbx_tlv)
4164                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4165                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4166
4167         if (ha->xgmac_data)
4168                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4169                     ha->xgmac_data, ha->xgmac_data_dma);
4170
4171         if (ha->sns_cmd)
4172                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4173                 ha->sns_cmd, ha->sns_cmd_dma);
4174
4175         if (ha->ct_sns)
4176                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4177                 ha->ct_sns, ha->ct_sns_dma);
4178
4179         if (ha->sfp_data)
4180                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
4181
4182         if (ha->ms_iocb)
4183                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4184
4185         if (ha->ex_init_cb)
4186                 dma_pool_free(ha->s_dma_pool,
4187                         ha->ex_init_cb, ha->ex_init_cb_dma);
4188
4189         if (ha->async_pd)
4190                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4191
4192         if (ha->s_dma_pool)
4193                 dma_pool_destroy(ha->s_dma_pool);
4194
4195         if (ha->gid_list)
4196                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4197                 ha->gid_list, ha->gid_list_dma);
4198
4199         if (IS_QLA82XX(ha)) {
4200                 if (!list_empty(&ha->gbl_dsd_list)) {
4201                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4202
4203                         /* clean up allocated prev pool */
4204                         list_for_each_entry_safe(dsd_ptr,
4205                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4206                                 dma_pool_free(ha->dl_dma_pool,
4207                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4208                                 list_del(&dsd_ptr->list);
4209                                 kfree(dsd_ptr);
4210                         }
4211                 }
4212         }
4213
4214         if (ha->dl_dma_pool)
4215                 dma_pool_destroy(ha->dl_dma_pool);
4216
4217         if (ha->fcp_cmnd_dma_pool)
4218                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4219
4220         if (ha->ctx_mempool)
4221                 mempool_destroy(ha->ctx_mempool);
4222
4223         qlt_mem_free(ha);
4224
4225         if (ha->init_cb)
4226                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4227                         ha->init_cb, ha->init_cb_dma);
4228         vfree(ha->optrom_buffer);
4229         kfree(ha->nvram);
4230         kfree(ha->npiv_info);
4231         kfree(ha->swl);
4232         kfree(ha->loop_id_map);
4233
4234         ha->srb_mempool = NULL;
4235         ha->ctx_mempool = NULL;
4236         ha->sns_cmd = NULL;
4237         ha->sns_cmd_dma = 0;
4238         ha->ct_sns = NULL;
4239         ha->ct_sns_dma = 0;
4240         ha->ms_iocb = NULL;
4241         ha->ms_iocb_dma = 0;
4242         ha->init_cb = NULL;
4243         ha->init_cb_dma = 0;
4244         ha->ex_init_cb = NULL;
4245         ha->ex_init_cb_dma = 0;
4246         ha->async_pd = NULL;
4247         ha->async_pd_dma = 0;
4248
4249         ha->s_dma_pool = NULL;
4250         ha->dl_dma_pool = NULL;
4251         ha->fcp_cmnd_dma_pool = NULL;
4252
4253         ha->gid_list = NULL;
4254         ha->gid_list_dma = 0;
4255
4256         ha->tgt.atio_ring = NULL;
4257         ha->tgt.atio_dma = 0;
4258         ha->tgt.tgt_vp_map = NULL;
4259 }
4260
4261 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4262                                                 struct qla_hw_data *ha)
4263 {
4264         struct Scsi_Host *host;
4265         struct scsi_qla_host *vha = NULL;
4266
4267         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4268         if (!host) {
4269                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4270                     "Failed to allocate host from the scsi layer, aborting.\n");
4271                 return NULL;
4272         }
4273
4274         /* Clear our data area */
4275         vha = shost_priv(host);
4276         memset(vha, 0, sizeof(scsi_qla_host_t));
4277
4278         vha->host = host;
4279         vha->host_no = host->host_no;
4280         vha->hw = ha;
4281
4282         INIT_LIST_HEAD(&vha->vp_fcports);
4283         INIT_LIST_HEAD(&vha->work_list);
4284         INIT_LIST_HEAD(&vha->list);
4285         INIT_LIST_HEAD(&vha->qla_cmd_list);
4286         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4287         INIT_LIST_HEAD(&vha->logo_list);
4288         INIT_LIST_HEAD(&vha->plogi_ack_list);
4289         INIT_LIST_HEAD(&vha->qp_list);
4290         INIT_LIST_HEAD(&vha->gnl.fcports);
4291
4292         spin_lock_init(&vha->work_lock);
4293         spin_lock_init(&vha->cmd_list_lock);
4294         init_waitqueue_head(&vha->fcport_waitQ);
4295         init_waitqueue_head(&vha->vref_waitq);
4296
4297         vha->gnl.size = sizeof(struct get_name_list_extended) *
4298                         (ha->max_loop_id + 1);
4299         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4300             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4301         if (!vha->gnl.l) {
4302                 ql_log(ql_log_fatal, vha, 0xffff,
4303                     "Alloc failed for name list.\n");
4304                 scsi_remove_host(vha->host);
4305                 return NULL;
4306         }
4307
4308         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4309         ql_dbg(ql_dbg_init, vha, 0x0041,
4310             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4311             vha->host, vha->hw, vha,
4312             dev_name(&(ha->pdev->dev)));
4313
4314         return vha;
4315 }
4316
4317 struct qla_work_evt *
4318 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4319 {
4320         struct qla_work_evt *e;
4321         uint8_t bail;
4322
4323         QLA_VHA_MARK_BUSY(vha, bail);
4324         if (bail)
4325                 return NULL;
4326
4327         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4328         if (!e) {
4329                 QLA_VHA_MARK_NOT_BUSY(vha);
4330                 return NULL;
4331         }
4332
4333         INIT_LIST_HEAD(&e->list);
4334         e->type = type;
4335         e->flags = QLA_EVT_FLAG_FREE;
4336         return e;
4337 }
4338
4339 int
4340 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4341 {
4342         unsigned long flags;
4343
4344         spin_lock_irqsave(&vha->work_lock, flags);
4345         list_add_tail(&e->list, &vha->work_list);
4346         spin_unlock_irqrestore(&vha->work_lock, flags);
4347
4348         if (QLA_EARLY_LINKUP(vha->hw))
4349                 schedule_work(&vha->iocb_work);
4350         else
4351                 qla2xxx_wake_dpc(vha);
4352
4353         return QLA_SUCCESS;
4354 }
4355
4356 int
4357 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4358     u32 data)
4359 {
4360         struct qla_work_evt *e;
4361
4362         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4363         if (!e)
4364                 return QLA_FUNCTION_FAILED;
4365
4366         e->u.aen.code = code;
4367         e->u.aen.data = data;
4368         return qla2x00_post_work(vha, e);
4369 }
4370
4371 int
4372 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4373 {
4374         struct qla_work_evt *e;
4375
4376         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4377         if (!e)
4378                 return QLA_FUNCTION_FAILED;
4379
4380         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4381         return qla2x00_post_work(vha, e);
4382 }
4383
4384 #define qla2x00_post_async_work(name, type)     \
4385 int qla2x00_post_async_##name##_work(           \
4386     struct scsi_qla_host *vha,                  \
4387     fc_port_t *fcport, uint16_t *data)          \
4388 {                                               \
4389         struct qla_work_evt *e;                 \
4390                                                 \
4391         e = qla2x00_alloc_work(vha, type);      \
4392         if (!e)                                 \
4393                 return QLA_FUNCTION_FAILED;     \
4394                                                 \
4395         e->u.logio.fcport = fcport;             \
4396         if (data) {                             \
4397                 e->u.logio.data[0] = data[0];   \
4398                 e->u.logio.data[1] = data[1];   \
4399         }                                       \
4400         return qla2x00_post_work(vha, e);       \
4401 }
4402
4403 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4404 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4405 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4406 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4407 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4408
4409 int
4410 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4411 {
4412         struct qla_work_evt *e;
4413
4414         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4415         if (!e)
4416                 return QLA_FUNCTION_FAILED;
4417
4418         e->u.uevent.code = code;
4419         return qla2x00_post_work(vha, e);
4420 }
4421
4422 static void
4423 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4424 {
4425         char event_string[40];
4426         char *envp[] = { event_string, NULL };
4427
4428         switch (code) {
4429         case QLA_UEVENT_CODE_FW_DUMP:
4430                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4431                     vha->host_no);
4432                 break;
4433         default:
4434                 /* do nothing */
4435                 break;
4436         }
4437         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4438 }
4439
4440 int
4441 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4442                         uint32_t *data, int cnt)
4443 {
4444         struct qla_work_evt *e;
4445
4446         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4447         if (!e)
4448                 return QLA_FUNCTION_FAILED;
4449
4450         e->u.aenfx.evtcode = evtcode;
4451         e->u.aenfx.count = cnt;
4452         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4453         return qla2x00_post_work(vha, e);
4454 }
4455
4456 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4457 {
4458         struct qla_work_evt *e;
4459
4460         e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4461         if (!e)
4462                 return QLA_FUNCTION_FAILED;
4463
4464         e->u.fcport.fcport = fcport;
4465         return qla2x00_post_work(vha, e);
4466 }
4467
4468 static
4469 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4470 {
4471         unsigned long flags;
4472         fc_port_t *fcport =  NULL;
4473         struct qlt_plogi_ack_t *pla =
4474             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4475
4476         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4477         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4478         if (fcport) {
4479                 fcport->d_id = e->u.new_sess.id;
4480                 if (pla) {
4481                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4482                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4483                         /* we took an extra ref_count to prevent PLOGI ACK when
4484                          * fcport/sess has not been created.
4485                          */
4486                         pla->ref_count--;
4487                 }
4488         } else {
4489                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4490                 if (fcport) {
4491                         fcport->d_id = e->u.new_sess.id;
4492                         fcport->scan_state = QLA_FCPORT_FOUND;
4493                         fcport->flags |= FCF_FABRIC_DEVICE;
4494                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4495
4496                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4497                             WWN_SIZE);
4498                         list_add_tail(&fcport->list, &vha->vp_fcports);
4499
4500                         if (pla) {
4501                                 qlt_plogi_ack_link(vha, pla, fcport,
4502                                     QLT_PLOGI_LINK_SAME_WWN);
4503                                 pla->ref_count--;
4504                         }
4505                 }
4506         }
4507         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4508
4509         if (fcport) {
4510                 if (pla)
4511                         qlt_plogi_ack_unref(vha, pla);
4512                 else
4513                         qla24xx_async_gnl(vha, fcport);
4514         }
4515 }
4516
4517 void
4518 qla2x00_do_work(struct scsi_qla_host *vha)
4519 {
4520         struct qla_work_evt *e, *tmp;
4521         unsigned long flags;
4522         LIST_HEAD(work);
4523
4524         spin_lock_irqsave(&vha->work_lock, flags);
4525         list_splice_init(&vha->work_list, &work);
4526         spin_unlock_irqrestore(&vha->work_lock, flags);
4527
4528         list_for_each_entry_safe(e, tmp, &work, list) {
4529                 list_del_init(&e->list);
4530
4531                 switch (e->type) {
4532                 case QLA_EVT_AEN:
4533                         fc_host_post_event(vha->host, fc_get_event_number(),
4534                             e->u.aen.code, e->u.aen.data);
4535                         break;
4536                 case QLA_EVT_IDC_ACK:
4537                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4538                         break;
4539                 case QLA_EVT_ASYNC_LOGIN:
4540                         qla2x00_async_login(vha, e->u.logio.fcport,
4541                             e->u.logio.data);
4542                         break;
4543                 case QLA_EVT_ASYNC_LOGOUT:
4544                         qla2x00_async_logout(vha, e->u.logio.fcport);
4545                         break;
4546                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4547                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4548                             e->u.logio.data);
4549                         break;
4550                 case QLA_EVT_ASYNC_ADISC:
4551                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4552                             e->u.logio.data);
4553                         break;
4554                 case QLA_EVT_ASYNC_ADISC_DONE:
4555                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4556                             e->u.logio.data);
4557                         break;
4558                 case QLA_EVT_UEVENT:
4559                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4560                         break;
4561                 case QLA_EVT_AENFX:
4562                         qlafx00_process_aen(vha, e);
4563                         break;
4564                 case QLA_EVT_GIDPN:
4565                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
4566                         break;
4567                 case QLA_EVT_GPNID:
4568                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
4569                         break;
4570                 case QLA_EVT_GPNID_DONE:
4571                         qla24xx_async_gpnid_done(vha, e->u.iosb.sp);
4572                         break;
4573                 case QLA_EVT_NEW_SESS:
4574                         qla24xx_create_new_sess(vha, e);
4575                         break;
4576                 case QLA_EVT_GPDB:
4577                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
4578                             e->u.fcport.opt);
4579                         break;
4580                 case QLA_EVT_GPSC:
4581                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
4582                         break;
4583                 case QLA_EVT_UPD_FCPORT:
4584                         qla2x00_update_fcport(vha, e->u.fcport.fcport);
4585                         break;
4586                 case QLA_EVT_GNL:
4587                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
4588                         break;
4589                 case QLA_EVT_NACK:
4590                         qla24xx_do_nack_work(vha, e);
4591                         break;
4592                 }
4593                 if (e->flags & QLA_EVT_FLAG_FREE)
4594                         kfree(e);
4595
4596                 /* For each work completed decrement vha ref count */
4597                 QLA_VHA_MARK_NOT_BUSY(vha);
4598         }
4599 }
4600
4601 /* Relogins all the fcports of a vport
4602  * Context: dpc thread
4603  */
4604 void qla2x00_relogin(struct scsi_qla_host *vha)
4605 {
4606         fc_port_t       *fcport;
4607         int status;
4608         struct event_arg ea;
4609
4610         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4611         /*
4612          * If the port is not ONLINE then try to login
4613          * to it if we haven't run out of retries.
4614          */
4615                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4616                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4617                         fcport->login_retry--;
4618                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4619                                 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
4620                                     "%s %8phC DS %d LS %d\n", __func__,
4621                                     fcport->port_name, fcport->disc_state,
4622                                     fcport->fw_login_state);
4623                                 memset(&ea, 0, sizeof(ea));
4624                                 ea.event = FCME_RELOGIN;
4625                                 ea.fcport = fcport;
4626                                 qla2x00_fcport_event_handler(vha, &ea);
4627                         } else {
4628                                 status = qla2x00_local_device_login(vha,
4629                                                                 fcport);
4630                                 if (status == QLA_SUCCESS) {
4631                                         fcport->old_loop_id = fcport->loop_id;
4632                                         ql_dbg(ql_dbg_disc, vha, 0x2003,
4633                                             "Port login OK: logged in ID 0x%x.\n",
4634                                             fcport->loop_id);
4635                                         qla2x00_update_fcport(vha, fcport);
4636                                 } else if (status == 1) {
4637                                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4638                                         /* retry the login again */
4639                                         ql_dbg(ql_dbg_disc, vha, 0x2007,
4640                                             "Retrying %d login again loop_id 0x%x.\n",
4641                                             fcport->login_retry,
4642                                             fcport->loop_id);
4643                                 } else {
4644                                         fcport->login_retry = 0;
4645                                 }
4646
4647                                 if (fcport->login_retry == 0 &&
4648                                     status != QLA_SUCCESS)
4649                                         qla2x00_clear_loop_id(fcport);
4650                         }
4651                 }
4652                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4653                         break;
4654         }
4655 }
4656
4657 /* Schedule work on any of the dpc-workqueues */
4658 void
4659 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4660 {
4661         struct qla_hw_data *ha = base_vha->hw;
4662
4663         switch (work_code) {
4664         case MBA_IDC_AEN: /* 0x8200 */
4665                 if (ha->dpc_lp_wq)
4666                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4667                 break;
4668
4669         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4670                 if (!ha->flags.nic_core_reset_hdlr_active) {
4671                         if (ha->dpc_hp_wq)
4672                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4673                 } else
4674                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4675                             "NIC Core reset is already active. Skip "
4676                             "scheduling it again.\n");
4677                 break;
4678         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4679                 if (ha->dpc_hp_wq)
4680                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4681                 break;
4682         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4683                 if (ha->dpc_hp_wq)
4684                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4685                 break;
4686         default:
4687                 ql_log(ql_log_warn, base_vha, 0xb05f,
4688                     "Unknown work-code=0x%x.\n", work_code);
4689         }
4690
4691         return;
4692 }
4693
4694 /* Work: Perform NIC Core Unrecoverable state handling */
4695 void
4696 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4697 {
4698         struct qla_hw_data *ha =
4699                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4700         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4701         uint32_t dev_state = 0;
4702
4703         qla83xx_idc_lock(base_vha, 0);
4704         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4705         qla83xx_reset_ownership(base_vha);
4706         if (ha->flags.nic_core_reset_owner) {
4707                 ha->flags.nic_core_reset_owner = 0;
4708                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4709                     QLA8XXX_DEV_FAILED);
4710                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4711                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4712         }
4713         qla83xx_idc_unlock(base_vha, 0);
4714 }
4715
4716 /* Work: Execute IDC state handler */
4717 void
4718 qla83xx_idc_state_handler_work(struct work_struct *work)
4719 {
4720         struct qla_hw_data *ha =
4721                 container_of(work, struct qla_hw_data, idc_state_handler);
4722         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4723         uint32_t dev_state = 0;
4724
4725         qla83xx_idc_lock(base_vha, 0);
4726         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4727         if (dev_state == QLA8XXX_DEV_FAILED ||
4728                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4729                 qla83xx_idc_state_handler(base_vha);
4730         qla83xx_idc_unlock(base_vha, 0);
4731 }
4732
4733 static int
4734 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4735 {
4736         int rval = QLA_SUCCESS;
4737         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4738         uint32_t heart_beat_counter1, heart_beat_counter2;
4739
4740         do {
4741                 if (time_after(jiffies, heart_beat_wait)) {
4742                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4743                             "Nic Core f/w is not alive.\n");
4744                         rval = QLA_FUNCTION_FAILED;
4745                         break;
4746                 }
4747
4748                 qla83xx_idc_lock(base_vha, 0);
4749                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4750                     &heart_beat_counter1);
4751                 qla83xx_idc_unlock(base_vha, 0);
4752                 msleep(100);
4753                 qla83xx_idc_lock(base_vha, 0);
4754                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4755                     &heart_beat_counter2);
4756                 qla83xx_idc_unlock(base_vha, 0);
4757         } while (heart_beat_counter1 == heart_beat_counter2);
4758
4759         return rval;
4760 }
4761
4762 /* Work: Perform NIC Core Reset handling */
4763 void
4764 qla83xx_nic_core_reset_work(struct work_struct *work)
4765 {
4766         struct qla_hw_data *ha =
4767                 container_of(work, struct qla_hw_data, nic_core_reset);
4768         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4769         uint32_t dev_state = 0;
4770
4771         if (IS_QLA2031(ha)) {
4772                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4773                         ql_log(ql_log_warn, base_vha, 0xb081,
4774                             "Failed to dump mctp\n");
4775                 return;
4776         }
4777
4778         if (!ha->flags.nic_core_reset_hdlr_active) {
4779                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4780                         qla83xx_idc_lock(base_vha, 0);
4781                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4782                             &dev_state);
4783                         qla83xx_idc_unlock(base_vha, 0);
4784                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4785                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4786                                     "Nic Core f/w is alive.\n");
4787                                 return;
4788                         }
4789                 }
4790
4791                 ha->flags.nic_core_reset_hdlr_active = 1;
4792                 if (qla83xx_nic_core_reset(base_vha)) {
4793                         /* NIC Core reset failed. */
4794                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4795                             "NIC Core reset failed.\n");
4796                 }
4797                 ha->flags.nic_core_reset_hdlr_active = 0;
4798         }
4799 }
4800
4801 /* Work: Handle 8200 IDC aens */
4802 void
4803 qla83xx_service_idc_aen(struct work_struct *work)
4804 {
4805         struct qla_hw_data *ha =
4806                 container_of(work, struct qla_hw_data, idc_aen);
4807         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4808         uint32_t dev_state, idc_control;
4809
4810         qla83xx_idc_lock(base_vha, 0);
4811         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4812         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4813         qla83xx_idc_unlock(base_vha, 0);
4814         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4815                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4816                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4817                             "Application requested NIC Core Reset.\n");
4818                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4819                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4820                     QLA_SUCCESS) {
4821                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4822                             "Other protocol driver requested NIC Core Reset.\n");
4823                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4824                 }
4825         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4826                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4827                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4828         }
4829 }
4830
4831 static void
4832 qla83xx_wait_logic(void)
4833 {
4834         int i;
4835
4836         /* Yield CPU */
4837         if (!in_interrupt()) {
4838                 /*
4839                  * Wait about 200ms before retrying again.
4840                  * This controls the number of retries for single
4841                  * lock operation.
4842                  */
4843                 msleep(100);
4844                 schedule();
4845         } else {
4846                 for (i = 0; i < 20; i++)
4847                         cpu_relax(); /* This a nop instr on i386 */
4848         }
4849 }
4850
4851 static int
4852 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4853 {
4854         int rval;
4855         uint32_t data;
4856         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4857         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4858         struct qla_hw_data *ha = base_vha->hw;
4859         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4860             "Trying force recovery of the IDC lock.\n");
4861
4862         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4863         if (rval)
4864                 return rval;
4865
4866         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4867                 return QLA_SUCCESS;
4868         } else {
4869                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4870                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4871                     data);
4872                 if (rval)
4873                         return rval;
4874
4875                 msleep(200);
4876
4877                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4878                     &data);
4879                 if (rval)
4880                         return rval;
4881
4882                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4883                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4884                                         ~(idc_lck_rcvry_stage_mask));
4885                         rval = qla83xx_wr_reg(base_vha,
4886                             QLA83XX_IDC_LOCK_RECOVERY, data);
4887                         if (rval)
4888                                 return rval;
4889
4890                         /* Forcefully perform IDC UnLock */
4891                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4892                             &data);
4893                         if (rval)
4894                                 return rval;
4895                         /* Clear lock-id by setting 0xff */
4896                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4897                             0xff);
4898                         if (rval)
4899                                 return rval;
4900                         /* Clear lock-recovery by setting 0x0 */
4901                         rval = qla83xx_wr_reg(base_vha,
4902                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4903                         if (rval)
4904                                 return rval;
4905                 } else
4906                         return QLA_SUCCESS;
4907         }
4908
4909         return rval;
4910 }
4911
4912 static int
4913 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4914 {
4915         int rval = QLA_SUCCESS;
4916         uint32_t o_drv_lockid, n_drv_lockid;
4917         unsigned long lock_recovery_timeout;
4918
4919         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4920 retry_lockid:
4921         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4922         if (rval)
4923                 goto exit;
4924
4925         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4926         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4927                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4928                         return QLA_SUCCESS;
4929                 else
4930                         return QLA_FUNCTION_FAILED;
4931         }
4932
4933         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4934         if (rval)
4935                 goto exit;
4936
4937         if (o_drv_lockid == n_drv_lockid) {
4938                 qla83xx_wait_logic();
4939                 goto retry_lockid;
4940         } else
4941                 return QLA_SUCCESS;
4942
4943 exit:
4944         return rval;
4945 }
4946
4947 void
4948 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4949 {
4950         uint16_t options = (requester_id << 15) | BIT_6;
4951         uint32_t data;
4952         uint32_t lock_owner;
4953         struct qla_hw_data *ha = base_vha->hw;
4954
4955         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4956 retry_lock:
4957         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4958             == QLA_SUCCESS) {
4959                 if (data) {
4960                         /* Setting lock-id to our function-number */
4961                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4962                             ha->portnum);
4963                 } else {
4964                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4965                             &lock_owner);
4966                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4967                             "Failed to acquire IDC lock, acquired by %d, "
4968                             "retrying...\n", lock_owner);
4969
4970                         /* Retry/Perform IDC-Lock recovery */
4971                         if (qla83xx_idc_lock_recovery(base_vha)
4972                             == QLA_SUCCESS) {
4973                                 qla83xx_wait_logic();
4974                                 goto retry_lock;
4975                         } else
4976                                 ql_log(ql_log_warn, base_vha, 0xb075,
4977                                     "IDC Lock recovery FAILED.\n");
4978                 }
4979
4980         }
4981
4982         return;
4983
4984         /* XXX: IDC-lock implementation using access-control mbx */
4985 retry_lock2:
4986         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4987                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4988                     "Failed to acquire IDC lock. retrying...\n");
4989                 /* Retry/Perform IDC-Lock recovery */
4990                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4991                         qla83xx_wait_logic();
4992                         goto retry_lock2;
4993                 } else
4994                         ql_log(ql_log_warn, base_vha, 0xb076,
4995                             "IDC Lock recovery FAILED.\n");
4996         }
4997
4998         return;
4999 }
5000
5001 void
5002 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5003 {
5004 #if 0
5005         uint16_t options = (requester_id << 15) | BIT_7;
5006 #endif
5007         uint16_t retry;
5008         uint32_t data;
5009         struct qla_hw_data *ha = base_vha->hw;
5010
5011         /* IDC-unlock implementation using driver-unlock/lock-id
5012          * remote registers
5013          */
5014         retry = 0;
5015 retry_unlock:
5016         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5017             == QLA_SUCCESS) {
5018                 if (data == ha->portnum) {
5019                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5020                         /* Clearing lock-id by setting 0xff */
5021                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5022                 } else if (retry < 10) {
5023                         /* SV: XXX: IDC unlock retrying needed here? */
5024
5025                         /* Retry for IDC-unlock */
5026                         qla83xx_wait_logic();
5027                         retry++;
5028                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5029                             "Failed to release IDC lock, retrying=%d\n", retry);
5030                         goto retry_unlock;
5031                 }
5032         } else if (retry < 10) {
5033                 /* Retry for IDC-unlock */
5034                 qla83xx_wait_logic();
5035                 retry++;
5036                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5037                     "Failed to read drv-lockid, retrying=%d\n", retry);
5038                 goto retry_unlock;
5039         }
5040
5041         return;
5042
5043 #if 0
5044         /* XXX: IDC-unlock implementation using access-control mbx */
5045         retry = 0;
5046 retry_unlock2:
5047         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5048                 if (retry < 10) {
5049                         /* Retry for IDC-unlock */
5050                         qla83xx_wait_logic();
5051                         retry++;
5052                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5053                             "Failed to release IDC lock, retrying=%d\n", retry);
5054                         goto retry_unlock2;
5055                 }
5056         }
5057
5058         return;
5059 #endif
5060 }
5061
5062 int
5063 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5064 {
5065         int rval = QLA_SUCCESS;
5066         struct qla_hw_data *ha = vha->hw;
5067         uint32_t drv_presence;
5068
5069         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5070         if (rval == QLA_SUCCESS) {
5071                 drv_presence |= (1 << ha->portnum);
5072                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5073                     drv_presence);
5074         }
5075
5076         return rval;
5077 }
5078
5079 int
5080 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5081 {
5082         int rval = QLA_SUCCESS;
5083
5084         qla83xx_idc_lock(vha, 0);
5085         rval = __qla83xx_set_drv_presence(vha);
5086         qla83xx_idc_unlock(vha, 0);
5087
5088         return rval;
5089 }
5090
5091 int
5092 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5093 {
5094         int rval = QLA_SUCCESS;
5095         struct qla_hw_data *ha = vha->hw;
5096         uint32_t drv_presence;
5097
5098         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5099         if (rval == QLA_SUCCESS) {
5100                 drv_presence &= ~(1 << ha->portnum);
5101                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5102                     drv_presence);
5103         }
5104
5105         return rval;
5106 }
5107
5108 int
5109 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5110 {
5111         int rval = QLA_SUCCESS;
5112
5113         qla83xx_idc_lock(vha, 0);
5114         rval = __qla83xx_clear_drv_presence(vha);
5115         qla83xx_idc_unlock(vha, 0);
5116
5117         return rval;
5118 }
5119
5120 static void
5121 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5122 {
5123         struct qla_hw_data *ha = vha->hw;
5124         uint32_t drv_ack, drv_presence;
5125         unsigned long ack_timeout;
5126
5127         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5128         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5129         while (1) {
5130                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5131                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5132                 if ((drv_ack & drv_presence) == drv_presence)
5133                         break;
5134
5135                 if (time_after_eq(jiffies, ack_timeout)) {
5136                         ql_log(ql_log_warn, vha, 0xb067,
5137                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5138                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5139                         /*
5140                          * The function(s) which did not ack in time are forced
5141                          * to withdraw any further participation in the IDC
5142                          * reset.
5143                          */
5144                         if (drv_ack != drv_presence)
5145                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5146                                     drv_ack);
5147                         break;
5148                 }
5149
5150                 qla83xx_idc_unlock(vha, 0);
5151                 msleep(1000);
5152                 qla83xx_idc_lock(vha, 0);
5153         }
5154
5155         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5156         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5157 }
5158
5159 static int
5160 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5161 {
5162         int rval = QLA_SUCCESS;
5163         uint32_t idc_control;
5164
5165         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5166         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5167
5168         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5169         __qla83xx_get_idc_control(vha, &idc_control);
5170         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5171         __qla83xx_set_idc_control(vha, 0);
5172
5173         qla83xx_idc_unlock(vha, 0);
5174         rval = qla83xx_restart_nic_firmware(vha);
5175         qla83xx_idc_lock(vha, 0);
5176
5177         if (rval != QLA_SUCCESS) {
5178                 ql_log(ql_log_fatal, vha, 0xb06a,
5179                     "Failed to restart NIC f/w.\n");
5180                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5181                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5182         } else {
5183                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5184                     "Success in restarting nic f/w.\n");
5185                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5186                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5187         }
5188
5189         return rval;
5190 }
5191
5192 /* Assumes idc_lock always held on entry */
5193 int
5194 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5195 {
5196         struct qla_hw_data *ha = base_vha->hw;
5197         int rval = QLA_SUCCESS;
5198         unsigned long dev_init_timeout;
5199         uint32_t dev_state;
5200
5201         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5202         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5203
5204         while (1) {
5205
5206                 if (time_after_eq(jiffies, dev_init_timeout)) {
5207                         ql_log(ql_log_warn, base_vha, 0xb06e,
5208                             "Initialization TIMEOUT!\n");
5209                         /* Init timeout. Disable further NIC Core
5210                          * communication.
5211                          */
5212                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5213                                 QLA8XXX_DEV_FAILED);
5214                         ql_log(ql_log_info, base_vha, 0xb06f,
5215                             "HW State: FAILED.\n");
5216                 }
5217
5218                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5219                 switch (dev_state) {
5220                 case QLA8XXX_DEV_READY:
5221                         if (ha->flags.nic_core_reset_owner)
5222                                 qla83xx_idc_audit(base_vha,
5223                                     IDC_AUDIT_COMPLETION);
5224                         ha->flags.nic_core_reset_owner = 0;
5225                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5226                             "Reset_owner reset by 0x%x.\n",
5227                             ha->portnum);
5228                         goto exit;
5229                 case QLA8XXX_DEV_COLD:
5230                         if (ha->flags.nic_core_reset_owner)
5231                                 rval = qla83xx_device_bootstrap(base_vha);
5232                         else {
5233                         /* Wait for AEN to change device-state */
5234                                 qla83xx_idc_unlock(base_vha, 0);
5235                                 msleep(1000);
5236                                 qla83xx_idc_lock(base_vha, 0);
5237                         }
5238                         break;
5239                 case QLA8XXX_DEV_INITIALIZING:
5240                         /* Wait for AEN to change device-state */
5241                         qla83xx_idc_unlock(base_vha, 0);
5242                         msleep(1000);
5243                         qla83xx_idc_lock(base_vha, 0);
5244                         break;
5245                 case QLA8XXX_DEV_NEED_RESET:
5246                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5247                                 qla83xx_need_reset_handler(base_vha);
5248                         else {
5249                                 /* Wait for AEN to change device-state */
5250                                 qla83xx_idc_unlock(base_vha, 0);
5251                                 msleep(1000);
5252                                 qla83xx_idc_lock(base_vha, 0);
5253                         }
5254                         /* reset timeout value after need reset handler */
5255                         dev_init_timeout = jiffies +
5256                             (ha->fcoe_dev_init_timeout * HZ);
5257                         break;
5258                 case QLA8XXX_DEV_NEED_QUIESCENT:
5259                         /* XXX: DEBUG for now */
5260                         qla83xx_idc_unlock(base_vha, 0);
5261                         msleep(1000);
5262                         qla83xx_idc_lock(base_vha, 0);
5263                         break;
5264                 case QLA8XXX_DEV_QUIESCENT:
5265                         /* XXX: DEBUG for now */
5266                         if (ha->flags.quiesce_owner)
5267                                 goto exit;
5268
5269                         qla83xx_idc_unlock(base_vha, 0);
5270                         msleep(1000);
5271                         qla83xx_idc_lock(base_vha, 0);
5272                         dev_init_timeout = jiffies +
5273                             (ha->fcoe_dev_init_timeout * HZ);
5274                         break;
5275                 case QLA8XXX_DEV_FAILED:
5276                         if (ha->flags.nic_core_reset_owner)
5277                                 qla83xx_idc_audit(base_vha,
5278                                     IDC_AUDIT_COMPLETION);
5279                         ha->flags.nic_core_reset_owner = 0;
5280                         __qla83xx_clear_drv_presence(base_vha);
5281                         qla83xx_idc_unlock(base_vha, 0);
5282                         qla8xxx_dev_failed_handler(base_vha);
5283                         rval = QLA_FUNCTION_FAILED;
5284                         qla83xx_idc_lock(base_vha, 0);
5285                         goto exit;
5286                 case QLA8XXX_BAD_VALUE:
5287                         qla83xx_idc_unlock(base_vha, 0);
5288                         msleep(1000);
5289                         qla83xx_idc_lock(base_vha, 0);
5290                         break;
5291                 default:
5292                         ql_log(ql_log_warn, base_vha, 0xb071,
5293                             "Unknown Device State: %x.\n", dev_state);
5294                         qla83xx_idc_unlock(base_vha, 0);
5295                         qla8xxx_dev_failed_handler(base_vha);
5296                         rval = QLA_FUNCTION_FAILED;
5297                         qla83xx_idc_lock(base_vha, 0);
5298                         goto exit;
5299                 }
5300         }
5301
5302 exit:
5303         return rval;
5304 }
5305
5306 void
5307 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5308 {
5309         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5310             board_disable);
5311         struct pci_dev *pdev = ha->pdev;
5312         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5313
5314         /*
5315          * if UNLOAD flag is already set, then continue unload,
5316          * where it was set first.
5317          */
5318         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5319                 return;
5320
5321         ql_log(ql_log_warn, base_vha, 0x015b,
5322             "Disabling adapter.\n");
5323
5324         qla2x00_wait_for_sess_deletion(base_vha);
5325
5326         set_bit(UNLOADING, &base_vha->dpc_flags);
5327
5328         qla2x00_delete_all_vps(ha, base_vha);
5329
5330         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5331
5332         qla2x00_dfs_remove(base_vha);
5333
5334         qla84xx_put_chip(base_vha);
5335
5336         if (base_vha->timer_active)
5337                 qla2x00_stop_timer(base_vha);
5338
5339         base_vha->flags.online = 0;
5340
5341         qla2x00_destroy_deferred_work(ha);
5342
5343         /*
5344          * Do not try to stop beacon blink as it will issue a mailbox
5345          * command.
5346          */
5347         qla2x00_free_sysfs_attr(base_vha, false);
5348
5349         fc_remove_host(base_vha->host);
5350
5351         scsi_remove_host(base_vha->host);
5352
5353         base_vha->flags.init_done = 0;
5354         qla25xx_delete_queues(base_vha);
5355         qla2x00_free_fcports(base_vha);
5356         qla2x00_free_irqs(base_vha);
5357         qla2x00_mem_free(ha);
5358         qla82xx_md_free(base_vha);
5359         qla2x00_free_queues(ha);
5360
5361         qla2x00_unmap_iobases(ha);
5362
5363         pci_release_selected_regions(ha->pdev, ha->bars);
5364         pci_disable_pcie_error_reporting(pdev);
5365         pci_disable_device(pdev);
5366
5367         /*
5368          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5369          */
5370 }
5371
5372 /**************************************************************************
5373 * qla2x00_do_dpc
5374 *   This kernel thread is a task that is schedule by the interrupt handler
5375 *   to perform the background processing for interrupts.
5376 *
5377 * Notes:
5378 * This task always run in the context of a kernel thread.  It
5379 * is kick-off by the driver's detect code and starts up
5380 * up one per adapter. It immediately goes to sleep and waits for
5381 * some fibre event.  When either the interrupt handler or
5382 * the timer routine detects a event it will one of the task
5383 * bits then wake us up.
5384 **************************************************************************/
5385 static int
5386 qla2x00_do_dpc(void *data)
5387 {
5388         scsi_qla_host_t *base_vha;
5389         struct qla_hw_data *ha;
5390         uint32_t online;
5391         struct qla_qpair *qpair;
5392
5393         ha = (struct qla_hw_data *)data;
5394         base_vha = pci_get_drvdata(ha->pdev);
5395
5396         set_user_nice(current, MIN_NICE);
5397
5398         set_current_state(TASK_INTERRUPTIBLE);
5399         while (!kthread_should_stop()) {
5400                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5401                     "DPC handler sleeping.\n");
5402
5403                 schedule();
5404
5405                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5406                         goto end_loop;
5407
5408                 if (ha->flags.eeh_busy) {
5409                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5410                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5411                         goto end_loop;
5412                 }
5413
5414                 ha->dpc_active = 1;
5415
5416                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5417                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5418                     base_vha->dpc_flags);
5419
5420                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5421                         break;
5422
5423                 qla2x00_do_work(base_vha);
5424
5425                 if (IS_P3P_TYPE(ha)) {
5426                         if (IS_QLA8044(ha)) {
5427                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5428                                         &base_vha->dpc_flags)) {
5429                                         qla8044_idc_lock(ha);
5430                                         qla8044_wr_direct(base_vha,
5431                                                 QLA8044_CRB_DEV_STATE_INDEX,
5432                                                 QLA8XXX_DEV_FAILED);
5433                                         qla8044_idc_unlock(ha);
5434                                         ql_log(ql_log_info, base_vha, 0x4004,
5435                                                 "HW State: FAILED.\n");
5436                                         qla8044_device_state_handler(base_vha);
5437                                         continue;
5438                                 }
5439
5440                         } else {
5441                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5442                                         &base_vha->dpc_flags)) {
5443                                         qla82xx_idc_lock(ha);
5444                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5445                                                 QLA8XXX_DEV_FAILED);
5446                                         qla82xx_idc_unlock(ha);
5447                                         ql_log(ql_log_info, base_vha, 0x0151,
5448                                                 "HW State: FAILED.\n");
5449                                         qla82xx_device_state_handler(base_vha);
5450                                         continue;
5451                                 }
5452                         }
5453
5454                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5455                                 &base_vha->dpc_flags)) {
5456
5457                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5458                                     "FCoE context reset scheduled.\n");
5459                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5460                                         &base_vha->dpc_flags))) {
5461                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5462                                                 /* FCoE-ctx reset failed.
5463                                                  * Escalate to chip-reset
5464                                                  */
5465                                                 set_bit(ISP_ABORT_NEEDED,
5466                                                         &base_vha->dpc_flags);
5467                                         }
5468                                         clear_bit(ABORT_ISP_ACTIVE,
5469                                                 &base_vha->dpc_flags);
5470                                 }
5471
5472                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5473                                     "FCoE context reset end.\n");
5474                         }
5475                 } else if (IS_QLAFX00(ha)) {
5476                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5477                                 &base_vha->dpc_flags)) {
5478                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5479                                     "Firmware Reset Recovery\n");
5480                                 if (qlafx00_reset_initialize(base_vha)) {
5481                                         /* Failed. Abort isp later. */
5482                                         if (!test_bit(UNLOADING,
5483                                             &base_vha->dpc_flags)) {
5484                                                 set_bit(ISP_UNRECOVERABLE,
5485                                                     &base_vha->dpc_flags);
5486                                                 ql_dbg(ql_dbg_dpc, base_vha,
5487                                                     0x4021,
5488                                                     "Reset Recovery Failed\n");
5489                                         }
5490                                 }
5491                         }
5492
5493                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5494                                 &base_vha->dpc_flags)) {
5495                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5496                                     "ISPFx00 Target Scan scheduled\n");
5497                                 if (qlafx00_rescan_isp(base_vha)) {
5498                                         if (!test_bit(UNLOADING,
5499                                             &base_vha->dpc_flags))
5500                                                 set_bit(ISP_UNRECOVERABLE,
5501                                                     &base_vha->dpc_flags);
5502                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5503                                             "ISPFx00 Target Scan Failed\n");
5504                                 }
5505                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5506                                     "ISPFx00 Target Scan End\n");
5507                         }
5508                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5509                                 &base_vha->dpc_flags)) {
5510                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5511                                     "ISPFx00 Host Info resend scheduled\n");
5512                                 qlafx00_fx_disc(base_vha,
5513                                     &base_vha->hw->mr.fcport,
5514                                     FXDISC_REG_HOST_INFO);
5515                         }
5516                 }
5517
5518                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5519                                                 &base_vha->dpc_flags)) {
5520
5521                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5522                             "ISP abort scheduled.\n");
5523                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5524                             &base_vha->dpc_flags))) {
5525
5526                                 if (ha->isp_ops->abort_isp(base_vha)) {
5527                                         /* failed. retry later */
5528                                         set_bit(ISP_ABORT_NEEDED,
5529                                             &base_vha->dpc_flags);
5530                                 }
5531                                 clear_bit(ABORT_ISP_ACTIVE,
5532                                                 &base_vha->dpc_flags);
5533                         }
5534
5535                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5536                             "ISP abort end.\n");
5537                 }
5538
5539                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5540                     &base_vha->dpc_flags)) {
5541                         qla2x00_update_fcports(base_vha);
5542                 }
5543
5544                 if (IS_QLAFX00(ha))
5545                         goto loop_resync_check;
5546
5547                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5548                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5549                             "Quiescence mode scheduled.\n");
5550                         if (IS_P3P_TYPE(ha)) {
5551                                 if (IS_QLA82XX(ha))
5552                                         qla82xx_device_state_handler(base_vha);
5553                                 if (IS_QLA8044(ha))
5554                                         qla8044_device_state_handler(base_vha);
5555                                 clear_bit(ISP_QUIESCE_NEEDED,
5556                                     &base_vha->dpc_flags);
5557                                 if (!ha->flags.quiesce_owner) {
5558                                         qla2x00_perform_loop_resync(base_vha);
5559                                         if (IS_QLA82XX(ha)) {
5560                                                 qla82xx_idc_lock(ha);
5561                                                 qla82xx_clear_qsnt_ready(
5562                                                     base_vha);
5563                                                 qla82xx_idc_unlock(ha);
5564                                         } else if (IS_QLA8044(ha)) {
5565                                                 qla8044_idc_lock(ha);
5566                                                 qla8044_clear_qsnt_ready(
5567                                                     base_vha);
5568                                                 qla8044_idc_unlock(ha);
5569                                         }
5570                                 }
5571                         } else {
5572                                 clear_bit(ISP_QUIESCE_NEEDED,
5573                                     &base_vha->dpc_flags);
5574                                 qla2x00_quiesce_io(base_vha);
5575                         }
5576                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5577                             "Quiescence mode end.\n");
5578                 }
5579
5580                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5581                                 &base_vha->dpc_flags) &&
5582                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5583
5584                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5585                             "Reset marker scheduled.\n");
5586                         qla2x00_rst_aen(base_vha);
5587                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5588                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5589                             "Reset marker end.\n");
5590                 }
5591
5592                 /* Retry each device up to login retry count */
5593                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5594                                                 &base_vha->dpc_flags)) &&
5595                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5596                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5597
5598                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5599                             "Relogin scheduled.\n");
5600                         qla2x00_relogin(base_vha);
5601                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5602                             "Relogin end.\n");
5603                 }
5604 loop_resync_check:
5605                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5606                     &base_vha->dpc_flags)) {
5607
5608                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5609                             "Loop resync scheduled.\n");
5610
5611                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5612                             &base_vha->dpc_flags))) {
5613
5614                                 qla2x00_loop_resync(base_vha);
5615
5616                                 clear_bit(LOOP_RESYNC_ACTIVE,
5617                                                 &base_vha->dpc_flags);
5618                         }
5619
5620                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5621                             "Loop resync end.\n");
5622                 }
5623
5624                 if (IS_QLAFX00(ha))
5625                         goto intr_on_check;
5626
5627                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5628                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5629                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5630                         qla2xxx_flash_npiv_conf(base_vha);
5631                 }
5632
5633 intr_on_check:
5634                 if (!ha->interrupts_on)
5635                         ha->isp_ops->enable_intrs(ha);
5636
5637                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5638                                         &base_vha->dpc_flags)) {
5639                         if (ha->beacon_blink_led == 1)
5640                                 ha->isp_ops->beacon_blink(base_vha);
5641                 }
5642
5643                 /* qpair online check */
5644                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5645                     &base_vha->dpc_flags)) {
5646                         if (ha->flags.eeh_busy ||
5647                             ha->flags.pci_channel_io_perm_failure)
5648                                 online = 0;
5649                         else
5650                                 online = 1;
5651
5652                         mutex_lock(&ha->mq_lock);
5653                         list_for_each_entry(qpair, &base_vha->qp_list,
5654                             qp_list_elem)
5655                         qpair->online = online;
5656                         mutex_unlock(&ha->mq_lock);
5657                 }
5658
5659                 if (!IS_QLAFX00(ha))
5660                         qla2x00_do_dpc_all_vps(base_vha);
5661
5662                 ha->dpc_active = 0;
5663 end_loop:
5664                 set_current_state(TASK_INTERRUPTIBLE);
5665         } /* End of while(1) */
5666         __set_current_state(TASK_RUNNING);
5667
5668         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5669             "DPC handler exiting.\n");
5670
5671         /*
5672          * Make sure that nobody tries to wake us up again.
5673          */
5674         ha->dpc_active = 0;
5675
5676         /* Cleanup any residual CTX SRBs. */
5677         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5678
5679         return 0;
5680 }
5681
5682 void
5683 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5684 {
5685         struct qla_hw_data *ha = vha->hw;
5686         struct task_struct *t = ha->dpc_thread;
5687
5688         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5689                 wake_up_process(t);
5690 }
5691
5692 /*
5693 *  qla2x00_rst_aen
5694 *      Processes asynchronous reset.
5695 *
5696 * Input:
5697 *      ha  = adapter block pointer.
5698 */
5699 static void
5700 qla2x00_rst_aen(scsi_qla_host_t *vha)
5701 {
5702         if (vha->flags.online && !vha->flags.reset_active &&
5703             !atomic_read(&vha->loop_down_timer) &&
5704             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5705                 do {
5706                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5707
5708                         /*
5709                          * Issue marker command only when we are going to start
5710                          * the I/O.
5711                          */
5712                         vha->marker_needed = 1;
5713                 } while (!atomic_read(&vha->loop_down_timer) &&
5714                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5715         }
5716 }
5717
5718 /**************************************************************************
5719 *   qla2x00_timer
5720 *
5721 * Description:
5722 *   One second timer
5723 *
5724 * Context: Interrupt
5725 ***************************************************************************/
5726 void
5727 qla2x00_timer(scsi_qla_host_t *vha)
5728 {
5729         unsigned long   cpu_flags = 0;
5730         int             start_dpc = 0;
5731         int             index;
5732         srb_t           *sp;
5733         uint16_t        w;
5734         struct qla_hw_data *ha = vha->hw;
5735         struct req_que *req;
5736
5737         if (ha->flags.eeh_busy) {
5738                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5739                     "EEH = %d, restarting timer.\n",
5740                     ha->flags.eeh_busy);
5741                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5742                 return;
5743         }
5744
5745         /*
5746          * Hardware read to raise pending EEH errors during mailbox waits. If
5747          * the read returns -1 then disable the board.
5748          */
5749         if (!pci_channel_offline(ha->pdev)) {
5750                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5751                 qla2x00_check_reg16_for_disconnect(vha, w);
5752         }
5753
5754         /* Make sure qla82xx_watchdog is run only for physical port */
5755         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5756                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5757                         start_dpc++;
5758                 if (IS_QLA82XX(ha))
5759                         qla82xx_watchdog(vha);
5760                 else if (IS_QLA8044(ha))
5761                         qla8044_watchdog(vha);
5762         }
5763
5764         if (!vha->vp_idx && IS_QLAFX00(ha))
5765                 qlafx00_timer_routine(vha);
5766
5767         /* Loop down handler. */
5768         if (atomic_read(&vha->loop_down_timer) > 0 &&
5769             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5770             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5771                 && vha->flags.online) {
5772
5773                 if (atomic_read(&vha->loop_down_timer) ==
5774                     vha->loop_down_abort_time) {
5775
5776                         ql_log(ql_log_info, vha, 0x6008,
5777                             "Loop down - aborting the queues before time expires.\n");
5778
5779                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5780                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5781
5782                         /*
5783                          * Schedule an ISP abort to return any FCP2-device
5784                          * commands.
5785                          */
5786                         /* NPIV - scan physical port only */
5787                         if (!vha->vp_idx) {
5788                                 spin_lock_irqsave(&ha->hardware_lock,
5789                                     cpu_flags);
5790                                 req = ha->req_q_map[0];
5791                                 for (index = 1;
5792                                     index < req->num_outstanding_cmds;
5793                                     index++) {
5794                                         fc_port_t *sfcp;
5795
5796                                         sp = req->outstanding_cmds[index];
5797                                         if (!sp)
5798                                                 continue;
5799                                         if (sp->type != SRB_SCSI_CMD)
5800                                                 continue;
5801                                         sfcp = sp->fcport;
5802                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5803                                                 continue;
5804
5805                                         if (IS_QLA82XX(ha))
5806                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5807                                                         &vha->dpc_flags);
5808                                         else
5809                                                 set_bit(ISP_ABORT_NEEDED,
5810                                                         &vha->dpc_flags);
5811                                         break;
5812                                 }
5813                                 spin_unlock_irqrestore(&ha->hardware_lock,
5814                                                                 cpu_flags);
5815                         }
5816                         start_dpc++;
5817                 }
5818
5819                 /* if the loop has been down for 4 minutes, reinit adapter */
5820                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5821                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5822                                 ql_log(ql_log_warn, vha, 0x6009,
5823                                     "Loop down - aborting ISP.\n");
5824
5825                                 if (IS_QLA82XX(ha))
5826                                         set_bit(FCOE_CTX_RESET_NEEDED,
5827                                                 &vha->dpc_flags);
5828                                 else
5829                                         set_bit(ISP_ABORT_NEEDED,
5830                                                 &vha->dpc_flags);
5831                         }
5832                 }
5833                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5834                     "Loop down - seconds remaining %d.\n",
5835                     atomic_read(&vha->loop_down_timer));
5836         }
5837         /* Check if beacon LED needs to be blinked for physical host only */
5838         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5839                 /* There is no beacon_blink function for ISP82xx */
5840                 if (!IS_P3P_TYPE(ha)) {
5841                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5842                         start_dpc++;
5843                 }
5844         }
5845
5846         /* Process any deferred work. */
5847         if (!list_empty(&vha->work_list))
5848                 start_dpc++;
5849
5850         /* Schedule the DPC routine if needed */
5851         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5852             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5853             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5854             start_dpc ||
5855             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5856             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5857             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5858             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5859             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5860             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5861                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5862                     "isp_abort_needed=%d loop_resync_needed=%d "
5863                     "fcport_update_needed=%d start_dpc=%d "
5864                     "reset_marker_needed=%d",
5865                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5866                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5867                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5868                     start_dpc,
5869                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5870                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5871                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5872                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5873                     "relogin_needed=%d.\n",
5874                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5875                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5876                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5877                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5878                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5879                 qla2xxx_wake_dpc(vha);
5880         }
5881
5882         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5883 }
5884
5885 /* Firmware interface routines. */
5886
5887 #define FW_BLOBS        11
5888 #define FW_ISP21XX      0
5889 #define FW_ISP22XX      1
5890 #define FW_ISP2300      2
5891 #define FW_ISP2322      3
5892 #define FW_ISP24XX      4
5893 #define FW_ISP25XX      5
5894 #define FW_ISP81XX      6
5895 #define FW_ISP82XX      7
5896 #define FW_ISP2031      8
5897 #define FW_ISP8031      9
5898 #define FW_ISP27XX      10
5899
5900 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5901 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5902 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5903 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5904 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5905 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5906 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5907 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5908 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5909 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5910 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5911
5912
5913 static DEFINE_MUTEX(qla_fw_lock);
5914
5915 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5916         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5917         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5918         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5919         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5920         { .name = FW_FILE_ISP24XX, },
5921         { .name = FW_FILE_ISP25XX, },
5922         { .name = FW_FILE_ISP81XX, },
5923         { .name = FW_FILE_ISP82XX, },
5924         { .name = FW_FILE_ISP2031, },
5925         { .name = FW_FILE_ISP8031, },
5926         { .name = FW_FILE_ISP27XX, },
5927 };
5928
5929 struct fw_blob *
5930 qla2x00_request_firmware(scsi_qla_host_t *vha)
5931 {
5932         struct qla_hw_data *ha = vha->hw;
5933         struct fw_blob *blob;
5934
5935         if (IS_QLA2100(ha)) {
5936                 blob = &qla_fw_blobs[FW_ISP21XX];
5937         } else if (IS_QLA2200(ha)) {
5938                 blob = &qla_fw_blobs[FW_ISP22XX];
5939         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5940                 blob = &qla_fw_blobs[FW_ISP2300];
5941         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5942                 blob = &qla_fw_blobs[FW_ISP2322];
5943         } else if (IS_QLA24XX_TYPE(ha)) {
5944                 blob = &qla_fw_blobs[FW_ISP24XX];
5945         } else if (IS_QLA25XX(ha)) {
5946                 blob = &qla_fw_blobs[FW_ISP25XX];
5947         } else if (IS_QLA81XX(ha)) {
5948                 blob = &qla_fw_blobs[FW_ISP81XX];
5949         } else if (IS_QLA82XX(ha)) {
5950                 blob = &qla_fw_blobs[FW_ISP82XX];
5951         } else if (IS_QLA2031(ha)) {
5952                 blob = &qla_fw_blobs[FW_ISP2031];
5953         } else if (IS_QLA8031(ha)) {
5954                 blob = &qla_fw_blobs[FW_ISP8031];
5955         } else if (IS_QLA27XX(ha)) {
5956                 blob = &qla_fw_blobs[FW_ISP27XX];
5957         } else {
5958                 return NULL;
5959         }
5960
5961         mutex_lock(&qla_fw_lock);
5962         if (blob->fw)
5963                 goto out;
5964
5965         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5966                 ql_log(ql_log_warn, vha, 0x0063,
5967                     "Failed to load firmware image (%s).\n", blob->name);
5968                 blob->fw = NULL;
5969                 blob = NULL;
5970                 goto out;
5971         }
5972
5973 out:
5974         mutex_unlock(&qla_fw_lock);
5975         return blob;
5976 }
5977
5978 static void
5979 qla2x00_release_firmware(void)
5980 {
5981         int idx;
5982
5983         mutex_lock(&qla_fw_lock);
5984         for (idx = 0; idx < FW_BLOBS; idx++)
5985                 release_firmware(qla_fw_blobs[idx].fw);
5986         mutex_unlock(&qla_fw_lock);
5987 }
5988
5989 static pci_ers_result_t
5990 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5991 {
5992         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5993         struct qla_hw_data *ha = vha->hw;
5994
5995         ql_dbg(ql_dbg_aer, vha, 0x9000,
5996             "PCI error detected, state %x.\n", state);
5997
5998         switch (state) {
5999         case pci_channel_io_normal:
6000                 ha->flags.eeh_busy = 0;
6001                 if (ql2xmqsupport) {
6002                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6003                         qla2xxx_wake_dpc(vha);
6004                 }
6005                 return PCI_ERS_RESULT_CAN_RECOVER;
6006         case pci_channel_io_frozen:
6007                 ha->flags.eeh_busy = 1;
6008                 /* For ISP82XX complete any pending mailbox cmd */
6009                 if (IS_QLA82XX(ha)) {
6010                         ha->flags.isp82xx_fw_hung = 1;
6011                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6012                         qla82xx_clear_pending_mbx(vha);
6013                 }
6014                 qla2x00_free_irqs(vha);
6015                 pci_disable_device(pdev);
6016                 /* Return back all IOs */
6017                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6018                 if (ql2xmqsupport) {
6019                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6020                         qla2xxx_wake_dpc(vha);
6021                 }
6022                 return PCI_ERS_RESULT_NEED_RESET;
6023         case pci_channel_io_perm_failure:
6024                 ha->flags.pci_channel_io_perm_failure = 1;
6025                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6026                 if (ql2xmqsupport) {
6027                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6028                         qla2xxx_wake_dpc(vha);
6029                 }
6030                 return PCI_ERS_RESULT_DISCONNECT;
6031         }
6032         return PCI_ERS_RESULT_NEED_RESET;
6033 }
6034
6035 static pci_ers_result_t
6036 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6037 {
6038         int risc_paused = 0;
6039         uint32_t stat;
6040         unsigned long flags;
6041         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6042         struct qla_hw_data *ha = base_vha->hw;
6043         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6044         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6045
6046         if (IS_QLA82XX(ha))
6047                 return PCI_ERS_RESULT_RECOVERED;
6048
6049         spin_lock_irqsave(&ha->hardware_lock, flags);
6050         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6051                 stat = RD_REG_DWORD(&reg->hccr);
6052                 if (stat & HCCR_RISC_PAUSE)
6053                         risc_paused = 1;
6054         } else if (IS_QLA23XX(ha)) {
6055                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6056                 if (stat & HSR_RISC_PAUSED)
6057                         risc_paused = 1;
6058         } else if (IS_FWI2_CAPABLE(ha)) {
6059                 stat = RD_REG_DWORD(&reg24->host_status);
6060                 if (stat & HSRX_RISC_PAUSED)
6061                         risc_paused = 1;
6062         }
6063         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6064
6065         if (risc_paused) {
6066                 ql_log(ql_log_info, base_vha, 0x9003,
6067                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6068                 ha->isp_ops->fw_dump(base_vha, 0);
6069
6070                 return PCI_ERS_RESULT_NEED_RESET;
6071         } else
6072                 return PCI_ERS_RESULT_RECOVERED;
6073 }
6074
6075 static uint32_t
6076 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6077 {
6078         uint32_t rval = QLA_FUNCTION_FAILED;
6079         uint32_t drv_active = 0;
6080         struct qla_hw_data *ha = base_vha->hw;
6081         int fn;
6082         struct pci_dev *other_pdev = NULL;
6083
6084         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6085             "Entered %s.\n", __func__);
6086
6087         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6088
6089         if (base_vha->flags.online) {
6090                 /* Abort all outstanding commands,
6091                  * so as to be requeued later */
6092                 qla2x00_abort_isp_cleanup(base_vha);
6093         }
6094
6095
6096         fn = PCI_FUNC(ha->pdev->devfn);
6097         while (fn > 0) {
6098                 fn--;
6099                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6100                     "Finding pci device at function = 0x%x.\n", fn);
6101                 other_pdev =
6102                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6103                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6104                     fn));
6105
6106                 if (!other_pdev)
6107                         continue;
6108                 if (atomic_read(&other_pdev->enable_cnt)) {
6109                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6110                             "Found PCI func available and enable at 0x%x.\n",
6111                             fn);
6112                         pci_dev_put(other_pdev);
6113                         break;
6114                 }
6115                 pci_dev_put(other_pdev);
6116         }
6117
6118         if (!fn) {
6119                 /* Reset owner */
6120                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6121                     "This devfn is reset owner = 0x%x.\n",
6122                     ha->pdev->devfn);
6123                 qla82xx_idc_lock(ha);
6124
6125                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6126                     QLA8XXX_DEV_INITIALIZING);
6127
6128                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6129                     QLA82XX_IDC_VERSION);
6130
6131                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6132                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6133                     "drv_active = 0x%x.\n", drv_active);
6134
6135                 qla82xx_idc_unlock(ha);
6136                 /* Reset if device is not already reset
6137                  * drv_active would be 0 if a reset has already been done
6138                  */
6139                 if (drv_active)
6140                         rval = qla82xx_start_firmware(base_vha);
6141                 else
6142                         rval = QLA_SUCCESS;
6143                 qla82xx_idc_lock(ha);
6144
6145                 if (rval != QLA_SUCCESS) {
6146                         ql_log(ql_log_info, base_vha, 0x900b,
6147                             "HW State: FAILED.\n");
6148                         qla82xx_clear_drv_active(ha);
6149                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6150                             QLA8XXX_DEV_FAILED);
6151                 } else {
6152                         ql_log(ql_log_info, base_vha, 0x900c,
6153                             "HW State: READY.\n");
6154                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6155                             QLA8XXX_DEV_READY);
6156                         qla82xx_idc_unlock(ha);
6157                         ha->flags.isp82xx_fw_hung = 0;
6158                         rval = qla82xx_restart_isp(base_vha);
6159                         qla82xx_idc_lock(ha);
6160                         /* Clear driver state register */
6161                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6162                         qla82xx_set_drv_active(base_vha);
6163                 }
6164                 qla82xx_idc_unlock(ha);
6165         } else {
6166                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6167                     "This devfn is not reset owner = 0x%x.\n",
6168                     ha->pdev->devfn);
6169                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6170                     QLA8XXX_DEV_READY)) {
6171                         ha->flags.isp82xx_fw_hung = 0;
6172                         rval = qla82xx_restart_isp(base_vha);
6173                         qla82xx_idc_lock(ha);
6174                         qla82xx_set_drv_active(base_vha);
6175                         qla82xx_idc_unlock(ha);
6176                 }
6177         }
6178         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6179
6180         return rval;
6181 }
6182
6183 static pci_ers_result_t
6184 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6185 {
6186         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6187         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6188         struct qla_hw_data *ha = base_vha->hw;
6189         struct rsp_que *rsp;
6190         int rc, retries = 10;
6191
6192         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6193             "Slot Reset.\n");
6194
6195         /* Workaround: qla2xxx driver which access hardware earlier
6196          * needs error state to be pci_channel_io_online.
6197          * Otherwise mailbox command timesout.
6198          */
6199         pdev->error_state = pci_channel_io_normal;
6200
6201         pci_restore_state(pdev);
6202
6203         /* pci_restore_state() clears the saved_state flag of the device
6204          * save restored state which resets saved_state flag
6205          */
6206         pci_save_state(pdev);
6207
6208         if (ha->mem_only)
6209                 rc = pci_enable_device_mem(pdev);
6210         else
6211                 rc = pci_enable_device(pdev);
6212
6213         if (rc) {
6214                 ql_log(ql_log_warn, base_vha, 0x9005,
6215                     "Can't re-enable PCI device after reset.\n");
6216                 goto exit_slot_reset;
6217         }
6218
6219         rsp = ha->rsp_q_map[0];
6220         if (qla2x00_request_irqs(ha, rsp))
6221                 goto exit_slot_reset;
6222
6223         if (ha->isp_ops->pci_config(base_vha))
6224                 goto exit_slot_reset;
6225
6226         if (IS_QLA82XX(ha)) {
6227                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6228                         ret = PCI_ERS_RESULT_RECOVERED;
6229                         goto exit_slot_reset;
6230                 } else
6231                         goto exit_slot_reset;
6232         }
6233
6234         while (ha->flags.mbox_busy && retries--)
6235                 msleep(1000);
6236
6237         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6238         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6239                 ret =  PCI_ERS_RESULT_RECOVERED;
6240         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6241
6242
6243 exit_slot_reset:
6244         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6245             "slot_reset return %x.\n", ret);
6246
6247         return ret;
6248 }
6249
6250 static void
6251 qla2xxx_pci_resume(struct pci_dev *pdev)
6252 {
6253         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6254         struct qla_hw_data *ha = base_vha->hw;
6255         int ret;
6256
6257         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6258             "pci_resume.\n");
6259
6260         ret = qla2x00_wait_for_hba_online(base_vha);
6261         if (ret != QLA_SUCCESS) {
6262                 ql_log(ql_log_fatal, base_vha, 0x9002,
6263                     "The device failed to resume I/O from slot/link_reset.\n");
6264         }
6265
6266         pci_cleanup_aer_uncorrect_error_status(pdev);
6267
6268         ha->flags.eeh_busy = 0;
6269 }
6270
6271 static void
6272 qla83xx_disable_laser(scsi_qla_host_t *vha)
6273 {
6274         uint32_t reg, data, fn;
6275         struct qla_hw_data *ha = vha->hw;
6276         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6277
6278         /* pci func #/port # */
6279         ql_dbg(ql_dbg_init, vha, 0x004b,
6280             "Disabling Laser for hba: %p\n", vha);
6281
6282         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6283                 (BIT_15|BIT_14|BIT_13|BIT_12));
6284
6285         fn = (fn >> 12);
6286
6287         if (fn & 1)
6288                 reg = PORT_1_2031;
6289         else
6290                 reg = PORT_0_2031;
6291
6292         data = LASER_OFF_2031;
6293
6294         qla83xx_wr_reg(vha, reg, data);
6295 }
6296
6297 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6298 {
6299         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6300
6301         return blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6302 }
6303
6304 static const struct pci_error_handlers qla2xxx_err_handler = {
6305         .error_detected = qla2xxx_pci_error_detected,
6306         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6307         .slot_reset = qla2xxx_pci_slot_reset,
6308         .resume = qla2xxx_pci_resume,
6309 };
6310
6311 static struct pci_device_id qla2xxx_pci_tbl[] = {
6312         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6313         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6314         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6315         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6316         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6317         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6318         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6319         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6320         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6321         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6322         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6323         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6324         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6325         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6326         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6327         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6328         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6329         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6330         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6331         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6332         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6333         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6334         { 0 },
6335 };
6336 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6337
6338 static struct pci_driver qla2xxx_pci_driver = {
6339         .name           = QLA2XXX_DRIVER_NAME,
6340         .driver         = {
6341                 .owner          = THIS_MODULE,
6342         },
6343         .id_table       = qla2xxx_pci_tbl,
6344         .probe          = qla2x00_probe_one,
6345         .remove         = qla2x00_remove_one,
6346         .shutdown       = qla2x00_shutdown,
6347         .err_handler    = &qla2xxx_err_handler,
6348 };
6349
6350 static const struct file_operations apidev_fops = {
6351         .owner = THIS_MODULE,
6352         .llseek = noop_llseek,
6353 };
6354
6355 /**
6356  * qla2x00_module_init - Module initialization.
6357  **/
6358 static int __init
6359 qla2x00_module_init(void)
6360 {
6361         int ret = 0;
6362
6363         /* Allocate cache for SRBs. */
6364         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6365             SLAB_HWCACHE_ALIGN, NULL);
6366         if (srb_cachep == NULL) {
6367                 ql_log(ql_log_fatal, NULL, 0x0001,
6368                     "Unable to allocate SRB cache...Failing load!.\n");
6369                 return -ENOMEM;
6370         }
6371
6372         /* Initialize target kmem_cache and mem_pools */
6373         ret = qlt_init();
6374         if (ret < 0) {
6375                 kmem_cache_destroy(srb_cachep);
6376                 return ret;
6377         } else if (ret > 0) {
6378                 /*
6379                  * If initiator mode is explictly disabled by qlt_init(),
6380                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6381                  * performing scsi_scan_target() during LOOP UP event.
6382                  */
6383                 qla2xxx_transport_functions.disable_target_scan = 1;
6384                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6385         }
6386
6387         /* Derive version string. */
6388         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6389         if (ql2xextended_error_logging)
6390                 strcat(qla2x00_version_str, "-debug");
6391
6392         qla2xxx_transport_template =
6393             fc_attach_transport(&qla2xxx_transport_functions);
6394         if (!qla2xxx_transport_template) {
6395                 kmem_cache_destroy(srb_cachep);
6396                 ql_log(ql_log_fatal, NULL, 0x0002,
6397                     "fc_attach_transport failed...Failing load!.\n");
6398                 qlt_exit();
6399                 return -ENODEV;
6400         }
6401
6402         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6403         if (apidev_major < 0) {
6404                 ql_log(ql_log_fatal, NULL, 0x0003,
6405                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6406         }
6407
6408         qla2xxx_transport_vport_template =
6409             fc_attach_transport(&qla2xxx_transport_vport_functions);
6410         if (!qla2xxx_transport_vport_template) {
6411                 kmem_cache_destroy(srb_cachep);
6412                 qlt_exit();
6413                 fc_release_transport(qla2xxx_transport_template);
6414                 ql_log(ql_log_fatal, NULL, 0x0004,
6415                     "fc_attach_transport vport failed...Failing load!.\n");
6416                 return -ENODEV;
6417         }
6418         ql_log(ql_log_info, NULL, 0x0005,
6419             "QLogic Fibre Channel HBA Driver: %s.\n",
6420             qla2x00_version_str);
6421         ret = pci_register_driver(&qla2xxx_pci_driver);
6422         if (ret) {
6423                 kmem_cache_destroy(srb_cachep);
6424                 qlt_exit();
6425                 fc_release_transport(qla2xxx_transport_template);
6426                 fc_release_transport(qla2xxx_transport_vport_template);
6427                 ql_log(ql_log_fatal, NULL, 0x0006,
6428                     "pci_register_driver failed...ret=%d Failing load!.\n",
6429                     ret);
6430         }
6431         return ret;
6432 }
6433
6434 /**
6435  * qla2x00_module_exit - Module cleanup.
6436  **/
6437 static void __exit
6438 qla2x00_module_exit(void)
6439 {
6440         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6441         pci_unregister_driver(&qla2xxx_pci_driver);
6442         qla2x00_release_firmware();
6443         kmem_cache_destroy(srb_cachep);
6444         qlt_exit();
6445         if (ctx_cachep)
6446                 kmem_cache_destroy(ctx_cachep);
6447         fc_release_transport(qla2xxx_transport_template);
6448         fc_release_transport(qla2xxx_transport_vport_template);
6449 }
6450
6451 module_init(qla2x00_module_init);
6452 module_exit(qla2x00_module_exit);
6453
6454 MODULE_AUTHOR("QLogic Corporation");
6455 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6456 MODULE_LICENSE("GPL");
6457 MODULE_VERSION(QLA2XXX_VERSION);
6458 MODULE_FIRMWARE(FW_FILE_ISP21XX);
6459 MODULE_FIRMWARE(FW_FILE_ISP22XX);
6460 MODULE_FIRMWARE(FW_FILE_ISP2300);
6461 MODULE_FIRMWARE(FW_FILE_ISP2322);
6462 MODULE_FIRMWARE(FW_FILE_ISP24XX);
6463 MODULE_FIRMWARE(FW_FILE_ISP25XX);