drivers/scsi/qla2xxx/qla_tmpl.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8 #include "qla_tmpl.h"
   9
  10 /* note default template is in big endian */
  11 static const uint32_t ql27xx_fwdt_default_template[] = {
  12         0x63000000, 0xa4000000, 0x7c050000, 0x00000000,
  13         0x30000000, 0x01000000, 0x00000000, 0xc0406eb4,
  14         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  15         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  16         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  17         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  18         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  19         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  20         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  21         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  22         0x00000000, 0x04010000, 0x14000000, 0x00000000,
  23         0x02000000, 0x44000000, 0x09010000, 0x10000000,
  24         0x00000000, 0x02000000, 0x01010000, 0x1c000000,
  25         0x00000000, 0x02000000, 0x00600000, 0x00000000,
  26         0xc0000000, 0x01010000, 0x1c000000, 0x00000000,
  27         0x02000000, 0x00600000, 0x00000000, 0xcc000000,
  28         0x01010000, 0x1c000000, 0x00000000, 0x02000000,
  29         0x10600000, 0x00000000, 0xd4000000, 0x01010000,
  30         0x1c000000, 0x00000000, 0x02000000, 0x700f0000,
  31         0x00000060, 0xf0000000, 0x00010000, 0x18000000,
  32         0x00000000, 0x02000000, 0x00700000, 0x041000c0,
  33         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  34         0x10700000, 0x041000c0, 0x00010000, 0x18000000,
  35         0x00000000, 0x02000000, 0x40700000, 0x041000c0,
  36         0x01010000, 0x1c000000, 0x00000000, 0x02000000,
  37         0x007c0000, 0x01000000, 0xc0000000, 0x00010000,
  38         0x18000000, 0x00000000, 0x02000000, 0x007c0000,
  39         0x040300c4, 0x00010000, 0x18000000, 0x00000000,
  40         0x02000000, 0x007c0000, 0x040100c0, 0x01010000,
  41         0x1c000000, 0x00000000, 0x02000000, 0x007c0000,
  42         0x00000000, 0xc0000000, 0x00010000, 0x18000000,
  43         0x00000000, 0x02000000, 0x007c0000, 0x04200000,
  44         0x0b010000, 0x18000000, 0x00000000, 0x02000000,
  45         0x0c000000, 0x00000000, 0x02010000, 0x20000000,
  46         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  47         0xf0000000, 0x000000b0, 0x02010000, 0x20000000,
  48         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  49         0xf0000000, 0x000010b0, 0x02010000, 0x20000000,
  50         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  51         0xf0000000, 0x000020b0, 0x02010000, 0x20000000,
  52         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  53         0xf0000000, 0x000030b0, 0x02010000, 0x20000000,
  54         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  55         0xf0000000, 0x000040b0, 0x02010000, 0x20000000,
  56         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  57         0xf0000000, 0x000050b0, 0x02010000, 0x20000000,
  58         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  59         0xf0000000, 0x000060b0, 0x02010000, 0x20000000,
  60         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  61         0xf0000000, 0x000070b0, 0x02010000, 0x20000000,
  62         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  63         0xf0000000, 0x000080b0, 0x02010000, 0x20000000,
  64         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  65         0xf0000000, 0x000090b0, 0x02010000, 0x20000000,
  66         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  67         0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000,
  68         0x00000000, 0x02000000, 0x0a000000, 0x040100c0,
  69         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  70         0x0a000000, 0x04200080, 0x00010000, 0x18000000,
  71         0x00000000, 0x02000000, 0x00be0000, 0x041000c0,
  72         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  73         0x10be0000, 0x041000c0, 0x00010000, 0x18000000,
  74         0x00000000, 0x02000000, 0x20be0000, 0x041000c0,
  75         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  76         0x30be0000, 0x041000c0, 0x00010000, 0x18000000,
  77         0x00000000, 0x02000000, 0x00b00000, 0x041000c0,
  78         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  79         0x10b00000, 0x041000c0, 0x00010000, 0x18000000,
  80         0x00000000, 0x02000000, 0x20b00000, 0x041000c0,
  81         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  82         0x30b00000, 0x041000c0, 0x00010000, 0x18000000,
  83         0x00000000, 0x02000000, 0x00300000, 0x041000c0,
  84         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  85         0x10300000, 0x041000c0, 0x00010000, 0x18000000,
  86         0x00000000, 0x02000000, 0x20300000, 0x041000c0,
  87         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  88         0x30300000, 0x041000c0, 0x0a010000, 0x10000000,
  89         0x00000000, 0x02000000, 0x06010000, 0x1c000000,
  90         0x00000000, 0x02000000, 0x01000000, 0x00000200,
  91         0xff230200, 0x06010000, 0x1c000000, 0x00000000,
  92         0x02000000, 0x02000000, 0x00001000, 0x00000000,
  93         0x07010000, 0x18000000, 0x00000000, 0x02000000,
  94         0x00000000, 0x01000000, 0x07010000, 0x18000000,
  95         0x00000000, 0x02000000, 0x00000000, 0x02000000,
  96         0x07010000, 0x18000000, 0x00000000, 0x02000000,
  97         0x00000000, 0x03000000, 0x0d010000, 0x14000000,
  98         0x00000000, 0x02000000, 0x00000000, 0xff000000,
  99         0x10000000, 0x00000000, 0x00000080,
 100 };
 101
 102 static inline void __iomem *
 103 qla27xx_isp_reg(struct scsi_qla_host *vha)
 104 {
 105         return &vha->hw->iobase->isp24;
 106 }
 107
 108 static inline void
 109 qla27xx_insert16(uint16_t value, void *buf, ulong *len)
 110 {
 111         if (buf) {
 112                 buf += *len;
 113                 *(__le16 *)buf = cpu_to_le16(value);
 114         }
 115         *len += sizeof(value);
 116 }
 117
 118 static inline void
 119 qla27xx_insert32(uint32_t value, void *buf, ulong *len)
 120 {
 121         if (buf) {
 122                 buf += *len;
 123                 *(__le32 *)buf = cpu_to_le32(value);
 124         }
 125         *len += sizeof(value);
 126 }
 127
 128 static inline void
 129 qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len)
 130 {
 131
 132         if (buf && mem && size) {
 133                 buf += *len;
 134                 memcpy(buf, mem, size);
 135         }
 136         *len += size;
 137 }
 138
 139 static inline void
 140 qla27xx_read8(void __iomem *window, void *buf, ulong *len)
 141 {
 142         uint8_t value = ~0;
 143
 144         if (buf) {
 145                 value = RD_REG_BYTE(window);
 146         }
 147         qla27xx_insert32(value, buf, len);
 148 }
 149
 150 static inline void
 151 qla27xx_read16(void __iomem *window, void *buf, ulong *len)
 152 {
 153         uint16_t value = ~0;
 154
 155         if (buf) {
 156                 value = RD_REG_WORD(window);
 157         }
 158         qla27xx_insert32(value, buf, len);
 159 }
 160
 161 static inline void
 162 qla27xx_read32(void __iomem *window, void *buf, ulong *len)
 163 {
 164         uint32_t value = ~0;
 165
 166         if (buf) {
 167                 value = RD_REG_DWORD(window);
 168         }
 169         qla27xx_insert32(value, buf, len);
 170 }
 171
 172 static inline void (*qla27xx_read_vector(uint width))(void __iomem*, void *, ulong *)
 173 {
 174         return
 175             (width == 1) ? qla27xx_read8 :
 176             (width == 2) ? qla27xx_read16 :
 177                            qla27xx_read32;
 178 }
 179
 180 static inline void
 181 qla27xx_read_reg(__iomem struct device_reg_24xx *reg,
 182         uint offset, void *buf, ulong *len)
 183 {
 184         void __iomem *window = (void __iomem *)reg + offset;
 185
 186         qla27xx_read32(window, buf, len);
 187 }
 188
 189 static inline void
 190 qla27xx_write_reg(__iomem struct device_reg_24xx *reg,
 191         uint offset, uint32_t data, void *buf)
 192 {
 193         __iomem void *window = (void __iomem *)reg + offset;
 194
 195         if (buf) {
 196                 WRT_REG_DWORD(window, data);
 197         }
 198 }
 199
 200 static inline void
 201 qla27xx_read_window(__iomem struct device_reg_24xx *reg,
 202         uint32_t addr, uint offset, uint count, uint width, void *buf,
 203         ulong *len)
 204 {
 205         void __iomem *window = (void __iomem *)reg + offset;
 206         void (*readn)(void __iomem*, void *, ulong *) = qla27xx_read_vector(width);
 207
 208         qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf);
 209         while (count--) {
 210                 qla27xx_insert32(addr, buf, len);
 211                 readn(window, buf, len);
 212                 window += width;
 213                 addr++;
 214         }
 215 }
 216
 217 static inline void
 218 qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf)
 219 {
 220         if (buf)
 221                 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY;
 222 }
 223
 224 static int
 225 qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha,
 226         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 227 {
 228         ql_dbg(ql_dbg_misc, vha, 0xd100,
 229             "%s: nop [%lx]\n", __func__, *len);
 230         qla27xx_skip_entry(ent, buf);
 231
 232         return false;
 233 }
 234
 235 static int
 236 qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha,
 237         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 238 {
 239         ql_dbg(ql_dbg_misc, vha, 0xd1ff,
 240             "%s: end [%lx]\n", __func__, *len);
 241         qla27xx_skip_entry(ent, buf);
 242
 243         /* terminate */
 244         return true;
 245 }
 246
 247 static int
 248 qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha,
 249         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 250 {
 251         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 252
 253         ql_dbg(ql_dbg_misc, vha, 0xd200,
 254             "%s: rdio t1 [%lx]\n", __func__, *len);
 255         qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset,
 256             ent->t256.reg_count, ent->t256.reg_width, buf, len);
 257
 258         return false;
 259 }
 260
 261 static int
 262 qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha,
 263         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 264 {
 265         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 266
 267         ql_dbg(ql_dbg_misc, vha, 0xd201,
 268             "%s: wrio t1 [%lx]\n", __func__, *len);
 269         qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf);
 270         qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf);
 271
 272         return false;
 273 }
 274
 275 static int
 276 qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha,
 277         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 278 {
 279         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 280
 281         ql_dbg(ql_dbg_misc, vha, 0xd202,
 282             "%s: rdio t2 [%lx]\n", __func__, *len);
 283         qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf);
 284         qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset,
 285             ent->t258.reg_count, ent->t258.reg_width, buf, len);
 286
 287         return false;
 288 }
 289
 290 static int
 291 qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha,
 292         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 293 {
 294         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 295
 296         ql_dbg(ql_dbg_misc, vha, 0xd203,
 297             "%s: wrio t2 [%lx]\n", __func__, *len);
 298         qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf);
 299         qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf);
 300         qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf);
 301
 302         return false;
 303 }
 304
 305 static int
 306 qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha,
 307         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 308 {
 309         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 310
 311         ql_dbg(ql_dbg_misc, vha, 0xd204,
 312             "%s: rdpci [%lx]\n", __func__, *len);
 313         qla27xx_insert32(ent->t260.pci_offset, buf, len);
 314         qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len);
 315
 316         return false;
 317 }
 318
 319 static int
 320 qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha,
 321         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 322 {
 323         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 324
 325         ql_dbg(ql_dbg_misc, vha, 0xd205,
 326             "%s: wrpci [%lx]\n", __func__, *len);
 327         qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf);
 328
 329         return false;
 330 }
 331
 332 static int
 333 qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha,
 334         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 335 {
 336         ulong dwords;
 337         ulong start;
 338         ulong end;
 339
 340         ql_dbg(ql_dbg_misc, vha, 0xd206,
 341             "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len);
 342         start = ent->t262.start_addr;
 343         end = ent->t262.end_addr;
 344
 345         if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) {
 346                 ;
 347         } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) {
 348                 end = vha->hw->fw_memory_size;
 349                 if (buf)
 350                         ent->t262.end_addr = end;
 351         } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) {
 352                 start = vha->hw->fw_shared_ram_start;
 353                 end = vha->hw->fw_shared_ram_end;
 354                 if (buf) {
 355                         ent->t262.start_addr = start;
 356                         ent->t262.end_addr = end;
 357                 }
 358         } else if (ent->t262.ram_area == T262_RAM_AREA_DDR_RAM) {
 359                 start = vha->hw->fw_ddr_ram_start;
 360                 end = vha->hw->fw_ddr_ram_end;
 361                 if (buf) {
 362                         ent->t262.start_addr = start;
 363                         ent->t262.end_addr = end;
 364                 }
 365         } else {
 366                 ql_dbg(ql_dbg_misc, vha, 0xd022,
 367                     "%s: unknown area %x\n", __func__, ent->t262.ram_area);
 368                 qla27xx_skip_entry(ent, buf);
 369                 goto done;
 370         }
 371
 372         if (end < start || start == 0 || end == 0) {
 373                 ql_dbg(ql_dbg_misc, vha, 0xd023,
 374                     "%s: unusable range (start=%x end=%x)\n", __func__,
 375                     ent->t262.end_addr, ent->t262.start_addr);
 376                 qla27xx_skip_entry(ent, buf);
 377                 goto done;
 378         }
 379
 380         dwords = end - start + 1;
 381         if (buf) {
 382                 buf += *len;
 383                 qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf);
 384         }
 385         *len += dwords * sizeof(uint32_t);
 386 done:
 387         return false;
 388 }
 389
 390 static int
 391 qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha,
 392         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 393 {
 394         uint count = 0;
 395         uint i;
 396         uint length;
 397
 398         ql_dbg(ql_dbg_misc, vha, 0xd207,
 399             "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len);
 400         if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) {
 401                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 402                         struct req_que *req = vha->hw->req_q_map[i];
 403
 404                         if (req || !buf) {
 405                                 length = req ?
 406                                     req->length : REQUEST_ENTRY_CNT_24XX;
 407                                 qla27xx_insert16(i, buf, len);
 408                                 qla27xx_insert16(length, buf, len);
 409                                 qla27xx_insertbuf(req ? req->ring : NULL,
 410                                     length * sizeof(*req->ring), buf, len);
 411                                 count++;
 412                         }
 413                 }
 414         } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) {
 415                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 416                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 417
 418                         if (rsp || !buf) {
 419                                 length = rsp ?
 420                                     rsp->length : RESPONSE_ENTRY_CNT_MQ;
 421                                 qla27xx_insert16(i, buf, len);
 422                                 qla27xx_insert16(length, buf, len);
 423                                 qla27xx_insertbuf(rsp ? rsp->ring : NULL,
 424                                     length * sizeof(*rsp->ring), buf, len);
 425                                 count++;
 426                         }
 427                 }
 428         } else if (QLA_TGT_MODE_ENABLED() &&
 429             ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) {
 430                 struct qla_hw_data *ha = vha->hw;
 431                 struct atio *atr = ha->tgt.atio_ring;
 432
 433                 if (atr || !buf) {
 434                         length = ha->tgt.atio_q_length;
 435                         qla27xx_insert16(0, buf, len);
 436                         qla27xx_insert16(length, buf, len);
 437                         qla27xx_insertbuf(atr, length * sizeof(*atr), buf, len);
 438                         count++;
 439                 }
 440         } else {
 441                 ql_dbg(ql_dbg_misc, vha, 0xd026,
 442                     "%s: unknown queue %x\n", __func__, ent->t263.queue_type);
 443                 qla27xx_skip_entry(ent, buf);
 444         }
 445
 446         if (buf)
 447                 ent->t263.num_queues = count;
 448
 449         return false;
 450 }
 451
 452 static int
 453 qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha,
 454         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 455 {
 456         ql_dbg(ql_dbg_misc, vha, 0xd208,
 457             "%s: getfce [%lx]\n", __func__, *len);
 458         if (vha->hw->fce) {
 459                 if (buf) {
 460                         ent->t264.fce_trace_size = FCE_SIZE;
 461                         ent->t264.write_pointer = vha->hw->fce_wr;
 462                         ent->t264.base_pointer = vha->hw->fce_dma;
 463                         ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0];
 464                         ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2];
 465                         ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3];
 466                         ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4];
 467                         ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5];
 468                         ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6];
 469                 }
 470                 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len);
 471         } else {
 472                 ql_dbg(ql_dbg_misc, vha, 0xd027,
 473                     "%s: missing fce\n", __func__);
 474                 qla27xx_skip_entry(ent, buf);
 475         }
 476
 477         return false;
 478 }
 479
 480 static int
 481 qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha,
 482         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 483 {
 484         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 485
 486         ql_dbg(ql_dbg_misc, vha, 0xd209,
 487             "%s: pause risc [%lx]\n", __func__, *len);
 488         if (buf)
 489                 qla24xx_pause_risc(reg, vha->hw);
 490
 491         return false;
 492 }
 493
 494 static int
 495 qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha,
 496         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 497 {
 498         ql_dbg(ql_dbg_misc, vha, 0xd20a,
 499             "%s: reset risc [%lx]\n", __func__, *len);
 500         if (buf)
 501                 qla24xx_soft_reset(vha->hw);
 502
 503         return false;
 504 }
 505
 506 static int
 507 qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha,
 508         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 509 {
 510         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 511
 512         ql_dbg(ql_dbg_misc, vha, 0xd20b,
 513             "%s: dis intr [%lx]\n", __func__, *len);
 514         qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf);
 515
 516         return false;
 517 }
 518
 519 static int
 520 qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha,
 521         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 522 {
 523         ql_dbg(ql_dbg_misc, vha, 0xd20c,
 524             "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len);
 525         if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_TRACE) {
 526                 if (vha->hw->eft) {
 527                         if (buf) {
 528                                 ent->t268.buf_size = EFT_SIZE;
 529                                 ent->t268.start_addr = vha->hw->eft_dma;
 530                         }
 531                         qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len);
 532                 } else {
 533                         ql_dbg(ql_dbg_misc, vha, 0xd028,
 534                             "%s: missing eft\n", __func__);
 535                         qla27xx_skip_entry(ent, buf);
 536                 }
 537         } else {
 538                 ql_dbg(ql_dbg_misc, vha, 0xd02b,
 539                     "%s: unknown buffer %x\n", __func__, ent->t268.buf_type);
 540                 qla27xx_skip_entry(ent, buf);
 541         }
 542
 543         return false;
 544 }
 545
 546 static int
 547 qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha,
 548         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 549 {
 550         ql_dbg(ql_dbg_misc, vha, 0xd20d,
 551             "%s: scratch [%lx]\n", __func__, *len);
 552         qla27xx_insert32(0xaaaaaaaa, buf, len);
 553         qla27xx_insert32(0xbbbbbbbb, buf, len);
 554         qla27xx_insert32(0xcccccccc, buf, len);
 555         qla27xx_insert32(0xdddddddd, buf, len);
 556         qla27xx_insert32(*len + sizeof(uint32_t), buf, len);
 557         if (buf)
 558                 ent->t269.scratch_size = 5 * sizeof(uint32_t);
 559
 560         return false;
 561 }
 562
 563 static int
 564 qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha,
 565         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 566 {
 567         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 568         ulong dwords = ent->t270.count;
 569         ulong addr = ent->t270.addr;
 570
 571         ql_dbg(ql_dbg_misc, vha, 0xd20e,
 572             "%s: rdremreg [%lx]\n", __func__, *len);
 573         qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
 574         while (dwords--) {
 575                 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf);
 576                 qla27xx_insert32(addr, buf, len);
 577                 qla27xx_read_reg(reg, 0xc4, buf, len);
 578                 addr += sizeof(uint32_t);
 579         }
 580
 581         return false;
 582 }
 583
 584 static int
 585 qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha,
 586         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 587 {
 588         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 589         ulong addr = ent->t271.addr;
 590         ulong data = ent->t271.data;
 591
 592         ql_dbg(ql_dbg_misc, vha, 0xd20f,
 593             "%s: wrremreg [%lx]\n", __func__, *len);
 594         qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
 595         qla27xx_write_reg(reg, 0xc4, data, buf);
 596         qla27xx_write_reg(reg, 0xc0, addr, buf);
 597
 598         return false;
 599 }
 600
 601 static int
 602 qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha,
 603         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 604 {
 605         ulong dwords = ent->t272.count;
 606         ulong start = ent->t272.addr;
 607
 608         ql_dbg(ql_dbg_misc, vha, 0xd210,
 609             "%s: rdremram [%lx]\n", __func__, *len);
 610         if (buf) {
 611                 ql_dbg(ql_dbg_misc, vha, 0xd02c,
 612                     "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords);
 613                 buf += *len;
 614                 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf);
 615         }
 616         *len += dwords * sizeof(uint32_t);
 617
 618         return false;
 619 }
 620
 621 static int
 622 qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha,
 623         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 624 {
 625         ulong dwords = ent->t273.count;
 626         ulong addr = ent->t273.addr;
 627         uint32_t value;
 628
 629         ql_dbg(ql_dbg_misc, vha, 0xd211,
 630             "%s: pcicfg [%lx]\n", __func__, *len);
 631         while (dwords--) {
 632                 value = ~0;
 633                 if (pci_read_config_dword(vha->hw->pdev, addr, &value))
 634                         ql_dbg(ql_dbg_misc, vha, 0xd02d,
 635                             "%s: failed pcicfg read at %lx\n", __func__, addr);
 636                 qla27xx_insert32(addr, buf, len);
 637                 qla27xx_insert32(value, buf, len);
 638                 addr += sizeof(uint32_t);
 639         }
 640
 641         return false;
 642 }
 643
 644 static int
 645 qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
 646         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 647 {
 648         uint count = 0;
 649         uint i;
 650
 651         ql_dbg(ql_dbg_misc, vha, 0xd212,
 652             "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len);
 653         if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) {
 654                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 655                         struct req_que *req = vha->hw->req_q_map[i];
 656
 657                         if (req || !buf) {
 658                                 qla27xx_insert16(i, buf, len);
 659                                 qla27xx_insert16(1, buf, len);
 660                                 qla27xx_insert32(req && req->out_ptr ?
 661                                     *req->out_ptr : 0, buf, len);
 662                                 count++;
 663                         }
 664                 }
 665         } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) {
 666                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 667                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 668
 669                         if (rsp || !buf) {
 670                                 qla27xx_insert16(i, buf, len);
 671                                 qla27xx_insert16(1, buf, len);
 672                                 qla27xx_insert32(rsp && rsp->in_ptr ?
 673                                     *rsp->in_ptr : 0, buf, len);
 674                                 count++;
 675                         }
 676                 }
 677         } else if (QLA_TGT_MODE_ENABLED() &&
 678             ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) {
 679                 struct qla_hw_data *ha = vha->hw;
 680                 struct atio *atr = ha->tgt.atio_ring_ptr;
 681
 682                 if (atr || !buf) {
 683                         qla27xx_insert16(0, buf, len);
 684                         qla27xx_insert16(1, buf, len);
 685                         qla27xx_insert32(ha->tgt.atio_q_in ?
 686                             readl(ha->tgt.atio_q_in) : 0, buf, len);
 687                         count++;
 688                 }
 689         } else {
 690                 ql_dbg(ql_dbg_misc, vha, 0xd02f,
 691                     "%s: unknown queue %x\n", __func__, ent->t274.queue_type);
 692                 qla27xx_skip_entry(ent, buf);
 693         }
 694
 695         if (buf)
 696                 ent->t274.num_queues = count;
 697
 698         if (!count)
 699                 qla27xx_skip_entry(ent, buf);
 700
 701         return false;
 702 }
 703
 704 static int
 705 qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha,
 706         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 707 {
 708         ulong offset = offsetof(typeof(*ent), t275.buffer);
 709
 710         ql_dbg(ql_dbg_misc, vha, 0xd213,
 711             "%s: buffer(%x) [%lx]\n", __func__, ent->t275.length, *len);
 712         if (!ent->t275.length) {
 713                 ql_dbg(ql_dbg_misc, vha, 0xd020,
 714                     "%s: buffer zero length\n", __func__);
 715                 qla27xx_skip_entry(ent, buf);
 716                 goto done;
 717         }
 718         if (offset + ent->t275.length > ent->hdr.entry_size) {
 719                 ql_dbg(ql_dbg_misc, vha, 0xd030,
 720                     "%s: buffer overflow\n", __func__);
 721                 qla27xx_skip_entry(ent, buf);
 722                 goto done;
 723         }
 724
 725         qla27xx_insertbuf(ent->t275.buffer, ent->t275.length, buf, len);
 726 done:
 727         return false;
 728 }
 729
 730 static int
 731 qla27xx_fwdt_entry_other(struct scsi_qla_host *vha,
 732         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 733 {
 734         ql_dbg(ql_dbg_misc, vha, 0xd2ff,
 735             "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len);
 736         qla27xx_skip_entry(ent, buf);
 737
 738         return false;
 739 }
 740
 741 struct qla27xx_fwdt_entry_call {
 742         uint type;
 743         int (*call)(
 744             struct scsi_qla_host *,
 745             struct qla27xx_fwdt_entry *,
 746             void *,
 747             ulong *);
 748 };
 749
 750 static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = {
 751         { ENTRY_TYPE_NOP                , qla27xx_fwdt_entry_t0    } ,
 752         { ENTRY_TYPE_TMP_END            , qla27xx_fwdt_entry_t255  } ,
 753         { ENTRY_TYPE_RD_IOB_T1          , qla27xx_fwdt_entry_t256  } ,
 754         { ENTRY_TYPE_WR_IOB_T1          , qla27xx_fwdt_entry_t257  } ,
 755         { ENTRY_TYPE_RD_IOB_T2          , qla27xx_fwdt_entry_t258  } ,
 756         { ENTRY_TYPE_WR_IOB_T2          , qla27xx_fwdt_entry_t259  } ,
 757         { ENTRY_TYPE_RD_PCI             , qla27xx_fwdt_entry_t260  } ,
 758         { ENTRY_TYPE_WR_PCI             , qla27xx_fwdt_entry_t261  } ,
 759         { ENTRY_TYPE_RD_RAM             , qla27xx_fwdt_entry_t262  } ,
 760         { ENTRY_TYPE_GET_QUEUE          , qla27xx_fwdt_entry_t263  } ,
 761         { ENTRY_TYPE_GET_FCE            , qla27xx_fwdt_entry_t264  } ,
 762         { ENTRY_TYPE_PSE_RISC           , qla27xx_fwdt_entry_t265  } ,
 763         { ENTRY_TYPE_RST_RISC           , qla27xx_fwdt_entry_t266  } ,
 764         { ENTRY_TYPE_DIS_INTR           , qla27xx_fwdt_entry_t267  } ,
 765         { ENTRY_TYPE_GET_HBUF           , qla27xx_fwdt_entry_t268  } ,
 766         { ENTRY_TYPE_SCRATCH            , qla27xx_fwdt_entry_t269  } ,
 767         { ENTRY_TYPE_RDREMREG           , qla27xx_fwdt_entry_t270  } ,
 768         { ENTRY_TYPE_WRREMREG           , qla27xx_fwdt_entry_t271  } ,
 769         { ENTRY_TYPE_RDREMRAM           , qla27xx_fwdt_entry_t272  } ,
 770         { ENTRY_TYPE_PCICFG             , qla27xx_fwdt_entry_t273  } ,
 771         { ENTRY_TYPE_GET_SHADOW         , qla27xx_fwdt_entry_t274  } ,
 772         { ENTRY_TYPE_WRITE_BUF          , qla27xx_fwdt_entry_t275  } ,
 773         { -1                            , qla27xx_fwdt_entry_other }
 774 };
 775
 776 static inline int (*qla27xx_find_entry(uint type))
 777         (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *)
 778 {
 779         struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list;
 780
 781         while (list->type < type)
 782                 list++;
 783
 784         if (list->type == type)
 785                 return list->call;
 786         return qla27xx_fwdt_entry_other;
 787 }
 788
 789 static inline void *
 790 qla27xx_next_entry(void *p)
 791 {
 792         struct qla27xx_fwdt_entry *ent = p;
 793
 794         return p + ent->hdr.entry_size;
 795 }
 796
 797 static void
 798 qla27xx_walk_template(struct scsi_qla_host *vha,
 799         struct qla27xx_fwdt_template *tmp, void *buf, ulong *len)
 800 {
 801         struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset;
 802         ulong count = tmp->entry_count;
 803
 804         ql_dbg(ql_dbg_misc, vha, 0xd01a,
 805             "%s: entry count %lx\n", __func__, count);
 806         while (count--) {
 807                 if (buf && *len >= vha->hw->fw_dump_len)
 808                         break;
 809                 if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len))
 810                         break;
 811                 ent = qla27xx_next_entry(ent);
 812         }
 813
 814         if (count)
 815                 ql_dbg(ql_dbg_misc, vha, 0xd018,
 816                     "%s: entry residual count (%lx)\n", __func__, count);
 817
 818         if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END)
 819                 ql_dbg(ql_dbg_misc, vha, 0xd019,
 820                     "%s: missing end entry (%lx)\n", __func__, count);
 821
 822         if (buf && *len != vha->hw->fw_dump_len)
 823                 ql_dbg(ql_dbg_misc, vha, 0xd01b,
 824                     "%s: length=%#lx residual=%+ld\n",
 825                     __func__, *len, vha->hw->fw_dump_len - *len);
 826
 827         if (buf) {
 828                 ql_log(ql_log_warn, vha, 0xd015,
 829                     "Firmware dump saved to temp buffer (%lu/%p)\n",
 830                     vha->host_no, vha->hw->fw_dump);
 831                 qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP);
 832         }
 833 }
 834
 835 static void
 836 qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp)
 837 {
 838         tmp->capture_timestamp = jiffies;
 839 }
 840
 841 static void
 842 qla27xx_driver_info(struct qla27xx_fwdt_template *tmp)
 843 {
 844         uint8_t v[] = { 0, 0, 0, 0, 0, 0 };
 845
 846         sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu",
 847             v+0, v+1, v+2, v+3, v+4, v+5);
 848
 849         tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0];
 850         tmp->driver_info[1] = v[5] << 8 | v[4];
 851         tmp->driver_info[2] = 0x12345678;
 852 }
 853
 854 static void
 855 qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp,
 856         struct scsi_qla_host *vha)
 857 {
 858         tmp->firmware_version[0] = vha->hw->fw_major_version;
 859         tmp->firmware_version[1] = vha->hw->fw_minor_version;
 860         tmp->firmware_version[2] = vha->hw->fw_subminor_version;
 861         tmp->firmware_version[3] =
 862             vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes;
 863         tmp->firmware_version[4] =
 864             vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0];
 865 }
 866
 867 static void
 868 ql27xx_edit_template(struct scsi_qla_host *vha,
 869         struct qla27xx_fwdt_template *tmp)
 870 {
 871         qla27xx_time_stamp(tmp);
 872         qla27xx_driver_info(tmp);
 873         qla27xx_firmware_info(tmp, vha);
 874 }
 875
 876 static inline uint32_t
 877 qla27xx_template_checksum(void *p, ulong size)
 878 {
 879         uint32_t *buf = p;
 880         uint64_t sum = 0;
 881
 882         size /= sizeof(*buf);
 883
 884         while (size--)
 885                 sum += *buf++;
 886
 887         sum = (sum & 0xffffffff) + (sum >> 32);
 888
 889         return ~sum;
 890 }
 891
 892 static inline int
 893 qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp)
 894 {
 895         return qla27xx_template_checksum(tmp, tmp->template_size) == 0;
 896 }
 897
 898 static inline int
 899 qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp)
 900 {
 901         return tmp->template_type == TEMPLATE_TYPE_FWDUMP;
 902 }
 903
 904 static void
 905 qla27xx_execute_fwdt_template(struct scsi_qla_host *vha)
 906 {
 907         struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
 908         ulong len;
 909
 910         if (qla27xx_fwdt_template_valid(tmp)) {
 911                 len = tmp->template_size;
 912                 tmp = memcpy(vha->hw->fw_dump, tmp, len);
 913                 ql27xx_edit_template(vha, tmp);
 914                 qla27xx_walk_template(vha, tmp, tmp, &len);
 915                 vha->hw->fw_dump_len = len;
 916                 vha->hw->fw_dumped = 1;
 917         }
 918 }
 919
 920 ulong
 921 qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha)
 922 {
 923         struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
 924         ulong len = 0;
 925
 926         if (qla27xx_fwdt_template_valid(tmp)) {
 927                 len = tmp->template_size;
 928                 qla27xx_walk_template(vha, tmp, NULL, &len);
 929         }
 930
 931         return len;
 932 }
 933
 934 ulong
 935 qla27xx_fwdt_template_size(void *p)
 936 {
 937         struct qla27xx_fwdt_template *tmp = p;
 938
 939         return tmp->template_size;
 940 }
 941
 942 ulong
 943 qla27xx_fwdt_template_default_size(void)
 944 {
 945         return sizeof(ql27xx_fwdt_default_template);
 946 }
 947
 948 const void *
 949 qla27xx_fwdt_template_default(void)
 950 {
 951         return ql27xx_fwdt_default_template;
 952 }
 953
 954 int
 955 qla27xx_fwdt_template_valid(void *p)
 956 {
 957         struct qla27xx_fwdt_template *tmp = p;
 958
 959         if (!qla27xx_verify_template_header(tmp)) {
 960                 ql_log(ql_log_warn, NULL, 0xd01c,
 961                     "%s: template type %x\n", __func__, tmp->template_type);
 962                 return false;
 963         }
 964
 965         if (!qla27xx_verify_template_checksum(tmp)) {
 966                 ql_log(ql_log_warn, NULL, 0xd01d,
 967                     "%s: failed template checksum\n", __func__);
 968                 return false;
 969         }
 970
 971         return true;
 972 }
 973
 974 void
 975 qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked)
 976 {
 977         ulong flags = 0;
 978
 979 #ifndef __CHECKER__
 980         if (!hardware_locked)
 981                 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
 982 #endif
 983
 984         if (!vha->hw->fw_dump)
 985                 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n");
 986         else if (!vha->hw->fw_dump_template)
 987                 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n");
 988         else if (vha->hw->fw_dumped)
 989                 ql_log(ql_log_warn, vha, 0xd300,
 990                     "Firmware has been previously dumped (%p),"
 991                     " -- ignoring request\n", vha->hw->fw_dump);
 992         else
 993                 qla27xx_execute_fwdt_template(vha);
 994
 995 #ifndef __CHECKER__
 996         if (!hardware_locked)
 997                 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
 998 #endif
 999 }