2 * Copyright 2014 Cisco Systems, Inc. All rights reserved.
4 * This program is free software; you may redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
9 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
10 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
11 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
12 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
13 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
14 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/types.h>
21 #include <linux/pci.h>
22 #include <linux/delay.h>
23 #include <linux/if_ether.h>
24 #include <linux/slab.h>
25 #include "vnic_resource.h"
26 #include "vnic_devcmd.h"
28 #include "vnic_stats.h"
31 #define VNIC_DVCMD_TMO 10000 /* Devcmd Timeout value */
32 #define VNIC_NOTIFY_INTR_MASK 0x0000ffff00000000ULL
34 struct devcmd2_controller {
35 struct vnic_wq_ctrl __iomem *wq_ctrl;
36 struct vnic_dev_ring results_ring;
38 struct vnic_devcmd2 *cmd_ring;
39 struct devcmd2_result *result;
53 struct vnic_res res[RES_TYPE_MAX];
54 enum vnic_dev_intr_mode intr_mode;
55 struct vnic_devcmd __iomem *devcmd;
56 struct vnic_devcmd_notify *notify;
57 struct vnic_devcmd_notify notify_copy;
60 dma_addr_t linkstatus_pa;
61 struct vnic_stats *stats;
63 struct vnic_devcmd_fw_info *fw_info;
64 dma_addr_t fw_info_pa;
65 u64 args[VNIC_DEVCMD_NARGS];
66 struct devcmd2_controller *devcmd2;
68 int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
72 #define VNIC_MAX_RES_HDR_SIZE \
73 (sizeof(struct vnic_resource_header) + \
74 sizeof(struct vnic_resource) * RES_TYPE_MAX)
75 #define VNIC_RES_STRIDE 128
77 void *svnic_dev_priv(struct vnic_dev *vdev)
82 static int vnic_dev_discover_res(struct vnic_dev *vdev,
83 struct vnic_dev_bar *bar, unsigned int num_bars)
85 struct vnic_resource_header __iomem *rh;
86 struct vnic_resource __iomem *r;
92 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
93 pr_err("vNIC BAR0 res hdr length error\n");
100 pr_err("vNIC BAR0 res hdr not mem-mapped\n");
105 if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
106 ioread32(&rh->version) != VNIC_RES_VERSION) {
107 pr_err("vNIC BAR0 res magic/version error exp (%lx/%lx) curr (%x/%x)\n",
108 VNIC_RES_MAGIC, VNIC_RES_VERSION,
109 ioread32(&rh->magic), ioread32(&rh->version));
114 r = (struct vnic_resource __iomem *)(rh + 1);
116 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
118 u8 bar_num = ioread8(&r->bar);
119 u32 bar_offset = ioread32(&r->bar_offset);
120 u32 count = ioread32(&r->count);
125 if (bar_num >= num_bars)
128 if (!bar[bar_num].len || !bar[bar_num].vaddr)
135 case RES_TYPE_INTR_CTRL:
136 /* each count is stride bytes long */
137 len = count * VNIC_RES_STRIDE;
138 if (len + bar_offset > bar->len) {
139 pr_err("vNIC BAR0 resource %d out-of-bounds, offset 0x%x + size 0x%x > bar len 0x%lx\n",
148 case RES_TYPE_INTR_PBA_LEGACY:
149 case RES_TYPE_DEVCMD:
150 case RES_TYPE_DEVCMD2:
158 vdev->res[type].count = count;
159 vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
165 unsigned int svnic_dev_get_res_count(struct vnic_dev *vdev,
166 enum vnic_res_type type)
168 return vdev->res[type].count;
171 void __iomem *svnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
174 if (!vdev->res[type].vaddr)
181 case RES_TYPE_INTR_CTRL:
182 return (char __iomem *)vdev->res[type].vaddr +
183 index * VNIC_RES_STRIDE;
186 return (char __iomem *)vdev->res[type].vaddr;
190 unsigned int svnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
191 unsigned int desc_count,
192 unsigned int desc_size)
194 /* The base address of the desc rings must be 512 byte aligned.
195 * Descriptor count is aligned to groups of 32 descriptors. A
196 * count of 0 means the maximum 4096 descriptors. Descriptor
197 * size is aligned to 16 bytes.
200 unsigned int count_align = 32;
201 unsigned int desc_align = 16;
203 ring->base_align = 512;
208 ring->desc_count = ALIGN(desc_count, count_align);
210 ring->desc_size = ALIGN(desc_size, desc_align);
212 ring->size = ring->desc_count * ring->desc_size;
213 ring->size_unaligned = ring->size + ring->base_align;
215 return ring->size_unaligned;
218 void svnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
220 memset(ring->descs, 0, ring->size);
223 int svnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
224 unsigned int desc_count, unsigned int desc_size)
226 svnic_dev_desc_ring_size(ring, desc_count, desc_size);
228 ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
229 ring->size_unaligned,
230 &ring->base_addr_unaligned);
232 if (!ring->descs_unaligned) {
233 pr_err("Failed to allocate ring (size=%d), aborting\n",
239 ring->base_addr = ALIGN(ring->base_addr_unaligned,
241 ring->descs = (u8 *)ring->descs_unaligned +
242 (ring->base_addr - ring->base_addr_unaligned);
244 svnic_dev_clear_desc_ring(ring);
246 ring->desc_avail = ring->desc_count - 1;
251 void svnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
254 pci_free_consistent(vdev->pdev,
255 ring->size_unaligned,
256 ring->descs_unaligned,
257 ring->base_addr_unaligned);
262 static int _svnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
265 struct devcmd2_controller *dc2c = vdev->devcmd2;
266 struct devcmd2_result *result = dc2c->result + dc2c->next_result;
273 posted = ioread32(&dc2c->wq_ctrl->posted_index);
275 if (posted == 0xFFFFFFFF) { /* check for hardware gone */
276 /* Hardware surprise removal: return error */
280 new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
281 dc2c->cmd_ring[posted].cmd = cmd;
282 dc2c->cmd_ring[posted].flags = 0;
284 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
285 dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
287 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
288 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
289 dc2c->cmd_ring[posted].args[i] = vdev->args[i];
291 /* Adding write memory barrier prevents compiler and/or CPU
292 * reordering, thus avoiding descriptor posting before
293 * descriptor is initialized. Otherwise, hardware can read
294 * stale descriptor fields.
297 iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
299 if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
302 for (delay = 0; delay < wait; delay++) {
304 if (result->color == dc2c->color) {
306 if (dc2c->next_result == dc2c->result_size) {
307 dc2c->next_result = 0;
308 dc2c->color = dc2c->color ? 0 : 1;
311 err = (int) result->error;
312 if (err != ERR_ECMDUNKNOWN ||
313 cmd != CMD_CAPABILITY)
314 pr_err("Error %d devcmd %d\n",
319 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
321 * Adding the rmb() prevents the compiler
322 * and/or CPU from reordering the reads which
323 * would potentially result in reading stale
327 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
328 vdev->args[i] = result->results[i];
335 pr_err("Timed out devcmd %d\n", _CMD_N(cmd));
340 static int svnic_dev_init_devcmd2(struct vnic_dev *vdev)
342 struct devcmd2_controller *dc2c = NULL;
343 unsigned int fetch_idx;
350 p = svnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
354 dc2c = kzalloc(sizeof(*dc2c), GFP_ATOMIC);
358 vdev->devcmd2 = dc2c;
361 dc2c->result_size = DEVCMD2_RING_SIZE;
363 ret = vnic_wq_devcmd2_alloc(vdev,
368 goto err_free_devcmd2;
370 fetch_idx = ioread32(&dc2c->wq.ctrl->fetch_index);
371 if (fetch_idx == 0xFFFFFFFF) { /* check for hardware gone */
372 /* Hardware surprise removal: reset fetch_index */
377 * Don't change fetch_index ever and
378 * set posted_index same as fetch_index
379 * when setting up the WQ for devcmd2.
381 vnic_wq_init_start(&dc2c->wq, 0, fetch_idx, fetch_idx, 0, 0);
382 svnic_wq_enable(&dc2c->wq);
383 ret = svnic_dev_alloc_desc_ring(vdev,
390 dc2c->result = (struct devcmd2_result *) dc2c->results_ring.descs;
391 dc2c->cmd_ring = (struct vnic_devcmd2 *) dc2c->wq.ring.descs;
392 dc2c->wq_ctrl = dc2c->wq.ctrl;
393 vdev->args[0] = (u64) dc2c->results_ring.base_addr | VNIC_PADDR_TARGET;
394 vdev->args[1] = DEVCMD2_RING_SIZE;
396 ret = _svnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, VNIC_DVCMD_TMO);
398 goto err_free_desc_ring;
400 vdev->devcmd_rtn = &_svnic_dev_cmd2;
401 pr_info("DEVCMD2 Initialized.\n");
406 svnic_dev_free_desc_ring(vdev, &dc2c->results_ring);
409 svnic_wq_disable(&dc2c->wq);
410 svnic_wq_free(&dc2c->wq);
414 vdev->devcmd2 = NULL;
417 } /* end of svnic_dev_init_devcmd2 */
419 static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
421 struct devcmd2_controller *dc2c = vdev->devcmd2;
423 vdev->devcmd2 = NULL;
424 vdev->devcmd_rtn = NULL;
426 svnic_dev_free_desc_ring(vdev, &dc2c->results_ring);
427 svnic_wq_disable(&dc2c->wq);
428 svnic_wq_free(&dc2c->wq);
432 int svnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
433 u64 *a0, u64 *a1, int wait)
437 memset(vdev->args, 0, sizeof(vdev->args));
441 err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
449 int svnic_dev_fw_info(struct vnic_dev *vdev,
450 struct vnic_devcmd_fw_info **fw_info)
453 int wait = VNIC_DVCMD_TMO;
456 if (!vdev->fw_info) {
457 vdev->fw_info = pci_alloc_consistent(vdev->pdev,
458 sizeof(struct vnic_devcmd_fw_info),
463 a0 = vdev->fw_info_pa;
465 /* only get fw_info once and cache it */
466 err = svnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
469 *fw_info = vdev->fw_info;
474 int svnic_dev_spec(struct vnic_dev *vdev, unsigned int offset,
475 unsigned int size, void *value)
478 int wait = VNIC_DVCMD_TMO;
484 err = svnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
488 *(u8 *)value = (u8)a0;
491 *(u16 *)value = (u16)a0;
494 *(u32 *)value = (u32)a0;
507 int svnic_dev_stats_clear(struct vnic_dev *vdev)
510 int wait = VNIC_DVCMD_TMO;
512 return svnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
515 int svnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
518 int wait = VNIC_DVCMD_TMO;
521 vdev->stats = pci_alloc_consistent(vdev->pdev,
522 sizeof(struct vnic_stats), &vdev->stats_pa);
527 *stats = vdev->stats;
529 a1 = sizeof(struct vnic_stats);
531 return svnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
534 int svnic_dev_close(struct vnic_dev *vdev)
537 int wait = VNIC_DVCMD_TMO;
539 return svnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
542 int svnic_dev_enable_wait(struct vnic_dev *vdev)
545 int wait = VNIC_DVCMD_TMO;
548 err = svnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
549 if (err == ERR_ECMDUNKNOWN)
550 return svnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
555 int svnic_dev_disable(struct vnic_dev *vdev)
558 int wait = VNIC_DVCMD_TMO;
560 return svnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
563 int svnic_dev_open(struct vnic_dev *vdev, int arg)
565 u64 a0 = (u32)arg, a1 = 0;
566 int wait = VNIC_DVCMD_TMO;
568 return svnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
571 int svnic_dev_open_done(struct vnic_dev *vdev, int *done)
574 int wait = VNIC_DVCMD_TMO;
579 err = svnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
588 int svnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
591 int wait = VNIC_DVCMD_TMO;
594 vdev->notify = pci_alloc_consistent(vdev->pdev,
595 sizeof(struct vnic_devcmd_notify),
601 a0 = vdev->notify_pa;
602 a1 = ((u64)intr << 32) & VNIC_NOTIFY_INTR_MASK;
603 a1 += sizeof(struct vnic_devcmd_notify);
605 return svnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
608 void svnic_dev_notify_unset(struct vnic_dev *vdev)
611 int wait = VNIC_DVCMD_TMO;
613 a0 = 0; /* paddr = 0 to unset notify buffer */
614 a1 = VNIC_NOTIFY_INTR_MASK; /* intr num = -1 to unreg for intr */
615 a1 += sizeof(struct vnic_devcmd_notify);
617 svnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
620 static int vnic_dev_notify_ready(struct vnic_dev *vdev)
623 unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
632 memcpy(&vdev->notify_copy, vdev->notify,
633 sizeof(struct vnic_devcmd_notify));
634 words = (u32 *)&vdev->notify_copy;
635 for (i = 1; i < nwords; i++)
637 } while (csum != words[0]);
642 int svnic_dev_init(struct vnic_dev *vdev, int arg)
644 u64 a0 = (u32)arg, a1 = 0;
645 int wait = VNIC_DVCMD_TMO;
647 return svnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
650 int svnic_dev_link_status(struct vnic_dev *vdev)
652 if (vdev->linkstatus)
653 return *vdev->linkstatus;
655 if (!vnic_dev_notify_ready(vdev))
658 return vdev->notify_copy.link_state;
661 u32 svnic_dev_link_down_cnt(struct vnic_dev *vdev)
663 if (!vnic_dev_notify_ready(vdev))
666 return vdev->notify_copy.link_down_cnt;
669 void svnic_dev_set_intr_mode(struct vnic_dev *vdev,
670 enum vnic_dev_intr_mode intr_mode)
672 vdev->intr_mode = intr_mode;
675 enum vnic_dev_intr_mode svnic_dev_get_intr_mode(struct vnic_dev *vdev)
677 return vdev->intr_mode;
680 void svnic_dev_unregister(struct vnic_dev *vdev)
684 pci_free_consistent(vdev->pdev,
685 sizeof(struct vnic_devcmd_notify),
688 if (vdev->linkstatus)
689 pci_free_consistent(vdev->pdev,
692 vdev->linkstatus_pa);
694 pci_free_consistent(vdev->pdev,
695 sizeof(struct vnic_stats),
696 vdev->stats, vdev->stats_pa);
698 pci_free_consistent(vdev->pdev,
699 sizeof(struct vnic_devcmd_fw_info),
700 vdev->fw_info, vdev->fw_info_pa);
702 vnic_dev_deinit_devcmd2(vdev);
707 struct vnic_dev *svnic_dev_alloc_discover(struct vnic_dev *vdev,
709 struct pci_dev *pdev,
710 struct vnic_dev_bar *bar,
711 unsigned int num_bars)
714 vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
722 if (vnic_dev_discover_res(vdev, bar, num_bars))
728 svnic_dev_unregister(vdev);
731 } /* end of svnic_dev_alloc_discover */
734 * fallback option is left to keep the interface common for other vnics.
736 int svnic_dev_cmd_init(struct vnic_dev *vdev, int fallback)
741 p = svnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
743 err = svnic_dev_init_devcmd2(vdev);
745 pr_err("DEVCMD2 resource not found.\n");
748 } /* end of svnic_dev_cmd_init */