1 /* sun_esp.c: ESP front-end for Sparc SBUS systems.
3 * Copyright (C) 2007, 2008 David S. Miller (davem@davemloft.net)
6 #include <linux/kernel.h>
7 #include <linux/types.h>
8 #include <linux/delay.h>
9 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/dma-mapping.h>
20 #include <scsi/scsi_host.h>
24 #define DRV_MODULE_NAME "sun_esp"
25 #define PFX DRV_MODULE_NAME ": "
26 #define DRV_VERSION "1.000"
27 #define DRV_MODULE_RELDATE "April 19, 2007"
29 #define dma_read32(REG) \
30 sbus_readl(esp->dma_regs + (REG))
31 #define dma_write32(VAL, REG) \
32 sbus_writel((VAL), esp->dma_regs + (REG))
34 /* DVMA chip revisions */
45 static int __devinit esp_sbus_setup_dma(struct esp *esp,
46 struct of_device *dma_of)
50 esp->dma_regs = of_ioremap(&dma_of->resource[0], 0,
51 resource_size(&dma_of->resource[0]),
56 switch (dma_read32(DMA_CSR) & DMA_DEVICE_ID) {
58 esp->dmarev = dvmarev0;
61 esp->dmarev = dvmaesc1;
64 esp->dmarev = dvmarev1;
67 esp->dmarev = dvmarev2;
70 esp->dmarev = dvmahme;
73 esp->dmarev = dvmarevplus;
81 static int __devinit esp_sbus_map_regs(struct esp *esp, int hme)
83 struct sbus_dev *sdev = esp->dev;
86 /* On HME, two reg sets exist, first is DVMA,
87 * second is ESP registers.
90 res = &sdev->resource[1];
92 res = &sdev->resource[0];
94 esp->regs = sbus_ioremap(res, 0, SBUS_ESP_REG_SIZE, "ESP");
101 static int __devinit esp_sbus_map_command_block(struct esp *esp)
103 struct sbus_dev *sdev = esp->dev;
105 esp->command_block = dma_alloc_coherent(&sdev->ofdev.dev, 16,
106 &esp->command_block_dma,
108 if (!esp->command_block)
113 static int __devinit esp_sbus_register_irq(struct esp *esp)
115 struct Scsi_Host *host = esp->host;
116 struct sbus_dev *sdev = esp->dev;
118 host->irq = sdev->irqs[0];
119 return request_irq(host->irq, scsi_esp_intr, IRQF_SHARED, "ESP", esp);
122 static void __devinit esp_get_scsi_id(struct esp *esp)
124 struct sbus_dev *sdev = esp->dev;
125 struct device_node *dp = sdev->ofdev.node;
127 esp->scsi_id = of_getintprop_default(dp, "initiator-id", 0xff);
128 if (esp->scsi_id != 0xff)
131 esp->scsi_id = of_getintprop_default(dp, "scsi-initiator-id", 0xff);
132 if (esp->scsi_id != 0xff)
141 esp->scsi_id = of_getintprop_default(sdev->bus->ofdev.node,
142 "scsi-initiator-id", 7);
145 esp->host->this_id = esp->scsi_id;
146 esp->scsi_id_mask = (1 << esp->scsi_id);
149 static void __devinit esp_get_differential(struct esp *esp)
151 struct sbus_dev *sdev = esp->dev;
152 struct device_node *dp = sdev->ofdev.node;
154 if (of_find_property(dp, "differential", NULL))
155 esp->flags |= ESP_FLAG_DIFFERENTIAL;
157 esp->flags &= ~ESP_FLAG_DIFFERENTIAL;
160 static void __devinit esp_get_clock_params(struct esp *esp)
162 struct sbus_dev *sdev = esp->dev;
163 struct device_node *dp = sdev->ofdev.node;
164 struct device_node *bus_dp;
168 if (sdev != NULL && sdev->bus != NULL)
169 bus_dp = sdev->bus->ofdev.node;
171 fmhz = of_getintprop_default(dp, "clock-frequency", 0);
173 fmhz = (!bus_dp) ? 0 :
174 of_getintprop_default(bus_dp, "clock-frequency", 0);
179 static void __devinit esp_get_bursts(struct esp *esp, struct of_device *dma_of)
181 struct device_node *dma_dp = dma_of->node;
182 struct sbus_dev *sdev = esp->dev;
183 struct device_node *dp;
186 dp = sdev->ofdev.node;
187 bursts = of_getintprop_default(dp, "burst-sizes", 0xff);
188 val = of_getintprop_default(dma_dp, "burst-sizes", 0xff);
193 u8 val = of_getintprop_default(sdev->bus->ofdev.node,
194 "burst-sizes", 0xff);
199 if (bursts == 0xff ||
200 (bursts & DMA_BURST16) == 0 ||
201 (bursts & DMA_BURST32) == 0)
202 bursts = (DMA_BURST32 - 1);
204 esp->bursts = bursts;
207 static void __devinit esp_sbus_get_props(struct esp *esp, struct of_device *espdma)
209 esp_get_scsi_id(esp);
210 esp_get_differential(esp);
211 esp_get_clock_params(esp);
212 esp_get_bursts(esp, espdma);
215 static void sbus_esp_write8(struct esp *esp, u8 val, unsigned long reg)
217 sbus_writeb(val, esp->regs + (reg * 4UL));
220 static u8 sbus_esp_read8(struct esp *esp, unsigned long reg)
222 return sbus_readb(esp->regs + (reg * 4UL));
225 static dma_addr_t sbus_esp_map_single(struct esp *esp, void *buf,
228 struct sbus_dev *sdev = esp->dev;
230 return dma_map_single(&sdev->ofdev.dev, buf, sz, dir);
233 static int sbus_esp_map_sg(struct esp *esp, struct scatterlist *sg,
236 struct sbus_dev *sdev = esp->dev;
238 return dma_map_sg(&sdev->ofdev.dev, sg, num_sg, dir);
241 static void sbus_esp_unmap_single(struct esp *esp, dma_addr_t addr,
244 struct sbus_dev *sdev = esp->dev;
246 dma_unmap_single(&sdev->ofdev.dev, addr, sz, dir);
249 static void sbus_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
252 struct sbus_dev *sdev = esp->dev;
254 dma_unmap_sg(&sdev->ofdev.dev, sg, num_sg, dir);
257 static int sbus_esp_irq_pending(struct esp *esp)
259 if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
264 static void sbus_esp_reset_dma(struct esp *esp)
266 int can_do_burst16, can_do_burst32, can_do_burst64;
267 int can_do_sbus64, lim;
268 struct sbus_dev *sdev;
271 can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
272 can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
276 if (sbus_can_dma_64bit())
278 if (sbus_can_burst64())
279 can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
281 /* Put the DVMA into a known state. */
282 if (esp->dmarev != dvmahme) {
283 val = dma_read32(DMA_CSR);
284 dma_write32(val | DMA_RST_SCSI, DMA_CSR);
285 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
287 switch (esp->dmarev) {
289 dma_write32(DMA_RESET_FAS366, DMA_CSR);
290 dma_write32(DMA_RST_SCSI, DMA_CSR);
292 esp->prev_hme_dmacsr = (DMA_PARITY_OFF | DMA_2CLKS |
293 DMA_SCSI_DISAB | DMA_INT_ENAB);
295 esp->prev_hme_dmacsr &= ~(DMA_ENABLE | DMA_ST_WRITE |
299 esp->prev_hme_dmacsr |= DMA_BRST64;
300 else if (can_do_burst32)
301 esp->prev_hme_dmacsr |= DMA_BRST32;
304 esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
305 sbus_set_sbus64(&sdev->ofdev.dev, esp->bursts);
309 while (dma_read32(DMA_CSR) & DMA_PEND_READ) {
311 printk(KERN_ALERT PFX "esp%d: DMA_PEND_READ "
313 esp->host->unique_id);
319 dma_write32(0, DMA_CSR);
320 dma_write32(esp->prev_hme_dmacsr, DMA_CSR);
322 dma_write32(0, DMA_ADDR);
326 if (esp->rev != ESP100) {
327 val = dma_read32(DMA_CSR);
328 dma_write32(val | DMA_3CLKS, DMA_CSR);
333 val = dma_read32(DMA_CSR);
336 if (can_do_burst32) {
340 dma_write32(val, DMA_CSR);
344 val = dma_read32(DMA_CSR);
345 val |= DMA_ADD_ENABLE;
346 val &= ~DMA_BCNT_ENAB;
347 if (!can_do_burst32 && can_do_burst16) {
348 val |= DMA_ESC_BURST;
350 val &= ~(DMA_ESC_BURST);
352 dma_write32(val, DMA_CSR);
359 /* Enable interrupts. */
360 val = dma_read32(DMA_CSR);
361 dma_write32(val | DMA_INT_ENAB, DMA_CSR);
364 static void sbus_esp_dma_drain(struct esp *esp)
369 if (esp->dmarev == dvmahme)
372 csr = dma_read32(DMA_CSR);
373 if (!(csr & DMA_FIFO_ISDRAIN))
376 if (esp->dmarev != dvmarev3 && esp->dmarev != dvmaesc1)
377 dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR);
380 while (dma_read32(DMA_CSR) & DMA_FIFO_ISDRAIN) {
382 printk(KERN_ALERT PFX "esp%d: DMA will not drain!\n",
383 esp->host->unique_id);
390 static void sbus_esp_dma_invalidate(struct esp *esp)
392 if (esp->dmarev == dvmahme) {
393 dma_write32(DMA_RST_SCSI, DMA_CSR);
395 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
396 (DMA_PARITY_OFF | DMA_2CLKS |
397 DMA_SCSI_DISAB | DMA_INT_ENAB)) &
398 ~(DMA_ST_WRITE | DMA_ENABLE));
400 dma_write32(0, DMA_CSR);
401 dma_write32(esp->prev_hme_dmacsr, DMA_CSR);
403 /* This is necessary to avoid having the SCSI channel
404 * engine lock up on us.
406 dma_write32(0, DMA_ADDR);
412 while ((val = dma_read32(DMA_CSR)) & DMA_PEND_READ) {
414 printk(KERN_ALERT PFX "esp%d: DMA will not "
415 "invalidate!\n", esp->host->unique_id);
421 val &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
423 dma_write32(val, DMA_CSR);
424 val &= ~DMA_FIFO_INV;
425 dma_write32(val, DMA_CSR);
429 static void sbus_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
430 u32 dma_count, int write, u8 cmd)
434 BUG_ON(!(cmd & ESP_CMD_DMA));
436 sbus_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
437 sbus_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
438 if (esp->rev == FASHME) {
439 sbus_esp_write8(esp, (esp_count >> 16) & 0xff, FAS_RLO);
440 sbus_esp_write8(esp, 0, FAS_RHI);
442 scsi_esp_cmd(esp, cmd);
444 csr = esp->prev_hme_dmacsr;
445 csr |= DMA_SCSI_DISAB | DMA_ENABLE;
449 csr &= ~DMA_ST_WRITE;
450 esp->prev_hme_dmacsr = csr;
452 dma_write32(dma_count, DMA_COUNT);
453 dma_write32(addr, DMA_ADDR);
454 dma_write32(csr, DMA_CSR);
456 csr = dma_read32(DMA_CSR);
461 csr &= ~DMA_ST_WRITE;
462 dma_write32(csr, DMA_CSR);
463 if (esp->dmarev == dvmaesc1) {
464 u32 end = PAGE_ALIGN(addr + dma_count + 16U);
465 dma_write32(end - addr, DMA_COUNT);
467 dma_write32(addr, DMA_ADDR);
469 scsi_esp_cmd(esp, cmd);
474 static int sbus_esp_dma_error(struct esp *esp)
476 u32 csr = dma_read32(DMA_CSR);
478 if (csr & DMA_HNDL_ERROR)
484 static const struct esp_driver_ops sbus_esp_ops = {
485 .esp_write8 = sbus_esp_write8,
486 .esp_read8 = sbus_esp_read8,
487 .map_single = sbus_esp_map_single,
488 .map_sg = sbus_esp_map_sg,
489 .unmap_single = sbus_esp_unmap_single,
490 .unmap_sg = sbus_esp_unmap_sg,
491 .irq_pending = sbus_esp_irq_pending,
492 .reset_dma = sbus_esp_reset_dma,
493 .dma_drain = sbus_esp_dma_drain,
494 .dma_invalidate = sbus_esp_dma_invalidate,
495 .send_dma_cmd = sbus_esp_send_dma_cmd,
496 .dma_error = sbus_esp_dma_error,
499 static int __devinit esp_sbus_probe_one(struct device *dev,
500 struct sbus_dev *esp_dev,
501 struct of_device *espdma,
502 struct sbus_bus *sbus,
505 struct scsi_host_template *tpnt = &scsi_esp_template;
506 struct Scsi_Host *host;
510 host = scsi_host_alloc(tpnt, sizeof(struct esp));
516 host->max_id = (hme ? 16 : 8);
517 esp = shost_priv(host);
521 esp->ops = &sbus_esp_ops;
524 esp->flags |= ESP_FLAG_WIDE_CAPABLE;
526 err = esp_sbus_setup_dma(esp, espdma);
530 err = esp_sbus_map_regs(esp, hme);
534 err = esp_sbus_map_command_block(esp);
536 goto fail_unmap_regs;
538 err = esp_sbus_register_irq(esp);
540 goto fail_unmap_command_block;
542 esp_sbus_get_props(esp, espdma);
544 /* Before we try to touch the ESP chip, ESC1 dma can
545 * come up with the reset bit set, so make sure that
548 if (esp->dmarev == dvmaesc1) {
549 u32 val = dma_read32(DMA_CSR);
551 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
554 dev_set_drvdata(&esp_dev->ofdev.dev, esp);
556 err = scsi_esp_register(esp, dev);
563 free_irq(host->irq, esp);
564 fail_unmap_command_block:
565 dma_free_coherent(&esp_dev->ofdev.dev, 16,
567 esp->command_block_dma);
569 sbus_iounmap(esp->regs, SBUS_ESP_REG_SIZE);
576 static int __devinit esp_sbus_probe(struct of_device *dev, const struct of_device_id *match)
578 struct sbus_dev *sdev = to_sbus_device(&dev->dev);
579 struct device_node *dma_node = NULL;
580 struct device_node *dp = dev->node;
581 struct of_device *dma_of = NULL;
585 (!strcmp(dp->parent->name, "espdma") ||
586 !strcmp(dp->parent->name, "dma")))
587 dma_node = dp->parent;
588 else if (!strcmp(dp->name, "SUNW,fas")) {
589 dma_node = sdev->ofdev.node;
593 dma_of = of_find_device_by_node(dma_node);
597 return esp_sbus_probe_one(&dev->dev, sdev, dma_of,
601 static int __devexit esp_sbus_remove(struct of_device *dev)
603 struct esp *esp = dev_get_drvdata(&dev->dev);
604 struct sbus_dev *sdev = esp->dev;
605 struct of_device *dma_of = esp->dma;
606 unsigned int irq = esp->host->irq;
609 scsi_esp_unregister(esp);
611 /* Disable interrupts. */
612 val = dma_read32(DMA_CSR);
613 dma_write32(val & ~DMA_INT_ENAB, DMA_CSR);
616 dma_free_coherent(&sdev->ofdev.dev, 16,
618 esp->command_block_dma);
619 sbus_iounmap(esp->regs, SBUS_ESP_REG_SIZE);
620 of_iounmap(&dma_of->resource[0], esp->dma_regs,
621 resource_size(&dma_of->resource[0]));
623 scsi_host_put(esp->host);
628 static struct of_device_id esp_match[] = {
640 MODULE_DEVICE_TABLE(of, esp_match);
642 static struct of_platform_driver esp_sbus_driver = {
644 .match_table = esp_match,
645 .probe = esp_sbus_probe,
646 .remove = __devexit_p(esp_sbus_remove),
649 static int __init sunesp_init(void)
651 return of_register_driver(&esp_sbus_driver, &sbus_bus_type);
654 static void __exit sunesp_exit(void)
656 of_unregister_driver(&esp_sbus_driver);
659 MODULE_DESCRIPTION("Sun ESP SCSI driver");
660 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
661 MODULE_LICENSE("GPL");
662 MODULE_VERSION(DRV_VERSION);
664 module_init(sunesp_init);
665 module_exit(sunesp_exit);