2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * A note about mapbase / membase
17 * mapbase is the physical address of the IO port.
18 * membase is an 'ioremapped' cookie.
21 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/ioport.h>
28 #include <linux/init.h>
29 #include <linux/console.h>
30 #include <linux/sysrq.h>
31 #include <linux/delay.h>
32 #include <linux/platform_device.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/serial_reg.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial.h>
38 #include <linux/serial_8250.h>
39 #include <linux/nmi.h>
40 #include <linux/mutex.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return (serial8250_reg.minor - 64) + port->line;
67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
73 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
75 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
79 #define DEBUG_INTR(fmt...) printk(fmt)
81 #define DEBUG_INTR(fmt...) do { } while (0)
84 #define PASS_LIMIT 256
86 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
90 * We default to IRQ0 for the "no irq" hack. Some
91 * machine types want others as well - they're free
92 * to redefine this in their header file.
94 #define is_real_interrupt(irq) ((irq) != 0)
96 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
97 #define CONFIG_SERIAL_DETECT_IRQ 1
99 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
100 #define CONFIG_SERIAL_MANY_PORTS 1
104 * HUB6 is always on. This will be removed once the header
105 * files have been cleaned.
107 #define CONFIG_HUB6 1
109 #include <asm/serial.h>
111 * SERIAL_PORT_DFNS tells us about built-in ports that have no
112 * standard enumeration mechanism. Platforms that can find all
113 * serial ports via mechanisms like ACPI or PCI need not supply it.
115 #ifndef SERIAL_PORT_DFNS
116 #define SERIAL_PORT_DFNS
119 static const struct old_serial_port old_serial_port[] = {
120 SERIAL_PORT_DFNS /* defined in asm/serial.h */
123 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
125 #ifdef CONFIG_SERIAL_8250_RSA
127 #define PORT_RSA_MAX 4
128 static unsigned long probe_rsa[PORT_RSA_MAX];
129 static unsigned int probe_rsa_count;
130 #endif /* CONFIG_SERIAL_8250_RSA */
132 struct uart_8250_port {
133 struct uart_port port;
134 struct timer_list timer; /* "no irq" timer */
135 struct list_head list; /* ports on this IRQ */
136 unsigned short capabilities; /* port capabilities */
137 unsigned short bugs; /* port bugs */
138 unsigned int tx_loadsz; /* transmit fifo load size */
143 unsigned char mcr_mask; /* mask of user bits */
144 unsigned char mcr_force; /* mask of forced bits */
145 unsigned char cur_iotype; /* Running I/O type */
148 * Some bits in registers are cleared on a read, so they must
149 * be saved whenever the register is read but the bits will not
150 * be immediately processed.
152 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
153 unsigned char lsr_saved_flags;
154 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
155 unsigned char msr_saved_flags;
158 * We provide a per-port pm hook.
160 void (*pm)(struct uart_port *port,
161 unsigned int state, unsigned int old);
165 struct hlist_node node;
167 spinlock_t lock; /* Protects list not the hash */
168 struct list_head *head;
171 #define NR_IRQ_HASH 32 /* Can be adjusted later */
172 static struct hlist_head irq_lists[NR_IRQ_HASH];
173 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
176 * Here we define the default xmit fifo size used for each type of UART.
178 static const struct serial8250_config uart_config[] = {
203 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
204 .flags = UART_CAP_FIFO,
215 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
221 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
223 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
229 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
231 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
239 .name = "16C950/954",
242 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
243 .flags = UART_CAP_FIFO,
249 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
251 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
257 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
258 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
264 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
265 .flags = UART_CAP_FIFO,
271 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
272 .flags = UART_CAP_FIFO | UART_NATSEMI,
278 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
279 .flags = UART_CAP_FIFO | UART_CAP_UUE,
285 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
286 .flags = UART_CAP_FIFO,
292 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
293 .flags = UART_CAP_FIFO,
299 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
300 .flags = UART_CAP_FIFO | UART_CAP_AFE,
304 #if defined (CONFIG_SERIAL_8250_AU1X00)
306 /* Au1x00 UART hardware has a weird register layout */
307 static const u8 au_io_in_map[] = {
317 static const u8 au_io_out_map[] = {
325 /* sane hardware needs no mapping */
326 static inline int map_8250_in_reg(struct uart_port *p, int offset)
328 if (p->iotype != UPIO_AU)
330 return au_io_in_map[offset];
333 static inline int map_8250_out_reg(struct uart_port *p, int offset)
335 if (p->iotype != UPIO_AU)
337 return au_io_out_map[offset];
340 #elif defined(CONFIG_SERIAL_8250_RM9K)
364 static inline int map_8250_in_reg(struct uart_port *p, int offset)
366 if (p->iotype != UPIO_RM9000)
368 return regmap_in[offset];
371 static inline int map_8250_out_reg(struct uart_port *p, int offset)
373 if (p->iotype != UPIO_RM9000)
375 return regmap_out[offset];
380 /* sane hardware needs no mapping */
381 #define map_8250_in_reg(up, offset) (offset)
382 #define map_8250_out_reg(up, offset) (offset)
386 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
388 offset = map_8250_in_reg(p, offset) << p->regshift;
389 outb(p->hub6 - 1 + offset, p->iobase);
390 return inb(p->iobase + 1);
393 static void hub6_serial_out(struct uart_port *p, int offset, int value)
395 offset = map_8250_out_reg(p, offset) << p->regshift;
396 outb(p->hub6 - 1 + offset, p->iobase);
397 outb(value, p->iobase + 1);
400 static unsigned int mem_serial_in(struct uart_port *p, int offset)
402 offset = map_8250_in_reg(p, offset) << p->regshift;
403 return readb(p->membase + offset);
406 static void mem_serial_out(struct uart_port *p, int offset, int value)
408 offset = map_8250_out_reg(p, offset) << p->regshift;
409 writeb(value, p->membase + offset);
412 static void mem32_serial_out(struct uart_port *p, int offset, int value)
414 offset = map_8250_out_reg(p, offset) << p->regshift;
415 writel(value, p->membase + offset);
418 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
420 offset = map_8250_in_reg(p, offset) << p->regshift;
421 return readl(p->membase + offset);
424 #ifdef CONFIG_SERIAL_8250_AU1X00
425 static unsigned int au_serial_in(struct uart_port *p, int offset)
427 offset = map_8250_in_reg(p, offset) << p->regshift;
428 return __raw_readl(p->membase + offset);
431 static void au_serial_out(struct uart_port *p, int offset, int value)
433 offset = map_8250_out_reg(p, offset) << p->regshift;
434 __raw_writel(value, p->membase + offset);
438 static unsigned int tsi_serial_in(struct uart_port *p, int offset)
441 offset = map_8250_in_reg(p, offset) << p->regshift;
442 if (offset == UART_IIR) {
443 tmp = readl(p->membase + (UART_IIR & ~3));
444 return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
446 return readb(p->membase + offset);
449 static void tsi_serial_out(struct uart_port *p, int offset, int value)
451 offset = map_8250_out_reg(p, offset) << p->regshift;
452 if (!((offset == UART_IER) && (value & UART_IER_UUE)))
453 writeb(value, p->membase + offset);
456 static void dwapb_serial_out(struct uart_port *p, int offset, int value)
458 int save_offset = offset;
459 offset = map_8250_out_reg(p, offset) << p->regshift;
460 /* Save the LCR value so it can be re-written when a
461 * Busy Detect interrupt occurs. */
462 if (save_offset == UART_LCR) {
463 struct uart_8250_port *up = (struct uart_8250_port *)p;
466 writeb(value, p->membase + offset);
467 /* Read the IER to ensure any interrupt is cleared before
468 * returning from ISR. */
469 if (save_offset == UART_TX || save_offset == UART_IER)
470 value = p->serial_in(p, UART_IER);
473 static unsigned int io_serial_in(struct uart_port *p, int offset)
475 offset = map_8250_in_reg(p, offset) << p->regshift;
476 return inb(p->iobase + offset);
479 static void io_serial_out(struct uart_port *p, int offset, int value)
481 offset = map_8250_out_reg(p, offset) << p->regshift;
482 outb(value, p->iobase + offset);
485 static void set_io_from_upio(struct uart_port *p)
487 struct uart_8250_port *up = (struct uart_8250_port *)p;
490 p->serial_in = hub6_serial_in;
491 p->serial_out = hub6_serial_out;
495 p->serial_in = mem_serial_in;
496 p->serial_out = mem_serial_out;
501 p->serial_in = mem32_serial_in;
502 p->serial_out = mem32_serial_out;
505 #ifdef CONFIG_SERIAL_8250_AU1X00
507 p->serial_in = au_serial_in;
508 p->serial_out = au_serial_out;
512 p->serial_in = tsi_serial_in;
513 p->serial_out = tsi_serial_out;
517 p->serial_in = mem_serial_in;
518 p->serial_out = dwapb_serial_out;
522 p->serial_in = io_serial_in;
523 p->serial_out = io_serial_out;
526 /* Remember loaded iotype */
527 up->cur_iotype = p->iotype;
531 serial_out_sync(struct uart_8250_port *up, int offset, int value)
533 struct uart_port *p = &up->port;
537 #ifdef CONFIG_SERIAL_8250_AU1X00
541 p->serial_out(p, offset, value);
542 p->serial_in(p, UART_LCR); /* safe, no side-effects */
545 p->serial_out(p, offset, value);
549 #define serial_in(up, offset) \
550 (up->port.serial_in(&(up)->port, (offset)))
551 #define serial_out(up, offset, value) \
552 (up->port.serial_out(&(up)->port, (offset), (value)))
554 * We used to support using pause I/O for certain machines. We
555 * haven't supported this for a while, but just in case it's badly
556 * needed for certain old 386 machines, I've left these #define's
559 #define serial_inp(up, offset) serial_in(up, offset)
560 #define serial_outp(up, offset, value) serial_out(up, offset, value)
562 /* Uart divisor latch read */
563 static inline int _serial_dl_read(struct uart_8250_port *up)
565 return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
568 /* Uart divisor latch write */
569 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
571 serial_outp(up, UART_DLL, value & 0xff);
572 serial_outp(up, UART_DLM, value >> 8 & 0xff);
575 #if defined(CONFIG_SERIAL_8250_AU1X00)
576 /* Au1x00 haven't got a standard divisor latch */
577 static int serial_dl_read(struct uart_8250_port *up)
579 if (up->port.iotype == UPIO_AU)
580 return __raw_readl(up->port.membase + 0x28);
582 return _serial_dl_read(up);
585 static void serial_dl_write(struct uart_8250_port *up, int value)
587 if (up->port.iotype == UPIO_AU)
588 __raw_writel(value, up->port.membase + 0x28);
590 _serial_dl_write(up, value);
592 #elif defined(CONFIG_SERIAL_8250_RM9K)
593 static int serial_dl_read(struct uart_8250_port *up)
595 return (up->port.iotype == UPIO_RM9000) ?
596 (((__raw_readl(up->port.membase + 0x10) << 8) |
597 (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
601 static void serial_dl_write(struct uart_8250_port *up, int value)
603 if (up->port.iotype == UPIO_RM9000) {
604 __raw_writel(value, up->port.membase + 0x08);
605 __raw_writel(value >> 8, up->port.membase + 0x10);
607 _serial_dl_write(up, value);
611 #define serial_dl_read(up) _serial_dl_read(up)
612 #define serial_dl_write(up, value) _serial_dl_write(up, value)
618 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
620 serial_out(up, UART_SCR, offset);
621 serial_out(up, UART_ICR, value);
624 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
628 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
629 serial_out(up, UART_SCR, offset);
630 value = serial_in(up, UART_ICR);
631 serial_icr_write(up, UART_ACR, up->acr);
639 static void serial8250_clear_fifos(struct uart_8250_port *p)
641 if (p->capabilities & UART_CAP_FIFO) {
642 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
643 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
644 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
645 serial_outp(p, UART_FCR, 0);
650 * IER sleep support. UARTs which have EFRs need the "extended
651 * capability" bit enabled. Note that on XR16C850s, we need to
652 * reset LCR to write to IER.
654 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
656 if (p->capabilities & UART_CAP_SLEEP) {
657 if (p->capabilities & UART_CAP_EFR) {
658 serial_outp(p, UART_LCR, 0xBF);
659 serial_outp(p, UART_EFR, UART_EFR_ECB);
660 serial_outp(p, UART_LCR, 0);
662 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
663 if (p->capabilities & UART_CAP_EFR) {
664 serial_outp(p, UART_LCR, 0xBF);
665 serial_outp(p, UART_EFR, 0);
666 serial_outp(p, UART_LCR, 0);
671 #ifdef CONFIG_SERIAL_8250_RSA
673 * Attempts to turn on the RSA FIFO. Returns zero on failure.
674 * We set the port uart clock rate if we succeed.
676 static int __enable_rsa(struct uart_8250_port *up)
681 mode = serial_inp(up, UART_RSA_MSR);
682 result = mode & UART_RSA_MSR_FIFO;
685 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
686 mode = serial_inp(up, UART_RSA_MSR);
687 result = mode & UART_RSA_MSR_FIFO;
691 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
696 static void enable_rsa(struct uart_8250_port *up)
698 if (up->port.type == PORT_RSA) {
699 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
700 spin_lock_irq(&up->port.lock);
702 spin_unlock_irq(&up->port.lock);
704 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
705 serial_outp(up, UART_RSA_FRR, 0);
710 * Attempts to turn off the RSA FIFO. Returns zero on failure.
711 * It is unknown why interrupts were disabled in here. However,
712 * the caller is expected to preserve this behaviour by grabbing
713 * the spinlock before calling this function.
715 static void disable_rsa(struct uart_8250_port *up)
720 if (up->port.type == PORT_RSA &&
721 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
722 spin_lock_irq(&up->port.lock);
724 mode = serial_inp(up, UART_RSA_MSR);
725 result = !(mode & UART_RSA_MSR_FIFO);
728 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
729 mode = serial_inp(up, UART_RSA_MSR);
730 result = !(mode & UART_RSA_MSR_FIFO);
734 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
735 spin_unlock_irq(&up->port.lock);
738 #endif /* CONFIG_SERIAL_8250_RSA */
741 * This is a quickie test to see how big the FIFO is.
742 * It doesn't work at all the time, more's the pity.
744 static int size_fifo(struct uart_8250_port *up)
746 unsigned char old_fcr, old_mcr, old_lcr;
747 unsigned short old_dl;
750 old_lcr = serial_inp(up, UART_LCR);
751 serial_outp(up, UART_LCR, 0);
752 old_fcr = serial_inp(up, UART_FCR);
753 old_mcr = serial_inp(up, UART_MCR);
754 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
755 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
756 serial_outp(up, UART_MCR, UART_MCR_LOOP);
757 serial_outp(up, UART_LCR, UART_LCR_DLAB);
758 old_dl = serial_dl_read(up);
759 serial_dl_write(up, 0x0001);
760 serial_outp(up, UART_LCR, 0x03);
761 for (count = 0; count < 256; count++)
762 serial_outp(up, UART_TX, count);
763 mdelay(20);/* FIXME - schedule_timeout */
764 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
765 (count < 256); count++)
766 serial_inp(up, UART_RX);
767 serial_outp(up, UART_FCR, old_fcr);
768 serial_outp(up, UART_MCR, old_mcr);
769 serial_outp(up, UART_LCR, UART_LCR_DLAB);
770 serial_dl_write(up, old_dl);
771 serial_outp(up, UART_LCR, old_lcr);
777 * Read UART ID using the divisor method - set DLL and DLM to zero
778 * and the revision will be in DLL and device type in DLM. We
779 * preserve the device state across this.
781 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
783 unsigned char old_dll, old_dlm, old_lcr;
786 old_lcr = serial_inp(p, UART_LCR);
787 serial_outp(p, UART_LCR, UART_LCR_DLAB);
789 old_dll = serial_inp(p, UART_DLL);
790 old_dlm = serial_inp(p, UART_DLM);
792 serial_outp(p, UART_DLL, 0);
793 serial_outp(p, UART_DLM, 0);
795 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
797 serial_outp(p, UART_DLL, old_dll);
798 serial_outp(p, UART_DLM, old_dlm);
799 serial_outp(p, UART_LCR, old_lcr);
805 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
806 * When this function is called we know it is at least a StarTech
807 * 16650 V2, but it might be one of several StarTech UARTs, or one of
808 * its clones. (We treat the broken original StarTech 16650 V1 as a
809 * 16550, and why not? Startech doesn't seem to even acknowledge its
812 * What evil have men's minds wrought...
814 static void autoconfig_has_efr(struct uart_8250_port *up)
816 unsigned int id1, id2, id3, rev;
819 * Everything with an EFR has SLEEP
821 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
824 * First we check to see if it's an Oxford Semiconductor UART.
826 * If we have to do this here because some non-National
827 * Semiconductor clone chips lock up if you try writing to the
828 * LSR register (which serial_icr_read does)
832 * Check for Oxford Semiconductor 16C950.
834 * EFR [4] must be set else this test fails.
836 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
837 * claims that it's needed for 952 dual UART's (which are not
838 * recommended for new designs).
841 serial_out(up, UART_LCR, 0xBF);
842 serial_out(up, UART_EFR, UART_EFR_ECB);
843 serial_out(up, UART_LCR, 0x00);
844 id1 = serial_icr_read(up, UART_ID1);
845 id2 = serial_icr_read(up, UART_ID2);
846 id3 = serial_icr_read(up, UART_ID3);
847 rev = serial_icr_read(up, UART_REV);
849 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
851 if (id1 == 0x16 && id2 == 0xC9 &&
852 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
853 up->port.type = PORT_16C950;
856 * Enable work around for the Oxford Semiconductor 952 rev B
857 * chip which causes it to seriously miscalculate baud rates
860 if (id3 == 0x52 && rev == 0x01)
861 up->bugs |= UART_BUG_QUOT;
866 * We check for a XR16C850 by setting DLL and DLM to 0, and then
867 * reading back DLL and DLM. The chip type depends on the DLM
869 * 0x10 - XR16C850 and the DLL contains the chip revision.
873 id1 = autoconfig_read_divisor_id(up);
874 DEBUG_AUTOCONF("850id=%04x ", id1);
877 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
878 up->port.type = PORT_16850;
883 * It wasn't an XR16C850.
885 * We distinguish between the '654 and the '650 by counting
886 * how many bytes are in the FIFO. I'm using this for now,
887 * since that's the technique that was sent to me in the
888 * serial driver update, but I'm not convinced this works.
889 * I've had problems doing this in the past. -TYT
891 if (size_fifo(up) == 64)
892 up->port.type = PORT_16654;
894 up->port.type = PORT_16650V2;
898 * We detected a chip without a FIFO. Only two fall into
899 * this category - the original 8250 and the 16450. The
900 * 16450 has a scratch register (accessible with LCR=0)
902 static void autoconfig_8250(struct uart_8250_port *up)
904 unsigned char scratch, status1, status2;
906 up->port.type = PORT_8250;
908 scratch = serial_in(up, UART_SCR);
909 serial_outp(up, UART_SCR, 0xa5);
910 status1 = serial_in(up, UART_SCR);
911 serial_outp(up, UART_SCR, 0x5a);
912 status2 = serial_in(up, UART_SCR);
913 serial_outp(up, UART_SCR, scratch);
915 if (status1 == 0xa5 && status2 == 0x5a)
916 up->port.type = PORT_16450;
919 static int broken_efr(struct uart_8250_port *up)
922 * Exar ST16C2550 "A2" devices incorrectly detect as
923 * having an EFR, and report an ID of 0x0201. See
924 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
926 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
933 * We know that the chip has FIFOs. Does it have an EFR? The
934 * EFR is located in the same register position as the IIR and
935 * we know the top two bits of the IIR are currently set. The
936 * EFR should contain zero. Try to read the EFR.
938 static void autoconfig_16550a(struct uart_8250_port *up)
940 unsigned char status1, status2;
941 unsigned int iersave;
943 up->port.type = PORT_16550A;
944 up->capabilities |= UART_CAP_FIFO;
947 * Check for presence of the EFR when DLAB is set.
948 * Only ST16C650V1 UARTs pass this test.
950 serial_outp(up, UART_LCR, UART_LCR_DLAB);
951 if (serial_in(up, UART_EFR) == 0) {
952 serial_outp(up, UART_EFR, 0xA8);
953 if (serial_in(up, UART_EFR) != 0) {
954 DEBUG_AUTOCONF("EFRv1 ");
955 up->port.type = PORT_16650;
956 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
958 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
960 serial_outp(up, UART_EFR, 0);
965 * Maybe it requires 0xbf to be written to the LCR.
966 * (other ST16C650V2 UARTs, TI16C752A, etc)
968 serial_outp(up, UART_LCR, 0xBF);
969 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
970 DEBUG_AUTOCONF("EFRv2 ");
971 autoconfig_has_efr(up);
976 * Check for a National Semiconductor SuperIO chip.
977 * Attempt to switch to bank 2, read the value of the LOOP bit
978 * from EXCR1. Switch back to bank 0, change it in MCR. Then
979 * switch back to bank 2, read it from EXCR1 again and check
980 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
982 serial_outp(up, UART_LCR, 0);
983 status1 = serial_in(up, UART_MCR);
984 serial_outp(up, UART_LCR, 0xE0);
985 status2 = serial_in(up, 0x02); /* EXCR1 */
987 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
988 serial_outp(up, UART_LCR, 0);
989 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
990 serial_outp(up, UART_LCR, 0xE0);
991 status2 = serial_in(up, 0x02); /* EXCR1 */
992 serial_outp(up, UART_LCR, 0);
993 serial_outp(up, UART_MCR, status1);
995 if ((status2 ^ status1) & UART_MCR_LOOP) {
998 serial_outp(up, UART_LCR, 0xE0);
1000 quot = serial_dl_read(up);
1003 status1 = serial_in(up, 0x04); /* EXCR2 */
1004 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
1005 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
1006 serial_outp(up, 0x04, status1);
1008 serial_dl_write(up, quot);
1010 serial_outp(up, UART_LCR, 0);
1012 up->port.uartclk = 921600*16;
1013 up->port.type = PORT_NS16550A;
1014 up->capabilities |= UART_NATSEMI;
1020 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1021 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1022 * Try setting it with and without DLAB set. Cheap clones
1023 * set bit 5 without DLAB set.
1025 serial_outp(up, UART_LCR, 0);
1026 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1027 status1 = serial_in(up, UART_IIR) >> 5;
1028 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1029 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1030 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1031 status2 = serial_in(up, UART_IIR) >> 5;
1032 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1033 serial_outp(up, UART_LCR, 0);
1035 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1037 if (status1 == 6 && status2 == 7) {
1038 up->port.type = PORT_16750;
1039 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1044 * Try writing and reading the UART_IER_UUE bit (b6).
1045 * If it works, this is probably one of the Xscale platform's
1047 * We're going to explicitly set the UUE bit to 0 before
1048 * trying to write and read a 1 just to make sure it's not
1049 * already a 1 and maybe locked there before we even start start.
1051 iersave = serial_in(up, UART_IER);
1052 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
1053 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1055 * OK it's in a known zero state, try writing and reading
1056 * without disturbing the current state of the other bits.
1058 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
1059 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1062 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1064 DEBUG_AUTOCONF("Xscale ");
1065 up->port.type = PORT_XSCALE;
1066 up->capabilities |= UART_CAP_UUE;
1071 * If we got here we couldn't force the IER_UUE bit to 0.
1072 * Log it and continue.
1074 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1076 serial_outp(up, UART_IER, iersave);
1080 * This routine is called by rs_init() to initialize a specific serial
1081 * port. It determines what type of UART chip this serial port is
1082 * using: 8250, 16450, 16550, 16550A. The important question is
1083 * whether or not this UART is a 16550A or not, since this will
1084 * determine whether or not we can use its FIFO features or not.
1086 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1088 unsigned char status1, scratch, scratch2, scratch3;
1089 unsigned char save_lcr, save_mcr;
1090 unsigned long flags;
1092 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
1095 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1096 serial_index(&up->port), up->port.iobase, up->port.membase);
1099 * We really do need global IRQs disabled here - we're going to
1100 * be frobbing the chips IRQ enable register to see if it exists.
1102 spin_lock_irqsave(&up->port.lock, flags);
1104 up->capabilities = 0;
1107 if (!(up->port.flags & UPF_BUGGY_UART)) {
1109 * Do a simple existence test first; if we fail this,
1110 * there's no point trying anything else.
1112 * 0x80 is used as a nonsense port to prevent against
1113 * false positives due to ISA bus float. The
1114 * assumption is that 0x80 is a non-existent port;
1115 * which should be safe since include/asm/io.h also
1116 * makes this assumption.
1118 * Note: this is safe as long as MCR bit 4 is clear
1119 * and the device is in "PC" mode.
1121 scratch = serial_inp(up, UART_IER);
1122 serial_outp(up, UART_IER, 0);
1127 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1128 * 16C754B) allow only to modify them if an EFR bit is set.
1130 scratch2 = serial_inp(up, UART_IER) & 0x0f;
1131 serial_outp(up, UART_IER, 0x0F);
1135 scratch3 = serial_inp(up, UART_IER) & 0x0f;
1136 serial_outp(up, UART_IER, scratch);
1137 if (scratch2 != 0 || scratch3 != 0x0F) {
1139 * We failed; there's nothing here
1141 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1142 scratch2, scratch3);
1147 save_mcr = serial_in(up, UART_MCR);
1148 save_lcr = serial_in(up, UART_LCR);
1151 * Check to see if a UART is really there. Certain broken
1152 * internal modems based on the Rockwell chipset fail this
1153 * test, because they apparently don't implement the loopback
1154 * test mode. So this test is skipped on the COM 1 through
1155 * COM 4 ports. This *should* be safe, since no board
1156 * manufacturer would be stupid enough to design a board
1157 * that conflicts with COM 1-4 --- we hope!
1159 if (!(up->port.flags & UPF_SKIP_TEST)) {
1160 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1161 status1 = serial_inp(up, UART_MSR) & 0xF0;
1162 serial_outp(up, UART_MCR, save_mcr);
1163 if (status1 != 0x90) {
1164 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1171 * We're pretty sure there's a port here. Lets find out what
1172 * type of port it is. The IIR top two bits allows us to find
1173 * out if it's 8250 or 16450, 16550, 16550A or later. This
1174 * determines what we test for next.
1176 * We also initialise the EFR (if any) to zero for later. The
1177 * EFR occupies the same register location as the FCR and IIR.
1179 serial_outp(up, UART_LCR, 0xBF);
1180 serial_outp(up, UART_EFR, 0);
1181 serial_outp(up, UART_LCR, 0);
1183 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1184 scratch = serial_in(up, UART_IIR) >> 6;
1186 DEBUG_AUTOCONF("iir=%d ", scratch);
1190 autoconfig_8250(up);
1193 up->port.type = PORT_UNKNOWN;
1196 up->port.type = PORT_16550;
1199 autoconfig_16550a(up);
1203 #ifdef CONFIG_SERIAL_8250_RSA
1205 * Only probe for RSA ports if we got the region.
1207 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
1210 for (i = 0 ; i < probe_rsa_count; ++i) {
1211 if (probe_rsa[i] == up->port.iobase &&
1213 up->port.type = PORT_RSA;
1220 serial_outp(up, UART_LCR, save_lcr);
1222 if (up->capabilities != uart_config[up->port.type].flags) {
1224 "ttyS%d: detected caps %08x should be %08x\n",
1225 serial_index(&up->port), up->capabilities,
1226 uart_config[up->port.type].flags);
1229 up->port.fifosize = uart_config[up->port.type].fifo_size;
1230 up->capabilities = uart_config[up->port.type].flags;
1231 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1233 if (up->port.type == PORT_UNKNOWN)
1239 #ifdef CONFIG_SERIAL_8250_RSA
1240 if (up->port.type == PORT_RSA)
1241 serial_outp(up, UART_RSA_FRR, 0);
1243 serial_outp(up, UART_MCR, save_mcr);
1244 serial8250_clear_fifos(up);
1245 serial_in(up, UART_RX);
1246 if (up->capabilities & UART_CAP_UUE)
1247 serial_outp(up, UART_IER, UART_IER_UUE);
1249 serial_outp(up, UART_IER, 0);
1252 spin_unlock_irqrestore(&up->port.lock, flags);
1253 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
1256 static void autoconfig_irq(struct uart_8250_port *up)
1258 unsigned char save_mcr, save_ier;
1259 unsigned char save_ICP = 0;
1260 unsigned int ICP = 0;
1264 if (up->port.flags & UPF_FOURPORT) {
1265 ICP = (up->port.iobase & 0xfe0) | 0x1f;
1266 save_ICP = inb_p(ICP);
1271 /* forget possible initially masked and pending IRQ */
1272 probe_irq_off(probe_irq_on());
1273 save_mcr = serial_inp(up, UART_MCR);
1274 save_ier = serial_inp(up, UART_IER);
1275 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1277 irqs = probe_irq_on();
1278 serial_outp(up, UART_MCR, 0);
1280 if (up->port.flags & UPF_FOURPORT) {
1281 serial_outp(up, UART_MCR,
1282 UART_MCR_DTR | UART_MCR_RTS);
1284 serial_outp(up, UART_MCR,
1285 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1287 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
1288 (void)serial_inp(up, UART_LSR);
1289 (void)serial_inp(up, UART_RX);
1290 (void)serial_inp(up, UART_IIR);
1291 (void)serial_inp(up, UART_MSR);
1292 serial_outp(up, UART_TX, 0xFF);
1294 irq = probe_irq_off(irqs);
1296 serial_outp(up, UART_MCR, save_mcr);
1297 serial_outp(up, UART_IER, save_ier);
1299 if (up->port.flags & UPF_FOURPORT)
1300 outb_p(save_ICP, ICP);
1302 up->port.irq = (irq > 0) ? irq : 0;
1305 static inline void __stop_tx(struct uart_8250_port *p)
1307 if (p->ier & UART_IER_THRI) {
1308 p->ier &= ~UART_IER_THRI;
1309 serial_out(p, UART_IER, p->ier);
1313 static void serial8250_stop_tx(struct uart_port *port)
1315 struct uart_8250_port *up = (struct uart_8250_port *)port;
1320 * We really want to stop the transmitter from sending.
1322 if (up->port.type == PORT_16C950) {
1323 up->acr |= UART_ACR_TXDIS;
1324 serial_icr_write(up, UART_ACR, up->acr);
1328 static void transmit_chars(struct uart_8250_port *up);
1330 static void serial8250_start_tx(struct uart_port *port)
1332 struct uart_8250_port *up = (struct uart_8250_port *)port;
1334 if (!(up->ier & UART_IER_THRI)) {
1335 up->ier |= UART_IER_THRI;
1336 serial_out(up, UART_IER, up->ier);
1338 if (up->bugs & UART_BUG_TXEN) {
1340 lsr = serial_in(up, UART_LSR);
1341 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1342 if ((up->port.type == PORT_RM9000) ?
1343 (lsr & UART_LSR_THRE) :
1344 (lsr & UART_LSR_TEMT))
1350 * Re-enable the transmitter if we disabled it.
1352 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1353 up->acr &= ~UART_ACR_TXDIS;
1354 serial_icr_write(up, UART_ACR, up->acr);
1358 static void serial8250_stop_rx(struct uart_port *port)
1360 struct uart_8250_port *up = (struct uart_8250_port *)port;
1362 up->ier &= ~UART_IER_RLSI;
1363 up->port.read_status_mask &= ~UART_LSR_DR;
1364 serial_out(up, UART_IER, up->ier);
1367 static void serial8250_enable_ms(struct uart_port *port)
1369 struct uart_8250_port *up = (struct uart_8250_port *)port;
1371 /* no MSR capabilities */
1372 if (up->bugs & UART_BUG_NOMSR)
1375 up->ier |= UART_IER_MSI;
1376 serial_out(up, UART_IER, up->ier);
1380 receive_chars(struct uart_8250_port *up, unsigned int *status)
1382 struct tty_struct *tty = up->port.state->port.tty;
1383 unsigned char ch, lsr = *status;
1384 int max_count = 256;
1388 if (likely(lsr & UART_LSR_DR))
1389 ch = serial_inp(up, UART_RX);
1392 * Intel 82571 has a Serial Over Lan device that will
1393 * set UART_LSR_BI without setting UART_LSR_DR when
1394 * it receives a break. To avoid reading from the
1395 * receive buffer without UART_LSR_DR bit set, we
1396 * just force the read character to be 0
1401 up->port.icount.rx++;
1403 lsr |= up->lsr_saved_flags;
1404 up->lsr_saved_flags = 0;
1406 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1408 * For statistics only
1410 if (lsr & UART_LSR_BI) {
1411 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1412 up->port.icount.brk++;
1414 * We do the SysRQ and SAK checking
1415 * here because otherwise the break
1416 * may get masked by ignore_status_mask
1417 * or read_status_mask.
1419 if (uart_handle_break(&up->port))
1421 } else if (lsr & UART_LSR_PE)
1422 up->port.icount.parity++;
1423 else if (lsr & UART_LSR_FE)
1424 up->port.icount.frame++;
1425 if (lsr & UART_LSR_OE)
1426 up->port.icount.overrun++;
1429 * Mask off conditions which should be ignored.
1431 lsr &= up->port.read_status_mask;
1433 if (lsr & UART_LSR_BI) {
1434 DEBUG_INTR("handling break....");
1436 } else if (lsr & UART_LSR_PE)
1438 else if (lsr & UART_LSR_FE)
1441 if (uart_handle_sysrq_char(&up->port, ch))
1444 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1447 lsr = serial_inp(up, UART_LSR);
1448 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1449 spin_unlock(&up->port.lock);
1450 tty_flip_buffer_push(tty);
1451 spin_lock(&up->port.lock);
1455 static void transmit_chars(struct uart_8250_port *up)
1457 struct circ_buf *xmit = &up->port.state->xmit;
1460 if (up->port.x_char) {
1461 serial_outp(up, UART_TX, up->port.x_char);
1462 up->port.icount.tx++;
1463 up->port.x_char = 0;
1466 if (uart_tx_stopped(&up->port)) {
1467 serial8250_stop_tx(&up->port);
1470 if (uart_circ_empty(xmit)) {
1475 count = up->tx_loadsz;
1477 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1478 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1479 up->port.icount.tx++;
1480 if (uart_circ_empty(xmit))
1482 } while (--count > 0);
1484 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1485 uart_write_wakeup(&up->port);
1487 DEBUG_INTR("THRE...");
1489 if (uart_circ_empty(xmit))
1493 static unsigned int check_modem_status(struct uart_8250_port *up)
1495 unsigned int status = serial_in(up, UART_MSR);
1497 status |= up->msr_saved_flags;
1498 up->msr_saved_flags = 0;
1499 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1500 up->port.state != NULL) {
1501 if (status & UART_MSR_TERI)
1502 up->port.icount.rng++;
1503 if (status & UART_MSR_DDSR)
1504 up->port.icount.dsr++;
1505 if (status & UART_MSR_DDCD)
1506 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1507 if (status & UART_MSR_DCTS)
1508 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1510 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
1517 * This handles the interrupt from one port.
1519 static void serial8250_handle_port(struct uart_8250_port *up)
1521 unsigned int status;
1522 unsigned long flags;
1524 spin_lock_irqsave(&up->port.lock, flags);
1526 status = serial_inp(up, UART_LSR);
1528 DEBUG_INTR("status = %x...", status);
1530 if (status & (UART_LSR_DR | UART_LSR_BI))
1531 receive_chars(up, &status);
1532 check_modem_status(up);
1533 if (status & UART_LSR_THRE)
1536 spin_unlock_irqrestore(&up->port.lock, flags);
1540 * This is the serial driver's interrupt routine.
1542 * Arjan thinks the old way was overly complex, so it got simplified.
1543 * Alan disagrees, saying that need the complexity to handle the weird
1544 * nature of ISA shared interrupts. (This is a special exception.)
1546 * In order to handle ISA shared interrupts properly, we need to check
1547 * that all ports have been serviced, and therefore the ISA interrupt
1548 * line has been de-asserted.
1550 * This means we need to loop through all ports. checking that they
1551 * don't have an interrupt pending.
1553 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1555 struct irq_info *i = dev_id;
1556 struct list_head *l, *end = NULL;
1557 int pass_counter = 0, handled = 0;
1559 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1561 spin_lock(&i->lock);
1565 struct uart_8250_port *up;
1568 up = list_entry(l, struct uart_8250_port, list);
1570 iir = serial_in(up, UART_IIR);
1571 if (!(iir & UART_IIR_NO_INT)) {
1572 serial8250_handle_port(up);
1577 } else if (up->port.iotype == UPIO_DWAPB &&
1578 (iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
1579 /* The DesignWare APB UART has an Busy Detect (0x07)
1580 * interrupt meaning an LCR write attempt occured while the
1581 * UART was busy. The interrupt must be cleared by reading
1582 * the UART status register (USR) and the LCR re-written. */
1583 unsigned int status;
1584 status = *(volatile u32 *)up->port.private_data;
1585 serial_out(up, UART_LCR, up->lcr);
1590 } else if (end == NULL)
1595 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1596 /* If we hit this, we're dead. */
1597 printk(KERN_ERR "serial8250: too much work for "
1603 spin_unlock(&i->lock);
1605 DEBUG_INTR("end.\n");
1607 return IRQ_RETVAL(handled);
1611 * To support ISA shared interrupts, we need to have one interrupt
1612 * handler that ensures that the IRQ line has been deasserted
1613 * before returning. Failing to do this will result in the IRQ
1614 * line being stuck active, and, since ISA irqs are edge triggered,
1615 * no more IRQs will be seen.
1617 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1619 spin_lock_irq(&i->lock);
1621 if (!list_empty(i->head)) {
1622 if (i->head == &up->list)
1623 i->head = i->head->next;
1624 list_del(&up->list);
1626 BUG_ON(i->head != &up->list);
1629 spin_unlock_irq(&i->lock);
1630 /* List empty so throw away the hash node */
1631 if (i->head == NULL) {
1632 hlist_del(&i->node);
1637 static int serial_link_irq_chain(struct uart_8250_port *up)
1639 struct hlist_head *h;
1640 struct hlist_node *n;
1642 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1644 mutex_lock(&hash_mutex);
1646 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1648 hlist_for_each(n, h) {
1649 i = hlist_entry(n, struct irq_info, node);
1650 if (i->irq == up->port.irq)
1655 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1657 mutex_unlock(&hash_mutex);
1660 spin_lock_init(&i->lock);
1661 i->irq = up->port.irq;
1662 hlist_add_head(&i->node, h);
1664 mutex_unlock(&hash_mutex);
1666 spin_lock_irq(&i->lock);
1669 list_add(&up->list, i->head);
1670 spin_unlock_irq(&i->lock);
1674 INIT_LIST_HEAD(&up->list);
1675 i->head = &up->list;
1676 spin_unlock_irq(&i->lock);
1677 irq_flags |= up->port.irqflags;
1678 ret = request_irq(up->port.irq, serial8250_interrupt,
1679 irq_flags, "serial", i);
1681 serial_do_unlink(i, up);
1687 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1690 struct hlist_node *n;
1691 struct hlist_head *h;
1693 mutex_lock(&hash_mutex);
1695 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1697 hlist_for_each(n, h) {
1698 i = hlist_entry(n, struct irq_info, node);
1699 if (i->irq == up->port.irq)
1704 BUG_ON(i->head == NULL);
1706 if (list_empty(i->head))
1707 free_irq(up->port.irq, i);
1709 serial_do_unlink(i, up);
1710 mutex_unlock(&hash_mutex);
1713 /* Base timer interval for polling */
1714 static inline int poll_timeout(int timeout)
1716 return timeout > 6 ? (timeout / 2 - 2) : 1;
1720 * This function is used to handle ports that do not have an
1721 * interrupt. This doesn't work very well for 16450's, but gives
1722 * barely passable results for a 16550A. (Although at the expense
1723 * of much CPU overhead).
1725 static void serial8250_timeout(unsigned long data)
1727 struct uart_8250_port *up = (struct uart_8250_port *)data;
1730 iir = serial_in(up, UART_IIR);
1731 if (!(iir & UART_IIR_NO_INT))
1732 serial8250_handle_port(up);
1733 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
1736 static void serial8250_backup_timeout(unsigned long data)
1738 struct uart_8250_port *up = (struct uart_8250_port *)data;
1739 unsigned int iir, ier = 0, lsr;
1740 unsigned long flags;
1743 * Must disable interrupts or else we risk racing with the interrupt
1746 if (is_real_interrupt(up->port.irq)) {
1747 ier = serial_in(up, UART_IER);
1748 serial_out(up, UART_IER, 0);
1751 iir = serial_in(up, UART_IIR);
1754 * This should be a safe test for anyone who doesn't trust the
1755 * IIR bits on their UART, but it's specifically designed for
1756 * the "Diva" UART used on the management processor on many HP
1757 * ia64 and parisc boxes.
1759 spin_lock_irqsave(&up->port.lock, flags);
1760 lsr = serial_in(up, UART_LSR);
1761 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1762 spin_unlock_irqrestore(&up->port.lock, flags);
1763 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1764 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1765 (lsr & UART_LSR_THRE)) {
1766 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1767 iir |= UART_IIR_THRI;
1770 if (!(iir & UART_IIR_NO_INT))
1771 serial8250_handle_port(up);
1773 if (is_real_interrupt(up->port.irq))
1774 serial_out(up, UART_IER, ier);
1776 /* Standard timer interval plus 0.2s to keep the port running */
1777 mod_timer(&up->timer,
1778 jiffies + poll_timeout(up->port.timeout) + HZ / 5);
1781 static unsigned int serial8250_tx_empty(struct uart_port *port)
1783 struct uart_8250_port *up = (struct uart_8250_port *)port;
1784 unsigned long flags;
1787 spin_lock_irqsave(&up->port.lock, flags);
1788 lsr = serial_in(up, UART_LSR);
1789 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1790 spin_unlock_irqrestore(&up->port.lock, flags);
1792 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1795 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1797 struct uart_8250_port *up = (struct uart_8250_port *)port;
1798 unsigned int status;
1801 status = check_modem_status(up);
1804 if (status & UART_MSR_DCD)
1806 if (status & UART_MSR_RI)
1808 if (status & UART_MSR_DSR)
1810 if (status & UART_MSR_CTS)
1815 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1817 struct uart_8250_port *up = (struct uart_8250_port *)port;
1818 unsigned char mcr = 0;
1820 if (mctrl & TIOCM_RTS)
1821 mcr |= UART_MCR_RTS;
1822 if (mctrl & TIOCM_DTR)
1823 mcr |= UART_MCR_DTR;
1824 if (mctrl & TIOCM_OUT1)
1825 mcr |= UART_MCR_OUT1;
1826 if (mctrl & TIOCM_OUT2)
1827 mcr |= UART_MCR_OUT2;
1828 if (mctrl & TIOCM_LOOP)
1829 mcr |= UART_MCR_LOOP;
1831 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1833 serial_out(up, UART_MCR, mcr);
1836 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1838 struct uart_8250_port *up = (struct uart_8250_port *)port;
1839 unsigned long flags;
1841 spin_lock_irqsave(&up->port.lock, flags);
1842 if (break_state == -1)
1843 up->lcr |= UART_LCR_SBC;
1845 up->lcr &= ~UART_LCR_SBC;
1846 serial_out(up, UART_LCR, up->lcr);
1847 spin_unlock_irqrestore(&up->port.lock, flags);
1851 * Wait for transmitter & holding register to empty
1853 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1855 unsigned int status, tmout = 10000;
1857 /* Wait up to 10ms for the character(s) to be sent. */
1859 status = serial_in(up, UART_LSR);
1861 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1866 } while ((status & bits) != bits);
1868 /* Wait up to 1s for flow control if necessary */
1869 if (up->port.flags & UPF_CONS_FLOW) {
1871 for (tmout = 1000000; tmout; tmout--) {
1872 unsigned int msr = serial_in(up, UART_MSR);
1873 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1874 if (msr & UART_MSR_CTS)
1877 touch_nmi_watchdog();
1882 #ifdef CONFIG_CONSOLE_POLL
1884 * Console polling routines for writing and reading from the uart while
1885 * in an interrupt or debug context.
1888 static int serial8250_get_poll_char(struct uart_port *port)
1890 struct uart_8250_port *up = (struct uart_8250_port *)port;
1891 unsigned char lsr = serial_inp(up, UART_LSR);
1893 while (!(lsr & UART_LSR_DR))
1894 lsr = serial_inp(up, UART_LSR);
1896 return serial_inp(up, UART_RX);
1900 static void serial8250_put_poll_char(struct uart_port *port,
1904 struct uart_8250_port *up = (struct uart_8250_port *)port;
1907 * First save the IER then disable the interrupts
1909 ier = serial_in(up, UART_IER);
1910 if (up->capabilities & UART_CAP_UUE)
1911 serial_out(up, UART_IER, UART_IER_UUE);
1913 serial_out(up, UART_IER, 0);
1915 wait_for_xmitr(up, BOTH_EMPTY);
1917 * Send the character out.
1918 * If a LF, also do CR...
1920 serial_out(up, UART_TX, c);
1922 wait_for_xmitr(up, BOTH_EMPTY);
1923 serial_out(up, UART_TX, 13);
1927 * Finally, wait for transmitter to become empty
1928 * and restore the IER
1930 wait_for_xmitr(up, BOTH_EMPTY);
1931 serial_out(up, UART_IER, ier);
1934 #endif /* CONFIG_CONSOLE_POLL */
1936 static int serial8250_startup(struct uart_port *port)
1938 struct uart_8250_port *up = (struct uart_8250_port *)port;
1939 unsigned long flags;
1940 unsigned char lsr, iir;
1943 up->capabilities = uart_config[up->port.type].flags;
1946 if (up->port.iotype != up->cur_iotype)
1947 set_io_from_upio(port);
1949 if (up->port.type == PORT_16C950) {
1950 /* Wake up and initialize UART */
1952 serial_outp(up, UART_LCR, 0xBF);
1953 serial_outp(up, UART_EFR, UART_EFR_ECB);
1954 serial_outp(up, UART_IER, 0);
1955 serial_outp(up, UART_LCR, 0);
1956 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1957 serial_outp(up, UART_LCR, 0xBF);
1958 serial_outp(up, UART_EFR, UART_EFR_ECB);
1959 serial_outp(up, UART_LCR, 0);
1962 #ifdef CONFIG_SERIAL_8250_RSA
1964 * If this is an RSA port, see if we can kick it up to the
1965 * higher speed clock.
1971 * Clear the FIFO buffers and disable them.
1972 * (they will be reenabled in set_termios())
1974 serial8250_clear_fifos(up);
1977 * Clear the interrupt registers.
1979 (void) serial_inp(up, UART_LSR);
1980 (void) serial_inp(up, UART_RX);
1981 (void) serial_inp(up, UART_IIR);
1982 (void) serial_inp(up, UART_MSR);
1985 * At this point, there's no way the LSR could still be 0xff;
1986 * if it is, then bail out, because there's likely no UART
1989 if (!(up->port.flags & UPF_BUGGY_UART) &&
1990 (serial_inp(up, UART_LSR) == 0xff)) {
1991 printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
1992 serial_index(&up->port));
1997 * For a XR16C850, we need to set the trigger levels
1999 if (up->port.type == PORT_16850) {
2002 serial_outp(up, UART_LCR, 0xbf);
2004 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2005 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2006 serial_outp(up, UART_TRG, UART_TRG_96);
2007 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2008 serial_outp(up, UART_TRG, UART_TRG_96);
2010 serial_outp(up, UART_LCR, 0);
2013 if (is_real_interrupt(up->port.irq)) {
2016 * Test for UARTs that do not reassert THRE when the
2017 * transmitter is idle and the interrupt has already
2018 * been cleared. Real 16550s should always reassert
2019 * this interrupt whenever the transmitter is idle and
2020 * the interrupt is enabled. Delays are necessary to
2021 * allow register changes to become visible.
2023 spin_lock_irqsave(&up->port.lock, flags);
2024 if (up->port.irqflags & IRQF_SHARED)
2025 disable_irq_nosync(up->port.irq);
2027 wait_for_xmitr(up, UART_LSR_THRE);
2028 serial_out_sync(up, UART_IER, UART_IER_THRI);
2029 udelay(1); /* allow THRE to set */
2030 iir1 = serial_in(up, UART_IIR);
2031 serial_out(up, UART_IER, 0);
2032 serial_out_sync(up, UART_IER, UART_IER_THRI);
2033 udelay(1); /* allow a working UART time to re-assert THRE */
2034 iir = serial_in(up, UART_IIR);
2035 serial_out(up, UART_IER, 0);
2037 if (up->port.irqflags & IRQF_SHARED)
2038 enable_irq(up->port.irq);
2039 spin_unlock_irqrestore(&up->port.lock, flags);
2042 * If the interrupt is not reasserted, setup a timer to
2043 * kick the UART on a regular basis.
2045 if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
2046 up->bugs |= UART_BUG_THRE;
2047 pr_debug("ttyS%d - using backup timer\n",
2048 serial_index(port));
2053 * The above check will only give an accurate result the first time
2054 * the port is opened so this value needs to be preserved.
2056 if (up->bugs & UART_BUG_THRE) {
2057 up->timer.function = serial8250_backup_timeout;
2058 up->timer.data = (unsigned long)up;
2059 mod_timer(&up->timer, jiffies +
2060 poll_timeout(up->port.timeout) + HZ / 5);
2064 * If the "interrupt" for this port doesn't correspond with any
2065 * hardware interrupt, we use a timer-based system. The original
2066 * driver used to do this with IRQ0.
2068 if (!is_real_interrupt(up->port.irq)) {
2069 up->timer.data = (unsigned long)up;
2070 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
2072 retval = serial_link_irq_chain(up);
2078 * Now, initialize the UART
2080 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
2082 spin_lock_irqsave(&up->port.lock, flags);
2083 if (up->port.flags & UPF_FOURPORT) {
2084 if (!is_real_interrupt(up->port.irq))
2085 up->port.mctrl |= TIOCM_OUT1;
2088 * Most PC uarts need OUT2 raised to enable interrupts.
2090 if (is_real_interrupt(up->port.irq))
2091 up->port.mctrl |= TIOCM_OUT2;
2093 serial8250_set_mctrl(&up->port, up->port.mctrl);
2095 /* Serial over Lan (SoL) hack:
2096 Intel 8257x Gigabit ethernet chips have a
2097 16550 emulation, to be used for Serial Over Lan.
2098 Those chips take a longer time than a normal
2099 serial device to signalize that a transmission
2100 data was queued. Due to that, the above test generally
2101 fails. One solution would be to delay the reading of
2102 iir. However, this is not reliable, since the timeout
2103 is variable. So, let's just don't test if we receive
2104 TX irq. This way, we'll never enable UART_BUG_TXEN.
2106 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2107 goto dont_test_tx_en;
2110 * Do a quick test to see if we receive an
2111 * interrupt when we enable the TX irq.
2113 serial_outp(up, UART_IER, UART_IER_THRI);
2114 lsr = serial_in(up, UART_LSR);
2115 iir = serial_in(up, UART_IIR);
2116 serial_outp(up, UART_IER, 0);
2118 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2119 if (!(up->bugs & UART_BUG_TXEN)) {
2120 up->bugs |= UART_BUG_TXEN;
2121 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2122 serial_index(port));
2125 up->bugs &= ~UART_BUG_TXEN;
2129 spin_unlock_irqrestore(&up->port.lock, flags);
2132 * Clear the interrupt registers again for luck, and clear the
2133 * saved flags to avoid getting false values from polling
2134 * routines or the previous session.
2136 serial_inp(up, UART_LSR);
2137 serial_inp(up, UART_RX);
2138 serial_inp(up, UART_IIR);
2139 serial_inp(up, UART_MSR);
2140 up->lsr_saved_flags = 0;
2141 up->msr_saved_flags = 0;
2144 * Finally, enable interrupts. Note: Modem status interrupts
2145 * are set via set_termios(), which will be occurring imminently
2146 * anyway, so we don't enable them here.
2148 up->ier = UART_IER_RLSI | UART_IER_RDI;
2149 serial_outp(up, UART_IER, up->ier);
2151 if (up->port.flags & UPF_FOURPORT) {
2154 * Enable interrupts on the AST Fourport board
2156 icp = (up->port.iobase & 0xfe0) | 0x01f;
2164 static void serial8250_shutdown(struct uart_port *port)
2166 struct uart_8250_port *up = (struct uart_8250_port *)port;
2167 unsigned long flags;
2170 * Disable interrupts from this port
2173 serial_outp(up, UART_IER, 0);
2175 spin_lock_irqsave(&up->port.lock, flags);
2176 if (up->port.flags & UPF_FOURPORT) {
2177 /* reset interrupts on the AST Fourport board */
2178 inb((up->port.iobase & 0xfe0) | 0x1f);
2179 up->port.mctrl |= TIOCM_OUT1;
2181 up->port.mctrl &= ~TIOCM_OUT2;
2183 serial8250_set_mctrl(&up->port, up->port.mctrl);
2184 spin_unlock_irqrestore(&up->port.lock, flags);
2187 * Disable break condition and FIFOs
2189 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
2190 serial8250_clear_fifos(up);
2192 #ifdef CONFIG_SERIAL_8250_RSA
2194 * Reset the RSA board back to 115kbps compat mode.
2200 * Read data port to reset things, and then unlink from
2203 (void) serial_in(up, UART_RX);
2205 del_timer_sync(&up->timer);
2206 up->timer.function = serial8250_timeout;
2207 if (is_real_interrupt(up->port.irq))
2208 serial_unlink_irq_chain(up);
2211 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2216 * Handle magic divisors for baud rates above baud_base on
2217 * SMSC SuperIO chips.
2219 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2220 baud == (port->uartclk/4))
2222 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2223 baud == (port->uartclk/8))
2226 quot = uart_get_divisor(port, baud);
2232 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2233 struct ktermios *old)
2235 struct uart_8250_port *up = (struct uart_8250_port *)port;
2236 unsigned char cval, fcr = 0;
2237 unsigned long flags;
2238 unsigned int baud, quot;
2240 switch (termios->c_cflag & CSIZE) {
2242 cval = UART_LCR_WLEN5;
2245 cval = UART_LCR_WLEN6;
2248 cval = UART_LCR_WLEN7;
2252 cval = UART_LCR_WLEN8;
2256 if (termios->c_cflag & CSTOPB)
2257 cval |= UART_LCR_STOP;
2258 if (termios->c_cflag & PARENB)
2259 cval |= UART_LCR_PARITY;
2260 if (!(termios->c_cflag & PARODD))
2261 cval |= UART_LCR_EPAR;
2263 if (termios->c_cflag & CMSPAR)
2264 cval |= UART_LCR_SPAR;
2268 * Ask the core to calculate the divisor for us.
2270 baud = uart_get_baud_rate(port, termios, old,
2271 port->uartclk / 16 / 0xffff,
2272 port->uartclk / 16);
2273 quot = serial8250_get_divisor(port, baud);
2276 * Oxford Semi 952 rev B workaround
2278 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2281 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
2283 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
2285 fcr = uart_config[up->port.type].fcr;
2289 * MCR-based auto flow control. When AFE is enabled, RTS will be
2290 * deasserted when the receive FIFO contains more characters than
2291 * the trigger, or the MCR RTS bit is cleared. In the case where
2292 * the remote UART is not using CTS auto flow control, we must
2293 * have sufficient FIFO entries for the latency of the remote
2294 * UART to respond. IOW, at least 32 bytes of FIFO.
2296 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
2297 up->mcr &= ~UART_MCR_AFE;
2298 if (termios->c_cflag & CRTSCTS)
2299 up->mcr |= UART_MCR_AFE;
2303 * Ok, we're now changing the port state. Do it with
2304 * interrupts disabled.
2306 spin_lock_irqsave(&up->port.lock, flags);
2309 * Update the per-port timeout.
2311 uart_update_timeout(port, termios->c_cflag, baud);
2313 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2314 if (termios->c_iflag & INPCK)
2315 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2316 if (termios->c_iflag & (BRKINT | PARMRK))
2317 up->port.read_status_mask |= UART_LSR_BI;
2320 * Characteres to ignore
2322 up->port.ignore_status_mask = 0;
2323 if (termios->c_iflag & IGNPAR)
2324 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2325 if (termios->c_iflag & IGNBRK) {
2326 up->port.ignore_status_mask |= UART_LSR_BI;
2328 * If we're ignoring parity and break indicators,
2329 * ignore overruns too (for real raw support).
2331 if (termios->c_iflag & IGNPAR)
2332 up->port.ignore_status_mask |= UART_LSR_OE;
2336 * ignore all characters if CREAD is not set
2338 if ((termios->c_cflag & CREAD) == 0)
2339 up->port.ignore_status_mask |= UART_LSR_DR;
2342 * CTS flow control flag and modem status interrupts
2344 up->ier &= ~UART_IER_MSI;
2345 if (!(up->bugs & UART_BUG_NOMSR) &&
2346 UART_ENABLE_MS(&up->port, termios->c_cflag))
2347 up->ier |= UART_IER_MSI;
2348 if (up->capabilities & UART_CAP_UUE)
2349 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
2351 serial_out(up, UART_IER, up->ier);
2353 if (up->capabilities & UART_CAP_EFR) {
2354 unsigned char efr = 0;
2356 * TI16C752/Startech hardware flow control. FIXME:
2357 * - TI16C752 requires control thresholds to be set.
2358 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2360 if (termios->c_cflag & CRTSCTS)
2361 efr |= UART_EFR_CTS;
2363 serial_outp(up, UART_LCR, 0xBF);
2364 serial_outp(up, UART_EFR, efr);
2367 #ifdef CONFIG_ARCH_OMAP
2368 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2369 if (cpu_is_omap1510() && is_omap_port(up)) {
2370 if (baud == 115200) {
2372 serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
2374 serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
2378 if (up->capabilities & UART_NATSEMI) {
2379 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2380 serial_outp(up, UART_LCR, 0xe0);
2382 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
2385 serial_dl_write(up, quot);
2388 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2389 * is written without DLAB set, this mode will be disabled.
2391 if (up->port.type == PORT_16750)
2392 serial_outp(up, UART_FCR, fcr);
2394 serial_outp(up, UART_LCR, cval); /* reset DLAB */
2395 up->lcr = cval; /* Save LCR */
2396 if (up->port.type != PORT_16750) {
2397 if (fcr & UART_FCR_ENABLE_FIFO) {
2398 /* emulated UARTs (Lucent Venus 167x) need two steps */
2399 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
2401 serial_outp(up, UART_FCR, fcr); /* set fcr */
2403 serial8250_set_mctrl(&up->port, up->port.mctrl);
2404 spin_unlock_irqrestore(&up->port.lock, flags);
2405 /* Don't rewrite B0 */
2406 if (tty_termios_baud_rate(termios))
2407 tty_termios_encode_baud_rate(termios, baud, baud);
2411 serial8250_pm(struct uart_port *port, unsigned int state,
2412 unsigned int oldstate)
2414 struct uart_8250_port *p = (struct uart_8250_port *)port;
2416 serial8250_set_sleep(p, state != 0);
2419 p->pm(port, state, oldstate);
2422 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2424 if (pt->port.iotype == UPIO_AU)
2426 #ifdef CONFIG_ARCH_OMAP
2427 if (is_omap_port(pt))
2428 return 0x16 << pt->port.regshift;
2430 return 8 << pt->port.regshift;
2434 * Resource handling.
2436 static int serial8250_request_std_resource(struct uart_8250_port *up)
2438 unsigned int size = serial8250_port_size(up);
2441 switch (up->port.iotype) {
2447 if (!up->port.mapbase)
2450 if (!request_mem_region(up->port.mapbase, size, "serial")) {
2455 if (up->port.flags & UPF_IOREMAP) {
2456 up->port.membase = ioremap_nocache(up->port.mapbase,
2458 if (!up->port.membase) {
2459 release_mem_region(up->port.mapbase, size);
2467 if (!request_region(up->port.iobase, size, "serial"))
2474 static void serial8250_release_std_resource(struct uart_8250_port *up)
2476 unsigned int size = serial8250_port_size(up);
2478 switch (up->port.iotype) {
2484 if (!up->port.mapbase)
2487 if (up->port.flags & UPF_IOREMAP) {
2488 iounmap(up->port.membase);
2489 up->port.membase = NULL;
2492 release_mem_region(up->port.mapbase, size);
2497 release_region(up->port.iobase, size);
2502 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2504 unsigned long start = UART_RSA_BASE << up->port.regshift;
2505 unsigned int size = 8 << up->port.regshift;
2508 switch (up->port.iotype) {
2511 start += up->port.iobase;
2512 if (request_region(start, size, "serial-rsa"))
2522 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2524 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2525 unsigned int size = 8 << up->port.regshift;
2527 switch (up->port.iotype) {
2530 release_region(up->port.iobase + offset, size);
2535 static void serial8250_release_port(struct uart_port *port)
2537 struct uart_8250_port *up = (struct uart_8250_port *)port;
2539 serial8250_release_std_resource(up);
2540 if (up->port.type == PORT_RSA)
2541 serial8250_release_rsa_resource(up);
2544 static int serial8250_request_port(struct uart_port *port)
2546 struct uart_8250_port *up = (struct uart_8250_port *)port;
2549 ret = serial8250_request_std_resource(up);
2550 if (ret == 0 && up->port.type == PORT_RSA) {
2551 ret = serial8250_request_rsa_resource(up);
2553 serial8250_release_std_resource(up);
2559 static void serial8250_config_port(struct uart_port *port, int flags)
2561 struct uart_8250_port *up = (struct uart_8250_port *)port;
2562 int probeflags = PROBE_ANY;
2566 * Find the region that we can probe for. This in turn
2567 * tells us whether we can probe for the type of port.
2569 ret = serial8250_request_std_resource(up);
2573 ret = serial8250_request_rsa_resource(up);
2575 probeflags &= ~PROBE_RSA;
2577 if (up->port.iotype != up->cur_iotype)
2578 set_io_from_upio(port);
2580 if (flags & UART_CONFIG_TYPE)
2581 autoconfig(up, probeflags);
2583 #ifdef CONFIG_SERIAL_8250_AU1X00
2584 /* if access method is AU, it is a 16550 with a quirk */
2585 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
2586 up->bugs |= UART_BUG_NOMSR;
2589 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2592 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2593 serial8250_release_rsa_resource(up);
2594 if (up->port.type == PORT_UNKNOWN)
2595 serial8250_release_std_resource(up);
2599 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2601 if (ser->irq >= nr_irqs || ser->irq < 0 ||
2602 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2603 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2604 ser->type == PORT_STARTECH)
2610 serial8250_type(struct uart_port *port)
2612 int type = port->type;
2614 if (type >= ARRAY_SIZE(uart_config))
2616 return uart_config[type].name;
2619 static struct uart_ops serial8250_pops = {
2620 .tx_empty = serial8250_tx_empty,
2621 .set_mctrl = serial8250_set_mctrl,
2622 .get_mctrl = serial8250_get_mctrl,
2623 .stop_tx = serial8250_stop_tx,
2624 .start_tx = serial8250_start_tx,
2625 .stop_rx = serial8250_stop_rx,
2626 .enable_ms = serial8250_enable_ms,
2627 .break_ctl = serial8250_break_ctl,
2628 .startup = serial8250_startup,
2629 .shutdown = serial8250_shutdown,
2630 .set_termios = serial8250_set_termios,
2631 .pm = serial8250_pm,
2632 .type = serial8250_type,
2633 .release_port = serial8250_release_port,
2634 .request_port = serial8250_request_port,
2635 .config_port = serial8250_config_port,
2636 .verify_port = serial8250_verify_port,
2637 #ifdef CONFIG_CONSOLE_POLL
2638 .poll_get_char = serial8250_get_poll_char,
2639 .poll_put_char = serial8250_put_poll_char,
2643 static struct uart_8250_port serial8250_ports[UART_NR];
2645 static void __init serial8250_isa_init_ports(void)
2647 struct uart_8250_port *up;
2648 static int first = 1;
2655 for (i = 0; i < nr_uarts; i++) {
2656 struct uart_8250_port *up = &serial8250_ports[i];
2659 spin_lock_init(&up->port.lock);
2661 init_timer(&up->timer);
2662 up->timer.function = serial8250_timeout;
2665 * ALPHA_KLUDGE_MCR needs to be killed.
2667 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2668 up->mcr_force = ALPHA_KLUDGE_MCR;
2670 up->port.ops = &serial8250_pops;
2674 irqflag = IRQF_SHARED;
2676 for (i = 0, up = serial8250_ports;
2677 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2679 up->port.iobase = old_serial_port[i].port;
2680 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2681 up->port.irqflags = old_serial_port[i].irqflags;
2682 up->port.uartclk = old_serial_port[i].baud_base * 16;
2683 up->port.flags = old_serial_port[i].flags;
2684 up->port.hub6 = old_serial_port[i].hub6;
2685 up->port.membase = old_serial_port[i].iomem_base;
2686 up->port.iotype = old_serial_port[i].io_type;
2687 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2688 set_io_from_upio(&up->port);
2689 up->port.irqflags |= irqflag;
2694 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2698 for (i = 0; i < nr_uarts; i++) {
2699 struct uart_8250_port *up = &serial8250_ports[i];
2700 up->cur_iotype = 0xFF;
2703 serial8250_isa_init_ports();
2705 for (i = 0; i < nr_uarts; i++) {
2706 struct uart_8250_port *up = &serial8250_ports[i];
2709 uart_add_one_port(drv, &up->port);
2713 #ifdef CONFIG_SERIAL_8250_CONSOLE
2715 static void serial8250_console_putchar(struct uart_port *port, int ch)
2717 struct uart_8250_port *up = (struct uart_8250_port *)port;
2719 wait_for_xmitr(up, UART_LSR_THRE);
2720 serial_out(up, UART_TX, ch);
2724 * Print a string to the serial port trying not to disturb
2725 * any possible real use of the port...
2727 * The console_lock must be held when we get here.
2730 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2732 struct uart_8250_port *up = &serial8250_ports[co->index];
2733 unsigned long flags;
2737 touch_nmi_watchdog();
2739 local_irq_save(flags);
2740 if (up->port.sysrq) {
2741 /* serial8250_handle_port() already took the lock */
2743 } else if (oops_in_progress) {
2744 locked = spin_trylock(&up->port.lock);
2746 spin_lock(&up->port.lock);
2749 * First save the IER then disable the interrupts
2751 ier = serial_in(up, UART_IER);
2753 if (up->capabilities & UART_CAP_UUE)
2754 serial_out(up, UART_IER, UART_IER_UUE);
2756 serial_out(up, UART_IER, 0);
2758 uart_console_write(&up->port, s, count, serial8250_console_putchar);
2761 * Finally, wait for transmitter to become empty
2762 * and restore the IER
2764 wait_for_xmitr(up, BOTH_EMPTY);
2765 serial_out(up, UART_IER, ier);
2768 * The receive handling will happen properly because the
2769 * receive ready bit will still be set; it is not cleared
2770 * on read. However, modem control will not, we must
2771 * call it if we have saved something in the saved flags
2772 * while processing with interrupts off.
2774 if (up->msr_saved_flags)
2775 check_modem_status(up);
2778 spin_unlock(&up->port.lock);
2779 local_irq_restore(flags);
2782 static int __init serial8250_console_setup(struct console *co, char *options)
2784 struct uart_port *port;
2791 * Check whether an invalid uart number has been specified, and
2792 * if so, search for the first available port that does have
2795 if (co->index >= nr_uarts)
2797 port = &serial8250_ports[co->index].port;
2798 if (!port->iobase && !port->membase)
2802 uart_parse_options(options, &baud, &parity, &bits, &flow);
2804 return uart_set_options(port, co, baud, parity, bits, flow);
2807 static int serial8250_console_early_setup(void)
2809 return serial8250_find_port_for_earlycon();
2812 static struct console serial8250_console = {
2814 .write = serial8250_console_write,
2815 .device = uart_console_device,
2816 .setup = serial8250_console_setup,
2817 .early_setup = serial8250_console_early_setup,
2818 .flags = CON_PRINTBUFFER,
2820 .data = &serial8250_reg,
2823 static int __init serial8250_console_init(void)
2825 if (nr_uarts > UART_NR)
2828 serial8250_isa_init_ports();
2829 register_console(&serial8250_console);
2832 console_initcall(serial8250_console_init);
2834 int serial8250_find_port(struct uart_port *p)
2837 struct uart_port *port;
2839 for (line = 0; line < nr_uarts; line++) {
2840 port = &serial8250_ports[line].port;
2841 if (uart_match_port(p, port))
2847 #define SERIAL8250_CONSOLE &serial8250_console
2849 #define SERIAL8250_CONSOLE NULL
2852 static struct uart_driver serial8250_reg = {
2853 .owner = THIS_MODULE,
2854 .driver_name = "serial",
2858 .cons = SERIAL8250_CONSOLE,
2862 * early_serial_setup - early registration for 8250 ports
2864 * Setup an 8250 port structure prior to console initialisation. Use
2865 * after console initialisation will cause undefined behaviour.
2867 int __init early_serial_setup(struct uart_port *port)
2869 struct uart_port *p;
2871 if (port->line >= ARRAY_SIZE(serial8250_ports))
2874 serial8250_isa_init_ports();
2875 p = &serial8250_ports[port->line].port;
2876 p->iobase = port->iobase;
2877 p->membase = port->membase;
2879 p->irqflags = port->irqflags;
2880 p->uartclk = port->uartclk;
2881 p->fifosize = port->fifosize;
2882 p->regshift = port->regshift;
2883 p->iotype = port->iotype;
2884 p->flags = port->flags;
2885 p->mapbase = port->mapbase;
2886 p->private_data = port->private_data;
2887 p->type = port->type;
2888 p->line = port->line;
2890 set_io_from_upio(p);
2891 if (port->serial_in)
2892 p->serial_in = port->serial_in;
2893 if (port->serial_out)
2894 p->serial_out = port->serial_out;
2900 * serial8250_suspend_port - suspend one serial port
2901 * @line: serial line number
2903 * Suspend one serial port.
2905 void serial8250_suspend_port(int line)
2907 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2911 * serial8250_resume_port - resume one serial port
2912 * @line: serial line number
2914 * Resume one serial port.
2916 void serial8250_resume_port(int line)
2918 struct uart_8250_port *up = &serial8250_ports[line];
2920 if (up->capabilities & UART_NATSEMI) {
2923 /* Ensure it's still in high speed mode */
2924 serial_outp(up, UART_LCR, 0xE0);
2926 tmp = serial_in(up, 0x04); /* EXCR2 */
2927 tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
2928 tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
2929 serial_outp(up, 0x04, tmp);
2931 serial_outp(up, UART_LCR, 0);
2933 uart_resume_port(&serial8250_reg, &up->port);
2937 * Register a set of serial devices attached to a platform device. The
2938 * list is terminated with a zero flags entry, which means we expect
2939 * all entries to have at least UPF_BOOT_AUTOCONF set.
2941 static int __devinit serial8250_probe(struct platform_device *dev)
2943 struct plat_serial8250_port *p = dev->dev.platform_data;
2944 struct uart_port port;
2945 int ret, i, irqflag = 0;
2947 memset(&port, 0, sizeof(struct uart_port));
2950 irqflag = IRQF_SHARED;
2952 for (i = 0; p && p->flags != 0; p++, i++) {
2953 port.iobase = p->iobase;
2954 port.membase = p->membase;
2956 port.irqflags = p->irqflags;
2957 port.uartclk = p->uartclk;
2958 port.regshift = p->regshift;
2959 port.iotype = p->iotype;
2960 port.flags = p->flags;
2961 port.mapbase = p->mapbase;
2962 port.hub6 = p->hub6;
2963 port.private_data = p->private_data;
2964 port.type = p->type;
2965 port.serial_in = p->serial_in;
2966 port.serial_out = p->serial_out;
2967 port.dev = &dev->dev;
2968 port.irqflags |= irqflag;
2969 ret = serial8250_register_port(&port);
2971 dev_err(&dev->dev, "unable to register port at index %d "
2972 "(IO%lx MEM%llx IRQ%d): %d\n", i,
2973 p->iobase, (unsigned long long)p->mapbase,
2981 * Remove serial ports registered against a platform device.
2983 static int __devexit serial8250_remove(struct platform_device *dev)
2987 for (i = 0; i < nr_uarts; i++) {
2988 struct uart_8250_port *up = &serial8250_ports[i];
2990 if (up->port.dev == &dev->dev)
2991 serial8250_unregister_port(i);
2996 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3000 for (i = 0; i < UART_NR; i++) {
3001 struct uart_8250_port *up = &serial8250_ports[i];
3003 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3004 uart_suspend_port(&serial8250_reg, &up->port);
3010 static int serial8250_resume(struct platform_device *dev)
3014 for (i = 0; i < UART_NR; i++) {
3015 struct uart_8250_port *up = &serial8250_ports[i];
3017 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3018 serial8250_resume_port(i);
3024 static struct platform_driver serial8250_isa_driver = {
3025 .probe = serial8250_probe,
3026 .remove = __devexit_p(serial8250_remove),
3027 .suspend = serial8250_suspend,
3028 .resume = serial8250_resume,
3030 .name = "serial8250",
3031 .owner = THIS_MODULE,
3036 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3037 * in the table in include/asm/serial.h
3039 static struct platform_device *serial8250_isa_devs;
3042 * serial8250_register_port and serial8250_unregister_port allows for
3043 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3044 * modems and PCI multiport cards.
3046 static DEFINE_MUTEX(serial_mutex);
3048 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3053 * First, find a port entry which matches.
3055 for (i = 0; i < nr_uarts; i++)
3056 if (uart_match_port(&serial8250_ports[i].port, port))
3057 return &serial8250_ports[i];
3060 * We didn't find a matching entry, so look for the first
3061 * free entry. We look for one which hasn't been previously
3062 * used (indicated by zero iobase).
3064 for (i = 0; i < nr_uarts; i++)
3065 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3066 serial8250_ports[i].port.iobase == 0)
3067 return &serial8250_ports[i];
3070 * That also failed. Last resort is to find any entry which
3071 * doesn't have a real port associated with it.
3073 for (i = 0; i < nr_uarts; i++)
3074 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3075 return &serial8250_ports[i];
3081 * serial8250_register_port - register a serial port
3082 * @port: serial port template
3084 * Configure the serial port specified by the request. If the
3085 * port exists and is in use, it is hung up and unregistered
3088 * The port is then probed and if necessary the IRQ is autodetected
3089 * If this fails an error is returned.
3091 * On success the port is ready to use and the line number is returned.
3093 int serial8250_register_port(struct uart_port *port)
3095 struct uart_8250_port *uart;
3098 if (port->uartclk == 0)
3101 mutex_lock(&serial_mutex);
3103 uart = serial8250_find_match_or_unused(port);
3105 uart_remove_one_port(&serial8250_reg, &uart->port);
3107 uart->port.iobase = port->iobase;
3108 uart->port.membase = port->membase;
3109 uart->port.irq = port->irq;
3110 uart->port.irqflags = port->irqflags;
3111 uart->port.uartclk = port->uartclk;
3112 uart->port.fifosize = port->fifosize;
3113 uart->port.regshift = port->regshift;
3114 uart->port.iotype = port->iotype;
3115 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
3116 uart->port.mapbase = port->mapbase;
3117 uart->port.private_data = port->private_data;
3119 uart->port.dev = port->dev;
3121 if (port->flags & UPF_FIXED_TYPE) {
3122 uart->port.type = port->type;
3123 uart->port.fifosize = uart_config[port->type].fifo_size;
3124 uart->capabilities = uart_config[port->type].flags;
3125 uart->tx_loadsz = uart_config[port->type].tx_loadsz;
3128 set_io_from_upio(&uart->port);
3129 /* Possibly override default I/O functions. */
3130 if (port->serial_in)
3131 uart->port.serial_in = port->serial_in;
3132 if (port->serial_out)
3133 uart->port.serial_out = port->serial_out;
3135 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3137 ret = uart->port.line;
3139 mutex_unlock(&serial_mutex);
3143 EXPORT_SYMBOL(serial8250_register_port);
3146 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3147 * @line: serial line number
3149 * Remove one serial port. This may not be called from interrupt
3150 * context. We hand the port back to the our control.
3152 void serial8250_unregister_port(int line)
3154 struct uart_8250_port *uart = &serial8250_ports[line];
3156 mutex_lock(&serial_mutex);
3157 uart_remove_one_port(&serial8250_reg, &uart->port);
3158 if (serial8250_isa_devs) {
3159 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3160 uart->port.type = PORT_UNKNOWN;
3161 uart->port.dev = &serial8250_isa_devs->dev;
3162 uart_add_one_port(&serial8250_reg, &uart->port);
3164 uart->port.dev = NULL;
3166 mutex_unlock(&serial_mutex);
3168 EXPORT_SYMBOL(serial8250_unregister_port);
3170 static int __init serial8250_init(void)
3174 if (nr_uarts > UART_NR)
3177 printk(KERN_INFO "Serial: 8250/16550 driver, "
3178 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3179 share_irqs ? "en" : "dis");
3182 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3184 serial8250_reg.nr = UART_NR;
3185 ret = uart_register_driver(&serial8250_reg);
3190 serial8250_isa_devs = platform_device_alloc("serial8250",
3191 PLAT8250_DEV_LEGACY);
3192 if (!serial8250_isa_devs) {
3194 goto unreg_uart_drv;
3197 ret = platform_device_add(serial8250_isa_devs);
3201 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3203 ret = platform_driver_register(&serial8250_isa_driver);
3207 platform_device_del(serial8250_isa_devs);
3209 platform_device_put(serial8250_isa_devs);
3212 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3214 uart_unregister_driver(&serial8250_reg);
3220 static void __exit serial8250_exit(void)
3222 struct platform_device *isa_dev = serial8250_isa_devs;
3225 * This tells serial8250_unregister_port() not to re-register
3226 * the ports (thereby making serial8250_isa_driver permanently
3229 serial8250_isa_devs = NULL;
3231 platform_driver_unregister(&serial8250_isa_driver);
3232 platform_device_unregister(isa_dev);
3235 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3237 uart_unregister_driver(&serial8250_reg);
3241 module_init(serial8250_init);
3242 module_exit(serial8250_exit);
3244 EXPORT_SYMBOL(serial8250_suspend_port);
3245 EXPORT_SYMBOL(serial8250_resume_port);
3247 MODULE_LICENSE("GPL");
3248 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3250 module_param(share_irqs, uint, 0644);
3251 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3254 module_param(nr_uarts, uint, 0644);
3255 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3257 module_param(skip_txen_test, uint, 0644);
3258 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3260 #ifdef CONFIG_SERIAL_8250_RSA
3261 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3262 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3264 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);