drivers/serial/bfin_5xx.c

   1 /*
   2  * Blackfin On-Chip Serial Driver
   3  *
   4  * Copyright 2006-2008 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12 #define SUPPORT_SYSRQ
  13 #endif
  14
  15 #include <linux/module.h>
  16 #include <linux/ioport.h>
  17 #include <linux/gfp.h>
  18 #include <linux/io.h>
  19 #include <linux/init.h>
  20 #include <linux/console.h>
  21 #include <linux/sysrq.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/tty.h>
  24 #include <linux/tty_flip.h>
  25 #include <linux/serial_core.h>
  26
  27 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  28         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  29 #include <linux/kgdb.h>
  30 #include <asm/irq_regs.h>
  31 #endif
  32
  33 #include <asm/gpio.h>
  34 #include <mach/bfin_serial_5xx.h>
  35
  36 #ifdef CONFIG_SERIAL_BFIN_DMA
  37 #include <linux/dma-mapping.h>
  38 #include <asm/io.h>
  39 #include <asm/irq.h>
  40 #include <asm/cacheflush.h>
  41 #endif
  42
  43 #ifdef CONFIG_SERIAL_BFIN_MODULE
  44 # undef CONFIG_EARLY_PRINTK
  45 #endif
  46
  47 #ifdef CONFIG_SERIAL_BFIN_MODULE
  48 # undef CONFIG_EARLY_PRINTK
  49 #endif
  50
  51 /* UART name and device definitions */
  52 #define BFIN_SERIAL_NAME        "ttyBF"
  53 #define BFIN_SERIAL_MAJOR       204
  54 #define BFIN_SERIAL_MINOR       64
  55
  56 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
  57 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
  58
  59 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  60         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  61
  62 # ifndef CONFIG_SERIAL_BFIN_PIO
  63 #  error KGDB only support UART in PIO mode.
  64 # endif
  65
  66 static int kgdboc_port_line;
  67 static int kgdboc_break_enabled;
  68 #endif
  69 /*
  70  * Setup for console. Argument comes from the menuconfig
  71  */
  72 #define DMA_RX_XCOUNT           512
  73 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  74
  75 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  76
  77 #ifdef CONFIG_SERIAL_BFIN_DMA
  78 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  79 #else
  80 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  81 #endif
  82
  83 static void bfin_serial_reset_irda(struct uart_port *port);
  84
  85 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  86         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  87 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  88 {
  89         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  90         if (uart->cts_pin < 0)
  91                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  92
  93         /* CTS PIN is negative assertive. */
  94         if (UART_GET_CTS(uart))
  95                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  96         else
  97                 return TIOCM_DSR | TIOCM_CAR;
  98 }
  99
 100 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 101 {
 102         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 103         if (uart->rts_pin < 0)
 104                 return;
 105
 106         /* RTS PIN is negative assertive. */
 107         if (mctrl & TIOCM_RTS)
 108                 UART_ENABLE_RTS(uart);
 109         else
 110                 UART_DISABLE_RTS(uart);
 111 }
 112
 113 /*
 114  * Handle any change of modem status signal.
 115  */
 116 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 117 {
 118         struct bfin_serial_port *uart = dev_id;
 119         unsigned int status;
 120
 121         status = bfin_serial_get_mctrl(&uart->port);
 122         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 123 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 124         uart->scts = 1;
 125         UART_CLEAR_SCTS(uart);
 126         UART_CLEAR_IER(uart, EDSSI);
 127 #endif
 128
 129         return IRQ_HANDLED;
 130 }
 131 #else
 132 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 133 {
 134         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 135 }
 136
 137 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 138 {
 139 }
 140 #endif
 141
 142 /*
 143  * interrupts are disabled on entry
 144  */
 145 static void bfin_serial_stop_tx(struct uart_port *port)
 146 {
 147         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 148 #ifdef CONFIG_SERIAL_BFIN_DMA
 149         struct circ_buf *xmit = &uart->port.state->xmit;
 150 #endif
 151
 152         while (!(UART_GET_LSR(uart) & TEMT))
 153                 cpu_relax();
 154
 155 #ifdef CONFIG_SERIAL_BFIN_DMA
 156         disable_dma(uart->tx_dma_channel);
 157         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 158         uart->port.icount.tx += uart->tx_count;
 159         uart->tx_count = 0;
 160         uart->tx_done = 1;
 161 #else
 162 #ifdef CONFIG_BF54x
 163         /* Clear TFI bit */
 164         UART_PUT_LSR(uart, TFI);
 165 #endif
 166         UART_CLEAR_IER(uart, ETBEI);
 167 #endif
 168 }
 169
 170 /*
 171  * port is locked and interrupts are disabled
 172  */
 173 static void bfin_serial_start_tx(struct uart_port *port)
 174 {
 175         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 176         struct tty_struct *tty = uart->port.state->port.tty;
 177
 178 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 179         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 180                 uart->scts = 0;
 181                 uart_handle_cts_change(&uart->port, uart->scts);
 182         }
 183 #endif
 184
 185         /*
 186          * To avoid losting RX interrupt, we reset IR function
 187          * before sending data.
 188          */
 189         if (tty->termios->c_line == N_IRDA)
 190                 bfin_serial_reset_irda(port);
 191
 192 #ifdef CONFIG_SERIAL_BFIN_DMA
 193         if (uart->tx_done)
 194                 bfin_serial_dma_tx_chars(uart);
 195 #else
 196         UART_SET_IER(uart, ETBEI);
 197         bfin_serial_tx_chars(uart);
 198 #endif
 199 }
 200
 201 /*
 202  * Interrupts are enabled
 203  */
 204 static void bfin_serial_stop_rx(struct uart_port *port)
 205 {
 206         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 207
 208         UART_CLEAR_IER(uart, ERBFI);
 209 }
 210
 211 /*
 212  * Set the modem control timer to fire immediately.
 213  */
 214 static void bfin_serial_enable_ms(struct uart_port *port)
 215 {
 216 }
 217
 218
 219 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 220 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 221 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 222 #else
 223 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
 224 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
 225 #endif
 226
 227 #ifdef CONFIG_SERIAL_BFIN_PIO
 228 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 229 {
 230         struct tty_struct *tty = NULL;
 231         unsigned int status, ch, flg;
 232         static struct timeval anomaly_start = { .tv_sec = 0 };
 233
 234         status = UART_GET_LSR(uart);
 235         UART_CLEAR_LSR(uart);
 236
 237         ch = UART_GET_CHAR(uart);
 238         uart->port.icount.rx++;
 239
 240 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 241         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 242         if (kgdb_connected && kgdboc_port_line == uart->port.line
 243                 && kgdboc_break_enabled)
 244                 if (ch == 0x3) {/* Ctrl + C */
 245                         kgdb_breakpoint();
 246                         return;
 247                 }
 248
 249         if (!uart->port.state || !uart->port.state->port.tty)
 250                 return;
 251 #endif
 252         tty = uart->port.state->port.tty;
 253
 254         if (ANOMALY_05000363) {
 255                 /* The BF533 (and BF561) family of processors have a nice anomaly
 256                  * where they continuously generate characters for a "single" break.
 257                  * We have to basically ignore this flood until the "next" valid
 258                  * character comes across.  Due to the nature of the flood, it is
 259                  * not possible to reliably catch bytes that are sent too quickly
 260                  * after this break.  So application code talking to the Blackfin
 261                  * which sends a break signal must allow at least 1.5 character
 262                  * times after the end of the break for things to stabilize.  This
 263                  * timeout was picked as it must absolutely be larger than 1
 264                  * character time +/- some percent.  So 1.5 sounds good.  All other
 265                  * Blackfin families operate properly.  Woo.
 266                  */
 267                 if (anomaly_start.tv_sec) {
 268                         struct timeval curr;
 269                         suseconds_t usecs;
 270
 271                         if ((~ch & (~ch + 1)) & 0xff)
 272                                 goto known_good_char;
 273
 274                         do_gettimeofday(&curr);
 275                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
 276                                 goto known_good_char;
 277
 278                         usecs = 0;
 279                         if (curr.tv_sec != anomaly_start.tv_sec)
 280                                 usecs += USEC_PER_SEC;
 281                         usecs += curr.tv_usec - anomaly_start.tv_usec;
 282
 283                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 284                                 goto known_good_char;
 285
 286                         if (ch)
 287                                 anomaly_start.tv_sec = 0;
 288                         else
 289                                 anomaly_start = curr;
 290
 291                         return;
 292
 293  known_good_char:
 294                         status &= ~BI;
 295                         anomaly_start.tv_sec = 0;
 296                 }
 297         }
 298
 299         if (status & BI) {
 300                 if (ANOMALY_05000363)
 301                         if (bfin_revid() < 5)
 302                                 do_gettimeofday(&anomaly_start);
 303                 uart->port.icount.brk++;
 304                 if (uart_handle_break(&uart->port))
 305                         goto ignore_char;
 306                 status &= ~(PE | FE);
 307         }
 308         if (status & PE)
 309                 uart->port.icount.parity++;
 310         if (status & OE)
 311                 uart->port.icount.overrun++;
 312         if (status & FE)
 313                 uart->port.icount.frame++;
 314
 315         status &= uart->port.read_status_mask;
 316
 317         if (status & BI)
 318                 flg = TTY_BREAK;
 319         else if (status & PE)
 320                 flg = TTY_PARITY;
 321         else if (status & FE)
 322                 flg = TTY_FRAME;
 323         else
 324                 flg = TTY_NORMAL;
 325
 326         if (uart_handle_sysrq_char(&uart->port, ch))
 327                 goto ignore_char;
 328
 329         uart_insert_char(&uart->port, status, OE, ch, flg);
 330
 331  ignore_char:
 332         tty_flip_buffer_push(tty);
 333 }
 334
 335 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 336 {
 337         struct circ_buf *xmit = &uart->port.state->xmit;
 338
 339         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 340 #ifdef CONFIG_BF54x
 341                 /* Clear TFI bit */
 342                 UART_PUT_LSR(uart, TFI);
 343 #endif
 344                 /* Anomaly notes:
 345                  *  05000215 -  we always clear ETBEI within last UART TX
 346                  *              interrupt to end a string. It is always set
 347                  *              when start a new tx.
 348                  */
 349                 UART_CLEAR_IER(uart, ETBEI);
 350                 return;
 351         }
 352
 353         if (uart->port.x_char) {
 354                 UART_PUT_CHAR(uart, uart->port.x_char);
 355                 uart->port.icount.tx++;
 356                 uart->port.x_char = 0;
 357         }
 358
 359         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 360                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 361                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 362                 uart->port.icount.tx++;
 363                 SSYNC();
 364         }
 365
 366         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 367                 uart_write_wakeup(&uart->port);
 368 }
 369
 370 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 371 {
 372         struct bfin_serial_port *uart = dev_id;
 373
 374         spin_lock(&uart->port.lock);
 375         while (UART_GET_LSR(uart) & DR)
 376                 bfin_serial_rx_chars(uart);
 377         spin_unlock(&uart->port.lock);
 378
 379         return IRQ_HANDLED;
 380 }
 381
 382 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 383 {
 384         struct bfin_serial_port *uart = dev_id;
 385
 386 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 387         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 388                 uart->scts = 0;
 389                 uart_handle_cts_change(&uart->port, uart->scts);
 390         }
 391 #endif
 392         spin_lock(&uart->port.lock);
 393         if (UART_GET_LSR(uart) & THRE)
 394                 bfin_serial_tx_chars(uart);
 395         spin_unlock(&uart->port.lock);
 396
 397         return IRQ_HANDLED;
 398 }
 399 #endif
 400
 401 #ifdef CONFIG_SERIAL_BFIN_DMA
 402 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 403 {
 404         struct circ_buf *xmit = &uart->port.state->xmit;
 405
 406         uart->tx_done = 0;
 407
 408         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 409                 uart->tx_count = 0;
 410                 uart->tx_done = 1;
 411                 return;
 412         }
 413
 414         if (uart->port.x_char) {
 415                 UART_PUT_CHAR(uart, uart->port.x_char);
 416                 uart->port.icount.tx++;
 417                 uart->port.x_char = 0;
 418         }
 419
 420         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 421         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 422                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 423         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 424                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 425         set_dma_config(uart->tx_dma_channel,
 426                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 427                         INTR_ON_BUF,
 428                         DIMENSION_LINEAR,
 429                         DATA_SIZE_8,
 430                         DMA_SYNC_RESTART));
 431         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 432         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 433         set_dma_x_modify(uart->tx_dma_channel, 1);
 434         SSYNC();
 435         enable_dma(uart->tx_dma_channel);
 436
 437         UART_SET_IER(uart, ETBEI);
 438 }
 439
 440 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 441 {
 442         struct tty_struct *tty = uart->port.state->port.tty;
 443         int i, flg, status;
 444
 445         status = UART_GET_LSR(uart);
 446         UART_CLEAR_LSR(uart);
 447
 448         uart->port.icount.rx +=
 449                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 450                 UART_XMIT_SIZE);
 451
 452         if (status & BI) {
 453                 uart->port.icount.brk++;
 454                 if (uart_handle_break(&uart->port))
 455                         goto dma_ignore_char;
 456                 status &= ~(PE | FE);
 457         }
 458         if (status & PE)
 459                 uart->port.icount.parity++;
 460         if (status & OE)
 461                 uart->port.icount.overrun++;
 462         if (status & FE)
 463                 uart->port.icount.frame++;
 464
 465         status &= uart->port.read_status_mask;
 466
 467         if (status & BI)
 468                 flg = TTY_BREAK;
 469         else if (status & PE)
 470                 flg = TTY_PARITY;
 471         else if (status & FE)
 472                 flg = TTY_FRAME;
 473         else
 474                 flg = TTY_NORMAL;
 475
 476         for (i = uart->rx_dma_buf.tail; ; i++) {
 477                 if (i >= UART_XMIT_SIZE)
 478                         i = 0;
 479                 if (i == uart->rx_dma_buf.head)
 480                         break;
 481                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 482                         uart_insert_char(&uart->port, status, OE,
 483                                 uart->rx_dma_buf.buf[i], flg);
 484         }
 485
 486  dma_ignore_char:
 487         tty_flip_buffer_push(tty);
 488 }
 489
 490 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 491 {
 492         int x_pos, pos;
 493
 494         dma_disable_irq(uart->tx_dma_channel);
 495         dma_disable_irq(uart->rx_dma_channel);
 496         spin_lock_bh(&uart->port.lock);
 497
 498         /* 2D DMA RX buffer ring is used. Because curr_y_count and
 499          * curr_x_count can't be read as an atomic operation,
 500          * curr_y_count should be read before curr_x_count. When
 501          * curr_x_count is read, curr_y_count may already indicate
 502          * next buffer line. But, the position calculated here is
 503          * still indicate the old line. The wrong position data may
 504          * be smaller than current buffer tail, which cause garbages
 505          * are received if it is not prohibit.
 506          */
 507         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 508         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 509         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 510         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 511                 uart->rx_dma_nrows = 0;
 512         x_pos = DMA_RX_XCOUNT - x_pos;
 513         if (x_pos == DMA_RX_XCOUNT)
 514                 x_pos = 0;
 515
 516         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 517         /* Ignore receiving data if new position is in the same line of
 518          * current buffer tail and small.
 519          */
 520         if (pos > uart->rx_dma_buf.tail ||
 521                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 522                 uart->rx_dma_buf.head = pos;
 523                 bfin_serial_dma_rx_chars(uart);
 524                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 525         }
 526
 527         spin_unlock_bh(&uart->port.lock);
 528         dma_enable_irq(uart->tx_dma_channel);
 529         dma_enable_irq(uart->rx_dma_channel);
 530
 531         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 532 }
 533
 534 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 535 {
 536         struct bfin_serial_port *uart = dev_id;
 537         struct circ_buf *xmit = &uart->port.state->xmit;
 538
 539 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 540         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
 541                 uart->scts = 0;
 542                 uart_handle_cts_change(&uart->port, uart->scts);
 543         }
 544 #endif
 545
 546         spin_lock(&uart->port.lock);
 547         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 548                 disable_dma(uart->tx_dma_channel);
 549                 clear_dma_irqstat(uart->tx_dma_channel);
 550                 /* Anomaly notes:
 551                  *  05000215 -  we always clear ETBEI within last UART TX
 552                  *              interrupt to end a string. It is always set
 553                  *              when start a new tx.
 554                  */
 555                 UART_CLEAR_IER(uart, ETBEI);
 556                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 557                 uart->port.icount.tx += uart->tx_count;
 558
 559                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 560                         uart_write_wakeup(&uart->port);
 561
 562                 bfin_serial_dma_tx_chars(uart);
 563         }
 564
 565         spin_unlock(&uart->port.lock);
 566         return IRQ_HANDLED;
 567 }
 568
 569 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 570 {
 571         struct bfin_serial_port *uart = dev_id;
 572         unsigned short irqstat;
 573         int x_pos, pos;
 574
 575         spin_lock(&uart->port.lock);
 576         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 577         clear_dma_irqstat(uart->rx_dma_channel);
 578
 579         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 580         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 581         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 582         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 583                 uart->rx_dma_nrows = 0;
 584
 585         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 586         if (pos > uart->rx_dma_buf.tail ||
 587                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 588                 uart->rx_dma_buf.head = pos;
 589                 bfin_serial_dma_rx_chars(uart);
 590                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 591         }
 592
 593         spin_unlock(&uart->port.lock);
 594
 595         return IRQ_HANDLED;
 596 }
 597 #endif
 598
 599 /*
 600  * Return TIOCSER_TEMT when transmitter is not busy.
 601  */
 602 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 603 {
 604         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 605         unsigned short lsr;
 606
 607         lsr = UART_GET_LSR(uart);
 608         if (lsr & TEMT)
 609                 return TIOCSER_TEMT;
 610         else
 611                 return 0;
 612 }
 613
 614 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 615 {
 616         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 617         u16 lcr = UART_GET_LCR(uart);
 618         if (break_state)
 619                 lcr |= SB;
 620         else
 621                 lcr &= ~SB;
 622         UART_PUT_LCR(uart, lcr);
 623         SSYNC();
 624 }
 625
 626 static int bfin_serial_startup(struct uart_port *port)
 627 {
 628         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 629
 630 #ifdef CONFIG_SERIAL_BFIN_DMA
 631         dma_addr_t dma_handle;
 632
 633         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 634                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 635                 return -EBUSY;
 636         }
 637
 638         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 639                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 640                 free_dma(uart->rx_dma_channel);
 641                 return -EBUSY;
 642         }
 643
 644         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 645         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 646
 647         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 648         uart->rx_dma_buf.head = 0;
 649         uart->rx_dma_buf.tail = 0;
 650         uart->rx_dma_nrows = 0;
 651
 652         set_dma_config(uart->rx_dma_channel,
 653                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 654                                 INTR_ON_ROW, DIMENSION_2D,
 655                                 DATA_SIZE_8,
 656                                 DMA_SYNC_RESTART));
 657         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 658         set_dma_x_modify(uart->rx_dma_channel, 1);
 659         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 660         set_dma_y_modify(uart->rx_dma_channel, 1);
 661         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 662         enable_dma(uart->rx_dma_channel);
 663
 664         uart->rx_dma_timer.data = (unsigned long)(uart);
 665         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 666         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 667         add_timer(&(uart->rx_dma_timer));
 668 #else
 669 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 670         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 671         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 672                 kgdboc_break_enabled = 0;
 673         else {
 674 # endif
 675         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
 676              "BFIN_UART_RX", uart)) {
 677                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 678                 return -EBUSY;
 679         }
 680
 681         if (request_irq
 682             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
 683              "BFIN_UART_TX", uart)) {
 684                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 685                 free_irq(uart->port.irq, uart);
 686                 return -EBUSY;
 687         }
 688
 689 # ifdef CONFIG_BF54x
 690         {
 691                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 692
 693                 switch (uart->port.irq) {
 694                 case IRQ_UART3_RX:
 695                         uart_dma_ch_rx = CH_UART3_RX;
 696                         uart_dma_ch_tx = CH_UART3_TX;
 697                         break;
 698                 case IRQ_UART2_RX:
 699                         uart_dma_ch_rx = CH_UART2_RX;
 700                         uart_dma_ch_tx = CH_UART2_TX;
 701                         break;
 702                 default:
 703                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
 704                         break;
 705                 };
 706
 707                 if (uart_dma_ch_rx &&
 708                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 709                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 710                         free_irq(uart->port.irq, uart);
 711                         free_irq(uart->port.irq + 1, uart);
 712                         return -EBUSY;
 713                 }
 714                 if (uart_dma_ch_tx &&
 715                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 716                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 717                         free_dma(uart_dma_ch_rx);
 718                         free_irq(uart->port.irq, uart);
 719                         free_irq(uart->port.irq + 1, uart);
 720                         return -EBUSY;
 721                 }
 722         }
 723 # endif
 724 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 725         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 726         }
 727 # endif
 728 #endif
 729
 730 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 731         if (uart->cts_pin >= 0) {
 732                 if (request_irq(gpio_to_irq(uart->cts_pin),
 733                         bfin_serial_mctrl_cts_int,
 734                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 735                         IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
 736                         uart->cts_pin = -1;
 737                         pr_info("Unable to attach BlackFin UART CTS interrupt.\
 738                                  So, disable it.\n");
 739                 }
 740         }
 741         if (uart->rts_pin >= 0) {
 742                 gpio_request(uart->rts_pin, DRIVER_NAME);
 743                 gpio_direction_output(uart->rts_pin, 0);
 744         }
 745 #endif
 746 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 747         if (request_irq(uart->status_irq,
 748                 bfin_serial_mctrl_cts_int,
 749                 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
 750                 pr_info("Unable to attach BlackFin UART Modem \
 751                         Status interrupt.\n");
 752         }
 753
 754         /* CTS RTS PINs are negative assertive. */
 755         UART_PUT_MCR(uart, ACTS);
 756         UART_SET_IER(uart, EDSSI);
 757 #endif
 758
 759         UART_SET_IER(uart, ERBFI);
 760         return 0;
 761 }
 762
 763 static void bfin_serial_shutdown(struct uart_port *port)
 764 {
 765         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 766
 767 #ifdef CONFIG_SERIAL_BFIN_DMA
 768         disable_dma(uart->tx_dma_channel);
 769         free_dma(uart->tx_dma_channel);
 770         disable_dma(uart->rx_dma_channel);
 771         free_dma(uart->rx_dma_channel);
 772         del_timer(&(uart->rx_dma_timer));
 773         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 774 #else
 775 #ifdef CONFIG_BF54x
 776         switch (uart->port.irq) {
 777         case IRQ_UART3_RX:
 778                 free_dma(CH_UART3_RX);
 779                 free_dma(CH_UART3_TX);
 780                 break;
 781         case IRQ_UART2_RX:
 782                 free_dma(CH_UART2_RX);
 783                 free_dma(CH_UART2_TX);
 784                 break;
 785         default:
 786                 break;
 787         };
 788 #endif
 789         free_irq(uart->port.irq, uart);
 790         free_irq(uart->port.irq+1, uart);
 791 #endif
 792
 793 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 794         if (uart->cts_pin >= 0)
 795                 free_irq(gpio_to_irq(uart->cts_pin), uart);
 796         if (uart->rts_pin >= 0)
 797                 gpio_free(uart->rts_pin);
 798 #endif
 799 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 800         if (UART_GET_IER(uart) && EDSSI)
 801                 free_irq(uart->status_irq, uart);
 802 #endif
 803 }
 804
 805 static void
 806 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 807                    struct ktermios *old)
 808 {
 809         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 810         unsigned long flags;
 811         unsigned int baud, quot;
 812         unsigned short val, ier, lcr = 0;
 813
 814         switch (termios->c_cflag & CSIZE) {
 815         case CS8:
 816                 lcr = WLS(8);
 817                 break;
 818         case CS7:
 819                 lcr = WLS(7);
 820                 break;
 821         case CS6:
 822                 lcr = WLS(6);
 823                 break;
 824         case CS5:
 825                 lcr = WLS(5);
 826                 break;
 827         default:
 828                 printk(KERN_ERR "%s: word lengh not supported\n",
 829                         __func__);
 830         }
 831
 832         /* Anomaly notes:
 833          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
 834          */
 835         if (termios->c_cflag & CSTOPB) {
 836                 if (ANOMALY_05000231)
 837                         printk(KERN_WARNING "STOP bits other than 1 is not "
 838                                 "supported in case of anomaly 05000231.\n");
 839                 else
 840                         lcr |= STB;
 841         }
 842         if (termios->c_cflag & PARENB)
 843                 lcr |= PEN;
 844         if (!(termios->c_cflag & PARODD))
 845                 lcr |= EPS;
 846         if (termios->c_cflag & CMSPAR)
 847                 lcr |= STP;
 848
 849         port->read_status_mask = OE;
 850         if (termios->c_iflag & INPCK)
 851                 port->read_status_mask |= (FE | PE);
 852         if (termios->c_iflag & (BRKINT | PARMRK))
 853                 port->read_status_mask |= BI;
 854
 855         /*
 856          * Characters to ignore
 857          */
 858         port->ignore_status_mask = 0;
 859         if (termios->c_iflag & IGNPAR)
 860                 port->ignore_status_mask |= FE | PE;
 861         if (termios->c_iflag & IGNBRK) {
 862                 port->ignore_status_mask |= BI;
 863                 /*
 864                  * If we're ignoring parity and break indicators,
 865                  * ignore overruns too (for real raw support).
 866                  */
 867                 if (termios->c_iflag & IGNPAR)
 868                         port->ignore_status_mask |= OE;
 869         }
 870
 871         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 872         quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
 873         spin_lock_irqsave(&uart->port.lock, flags);
 874
 875         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 876
 877         /* Disable UART */
 878         ier = UART_GET_IER(uart);
 879         UART_DISABLE_INTS(uart);
 880
 881         /* Set DLAB in LCR to Access DLL and DLH */
 882         UART_SET_DLAB(uart);
 883
 884         UART_PUT_DLL(uart, quot & 0xFF);
 885         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 886         SSYNC();
 887
 888         /* Clear DLAB in LCR to Access THR RBR IER */
 889         UART_CLEAR_DLAB(uart);
 890
 891         UART_PUT_LCR(uart, lcr);
 892
 893         /* Enable UART */
 894         UART_ENABLE_INTS(uart, ier);
 895
 896         val = UART_GET_GCTL(uart);
 897         val |= UCEN;
 898         UART_PUT_GCTL(uart, val);
 899
 900         /* Port speed changed, update the per-port timeout. */
 901         uart_update_timeout(port, termios->c_cflag, baud);
 902
 903         spin_unlock_irqrestore(&uart->port.lock, flags);
 904 }
 905
 906 static const char *bfin_serial_type(struct uart_port *port)
 907 {
 908         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 909
 910         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 911 }
 912
 913 /*
 914  * Release the memory region(s) being used by 'port'.
 915  */
 916 static void bfin_serial_release_port(struct uart_port *port)
 917 {
 918 }
 919
 920 /*
 921  * Request the memory region(s) being used by 'port'.
 922  */
 923 static int bfin_serial_request_port(struct uart_port *port)
 924 {
 925         return 0;
 926 }
 927
 928 /*
 929  * Configure/autoconfigure the port.
 930  */
 931 static void bfin_serial_config_port(struct uart_port *port, int flags)
 932 {
 933         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 934
 935         if (flags & UART_CONFIG_TYPE &&
 936             bfin_serial_request_port(&uart->port) == 0)
 937                 uart->port.type = PORT_BFIN;
 938 }
 939
 940 /*
 941  * Verify the new serial_struct (for TIOCSSERIAL).
 942  * The only change we allow are to the flags and type, and
 943  * even then only between PORT_BFIN and PORT_UNKNOWN
 944  */
 945 static int
 946 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 947 {
 948         return 0;
 949 }
 950
 951 /*
 952  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 953  * In other cases, disable IrDA function.
 954  */
 955 static void bfin_serial_set_ldisc(struct uart_port *port)
 956 {
 957         int line = port->line;
 958         unsigned short val;
 959
 960         if (line >= port->state->port.tty->driver->num)
 961                 return;
 962
 963         switch (port->state->port.tty->termios->c_line) {
 964         case N_IRDA:
 965                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 966                 val |= (IREN | RPOLC);
 967                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 968                 break;
 969         default:
 970                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 971                 val &= ~(IREN | RPOLC);
 972                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 973         }
 974 }
 975
 976 static void bfin_serial_reset_irda(struct uart_port *port)
 977 {
 978         int line = port->line;
 979         unsigned short val;
 980
 981         val = UART_GET_GCTL(&bfin_serial_ports[line]);
 982         val &= ~(IREN | RPOLC);
 983         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 984         SSYNC();
 985         val |= (IREN | RPOLC);
 986         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 987         SSYNC();
 988 }
 989
 990 #ifdef CONFIG_CONSOLE_POLL
 991 /* Anomaly notes:
 992  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 993  *              losing other bits of UART_LSR is not a problem here.
 994  */
 995 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
 996 {
 997         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 998
 999         while (!(UART_GET_LSR(uart) & THRE))
1000                 cpu_relax();
1001
1002         UART_CLEAR_DLAB(uart);
1003         UART_PUT_CHAR(uart, (unsigned char)chr);
1004 }
1005
1006 static int bfin_serial_poll_get_char(struct uart_port *port)
1007 {
1008         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1009         unsigned char chr;
1010
1011         while (!(UART_GET_LSR(uart) & DR))
1012                 cpu_relax();
1013
1014         UART_CLEAR_DLAB(uart);
1015         chr = UART_GET_CHAR(uart);
1016
1017         return chr;
1018 }
1019 #endif
1020
1021 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1022         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1023 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1024 {
1025         if (kgdboc_break_enabled) {
1026                 kgdboc_break_enabled = 0;
1027                 bfin_serial_shutdown(port);
1028         }
1029 }
1030
1031 static int bfin_kgdboc_port_startup(struct uart_port *port)
1032 {
1033         kgdboc_port_line = port->line;
1034         kgdboc_break_enabled = !bfin_serial_startup(port);
1035         return 0;
1036 }
1037 #endif
1038
1039 static struct uart_ops bfin_serial_pops = {
1040         .tx_empty       = bfin_serial_tx_empty,
1041         .set_mctrl      = bfin_serial_set_mctrl,
1042         .get_mctrl      = bfin_serial_get_mctrl,
1043         .stop_tx        = bfin_serial_stop_tx,
1044         .start_tx       = bfin_serial_start_tx,
1045         .stop_rx        = bfin_serial_stop_rx,
1046         .enable_ms      = bfin_serial_enable_ms,
1047         .break_ctl      = bfin_serial_break_ctl,
1048         .startup        = bfin_serial_startup,
1049         .shutdown       = bfin_serial_shutdown,
1050         .set_termios    = bfin_serial_set_termios,
1051         .set_ldisc      = bfin_serial_set_ldisc,
1052         .type           = bfin_serial_type,
1053         .release_port   = bfin_serial_release_port,
1054         .request_port   = bfin_serial_request_port,
1055         .config_port    = bfin_serial_config_port,
1056         .verify_port    = bfin_serial_verify_port,
1057 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1058         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1059         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1060         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1061 #endif
1062 #ifdef CONFIG_CONSOLE_POLL
1063         .poll_put_char  = bfin_serial_poll_put_char,
1064         .poll_get_char  = bfin_serial_poll_get_char,
1065 #endif
1066 };
1067
1068 static void __init bfin_serial_hw_init(void)
1069 {
1070 #ifdef CONFIG_SERIAL_BFIN_UART0
1071         peripheral_request(P_UART0_TX, DRIVER_NAME);
1072         peripheral_request(P_UART0_RX, DRIVER_NAME);
1073 #endif
1074
1075 #ifdef CONFIG_SERIAL_BFIN_UART1
1076         peripheral_request(P_UART1_TX, DRIVER_NAME);
1077         peripheral_request(P_UART1_RX, DRIVER_NAME);
1078
1079 # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
1080         peripheral_request(P_UART1_RTS, DRIVER_NAME);
1081         peripheral_request(P_UART1_CTS, DRIVER_NAME);
1082 # endif
1083 #endif
1084
1085 #ifdef CONFIG_SERIAL_BFIN_UART2
1086         peripheral_request(P_UART2_TX, DRIVER_NAME);
1087         peripheral_request(P_UART2_RX, DRIVER_NAME);
1088 #endif
1089
1090 #ifdef CONFIG_SERIAL_BFIN_UART3
1091         peripheral_request(P_UART3_TX, DRIVER_NAME);
1092         peripheral_request(P_UART3_RX, DRIVER_NAME);
1093
1094 # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
1095         peripheral_request(P_UART3_RTS, DRIVER_NAME);
1096         peripheral_request(P_UART3_CTS, DRIVER_NAME);
1097 # endif
1098 #endif
1099 }
1100
1101 static void __init bfin_serial_init_ports(void)
1102 {
1103         static int first = 1;
1104         int i;
1105
1106         if (!first)
1107                 return;
1108         first = 0;
1109
1110         bfin_serial_hw_init();
1111
1112         for (i = 0; i < nr_active_ports; i++) {
1113                 spin_lock_init(&bfin_serial_ports[i].port.lock);
1114                 bfin_serial_ports[i].port.uartclk   = get_sclk();
1115                 bfin_serial_ports[i].port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1116                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
1117                 bfin_serial_ports[i].port.line      = i;
1118                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
1119                 bfin_serial_ports[i].port.membase   =
1120                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
1121                 bfin_serial_ports[i].port.mapbase   =
1122                         bfin_serial_resource[i].uart_base_addr;
1123                 bfin_serial_ports[i].port.irq       =
1124                         bfin_serial_resource[i].uart_irq;
1125                 bfin_serial_ports[i].status_irq     =
1126                         bfin_serial_resource[i].uart_status_irq;
1127                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
1128 #ifdef CONFIG_SERIAL_BFIN_DMA
1129                 bfin_serial_ports[i].tx_done        = 1;
1130                 bfin_serial_ports[i].tx_count       = 0;
1131                 bfin_serial_ports[i].tx_dma_channel =
1132                         bfin_serial_resource[i].uart_tx_dma_channel;
1133                 bfin_serial_ports[i].rx_dma_channel =
1134                         bfin_serial_resource[i].uart_rx_dma_channel;
1135                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
1136 #endif
1137 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1138         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1139                 bfin_serial_ports[i].cts_pin        =
1140                         bfin_serial_resource[i].uart_cts_pin;
1141                 bfin_serial_ports[i].rts_pin        =
1142                         bfin_serial_resource[i].uart_rts_pin;
1143 #endif
1144         }
1145 }
1146
1147 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1148 /*
1149  * If the port was already initialised (eg, by a boot loader),
1150  * try to determine the current setup.
1151  */
1152 static void __init
1153 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1154                            int *parity, int *bits)
1155 {
1156         unsigned short status;
1157
1158         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1159         if (status == (ERBFI | ETBEI)) {
1160                 /* ok, the port was enabled */
1161                 u16 lcr, dlh, dll;
1162
1163                 lcr = UART_GET_LCR(uart);
1164
1165                 *parity = 'n';
1166                 if (lcr & PEN) {
1167                         if (lcr & EPS)
1168                                 *parity = 'e';
1169                         else
1170                                 *parity = 'o';
1171                 }
1172                 switch (lcr & 0x03) {
1173                         case 0: *bits = 5; break;
1174                         case 1: *bits = 6; break;
1175                         case 2: *bits = 7; break;
1176                         case 3: *bits = 8; break;
1177                 }
1178                 /* Set DLAB in LCR to Access DLL and DLH */
1179                 UART_SET_DLAB(uart);
1180
1181                 dll = UART_GET_DLL(uart);
1182                 dlh = UART_GET_DLH(uart);
1183
1184                 /* Clear DLAB in LCR to Access THR RBR IER */
1185                 UART_CLEAR_DLAB(uart);
1186
1187                 *baud = get_sclk() / (16*(dll | dlh << 8));
1188         }
1189         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1190 }
1191
1192 static struct uart_driver bfin_serial_reg;
1193
1194 static int __init
1195 bfin_serial_console_setup(struct console *co, char *options)
1196 {
1197         struct bfin_serial_port *uart;
1198         int baud = 57600;
1199         int bits = 8;
1200         int parity = 'n';
1201 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1202         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1203         int flow = 'r';
1204 # else
1205         int flow = 'n';
1206 # endif
1207
1208         /*
1209          * Check whether an invalid uart number has been specified, and
1210          * if so, search for the first available port that does have
1211          * console support.
1212          */
1213         if (co->index == -1 || co->index >= nr_active_ports)
1214                 co->index = 0;
1215         uart = &bfin_serial_ports[co->index];
1216
1217         if (options)
1218                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1219         else
1220                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1221
1222         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1223 }
1224 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1225                                  defined (CONFIG_EARLY_PRINTK) */
1226
1227 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1228 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1229 {
1230         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1231         while (!(UART_GET_LSR(uart) & THRE))
1232                 barrier();
1233         UART_PUT_CHAR(uart, ch);
1234         SSYNC();
1235 }
1236
1237 /*
1238  * Interrupts are disabled on entering
1239  */
1240 static void
1241 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1242 {
1243         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1244         unsigned long flags;
1245
1246         spin_lock_irqsave(&uart->port.lock, flags);
1247         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1248         spin_unlock_irqrestore(&uart->port.lock, flags);
1249
1250 }
1251
1252 static struct console bfin_serial_console = {
1253         .name           = BFIN_SERIAL_NAME,
1254         .write          = bfin_serial_console_write,
1255         .device         = uart_console_device,
1256         .setup          = bfin_serial_console_setup,
1257         .flags          = CON_PRINTBUFFER,
1258         .index          = -1,
1259         .data           = &bfin_serial_reg,
1260 };
1261
1262 static int __init bfin_serial_rs_console_init(void)
1263 {
1264         bfin_serial_init_ports();
1265         register_console(&bfin_serial_console);
1266
1267         return 0;
1268 }
1269 console_initcall(bfin_serial_rs_console_init);
1270
1271 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1272 #else
1273 #define BFIN_SERIAL_CONSOLE     NULL
1274 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1275
1276
1277 #ifdef CONFIG_EARLY_PRINTK
1278 static __init void early_serial_putc(struct uart_port *port, int ch)
1279 {
1280         unsigned timeout = 0xffff;
1281         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1282
1283         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1284                 cpu_relax();
1285         UART_PUT_CHAR(uart, ch);
1286 }
1287
1288 static __init void early_serial_write(struct console *con, const char *s,
1289                                         unsigned int n)
1290 {
1291         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1292         unsigned int i;
1293
1294         for (i = 0; i < n; i++, s++) {
1295                 if (*s == '\n')
1296                         early_serial_putc(&uart->port, '\r');
1297                 early_serial_putc(&uart->port, *s);
1298         }
1299 }
1300
1301 /*
1302  * This should have a .setup or .early_setup in it, but then things get called
1303  * without the command line options, and the baud rate gets messed up - so
1304  * don't let the common infrastructure play with things. (see calls to setup
1305  * & earlysetup in ./kernel/printk.c:register_console()
1306  */
1307 static struct __initdata console bfin_early_serial_console = {
1308         .name = "early_BFuart",
1309         .write = early_serial_write,
1310         .device = uart_console_device,
1311         .flags = CON_PRINTBUFFER,
1312         .index = -1,
1313         .data  = &bfin_serial_reg,
1314 };
1315
1316 struct console __init *bfin_earlyserial_init(unsigned int port,
1317                                                 unsigned int cflag)
1318 {
1319         struct bfin_serial_port *uart;
1320         struct ktermios t;
1321
1322         if (port == -1 || port >= nr_active_ports)
1323                 port = 0;
1324         bfin_serial_init_ports();
1325         bfin_early_serial_console.index = port;
1326         uart = &bfin_serial_ports[port];
1327         t.c_cflag = cflag;
1328         t.c_iflag = 0;
1329         t.c_oflag = 0;
1330         t.c_lflag = ICANON;
1331         t.c_line = port;
1332         bfin_serial_set_termios(&uart->port, &t, &t);
1333         return &bfin_early_serial_console;
1334 }
1335
1336 #endif /* CONFIG_EARLY_PRINTK */
1337
1338 static struct uart_driver bfin_serial_reg = {
1339         .owner                  = THIS_MODULE,
1340         .driver_name            = "bfin-uart",
1341         .dev_name               = BFIN_SERIAL_NAME,
1342         .major                  = BFIN_SERIAL_MAJOR,
1343         .minor                  = BFIN_SERIAL_MINOR,
1344         .nr                     = BFIN_UART_NR_PORTS,
1345         .cons                   = BFIN_SERIAL_CONSOLE,
1346 };
1347
1348 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1349 {
1350         int i;
1351
1352         for (i = 0; i < nr_active_ports; i++) {
1353                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1354                         continue;
1355                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1356         }
1357
1358         return 0;
1359 }
1360
1361 static int bfin_serial_resume(struct platform_device *dev)
1362 {
1363         int i;
1364
1365         for (i = 0; i < nr_active_ports; i++) {
1366                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1367                         continue;
1368                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1369         }
1370
1371         return 0;
1372 }
1373
1374 static int bfin_serial_probe(struct platform_device *dev)
1375 {
1376         struct resource *res = dev->resource;
1377         int i;
1378
1379         for (i = 0; i < dev->num_resources; i++, res++)
1380                 if (res->flags & IORESOURCE_MEM)
1381                         break;
1382
1383         if (i < dev->num_resources) {
1384                 for (i = 0; i < nr_active_ports; i++, res++) {
1385                         if (bfin_serial_ports[i].port.mapbase != res->start)
1386                                 continue;
1387                         bfin_serial_ports[i].port.dev = &dev->dev;
1388                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1389                 }
1390         }
1391
1392         return 0;
1393 }
1394
1395 static int bfin_serial_remove(struct platform_device *dev)
1396 {
1397         int i;
1398
1399         for (i = 0; i < nr_active_ports; i++) {
1400                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1401                         continue;
1402                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1403                 bfin_serial_ports[i].port.dev = NULL;
1404 #if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1405                 gpio_free(bfin_serial_ports[i].cts_pin);
1406                 gpio_free(bfin_serial_ports[i].rts_pin);
1407 #endif
1408         }
1409
1410         return 0;
1411 }
1412
1413 static struct platform_driver bfin_serial_driver = {
1414         .probe          = bfin_serial_probe,
1415         .remove         = bfin_serial_remove,
1416         .suspend        = bfin_serial_suspend,
1417         .resume         = bfin_serial_resume,
1418         .driver         = {
1419                 .name   = "bfin-uart",
1420                 .owner  = THIS_MODULE,
1421         },
1422 };
1423
1424 static int __init bfin_serial_init(void)
1425 {
1426         int ret;
1427
1428         pr_info("Serial: Blackfin serial driver\n");
1429
1430         bfin_serial_init_ports();
1431
1432         ret = uart_register_driver(&bfin_serial_reg);
1433         if (ret == 0) {
1434                 ret = platform_driver_register(&bfin_serial_driver);
1435                 if (ret) {
1436                         pr_debug("uart register failed\n");
1437                         uart_unregister_driver(&bfin_serial_reg);
1438                 }
1439         }
1440         return ret;
1441 }
1442
1443 static void __exit bfin_serial_exit(void)
1444 {
1445         platform_driver_unregister(&bfin_serial_driver);
1446         uart_unregister_driver(&bfin_serial_reg);
1447 }
1448
1449
1450 module_init(bfin_serial_init);
1451 module_exit(bfin_serial_exit);
1452
1453 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1454 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1455 MODULE_LICENSE("GPL");
1456 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1457 MODULE_ALIAS("platform:bfin-uart");