drivers/serial/bfin_5xx.c

   1 /*
   2  * Blackfin On-Chip Serial Driver
   3  *
   4  * Copyright 2006-2008 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12 #define SUPPORT_SYSRQ
  13 #endif
  14
  15 #include <linux/module.h>
  16 #include <linux/ioport.h>
  17 #include <linux/init.h>
  18 #include <linux/console.h>
  19 #include <linux/sysrq.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/tty.h>
  22 #include <linux/tty_flip.h>
  23 #include <linux/serial_core.h>
  24
  25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  26         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  27 #include <linux/kgdb.h>
  28 #include <asm/irq_regs.h>
  29 #endif
  30
  31 #include <asm/gpio.h>
  32 #include <mach/bfin_serial_5xx.h>
  33
  34 #ifdef CONFIG_SERIAL_BFIN_DMA
  35 #include <linux/dma-mapping.h>
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/cacheflush.h>
  39 #endif
  40
  41 #ifdef CONFIG_SERIAL_BFIN_MODULE
  42 # undef CONFIG_EARLY_PRINTK
  43 #endif
  44
  45 #ifdef CONFIG_SERIAL_BFIN_MODULE
  46 # undef CONFIG_EARLY_PRINTK
  47 #endif
  48
  49 /* UART name and device definitions */
  50 #define BFIN_SERIAL_NAME        "ttyBF"
  51 #define BFIN_SERIAL_MAJOR       204
  52 #define BFIN_SERIAL_MINOR       64
  53
  54 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
  55 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
  56
  57 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  58         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  59
  60 # ifndef CONFIG_SERIAL_BFIN_PIO
  61 #  error KGDB only support UART in PIO mode.
  62 # endif
  63
  64 static int kgdboc_port_line;
  65 static int kgdboc_break_enabled;
  66 #endif
  67 /*
  68  * Setup for console. Argument comes from the menuconfig
  69  */
  70 #define DMA_RX_XCOUNT           512
  71 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  72
  73 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  74
  75 #ifdef CONFIG_SERIAL_BFIN_DMA
  76 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  77 #else
  78 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  79 #endif
  80
  81 static void bfin_serial_reset_irda(struct uart_port *port);
  82
  83 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  84         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  85 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  86 {
  87         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  88         if (uart->cts_pin < 0)
  89                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  90
  91         /* CTS PIN is negative assertive. */
  92         if (UART_GET_CTS(uart))
  93                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  94         else
  95                 return TIOCM_DSR | TIOCM_CAR;
  96 }
  97
  98 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  99 {
 100         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 101         if (uart->rts_pin < 0)
 102                 return;
 103
 104         /* RTS PIN is negative assertive. */
 105         if (mctrl & TIOCM_RTS)
 106                 UART_ENABLE_RTS(uart);
 107         else
 108                 UART_DISABLE_RTS(uart);
 109 }
 110
 111 /*
 112  * Handle any change of modem status signal.
 113  */
 114 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 115 {
 116         struct bfin_serial_port *uart = dev_id;
 117         unsigned int status;
 118
 119         status = bfin_serial_get_mctrl(&uart->port);
 120         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 121 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 122         uart->scts = 1;
 123         UART_CLEAR_SCTS(uart);
 124         UART_CLEAR_IER(uart, EDSSI);
 125 #endif
 126
 127         return IRQ_HANDLED;
 128 }
 129 #else
 130 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 131 {
 132         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 133 }
 134
 135 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 136 {
 137 }
 138 #endif
 139
 140 /*
 141  * interrupts are disabled on entry
 142  */
 143 static void bfin_serial_stop_tx(struct uart_port *port)
 144 {
 145         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 146 #ifdef CONFIG_SERIAL_BFIN_DMA
 147         struct circ_buf *xmit = &uart->port.state->xmit;
 148 #endif
 149
 150         while (!(UART_GET_LSR(uart) & TEMT))
 151                 cpu_relax();
 152
 153 #ifdef CONFIG_SERIAL_BFIN_DMA
 154         disable_dma(uart->tx_dma_channel);
 155         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 156         uart->port.icount.tx += uart->tx_count;
 157         uart->tx_count = 0;
 158         uart->tx_done = 1;
 159 #else
 160 #ifdef CONFIG_BF54x
 161         /* Clear TFI bit */
 162         UART_PUT_LSR(uart, TFI);
 163 #endif
 164         UART_CLEAR_IER(uart, ETBEI);
 165 #endif
 166 }
 167
 168 /*
 169  * port is locked and interrupts are disabled
 170  */
 171 static void bfin_serial_start_tx(struct uart_port *port)
 172 {
 173         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 174         struct tty_struct *tty = uart->port.state->port.tty;
 175
 176 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 177         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 178                 uart->scts = 0;
 179                 uart_handle_cts_change(&uart->port, uart->scts);
 180         }
 181 #endif
 182
 183         /*
 184          * To avoid losting RX interrupt, we reset IR function
 185          * before sending data.
 186          */
 187         if (tty->termios->c_line == N_IRDA)
 188                 bfin_serial_reset_irda(port);
 189
 190 #ifdef CONFIG_SERIAL_BFIN_DMA
 191         if (uart->tx_done)
 192                 bfin_serial_dma_tx_chars(uart);
 193 #else
 194         UART_SET_IER(uart, ETBEI);
 195         bfin_serial_tx_chars(uart);
 196 #endif
 197 }
 198
 199 /*
 200  * Interrupts are enabled
 201  */
 202 static void bfin_serial_stop_rx(struct uart_port *port)
 203 {
 204         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 205
 206         UART_CLEAR_IER(uart, ERBFI);
 207 }
 208
 209 /*
 210  * Set the modem control timer to fire immediately.
 211  */
 212 static void bfin_serial_enable_ms(struct uart_port *port)
 213 {
 214 }
 215
 216
 217 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 218 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 219 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 220 #else
 221 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
 222 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
 223 #endif
 224
 225 #ifdef CONFIG_SERIAL_BFIN_PIO
 226 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 227 {
 228         struct tty_struct *tty = NULL;
 229         unsigned int status, ch, flg;
 230         static struct timeval anomaly_start = { .tv_sec = 0 };
 231
 232         status = UART_GET_LSR(uart);
 233         UART_CLEAR_LSR(uart);
 234
 235         ch = UART_GET_CHAR(uart);
 236         uart->port.icount.rx++;
 237
 238 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 239         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 240         if (kgdb_connected && kgdboc_port_line == uart->port.line)
 241                 if (ch == 0x3) {/* Ctrl + C */
 242                         kgdb_breakpoint();
 243                         return;
 244                 }
 245
 246         if (!uart->port.state || !uart->port.state->port.tty)
 247                 return;
 248 #endif
 249         tty = uart->port.state->port.tty;
 250
 251         if (ANOMALY_05000363) {
 252                 /* The BF533 (and BF561) family of processors have a nice anomaly
 253                  * where they continuously generate characters for a "single" break.
 254                  * We have to basically ignore this flood until the "next" valid
 255                  * character comes across.  Due to the nature of the flood, it is
 256                  * not possible to reliably catch bytes that are sent too quickly
 257                  * after this break.  So application code talking to the Blackfin
 258                  * which sends a break signal must allow at least 1.5 character
 259                  * times after the end of the break for things to stabilize.  This
 260                  * timeout was picked as it must absolutely be larger than 1
 261                  * character time +/- some percent.  So 1.5 sounds good.  All other
 262                  * Blackfin families operate properly.  Woo.
 263                  */
 264                 if (anomaly_start.tv_sec) {
 265                         struct timeval curr;
 266                         suseconds_t usecs;
 267
 268                         if ((~ch & (~ch + 1)) & 0xff)
 269                                 goto known_good_char;
 270
 271                         do_gettimeofday(&curr);
 272                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
 273                                 goto known_good_char;
 274
 275                         usecs = 0;
 276                         if (curr.tv_sec != anomaly_start.tv_sec)
 277                                 usecs += USEC_PER_SEC;
 278                         usecs += curr.tv_usec - anomaly_start.tv_usec;
 279
 280                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 281                                 goto known_good_char;
 282
 283                         if (ch)
 284                                 anomaly_start.tv_sec = 0;
 285                         else
 286                                 anomaly_start = curr;
 287
 288                         return;
 289
 290  known_good_char:
 291                         status &= ~BI;
 292                         anomaly_start.tv_sec = 0;
 293                 }
 294         }
 295
 296         if (status & BI) {
 297                 if (ANOMALY_05000363)
 298                         if (bfin_revid() < 5)
 299                                 do_gettimeofday(&anomaly_start);
 300                 uart->port.icount.brk++;
 301                 if (uart_handle_break(&uart->port))
 302                         goto ignore_char;
 303                 status &= ~(PE | FE);
 304         }
 305         if (status & PE)
 306                 uart->port.icount.parity++;
 307         if (status & OE)
 308                 uart->port.icount.overrun++;
 309         if (status & FE)
 310                 uart->port.icount.frame++;
 311
 312         status &= uart->port.read_status_mask;
 313
 314         if (status & BI)
 315                 flg = TTY_BREAK;
 316         else if (status & PE)
 317                 flg = TTY_PARITY;
 318         else if (status & FE)
 319                 flg = TTY_FRAME;
 320         else
 321                 flg = TTY_NORMAL;
 322
 323         if (uart_handle_sysrq_char(&uart->port, ch))
 324                 goto ignore_char;
 325
 326         uart_insert_char(&uart->port, status, OE, ch, flg);
 327
 328  ignore_char:
 329         tty_flip_buffer_push(tty);
 330 }
 331
 332 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 333 {
 334         struct circ_buf *xmit = &uart->port.state->xmit;
 335
 336         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 337 #ifdef CONFIG_BF54x
 338                 /* Clear TFI bit */
 339                 UART_PUT_LSR(uart, TFI);
 340 #endif
 341                 /* Anomaly notes:
 342                  *  05000215 -  we always clear ETBEI within last UART TX
 343                  *              interrupt to end a string. It is always set
 344                  *              when start a new tx.
 345                  */
 346                 UART_CLEAR_IER(uart, ETBEI);
 347                 return;
 348         }
 349
 350         if (uart->port.x_char) {
 351                 UART_PUT_CHAR(uart, uart->port.x_char);
 352                 uart->port.icount.tx++;
 353                 uart->port.x_char = 0;
 354         }
 355
 356         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 357                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 358                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 359                 uart->port.icount.tx++;
 360                 SSYNC();
 361         }
 362
 363         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 364                 uart_write_wakeup(&uart->port);
 365 }
 366
 367 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 368 {
 369         struct bfin_serial_port *uart = dev_id;
 370
 371         spin_lock(&uart->port.lock);
 372         while (UART_GET_LSR(uart) & DR)
 373                 bfin_serial_rx_chars(uart);
 374         spin_unlock(&uart->port.lock);
 375
 376         return IRQ_HANDLED;
 377 }
 378
 379 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 380 {
 381         struct bfin_serial_port *uart = dev_id;
 382
 383 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 384         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 385                 uart->scts = 0;
 386                 uart_handle_cts_change(&uart->port, uart->scts);
 387         }
 388 #endif
 389         spin_lock(&uart->port.lock);
 390         if (UART_GET_LSR(uart) & THRE)
 391                 bfin_serial_tx_chars(uart);
 392         spin_unlock(&uart->port.lock);
 393
 394         return IRQ_HANDLED;
 395 }
 396 #endif
 397
 398 #ifdef CONFIG_SERIAL_BFIN_DMA
 399 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 400 {
 401         struct circ_buf *xmit = &uart->port.state->xmit;
 402
 403         uart->tx_done = 0;
 404
 405         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 406                 uart->tx_count = 0;
 407                 uart->tx_done = 1;
 408                 return;
 409         }
 410
 411         if (uart->port.x_char) {
 412                 UART_PUT_CHAR(uart, uart->port.x_char);
 413                 uart->port.icount.tx++;
 414                 uart->port.x_char = 0;
 415         }
 416
 417         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 418         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 419                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 420         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 421                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 422         set_dma_config(uart->tx_dma_channel,
 423                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 424                         INTR_ON_BUF,
 425                         DIMENSION_LINEAR,
 426                         DATA_SIZE_8,
 427                         DMA_SYNC_RESTART));
 428         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 429         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 430         set_dma_x_modify(uart->tx_dma_channel, 1);
 431         SSYNC();
 432         enable_dma(uart->tx_dma_channel);
 433
 434         UART_SET_IER(uart, ETBEI);
 435 }
 436
 437 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 438 {
 439         struct tty_struct *tty = uart->port.state->port.tty;
 440         int i, flg, status;
 441
 442         status = UART_GET_LSR(uart);
 443         UART_CLEAR_LSR(uart);
 444
 445         uart->port.icount.rx +=
 446                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 447                 UART_XMIT_SIZE);
 448
 449         if (status & BI) {
 450                 uart->port.icount.brk++;
 451                 if (uart_handle_break(&uart->port))
 452                         goto dma_ignore_char;
 453                 status &= ~(PE | FE);
 454         }
 455         if (status & PE)
 456                 uart->port.icount.parity++;
 457         if (status & OE)
 458                 uart->port.icount.overrun++;
 459         if (status & FE)
 460                 uart->port.icount.frame++;
 461
 462         status &= uart->port.read_status_mask;
 463
 464         if (status & BI)
 465                 flg = TTY_BREAK;
 466         else if (status & PE)
 467                 flg = TTY_PARITY;
 468         else if (status & FE)
 469                 flg = TTY_FRAME;
 470         else
 471                 flg = TTY_NORMAL;
 472
 473         for (i = uart->rx_dma_buf.tail; ; i++) {
 474                 if (i >= UART_XMIT_SIZE)
 475                         i = 0;
 476                 if (i == uart->rx_dma_buf.head)
 477                         break;
 478                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 479                         uart_insert_char(&uart->port, status, OE,
 480                                 uart->rx_dma_buf.buf[i], flg);
 481         }
 482
 483  dma_ignore_char:
 484         tty_flip_buffer_push(tty);
 485 }
 486
 487 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 488 {
 489         int x_pos, pos;
 490
 491         dma_disable_irq(uart->tx_dma_channel);
 492         dma_disable_irq(uart->rx_dma_channel);
 493         spin_lock_bh(&uart->port.lock);
 494
 495         /* 2D DMA RX buffer ring is used. Because curr_y_count and
 496          * curr_x_count can't be read as an atomic operation,
 497          * curr_y_count should be read before curr_x_count. When
 498          * curr_x_count is read, curr_y_count may already indicate
 499          * next buffer line. But, the position calculated here is
 500          * still indicate the old line. The wrong position data may
 501          * be smaller than current buffer tail, which cause garbages
 502          * are received if it is not prohibit.
 503          */
 504         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 505         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 506         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 507         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 508                 uart->rx_dma_nrows = 0;
 509         x_pos = DMA_RX_XCOUNT - x_pos;
 510         if (x_pos == DMA_RX_XCOUNT)
 511                 x_pos = 0;
 512
 513         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 514         /* Ignore receiving data if new position is in the same line of
 515          * current buffer tail and small.
 516          */
 517         if (pos > uart->rx_dma_buf.tail ||
 518                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 519                 uart->rx_dma_buf.head = pos;
 520                 bfin_serial_dma_rx_chars(uart);
 521                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 522         }
 523
 524         spin_unlock_bh(&uart->port.lock);
 525         dma_enable_irq(uart->tx_dma_channel);
 526         dma_enable_irq(uart->rx_dma_channel);
 527
 528         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 529 }
 530
 531 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 532 {
 533         struct bfin_serial_port *uart = dev_id;
 534         struct circ_buf *xmit = &uart->port.state->xmit;
 535
 536 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 537         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
 538                 uart->scts = 0;
 539                 uart_handle_cts_change(&uart->port, uart->scts);
 540         }
 541 #endif
 542
 543         spin_lock(&uart->port.lock);
 544         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 545                 disable_dma(uart->tx_dma_channel);
 546                 clear_dma_irqstat(uart->tx_dma_channel);
 547                 /* Anomaly notes:
 548                  *  05000215 -  we always clear ETBEI within last UART TX
 549                  *              interrupt to end a string. It is always set
 550                  *              when start a new tx.
 551                  */
 552                 UART_CLEAR_IER(uart, ETBEI);
 553                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 554                 uart->port.icount.tx += uart->tx_count;
 555
 556                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 557                         uart_write_wakeup(&uart->port);
 558
 559                 bfin_serial_dma_tx_chars(uart);
 560         }
 561
 562         spin_unlock(&uart->port.lock);
 563         return IRQ_HANDLED;
 564 }
 565
 566 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 567 {
 568         struct bfin_serial_port *uart = dev_id;
 569         unsigned short irqstat;
 570         int x_pos, pos;
 571
 572         spin_lock(&uart->port.lock);
 573         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 574         clear_dma_irqstat(uart->rx_dma_channel);
 575
 576         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 577         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 578         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 579         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 580                 uart->rx_dma_nrows = 0;
 581
 582         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 583         if (pos > uart->rx_dma_buf.tail ||
 584                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 585                 uart->rx_dma_buf.head = pos;
 586                 bfin_serial_dma_rx_chars(uart);
 587                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 588         }
 589
 590         spin_unlock(&uart->port.lock);
 591
 592         return IRQ_HANDLED;
 593 }
 594 #endif
 595
 596 /*
 597  * Return TIOCSER_TEMT when transmitter is not busy.
 598  */
 599 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 600 {
 601         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 602         unsigned short lsr;
 603
 604         lsr = UART_GET_LSR(uart);
 605         if (lsr & TEMT)
 606                 return TIOCSER_TEMT;
 607         else
 608                 return 0;
 609 }
 610
 611 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 612 {
 613         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 614         u16 lcr = UART_GET_LCR(uart);
 615         if (break_state)
 616                 lcr |= SB;
 617         else
 618                 lcr &= ~SB;
 619         UART_PUT_LCR(uart, lcr);
 620         SSYNC();
 621 }
 622
 623 static int bfin_serial_startup(struct uart_port *port)
 624 {
 625         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 626
 627 #ifdef CONFIG_SERIAL_BFIN_DMA
 628         dma_addr_t dma_handle;
 629
 630         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 631                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 632                 return -EBUSY;
 633         }
 634
 635         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 636                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 637                 free_dma(uart->rx_dma_channel);
 638                 return -EBUSY;
 639         }
 640
 641         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 642         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 643
 644         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 645         uart->rx_dma_buf.head = 0;
 646         uart->rx_dma_buf.tail = 0;
 647         uart->rx_dma_nrows = 0;
 648
 649         set_dma_config(uart->rx_dma_channel,
 650                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 651                                 INTR_ON_ROW, DIMENSION_2D,
 652                                 DATA_SIZE_8,
 653                                 DMA_SYNC_RESTART));
 654         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 655         set_dma_x_modify(uart->rx_dma_channel, 1);
 656         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 657         set_dma_y_modify(uart->rx_dma_channel, 1);
 658         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 659         enable_dma(uart->rx_dma_channel);
 660
 661         uart->rx_dma_timer.data = (unsigned long)(uart);
 662         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 663         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 664         add_timer(&(uart->rx_dma_timer));
 665 #else
 666 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 667         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 668         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 669                 kgdboc_break_enabled = 0;
 670         else {
 671 # endif
 672         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
 673              "BFIN_UART_RX", uart)) {
 674                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 675                 return -EBUSY;
 676         }
 677
 678         if (request_irq
 679             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
 680              "BFIN_UART_TX", uart)) {
 681                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 682                 free_irq(uart->port.irq, uart);
 683                 return -EBUSY;
 684         }
 685
 686 # ifdef CONFIG_BF54x
 687         {
 688                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 689
 690                 switch (uart->port.irq) {
 691                 case IRQ_UART3_RX:
 692                         uart_dma_ch_rx = CH_UART3_RX;
 693                         uart_dma_ch_tx = CH_UART3_TX;
 694                         break;
 695                 case IRQ_UART2_RX:
 696                         uart_dma_ch_rx = CH_UART2_RX;
 697                         uart_dma_ch_tx = CH_UART2_TX;
 698                         break;
 699                 default:
 700                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
 701                         break;
 702                 };
 703
 704                 if (uart_dma_ch_rx &&
 705                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 706                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 707                         free_irq(uart->port.irq, uart);
 708                         free_irq(uart->port.irq + 1, uart);
 709                         return -EBUSY;
 710                 }
 711                 if (uart_dma_ch_tx &&
 712                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 713                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 714                         free_dma(uart_dma_ch_rx);
 715                         free_irq(uart->port.irq, uart);
 716                         free_irq(uart->port.irq + 1, uart);
 717                         return -EBUSY;
 718                 }
 719         }
 720 # endif
 721 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 722         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 723         }
 724 # endif
 725 #endif
 726
 727 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 728         if (uart->cts_pin >= 0) {
 729                 if (request_irq(gpio_to_irq(uart->cts_pin),
 730                         bfin_serial_mctrl_cts_int,
 731                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 732                         IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
 733                         uart->cts_pin = -1;
 734                         pr_info("Unable to attach BlackFin UART CTS interrupt.\
 735                                  So, disable it.\n");
 736                 }
 737         }
 738         if (uart->rts_pin >= 0) {
 739                 gpio_request(uart->rts_pin, DRIVER_NAME);
 740                 gpio_direction_output(uart->rts_pin, 0);
 741         }
 742 #endif
 743 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 744         if (request_irq(uart->status_irq,
 745                 bfin_serial_mctrl_cts_int,
 746                 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
 747                 pr_info("Unable to attach BlackFin UART Modem \
 748                         Status interrupt.\n");
 749         }
 750
 751         /* CTS RTS PINs are negative assertive. */
 752         UART_PUT_MCR(uart, ACTS);
 753         UART_SET_IER(uart, EDSSI);
 754 #endif
 755
 756         UART_SET_IER(uart, ERBFI);
 757         return 0;
 758 }
 759
 760 static void bfin_serial_shutdown(struct uart_port *port)
 761 {
 762         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 763
 764 #ifdef CONFIG_SERIAL_BFIN_DMA
 765         disable_dma(uart->tx_dma_channel);
 766         free_dma(uart->tx_dma_channel);
 767         disable_dma(uart->rx_dma_channel);
 768         free_dma(uart->rx_dma_channel);
 769         del_timer(&(uart->rx_dma_timer));
 770         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 771 #else
 772 #ifdef CONFIG_BF54x
 773         switch (uart->port.irq) {
 774         case IRQ_UART3_RX:
 775                 free_dma(CH_UART3_RX);
 776                 free_dma(CH_UART3_TX);
 777                 break;
 778         case IRQ_UART2_RX:
 779                 free_dma(CH_UART2_RX);
 780                 free_dma(CH_UART2_TX);
 781                 break;
 782         default:
 783                 break;
 784         };
 785 #endif
 786         free_irq(uart->port.irq, uart);
 787         free_irq(uart->port.irq+1, uart);
 788 #endif
 789
 790 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 791         if (uart->cts_pin >= 0)
 792                 free_irq(gpio_to_irq(uart->cts_pin), uart);
 793         if (uart->rts_pin >= 0)
 794                 gpio_free(uart->rts_pin);
 795 #endif
 796 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 797         if (UART_GET_IER(uart) && EDSSI)
 798                 free_irq(uart->status_irq, uart);
 799 #endif
 800 }
 801
 802 static void
 803 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 804                    struct ktermios *old)
 805 {
 806         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 807         unsigned long flags;
 808         unsigned int baud, quot;
 809         unsigned short val, ier, lcr = 0;
 810
 811         switch (termios->c_cflag & CSIZE) {
 812         case CS8:
 813                 lcr = WLS(8);
 814                 break;
 815         case CS7:
 816                 lcr = WLS(7);
 817                 break;
 818         case CS6:
 819                 lcr = WLS(6);
 820                 break;
 821         case CS5:
 822                 lcr = WLS(5);
 823                 break;
 824         default:
 825                 printk(KERN_ERR "%s: word lengh not supported\n",
 826                         __func__);
 827         }
 828
 829         /* Anomaly notes:
 830          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
 831          */
 832         if (termios->c_cflag & CSTOPB) {
 833                 if (ANOMALY_05000231)
 834                         printk(KERN_WARNING "STOP bits other than 1 is not "
 835                                 "supported in case of anomaly 05000231.\n");
 836                 else
 837                         lcr |= STB;
 838         }
 839         if (termios->c_cflag & PARENB)
 840                 lcr |= PEN;
 841         if (!(termios->c_cflag & PARODD))
 842                 lcr |= EPS;
 843         if (termios->c_cflag & CMSPAR)
 844                 lcr |= STP;
 845
 846         port->read_status_mask = OE;
 847         if (termios->c_iflag & INPCK)
 848                 port->read_status_mask |= (FE | PE);
 849         if (termios->c_iflag & (BRKINT | PARMRK))
 850                 port->read_status_mask |= BI;
 851
 852         /*
 853          * Characters to ignore
 854          */
 855         port->ignore_status_mask = 0;
 856         if (termios->c_iflag & IGNPAR)
 857                 port->ignore_status_mask |= FE | PE;
 858         if (termios->c_iflag & IGNBRK) {
 859                 port->ignore_status_mask |= BI;
 860                 /*
 861                  * If we're ignoring parity and break indicators,
 862                  * ignore overruns too (for real raw support).
 863                  */
 864                 if (termios->c_iflag & IGNPAR)
 865                         port->ignore_status_mask |= OE;
 866         }
 867
 868         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 869         quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
 870         spin_lock_irqsave(&uart->port.lock, flags);
 871
 872         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 873
 874         /* Disable UART */
 875         ier = UART_GET_IER(uart);
 876         UART_DISABLE_INTS(uart);
 877
 878         /* Set DLAB in LCR to Access DLL and DLH */
 879         UART_SET_DLAB(uart);
 880
 881         UART_PUT_DLL(uart, quot & 0xFF);
 882         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 883         SSYNC();
 884
 885         /* Clear DLAB in LCR to Access THR RBR IER */
 886         UART_CLEAR_DLAB(uart);
 887
 888         UART_PUT_LCR(uart, lcr);
 889
 890         /* Enable UART */
 891         UART_ENABLE_INTS(uart, ier);
 892
 893         val = UART_GET_GCTL(uart);
 894         val |= UCEN;
 895         UART_PUT_GCTL(uart, val);
 896
 897         /* Port speed changed, update the per-port timeout. */
 898         uart_update_timeout(port, termios->c_cflag, baud);
 899
 900         spin_unlock_irqrestore(&uart->port.lock, flags);
 901 }
 902
 903 static const char *bfin_serial_type(struct uart_port *port)
 904 {
 905         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 906
 907         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 908 }
 909
 910 /*
 911  * Release the memory region(s) being used by 'port'.
 912  */
 913 static void bfin_serial_release_port(struct uart_port *port)
 914 {
 915 }
 916
 917 /*
 918  * Request the memory region(s) being used by 'port'.
 919  */
 920 static int bfin_serial_request_port(struct uart_port *port)
 921 {
 922         return 0;
 923 }
 924
 925 /*
 926  * Configure/autoconfigure the port.
 927  */
 928 static void bfin_serial_config_port(struct uart_port *port, int flags)
 929 {
 930         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 931
 932         if (flags & UART_CONFIG_TYPE &&
 933             bfin_serial_request_port(&uart->port) == 0)
 934                 uart->port.type = PORT_BFIN;
 935 }
 936
 937 /*
 938  * Verify the new serial_struct (for TIOCSSERIAL).
 939  * The only change we allow are to the flags and type, and
 940  * even then only between PORT_BFIN and PORT_UNKNOWN
 941  */
 942 static int
 943 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 944 {
 945         return 0;
 946 }
 947
 948 /*
 949  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 950  * In other cases, disable IrDA function.
 951  */
 952 static void bfin_serial_set_ldisc(struct uart_port *port)
 953 {
 954         int line = port->line;
 955         unsigned short val;
 956
 957         if (line >= port->state->port.tty->driver->num)
 958                 return;
 959
 960         switch (port->state->port.tty->termios->c_line) {
 961         case N_IRDA:
 962                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 963                 val |= (IREN | RPOLC);
 964                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 965                 break;
 966         default:
 967                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 968                 val &= ~(IREN | RPOLC);
 969                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 970         }
 971 }
 972
 973 static void bfin_serial_reset_irda(struct uart_port *port)
 974 {
 975         int line = port->line;
 976         unsigned short val;
 977
 978         val = UART_GET_GCTL(&bfin_serial_ports[line]);
 979         val &= ~(IREN | RPOLC);
 980         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 981         SSYNC();
 982         val |= (IREN | RPOLC);
 983         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 984         SSYNC();
 985 }
 986
 987 #ifdef CONFIG_CONSOLE_POLL
 988 /* Anomaly notes:
 989  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 990  *              losing other bits of UART_LSR is not a problem here.
 991  */
 992 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
 993 {
 994         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 995
 996         while (!(UART_GET_LSR(uart) & THRE))
 997                 cpu_relax();
 998
 999         UART_CLEAR_DLAB(uart);
1000         UART_PUT_CHAR(uart, (unsigned char)chr);
1001 }
1002
1003 static int bfin_serial_poll_get_char(struct uart_port *port)
1004 {
1005         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1006         unsigned char chr;
1007
1008         while (!(UART_GET_LSR(uart) & DR))
1009                 cpu_relax();
1010
1011         UART_CLEAR_DLAB(uart);
1012         chr = UART_GET_CHAR(uart);
1013
1014         return chr;
1015 }
1016 #endif
1017
1018 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1019         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1020 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1021 {
1022         if (kgdboc_break_enabled) {
1023                 kgdboc_break_enabled = 0;
1024                 bfin_serial_shutdown(port);
1025         }
1026 }
1027
1028 static int bfin_kgdboc_port_startup(struct uart_port *port)
1029 {
1030         kgdboc_port_line = port->line;
1031         kgdboc_break_enabled = !bfin_serial_startup(port);
1032         return 0;
1033 }
1034 #endif
1035
1036 static struct uart_ops bfin_serial_pops = {
1037         .tx_empty       = bfin_serial_tx_empty,
1038         .set_mctrl      = bfin_serial_set_mctrl,
1039         .get_mctrl      = bfin_serial_get_mctrl,
1040         .stop_tx        = bfin_serial_stop_tx,
1041         .start_tx       = bfin_serial_start_tx,
1042         .stop_rx        = bfin_serial_stop_rx,
1043         .enable_ms      = bfin_serial_enable_ms,
1044         .break_ctl      = bfin_serial_break_ctl,
1045         .startup        = bfin_serial_startup,
1046         .shutdown       = bfin_serial_shutdown,
1047         .set_termios    = bfin_serial_set_termios,
1048         .set_ldisc      = bfin_serial_set_ldisc,
1049         .type           = bfin_serial_type,
1050         .release_port   = bfin_serial_release_port,
1051         .request_port   = bfin_serial_request_port,
1052         .config_port    = bfin_serial_config_port,
1053         .verify_port    = bfin_serial_verify_port,
1054 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1055         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1056         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1057         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1058 #endif
1059 #ifdef CONFIG_CONSOLE_POLL
1060         .poll_put_char  = bfin_serial_poll_put_char,
1061         .poll_get_char  = bfin_serial_poll_get_char,
1062 #endif
1063 };
1064
1065 static void __init bfin_serial_hw_init(void)
1066 {
1067 #ifdef CONFIG_SERIAL_BFIN_UART0
1068         peripheral_request(P_UART0_TX, DRIVER_NAME);
1069         peripheral_request(P_UART0_RX, DRIVER_NAME);
1070 #endif
1071
1072 #ifdef CONFIG_SERIAL_BFIN_UART1
1073         peripheral_request(P_UART1_TX, DRIVER_NAME);
1074         peripheral_request(P_UART1_RX, DRIVER_NAME);
1075
1076 # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
1077         peripheral_request(P_UART1_RTS, DRIVER_NAME);
1078         peripheral_request(P_UART1_CTS, DRIVER_NAME);
1079 # endif
1080 #endif
1081
1082 #ifdef CONFIG_SERIAL_BFIN_UART2
1083         peripheral_request(P_UART2_TX, DRIVER_NAME);
1084         peripheral_request(P_UART2_RX, DRIVER_NAME);
1085 #endif
1086
1087 #ifdef CONFIG_SERIAL_BFIN_UART3
1088         peripheral_request(P_UART3_TX, DRIVER_NAME);
1089         peripheral_request(P_UART3_RX, DRIVER_NAME);
1090
1091 # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
1092         peripheral_request(P_UART3_RTS, DRIVER_NAME);
1093         peripheral_request(P_UART3_CTS, DRIVER_NAME);
1094 # endif
1095 #endif
1096 }
1097
1098 static void __init bfin_serial_init_ports(void)
1099 {
1100         static int first = 1;
1101         int i;
1102
1103         if (!first)
1104                 return;
1105         first = 0;
1106
1107         bfin_serial_hw_init();
1108
1109         for (i = 0; i < nr_active_ports; i++) {
1110                 spin_lock_init(&bfin_serial_ports[i].port.lock);
1111                 bfin_serial_ports[i].port.uartclk   = get_sclk();
1112                 bfin_serial_ports[i].port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1113                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
1114                 bfin_serial_ports[i].port.line      = i;
1115                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
1116                 bfin_serial_ports[i].port.membase   =
1117                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
1118                 bfin_serial_ports[i].port.mapbase   =
1119                         bfin_serial_resource[i].uart_base_addr;
1120                 bfin_serial_ports[i].port.irq       =
1121                         bfin_serial_resource[i].uart_irq;
1122                 bfin_serial_ports[i].status_irq     =
1123                         bfin_serial_resource[i].uart_status_irq;
1124                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
1125 #ifdef CONFIG_SERIAL_BFIN_DMA
1126                 bfin_serial_ports[i].tx_done        = 1;
1127                 bfin_serial_ports[i].tx_count       = 0;
1128                 bfin_serial_ports[i].tx_dma_channel =
1129                         bfin_serial_resource[i].uart_tx_dma_channel;
1130                 bfin_serial_ports[i].rx_dma_channel =
1131                         bfin_serial_resource[i].uart_rx_dma_channel;
1132                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
1133 #endif
1134 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1135         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1136                 bfin_serial_ports[i].cts_pin        =
1137                         bfin_serial_resource[i].uart_cts_pin;
1138                 bfin_serial_ports[i].rts_pin        =
1139                         bfin_serial_resource[i].uart_rts_pin;
1140 #endif
1141         }
1142 }
1143
1144 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1145 /*
1146  * If the port was already initialised (eg, by a boot loader),
1147  * try to determine the current setup.
1148  */
1149 static void __init
1150 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1151                            int *parity, int *bits)
1152 {
1153         unsigned short status;
1154
1155         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1156         if (status == (ERBFI | ETBEI)) {
1157                 /* ok, the port was enabled */
1158                 u16 lcr, dlh, dll;
1159
1160                 lcr = UART_GET_LCR(uart);
1161
1162                 *parity = 'n';
1163                 if (lcr & PEN) {
1164                         if (lcr & EPS)
1165                                 *parity = 'e';
1166                         else
1167                                 *parity = 'o';
1168                 }
1169                 switch (lcr & 0x03) {
1170                         case 0: *bits = 5; break;
1171                         case 1: *bits = 6; break;
1172                         case 2: *bits = 7; break;
1173                         case 3: *bits = 8; break;
1174                 }
1175                 /* Set DLAB in LCR to Access DLL and DLH */
1176                 UART_SET_DLAB(uart);
1177
1178                 dll = UART_GET_DLL(uart);
1179                 dlh = UART_GET_DLH(uart);
1180
1181                 /* Clear DLAB in LCR to Access THR RBR IER */
1182                 UART_CLEAR_DLAB(uart);
1183
1184                 *baud = get_sclk() / (16*(dll | dlh << 8));
1185         }
1186         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1187 }
1188
1189 static struct uart_driver bfin_serial_reg;
1190
1191 static int __init
1192 bfin_serial_console_setup(struct console *co, char *options)
1193 {
1194         struct bfin_serial_port *uart;
1195         int baud = 57600;
1196         int bits = 8;
1197         int parity = 'n';
1198 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1199         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1200         int flow = 'r';
1201 # else
1202         int flow = 'n';
1203 # endif
1204
1205         /*
1206          * Check whether an invalid uart number has been specified, and
1207          * if so, search for the first available port that does have
1208          * console support.
1209          */
1210         if (co->index == -1 || co->index >= nr_active_ports)
1211                 co->index = 0;
1212         uart = &bfin_serial_ports[co->index];
1213
1214         if (options)
1215                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1216         else
1217                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1218
1219         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1220 }
1221 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1222                                  defined (CONFIG_EARLY_PRINTK) */
1223
1224 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1225 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1226 {
1227         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1228         while (!(UART_GET_LSR(uart) & THRE))
1229                 barrier();
1230         UART_PUT_CHAR(uart, ch);
1231         SSYNC();
1232 }
1233
1234 /*
1235  * Interrupts are disabled on entering
1236  */
1237 static void
1238 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1239 {
1240         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1241         unsigned long flags;
1242
1243         spin_lock_irqsave(&uart->port.lock, flags);
1244         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1245         spin_unlock_irqrestore(&uart->port.lock, flags);
1246
1247 }
1248
1249 static struct console bfin_serial_console = {
1250         .name           = BFIN_SERIAL_NAME,
1251         .write          = bfin_serial_console_write,
1252         .device         = uart_console_device,
1253         .setup          = bfin_serial_console_setup,
1254         .flags          = CON_PRINTBUFFER,
1255         .index          = -1,
1256         .data           = &bfin_serial_reg,
1257 };
1258
1259 static int __init bfin_serial_rs_console_init(void)
1260 {
1261         bfin_serial_init_ports();
1262         register_console(&bfin_serial_console);
1263
1264         return 0;
1265 }
1266 console_initcall(bfin_serial_rs_console_init);
1267
1268 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1269 #else
1270 #define BFIN_SERIAL_CONSOLE     NULL
1271 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1272
1273
1274 #ifdef CONFIG_EARLY_PRINTK
1275 static __init void early_serial_putc(struct uart_port *port, int ch)
1276 {
1277         unsigned timeout = 0xffff;
1278         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1279
1280         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1281                 cpu_relax();
1282         UART_PUT_CHAR(uart, ch);
1283 }
1284
1285 static __init void early_serial_write(struct console *con, const char *s,
1286                                         unsigned int n)
1287 {
1288         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1289         unsigned int i;
1290
1291         for (i = 0; i < n; i++, s++) {
1292                 if (*s == '\n')
1293                         early_serial_putc(&uart->port, '\r');
1294                 early_serial_putc(&uart->port, *s);
1295         }
1296 }
1297
1298 /*
1299  * This should have a .setup or .early_setup in it, but then things get called
1300  * without the command line options, and the baud rate gets messed up - so
1301  * don't let the common infrastructure play with things. (see calls to setup
1302  * & earlysetup in ./kernel/printk.c:register_console()
1303  */
1304 static struct __initdata console bfin_early_serial_console = {
1305         .name = "early_BFuart",
1306         .write = early_serial_write,
1307         .device = uart_console_device,
1308         .flags = CON_PRINTBUFFER,
1309         .index = -1,
1310         .data  = &bfin_serial_reg,
1311 };
1312
1313 struct console __init *bfin_earlyserial_init(unsigned int port,
1314                                                 unsigned int cflag)
1315 {
1316         struct bfin_serial_port *uart;
1317         struct ktermios t;
1318
1319         if (port == -1 || port >= nr_active_ports)
1320                 port = 0;
1321         bfin_serial_init_ports();
1322         bfin_early_serial_console.index = port;
1323         uart = &bfin_serial_ports[port];
1324         t.c_cflag = cflag;
1325         t.c_iflag = 0;
1326         t.c_oflag = 0;
1327         t.c_lflag = ICANON;
1328         t.c_line = port;
1329         bfin_serial_set_termios(&uart->port, &t, &t);
1330         return &bfin_early_serial_console;
1331 }
1332
1333 #endif /* CONFIG_EARLY_PRINTK */
1334
1335 static struct uart_driver bfin_serial_reg = {
1336         .owner                  = THIS_MODULE,
1337         .driver_name            = "bfin-uart",
1338         .dev_name               = BFIN_SERIAL_NAME,
1339         .major                  = BFIN_SERIAL_MAJOR,
1340         .minor                  = BFIN_SERIAL_MINOR,
1341         .nr                     = BFIN_UART_NR_PORTS,
1342         .cons                   = BFIN_SERIAL_CONSOLE,
1343 };
1344
1345 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1346 {
1347         int i;
1348
1349         for (i = 0; i < nr_active_ports; i++) {
1350                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1351                         continue;
1352                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1353         }
1354
1355         return 0;
1356 }
1357
1358 static int bfin_serial_resume(struct platform_device *dev)
1359 {
1360         int i;
1361
1362         for (i = 0; i < nr_active_ports; i++) {
1363                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1364                         continue;
1365                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1366         }
1367
1368         return 0;
1369 }
1370
1371 static int bfin_serial_probe(struct platform_device *dev)
1372 {
1373         struct resource *res = dev->resource;
1374         int i;
1375
1376         for (i = 0; i < dev->num_resources; i++, res++)
1377                 if (res->flags & IORESOURCE_MEM)
1378                         break;
1379
1380         if (i < dev->num_resources) {
1381                 for (i = 0; i < nr_active_ports; i++, res++) {
1382                         if (bfin_serial_ports[i].port.mapbase != res->start)
1383                                 continue;
1384                         bfin_serial_ports[i].port.dev = &dev->dev;
1385                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1386                 }
1387         }
1388
1389         return 0;
1390 }
1391
1392 static int bfin_serial_remove(struct platform_device *dev)
1393 {
1394         int i;
1395
1396         for (i = 0; i < nr_active_ports; i++) {
1397                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1398                         continue;
1399                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1400                 bfin_serial_ports[i].port.dev = NULL;
1401 #if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1402                 gpio_free(bfin_serial_ports[i].cts_pin);
1403                 gpio_free(bfin_serial_ports[i].rts_pin);
1404 #endif
1405         }
1406
1407         return 0;
1408 }
1409
1410 static struct platform_driver bfin_serial_driver = {
1411         .probe          = bfin_serial_probe,
1412         .remove         = bfin_serial_remove,
1413         .suspend        = bfin_serial_suspend,
1414         .resume         = bfin_serial_resume,
1415         .driver         = {
1416                 .name   = "bfin-uart",
1417                 .owner  = THIS_MODULE,
1418         },
1419 };
1420
1421 static int __init bfin_serial_init(void)
1422 {
1423         int ret;
1424
1425         pr_info("Serial: Blackfin serial driver\n");
1426
1427         bfin_serial_init_ports();
1428
1429         ret = uart_register_driver(&bfin_serial_reg);
1430         if (ret == 0) {
1431                 ret = platform_driver_register(&bfin_serial_driver);
1432                 if (ret) {
1433                         pr_debug("uart register failed\n");
1434                         uart_unregister_driver(&bfin_serial_reg);
1435                 }
1436         }
1437         return ret;
1438 }
1439
1440 static void __exit bfin_serial_exit(void)
1441 {
1442         platform_driver_unregister(&bfin_serial_driver);
1443         uart_unregister_driver(&bfin_serial_reg);
1444 }
1445
1446
1447 module_init(bfin_serial_init);
1448 module_exit(bfin_serial_exit);
1449
1450 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1451 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1452 MODULE_LICENSE("GPL");
1453 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1454 MODULE_ALIAS("platform:bfin-uart");