3 * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
11 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
12 * to use polling for flow control. TX empty IRQ is unusable, since
13 * writing conf clears FIFO buffer and we cannot have this interrupt
14 * always asking us for attention.
16 * Example platform data:
18 static struct plat_max3100 max3100_plat_data = {
24 static struct spi_board_info spi_board_info[] = {
26 .modalias = "max3100",
27 .platform_data = &max3100_plat_data,
29 .max_speed_hz = 5*1000*1000,
34 * The initial minor number is 209 in the low-density serial port:
35 * mknod /dev/ttyMAX0 c 204 209
38 #define MAX3100_MAJOR 204
39 #define MAX3100_MINOR 209
40 /* 4 MAX3100s should be enough for everyone */
43 #include <linux/delay.h>
44 #include <linux/slab.h>
45 #include <linux/device.h>
46 #include <linux/serial_core.h>
47 #include <linux/serial.h>
48 #include <linux/spi/spi.h>
49 #include <linux/freezer.h>
51 #include <linux/serial_max3100.h>
53 #define MAX3100_C (1<<14)
54 #define MAX3100_D (0<<14)
55 #define MAX3100_W (1<<15)
56 #define MAX3100_RX (0<<15)
58 #define MAX3100_WC (MAX3100_W | MAX3100_C)
59 #define MAX3100_RC (MAX3100_RX | MAX3100_C)
60 #define MAX3100_WD (MAX3100_W | MAX3100_D)
61 #define MAX3100_RD (MAX3100_RX | MAX3100_D)
62 #define MAX3100_CMD (3 << 14)
64 #define MAX3100_T (1<<14)
65 #define MAX3100_R (1<<15)
67 #define MAX3100_FEN (1<<13)
68 #define MAX3100_SHDN (1<<12)
69 #define MAX3100_TM (1<<11)
70 #define MAX3100_RM (1<<10)
71 #define MAX3100_PM (1<<9)
72 #define MAX3100_RAM (1<<8)
73 #define MAX3100_IR (1<<7)
74 #define MAX3100_ST (1<<6)
75 #define MAX3100_PE (1<<5)
76 #define MAX3100_L (1<<4)
77 #define MAX3100_BAUD (0xf)
79 #define MAX3100_TE (1<<10)
80 #define MAX3100_RAFE (1<<10)
81 #define MAX3100_RTS (1<<9)
82 #define MAX3100_CTS (1<<9)
83 #define MAX3100_PT (1<<8)
84 #define MAX3100_DATA (0xff)
86 #define MAX3100_RT (MAX3100_R | MAX3100_T)
87 #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
89 /* the following simulate a status reg for ignore_status_mask */
90 #define MAX3100_STATUS_PE 1
91 #define MAX3100_STATUS_FE 2
92 #define MAX3100_STATUS_OE 4
95 struct uart_port port;
96 struct spi_device *spi;
98 int cts; /* last CTS received for flow ctrl */
99 int tx_empty; /* last TX empty bit */
101 spinlock_t conf_lock; /* shared data */
102 int conf_commit; /* need to make changes */
103 int conf; /* configuration for the MAX31000
104 * (bits 0-7, bits 8-11 are irqs) */
105 int rts_commit; /* need to change rts */
106 int rts; /* rts status */
107 int baud; /* current baud rate */
109 int parity; /* keeps track if we should send parity */
110 #define MAX3100_PARITY_ON 1
111 #define MAX3100_PARITY_ODD 2
112 #define MAX3100_7BIT 4
113 int rx_enabled; /* if we should rx chars */
115 int irq; /* irq assigned to the max3100 */
117 int minor; /* minor number */
118 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
119 int loopback; /* 1 if we are in loopback mode */
121 /* for handling irqs: need workqueue since we do spi_sync */
122 struct workqueue_struct *workqueue;
123 struct work_struct work;
124 /* set to 1 to make the workhandler exit as soon as possible */
126 /* need to know we are suspending to avoid deadlock on workqueue */
129 /* hook for suspending MAX3100 via dedicated pin */
130 void (*max3100_hw_suspend) (int suspend);
132 /* poll time (in ms) for ctrl lines */
135 struct timer_list timer;
138 static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
139 static DEFINE_MUTEX(max3100s_lock); /* race on probe */
141 static int max3100_do_parity(struct max3100_port *s, u16 c)
145 if (s->parity & MAX3100_PARITY_ODD)
150 if (s->parity & MAX3100_7BIT)
155 parity = parity ^ (hweight8(c) & 1);
159 static int max3100_check_parity(struct max3100_port *s, u16 c)
161 return max3100_do_parity(s, c) == ((c >> 8) & 1);
164 static void max3100_calc_parity(struct max3100_port *s, u16 *c)
166 if (s->parity & MAX3100_7BIT)
171 if (s->parity & MAX3100_PARITY_ON)
172 *c |= max3100_do_parity(s, *c) << 8;
175 static void max3100_work(struct work_struct *w);
177 static void max3100_dowork(struct max3100_port *s)
179 if (!s->force_end_work && !work_pending(&s->work) &&
180 !freezing(current) && !s->suspending)
181 queue_work(s->workqueue, &s->work);
184 static void max3100_timeout(unsigned long data)
186 struct max3100_port *s = (struct max3100_port *)data;
190 mod_timer(&s->timer, jiffies + s->poll_time);
194 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
196 struct spi_message message;
199 struct spi_transfer tran = {
205 etx = cpu_to_be16(tx);
206 spi_message_init(&message);
207 spi_message_add_tail(&tran, &message);
208 status = spi_sync(s->spi, &message);
210 dev_warn(&s->spi->dev, "error while calling spi_sync\n");
213 *rx = be16_to_cpu(erx);
214 s->tx_empty = (*rx & MAX3100_T) > 0;
215 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
219 static int max3100_handlerx(struct max3100_port *s, u16 rx)
221 unsigned int ch, flg, status = 0;
224 if (rx & MAX3100_R && s->rx_enabled) {
225 dev_dbg(&s->spi->dev, "%s\n", __func__);
226 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
227 if (rx & MAX3100_RAFE) {
228 s->port.icount.frame++;
230 status |= MAX3100_STATUS_FE;
232 if (s->parity & MAX3100_PARITY_ON) {
233 if (max3100_check_parity(s, rx)) {
237 s->port.icount.parity++;
239 status |= MAX3100_STATUS_PE;
246 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
250 cts = (rx & MAX3100_CTS) > 0;
253 uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
259 static void max3100_work(struct work_struct *w)
261 struct max3100_port *s = container_of(w, struct max3100_port, work);
264 int conf, cconf, rts, crts;
265 struct circ_buf *xmit = &s->port.state->xmit;
267 dev_dbg(&s->spi->dev, "%s\n", __func__);
271 spin_lock(&s->conf_lock);
273 cconf = s->conf_commit;
276 crts = s->rts_commit;
278 spin_unlock(&s->conf_lock);
280 max3100_sr(s, MAX3100_WC | conf, &rx);
282 max3100_sr(s, MAX3100_WD | MAX3100_TE |
283 (s->rts ? MAX3100_RTS : 0), &rx);
284 rxchars += max3100_handlerx(s, rx);
287 max3100_sr(s, MAX3100_RD, &rx);
288 rxchars += max3100_handlerx(s, rx);
290 if (rx & MAX3100_T) {
292 if (s->port.x_char) {
296 } else if (!uart_circ_empty(xmit) &&
297 !uart_tx_stopped(&s->port)) {
298 tx = xmit->buf[xmit->tail];
299 xmit->tail = (xmit->tail + 1) &
300 (UART_XMIT_SIZE - 1);
304 max3100_calc_parity(s, &tx);
305 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
306 max3100_sr(s, tx, &rx);
307 rxchars += max3100_handlerx(s, rx);
311 if (rxchars > 16 && s->port.state->port.tty != NULL) {
312 tty_flip_buffer_push(s->port.state->port.tty);
315 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
316 uart_write_wakeup(&s->port);
318 } while (!s->force_end_work &&
319 !freezing(current) &&
321 (!uart_circ_empty(xmit) &&
322 !uart_tx_stopped(&s->port))));
324 if (rxchars > 0 && s->port.state->port.tty != NULL)
325 tty_flip_buffer_push(s->port.state->port.tty);
328 static irqreturn_t max3100_irq(int irqno, void *dev_id)
330 struct max3100_port *s = dev_id;
332 dev_dbg(&s->spi->dev, "%s\n", __func__);
338 static void max3100_enable_ms(struct uart_port *port)
340 struct max3100_port *s = container_of(port,
344 if (s->poll_time > 0)
345 mod_timer(&s->timer, jiffies);
346 dev_dbg(&s->spi->dev, "%s\n", __func__);
349 static void max3100_start_tx(struct uart_port *port)
351 struct max3100_port *s = container_of(port,
355 dev_dbg(&s->spi->dev, "%s\n", __func__);
360 static void max3100_stop_rx(struct uart_port *port)
362 struct max3100_port *s = container_of(port,
366 dev_dbg(&s->spi->dev, "%s\n", __func__);
369 spin_lock(&s->conf_lock);
370 s->conf &= ~MAX3100_RM;
372 spin_unlock(&s->conf_lock);
376 static unsigned int max3100_tx_empty(struct uart_port *port)
378 struct max3100_port *s = container_of(port,
382 dev_dbg(&s->spi->dev, "%s\n", __func__);
384 /* may not be truly up-to-date */
389 static unsigned int max3100_get_mctrl(struct uart_port *port)
391 struct max3100_port *s = container_of(port,
395 dev_dbg(&s->spi->dev, "%s\n", __func__);
397 /* may not be truly up-to-date */
399 /* always assert DCD and DSR since these lines are not wired */
400 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
403 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
405 struct max3100_port *s = container_of(port,
410 dev_dbg(&s->spi->dev, "%s\n", __func__);
412 rts = (mctrl & TIOCM_RTS) > 0;
414 spin_lock(&s->conf_lock);
420 spin_unlock(&s->conf_lock);
424 max3100_set_termios(struct uart_port *port, struct ktermios *termios,
425 struct ktermios *old)
427 struct max3100_port *s = container_of(port,
432 u32 param_new, param_mask, parity = 0;
433 struct tty_struct *tty = s->port.state->port.tty;
435 dev_dbg(&s->spi->dev, "%s\n", __func__);
439 cflag = termios->c_cflag;
443 baud = tty_get_baud_rate(tty);
444 param_new = s->conf & MAX3100_BAUD;
453 param_new = 14 + s->crystal;
456 param_new = 13 + s->crystal;
459 param_new = 12 + s->crystal;
462 param_new = 11 + s->crystal;
465 param_new = 10 + s->crystal;
468 param_new = 9 + s->crystal;
471 param_new = 8 + s->crystal;
474 param_new = 1 + s->crystal;
477 param_new = 0 + s->crystal;
488 tty_encode_baud_rate(tty, baud, baud);
490 param_mask |= MAX3100_BAUD;
492 if ((cflag & CSIZE) == CS8) {
493 param_new &= ~MAX3100_L;
494 parity &= ~MAX3100_7BIT;
496 param_new |= MAX3100_L;
497 parity |= MAX3100_7BIT;
498 cflag = (cflag & ~CSIZE) | CS7;
500 param_mask |= MAX3100_L;
503 param_new |= MAX3100_ST;
505 param_new &= ~MAX3100_ST;
506 param_mask |= MAX3100_ST;
508 if (cflag & PARENB) {
509 param_new |= MAX3100_PE;
510 parity |= MAX3100_PARITY_ON;
512 param_new &= ~MAX3100_PE;
513 parity &= ~MAX3100_PARITY_ON;
515 param_mask |= MAX3100_PE;
518 parity |= MAX3100_PARITY_ODD;
520 parity &= ~MAX3100_PARITY_ODD;
522 /* mask termios capabilities we don't support */
524 termios->c_cflag = cflag;
526 s->port.ignore_status_mask = 0;
527 if (termios->c_iflag & IGNPAR)
528 s->port.ignore_status_mask |=
529 MAX3100_STATUS_PE | MAX3100_STATUS_FE |
532 /* we are sending char from a workqueue so enable */
533 s->port.state->port.tty->low_latency = 1;
535 if (s->poll_time > 0)
536 del_timer_sync(&s->timer);
538 uart_update_timeout(port, termios->c_cflag, baud);
540 spin_lock(&s->conf_lock);
541 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
544 spin_unlock(&s->conf_lock);
547 if (UART_ENABLE_MS(&s->port, termios->c_cflag))
548 max3100_enable_ms(&s->port);
551 static void max3100_shutdown(struct uart_port *port)
553 struct max3100_port *s = container_of(port,
557 dev_dbg(&s->spi->dev, "%s\n", __func__);
562 s->force_end_work = 1;
564 if (s->poll_time > 0)
565 del_timer_sync(&s->timer);
568 flush_workqueue(s->workqueue);
569 destroy_workqueue(s->workqueue);
575 /* set shutdown mode to save power */
576 if (s->max3100_hw_suspend)
577 s->max3100_hw_suspend(1);
581 tx = MAX3100_WC | MAX3100_SHDN;
582 max3100_sr(s, tx, &rx);
586 static int max3100_startup(struct uart_port *port)
588 struct max3100_port *s = container_of(port,
593 dev_dbg(&s->spi->dev, "%s\n", __func__);
595 s->conf = MAX3100_RM;
596 s->baud = s->crystal ? 230400 : 115200;
602 s->force_end_work = 0;
606 sprintf(b, "max3100-%d", s->minor);
607 s->workqueue = create_freezeable_workqueue(b);
609 dev_warn(&s->spi->dev, "cannot create workqueue\n");
612 INIT_WORK(&s->work, max3100_work);
614 if (request_irq(s->irq, max3100_irq,
615 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
616 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
618 destroy_workqueue(s->workqueue);
626 max3100_sr(s, tx, &rx);
629 if (s->max3100_hw_suspend)
630 s->max3100_hw_suspend(0);
633 /* wait for clock to settle */
636 max3100_enable_ms(&s->port);
641 static const char *max3100_type(struct uart_port *port)
643 struct max3100_port *s = container_of(port,
647 dev_dbg(&s->spi->dev, "%s\n", __func__);
649 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
652 static void max3100_release_port(struct uart_port *port)
654 struct max3100_port *s = container_of(port,
658 dev_dbg(&s->spi->dev, "%s\n", __func__);
661 static void max3100_config_port(struct uart_port *port, int flags)
663 struct max3100_port *s = container_of(port,
667 dev_dbg(&s->spi->dev, "%s\n", __func__);
669 if (flags & UART_CONFIG_TYPE)
670 s->port.type = PORT_MAX3100;
673 static int max3100_verify_port(struct uart_port *port,
674 struct serial_struct *ser)
676 struct max3100_port *s = container_of(port,
681 dev_dbg(&s->spi->dev, "%s\n", __func__);
683 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
688 static void max3100_stop_tx(struct uart_port *port)
690 struct max3100_port *s = container_of(port,
694 dev_dbg(&s->spi->dev, "%s\n", __func__);
697 static int max3100_request_port(struct uart_port *port)
699 struct max3100_port *s = container_of(port,
703 dev_dbg(&s->spi->dev, "%s\n", __func__);
707 static void max3100_break_ctl(struct uart_port *port, int break_state)
709 struct max3100_port *s = container_of(port,
713 dev_dbg(&s->spi->dev, "%s\n", __func__);
716 static struct uart_ops max3100_ops = {
717 .tx_empty = max3100_tx_empty,
718 .set_mctrl = max3100_set_mctrl,
719 .get_mctrl = max3100_get_mctrl,
720 .stop_tx = max3100_stop_tx,
721 .start_tx = max3100_start_tx,
722 .stop_rx = max3100_stop_rx,
723 .enable_ms = max3100_enable_ms,
724 .break_ctl = max3100_break_ctl,
725 .startup = max3100_startup,
726 .shutdown = max3100_shutdown,
727 .set_termios = max3100_set_termios,
728 .type = max3100_type,
729 .release_port = max3100_release_port,
730 .request_port = max3100_request_port,
731 .config_port = max3100_config_port,
732 .verify_port = max3100_verify_port,
735 static struct uart_driver max3100_uart_driver = {
736 .owner = THIS_MODULE,
737 .driver_name = "ttyMAX",
738 .dev_name = "ttyMAX",
739 .major = MAX3100_MAJOR,
740 .minor = MAX3100_MINOR,
743 static int uart_driver_registered;
745 static int __devinit max3100_probe(struct spi_device *spi)
748 struct plat_max3100 *pdata;
751 mutex_lock(&max3100s_lock);
753 if (!uart_driver_registered) {
754 uart_driver_registered = 1;
755 retval = uart_register_driver(&max3100_uart_driver);
757 printk(KERN_ERR "Couldn't register max3100 uart driver\n");
758 mutex_unlock(&max3100s_lock);
763 for (i = 0; i < MAX_MAX3100; i++)
766 if (i == MAX_MAX3100) {
767 dev_warn(&spi->dev, "too many MAX3100 chips\n");
768 mutex_unlock(&max3100s_lock);
772 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
775 "kmalloc for max3100 structure %d failed!\n", i);
776 mutex_unlock(&max3100s_lock);
779 max3100s[i]->spi = spi;
780 max3100s[i]->irq = spi->irq;
781 spin_lock_init(&max3100s[i]->conf_lock);
782 dev_set_drvdata(&spi->dev, max3100s[i]);
783 pdata = spi->dev.platform_data;
784 max3100s[i]->crystal = pdata->crystal;
785 max3100s[i]->loopback = pdata->loopback;
786 max3100s[i]->poll_time = pdata->poll_time * HZ / 1000;
787 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
788 max3100s[i]->poll_time = 1;
789 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
790 max3100s[i]->minor = i;
791 init_timer(&max3100s[i]->timer);
792 max3100s[i]->timer.function = max3100_timeout;
793 max3100s[i]->timer.data = (unsigned long) max3100s[i];
795 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
796 max3100s[i]->port.irq = max3100s[i]->irq;
797 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
798 max3100s[i]->port.fifosize = 16;
799 max3100s[i]->port.ops = &max3100_ops;
800 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
801 max3100s[i]->port.line = i;
802 max3100s[i]->port.type = PORT_MAX3100;
803 max3100s[i]->port.dev = &spi->dev;
804 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
807 "uart_add_one_port failed for line %d with error %d\n",
810 /* set shutdown mode to save power. Will be woken-up on open */
811 if (max3100s[i]->max3100_hw_suspend)
812 max3100s[i]->max3100_hw_suspend(1);
814 tx = MAX3100_WC | MAX3100_SHDN;
815 max3100_sr(max3100s[i], tx, &rx);
817 mutex_unlock(&max3100s_lock);
821 static int __devexit max3100_remove(struct spi_device *spi)
823 struct max3100_port *s = dev_get_drvdata(&spi->dev);
826 mutex_lock(&max3100s_lock);
828 /* find out the index for the chip we are removing */
829 for (i = 0; i < MAX_MAX3100; i++)
830 if (max3100s[i] == s)
833 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
834 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
838 /* check if this is the last chip we have */
839 for (i = 0; i < MAX_MAX3100; i++)
841 mutex_unlock(&max3100s_lock);
844 pr_debug("removing max3100 driver\n");
845 uart_unregister_driver(&max3100_uart_driver);
847 mutex_unlock(&max3100s_lock);
853 static int max3100_suspend(struct spi_device *spi, pm_message_t state)
855 struct max3100_port *s = dev_get_drvdata(&spi->dev);
857 dev_dbg(&s->spi->dev, "%s\n", __func__);
862 uart_suspend_port(&max3100_uart_driver, &s->port);
864 if (s->max3100_hw_suspend)
865 s->max3100_hw_suspend(1);
867 /* no HW suspend, so do SW one */
870 tx = MAX3100_WC | MAX3100_SHDN;
871 max3100_sr(s, tx, &rx);
876 static int max3100_resume(struct spi_device *spi)
878 struct max3100_port *s = dev_get_drvdata(&spi->dev);
880 dev_dbg(&s->spi->dev, "%s\n", __func__);
882 if (s->max3100_hw_suspend)
883 s->max3100_hw_suspend(0);
884 uart_resume_port(&max3100_uart_driver, &s->port);
897 #define max3100_suspend NULL
898 #define max3100_resume NULL
901 static struct spi_driver max3100_driver = {
904 .bus = &spi_bus_type,
905 .owner = THIS_MODULE,
908 .probe = max3100_probe,
909 .remove = __devexit_p(max3100_remove),
910 .suspend = max3100_suspend,
911 .resume = max3100_resume,
914 static int __init max3100_init(void)
916 return spi_register_driver(&max3100_driver);
918 module_init(max3100_init);
920 static void __exit max3100_exit(void)
922 spi_unregister_driver(&max3100_driver);
924 module_exit(max3100_exit);
926 MODULE_DESCRIPTION("MAX3100 driver");
927 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
928 MODULE_LICENSE("GPL");
929 MODULE_ALIAS("spi:max3100");